./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe005_power.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_79096233-b2a5-4d99-a369-e297c6b40e57/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_79096233-b2a5-4d99-a369-e297c6b40e57/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_79096233-b2a5-4d99-a369-e297c6b40e57/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_79096233-b2a5-4d99-a369-e297c6b40e57/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe005_power.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_79096233-b2a5-4d99-a369-e297c6b40e57/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_79096233-b2a5-4d99-a369-e297c6b40e57/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 2635519ce14e554bf8fe7e37c6946ff746c2449e ......................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 17:35:11,903 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 17:35:11,904 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 17:35:11,912 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 17:35:11,912 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 17:35:11,913 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 17:35:11,914 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 17:35:11,915 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 17:35:11,916 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 17:35:11,917 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 17:35:11,917 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 17:35:11,918 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 17:35:11,918 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 17:35:11,919 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 17:35:11,920 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 17:35:11,921 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 17:35:11,921 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 17:35:11,922 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 17:35:11,923 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 17:35:11,924 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 17:35:11,926 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 17:35:11,927 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 17:35:11,928 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 17:35:11,928 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 17:35:11,930 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 17:35:11,930 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 17:35:11,930 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 17:35:11,931 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 17:35:11,931 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 17:35:11,932 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 17:35:11,932 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 17:35:11,932 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 17:35:11,933 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 17:35:11,933 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 17:35:11,934 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 17:35:11,934 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 17:35:11,935 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 17:35:11,935 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 17:35:11,935 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 17:35:11,936 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 17:35:11,937 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 17:35:11,937 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_79096233-b2a5-4d99-a369-e297c6b40e57/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 17:35:11,950 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 17:35:11,950 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 17:35:11,951 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 17:35:11,951 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 17:35:11,951 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 17:35:11,952 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 17:35:11,952 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 17:35:11,952 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 17:35:11,952 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 17:35:11,952 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 17:35:11,953 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 17:35:11,953 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 17:35:11,953 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 17:35:11,953 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 17:35:11,953 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 17:35:11,953 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 17:35:11,954 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 17:35:11,954 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 17:35:11,954 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 17:35:11,954 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 17:35:11,954 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 17:35:11,955 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:35:11,955 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 17:35:11,955 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 17:35:11,955 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 17:35:11,955 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 17:35:11,956 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 17:35:11,956 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 17:35:11,956 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 17:35:11,956 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_79096233-b2a5-4d99-a369-e297c6b40e57/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2635519ce14e554bf8fe7e37c6946ff746c2449e [2019-12-07 17:35:12,061 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 17:35:12,071 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 17:35:12,073 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 17:35:12,074 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 17:35:12,075 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 17:35:12,075 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_79096233-b2a5-4d99-a369-e297c6b40e57/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe005_power.oepc.i [2019-12-07 17:35:12,122 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_79096233-b2a5-4d99-a369-e297c6b40e57/bin/uautomizer/data/cfa59a744/6d69c18459cb4c57892f6ccde0c60724/FLAG1e571aa07 [2019-12-07 17:35:12,520 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 17:35:12,521 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_79096233-b2a5-4d99-a369-e297c6b40e57/sv-benchmarks/c/pthread-wmm/safe005_power.oepc.i [2019-12-07 17:35:12,531 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_79096233-b2a5-4d99-a369-e297c6b40e57/bin/uautomizer/data/cfa59a744/6d69c18459cb4c57892f6ccde0c60724/FLAG1e571aa07 [2019-12-07 17:35:12,902 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_79096233-b2a5-4d99-a369-e297c6b40e57/bin/uautomizer/data/cfa59a744/6d69c18459cb4c57892f6ccde0c60724 [2019-12-07 17:35:12,905 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 17:35:12,906 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 17:35:12,907 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 17:35:12,907 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 17:35:12,910 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 17:35:12,911 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:35:12" (1/1) ... [2019-12-07 17:35:12,913 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@296938c1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:35:12, skipping insertion in model container [2019-12-07 17:35:12,913 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:35:12" (1/1) ... [2019-12-07 17:35:12,919 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 17:35:12,949 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 17:35:13,197 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:35:13,205 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 17:35:13,248 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:35:13,293 INFO L208 MainTranslator]: Completed translation [2019-12-07 17:35:13,293 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:35:13 WrapperNode [2019-12-07 17:35:13,293 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 17:35:13,294 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 17:35:13,294 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 17:35:13,294 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 17:35:13,300 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:35:13" (1/1) ... [2019-12-07 17:35:13,313 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:35:13" (1/1) ... [2019-12-07 17:35:13,331 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 17:35:13,332 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 17:35:13,332 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 17:35:13,332 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 17:35:13,338 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:35:13" (1/1) ... [2019-12-07 17:35:13,338 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:35:13" (1/1) ... [2019-12-07 17:35:13,342 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:35:13" (1/1) ... [2019-12-07 17:35:13,342 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:35:13" (1/1) ... [2019-12-07 17:35:13,349 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:35:13" (1/1) ... [2019-12-07 17:35:13,351 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:35:13" (1/1) ... [2019-12-07 17:35:13,354 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:35:13" (1/1) ... [2019-12-07 17:35:13,357 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 17:35:13,357 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 17:35:13,357 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 17:35:13,357 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 17:35:13,358 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:35:13" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_79096233-b2a5-4d99-a369-e297c6b40e57/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:35:13,403 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 17:35:13,403 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 17:35:13,403 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 17:35:13,403 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 17:35:13,403 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 17:35:13,403 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 17:35:13,403 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 17:35:13,404 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 17:35:13,404 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 17:35:13,404 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 17:35:13,404 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 17:35:13,404 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 17:35:13,404 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 17:35:13,405 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 17:35:13,747 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 17:35:13,747 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 17:35:13,748 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:35:13 BoogieIcfgContainer [2019-12-07 17:35:13,748 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 17:35:13,748 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 17:35:13,748 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 17:35:13,750 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 17:35:13,750 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 05:35:12" (1/3) ... [2019-12-07 17:35:13,751 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@eadeb15 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:35:13, skipping insertion in model container [2019-12-07 17:35:13,751 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:35:13" (2/3) ... [2019-12-07 17:35:13,751 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@eadeb15 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:35:13, skipping insertion in model container [2019-12-07 17:35:13,751 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:35:13" (3/3) ... [2019-12-07 17:35:13,752 INFO L109 eAbstractionObserver]: Analyzing ICFG safe005_power.oepc.i [2019-12-07 17:35:13,758 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 17:35:13,759 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 17:35:13,763 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 17:35:13,764 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 17:35:13,787 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,787 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,788 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,788 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,788 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,788 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,788 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,788 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,788 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,788 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,789 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,789 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,789 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,789 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,789 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,789 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,790 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,790 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,790 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,790 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,790 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,790 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,791 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,791 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,791 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,791 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,791 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,792 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,792 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,792 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,792 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,792 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,793 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,793 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,793 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,793 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,793 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,793 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,794 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,794 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,794 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,794 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,794 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,795 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,795 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,795 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,795 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,795 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,796 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,796 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,796 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,796 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,796 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,796 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,797 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,797 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,797 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,797 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,797 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,797 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,797 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,797 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,798 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,798 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,798 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,798 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,798 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,798 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,798 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,798 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,799 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,799 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,799 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,799 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,799 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,799 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,799 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,799 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,799 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,800 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,800 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,800 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,800 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,800 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,800 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,801 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,801 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,801 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,801 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,801 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,801 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,801 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,801 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,801 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,802 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,802 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,802 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,803 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,803 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,803 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,803 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,803 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,804 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,804 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,804 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,804 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,804 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,804 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,805 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,805 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,805 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,805 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,805 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,805 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,805 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,805 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,806 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,806 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,806 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,806 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,806 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,806 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,806 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,806 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,806 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,806 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,807 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,807 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,807 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,807 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,807 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,807 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,807 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,807 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,808 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,808 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,808 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,808 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,808 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,808 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,808 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,808 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,809 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,809 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,809 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,809 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,809 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,809 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,809 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,809 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,810 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,810 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,810 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,810 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,810 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,810 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,810 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,810 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:35:13,821 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 17:35:13,834 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 17:35:13,834 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 17:35:13,834 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 17:35:13,834 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 17:35:13,834 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 17:35:13,834 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 17:35:13,834 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 17:35:13,834 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 17:35:13,845 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 163 places, 194 transitions [2019-12-07 17:35:13,846 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 163 places, 194 transitions [2019-12-07 17:35:13,897 INFO L134 PetriNetUnfolder]: 41/191 cut-off events. [2019-12-07 17:35:13,897 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:35:13,907 INFO L76 FinitePrefix]: Finished finitePrefix Result has 201 conditions, 191 events. 41/191 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 721 event pairs. 9/157 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 17:35:13,923 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 163 places, 194 transitions [2019-12-07 17:35:13,950 INFO L134 PetriNetUnfolder]: 41/191 cut-off events. [2019-12-07 17:35:13,950 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:35:13,955 INFO L76 FinitePrefix]: Finished finitePrefix Result has 201 conditions, 191 events. 41/191 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 721 event pairs. 9/157 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 17:35:13,971 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 16696 [2019-12-07 17:35:13,971 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 17:35:17,025 WARN L192 SmtUtils]: Spent 143.00 ms on a formula simplification. DAG size of input: 89 DAG size of output: 87 [2019-12-07 17:35:17,172 INFO L206 etLargeBlockEncoding]: Checked pairs total: 66367 [2019-12-07 17:35:17,172 INFO L214 etLargeBlockEncoding]: Total number of compositions: 113 [2019-12-07 17:35:17,174 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 83 places, 92 transitions [2019-12-07 17:35:26,546 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 86132 states. [2019-12-07 17:35:26,547 INFO L276 IsEmpty]: Start isEmpty. Operand 86132 states. [2019-12-07 17:35:26,551 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-07 17:35:26,551 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:35:26,552 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-07 17:35:26,552 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:35:26,555 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:35:26,555 INFO L82 PathProgramCache]: Analyzing trace with hash 795562213, now seen corresponding path program 1 times [2019-12-07 17:35:26,561 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:35:26,561 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [180307639] [2019-12-07 17:35:26,561 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:35:26,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:35:26,696 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:35:26,697 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [180307639] [2019-12-07 17:35:26,697 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:35:26,697 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:35:26,698 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [366001455] [2019-12-07 17:35:26,700 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:35:26,701 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:35:26,709 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:35:26,710 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:35:26,711 INFO L87 Difference]: Start difference. First operand 86132 states. Second operand 3 states. [2019-12-07 17:35:27,358 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:35:27,358 INFO L93 Difference]: Finished difference Result 85012 states and 367904 transitions. [2019-12-07 17:35:27,359 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:35:27,359 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-07 17:35:27,360 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:35:27,833 INFO L225 Difference]: With dead ends: 85012 [2019-12-07 17:35:27,833 INFO L226 Difference]: Without dead ends: 80140 [2019-12-07 17:35:27,834 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:35:30,680 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80140 states. [2019-12-07 17:35:31,881 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80140 to 80140. [2019-12-07 17:35:31,882 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80140 states. [2019-12-07 17:35:32,304 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80140 states to 80140 states and 346330 transitions. [2019-12-07 17:35:32,305 INFO L78 Accepts]: Start accepts. Automaton has 80140 states and 346330 transitions. Word has length 5 [2019-12-07 17:35:32,305 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:35:32,306 INFO L462 AbstractCegarLoop]: Abstraction has 80140 states and 346330 transitions. [2019-12-07 17:35:32,306 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:35:32,306 INFO L276 IsEmpty]: Start isEmpty. Operand 80140 states and 346330 transitions. [2019-12-07 17:35:32,312 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 17:35:32,312 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:35:32,312 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:35:32,312 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:35:32,313 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:35:32,313 INFO L82 PathProgramCache]: Analyzing trace with hash -36571135, now seen corresponding path program 1 times [2019-12-07 17:35:32,313 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:35:32,313 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [738537195] [2019-12-07 17:35:32,313 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:35:32,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:35:32,372 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:35:32,373 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [738537195] [2019-12-07 17:35:32,373 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:35:32,373 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:35:32,373 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [149024134] [2019-12-07 17:35:32,374 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:35:32,374 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:35:32,374 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:35:32,375 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:35:32,375 INFO L87 Difference]: Start difference. First operand 80140 states and 346330 transitions. Second operand 4 states. [2019-12-07 17:35:33,081 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:35:33,081 INFO L93 Difference]: Finished difference Result 123388 states and 510822 transitions. [2019-12-07 17:35:33,082 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:35:33,082 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 17:35:33,082 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:35:33,422 INFO L225 Difference]: With dead ends: 123388 [2019-12-07 17:35:33,422 INFO L226 Difference]: Without dead ends: 123290 [2019-12-07 17:35:33,423 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:35:38,345 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123290 states. [2019-12-07 17:35:39,950 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123290 to 114218. [2019-12-07 17:35:39,950 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114218 states. [2019-12-07 17:35:40,265 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114218 states to 114218 states and 477794 transitions. [2019-12-07 17:35:40,265 INFO L78 Accepts]: Start accepts. Automaton has 114218 states and 477794 transitions. Word has length 13 [2019-12-07 17:35:40,266 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:35:40,266 INFO L462 AbstractCegarLoop]: Abstraction has 114218 states and 477794 transitions. [2019-12-07 17:35:40,266 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:35:40,266 INFO L276 IsEmpty]: Start isEmpty. Operand 114218 states and 477794 transitions. [2019-12-07 17:35:40,268 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 17:35:40,268 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:35:40,268 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:35:40,269 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:35:40,269 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:35:40,269 INFO L82 PathProgramCache]: Analyzing trace with hash 424299118, now seen corresponding path program 1 times [2019-12-07 17:35:40,269 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:35:40,269 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2090869512] [2019-12-07 17:35:40,269 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:35:40,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:35:40,316 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:35:40,316 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2090869512] [2019-12-07 17:35:40,317 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:35:40,317 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:35:40,317 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1788043150] [2019-12-07 17:35:40,317 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:35:40,317 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:35:40,317 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:35:40,318 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:35:40,318 INFO L87 Difference]: Start difference. First operand 114218 states and 477794 transitions. Second operand 4 states. [2019-12-07 17:35:41,382 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:35:41,382 INFO L93 Difference]: Finished difference Result 159677 states and 652290 transitions. [2019-12-07 17:35:41,383 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:35:41,383 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 17:35:41,383 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:35:41,790 INFO L225 Difference]: With dead ends: 159677 [2019-12-07 17:35:41,790 INFO L226 Difference]: Without dead ends: 159565 [2019-12-07 17:35:41,790 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:35:45,750 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159565 states. [2019-12-07 17:35:47,595 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159565 to 136035. [2019-12-07 17:35:47,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136035 states. [2019-12-07 17:35:50,454 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136035 states to 136035 states and 564894 transitions. [2019-12-07 17:35:50,454 INFO L78 Accepts]: Start accepts. Automaton has 136035 states and 564894 transitions. Word has length 13 [2019-12-07 17:35:50,455 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:35:50,455 INFO L462 AbstractCegarLoop]: Abstraction has 136035 states and 564894 transitions. [2019-12-07 17:35:50,455 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:35:50,455 INFO L276 IsEmpty]: Start isEmpty. Operand 136035 states and 564894 transitions. [2019-12-07 17:35:50,457 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 17:35:50,458 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:35:50,458 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:35:50,458 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:35:50,458 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:35:50,458 INFO L82 PathProgramCache]: Analyzing trace with hash -2100241523, now seen corresponding path program 1 times [2019-12-07 17:35:50,458 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:35:50,458 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2011362595] [2019-12-07 17:35:50,458 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:35:50,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:35:50,484 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:35:50,484 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2011362595] [2019-12-07 17:35:50,485 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:35:50,485 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:35:50,485 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [503465523] [2019-12-07 17:35:50,485 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:35:50,485 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:35:50,485 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:35:50,486 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:35:50,486 INFO L87 Difference]: Start difference. First operand 136035 states and 564894 transitions. Second operand 3 states. [2019-12-07 17:35:51,276 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:35:51,276 INFO L93 Difference]: Finished difference Result 181618 states and 742473 transitions. [2019-12-07 17:35:51,276 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:35:51,277 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 14 [2019-12-07 17:35:51,277 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:35:51,739 INFO L225 Difference]: With dead ends: 181618 [2019-12-07 17:35:51,739 INFO L226 Difference]: Without dead ends: 181618 [2019-12-07 17:35:51,739 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:35:55,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181618 states. [2019-12-07 17:35:57,903 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181618 to 152081. [2019-12-07 17:35:57,903 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152081 states. [2019-12-07 17:35:58,770 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152081 states to 152081 states and 628919 transitions. [2019-12-07 17:35:58,771 INFO L78 Accepts]: Start accepts. Automaton has 152081 states and 628919 transitions. Word has length 14 [2019-12-07 17:35:58,771 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:35:58,771 INFO L462 AbstractCegarLoop]: Abstraction has 152081 states and 628919 transitions. [2019-12-07 17:35:58,771 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:35:58,771 INFO L276 IsEmpty]: Start isEmpty. Operand 152081 states and 628919 transitions. [2019-12-07 17:35:58,775 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 17:35:58,775 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:35:58,775 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:35:58,775 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:35:58,775 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:35:58,775 INFO L82 PathProgramCache]: Analyzing trace with hash -2100376187, now seen corresponding path program 1 times [2019-12-07 17:35:58,775 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:35:58,775 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1669919715] [2019-12-07 17:35:58,775 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:35:58,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:35:58,817 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:35:58,818 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1669919715] [2019-12-07 17:35:58,818 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:35:58,818 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:35:58,818 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [717161508] [2019-12-07 17:35:58,818 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:35:58,819 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:35:58,819 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:35:58,819 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:35:58,819 INFO L87 Difference]: Start difference. First operand 152081 states and 628919 transitions. Second operand 4 states. [2019-12-07 17:35:59,688 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:35:59,688 INFO L93 Difference]: Finished difference Result 179622 states and 732719 transitions. [2019-12-07 17:35:59,689 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:35:59,689 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-12-07 17:35:59,689 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:00,145 INFO L225 Difference]: With dead ends: 179622 [2019-12-07 17:36:00,146 INFO L226 Difference]: Without dead ends: 179542 [2019-12-07 17:36:00,146 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:36:04,038 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179542 states. [2019-12-07 17:36:08,321 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179542 to 157787. [2019-12-07 17:36:08,322 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157787 states. [2019-12-07 17:36:08,783 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157787 states to 157787 states and 651479 transitions. [2019-12-07 17:36:08,783 INFO L78 Accepts]: Start accepts. Automaton has 157787 states and 651479 transitions. Word has length 14 [2019-12-07 17:36:08,783 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:08,783 INFO L462 AbstractCegarLoop]: Abstraction has 157787 states and 651479 transitions. [2019-12-07 17:36:08,783 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:36:08,783 INFO L276 IsEmpty]: Start isEmpty. Operand 157787 states and 651479 transitions. [2019-12-07 17:36:08,786 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 17:36:08,786 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:08,786 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:08,786 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:08,786 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:08,786 INFO L82 PathProgramCache]: Analyzing trace with hash -1940234062, now seen corresponding path program 1 times [2019-12-07 17:36:08,786 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:08,786 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1171879169] [2019-12-07 17:36:08,786 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:08,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:08,827 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:36:08,827 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1171879169] [2019-12-07 17:36:08,827 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:08,827 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:36:08,827 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1316024952] [2019-12-07 17:36:08,828 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:36:08,828 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:08,828 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:36:08,828 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:36:08,828 INFO L87 Difference]: Start difference. First operand 157787 states and 651479 transitions. Second operand 4 states. [2019-12-07 17:36:10,212 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:10,212 INFO L93 Difference]: Finished difference Result 189091 states and 772001 transitions. [2019-12-07 17:36:10,212 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:36:10,212 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-12-07 17:36:10,213 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:10,702 INFO L225 Difference]: With dead ends: 189091 [2019-12-07 17:36:10,702 INFO L226 Difference]: Without dead ends: 188995 [2019-12-07 17:36:10,702 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:36:14,751 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188995 states. [2019-12-07 17:36:17,359 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188995 to 161868. [2019-12-07 17:36:17,359 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161868 states. [2019-12-07 17:36:17,835 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161868 states to 161868 states and 668265 transitions. [2019-12-07 17:36:17,836 INFO L78 Accepts]: Start accepts. Automaton has 161868 states and 668265 transitions. Word has length 14 [2019-12-07 17:36:17,836 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:17,836 INFO L462 AbstractCegarLoop]: Abstraction has 161868 states and 668265 transitions. [2019-12-07 17:36:17,836 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:36:17,836 INFO L276 IsEmpty]: Start isEmpty. Operand 161868 states and 668265 transitions. [2019-12-07 17:36:17,848 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 17:36:17,848 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:17,848 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:17,848 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:17,849 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:17,849 INFO L82 PathProgramCache]: Analyzing trace with hash -1828891691, now seen corresponding path program 1 times [2019-12-07 17:36:17,849 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:17,849 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1277662302] [2019-12-07 17:36:17,849 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:17,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:17,894 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:36:17,894 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1277662302] [2019-12-07 17:36:17,894 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:17,895 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:36:17,895 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [580780614] [2019-12-07 17:36:17,895 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:36:17,895 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:17,895 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:36:17,895 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:17,895 INFO L87 Difference]: Start difference. First operand 161868 states and 668265 transitions. Second operand 3 states. [2019-12-07 17:36:19,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:19,291 INFO L93 Difference]: Finished difference Result 305174 states and 1252705 transitions. [2019-12-07 17:36:19,291 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:36:19,292 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 17:36:19,292 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:22,648 INFO L225 Difference]: With dead ends: 305174 [2019-12-07 17:36:22,648 INFO L226 Difference]: Without dead ends: 292686 [2019-12-07 17:36:22,649 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:27,910 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 292686 states. [2019-12-07 17:36:32,319 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 292686 to 281033. [2019-12-07 17:36:32,319 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 281033 states. [2019-12-07 17:36:33,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 281033 states to 281033 states and 1162981 transitions. [2019-12-07 17:36:33,535 INFO L78 Accepts]: Start accepts. Automaton has 281033 states and 1162981 transitions. Word has length 18 [2019-12-07 17:36:33,535 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:33,535 INFO L462 AbstractCegarLoop]: Abstraction has 281033 states and 1162981 transitions. [2019-12-07 17:36:33,535 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:36:33,535 INFO L276 IsEmpty]: Start isEmpty. Operand 281033 states and 1162981 transitions. [2019-12-07 17:36:33,559 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 17:36:33,559 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:33,559 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:33,559 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:33,559 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:33,559 INFO L82 PathProgramCache]: Analyzing trace with hash -1446438801, now seen corresponding path program 1 times [2019-12-07 17:36:33,559 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:33,560 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [910604878] [2019-12-07 17:36:33,560 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:33,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:33,595 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:36:33,596 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [910604878] [2019-12-07 17:36:33,596 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:33,596 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:36:33,596 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [317492340] [2019-12-07 17:36:33,596 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:36:33,596 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:33,596 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:36:33,597 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:33,597 INFO L87 Difference]: Start difference. First operand 281033 states and 1162981 transitions. Second operand 3 states. [2019-12-07 17:36:34,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:34,832 INFO L93 Difference]: Finished difference Result 280142 states and 1159315 transitions. [2019-12-07 17:36:34,832 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:36:34,832 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 17:36:34,833 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:36,126 INFO L225 Difference]: With dead ends: 280142 [2019-12-07 17:36:36,126 INFO L226 Difference]: Without dead ends: 278870 [2019-12-07 17:36:36,127 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:44,511 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 278870 states. [2019-12-07 17:36:48,314 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 278870 to 271852. [2019-12-07 17:36:48,314 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 271852 states. [2019-12-07 17:36:49,090 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 271852 states to 271852 states and 1126060 transitions. [2019-12-07 17:36:49,090 INFO L78 Accepts]: Start accepts. Automaton has 271852 states and 1126060 transitions. Word has length 19 [2019-12-07 17:36:49,090 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:49,090 INFO L462 AbstractCegarLoop]: Abstraction has 271852 states and 1126060 transitions. [2019-12-07 17:36:49,090 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:36:49,090 INFO L276 IsEmpty]: Start isEmpty. Operand 271852 states and 1126060 transitions. [2019-12-07 17:36:49,114 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 17:36:49,114 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:49,114 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:49,114 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:49,114 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:49,114 INFO L82 PathProgramCache]: Analyzing trace with hash 550104482, now seen corresponding path program 1 times [2019-12-07 17:36:49,114 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:49,115 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1505370615] [2019-12-07 17:36:49,115 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:49,124 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:49,152 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:36:49,152 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1505370615] [2019-12-07 17:36:49,152 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:49,152 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:36:49,152 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [304158820] [2019-12-07 17:36:49,153 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:36:49,153 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:49,153 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:36:49,153 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:36:49,153 INFO L87 Difference]: Start difference. First operand 271852 states and 1126060 transitions. Second operand 4 states. [2019-12-07 17:36:49,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:49,423 INFO L93 Difference]: Finished difference Result 74556 states and 258524 transitions. [2019-12-07 17:36:49,424 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:36:49,424 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2019-12-07 17:36:49,424 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:49,525 INFO L225 Difference]: With dead ends: 74556 [2019-12-07 17:36:49,525 INFO L226 Difference]: Without dead ends: 56160 [2019-12-07 17:36:49,525 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:36:49,743 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56160 states. [2019-12-07 17:36:50,689 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56160 to 55708. [2019-12-07 17:36:50,689 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55708 states. [2019-12-07 17:36:50,798 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55708 states to 55708 states and 184200 transitions. [2019-12-07 17:36:50,798 INFO L78 Accepts]: Start accepts. Automaton has 55708 states and 184200 transitions. Word has length 19 [2019-12-07 17:36:50,798 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:50,798 INFO L462 AbstractCegarLoop]: Abstraction has 55708 states and 184200 transitions. [2019-12-07 17:36:50,798 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:36:50,799 INFO L276 IsEmpty]: Start isEmpty. Operand 55708 states and 184200 transitions. [2019-12-07 17:36:50,808 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 17:36:50,808 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:50,808 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:50,808 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:50,808 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:50,808 INFO L82 PathProgramCache]: Analyzing trace with hash -70181007, now seen corresponding path program 1 times [2019-12-07 17:36:50,808 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:50,809 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1878297945] [2019-12-07 17:36:50,809 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:50,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:50,841 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:36:50,841 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1878297945] [2019-12-07 17:36:50,841 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:50,841 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:36:50,842 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [720781134] [2019-12-07 17:36:50,842 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:36:50,842 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:50,842 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:36:50,842 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:36:50,842 INFO L87 Difference]: Start difference. First operand 55708 states and 184200 transitions. Second operand 5 states. [2019-12-07 17:36:51,308 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:51,308 INFO L93 Difference]: Finished difference Result 70805 states and 229884 transitions. [2019-12-07 17:36:51,308 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:36:51,308 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 17:36:51,309 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:51,421 INFO L225 Difference]: With dead ends: 70805 [2019-12-07 17:36:51,421 INFO L226 Difference]: Without dead ends: 70545 [2019-12-07 17:36:51,421 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:36:51,672 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70545 states. [2019-12-07 17:36:52,355 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70545 to 56578. [2019-12-07 17:36:52,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56578 states. [2019-12-07 17:36:52,465 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56578 states to 56578 states and 186691 transitions. [2019-12-07 17:36:52,465 INFO L78 Accepts]: Start accepts. Automaton has 56578 states and 186691 transitions. Word has length 22 [2019-12-07 17:36:52,465 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:52,465 INFO L462 AbstractCegarLoop]: Abstraction has 56578 states and 186691 transitions. [2019-12-07 17:36:52,465 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:36:52,465 INFO L276 IsEmpty]: Start isEmpty. Operand 56578 states and 186691 transitions. [2019-12-07 17:36:52,475 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 17:36:52,475 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:52,475 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:52,475 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:52,475 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:52,475 INFO L82 PathProgramCache]: Analyzing trace with hash -633645132, now seen corresponding path program 1 times [2019-12-07 17:36:52,475 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:52,476 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [874010326] [2019-12-07 17:36:52,476 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:52,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:52,518 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:36:52,518 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [874010326] [2019-12-07 17:36:52,518 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:52,518 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:36:52,518 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1635001045] [2019-12-07 17:36:52,519 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:36:52,519 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:52,519 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:36:52,519 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:36:52,519 INFO L87 Difference]: Start difference. First operand 56578 states and 186691 transitions. Second operand 5 states. [2019-12-07 17:36:52,797 WARN L192 SmtUtils]: Spent 251.00 ms on a formula simplification that was a NOOP. DAG size: 7 [2019-12-07 17:36:53,259 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:53,259 INFO L93 Difference]: Finished difference Result 72907 states and 235905 transitions. [2019-12-07 17:36:53,260 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:36:53,260 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 17:36:53,260 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:53,380 INFO L225 Difference]: With dead ends: 72907 [2019-12-07 17:36:53,380 INFO L226 Difference]: Without dead ends: 72541 [2019-12-07 17:36:53,380 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:36:53,638 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72541 states. [2019-12-07 17:36:54,309 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72541 to 55080. [2019-12-07 17:36:54,309 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55080 states. [2019-12-07 17:36:54,416 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55080 states to 55080 states and 181420 transitions. [2019-12-07 17:36:54,416 INFO L78 Accepts]: Start accepts. Automaton has 55080 states and 181420 transitions. Word has length 22 [2019-12-07 17:36:54,416 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:54,416 INFO L462 AbstractCegarLoop]: Abstraction has 55080 states and 181420 transitions. [2019-12-07 17:36:54,417 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:36:54,417 INFO L276 IsEmpty]: Start isEmpty. Operand 55080 states and 181420 transitions. [2019-12-07 17:36:54,433 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 17:36:54,433 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:54,433 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:54,433 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:54,433 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:54,433 INFO L82 PathProgramCache]: Analyzing trace with hash 400071569, now seen corresponding path program 1 times [2019-12-07 17:36:54,433 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:54,434 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [949710909] [2019-12-07 17:36:54,434 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:54,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:54,487 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:36:54,488 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [949710909] [2019-12-07 17:36:54,488 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:54,488 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:36:54,488 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [984299247] [2019-12-07 17:36:54,488 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:36:54,489 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:54,489 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:36:54,489 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:36:54,489 INFO L87 Difference]: Start difference. First operand 55080 states and 181420 transitions. Second operand 5 states. [2019-12-07 17:36:54,916 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:54,916 INFO L93 Difference]: Finished difference Result 74597 states and 240330 transitions. [2019-12-07 17:36:54,917 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 17:36:54,917 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 17:36:54,917 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:55,031 INFO L225 Difference]: With dead ends: 74597 [2019-12-07 17:36:55,031 INFO L226 Difference]: Without dead ends: 74569 [2019-12-07 17:36:55,031 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:36:55,295 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74569 states. [2019-12-07 17:36:56,082 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74569 to 62256. [2019-12-07 17:36:56,082 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 62256 states. [2019-12-07 17:36:56,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62256 states to 62256 states and 203471 transitions. [2019-12-07 17:36:56,195 INFO L78 Accepts]: Start accepts. Automaton has 62256 states and 203471 transitions. Word has length 25 [2019-12-07 17:36:56,195 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:56,195 INFO L462 AbstractCegarLoop]: Abstraction has 62256 states and 203471 transitions. [2019-12-07 17:36:56,195 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:36:56,195 INFO L276 IsEmpty]: Start isEmpty. Operand 62256 states and 203471 transitions. [2019-12-07 17:36:56,216 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 17:36:56,216 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:56,216 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:56,216 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:56,217 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:56,217 INFO L82 PathProgramCache]: Analyzing trace with hash -819070516, now seen corresponding path program 1 times [2019-12-07 17:36:56,217 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:56,217 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1508435093] [2019-12-07 17:36:56,217 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:56,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:56,250 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:36:56,250 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1508435093] [2019-12-07 17:36:56,250 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:56,250 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:36:56,250 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [360263103] [2019-12-07 17:36:56,251 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:36:56,251 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:56,251 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:36:56,251 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:36:56,251 INFO L87 Difference]: Start difference. First operand 62256 states and 203471 transitions. Second operand 5 states. [2019-12-07 17:36:56,597 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:56,597 INFO L93 Difference]: Finished difference Result 72191 states and 233979 transitions. [2019-12-07 17:36:56,597 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 17:36:56,598 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 17:36:56,598 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:56,704 INFO L225 Difference]: With dead ends: 72191 [2019-12-07 17:36:56,704 INFO L226 Difference]: Without dead ends: 72056 [2019-12-07 17:36:56,705 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:36:56,962 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72056 states. [2019-12-07 17:36:57,799 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72056 to 63648. [2019-12-07 17:36:57,800 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63648 states. [2019-12-07 17:36:57,917 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63648 states to 63648 states and 207703 transitions. [2019-12-07 17:36:57,918 INFO L78 Accepts]: Start accepts. Automaton has 63648 states and 207703 transitions. Word has length 28 [2019-12-07 17:36:57,918 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:57,918 INFO L462 AbstractCegarLoop]: Abstraction has 63648 states and 207703 transitions. [2019-12-07 17:36:57,918 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:36:57,918 INFO L276 IsEmpty]: Start isEmpty. Operand 63648 states and 207703 transitions. [2019-12-07 17:36:57,936 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 17:36:57,937 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:57,937 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:57,937 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:57,937 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:57,937 INFO L82 PathProgramCache]: Analyzing trace with hash 377940687, now seen corresponding path program 1 times [2019-12-07 17:36:57,937 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:57,937 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [842020762] [2019-12-07 17:36:57,937 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:57,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:57,958 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:36:57,958 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [842020762] [2019-12-07 17:36:57,958 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:57,958 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:36:57,959 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [196921602] [2019-12-07 17:36:57,959 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:36:57,959 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:57,959 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:36:57,959 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:57,960 INFO L87 Difference]: Start difference. First operand 63648 states and 207703 transitions. Second operand 3 states. [2019-12-07 17:36:58,201 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:58,201 INFO L93 Difference]: Finished difference Result 76728 states and 246500 transitions. [2019-12-07 17:36:58,202 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:36:58,202 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 28 [2019-12-07 17:36:58,202 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:36:58,318 INFO L225 Difference]: With dead ends: 76728 [2019-12-07 17:36:58,318 INFO L226 Difference]: Without dead ends: 76728 [2019-12-07 17:36:58,318 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:36:58,586 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76728 states. [2019-12-07 17:36:59,329 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76728 to 67019. [2019-12-07 17:36:59,329 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 67019 states. [2019-12-07 17:36:59,456 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67019 states to 67019 states and 214649 transitions. [2019-12-07 17:36:59,456 INFO L78 Accepts]: Start accepts. Automaton has 67019 states and 214649 transitions. Word has length 28 [2019-12-07 17:36:59,457 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:36:59,457 INFO L462 AbstractCegarLoop]: Abstraction has 67019 states and 214649 transitions. [2019-12-07 17:36:59,457 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:36:59,457 INFO L276 IsEmpty]: Start isEmpty. Operand 67019 states and 214649 transitions. [2019-12-07 17:36:59,479 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 17:36:59,480 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:36:59,480 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:36:59,480 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:36:59,480 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:36:59,480 INFO L82 PathProgramCache]: Analyzing trace with hash -589973380, now seen corresponding path program 1 times [2019-12-07 17:36:59,480 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:36:59,480 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [215537404] [2019-12-07 17:36:59,480 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:36:59,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:36:59,513 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:36:59,513 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [215537404] [2019-12-07 17:36:59,513 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:36:59,513 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:36:59,514 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [883679081] [2019-12-07 17:36:59,514 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:36:59,514 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:36:59,514 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:36:59,514 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:36:59,514 INFO L87 Difference]: Start difference. First operand 67019 states and 214649 transitions. Second operand 5 states. [2019-12-07 17:36:59,900 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:36:59,900 INFO L93 Difference]: Finished difference Result 77416 states and 246138 transitions. [2019-12-07 17:36:59,901 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 17:36:59,901 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2019-12-07 17:36:59,901 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:37:00,121 INFO L225 Difference]: With dead ends: 77416 [2019-12-07 17:37:00,121 INFO L226 Difference]: Without dead ends: 77280 [2019-12-07 17:37:00,122 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:37:00,379 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77280 states. [2019-12-07 17:37:01,041 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77280 to 66645. [2019-12-07 17:37:01,041 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66645 states. [2019-12-07 17:37:01,164 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66645 states to 66645 states and 213380 transitions. [2019-12-07 17:37:01,165 INFO L78 Accepts]: Start accepts. Automaton has 66645 states and 213380 transitions. Word has length 29 [2019-12-07 17:37:01,165 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:37:01,165 INFO L462 AbstractCegarLoop]: Abstraction has 66645 states and 213380 transitions. [2019-12-07 17:37:01,165 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:37:01,165 INFO L276 IsEmpty]: Start isEmpty. Operand 66645 states and 213380 transitions. [2019-12-07 17:37:01,201 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 17:37:01,201 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:37:01,201 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:37:01,201 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:37:01,201 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:37:01,201 INFO L82 PathProgramCache]: Analyzing trace with hash 494288016, now seen corresponding path program 1 times [2019-12-07 17:37:01,201 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:37:01,201 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1702587259] [2019-12-07 17:37:01,201 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:37:01,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:37:01,242 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:37:01,243 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1702587259] [2019-12-07 17:37:01,243 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:37:01,243 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:37:01,243 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1854385842] [2019-12-07 17:37:01,244 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:37:01,244 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:37:01,244 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:37:01,244 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:37:01,244 INFO L87 Difference]: Start difference. First operand 66645 states and 213380 transitions. Second operand 5 states. [2019-12-07 17:37:01,800 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:37:01,800 INFO L93 Difference]: Finished difference Result 96497 states and 305016 transitions. [2019-12-07 17:37:01,800 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 17:37:01,801 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 30 [2019-12-07 17:37:01,801 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:37:01,942 INFO L225 Difference]: With dead ends: 96497 [2019-12-07 17:37:01,942 INFO L226 Difference]: Without dead ends: 96497 [2019-12-07 17:37:01,943 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:37:02,258 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96497 states. [2019-12-07 17:37:03,211 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96497 to 76428. [2019-12-07 17:37:03,211 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76428 states. [2019-12-07 17:37:03,359 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76428 states to 76428 states and 244392 transitions. [2019-12-07 17:37:03,359 INFO L78 Accepts]: Start accepts. Automaton has 76428 states and 244392 transitions. Word has length 30 [2019-12-07 17:37:03,359 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:37:03,359 INFO L462 AbstractCegarLoop]: Abstraction has 76428 states and 244392 transitions. [2019-12-07 17:37:03,359 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:37:03,359 INFO L276 IsEmpty]: Start isEmpty. Operand 76428 states and 244392 transitions. [2019-12-07 17:37:03,394 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 17:37:03,394 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:37:03,394 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:37:03,395 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:37:03,395 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:37:03,395 INFO L82 PathProgramCache]: Analyzing trace with hash -181982307, now seen corresponding path program 1 times [2019-12-07 17:37:03,395 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:37:03,395 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1901465465] [2019-12-07 17:37:03,395 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:37:03,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:37:03,421 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:37:03,422 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1901465465] [2019-12-07 17:37:03,422 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:37:03,422 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:37:03,422 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2118816536] [2019-12-07 17:37:03,422 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:37:03,422 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:37:03,422 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:37:03,423 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:37:03,423 INFO L87 Difference]: Start difference. First operand 76428 states and 244392 transitions. Second operand 3 states. [2019-12-07 17:37:03,640 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:37:03,640 INFO L93 Difference]: Finished difference Result 73374 states and 232220 transitions. [2019-12-07 17:37:03,640 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:37:03,640 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 30 [2019-12-07 17:37:03,640 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:37:03,752 INFO L225 Difference]: With dead ends: 73374 [2019-12-07 17:37:03,753 INFO L226 Difference]: Without dead ends: 73374 [2019-12-07 17:37:03,753 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:37:04,002 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73374 states. [2019-12-07 17:37:04,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73374 to 68658. [2019-12-07 17:37:04,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68658 states. [2019-12-07 17:37:05,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68658 states to 68658 states and 217763 transitions. [2019-12-07 17:37:05,024 INFO L78 Accepts]: Start accepts. Automaton has 68658 states and 217763 transitions. Word has length 30 [2019-12-07 17:37:05,024 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:37:05,025 INFO L462 AbstractCegarLoop]: Abstraction has 68658 states and 217763 transitions. [2019-12-07 17:37:05,025 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:37:05,025 INFO L276 IsEmpty]: Start isEmpty. Operand 68658 states and 217763 transitions. [2019-12-07 17:37:05,055 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 17:37:05,055 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:37:05,055 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:37:05,056 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:37:05,056 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:37:05,056 INFO L82 PathProgramCache]: Analyzing trace with hash 253100472, now seen corresponding path program 1 times [2019-12-07 17:37:05,056 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:37:05,056 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [816961244] [2019-12-07 17:37:05,056 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:37:05,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:37:05,103 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:37:05,103 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [816961244] [2019-12-07 17:37:05,104 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:37:05,104 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:37:05,104 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [761817130] [2019-12-07 17:37:05,104 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:37:05,104 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:37:05,104 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:37:05,105 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:37:05,105 INFO L87 Difference]: Start difference. First operand 68658 states and 217763 transitions. Second operand 5 states. [2019-12-07 17:37:05,459 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:37:05,459 INFO L93 Difference]: Finished difference Result 120004 states and 382226 transitions. [2019-12-07 17:37:05,459 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:37:05,459 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 31 [2019-12-07 17:37:05,459 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:37:05,550 INFO L225 Difference]: With dead ends: 120004 [2019-12-07 17:37:05,550 INFO L226 Difference]: Without dead ends: 59892 [2019-12-07 17:37:05,550 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:37:05,768 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59892 states. [2019-12-07 17:37:06,349 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59892 to 59023. [2019-12-07 17:37:06,349 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59023 states. [2019-12-07 17:37:06,456 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59023 states to 59023 states and 188045 transitions. [2019-12-07 17:37:06,456 INFO L78 Accepts]: Start accepts. Automaton has 59023 states and 188045 transitions. Word has length 31 [2019-12-07 17:37:06,456 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:37:06,456 INFO L462 AbstractCegarLoop]: Abstraction has 59023 states and 188045 transitions. [2019-12-07 17:37:06,456 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:37:06,456 INFO L276 IsEmpty]: Start isEmpty. Operand 59023 states and 188045 transitions. [2019-12-07 17:37:06,485 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 17:37:06,486 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:37:06,486 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:37:06,486 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:37:06,486 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:37:06,486 INFO L82 PathProgramCache]: Analyzing trace with hash -1151300207, now seen corresponding path program 1 times [2019-12-07 17:37:06,486 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:37:06,486 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1920652520] [2019-12-07 17:37:06,486 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:37:06,495 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:37:06,527 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:37:06,527 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1920652520] [2019-12-07 17:37:06,528 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:37:06,528 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:37:06,528 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1184991671] [2019-12-07 17:37:06,528 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:37:06,528 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:37:06,528 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:37:06,528 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:37:06,528 INFO L87 Difference]: Start difference. First operand 59023 states and 188045 transitions. Second operand 5 states. [2019-12-07 17:37:06,626 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:37:06,626 INFO L93 Difference]: Finished difference Result 26619 states and 81008 transitions. [2019-12-07 17:37:06,626 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:37:06,627 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 31 [2019-12-07 17:37:06,627 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:37:06,652 INFO L225 Difference]: With dead ends: 26619 [2019-12-07 17:37:06,652 INFO L226 Difference]: Without dead ends: 23042 [2019-12-07 17:37:06,652 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:37:06,720 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23042 states. [2019-12-07 17:37:06,917 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23042 to 22626. [2019-12-07 17:37:06,917 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22626 states. [2019-12-07 17:37:06,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22626 states to 22626 states and 68624 transitions. [2019-12-07 17:37:06,954 INFO L78 Accepts]: Start accepts. Automaton has 22626 states and 68624 transitions. Word has length 31 [2019-12-07 17:37:06,954 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:37:06,954 INFO L462 AbstractCegarLoop]: Abstraction has 22626 states and 68624 transitions. [2019-12-07 17:37:06,954 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:37:06,954 INFO L276 IsEmpty]: Start isEmpty. Operand 22626 states and 68624 transitions. [2019-12-07 17:37:06,975 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 17:37:06,975 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:37:06,975 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:37:06,975 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:37:06,975 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:37:06,976 INFO L82 PathProgramCache]: Analyzing trace with hash -134226549, now seen corresponding path program 1 times [2019-12-07 17:37:06,976 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:37:06,976 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1051446407] [2019-12-07 17:37:06,976 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:37:06,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:37:07,028 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:37:07,029 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1051446407] [2019-12-07 17:37:07,029 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:37:07,029 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:37:07,029 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [866515590] [2019-12-07 17:37:07,029 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:37:07,029 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:37:07,029 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:37:07,030 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:37:07,030 INFO L87 Difference]: Start difference. First operand 22626 states and 68624 transitions. Second operand 6 states. [2019-12-07 17:37:07,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:37:07,442 INFO L93 Difference]: Finished difference Result 26646 states and 79266 transitions. [2019-12-07 17:37:07,442 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 17:37:07,442 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 40 [2019-12-07 17:37:07,442 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:37:07,468 INFO L225 Difference]: With dead ends: 26646 [2019-12-07 17:37:07,468 INFO L226 Difference]: Without dead ends: 26459 [2019-12-07 17:37:07,468 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=47, Invalid=109, Unknown=0, NotChecked=0, Total=156 [2019-12-07 17:37:07,541 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26459 states. [2019-12-07 17:37:07,742 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26459 to 22569. [2019-12-07 17:37:07,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22569 states. [2019-12-07 17:37:07,777 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22569 states to 22569 states and 68489 transitions. [2019-12-07 17:37:07,778 INFO L78 Accepts]: Start accepts. Automaton has 22569 states and 68489 transitions. Word has length 40 [2019-12-07 17:37:07,778 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:37:07,778 INFO L462 AbstractCegarLoop]: Abstraction has 22569 states and 68489 transitions. [2019-12-07 17:37:07,778 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:37:07,778 INFO L276 IsEmpty]: Start isEmpty. Operand 22569 states and 68489 transitions. [2019-12-07 17:37:07,798 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 17:37:07,798 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:37:07,798 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:37:07,798 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:37:07,798 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:37:07,799 INFO L82 PathProgramCache]: Analyzing trace with hash -1136448647, now seen corresponding path program 1 times [2019-12-07 17:37:07,799 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:37:07,799 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [350852730] [2019-12-07 17:37:07,799 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:37:07,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:37:07,841 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:37:07,841 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [350852730] [2019-12-07 17:37:07,841 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:37:07,841 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:37:07,841 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1315137308] [2019-12-07 17:37:07,841 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:37:07,841 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:37:07,842 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:37:07,842 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:37:07,842 INFO L87 Difference]: Start difference. First operand 22569 states and 68489 transitions. Second operand 6 states. [2019-12-07 17:37:08,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:37:08,220 INFO L93 Difference]: Finished difference Result 26307 states and 78473 transitions. [2019-12-07 17:37:08,221 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 17:37:08,221 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 41 [2019-12-07 17:37:08,221 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:37:08,251 INFO L225 Difference]: With dead ends: 26307 [2019-12-07 17:37:08,251 INFO L226 Difference]: Without dead ends: 26036 [2019-12-07 17:37:08,252 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=47, Invalid=109, Unknown=0, NotChecked=0, Total=156 [2019-12-07 17:37:08,326 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26036 states. [2019-12-07 17:37:08,540 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26036 to 21904. [2019-12-07 17:37:08,540 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21904 states. [2019-12-07 17:37:08,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21904 states to 21904 states and 66880 transitions. [2019-12-07 17:37:08,575 INFO L78 Accepts]: Start accepts. Automaton has 21904 states and 66880 transitions. Word has length 41 [2019-12-07 17:37:08,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:37:08,576 INFO L462 AbstractCegarLoop]: Abstraction has 21904 states and 66880 transitions. [2019-12-07 17:37:08,576 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:37:08,576 INFO L276 IsEmpty]: Start isEmpty. Operand 21904 states and 66880 transitions. [2019-12-07 17:37:08,595 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 17:37:08,595 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:37:08,595 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:37:08,595 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:37:08,595 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:37:08,595 INFO L82 PathProgramCache]: Analyzing trace with hash 1425122982, now seen corresponding path program 1 times [2019-12-07 17:37:08,596 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:37:08,596 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [36269425] [2019-12-07 17:37:08,596 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:37:08,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:37:08,651 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:37:08,651 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [36269425] [2019-12-07 17:37:08,651 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:37:08,651 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:37:08,651 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [308098163] [2019-12-07 17:37:08,652 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:37:08,652 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:37:08,652 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:37:08,652 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:37:08,652 INFO L87 Difference]: Start difference. First operand 21904 states and 66880 transitions. Second operand 6 states. [2019-12-07 17:37:08,744 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:37:08,744 INFO L93 Difference]: Finished difference Result 20231 states and 62960 transitions. [2019-12-07 17:37:08,744 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:37:08,744 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 41 [2019-12-07 17:37:08,744 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:37:08,766 INFO L225 Difference]: With dead ends: 20231 [2019-12-07 17:37:08,766 INFO L226 Difference]: Without dead ends: 19892 [2019-12-07 17:37:08,767 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:37:08,828 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19892 states. [2019-12-07 17:37:08,966 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19892 to 12304. [2019-12-07 17:37:08,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12304 states. [2019-12-07 17:37:08,986 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12304 states to 12304 states and 38215 transitions. [2019-12-07 17:37:08,986 INFO L78 Accepts]: Start accepts. Automaton has 12304 states and 38215 transitions. Word has length 41 [2019-12-07 17:37:08,986 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:37:08,986 INFO L462 AbstractCegarLoop]: Abstraction has 12304 states and 38215 transitions. [2019-12-07 17:37:08,986 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:37:08,986 INFO L276 IsEmpty]: Start isEmpty. Operand 12304 states and 38215 transitions. [2019-12-07 17:37:08,997 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 17:37:08,997 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:37:08,997 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:37:08,998 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:37:08,998 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:37:08,998 INFO L82 PathProgramCache]: Analyzing trace with hash -956860210, now seen corresponding path program 1 times [2019-12-07 17:37:08,998 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:37:08,998 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [176588115] [2019-12-07 17:37:08,998 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:37:09,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:37:09,061 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:37:09,061 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [176588115] [2019-12-07 17:37:09,061 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:37:09,062 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:37:09,062 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [741821474] [2019-12-07 17:37:09,062 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:37:09,062 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:37:09,062 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:37:09,062 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:37:09,063 INFO L87 Difference]: Start difference. First operand 12304 states and 38215 transitions. Second operand 5 states. [2019-12-07 17:37:09,159 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:37:09,159 INFO L93 Difference]: Finished difference Result 36005 states and 113308 transitions. [2019-12-07 17:37:09,159 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:37:09,159 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 55 [2019-12-07 17:37:09,160 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:37:09,179 INFO L225 Difference]: With dead ends: 36005 [2019-12-07 17:37:09,179 INFO L226 Difference]: Without dead ends: 17284 [2019-12-07 17:37:09,179 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:37:09,235 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17284 states. [2019-12-07 17:37:09,349 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17284 to 9962. [2019-12-07 17:37:09,349 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9962 states. [2019-12-07 17:37:09,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9962 states to 9962 states and 31147 transitions. [2019-12-07 17:37:09,365 INFO L78 Accepts]: Start accepts. Automaton has 9962 states and 31147 transitions. Word has length 55 [2019-12-07 17:37:09,365 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:37:09,365 INFO L462 AbstractCegarLoop]: Abstraction has 9962 states and 31147 transitions. [2019-12-07 17:37:09,365 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:37:09,365 INFO L276 IsEmpty]: Start isEmpty. Operand 9962 states and 31147 transitions. [2019-12-07 17:37:09,373 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 17:37:09,373 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:37:09,374 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:37:09,374 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:37:09,374 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:37:09,374 INFO L82 PathProgramCache]: Analyzing trace with hash -1471935460, now seen corresponding path program 2 times [2019-12-07 17:37:09,374 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:37:09,374 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1982856350] [2019-12-07 17:37:09,374 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:37:09,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:37:09,426 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:37:09,427 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1982856350] [2019-12-07 17:37:09,427 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:37:09,427 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 17:37:09,427 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1840100281] [2019-12-07 17:37:09,427 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 17:37:09,427 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:37:09,427 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 17:37:09,427 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-12-07 17:37:09,428 INFO L87 Difference]: Start difference. First operand 9962 states and 31147 transitions. Second operand 8 states. [2019-12-07 17:37:09,975 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:37:09,975 INFO L93 Difference]: Finished difference Result 31520 states and 97052 transitions. [2019-12-07 17:37:09,976 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 17:37:09,976 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 55 [2019-12-07 17:37:09,976 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:37:10,000 INFO L225 Difference]: With dead ends: 31520 [2019-12-07 17:37:10,000 INFO L226 Difference]: Without dead ends: 23020 [2019-12-07 17:37:10,001 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 116 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=145, Invalid=455, Unknown=0, NotChecked=0, Total=600 [2019-12-07 17:37:10,064 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23020 states. [2019-12-07 17:37:10,228 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23020 to 12475. [2019-12-07 17:37:10,228 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12475 states. [2019-12-07 17:37:10,249 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12475 states to 12475 states and 39216 transitions. [2019-12-07 17:37:10,249 INFO L78 Accepts]: Start accepts. Automaton has 12475 states and 39216 transitions. Word has length 55 [2019-12-07 17:37:10,249 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:37:10,249 INFO L462 AbstractCegarLoop]: Abstraction has 12475 states and 39216 transitions. [2019-12-07 17:37:10,249 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 17:37:10,249 INFO L276 IsEmpty]: Start isEmpty. Operand 12475 states and 39216 transitions. [2019-12-07 17:37:10,261 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 17:37:10,261 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:37:10,262 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:37:10,262 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:37:10,262 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:37:10,262 INFO L82 PathProgramCache]: Analyzing trace with hash -2060072960, now seen corresponding path program 3 times [2019-12-07 17:37:10,262 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:37:10,262 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [168452476] [2019-12-07 17:37:10,262 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:37:10,275 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:37:10,341 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:37:10,342 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [168452476] [2019-12-07 17:37:10,342 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:37:10,342 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:37:10,342 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1835822265] [2019-12-07 17:37:10,342 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:37:10,342 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:37:10,342 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:37:10,342 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:37:10,342 INFO L87 Difference]: Start difference. First operand 12475 states and 39216 transitions. Second operand 4 states. [2019-12-07 17:37:10,394 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:37:10,394 INFO L93 Difference]: Finished difference Result 21046 states and 66175 transitions. [2019-12-07 17:37:10,395 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:37:10,395 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 55 [2019-12-07 17:37:10,395 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:37:10,404 INFO L225 Difference]: With dead ends: 21046 [2019-12-07 17:37:10,404 INFO L226 Difference]: Without dead ends: 8864 [2019-12-07 17:37:10,404 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:37:10,441 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8864 states. [2019-12-07 17:37:10,510 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8864 to 8864. [2019-12-07 17:37:10,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8864 states. [2019-12-07 17:37:10,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8864 states to 8864 states and 27767 transitions. [2019-12-07 17:37:10,523 INFO L78 Accepts]: Start accepts. Automaton has 8864 states and 27767 transitions. Word has length 55 [2019-12-07 17:37:10,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:37:10,523 INFO L462 AbstractCegarLoop]: Abstraction has 8864 states and 27767 transitions. [2019-12-07 17:37:10,523 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:37:10,523 INFO L276 IsEmpty]: Start isEmpty. Operand 8864 states and 27767 transitions. [2019-12-07 17:37:10,530 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 17:37:10,530 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:37:10,530 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:37:10,530 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:37:10,530 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:37:10,531 INFO L82 PathProgramCache]: Analyzing trace with hash 1360453796, now seen corresponding path program 4 times [2019-12-07 17:37:10,531 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:37:10,531 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [722152132] [2019-12-07 17:37:10,531 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:37:10,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:37:10,710 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:37:10,710 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [722152132] [2019-12-07 17:37:10,710 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:37:10,710 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 17:37:10,711 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [421732248] [2019-12-07 17:37:10,711 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 17:37:10,711 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:37:10,711 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 17:37:10,711 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2019-12-07 17:37:10,711 INFO L87 Difference]: Start difference. First operand 8864 states and 27767 transitions. Second operand 13 states. [2019-12-07 17:37:13,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:37:13,423 INFO L93 Difference]: Finished difference Result 18458 states and 56010 transitions. [2019-12-07 17:37:13,423 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2019-12-07 17:37:13,423 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 55 [2019-12-07 17:37:13,424 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:37:13,438 INFO L225 Difference]: With dead ends: 18458 [2019-12-07 17:37:13,438 INFO L226 Difference]: Without dead ends: 12394 [2019-12-07 17:37:13,438 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 346 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=290, Invalid=1192, Unknown=0, NotChecked=0, Total=1482 [2019-12-07 17:37:13,483 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12394 states. [2019-12-07 17:37:13,573 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12394 to 9098. [2019-12-07 17:37:13,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9098 states. [2019-12-07 17:37:13,586 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9098 states to 9098 states and 28375 transitions. [2019-12-07 17:37:13,586 INFO L78 Accepts]: Start accepts. Automaton has 9098 states and 28375 transitions. Word has length 55 [2019-12-07 17:37:13,586 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:37:13,586 INFO L462 AbstractCegarLoop]: Abstraction has 9098 states and 28375 transitions. [2019-12-07 17:37:13,586 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 17:37:13,586 INFO L276 IsEmpty]: Start isEmpty. Operand 9098 states and 28375 transitions. [2019-12-07 17:37:13,593 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 17:37:13,593 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:37:13,593 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:37:13,593 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:37:13,594 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:37:13,594 INFO L82 PathProgramCache]: Analyzing trace with hash 309741880, now seen corresponding path program 5 times [2019-12-07 17:37:13,594 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:37:13,594 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [638934640] [2019-12-07 17:37:13,594 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:37:13,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:37:13,619 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:37:13,619 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [638934640] [2019-12-07 17:37:13,619 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:37:13,619 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:37:13,619 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1745962819] [2019-12-07 17:37:13,619 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:37:13,619 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:37:13,619 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:37:13,620 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:37:13,620 INFO L87 Difference]: Start difference. First operand 9098 states and 28375 transitions. Second operand 3 states. [2019-12-07 17:37:13,640 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:37:13,640 INFO L93 Difference]: Finished difference Result 4887 states and 15359 transitions. [2019-12-07 17:37:13,641 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:37:13,641 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 55 [2019-12-07 17:37:13,641 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:37:13,646 INFO L225 Difference]: With dead ends: 4887 [2019-12-07 17:37:13,646 INFO L226 Difference]: Without dead ends: 4887 [2019-12-07 17:37:13,646 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:37:13,673 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4887 states. [2019-12-07 17:37:13,710 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4887 to 4876. [2019-12-07 17:37:13,710 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4876 states. [2019-12-07 17:37:13,716 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4876 states to 4876 states and 15326 transitions. [2019-12-07 17:37:13,717 INFO L78 Accepts]: Start accepts. Automaton has 4876 states and 15326 transitions. Word has length 55 [2019-12-07 17:37:13,717 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:37:13,717 INFO L462 AbstractCegarLoop]: Abstraction has 4876 states and 15326 transitions. [2019-12-07 17:37:13,717 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:37:13,717 INFO L276 IsEmpty]: Start isEmpty. Operand 4876 states and 15326 transitions. [2019-12-07 17:37:13,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 17:37:13,721 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:37:13,721 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:37:13,721 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:37:13,721 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:37:13,721 INFO L82 PathProgramCache]: Analyzing trace with hash 259489780, now seen corresponding path program 1 times [2019-12-07 17:37:13,721 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:37:13,721 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1228552299] [2019-12-07 17:37:13,722 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:37:13,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:37:13,870 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:37:13,870 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1228552299] [2019-12-07 17:37:13,870 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:37:13,870 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 17:37:13,870 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [432398359] [2019-12-07 17:37:13,870 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 17:37:13,871 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:37:13,871 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 17:37:13,871 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 17:37:13,871 INFO L87 Difference]: Start difference. First operand 4876 states and 15326 transitions. Second operand 10 states. [2019-12-07 17:37:14,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:37:14,442 INFO L93 Difference]: Finished difference Result 8902 states and 27624 transitions. [2019-12-07 17:37:14,443 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 17:37:14,443 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 56 [2019-12-07 17:37:14,443 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:37:14,449 INFO L225 Difference]: With dead ends: 8902 [2019-12-07 17:37:14,450 INFO L226 Difference]: Without dead ends: 6336 [2019-12-07 17:37:14,450 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 86 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=112, Invalid=440, Unknown=0, NotChecked=0, Total=552 [2019-12-07 17:37:14,479 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6336 states. [2019-12-07 17:37:14,523 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6336 to 5996. [2019-12-07 17:37:14,524 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5996 states. [2019-12-07 17:37:14,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5996 states to 5996 states and 18616 transitions. [2019-12-07 17:37:14,532 INFO L78 Accepts]: Start accepts. Automaton has 5996 states and 18616 transitions. Word has length 56 [2019-12-07 17:37:14,532 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:37:14,532 INFO L462 AbstractCegarLoop]: Abstraction has 5996 states and 18616 transitions. [2019-12-07 17:37:14,532 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 17:37:14,532 INFO L276 IsEmpty]: Start isEmpty. Operand 5996 states and 18616 transitions. [2019-12-07 17:37:14,536 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 17:37:14,536 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:37:14,537 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:37:14,537 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:37:14,537 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:37:14,537 INFO L82 PathProgramCache]: Analyzing trace with hash 1236301856, now seen corresponding path program 2 times [2019-12-07 17:37:14,537 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:37:14,537 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [528974487] [2019-12-07 17:37:14,537 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:37:14,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:37:14,652 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:37:14,652 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [528974487] [2019-12-07 17:37:14,652 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:37:14,652 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 17:37:14,652 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [200902591] [2019-12-07 17:37:14,653 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 17:37:14,653 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:37:14,653 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 17:37:14,653 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:37:14,653 INFO L87 Difference]: Start difference. First operand 5996 states and 18616 transitions. Second operand 11 states. [2019-12-07 17:37:15,207 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:37:15,208 INFO L93 Difference]: Finished difference Result 8730 states and 26619 transitions. [2019-12-07 17:37:15,208 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 17:37:15,208 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 56 [2019-12-07 17:37:15,208 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:37:15,215 INFO L225 Difference]: With dead ends: 8730 [2019-12-07 17:37:15,215 INFO L226 Difference]: Without dead ends: 6652 [2019-12-07 17:37:15,216 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 47 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=86, Invalid=334, Unknown=0, NotChecked=0, Total=420 [2019-12-07 17:37:15,245 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6652 states. [2019-12-07 17:37:15,293 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6652 to 6140. [2019-12-07 17:37:15,293 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6140 states. [2019-12-07 17:37:15,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6140 states to 6140 states and 18990 transitions. [2019-12-07 17:37:15,301 INFO L78 Accepts]: Start accepts. Automaton has 6140 states and 18990 transitions. Word has length 56 [2019-12-07 17:37:15,301 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:37:15,301 INFO L462 AbstractCegarLoop]: Abstraction has 6140 states and 18990 transitions. [2019-12-07 17:37:15,301 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 17:37:15,301 INFO L276 IsEmpty]: Start isEmpty. Operand 6140 states and 18990 transitions. [2019-12-07 17:37:15,306 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 17:37:15,306 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:37:15,306 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:37:15,306 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:37:15,306 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:37:15,306 INFO L82 PathProgramCache]: Analyzing trace with hash -711328716, now seen corresponding path program 3 times [2019-12-07 17:37:15,306 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:37:15,307 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1833568083] [2019-12-07 17:37:15,307 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:37:15,314 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:37:15,428 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:37:15,428 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1833568083] [2019-12-07 17:37:15,429 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:37:15,429 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 17:37:15,429 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [421242599] [2019-12-07 17:37:15,429 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 17:37:15,429 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:37:15,429 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 17:37:15,429 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 17:37:15,430 INFO L87 Difference]: Start difference. First operand 6140 states and 18990 transitions. Second operand 10 states. [2019-12-07 17:37:16,010 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:37:16,010 INFO L93 Difference]: Finished difference Result 9684 states and 29295 transitions. [2019-12-07 17:37:16,010 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 17:37:16,010 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 56 [2019-12-07 17:37:16,010 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:37:16,018 INFO L225 Difference]: With dead ends: 9684 [2019-12-07 17:37:16,018 INFO L226 Difference]: Without dead ends: 7586 [2019-12-07 17:37:16,019 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=67, Invalid=239, Unknown=0, NotChecked=0, Total=306 [2019-12-07 17:37:16,052 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7586 states. [2019-12-07 17:37:16,105 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7586 to 6372. [2019-12-07 17:37:16,105 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6372 states. [2019-12-07 17:37:16,114 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6372 states to 6372 states and 19538 transitions. [2019-12-07 17:37:16,114 INFO L78 Accepts]: Start accepts. Automaton has 6372 states and 19538 transitions. Word has length 56 [2019-12-07 17:37:16,114 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:37:16,114 INFO L462 AbstractCegarLoop]: Abstraction has 6372 states and 19538 transitions. [2019-12-07 17:37:16,114 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 17:37:16,114 INFO L276 IsEmpty]: Start isEmpty. Operand 6372 states and 19538 transitions. [2019-12-07 17:37:16,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 17:37:16,119 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:37:16,119 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:37:16,119 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:37:16,119 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:37:16,119 INFO L82 PathProgramCache]: Analyzing trace with hash 259978164, now seen corresponding path program 4 times [2019-12-07 17:37:16,120 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:37:16,120 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1326643766] [2019-12-07 17:37:16,120 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:37:16,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:37:16,219 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:37:16,219 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1326643766] [2019-12-07 17:37:16,220 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:37:16,220 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 17:37:16,220 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1273670360] [2019-12-07 17:37:16,220 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 17:37:16,220 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:37:16,220 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 17:37:16,220 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:37:16,220 INFO L87 Difference]: Start difference. First operand 6372 states and 19538 transitions. Second operand 11 states. [2019-12-07 17:37:16,710 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:37:16,710 INFO L93 Difference]: Finished difference Result 8772 states and 26471 transitions. [2019-12-07 17:37:16,710 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 17:37:16,710 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 56 [2019-12-07 17:37:16,710 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:37:16,717 INFO L225 Difference]: With dead ends: 8772 [2019-12-07 17:37:16,717 INFO L226 Difference]: Without dead ends: 6870 [2019-12-07 17:37:16,717 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=73, Invalid=307, Unknown=0, NotChecked=0, Total=380 [2019-12-07 17:37:16,746 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6870 states. [2019-12-07 17:37:16,794 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6870 to 6224. [2019-12-07 17:37:16,794 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6224 states. [2019-12-07 17:37:16,802 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6224 states to 6224 states and 19074 transitions. [2019-12-07 17:37:16,802 INFO L78 Accepts]: Start accepts. Automaton has 6224 states and 19074 transitions. Word has length 56 [2019-12-07 17:37:16,803 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:37:16,803 INFO L462 AbstractCegarLoop]: Abstraction has 6224 states and 19074 transitions. [2019-12-07 17:37:16,803 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 17:37:16,803 INFO L276 IsEmpty]: Start isEmpty. Operand 6224 states and 19074 transitions. [2019-12-07 17:37:16,807 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 17:37:16,807 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:37:16,807 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:37:16,808 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:37:16,808 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:37:16,808 INFO L82 PathProgramCache]: Analyzing trace with hash 425157206, now seen corresponding path program 5 times [2019-12-07 17:37:16,808 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:37:16,808 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1533991006] [2019-12-07 17:37:16,808 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:37:16,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:37:16,922 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:37:16,922 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1533991006] [2019-12-07 17:37:16,922 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:37:16,922 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 17:37:16,923 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1984623851] [2019-12-07 17:37:16,923 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 17:37:16,923 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:37:16,923 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 17:37:16,923 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:37:16,923 INFO L87 Difference]: Start difference. First operand 6224 states and 19074 transitions. Second operand 11 states. [2019-12-07 17:37:17,343 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:37:17,343 INFO L93 Difference]: Finished difference Result 9929 states and 30255 transitions. [2019-12-07 17:37:17,344 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-12-07 17:37:17,344 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 56 [2019-12-07 17:37:17,344 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:37:17,353 INFO L225 Difference]: With dead ends: 9929 [2019-12-07 17:37:17,353 INFO L226 Difference]: Without dead ends: 9235 [2019-12-07 17:37:17,354 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 170 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=170, Invalid=700, Unknown=0, NotChecked=0, Total=870 [2019-12-07 17:37:17,389 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9235 states. [2019-12-07 17:37:17,464 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9235 to 8343. [2019-12-07 17:37:17,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8343 states. [2019-12-07 17:37:17,476 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8343 states to 8343 states and 25560 transitions. [2019-12-07 17:37:17,476 INFO L78 Accepts]: Start accepts. Automaton has 8343 states and 25560 transitions. Word has length 56 [2019-12-07 17:37:17,476 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:37:17,476 INFO L462 AbstractCegarLoop]: Abstraction has 8343 states and 25560 transitions. [2019-12-07 17:37:17,476 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 17:37:17,476 INFO L276 IsEmpty]: Start isEmpty. Operand 8343 states and 25560 transitions. [2019-12-07 17:37:17,482 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 17:37:17,483 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:37:17,483 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:37:17,483 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:37:17,483 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:37:17,483 INFO L82 PathProgramCache]: Analyzing trace with hash 2122420018, now seen corresponding path program 6 times [2019-12-07 17:37:17,483 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:37:17,483 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1088521296] [2019-12-07 17:37:17,483 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:37:17,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:37:17,579 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:37:17,580 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1088521296] [2019-12-07 17:37:17,580 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:37:17,580 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 17:37:17,580 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [398400775] [2019-12-07 17:37:17,580 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 17:37:17,580 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:37:17,580 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 17:37:17,580 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 17:37:17,580 INFO L87 Difference]: Start difference. First operand 8343 states and 25560 transitions. Second operand 11 states. [2019-12-07 17:37:18,524 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:37:18,524 INFO L93 Difference]: Finished difference Result 9295 states and 28018 transitions. [2019-12-07 17:37:18,525 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 17:37:18,525 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 56 [2019-12-07 17:37:18,526 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:37:18,540 INFO L225 Difference]: With dead ends: 9295 [2019-12-07 17:37:18,540 INFO L226 Difference]: Without dead ends: 6913 [2019-12-07 17:37:18,541 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 111 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=141, Invalid=509, Unknown=0, NotChecked=0, Total=650 [2019-12-07 17:37:18,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6913 states. [2019-12-07 17:37:18,633 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6913 to 6119. [2019-12-07 17:37:18,633 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6119 states. [2019-12-07 17:37:18,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6119 states to 6119 states and 18601 transitions. [2019-12-07 17:37:18,641 INFO L78 Accepts]: Start accepts. Automaton has 6119 states and 18601 transitions. Word has length 56 [2019-12-07 17:37:18,641 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:37:18,641 INFO L462 AbstractCegarLoop]: Abstraction has 6119 states and 18601 transitions. [2019-12-07 17:37:18,641 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 17:37:18,641 INFO L276 IsEmpty]: Start isEmpty. Operand 6119 states and 18601 transitions. [2019-12-07 17:37:18,646 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 17:37:18,646 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:37:18,646 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:37:18,646 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:37:18,646 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:37:18,646 INFO L82 PathProgramCache]: Analyzing trace with hash 918799478, now seen corresponding path program 7 times [2019-12-07 17:37:18,647 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:37:18,647 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1046246663] [2019-12-07 17:37:18,647 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:37:18,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:37:18,820 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:37:18,820 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1046246663] [2019-12-07 17:37:18,820 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:37:18,820 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 17:37:18,820 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [959473234] [2019-12-07 17:37:18,820 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 17:37:18,820 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:37:18,821 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 17:37:18,821 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=129, Unknown=0, NotChecked=0, Total=156 [2019-12-07 17:37:18,821 INFO L87 Difference]: Start difference. First operand 6119 states and 18601 transitions. Second operand 13 states. [2019-12-07 17:37:19,266 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:37:19,266 INFO L93 Difference]: Finished difference Result 7059 states and 21027 transitions. [2019-12-07 17:37:19,266 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 17:37:19,266 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 56 [2019-12-07 17:37:19,266 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:37:19,273 INFO L225 Difference]: With dead ends: 7059 [2019-12-07 17:37:19,273 INFO L226 Difference]: Without dead ends: 6725 [2019-12-07 17:37:19,273 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 55 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=107, Invalid=445, Unknown=0, NotChecked=0, Total=552 [2019-12-07 17:37:19,304 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6725 states. [2019-12-07 17:37:19,350 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6725 to 5967. [2019-12-07 17:37:19,350 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5967 states. [2019-12-07 17:37:19,358 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5967 states to 5967 states and 18171 transitions. [2019-12-07 17:37:19,358 INFO L78 Accepts]: Start accepts. Automaton has 5967 states and 18171 transitions. Word has length 56 [2019-12-07 17:37:19,358 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:37:19,358 INFO L462 AbstractCegarLoop]: Abstraction has 5967 states and 18171 transitions. [2019-12-07 17:37:19,358 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 17:37:19,358 INFO L276 IsEmpty]: Start isEmpty. Operand 5967 states and 18171 transitions. [2019-12-07 17:37:19,362 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 17:37:19,362 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:37:19,362 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:37:19,363 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:37:19,363 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:37:19,363 INFO L82 PathProgramCache]: Analyzing trace with hash 1649345490, now seen corresponding path program 8 times [2019-12-07 17:37:19,363 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:37:19,363 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [769016339] [2019-12-07 17:37:19,363 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:37:19,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:37:19,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:37:19,429 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 17:37:19,429 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 17:37:19,431 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [808] [808] ULTIMATE.startENTRY-->L818: Formula: (let ((.cse0 (store |v_#valid_64| 0 0))) (and (= 0 v_~x$read_delayed_var~0.base_6) (= v_~x$r_buff1_thd1~0_448 0) (= 0 v_~x$read_delayed_var~0.offset_6) (= 0 v_~x$w_buff1_used~0_643) (= 0 v_~x~0_243) (= v_~__unbuffered_p2_EBX~0_64 0) (= 0 v_~__unbuffered_p0_EAX~0_82) (= 0 v_~x$r_buff1_thd2~0_283) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1897~0.base_26|)) (= v_~x$flush_delayed~0_67 0) (= 0 v_~__unbuffered_p2_EAX~0_64) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1897~0.base_26|) (= v_~main$tmp_guard1~0_51 0) (= v_~main$tmp_guard0~0_41 0) (< 0 |v_#StackHeapBarrier_17|) (= v_~x$r_buff1_thd0~0_322 0) (= 0 v_~x$w_buff1~0_350) (= v_~weak$$choice2~0_208 0) (= 0 v_~x$w_buff0~0_432) (= 0 v_~x$read_delayed~0_6) (= 0 v_~__unbuffered_cnt~0_96) (= 0 v_~x$r_buff0_thd3~0_150) (= v_~x$r_buff0_thd1~0_385 0) (= 0 v_~x$r_buff1_thd3~0_288) (= |v_#valid_62| (store .cse0 |v_ULTIMATE.start_main_~#t1897~0.base_26| 1)) (= v_~x$mem_tmp~0_44 0) (= 0 v_~x$r_buff0_thd2~0_345) (= |v_#NULL.offset_5| 0) (= 0 v_~x$w_buff0_used~0_952) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t1897~0.base_26| 4) |v_#length_23|) (= v_~x$r_buff0_thd0~0_164 0) (= 0 v_~weak$$choice0~0_40) (= v_~y~0_300 0) (= 0 |v_ULTIMATE.start_main_~#t1897~0.offset_20|) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1897~0.base_26| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1897~0.base_26|) |v_ULTIMATE.start_main_~#t1897~0.offset_20| 0)) |v_#memory_int_23|) (= 0 |v_#NULL.base_5|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_24|, #length=|v_#length_24|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_432, ~x$flush_delayed~0=v_~x$flush_delayed~0_67, #NULL.offset=|v_#NULL.offset_5|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_448, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_150, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_40|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_34|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_82, ULTIMATE.start_main_~#t1899~0.base=|v_ULTIMATE.start_main_~#t1899~0.base_21|, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_64, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_164, ULTIMATE.start_main_~#t1898~0.base=|v_ULTIMATE.start_main_~#t1898~0.base_27|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_64, ~x$w_buff1~0=v_~x$w_buff1~0_350, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_643, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_283, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_6, ~weak$$choice0~0=v_~weak$$choice0~0_40, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_96, ~x~0=v_~x~0_243, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_385, ULTIMATE.start_main_~#t1897~0.offset=|v_ULTIMATE.start_main_~#t1897~0.offset_20|, ULTIMATE.start_main_~#t1897~0.base=|v_ULTIMATE.start_main_~#t1897~0.base_26|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_106|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_288, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_51, ~x$mem_tmp~0=v_~x$mem_tmp~0_44, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_51|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_60|, ~y~0=v_~y~0_300, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_15|, ULTIMATE.start_main_~#t1898~0.offset=|v_ULTIMATE.start_main_~#t1898~0.offset_20|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_41, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_322, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_345, #NULL.base=|v_#NULL.base_5|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_952, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_60|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_6, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_23|, ULTIMATE.start_main_~#t1899~0.offset=|v_ULTIMATE.start_main_~#t1899~0.offset_14|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_8|, ~weak$$choice2~0=v_~weak$$choice2~0_208, ~x$read_delayed~0=v_~x$read_delayed~0_6} AuxVars[] AssignedVars[~x$w_buff0~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_~#t1897~0.offset, ~x$flush_delayed~0, ULTIMATE.start_main_~#t1897~0.base, #NULL.offset, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~x$r_buff1_thd1~0, ~main$tmp_guard1~0, ~x$r_buff0_thd3~0, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44, ~__unbuffered_p0_EAX~0, ULTIMATE.start_main_~#t1899~0.base, #length, ~__unbuffered_p2_EAX~0, ~y~0, ~x$r_buff0_thd0~0, ULTIMATE.start_main_~#t1898~0.base, ULTIMATE.start_main_#t~nondet40, ~__unbuffered_p2_EBX~0, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_~#t1898~0.offset, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ~x$read_delayed_var~0.base, #NULL.base, ~x$w_buff0_used~0, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_#t~nondet38, #memory_int, ULTIMATE.start_main_~#t1899~0.offset, ~__unbuffered_cnt~0, ULTIMATE.start_main_#t~nondet39, ~weak$$choice2~0, ~x~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 17:37:19,431 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L818-1-->L820: Formula: (and (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1898~0.base_10| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1898~0.base_10|) |v_ULTIMATE.start_main_~#t1898~0.offset_9| 1)) |v_#memory_int_15|) (= 0 |v_ULTIMATE.start_main_~#t1898~0.offset_9|) (not (= 0 |v_ULTIMATE.start_main_~#t1898~0.base_10|)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1898~0.base_10|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1898~0.base_10| 4)) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t1898~0.base_10|)) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t1898~0.base_10| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t1898~0.base=|v_ULTIMATE.start_main_~#t1898~0.base_10|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_4|, ULTIMATE.start_main_~#t1898~0.offset=|v_ULTIMATE.start_main_~#t1898~0.offset_9|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1898~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, ULTIMATE.start_main_~#t1898~0.offset, #length] because there is no mapped edge [2019-12-07 17:37:19,432 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [672] [672] P1ENTRY-->L5-3: Formula: (and (= v_P1Thread1of1ForFork0_~arg.base_6 |v_P1Thread1of1ForFork0_#in~arg.base_8|) (= 1 v_~x$w_buff0_used~0_82) (= v_P1Thread1of1ForFork0_~arg.offset_6 |v_P1Thread1of1ForFork0_#in~arg.offset_8|) (= v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_8 |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|) (= v_~x$w_buff1_used~0_45 v_~x$w_buff0_used~0_83) (= (ite (not (and (not (= (mod v_~x$w_buff1_used~0_45 256) 0)) (not (= (mod v_~x$w_buff0_used~0_82 256) 0)))) 1 0) |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|) (= v_~x$w_buff0~0_23 v_~x$w_buff1~0_17) (not (= 0 v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_8)) (= 1 v_~x$w_buff0~0_22)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_23, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_8|, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_8|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_83} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_22, P1Thread1of1ForFork0___VERIFIER_assert_~expression=v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_8, P1Thread1of1ForFork0_~arg.offset=v_P1Thread1of1ForFork0_~arg.offset_6, P1Thread1of1ForFork0_~arg.base=v_P1Thread1of1ForFork0_~arg.base_6, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_8|, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|, ~x$w_buff1~0=v_~x$w_buff1~0_17, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_8|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_45, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_82} AuxVars[] AssignedVars[~x$w_buff0~0, P1Thread1of1ForFork0___VERIFIER_assert_~expression, P1Thread1of1ForFork0_~arg.offset, P1Thread1of1ForFork0_~arg.base, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 17:37:19,432 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L820-1-->L822: Formula: (and (not (= |v_ULTIMATE.start_main_~#t1899~0.base_11| 0)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1899~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1899~0.base_11|) |v_ULTIMATE.start_main_~#t1899~0.offset_10| 2)) |v_#memory_int_13|) (= (select |v_#valid_28| |v_ULTIMATE.start_main_~#t1899~0.base_11|) 0) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t1899~0.base_11| 4)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1899~0.base_11|) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t1899~0.base_11| 1)) (= 0 |v_ULTIMATE.start_main_~#t1899~0.offset_10|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_14|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t1899~0.base=|v_ULTIMATE.start_main_~#t1899~0.base_11|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t1899~0.offset=|v_ULTIMATE.start_main_~#t1899~0.offset_10|, #length=|v_#length_13|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1899~0.base, #valid, #memory_int, ULTIMATE.start_main_~#t1899~0.offset, #length, ULTIMATE.start_main_#t~nondet39] because there is no mapped edge [2019-12-07 17:37:19,433 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L795-2-->L795-4: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In2022490315 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd3~0_In2022490315 256)))) (or (and (not .cse0) (= ~x$w_buff1~0_In2022490315 |P2Thread1of1ForFork1_#t~ite32_Out2022490315|) (not .cse1)) (and (or .cse1 .cse0) (= ~x~0_In2022490315 |P2Thread1of1ForFork1_#t~ite32_Out2022490315|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In2022490315, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2022490315, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In2022490315, ~x~0=~x~0_In2022490315} OutVars{P2Thread1of1ForFork1_#t~ite32=|P2Thread1of1ForFork1_#t~ite32_Out2022490315|, ~x$w_buff1~0=~x$w_buff1~0_In2022490315, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2022490315, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In2022490315, ~x~0=~x~0_In2022490315} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32] because there is no mapped edge [2019-12-07 17:37:19,434 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [677] [677] L795-4-->L796: Formula: (= v_~x~0_18 |v_P2Thread1of1ForFork1_#t~ite32_6|) InVars {P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_6|} OutVars{P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_5|, P2Thread1of1ForFork1_#t~ite33=|v_P2Thread1of1ForFork1_#t~ite33_5|, ~x~0=v_~x~0_18} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32, P2Thread1of1ForFork1_#t~ite33, ~x~0] because there is no mapped edge [2019-12-07 17:37:19,434 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] L796-->L796-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In183886602 256))) (.cse0 (= (mod ~x$r_buff0_thd3~0_In183886602 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork1_#t~ite34_Out183886602| 0) (not .cse1)) (and (= |P2Thread1of1ForFork1_#t~ite34_Out183886602| ~x$w_buff0_used~0_In183886602) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In183886602, ~x$w_buff0_used~0=~x$w_buff0_used~0_In183886602} OutVars{P2Thread1of1ForFork1_#t~ite34=|P2Thread1of1ForFork1_#t~ite34_Out183886602|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In183886602, ~x$w_buff0_used~0=~x$w_buff0_used~0_In183886602} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-12-07 17:37:19,435 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L740-->L740-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-390473511 256)))) (or (and .cse0 (= |P0Thread1of1ForFork2_#t~ite9_Out-390473511| |P0Thread1of1ForFork2_#t~ite8_Out-390473511|) (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In-390473511 256) 0))) (or (and (= (mod ~x$r_buff1_thd1~0_In-390473511 256) 0) .cse1) (= 0 (mod ~x$w_buff0_used~0_In-390473511 256)) (and (= 0 (mod ~x$w_buff1_used~0_In-390473511 256)) .cse1))) (= |P0Thread1of1ForFork2_#t~ite8_Out-390473511| ~x$w_buff0~0_In-390473511)) (and (= |P0Thread1of1ForFork2_#t~ite8_In-390473511| |P0Thread1of1ForFork2_#t~ite8_Out-390473511|) (= |P0Thread1of1ForFork2_#t~ite9_Out-390473511| ~x$w_buff0~0_In-390473511) (not .cse0)))) InVars {~x$w_buff0~0=~x$w_buff0~0_In-390473511, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-390473511, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_In-390473511|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-390473511, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-390473511, ~weak$$choice2~0=~weak$$choice2~0_In-390473511, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-390473511} OutVars{~x$w_buff0~0=~x$w_buff0~0_In-390473511, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-390473511, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_Out-390473511|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-390473511, P0Thread1of1ForFork2_#t~ite9=|P0Thread1of1ForFork2_#t~ite9_Out-390473511|, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-390473511, ~weak$$choice2~0=~weak$$choice2~0_In-390473511, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-390473511} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite8, P0Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 17:37:19,436 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [747] [747] L776-->L776-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In1977888111 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd2~0_In1977888111 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork0_#t~ite28_Out1977888111| ~x$w_buff0_used~0_In1977888111)) (and (not .cse1) (= 0 |P1Thread1of1ForFork0_#t~ite28_Out1977888111|) (not .cse0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1977888111, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1977888111} OutVars{~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1977888111, P1Thread1of1ForFork0_#t~ite28=|P1Thread1of1ForFork0_#t~ite28_Out1977888111|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1977888111} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite28] because there is no mapped edge [2019-12-07 17:37:19,436 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L777-->L777-2: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In968072109 256))) (.cse3 (= (mod ~x$w_buff0_used~0_In968072109 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In968072109 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd2~0_In968072109 256)))) (or (and (= |P1Thread1of1ForFork0_#t~ite29_Out968072109| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse0 .cse1) (= |P1Thread1of1ForFork0_#t~ite29_Out968072109| ~x$w_buff1_used~0_In968072109)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In968072109, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In968072109, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In968072109, ~x$w_buff0_used~0=~x$w_buff0_used~0_In968072109} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In968072109, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In968072109, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In968072109, P1Thread1of1ForFork0_#t~ite29=|P1Thread1of1ForFork0_#t~ite29_Out968072109|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In968072109} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 17:37:19,437 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [753] [753] L778-->L779: Formula: (let ((.cse1 (= ~x$r_buff0_thd2~0_Out116570076 ~x$r_buff0_thd2~0_In116570076)) (.cse0 (= (mod ~x$r_buff0_thd2~0_In116570076 256) 0)) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In116570076 256)))) (or (and .cse0 .cse1) (and .cse1 .cse2) (and (not .cse0) (not .cse2) (= ~x$r_buff0_thd2~0_Out116570076 0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In116570076, ~x$w_buff0_used~0=~x$w_buff0_used~0_In116570076} OutVars{P1Thread1of1ForFork0_#t~ite30=|P1Thread1of1ForFork0_#t~ite30_Out116570076|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out116570076, ~x$w_buff0_used~0=~x$w_buff0_used~0_In116570076} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite30, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 17:37:19,437 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L779-->L779-2: Formula: (let ((.cse3 (= (mod ~x$w_buff0_used~0_In35455399 256) 0)) (.cse2 (= (mod ~x$r_buff0_thd2~0_In35455399 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd2~0_In35455399 256))) (.cse1 (= (mod ~x$w_buff1_used~0_In35455399 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork0_#t~ite31_Out35455399|)) (and (or .cse3 .cse2) (or .cse0 .cse1) (= |P1Thread1of1ForFork0_#t~ite31_Out35455399| ~x$r_buff1_thd2~0_In35455399)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In35455399, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In35455399, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In35455399, ~x$w_buff0_used~0=~x$w_buff0_used~0_In35455399} OutVars{P1Thread1of1ForFork0_#t~ite31=|P1Thread1of1ForFork0_#t~ite31_Out35455399|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In35455399, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In35455399, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In35455399, ~x$w_buff0_used~0=~x$w_buff0_used~0_In35455399} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 17:37:19,437 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L779-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= v_~x$r_buff1_thd2~0_52 |v_P1Thread1of1ForFork0_#t~ite31_28|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_63 1) v_~__unbuffered_cnt~0_62)) InVars {P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63} OutVars{P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_27|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_52, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 17:37:19,438 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L797-->L797-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff1_thd3~0_In847655870 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In847655870 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In847655870 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In847655870 256)))) (or (and (= |P2Thread1of1ForFork1_#t~ite35_Out847655870| ~x$w_buff1_used~0_In847655870) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P2Thread1of1ForFork1_#t~ite35_Out847655870| 0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In847655870, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In847655870, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In847655870, ~x$w_buff0_used~0=~x$w_buff0_used~0_In847655870} OutVars{P2Thread1of1ForFork1_#t~ite35=|P2Thread1of1ForFork1_#t~ite35_Out847655870|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In847655870, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In847655870, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In847655870, ~x$w_buff0_used~0=~x$w_buff0_used~0_In847655870} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite35] because there is no mapped edge [2019-12-07 17:37:19,438 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [745] [745] L798-->L798-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In1225683503 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In1225683503 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork1_#t~ite36_Out1225683503| 0)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork1_#t~ite36_Out1225683503| ~x$r_buff0_thd3~0_In1225683503)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1225683503, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1225683503} OutVars{P2Thread1of1ForFork1_#t~ite36=|P2Thread1of1ForFork1_#t~ite36_Out1225683503|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1225683503, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1225683503} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-12-07 17:37:19,440 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L743-->L743-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In293605 256)))) (or (and (= |P0Thread1of1ForFork2_#t~ite17_Out293605| ~x$w_buff1_used~0_In293605) .cse0 (= |P0Thread1of1ForFork2_#t~ite18_Out293605| |P0Thread1of1ForFork2_#t~ite17_Out293605|) (let ((.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In293605 256)))) (or (= 0 (mod ~x$w_buff0_used~0_In293605 256)) (and (= 0 (mod ~x$w_buff1_used~0_In293605 256)) .cse1) (and (= 0 (mod ~x$r_buff1_thd1~0_In293605 256)) .cse1)))) (and (not .cse0) (= |P0Thread1of1ForFork2_#t~ite17_In293605| |P0Thread1of1ForFork2_#t~ite17_Out293605|) (= |P0Thread1of1ForFork2_#t~ite18_Out293605| ~x$w_buff1_used~0_In293605)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In293605, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_In293605|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In293605, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In293605, ~weak$$choice2~0=~weak$$choice2~0_In293605, ~x$w_buff0_used~0=~x$w_buff0_used~0_In293605} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In293605, P0Thread1of1ForFork2_#t~ite18=|P0Thread1of1ForFork2_#t~ite18_Out293605|, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_Out293605|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In293605, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In293605, ~weak$$choice2~0=~weak$$choice2~0_In293605, ~x$w_buff0_used~0=~x$w_buff0_used~0_In293605} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite18, P0Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 17:37:19,440 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [730] [730] L744-->L745: Formula: (and (= v_~x$r_buff0_thd1~0_104 v_~x$r_buff0_thd1~0_103) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_104, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{P0Thread1of1ForFork2_#t~ite20=|v_P0Thread1of1ForFork2_#t~ite20_10|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_103, P0Thread1of1ForFork2_#t~ite19=|v_P0Thread1of1ForFork2_#t~ite19_11|, ~weak$$choice2~0=v_~weak$$choice2~0_39, P0Thread1of1ForFork2_#t~ite21=|v_P0Thread1of1ForFork2_#t~ite21_6|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite20, ~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite19, P0Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 17:37:19,440 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L745-->L745-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-413139220 256)))) (or (and (= |P0Thread1of1ForFork2_#t~ite24_Out-413139220| ~x$r_buff1_thd1~0_In-413139220) (= |P0Thread1of1ForFork2_#t~ite23_In-413139220| |P0Thread1of1ForFork2_#t~ite23_Out-413139220|) (not .cse0)) (and .cse0 (= |P0Thread1of1ForFork2_#t~ite24_Out-413139220| |P0Thread1of1ForFork2_#t~ite23_Out-413139220|) (= ~x$r_buff1_thd1~0_In-413139220 |P0Thread1of1ForFork2_#t~ite23_Out-413139220|) (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In-413139220 256) 0))) (or (= 0 (mod ~x$w_buff0_used~0_In-413139220 256)) (and .cse1 (= (mod ~x$r_buff1_thd1~0_In-413139220 256) 0)) (and .cse1 (= (mod ~x$w_buff1_used~0_In-413139220 256) 0))))))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-413139220, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-413139220, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-413139220, ~weak$$choice2~0=~weak$$choice2~0_In-413139220, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_In-413139220|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-413139220} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-413139220, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-413139220, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-413139220, P0Thread1of1ForFork2_#t~ite24=|P0Thread1of1ForFork2_#t~ite24_Out-413139220|, ~weak$$choice2~0=~weak$$choice2~0_In-413139220, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_Out-413139220|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-413139220} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite24, P0Thread1of1ForFork2_#t~ite23] because there is no mapped edge [2019-12-07 17:37:19,441 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L799-->L799-2: Formula: (let ((.cse3 (= 0 (mod ~x$w_buff1_used~0_In1226845861 256))) (.cse2 (= 0 (mod ~x$r_buff1_thd3~0_In1226845861 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In1226845861 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1226845861 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork1_#t~ite37_Out1226845861| ~x$r_buff1_thd3~0_In1226845861)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= 0 |P2Thread1of1ForFork1_#t~ite37_Out1226845861|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1226845861, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1226845861, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1226845861, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1226845861} OutVars{P2Thread1of1ForFork1_#t~ite37=|P2Thread1of1ForFork1_#t~ite37_Out1226845861|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1226845861, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1226845861, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1226845861, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1226845861} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-12-07 17:37:19,441 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L799-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_57 1) v_~__unbuffered_cnt~0_56) (= v_~x$r_buff1_thd3~0_54 |v_P2Thread1of1ForFork1_#t~ite37_28|) (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|)) InVars {P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57} OutVars{P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_27|, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_54, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37, P2Thread1of1ForFork1_#res.base, ~x$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 17:37:19,441 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [703] [703] L747-->L755: Formula: (and (= v_~x$flush_delayed~0_16 0) (not (= (mod v_~x$flush_delayed~0_17 256) 0)) (= v_~x~0_35 v_~x$mem_tmp~0_10) (= (+ v_~__unbuffered_cnt~0_30 1) v_~__unbuffered_cnt~0_29)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_17, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_30, ~x$mem_tmp~0=v_~x$mem_tmp~0_10} OutVars{P0Thread1of1ForFork2_#t~ite25=|v_P0Thread1of1ForFork2_#t~ite25_13|, ~x$flush_delayed~0=v_~x$flush_delayed~0_16, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_29, ~x$mem_tmp~0=v_~x$mem_tmp~0_10, ~x~0=v_~x~0_35} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite25, ~x$flush_delayed~0, ~__unbuffered_cnt~0, ~x~0] because there is no mapped edge [2019-12-07 17:37:19,442 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [698] [698] L826-->L828-2: Formula: (and (or (= 0 (mod v_~x$w_buff0_used~0_172 256)) (= (mod v_~x$r_buff0_thd0~0_29 256) 0)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_29, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_172} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_29, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_172} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 17:37:19,442 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L828-2-->L828-4: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In-1534604350 256))) (.cse0 (= (mod ~x$r_buff1_thd0~0_In-1534604350 256) 0))) (or (and (not .cse0) (= ~x$w_buff1~0_In-1534604350 |ULTIMATE.start_main_#t~ite41_Out-1534604350|) (not .cse1)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite41_Out-1534604350| ~x~0_In-1534604350)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1534604350, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1534604350, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1534604350, ~x~0=~x~0_In-1534604350} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out-1534604350|, ~x$w_buff1~0=~x$w_buff1~0_In-1534604350, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1534604350, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1534604350, ~x~0=~x~0_In-1534604350} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41] because there is no mapped edge [2019-12-07 17:37:19,442 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L828-4-->L829: Formula: (= v_~x~0_24 |v_ULTIMATE.start_main_#t~ite41_11|) InVars {ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_11|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_10|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_6|, ~x~0=v_~x~0_24} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite42, ~x~0] because there is no mapped edge [2019-12-07 17:37:19,442 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [744] [744] L829-->L829-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In438798114 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In438798114 256)))) (or (and (= |ULTIMATE.start_main_#t~ite43_Out438798114| ~x$w_buff0_used~0_In438798114) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite43_Out438798114| 0) (not .cse1) (not .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In438798114, ~x$w_buff0_used~0=~x$w_buff0_used~0_In438798114} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In438798114, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out438798114|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In438798114} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-12-07 17:37:19,443 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [746] [746] L830-->L830-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In-138817 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In-138817 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd0~0_In-138817 256))) (.cse3 (= (mod ~x$w_buff1_used~0_In-138817 256) 0))) (or (and (or .cse0 .cse1) (= ~x$w_buff1_used~0_In-138817 |ULTIMATE.start_main_#t~ite44_Out-138817|) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite44_Out-138817|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-138817, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-138817, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-138817, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-138817} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-138817, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-138817, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-138817, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-138817|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-138817} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 17:37:19,444 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [751] [751] L831-->L831-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In-2116662934 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-2116662934 256)))) (or (and (= ~x$r_buff0_thd0~0_In-2116662934 |ULTIMATE.start_main_#t~ite45_Out-2116662934|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite45_Out-2116662934|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-2116662934, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2116662934} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-2116662934, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-2116662934|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2116662934} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 17:37:19,444 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [741] [741] L832-->L832-2: Formula: (let ((.cse3 (= (mod ~x$w_buff1_used~0_In-662591056 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd0~0_In-662591056 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In-662591056 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd0~0_In-662591056 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite46_Out-662591056|)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= ~x$r_buff1_thd0~0_In-662591056 |ULTIMATE.start_main_#t~ite46_Out-662591056|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-662591056, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-662591056, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-662591056, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-662591056} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-662591056, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out-662591056|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-662591056, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-662591056, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-662591056} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 17:37:19,444 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L832-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_26 (ite (= 0 (ite (not (and (= v_~y~0_272 2) (= 0 v_~__unbuffered_p0_EAX~0_53) (= v_~__unbuffered_p2_EBX~0_34 1) (= 1 v_~__unbuffered_p2_EAX~0_34))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_21 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|) (= v_~x$r_buff1_thd0~0_293 |v_ULTIMATE.start_main_#t~ite46_58|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14| (mod v_~main$tmp_guard1~0_26 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_21 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_53, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_58|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_34, ~y~0=v_~y~0_272} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_53, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_21, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_57|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_26, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_34, ~y~0=v_~y~0_272, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_293, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ~x$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:37:19,495 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 05:37:19 BasicIcfg [2019-12-07 17:37:19,496 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 17:37:19,496 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 17:37:19,496 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 17:37:19,496 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 17:37:19,497 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:35:13" (3/4) ... [2019-12-07 17:37:19,499 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 17:37:19,499 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [808] [808] ULTIMATE.startENTRY-->L818: Formula: (let ((.cse0 (store |v_#valid_64| 0 0))) (and (= 0 v_~x$read_delayed_var~0.base_6) (= v_~x$r_buff1_thd1~0_448 0) (= 0 v_~x$read_delayed_var~0.offset_6) (= 0 v_~x$w_buff1_used~0_643) (= 0 v_~x~0_243) (= v_~__unbuffered_p2_EBX~0_64 0) (= 0 v_~__unbuffered_p0_EAX~0_82) (= 0 v_~x$r_buff1_thd2~0_283) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1897~0.base_26|)) (= v_~x$flush_delayed~0_67 0) (= 0 v_~__unbuffered_p2_EAX~0_64) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1897~0.base_26|) (= v_~main$tmp_guard1~0_51 0) (= v_~main$tmp_guard0~0_41 0) (< 0 |v_#StackHeapBarrier_17|) (= v_~x$r_buff1_thd0~0_322 0) (= 0 v_~x$w_buff1~0_350) (= v_~weak$$choice2~0_208 0) (= 0 v_~x$w_buff0~0_432) (= 0 v_~x$read_delayed~0_6) (= 0 v_~__unbuffered_cnt~0_96) (= 0 v_~x$r_buff0_thd3~0_150) (= v_~x$r_buff0_thd1~0_385 0) (= 0 v_~x$r_buff1_thd3~0_288) (= |v_#valid_62| (store .cse0 |v_ULTIMATE.start_main_~#t1897~0.base_26| 1)) (= v_~x$mem_tmp~0_44 0) (= 0 v_~x$r_buff0_thd2~0_345) (= |v_#NULL.offset_5| 0) (= 0 v_~x$w_buff0_used~0_952) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t1897~0.base_26| 4) |v_#length_23|) (= v_~x$r_buff0_thd0~0_164 0) (= 0 v_~weak$$choice0~0_40) (= v_~y~0_300 0) (= 0 |v_ULTIMATE.start_main_~#t1897~0.offset_20|) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1897~0.base_26| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1897~0.base_26|) |v_ULTIMATE.start_main_~#t1897~0.offset_20| 0)) |v_#memory_int_23|) (= 0 |v_#NULL.base_5|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_24|, #length=|v_#length_24|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_432, ~x$flush_delayed~0=v_~x$flush_delayed~0_67, #NULL.offset=|v_#NULL.offset_5|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_448, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_150, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_40|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_34|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_82, ULTIMATE.start_main_~#t1899~0.base=|v_ULTIMATE.start_main_~#t1899~0.base_21|, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_64, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_164, ULTIMATE.start_main_~#t1898~0.base=|v_ULTIMATE.start_main_~#t1898~0.base_27|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_64, ~x$w_buff1~0=v_~x$w_buff1~0_350, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_643, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_283, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_6, ~weak$$choice0~0=v_~weak$$choice0~0_40, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_96, ~x~0=v_~x~0_243, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_385, ULTIMATE.start_main_~#t1897~0.offset=|v_ULTIMATE.start_main_~#t1897~0.offset_20|, ULTIMATE.start_main_~#t1897~0.base=|v_ULTIMATE.start_main_~#t1897~0.base_26|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_106|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_288, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_51, ~x$mem_tmp~0=v_~x$mem_tmp~0_44, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_51|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_60|, ~y~0=v_~y~0_300, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_15|, ULTIMATE.start_main_~#t1898~0.offset=|v_ULTIMATE.start_main_~#t1898~0.offset_20|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_41, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_322, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_345, #NULL.base=|v_#NULL.base_5|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_952, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_60|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_6, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_23|, ULTIMATE.start_main_~#t1899~0.offset=|v_ULTIMATE.start_main_~#t1899~0.offset_14|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_8|, ~weak$$choice2~0=v_~weak$$choice2~0_208, ~x$read_delayed~0=v_~x$read_delayed~0_6} AuxVars[] AssignedVars[~x$w_buff0~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_~#t1897~0.offset, ~x$flush_delayed~0, ULTIMATE.start_main_~#t1897~0.base, #NULL.offset, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~x$r_buff1_thd1~0, ~main$tmp_guard1~0, ~x$r_buff0_thd3~0, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44, ~__unbuffered_p0_EAX~0, ULTIMATE.start_main_~#t1899~0.base, #length, ~__unbuffered_p2_EAX~0, ~y~0, ~x$r_buff0_thd0~0, ULTIMATE.start_main_~#t1898~0.base, ULTIMATE.start_main_#t~nondet40, ~__unbuffered_p2_EBX~0, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_~#t1898~0.offset, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ~x$read_delayed_var~0.base, #NULL.base, ~x$w_buff0_used~0, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_#t~nondet38, #memory_int, ULTIMATE.start_main_~#t1899~0.offset, ~__unbuffered_cnt~0, ULTIMATE.start_main_#t~nondet39, ~weak$$choice2~0, ~x~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 17:37:19,500 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L818-1-->L820: Formula: (and (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1898~0.base_10| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1898~0.base_10|) |v_ULTIMATE.start_main_~#t1898~0.offset_9| 1)) |v_#memory_int_15|) (= 0 |v_ULTIMATE.start_main_~#t1898~0.offset_9|) (not (= 0 |v_ULTIMATE.start_main_~#t1898~0.base_10|)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1898~0.base_10|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1898~0.base_10| 4)) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t1898~0.base_10|)) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t1898~0.base_10| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t1898~0.base=|v_ULTIMATE.start_main_~#t1898~0.base_10|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_4|, ULTIMATE.start_main_~#t1898~0.offset=|v_ULTIMATE.start_main_~#t1898~0.offset_9|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1898~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, ULTIMATE.start_main_~#t1898~0.offset, #length] because there is no mapped edge [2019-12-07 17:37:19,500 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [672] [672] P1ENTRY-->L5-3: Formula: (and (= v_P1Thread1of1ForFork0_~arg.base_6 |v_P1Thread1of1ForFork0_#in~arg.base_8|) (= 1 v_~x$w_buff0_used~0_82) (= v_P1Thread1of1ForFork0_~arg.offset_6 |v_P1Thread1of1ForFork0_#in~arg.offset_8|) (= v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_8 |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|) (= v_~x$w_buff1_used~0_45 v_~x$w_buff0_used~0_83) (= (ite (not (and (not (= (mod v_~x$w_buff1_used~0_45 256) 0)) (not (= (mod v_~x$w_buff0_used~0_82 256) 0)))) 1 0) |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|) (= v_~x$w_buff0~0_23 v_~x$w_buff1~0_17) (not (= 0 v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_8)) (= 1 v_~x$w_buff0~0_22)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_23, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_8|, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_8|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_83} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_22, P1Thread1of1ForFork0___VERIFIER_assert_~expression=v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_8, P1Thread1of1ForFork0_~arg.offset=v_P1Thread1of1ForFork0_~arg.offset_6, P1Thread1of1ForFork0_~arg.base=v_P1Thread1of1ForFork0_~arg.base_6, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_8|, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|, ~x$w_buff1~0=v_~x$w_buff1~0_17, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_8|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_45, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_82} AuxVars[] AssignedVars[~x$w_buff0~0, P1Thread1of1ForFork0___VERIFIER_assert_~expression, P1Thread1of1ForFork0_~arg.offset, P1Thread1of1ForFork0_~arg.base, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 17:37:19,500 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L820-1-->L822: Formula: (and (not (= |v_ULTIMATE.start_main_~#t1899~0.base_11| 0)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1899~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1899~0.base_11|) |v_ULTIMATE.start_main_~#t1899~0.offset_10| 2)) |v_#memory_int_13|) (= (select |v_#valid_28| |v_ULTIMATE.start_main_~#t1899~0.base_11|) 0) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t1899~0.base_11| 4)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1899~0.base_11|) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t1899~0.base_11| 1)) (= 0 |v_ULTIMATE.start_main_~#t1899~0.offset_10|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_14|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t1899~0.base=|v_ULTIMATE.start_main_~#t1899~0.base_11|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t1899~0.offset=|v_ULTIMATE.start_main_~#t1899~0.offset_10|, #length=|v_#length_13|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1899~0.base, #valid, #memory_int, ULTIMATE.start_main_~#t1899~0.offset, #length, ULTIMATE.start_main_#t~nondet39] because there is no mapped edge [2019-12-07 17:37:19,502 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L795-2-->L795-4: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In2022490315 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd3~0_In2022490315 256)))) (or (and (not .cse0) (= ~x$w_buff1~0_In2022490315 |P2Thread1of1ForFork1_#t~ite32_Out2022490315|) (not .cse1)) (and (or .cse1 .cse0) (= ~x~0_In2022490315 |P2Thread1of1ForFork1_#t~ite32_Out2022490315|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In2022490315, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2022490315, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In2022490315, ~x~0=~x~0_In2022490315} OutVars{P2Thread1of1ForFork1_#t~ite32=|P2Thread1of1ForFork1_#t~ite32_Out2022490315|, ~x$w_buff1~0=~x$w_buff1~0_In2022490315, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2022490315, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In2022490315, ~x~0=~x~0_In2022490315} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32] because there is no mapped edge [2019-12-07 17:37:19,503 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [677] [677] L795-4-->L796: Formula: (= v_~x~0_18 |v_P2Thread1of1ForFork1_#t~ite32_6|) InVars {P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_6|} OutVars{P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_5|, P2Thread1of1ForFork1_#t~ite33=|v_P2Thread1of1ForFork1_#t~ite33_5|, ~x~0=v_~x~0_18} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32, P2Thread1of1ForFork1_#t~ite33, ~x~0] because there is no mapped edge [2019-12-07 17:37:19,503 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] L796-->L796-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In183886602 256))) (.cse0 (= (mod ~x$r_buff0_thd3~0_In183886602 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork1_#t~ite34_Out183886602| 0) (not .cse1)) (and (= |P2Thread1of1ForFork1_#t~ite34_Out183886602| ~x$w_buff0_used~0_In183886602) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In183886602, ~x$w_buff0_used~0=~x$w_buff0_used~0_In183886602} OutVars{P2Thread1of1ForFork1_#t~ite34=|P2Thread1of1ForFork1_#t~ite34_Out183886602|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In183886602, ~x$w_buff0_used~0=~x$w_buff0_used~0_In183886602} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-12-07 17:37:19,504 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L740-->L740-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-390473511 256)))) (or (and .cse0 (= |P0Thread1of1ForFork2_#t~ite9_Out-390473511| |P0Thread1of1ForFork2_#t~ite8_Out-390473511|) (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In-390473511 256) 0))) (or (and (= (mod ~x$r_buff1_thd1~0_In-390473511 256) 0) .cse1) (= 0 (mod ~x$w_buff0_used~0_In-390473511 256)) (and (= 0 (mod ~x$w_buff1_used~0_In-390473511 256)) .cse1))) (= |P0Thread1of1ForFork2_#t~ite8_Out-390473511| ~x$w_buff0~0_In-390473511)) (and (= |P0Thread1of1ForFork2_#t~ite8_In-390473511| |P0Thread1of1ForFork2_#t~ite8_Out-390473511|) (= |P0Thread1of1ForFork2_#t~ite9_Out-390473511| ~x$w_buff0~0_In-390473511) (not .cse0)))) InVars {~x$w_buff0~0=~x$w_buff0~0_In-390473511, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-390473511, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_In-390473511|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-390473511, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-390473511, ~weak$$choice2~0=~weak$$choice2~0_In-390473511, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-390473511} OutVars{~x$w_buff0~0=~x$w_buff0~0_In-390473511, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-390473511, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_Out-390473511|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-390473511, P0Thread1of1ForFork2_#t~ite9=|P0Thread1of1ForFork2_#t~ite9_Out-390473511|, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-390473511, ~weak$$choice2~0=~weak$$choice2~0_In-390473511, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-390473511} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite8, P0Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 17:37:19,506 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [747] [747] L776-->L776-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In1977888111 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd2~0_In1977888111 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork0_#t~ite28_Out1977888111| ~x$w_buff0_used~0_In1977888111)) (and (not .cse1) (= 0 |P1Thread1of1ForFork0_#t~ite28_Out1977888111|) (not .cse0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1977888111, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1977888111} OutVars{~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1977888111, P1Thread1of1ForFork0_#t~ite28=|P1Thread1of1ForFork0_#t~ite28_Out1977888111|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1977888111} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite28] because there is no mapped edge [2019-12-07 17:37:19,506 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L777-->L777-2: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In968072109 256))) (.cse3 (= (mod ~x$w_buff0_used~0_In968072109 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In968072109 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd2~0_In968072109 256)))) (or (and (= |P1Thread1of1ForFork0_#t~ite29_Out968072109| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse0 .cse1) (= |P1Thread1of1ForFork0_#t~ite29_Out968072109| ~x$w_buff1_used~0_In968072109)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In968072109, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In968072109, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In968072109, ~x$w_buff0_used~0=~x$w_buff0_used~0_In968072109} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In968072109, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In968072109, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In968072109, P1Thread1of1ForFork0_#t~ite29=|P1Thread1of1ForFork0_#t~ite29_Out968072109|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In968072109} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 17:37:19,507 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [753] [753] L778-->L779: Formula: (let ((.cse1 (= ~x$r_buff0_thd2~0_Out116570076 ~x$r_buff0_thd2~0_In116570076)) (.cse0 (= (mod ~x$r_buff0_thd2~0_In116570076 256) 0)) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In116570076 256)))) (or (and .cse0 .cse1) (and .cse1 .cse2) (and (not .cse0) (not .cse2) (= ~x$r_buff0_thd2~0_Out116570076 0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In116570076, ~x$w_buff0_used~0=~x$w_buff0_used~0_In116570076} OutVars{P1Thread1of1ForFork0_#t~ite30=|P1Thread1of1ForFork0_#t~ite30_Out116570076|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out116570076, ~x$w_buff0_used~0=~x$w_buff0_used~0_In116570076} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite30, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 17:37:19,507 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L779-->L779-2: Formula: (let ((.cse3 (= (mod ~x$w_buff0_used~0_In35455399 256) 0)) (.cse2 (= (mod ~x$r_buff0_thd2~0_In35455399 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd2~0_In35455399 256))) (.cse1 (= (mod ~x$w_buff1_used~0_In35455399 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork0_#t~ite31_Out35455399|)) (and (or .cse3 .cse2) (or .cse0 .cse1) (= |P1Thread1of1ForFork0_#t~ite31_Out35455399| ~x$r_buff1_thd2~0_In35455399)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In35455399, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In35455399, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In35455399, ~x$w_buff0_used~0=~x$w_buff0_used~0_In35455399} OutVars{P1Thread1of1ForFork0_#t~ite31=|P1Thread1of1ForFork0_#t~ite31_Out35455399|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In35455399, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In35455399, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In35455399, ~x$w_buff0_used~0=~x$w_buff0_used~0_In35455399} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 17:37:19,507 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L779-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= v_~x$r_buff1_thd2~0_52 |v_P1Thread1of1ForFork0_#t~ite31_28|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_63 1) v_~__unbuffered_cnt~0_62)) InVars {P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63} OutVars{P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_27|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_52, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 17:37:19,508 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L797-->L797-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff1_thd3~0_In847655870 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In847655870 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In847655870 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In847655870 256)))) (or (and (= |P2Thread1of1ForFork1_#t~ite35_Out847655870| ~x$w_buff1_used~0_In847655870) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |P2Thread1of1ForFork1_#t~ite35_Out847655870| 0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In847655870, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In847655870, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In847655870, ~x$w_buff0_used~0=~x$w_buff0_used~0_In847655870} OutVars{P2Thread1of1ForFork1_#t~ite35=|P2Thread1of1ForFork1_#t~ite35_Out847655870|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In847655870, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In847655870, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In847655870, ~x$w_buff0_used~0=~x$w_buff0_used~0_In847655870} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite35] because there is no mapped edge [2019-12-07 17:37:19,508 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [745] [745] L798-->L798-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In1225683503 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In1225683503 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork1_#t~ite36_Out1225683503| 0)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork1_#t~ite36_Out1225683503| ~x$r_buff0_thd3~0_In1225683503)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1225683503, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1225683503} OutVars{P2Thread1of1ForFork1_#t~ite36=|P2Thread1of1ForFork1_#t~ite36_Out1225683503|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1225683503, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1225683503} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-12-07 17:37:19,510 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L743-->L743-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In293605 256)))) (or (and (= |P0Thread1of1ForFork2_#t~ite17_Out293605| ~x$w_buff1_used~0_In293605) .cse0 (= |P0Thread1of1ForFork2_#t~ite18_Out293605| |P0Thread1of1ForFork2_#t~ite17_Out293605|) (let ((.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In293605 256)))) (or (= 0 (mod ~x$w_buff0_used~0_In293605 256)) (and (= 0 (mod ~x$w_buff1_used~0_In293605 256)) .cse1) (and (= 0 (mod ~x$r_buff1_thd1~0_In293605 256)) .cse1)))) (and (not .cse0) (= |P0Thread1of1ForFork2_#t~ite17_In293605| |P0Thread1of1ForFork2_#t~ite17_Out293605|) (= |P0Thread1of1ForFork2_#t~ite18_Out293605| ~x$w_buff1_used~0_In293605)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In293605, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_In293605|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In293605, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In293605, ~weak$$choice2~0=~weak$$choice2~0_In293605, ~x$w_buff0_used~0=~x$w_buff0_used~0_In293605} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In293605, P0Thread1of1ForFork2_#t~ite18=|P0Thread1of1ForFork2_#t~ite18_Out293605|, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_Out293605|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In293605, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In293605, ~weak$$choice2~0=~weak$$choice2~0_In293605, ~x$w_buff0_used~0=~x$w_buff0_used~0_In293605} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite18, P0Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 17:37:19,510 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [730] [730] L744-->L745: Formula: (and (= v_~x$r_buff0_thd1~0_104 v_~x$r_buff0_thd1~0_103) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_104, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{P0Thread1of1ForFork2_#t~ite20=|v_P0Thread1of1ForFork2_#t~ite20_10|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_103, P0Thread1of1ForFork2_#t~ite19=|v_P0Thread1of1ForFork2_#t~ite19_11|, ~weak$$choice2~0=v_~weak$$choice2~0_39, P0Thread1of1ForFork2_#t~ite21=|v_P0Thread1of1ForFork2_#t~ite21_6|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite20, ~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite19, P0Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 17:37:19,510 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L745-->L745-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-413139220 256)))) (or (and (= |P0Thread1of1ForFork2_#t~ite24_Out-413139220| ~x$r_buff1_thd1~0_In-413139220) (= |P0Thread1of1ForFork2_#t~ite23_In-413139220| |P0Thread1of1ForFork2_#t~ite23_Out-413139220|) (not .cse0)) (and .cse0 (= |P0Thread1of1ForFork2_#t~ite24_Out-413139220| |P0Thread1of1ForFork2_#t~ite23_Out-413139220|) (= ~x$r_buff1_thd1~0_In-413139220 |P0Thread1of1ForFork2_#t~ite23_Out-413139220|) (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In-413139220 256) 0))) (or (= 0 (mod ~x$w_buff0_used~0_In-413139220 256)) (and .cse1 (= (mod ~x$r_buff1_thd1~0_In-413139220 256) 0)) (and .cse1 (= (mod ~x$w_buff1_used~0_In-413139220 256) 0))))))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-413139220, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-413139220, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-413139220, ~weak$$choice2~0=~weak$$choice2~0_In-413139220, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_In-413139220|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-413139220} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-413139220, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-413139220, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-413139220, P0Thread1of1ForFork2_#t~ite24=|P0Thread1of1ForFork2_#t~ite24_Out-413139220|, ~weak$$choice2~0=~weak$$choice2~0_In-413139220, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_Out-413139220|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-413139220} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite24, P0Thread1of1ForFork2_#t~ite23] because there is no mapped edge [2019-12-07 17:37:19,511 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L799-->L799-2: Formula: (let ((.cse3 (= 0 (mod ~x$w_buff1_used~0_In1226845861 256))) (.cse2 (= 0 (mod ~x$r_buff1_thd3~0_In1226845861 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In1226845861 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1226845861 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork1_#t~ite37_Out1226845861| ~x$r_buff1_thd3~0_In1226845861)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= 0 |P2Thread1of1ForFork1_#t~ite37_Out1226845861|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1226845861, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1226845861, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1226845861, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1226845861} OutVars{P2Thread1of1ForFork1_#t~ite37=|P2Thread1of1ForFork1_#t~ite37_Out1226845861|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1226845861, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1226845861, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1226845861, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1226845861} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-12-07 17:37:19,511 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L799-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_57 1) v_~__unbuffered_cnt~0_56) (= v_~x$r_buff1_thd3~0_54 |v_P2Thread1of1ForFork1_#t~ite37_28|) (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|)) InVars {P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57} OutVars{P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_27|, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_54, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37, P2Thread1of1ForFork1_#res.base, ~x$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 17:37:19,511 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [703] [703] L747-->L755: Formula: (and (= v_~x$flush_delayed~0_16 0) (not (= (mod v_~x$flush_delayed~0_17 256) 0)) (= v_~x~0_35 v_~x$mem_tmp~0_10) (= (+ v_~__unbuffered_cnt~0_30 1) v_~__unbuffered_cnt~0_29)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_17, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_30, ~x$mem_tmp~0=v_~x$mem_tmp~0_10} OutVars{P0Thread1of1ForFork2_#t~ite25=|v_P0Thread1of1ForFork2_#t~ite25_13|, ~x$flush_delayed~0=v_~x$flush_delayed~0_16, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_29, ~x$mem_tmp~0=v_~x$mem_tmp~0_10, ~x~0=v_~x~0_35} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite25, ~x$flush_delayed~0, ~__unbuffered_cnt~0, ~x~0] because there is no mapped edge [2019-12-07 17:37:19,512 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [698] [698] L826-->L828-2: Formula: (and (or (= 0 (mod v_~x$w_buff0_used~0_172 256)) (= (mod v_~x$r_buff0_thd0~0_29 256) 0)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_29, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_172} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_29, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_172} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 17:37:19,512 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L828-2-->L828-4: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In-1534604350 256))) (.cse0 (= (mod ~x$r_buff1_thd0~0_In-1534604350 256) 0))) (or (and (not .cse0) (= ~x$w_buff1~0_In-1534604350 |ULTIMATE.start_main_#t~ite41_Out-1534604350|) (not .cse1)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite41_Out-1534604350| ~x~0_In-1534604350)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1534604350, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1534604350, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1534604350, ~x~0=~x~0_In-1534604350} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out-1534604350|, ~x$w_buff1~0=~x$w_buff1~0_In-1534604350, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1534604350, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1534604350, ~x~0=~x~0_In-1534604350} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41] because there is no mapped edge [2019-12-07 17:37:19,512 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L828-4-->L829: Formula: (= v_~x~0_24 |v_ULTIMATE.start_main_#t~ite41_11|) InVars {ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_11|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_10|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_6|, ~x~0=v_~x~0_24} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite42, ~x~0] because there is no mapped edge [2019-12-07 17:37:19,512 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [744] [744] L829-->L829-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In438798114 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In438798114 256)))) (or (and (= |ULTIMATE.start_main_#t~ite43_Out438798114| ~x$w_buff0_used~0_In438798114) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite43_Out438798114| 0) (not .cse1) (not .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In438798114, ~x$w_buff0_used~0=~x$w_buff0_used~0_In438798114} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In438798114, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out438798114|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In438798114} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-12-07 17:37:19,512 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [746] [746] L830-->L830-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In-138817 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In-138817 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd0~0_In-138817 256))) (.cse3 (= (mod ~x$w_buff1_used~0_In-138817 256) 0))) (or (and (or .cse0 .cse1) (= ~x$w_buff1_used~0_In-138817 |ULTIMATE.start_main_#t~ite44_Out-138817|) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite44_Out-138817|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-138817, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-138817, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-138817, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-138817} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-138817, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-138817, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-138817, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-138817|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-138817} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 17:37:19,513 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [751] [751] L831-->L831-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In-2116662934 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-2116662934 256)))) (or (and (= ~x$r_buff0_thd0~0_In-2116662934 |ULTIMATE.start_main_#t~ite45_Out-2116662934|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite45_Out-2116662934|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-2116662934, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2116662934} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-2116662934, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-2116662934|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2116662934} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 17:37:19,514 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [741] [741] L832-->L832-2: Formula: (let ((.cse3 (= (mod ~x$w_buff1_used~0_In-662591056 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd0~0_In-662591056 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In-662591056 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd0~0_In-662591056 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite46_Out-662591056|)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= ~x$r_buff1_thd0~0_In-662591056 |ULTIMATE.start_main_#t~ite46_Out-662591056|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-662591056, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-662591056, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-662591056, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-662591056} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-662591056, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out-662591056|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-662591056, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-662591056, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-662591056} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 17:37:19,514 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L832-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_26 (ite (= 0 (ite (not (and (= v_~y~0_272 2) (= 0 v_~__unbuffered_p0_EAX~0_53) (= v_~__unbuffered_p2_EBX~0_34 1) (= 1 v_~__unbuffered_p2_EAX~0_34))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_21 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|) (= v_~x$r_buff1_thd0~0_293 |v_ULTIMATE.start_main_#t~ite46_58|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14| (mod v_~main$tmp_guard1~0_26 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_21 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_53, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_58|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_34, ~y~0=v_~y~0_272} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_53, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_21, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_57|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_26, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_34, ~y~0=v_~y~0_272, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_293, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ~x$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:37:19,580 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_79096233-b2a5-4d99-a369-e297c6b40e57/bin/uautomizer/witness.graphml [2019-12-07 17:37:19,581 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 17:37:19,582 INFO L168 Benchmark]: Toolchain (without parser) took 126676.11 ms. Allocated memory was 1.0 GB in the beginning and 8.0 GB in the end (delta: 7.0 GB). Free memory was 940.8 MB in the beginning and 3.8 GB in the end (delta: -2.8 GB). Peak memory consumption was 4.2 GB. Max. memory is 11.5 GB. [2019-12-07 17:37:19,582 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:37:19,583 INFO L168 Benchmark]: CACSL2BoogieTranslator took 386.68 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 90.2 MB). Free memory was 940.8 MB in the beginning and 1.1 GB in the end (delta: -118.8 MB). Peak memory consumption was 18.1 MB. Max. memory is 11.5 GB. [2019-12-07 17:37:19,583 INFO L168 Benchmark]: Boogie Procedure Inliner took 37.84 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:37:19,583 INFO L168 Benchmark]: Boogie Preprocessor took 25.14 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:37:19,583 INFO L168 Benchmark]: RCFGBuilder took 390.62 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 998.9 MB in the end (delta: 55.3 MB). Peak memory consumption was 55.3 MB. Max. memory is 11.5 GB. [2019-12-07 17:37:19,584 INFO L168 Benchmark]: TraceAbstraction took 125747.39 ms. Allocated memory was 1.1 GB in the beginning and 8.0 GB in the end (delta: 6.9 GB). Free memory was 998.9 MB in the beginning and 3.8 GB in the end (delta: -2.8 GB). Peak memory consumption was 4.1 GB. Max. memory is 11.5 GB. [2019-12-07 17:37:19,584 INFO L168 Benchmark]: Witness Printer took 84.83 ms. Allocated memory is still 8.0 GB. Free memory was 3.8 GB in the beginning and 3.8 GB in the end (delta: 46.9 MB). Peak memory consumption was 46.9 MB. Max. memory is 11.5 GB. [2019-12-07 17:37:19,586 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 386.68 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 90.2 MB). Free memory was 940.8 MB in the beginning and 1.1 GB in the end (delta: -118.8 MB). Peak memory consumption was 18.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 37.84 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.14 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 390.62 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 998.9 MB in the end (delta: 55.3 MB). Peak memory consumption was 55.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 125747.39 ms. Allocated memory was 1.1 GB in the beginning and 8.0 GB in the end (delta: 6.9 GB). Free memory was 998.9 MB in the beginning and 3.8 GB in the end (delta: -2.8 GB). Peak memory consumption was 4.1 GB. Max. memory is 11.5 GB. * Witness Printer took 84.83 ms. Allocated memory is still 8.0 GB. Free memory was 3.8 GB in the beginning and 3.8 GB in the end (delta: 46.9 MB). Peak memory consumption was 46.9 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 163 ProgramPointsBefore, 83 ProgramPointsAfterwards, 194 TransitionsBefore, 92 TransitionsAfterwards, 16696 CoEnabledTransitionPairs, 7 FixpointIterations, 32 TrivialSequentialCompositions, 45 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 36 ConcurrentYvCompositions, 26 ChoiceCompositions, 6760 VarBasedMoverChecksPositive, 302 VarBasedMoverChecksNegative, 126 SemBasedMoverChecksPositive, 261 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 66367 CheckedPairsTotal, 113 TotalNumberOfCompositions - CounterExampleResult [Line: 5]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L818] FCALL, FORK 0 pthread_create(&t1897, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L820] FCALL, FORK 0 pthread_create(&t1898, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L822] FCALL, FORK 0 pthread_create(&t1899, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0] [L765] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L766] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L767] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L768] 2 x$r_buff1_thd3 = x$r_buff0_thd3 [L769] 2 x$r_buff0_thd2 = (_Bool)1 [L772] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L775] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L789] 3 __unbuffered_p2_EAX = y [L792] 3 __unbuffered_p2_EBX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L795] 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L775] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L730] 1 y = 2 [L735] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L736] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L737] 1 x$flush_delayed = weak$$choice2 [L738] 1 x$mem_tmp = x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L739] EXPR 1 !x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1) VAL [!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L739] 1 x = !x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1) [L740] 1 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff0)) [L741] EXPR 1 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1))=0, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L741] 1 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1)) [L776] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L777] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L796] 3 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used [L797] 3 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used [L798] 3 x$r_buff0_thd3 = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$r_buff0_thd3 [L742] EXPR 1 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used))=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L742] 1 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used)) [L743] 1 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L745] 1 x$r_buff1_thd1 = weak$$choice2 ? x$r_buff1_thd1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$r_buff1_thd1 : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L746] 1 __unbuffered_p0_EAX = x VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L824] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [\result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L829] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L830] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L831] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 154 locations, 2 error locations. Result: UNSAFE, OverallTime: 125.5s, OverallIterations: 35, TraceHistogramMax: 1, AutomataDifference: 29.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 5672 SDtfs, 8163 SDslu, 16775 SDs, 0 SdLazy, 10382 SolverSat, 366 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 6.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 365 GetRequests, 39 SyntacticMatches, 17 SemanticMatches, 309 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1046 ImplicationChecksByTransitivity, 2.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=281033occurred in iteration=7, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 80.6s AutomataMinimizationTime, 34 MinimizatonAttempts, 270647 StatesRemovedByMinimization, 32 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.7s InterpolantComputationTime, 1250 NumberOfCodeBlocks, 1250 NumberOfCodeBlocksAsserted, 35 NumberOfCheckSat, 1160 ConstructedInterpolants, 0 QuantifiedInterpolants, 260036 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 34 InterpolantComputations, 34 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...