./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe005_power.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_d8739764-5d4e-4321-9a25-da3bc01d8857/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_d8739764-5d4e-4321-9a25-da3bc01d8857/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_d8739764-5d4e-4321-9a25-da3bc01d8857/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_d8739764-5d4e-4321-9a25-da3bc01d8857/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe005_power.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_d8739764-5d4e-4321-9a25-da3bc01d8857/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_d8739764-5d4e-4321-9a25-da3bc01d8857/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 2ff47909c02cdf9a0dfc30a39db68f54bc5b59b5 ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 14:28:46,177 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 14:28:46,178 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 14:28:46,187 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 14:28:46,187 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 14:28:46,187 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 14:28:46,188 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 14:28:46,190 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 14:28:46,191 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 14:28:46,192 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 14:28:46,192 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 14:28:46,193 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 14:28:46,193 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 14:28:46,194 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 14:28:46,195 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 14:28:46,195 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 14:28:46,196 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 14:28:46,197 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 14:28:46,198 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 14:28:46,199 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 14:28:46,201 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 14:28:46,202 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 14:28:46,203 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 14:28:46,203 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 14:28:46,205 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 14:28:46,205 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 14:28:46,205 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 14:28:46,206 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 14:28:46,206 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 14:28:46,207 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 14:28:46,207 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 14:28:46,207 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 14:28:46,208 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 14:28:46,208 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 14:28:46,209 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 14:28:46,209 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 14:28:46,210 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 14:28:46,210 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 14:28:46,210 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 14:28:46,211 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 14:28:46,211 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 14:28:46,212 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_d8739764-5d4e-4321-9a25-da3bc01d8857/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 14:28:46,224 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 14:28:46,224 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 14:28:46,225 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 14:28:46,226 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 14:28:46,226 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 14:28:46,226 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 14:28:46,226 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 14:28:46,226 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 14:28:46,227 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 14:28:46,227 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 14:28:46,227 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 14:28:46,227 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 14:28:46,227 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 14:28:46,228 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 14:28:46,228 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 14:28:46,228 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 14:28:46,228 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 14:28:46,228 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 14:28:46,229 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 14:28:46,229 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 14:28:46,229 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 14:28:46,229 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 14:28:46,229 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 14:28:46,229 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 14:28:46,230 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 14:28:46,230 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 14:28:46,230 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 14:28:46,230 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 14:28:46,230 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 14:28:46,231 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_d8739764-5d4e-4321-9a25-da3bc01d8857/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2ff47909c02cdf9a0dfc30a39db68f54bc5b59b5 [2019-12-07 14:28:46,339 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 14:28:46,347 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 14:28:46,349 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 14:28:46,350 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 14:28:46,350 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 14:28:46,350 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_d8739764-5d4e-4321-9a25-da3bc01d8857/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe005_power.opt.i [2019-12-07 14:28:46,388 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_d8739764-5d4e-4321-9a25-da3bc01d8857/bin/uautomizer/data/6f13270a2/e85c2dbd2e2c4b3eafaf586b90743c44/FLAG3004e141b [2019-12-07 14:28:46,837 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 14:28:46,837 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_d8739764-5d4e-4321-9a25-da3bc01d8857/sv-benchmarks/c/pthread-wmm/safe005_power.opt.i [2019-12-07 14:28:46,847 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_d8739764-5d4e-4321-9a25-da3bc01d8857/bin/uautomizer/data/6f13270a2/e85c2dbd2e2c4b3eafaf586b90743c44/FLAG3004e141b [2019-12-07 14:28:46,856 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_d8739764-5d4e-4321-9a25-da3bc01d8857/bin/uautomizer/data/6f13270a2/e85c2dbd2e2c4b3eafaf586b90743c44 [2019-12-07 14:28:46,858 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 14:28:46,859 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 14:28:46,860 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 14:28:46,860 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 14:28:46,862 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 14:28:46,863 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 02:28:46" (1/1) ... [2019-12-07 14:28:46,864 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3f8fae9c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:28:46, skipping insertion in model container [2019-12-07 14:28:46,865 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 02:28:46" (1/1) ... [2019-12-07 14:28:46,870 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 14:28:46,897 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 14:28:47,130 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 14:28:47,137 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 14:28:47,176 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 14:28:47,221 INFO L208 MainTranslator]: Completed translation [2019-12-07 14:28:47,221 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:28:47 WrapperNode [2019-12-07 14:28:47,221 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 14:28:47,222 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 14:28:47,222 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 14:28:47,222 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 14:28:47,227 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:28:47" (1/1) ... [2019-12-07 14:28:47,240 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:28:47" (1/1) ... [2019-12-07 14:28:47,258 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 14:28:47,258 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 14:28:47,258 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 14:28:47,258 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 14:28:47,264 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:28:47" (1/1) ... [2019-12-07 14:28:47,265 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:28:47" (1/1) ... [2019-12-07 14:28:47,268 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:28:47" (1/1) ... [2019-12-07 14:28:47,268 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:28:47" (1/1) ... [2019-12-07 14:28:47,274 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:28:47" (1/1) ... [2019-12-07 14:28:47,277 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:28:47" (1/1) ... [2019-12-07 14:28:47,279 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:28:47" (1/1) ... [2019-12-07 14:28:47,282 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 14:28:47,283 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 14:28:47,283 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 14:28:47,283 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 14:28:47,283 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:28:47" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_d8739764-5d4e-4321-9a25-da3bc01d8857/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 14:28:47,326 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 14:28:47,326 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 14:28:47,326 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 14:28:47,326 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 14:28:47,327 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 14:28:47,327 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 14:28:47,327 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 14:28:47,327 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 14:28:47,327 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 14:28:47,327 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 14:28:47,327 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 14:28:47,327 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 14:28:47,327 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 14:28:47,328 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 14:28:47,677 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 14:28:47,677 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 14:28:47,678 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:28:47 BoogieIcfgContainer [2019-12-07 14:28:47,678 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 14:28:47,679 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 14:28:47,679 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 14:28:47,680 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 14:28:47,681 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 02:28:46" (1/3) ... [2019-12-07 14:28:47,681 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4848f16d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 02:28:47, skipping insertion in model container [2019-12-07 14:28:47,681 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:28:47" (2/3) ... [2019-12-07 14:28:47,681 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4848f16d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 02:28:47, skipping insertion in model container [2019-12-07 14:28:47,681 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:28:47" (3/3) ... [2019-12-07 14:28:47,682 INFO L109 eAbstractionObserver]: Analyzing ICFG safe005_power.opt.i [2019-12-07 14:28:47,688 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 14:28:47,689 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 14:28:47,693 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 14:28:47,694 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 14:28:47,717 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,717 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,717 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,717 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,717 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,717 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,717 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,717 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,718 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,718 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,718 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,718 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,718 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,719 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,719 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,719 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,719 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,719 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,719 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,719 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,719 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,719 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,720 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,720 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,720 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,720 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,720 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,720 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,720 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,720 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,720 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,721 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,721 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,721 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,721 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,721 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,721 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,721 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,724 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,724 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,724 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,724 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,724 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,724 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,724 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,724 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,725 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,725 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,725 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,725 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,725 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,725 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,725 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,725 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,725 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,725 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,726 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,726 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,726 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,726 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,726 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,726 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,726 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,726 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,726 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,727 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,727 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,727 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,727 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,727 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,727 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,727 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,727 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,727 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,727 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,728 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,728 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,728 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,728 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,728 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,728 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,729 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,729 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,729 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,729 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,729 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,729 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,729 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,729 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,730 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,730 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,730 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,730 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,730 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,730 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,730 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,730 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,730 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,731 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,731 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,731 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,731 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,731 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,731 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,731 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,731 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,731 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,731 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,732 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,732 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,732 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,732 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,732 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,732 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,732 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,733 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,733 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,733 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,733 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,733 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,733 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,733 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,733 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,733 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,733 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,734 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,734 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,734 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,734 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,734 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,734 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,734 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,734 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,734 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,735 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,735 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,735 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,735 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,735 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,735 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:28:47,746 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 14:28:47,758 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 14:28:47,759 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 14:28:47,759 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 14:28:47,759 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 14:28:47,759 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 14:28:47,759 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 14:28:47,759 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 14:28:47,759 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 14:28:47,770 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 163 places, 194 transitions [2019-12-07 14:28:47,771 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 163 places, 194 transitions [2019-12-07 14:28:47,822 INFO L134 PetriNetUnfolder]: 41/191 cut-off events. [2019-12-07 14:28:47,822 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 14:28:47,831 INFO L76 FinitePrefix]: Finished finitePrefix Result has 201 conditions, 191 events. 41/191 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 721 event pairs. 9/157 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 14:28:47,846 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 163 places, 194 transitions [2019-12-07 14:28:47,874 INFO L134 PetriNetUnfolder]: 41/191 cut-off events. [2019-12-07 14:28:47,875 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 14:28:47,880 INFO L76 FinitePrefix]: Finished finitePrefix Result has 201 conditions, 191 events. 41/191 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 721 event pairs. 9/157 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 14:28:47,895 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 16696 [2019-12-07 14:28:47,896 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 14:28:50,924 WARN L192 SmtUtils]: Spent 164.00 ms on a formula simplification. DAG size of input: 89 DAG size of output: 87 [2019-12-07 14:28:51,070 INFO L206 etLargeBlockEncoding]: Checked pairs total: 66367 [2019-12-07 14:28:51,071 INFO L214 etLargeBlockEncoding]: Total number of compositions: 113 [2019-12-07 14:28:51,073 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 83 places, 92 transitions [2019-12-07 14:29:00,796 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 86132 states. [2019-12-07 14:29:00,798 INFO L276 IsEmpty]: Start isEmpty. Operand 86132 states. [2019-12-07 14:29:00,802 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-07 14:29:00,802 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:29:00,802 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-07 14:29:00,803 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:29:00,806 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:29:00,806 INFO L82 PathProgramCache]: Analyzing trace with hash 795562213, now seen corresponding path program 1 times [2019-12-07 14:29:00,811 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:29:00,812 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1629721930] [2019-12-07 14:29:00,812 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:29:00,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:29:00,954 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:29:00,954 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1629721930] [2019-12-07 14:29:00,955 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:29:00,955 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 14:29:00,956 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1877431285] [2019-12-07 14:29:00,959 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:29:00,959 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:29:00,968 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:29:00,968 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:29:00,970 INFO L87 Difference]: Start difference. First operand 86132 states. Second operand 3 states. [2019-12-07 14:29:01,572 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:29:01,572 INFO L93 Difference]: Finished difference Result 85012 states and 367904 transitions. [2019-12-07 14:29:01,573 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:29:01,574 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-07 14:29:01,574 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:29:02,190 INFO L225 Difference]: With dead ends: 85012 [2019-12-07 14:29:02,190 INFO L226 Difference]: Without dead ends: 80140 [2019-12-07 14:29:02,191 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:29:05,195 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80140 states. [2019-12-07 14:29:06,360 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80140 to 80140. [2019-12-07 14:29:06,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80140 states. [2019-12-07 14:29:06,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80140 states to 80140 states and 346330 transitions. [2019-12-07 14:29:06,625 INFO L78 Accepts]: Start accepts. Automaton has 80140 states and 346330 transitions. Word has length 5 [2019-12-07 14:29:06,626 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:29:06,626 INFO L462 AbstractCegarLoop]: Abstraction has 80140 states and 346330 transitions. [2019-12-07 14:29:06,626 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:29:06,626 INFO L276 IsEmpty]: Start isEmpty. Operand 80140 states and 346330 transitions. [2019-12-07 14:29:06,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 14:29:06,633 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:29:06,633 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:29:06,633 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:29:06,633 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:29:06,633 INFO L82 PathProgramCache]: Analyzing trace with hash -36571135, now seen corresponding path program 1 times [2019-12-07 14:29:06,633 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:29:06,634 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1816161226] [2019-12-07 14:29:06,634 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:29:06,654 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:29:06,695 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:29:06,696 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1816161226] [2019-12-07 14:29:06,696 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:29:06,696 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:29:06,696 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [163484596] [2019-12-07 14:29:06,697 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:29:06,698 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:29:06,698 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:29:06,698 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:29:06,698 INFO L87 Difference]: Start difference. First operand 80140 states and 346330 transitions. Second operand 4 states. [2019-12-07 14:29:08,736 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:29:08,736 INFO L93 Difference]: Finished difference Result 123388 states and 510822 transitions. [2019-12-07 14:29:08,737 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:29:08,737 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 14:29:08,737 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:29:09,059 INFO L225 Difference]: With dead ends: 123388 [2019-12-07 14:29:09,059 INFO L226 Difference]: Without dead ends: 123290 [2019-12-07 14:29:09,060 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:29:12,475 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123290 states. [2019-12-07 14:29:14,052 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123290 to 114218. [2019-12-07 14:29:14,053 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114218 states. [2019-12-07 14:29:14,375 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114218 states to 114218 states and 477794 transitions. [2019-12-07 14:29:14,375 INFO L78 Accepts]: Start accepts. Automaton has 114218 states and 477794 transitions. Word has length 13 [2019-12-07 14:29:14,376 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:29:14,376 INFO L462 AbstractCegarLoop]: Abstraction has 114218 states and 477794 transitions. [2019-12-07 14:29:14,376 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:29:14,376 INFO L276 IsEmpty]: Start isEmpty. Operand 114218 states and 477794 transitions. [2019-12-07 14:29:14,378 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 14:29:14,378 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:29:14,378 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:29:14,379 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:29:14,379 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:29:14,379 INFO L82 PathProgramCache]: Analyzing trace with hash 424299118, now seen corresponding path program 1 times [2019-12-07 14:29:14,379 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:29:14,379 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [811145436] [2019-12-07 14:29:14,379 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:29:14,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:29:14,426 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:29:14,426 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [811145436] [2019-12-07 14:29:14,426 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:29:14,426 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:29:14,427 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1917096716] [2019-12-07 14:29:14,427 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:29:14,427 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:29:14,427 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:29:14,427 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:29:14,427 INFO L87 Difference]: Start difference. First operand 114218 states and 477794 transitions. Second operand 4 states. [2019-12-07 14:29:15,582 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:29:15,582 INFO L93 Difference]: Finished difference Result 159677 states and 652290 transitions. [2019-12-07 14:29:15,583 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:29:15,583 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 14:29:15,583 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:29:15,973 INFO L225 Difference]: With dead ends: 159677 [2019-12-07 14:29:15,973 INFO L226 Difference]: Without dead ends: 159565 [2019-12-07 14:29:15,974 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:29:21,617 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159565 states. [2019-12-07 14:29:23,559 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159565 to 136035. [2019-12-07 14:29:23,560 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136035 states. [2019-12-07 14:29:23,935 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136035 states to 136035 states and 564894 transitions. [2019-12-07 14:29:23,936 INFO L78 Accepts]: Start accepts. Automaton has 136035 states and 564894 transitions. Word has length 13 [2019-12-07 14:29:23,936 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:29:23,936 INFO L462 AbstractCegarLoop]: Abstraction has 136035 states and 564894 transitions. [2019-12-07 14:29:23,936 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:29:23,936 INFO L276 IsEmpty]: Start isEmpty. Operand 136035 states and 564894 transitions. [2019-12-07 14:29:23,938 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 14:29:23,939 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:29:23,939 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:29:23,939 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:29:23,939 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:29:23,939 INFO L82 PathProgramCache]: Analyzing trace with hash -2100241523, now seen corresponding path program 1 times [2019-12-07 14:29:23,939 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:29:23,939 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [258071617] [2019-12-07 14:29:23,939 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:29:23,949 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:29:23,965 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:29:23,965 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [258071617] [2019-12-07 14:29:23,965 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:29:23,965 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:29:23,965 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [218046456] [2019-12-07 14:29:23,966 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:29:23,966 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:29:23,966 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:29:23,966 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:29:23,966 INFO L87 Difference]: Start difference. First operand 136035 states and 564894 transitions. Second operand 3 states. [2019-12-07 14:29:24,733 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:29:24,733 INFO L93 Difference]: Finished difference Result 181618 states and 742473 transitions. [2019-12-07 14:29:24,733 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:29:24,733 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 14 [2019-12-07 14:29:24,733 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:29:25,192 INFO L225 Difference]: With dead ends: 181618 [2019-12-07 14:29:25,192 INFO L226 Difference]: Without dead ends: 181618 [2019-12-07 14:29:25,193 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:29:29,615 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181618 states. [2019-12-07 14:29:33,590 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181618 to 152081. [2019-12-07 14:29:33,590 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152081 states. [2019-12-07 14:29:34,050 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152081 states to 152081 states and 628919 transitions. [2019-12-07 14:29:34,050 INFO L78 Accepts]: Start accepts. Automaton has 152081 states and 628919 transitions. Word has length 14 [2019-12-07 14:29:34,050 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:29:34,050 INFO L462 AbstractCegarLoop]: Abstraction has 152081 states and 628919 transitions. [2019-12-07 14:29:34,050 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:29:34,051 INFO L276 IsEmpty]: Start isEmpty. Operand 152081 states and 628919 transitions. [2019-12-07 14:29:34,053 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 14:29:34,053 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:29:34,053 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:29:34,053 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:29:34,054 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:29:34,054 INFO L82 PathProgramCache]: Analyzing trace with hash -2100376187, now seen corresponding path program 1 times [2019-12-07 14:29:34,054 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:29:34,054 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1945365527] [2019-12-07 14:29:34,054 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:29:34,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:29:34,086 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:29:34,086 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1945365527] [2019-12-07 14:29:34,086 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:29:34,086 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:29:34,086 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1698743963] [2019-12-07 14:29:34,086 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:29:34,087 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:29:34,087 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:29:34,087 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:29:34,087 INFO L87 Difference]: Start difference. First operand 152081 states and 628919 transitions. Second operand 4 states. [2019-12-07 14:29:34,951 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:29:34,951 INFO L93 Difference]: Finished difference Result 179622 states and 732719 transitions. [2019-12-07 14:29:34,952 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:29:34,952 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-12-07 14:29:34,952 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:29:35,403 INFO L225 Difference]: With dead ends: 179622 [2019-12-07 14:29:35,403 INFO L226 Difference]: Without dead ends: 179542 [2019-12-07 14:29:35,403 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:29:39,883 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179542 states. [2019-12-07 14:29:42,228 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179542 to 157787. [2019-12-07 14:29:42,228 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157787 states. [2019-12-07 14:29:42,693 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157787 states to 157787 states and 651479 transitions. [2019-12-07 14:29:42,693 INFO L78 Accepts]: Start accepts. Automaton has 157787 states and 651479 transitions. Word has length 14 [2019-12-07 14:29:42,693 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:29:42,693 INFO L462 AbstractCegarLoop]: Abstraction has 157787 states and 651479 transitions. [2019-12-07 14:29:42,693 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:29:42,693 INFO L276 IsEmpty]: Start isEmpty. Operand 157787 states and 651479 transitions. [2019-12-07 14:29:42,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 14:29:42,696 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:29:42,696 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:29:42,696 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:29:42,696 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:29:42,696 INFO L82 PathProgramCache]: Analyzing trace with hash -1940234062, now seen corresponding path program 1 times [2019-12-07 14:29:42,696 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:29:42,696 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1786540646] [2019-12-07 14:29:42,696 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:29:42,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:29:42,735 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:29:42,735 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1786540646] [2019-12-07 14:29:42,736 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:29:42,736 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:29:42,736 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [827681889] [2019-12-07 14:29:42,736 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:29:42,736 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:29:42,737 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:29:42,737 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:29:42,737 INFO L87 Difference]: Start difference. First operand 157787 states and 651479 transitions. Second operand 4 states. [2019-12-07 14:29:43,653 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:29:43,653 INFO L93 Difference]: Finished difference Result 189091 states and 772001 transitions. [2019-12-07 14:29:43,654 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:29:43,654 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-12-07 14:29:43,654 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:29:44,127 INFO L225 Difference]: With dead ends: 189091 [2019-12-07 14:29:44,127 INFO L226 Difference]: Without dead ends: 188995 [2019-12-07 14:29:44,128 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:29:48,679 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188995 states. [2019-12-07 14:29:53,093 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188995 to 161868. [2019-12-07 14:29:53,093 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161868 states. [2019-12-07 14:29:53,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161868 states to 161868 states and 668265 transitions. [2019-12-07 14:29:53,590 INFO L78 Accepts]: Start accepts. Automaton has 161868 states and 668265 transitions. Word has length 14 [2019-12-07 14:29:53,591 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:29:53,591 INFO L462 AbstractCegarLoop]: Abstraction has 161868 states and 668265 transitions. [2019-12-07 14:29:53,591 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:29:53,591 INFO L276 IsEmpty]: Start isEmpty. Operand 161868 states and 668265 transitions. [2019-12-07 14:29:53,603 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 14:29:53,603 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:29:53,603 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:29:53,603 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:29:53,603 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:29:53,603 INFO L82 PathProgramCache]: Analyzing trace with hash -1828891691, now seen corresponding path program 1 times [2019-12-07 14:29:53,603 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:29:53,603 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [596927122] [2019-12-07 14:29:53,603 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:29:53,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:29:53,650 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:29:53,650 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [596927122] [2019-12-07 14:29:53,650 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:29:53,651 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 14:29:53,651 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1107741765] [2019-12-07 14:29:53,651 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:29:53,651 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:29:53,651 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:29:53,651 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:29:53,652 INFO L87 Difference]: Start difference. First operand 161868 states and 668265 transitions. Second operand 3 states. [2019-12-07 14:29:55,378 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:29:55,378 INFO L93 Difference]: Finished difference Result 305174 states and 1252705 transitions. [2019-12-07 14:29:55,379 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:29:55,379 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 14:29:55,379 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:29:56,136 INFO L225 Difference]: With dead ends: 305174 [2019-12-07 14:29:56,136 INFO L226 Difference]: Without dead ends: 292686 [2019-12-07 14:29:56,137 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:30:02,067 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 292686 states. [2019-12-07 14:30:06,680 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 292686 to 281033. [2019-12-07 14:30:06,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 281033 states. [2019-12-07 14:30:07,552 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 281033 states to 281033 states and 1162981 transitions. [2019-12-07 14:30:07,552 INFO L78 Accepts]: Start accepts. Automaton has 281033 states and 1162981 transitions. Word has length 18 [2019-12-07 14:30:07,553 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:30:07,553 INFO L462 AbstractCegarLoop]: Abstraction has 281033 states and 1162981 transitions. [2019-12-07 14:30:07,553 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:30:07,553 INFO L276 IsEmpty]: Start isEmpty. Operand 281033 states and 1162981 transitions. [2019-12-07 14:30:07,576 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 14:30:07,576 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:30:07,576 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:30:07,576 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:30:07,576 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:30:07,576 INFO L82 PathProgramCache]: Analyzing trace with hash -1446438801, now seen corresponding path program 1 times [2019-12-07 14:30:07,576 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:30:07,577 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1186300738] [2019-12-07 14:30:07,577 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:30:07,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:30:07,620 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:30:07,620 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1186300738] [2019-12-07 14:30:07,620 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:30:07,620 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:30:07,621 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1856318277] [2019-12-07 14:30:07,621 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:30:07,621 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:30:07,621 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:30:07,621 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:30:07,622 INFO L87 Difference]: Start difference. First operand 281033 states and 1162981 transitions. Second operand 4 states. [2019-12-07 14:30:07,902 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:30:07,902 INFO L93 Difference]: Finished difference Result 76997 states and 266596 transitions. [2019-12-07 14:30:07,902 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 14:30:07,903 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2019-12-07 14:30:07,903 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:30:08,010 INFO L225 Difference]: With dead ends: 76997 [2019-12-07 14:30:08,010 INFO L226 Difference]: Without dead ends: 58186 [2019-12-07 14:30:08,011 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:30:08,680 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58186 states. [2019-12-07 14:30:09,246 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58186 to 57734. [2019-12-07 14:30:09,246 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57734 states. [2019-12-07 14:30:09,358 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57734 states to 57734 states and 190651 transitions. [2019-12-07 14:30:09,358 INFO L78 Accepts]: Start accepts. Automaton has 57734 states and 190651 transitions. Word has length 19 [2019-12-07 14:30:09,358 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:30:09,358 INFO L462 AbstractCegarLoop]: Abstraction has 57734 states and 190651 transitions. [2019-12-07 14:30:09,358 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:30:09,358 INFO L276 IsEmpty]: Start isEmpty. Operand 57734 states and 190651 transitions. [2019-12-07 14:30:09,368 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 14:30:09,369 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:30:09,369 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:30:09,369 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:30:09,369 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:30:09,369 INFO L82 PathProgramCache]: Analyzing trace with hash -70181007, now seen corresponding path program 1 times [2019-12-07 14:30:09,369 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:30:09,369 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [34956383] [2019-12-07 14:30:09,369 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:30:09,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:30:09,411 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:30:09,412 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [34956383] [2019-12-07 14:30:09,412 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:30:09,412 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:30:09,412 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1668444322] [2019-12-07 14:30:09,413 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:30:09,413 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:30:09,413 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:30:09,413 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:30:09,413 INFO L87 Difference]: Start difference. First operand 57734 states and 190651 transitions. Second operand 5 states. [2019-12-07 14:30:09,868 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:30:09,868 INFO L93 Difference]: Finished difference Result 73137 states and 237160 transitions. [2019-12-07 14:30:09,868 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 14:30:09,868 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 14:30:09,869 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:30:09,983 INFO L225 Difference]: With dead ends: 73137 [2019-12-07 14:30:09,983 INFO L226 Difference]: Without dead ends: 72877 [2019-12-07 14:30:09,983 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:30:10,252 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72877 states. [2019-12-07 14:30:10,949 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72877 to 58604. [2019-12-07 14:30:10,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58604 states. [2019-12-07 14:30:12,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58604 states to 58604 states and 193201 transitions. [2019-12-07 14:30:12,327 INFO L78 Accepts]: Start accepts. Automaton has 58604 states and 193201 transitions. Word has length 22 [2019-12-07 14:30:12,327 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:30:12,328 INFO L462 AbstractCegarLoop]: Abstraction has 58604 states and 193201 transitions. [2019-12-07 14:30:12,328 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:30:12,328 INFO L276 IsEmpty]: Start isEmpty. Operand 58604 states and 193201 transitions. [2019-12-07 14:30:12,337 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 14:30:12,337 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:30:12,337 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:30:12,337 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:30:12,337 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:30:12,337 INFO L82 PathProgramCache]: Analyzing trace with hash -633645132, now seen corresponding path program 1 times [2019-12-07 14:30:12,338 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:30:12,338 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1451445147] [2019-12-07 14:30:12,338 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:30:12,348 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:30:12,376 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:30:12,376 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1451445147] [2019-12-07 14:30:12,376 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:30:12,377 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:30:12,377 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1169792695] [2019-12-07 14:30:12,377 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:30:12,377 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:30:12,377 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:30:12,377 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:30:12,377 INFO L87 Difference]: Start difference. First operand 58604 states and 193201 transitions. Second operand 5 states. [2019-12-07 14:30:12,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:30:12,839 INFO L93 Difference]: Finished difference Result 75239 states and 243181 transitions. [2019-12-07 14:30:12,839 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 14:30:12,840 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 14:30:12,840 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:30:12,955 INFO L225 Difference]: With dead ends: 75239 [2019-12-07 14:30:12,955 INFO L226 Difference]: Without dead ends: 74873 [2019-12-07 14:30:12,956 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:30:13,231 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74873 states. [2019-12-07 14:30:13,912 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74873 to 57106. [2019-12-07 14:30:13,912 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57106 states. [2019-12-07 14:30:14,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57106 states to 57106 states and 187871 transitions. [2019-12-07 14:30:14,023 INFO L78 Accepts]: Start accepts. Automaton has 57106 states and 187871 transitions. Word has length 22 [2019-12-07 14:30:14,023 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:30:14,023 INFO L462 AbstractCegarLoop]: Abstraction has 57106 states and 187871 transitions. [2019-12-07 14:30:14,023 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:30:14,023 INFO L276 IsEmpty]: Start isEmpty. Operand 57106 states and 187871 transitions. [2019-12-07 14:30:14,041 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 14:30:14,041 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:30:14,041 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:30:14,042 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:30:14,042 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:30:14,042 INFO L82 PathProgramCache]: Analyzing trace with hash 400071569, now seen corresponding path program 1 times [2019-12-07 14:30:14,042 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:30:14,042 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1747025598] [2019-12-07 14:30:14,042 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:30:14,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:30:14,095 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:30:14,096 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1747025598] [2019-12-07 14:30:14,096 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:30:14,096 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:30:14,096 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1540655480] [2019-12-07 14:30:14,096 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:30:14,096 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:30:14,096 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:30:14,097 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:30:14,097 INFO L87 Difference]: Start difference. First operand 57106 states and 187871 transitions. Second operand 5 states. [2019-12-07 14:30:14,514 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:30:14,514 INFO L93 Difference]: Finished difference Result 76623 states and 246781 transitions. [2019-12-07 14:30:14,514 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 14:30:14,514 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 14:30:14,515 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:30:14,629 INFO L225 Difference]: With dead ends: 76623 [2019-12-07 14:30:14,629 INFO L226 Difference]: Without dead ends: 76595 [2019-12-07 14:30:14,629 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:30:14,910 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76595 states. [2019-12-07 14:30:15,714 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76595 to 64282. [2019-12-07 14:30:15,715 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64282 states. [2019-12-07 14:30:15,838 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64282 states to 64282 states and 209922 transitions. [2019-12-07 14:30:15,838 INFO L78 Accepts]: Start accepts. Automaton has 64282 states and 209922 transitions. Word has length 25 [2019-12-07 14:30:15,838 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:30:15,839 INFO L462 AbstractCegarLoop]: Abstraction has 64282 states and 209922 transitions. [2019-12-07 14:30:15,839 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:30:15,839 INFO L276 IsEmpty]: Start isEmpty. Operand 64282 states and 209922 transitions. [2019-12-07 14:30:15,864 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 14:30:15,864 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:30:15,864 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:30:15,864 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:30:15,864 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:30:15,864 INFO L82 PathProgramCache]: Analyzing trace with hash -819070516, now seen corresponding path program 1 times [2019-12-07 14:30:15,865 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:30:15,865 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [114016470] [2019-12-07 14:30:15,865 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:30:15,873 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:30:15,897 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:30:15,897 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [114016470] [2019-12-07 14:30:15,897 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:30:15,897 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:30:15,898 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [732927584] [2019-12-07 14:30:15,898 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:30:15,898 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:30:15,898 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:30:15,898 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:30:15,898 INFO L87 Difference]: Start difference. First operand 64282 states and 209922 transitions. Second operand 5 states. [2019-12-07 14:30:16,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:30:16,258 INFO L93 Difference]: Finished difference Result 74725 states and 241749 transitions. [2019-12-07 14:30:16,258 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 14:30:16,258 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 14:30:16,258 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:30:16,371 INFO L225 Difference]: With dead ends: 74725 [2019-12-07 14:30:16,371 INFO L226 Difference]: Without dead ends: 74590 [2019-12-07 14:30:16,371 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:30:16,646 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74590 states. [2019-12-07 14:30:17,357 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74590 to 66108. [2019-12-07 14:30:17,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66108 states. [2019-12-07 14:30:17,484 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66108 states to 66108 states and 215309 transitions. [2019-12-07 14:30:17,484 INFO L78 Accepts]: Start accepts. Automaton has 66108 states and 215309 transitions. Word has length 28 [2019-12-07 14:30:17,484 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:30:17,484 INFO L462 AbstractCegarLoop]: Abstraction has 66108 states and 215309 transitions. [2019-12-07 14:30:17,484 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:30:17,484 INFO L276 IsEmpty]: Start isEmpty. Operand 66108 states and 215309 transitions. [2019-12-07 14:30:17,651 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 14:30:17,651 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:30:17,651 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:30:17,651 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:30:17,651 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:30:17,651 INFO L82 PathProgramCache]: Analyzing trace with hash 377940687, now seen corresponding path program 1 times [2019-12-07 14:30:17,651 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:30:17,651 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [544001888] [2019-12-07 14:30:17,652 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:30:17,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:30:17,675 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:30:17,675 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [544001888] [2019-12-07 14:30:17,675 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:30:17,675 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:30:17,675 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [283899728] [2019-12-07 14:30:17,676 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:30:17,676 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:30:17,676 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:30:17,676 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:30:17,676 INFO L87 Difference]: Start difference. First operand 66108 states and 215309 transitions. Second operand 3 states. [2019-12-07 14:30:17,928 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:30:17,928 INFO L93 Difference]: Finished difference Result 79836 states and 255833 transitions. [2019-12-07 14:30:17,929 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:30:17,929 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 28 [2019-12-07 14:30:17,929 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:30:18,056 INFO L225 Difference]: With dead ends: 79836 [2019-12-07 14:30:18,056 INFO L226 Difference]: Without dead ends: 79836 [2019-12-07 14:30:18,056 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:30:18,343 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79836 states. [2019-12-07 14:30:19,118 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79836 to 69571. [2019-12-07 14:30:19,118 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69571 states. [2019-12-07 14:30:19,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69571 states to 69571 states and 222487 transitions. [2019-12-07 14:30:19,252 INFO L78 Accepts]: Start accepts. Automaton has 69571 states and 222487 transitions. Word has length 28 [2019-12-07 14:30:19,252 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:30:19,252 INFO L462 AbstractCegarLoop]: Abstraction has 69571 states and 222487 transitions. [2019-12-07 14:30:19,253 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:30:19,253 INFO L276 IsEmpty]: Start isEmpty. Operand 69571 states and 222487 transitions. [2019-12-07 14:30:19,279 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 14:30:19,279 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:30:19,280 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:30:19,280 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:30:19,280 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:30:19,280 INFO L82 PathProgramCache]: Analyzing trace with hash -589973380, now seen corresponding path program 1 times [2019-12-07 14:30:19,280 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:30:19,280 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1128795771] [2019-12-07 14:30:19,280 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:30:19,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:30:19,321 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:30:19,322 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1128795771] [2019-12-07 14:30:19,322 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:30:19,322 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:30:19,322 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1988653502] [2019-12-07 14:30:19,322 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:30:19,323 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:30:19,323 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:30:19,323 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:30:19,323 INFO L87 Difference]: Start difference. First operand 69571 states and 222487 transitions. Second operand 5 states. [2019-12-07 14:30:19,705 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:30:19,705 INFO L93 Difference]: Finished difference Result 80294 states and 254739 transitions. [2019-12-07 14:30:19,706 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 14:30:19,706 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2019-12-07 14:30:19,706 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:30:19,826 INFO L225 Difference]: With dead ends: 80294 [2019-12-07 14:30:19,826 INFO L226 Difference]: Without dead ends: 80158 [2019-12-07 14:30:19,827 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:30:20,117 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80158 states. [2019-12-07 14:30:20,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80158 to 69015. [2019-12-07 14:30:20,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69015 states. [2019-12-07 14:30:21,036 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69015 states to 69015 states and 220662 transitions. [2019-12-07 14:30:21,036 INFO L78 Accepts]: Start accepts. Automaton has 69015 states and 220662 transitions. Word has length 29 [2019-12-07 14:30:21,036 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:30:21,036 INFO L462 AbstractCegarLoop]: Abstraction has 69015 states and 220662 transitions. [2019-12-07 14:30:21,036 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:30:21,036 INFO L276 IsEmpty]: Start isEmpty. Operand 69015 states and 220662 transitions. [2019-12-07 14:30:21,064 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 14:30:21,064 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:30:21,064 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:30:21,065 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:30:21,065 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:30:21,065 INFO L82 PathProgramCache]: Analyzing trace with hash -552001735, now seen corresponding path program 1 times [2019-12-07 14:30:21,065 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:30:21,065 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1167996052] [2019-12-07 14:30:21,065 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:30:21,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:30:21,109 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:30:21,109 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1167996052] [2019-12-07 14:30:21,109 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:30:21,109 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:30:21,109 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1681832099] [2019-12-07 14:30:21,110 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:30:21,110 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:30:21,110 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:30:21,110 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:30:21,110 INFO L87 Difference]: Start difference. First operand 69015 states and 220662 transitions. Second operand 4 states. [2019-12-07 14:30:21,316 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:30:21,317 INFO L93 Difference]: Finished difference Result 69813 states and 222390 transitions. [2019-12-07 14:30:21,317 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 14:30:21,317 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 14:30:21,317 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:30:21,422 INFO L225 Difference]: With dead ends: 69813 [2019-12-07 14:30:21,422 INFO L226 Difference]: Without dead ends: 68923 [2019-12-07 14:30:21,422 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:30:21,684 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68923 states. [2019-12-07 14:30:22,385 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68923 to 66645. [2019-12-07 14:30:22,386 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66645 states. [2019-12-07 14:30:22,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66645 states to 66645 states and 213380 transitions. [2019-12-07 14:30:22,510 INFO L78 Accepts]: Start accepts. Automaton has 66645 states and 213380 transitions. Word has length 29 [2019-12-07 14:30:22,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:30:22,511 INFO L462 AbstractCegarLoop]: Abstraction has 66645 states and 213380 transitions. [2019-12-07 14:30:22,511 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:30:22,511 INFO L276 IsEmpty]: Start isEmpty. Operand 66645 states and 213380 transitions. [2019-12-07 14:30:22,538 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 14:30:22,538 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:30:22,538 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:30:22,538 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:30:22,538 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:30:22,539 INFO L82 PathProgramCache]: Analyzing trace with hash 494288016, now seen corresponding path program 1 times [2019-12-07 14:30:22,539 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:30:22,539 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1101582321] [2019-12-07 14:30:22,539 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:30:22,546 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:30:22,581 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:30:22,581 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1101582321] [2019-12-07 14:30:22,581 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:30:22,581 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 14:30:22,582 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [526958365] [2019-12-07 14:30:22,582 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:30:22,582 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:30:22,582 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:30:22,582 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:30:22,582 INFO L87 Difference]: Start difference. First operand 66645 states and 213380 transitions. Second operand 5 states. [2019-12-07 14:30:23,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:30:23,245 INFO L93 Difference]: Finished difference Result 96497 states and 305016 transitions. [2019-12-07 14:30:23,245 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 14:30:23,245 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 30 [2019-12-07 14:30:23,246 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:30:23,376 INFO L225 Difference]: With dead ends: 96497 [2019-12-07 14:30:23,376 INFO L226 Difference]: Without dead ends: 96497 [2019-12-07 14:30:23,376 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:30:23,706 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96497 states. [2019-12-07 14:30:24,566 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96497 to 76428. [2019-12-07 14:30:24,566 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 76428 states. [2019-12-07 14:30:24,716 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 76428 states to 76428 states and 244392 transitions. [2019-12-07 14:30:24,716 INFO L78 Accepts]: Start accepts. Automaton has 76428 states and 244392 transitions. Word has length 30 [2019-12-07 14:30:24,716 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:30:24,716 INFO L462 AbstractCegarLoop]: Abstraction has 76428 states and 244392 transitions. [2019-12-07 14:30:24,716 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:30:24,716 INFO L276 IsEmpty]: Start isEmpty. Operand 76428 states and 244392 transitions. [2019-12-07 14:30:24,751 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 14:30:24,751 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:30:24,751 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:30:24,751 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:30:24,751 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:30:24,751 INFO L82 PathProgramCache]: Analyzing trace with hash -181982307, now seen corresponding path program 1 times [2019-12-07 14:30:24,752 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:30:24,752 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [194011542] [2019-12-07 14:30:24,752 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:30:24,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:30:24,799 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:30:24,799 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [194011542] [2019-12-07 14:30:24,799 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:30:24,799 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:30:24,799 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1256713780] [2019-12-07 14:30:24,800 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:30:24,800 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:30:24,800 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:30:24,800 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:30:24,800 INFO L87 Difference]: Start difference. First operand 76428 states and 244392 transitions. Second operand 5 states. [2019-12-07 14:30:25,196 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:30:25,196 INFO L93 Difference]: Finished difference Result 134834 states and 433192 transitions. [2019-12-07 14:30:25,196 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:30:25,196 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 30 [2019-12-07 14:30:25,197 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:30:25,298 INFO L225 Difference]: With dead ends: 134834 [2019-12-07 14:30:25,298 INFO L226 Difference]: Without dead ends: 67051 [2019-12-07 14:30:25,298 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:30:25,553 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67051 states. [2019-12-07 14:30:26,341 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67051 to 66182. [2019-12-07 14:30:26,341 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66182 states. [2019-12-07 14:30:26,459 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66182 states to 66182 states and 212763 transitions. [2019-12-07 14:30:26,460 INFO L78 Accepts]: Start accepts. Automaton has 66182 states and 212763 transitions. Word has length 30 [2019-12-07 14:30:26,460 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:30:26,460 INFO L462 AbstractCegarLoop]: Abstraction has 66182 states and 212763 transitions. [2019-12-07 14:30:26,460 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:30:26,460 INFO L276 IsEmpty]: Start isEmpty. Operand 66182 states and 212763 transitions. [2019-12-07 14:30:26,489 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 14:30:26,490 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:30:26,490 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:30:26,490 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:30:26,490 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:30:26,490 INFO L82 PathProgramCache]: Analyzing trace with hash -936488553, now seen corresponding path program 2 times [2019-12-07 14:30:26,490 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:30:26,490 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [360251090] [2019-12-07 14:30:26,490 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:30:26,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:30:26,519 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:30:26,520 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [360251090] [2019-12-07 14:30:26,520 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:30:26,520 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:30:26,520 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1964371907] [2019-12-07 14:30:26,520 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:30:26,520 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:30:26,520 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:30:26,521 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:30:26,521 INFO L87 Difference]: Start difference. First operand 66182 states and 212763 transitions. Second operand 3 states. [2019-12-07 14:30:26,700 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:30:26,700 INFO L93 Difference]: Finished difference Result 63405 states and 201508 transitions. [2019-12-07 14:30:26,701 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:30:26,701 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 30 [2019-12-07 14:30:26,701 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:30:26,793 INFO L225 Difference]: With dead ends: 63405 [2019-12-07 14:30:26,794 INFO L226 Difference]: Without dead ends: 63405 [2019-12-07 14:30:26,794 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:30:27,032 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63405 states. [2019-12-07 14:30:27,635 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63405 to 59023. [2019-12-07 14:30:27,635 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59023 states. [2019-12-07 14:30:27,743 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59023 states to 59023 states and 188045 transitions. [2019-12-07 14:30:27,744 INFO L78 Accepts]: Start accepts. Automaton has 59023 states and 188045 transitions. Word has length 30 [2019-12-07 14:30:27,744 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:30:27,744 INFO L462 AbstractCegarLoop]: Abstraction has 59023 states and 188045 transitions. [2019-12-07 14:30:27,744 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:30:27,744 INFO L276 IsEmpty]: Start isEmpty. Operand 59023 states and 188045 transitions. [2019-12-07 14:30:27,773 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 14:30:27,773 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:30:27,773 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:30:27,773 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:30:27,773 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:30:27,774 INFO L82 PathProgramCache]: Analyzing trace with hash -1151300207, now seen corresponding path program 1 times [2019-12-07 14:30:27,774 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:30:27,774 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [653175838] [2019-12-07 14:30:27,774 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:30:27,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:30:27,818 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:30:27,818 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [653175838] [2019-12-07 14:30:27,818 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:30:27,818 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:30:27,818 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1554939183] [2019-12-07 14:30:27,819 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:30:27,819 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:30:27,819 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:30:27,819 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:30:27,819 INFO L87 Difference]: Start difference. First operand 59023 states and 188045 transitions. Second operand 5 states. [2019-12-07 14:30:27,918 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:30:27,918 INFO L93 Difference]: Finished difference Result 26619 states and 81008 transitions. [2019-12-07 14:30:27,918 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:30:27,918 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 31 [2019-12-07 14:30:27,918 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:30:27,946 INFO L225 Difference]: With dead ends: 26619 [2019-12-07 14:30:27,946 INFO L226 Difference]: Without dead ends: 23042 [2019-12-07 14:30:27,946 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:30:28,019 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23042 states. [2019-12-07 14:30:28,216 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23042 to 22626. [2019-12-07 14:30:28,216 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22626 states. [2019-12-07 14:30:28,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22626 states to 22626 states and 68624 transitions. [2019-12-07 14:30:28,252 INFO L78 Accepts]: Start accepts. Automaton has 22626 states and 68624 transitions. Word has length 31 [2019-12-07 14:30:28,252 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:30:28,252 INFO L462 AbstractCegarLoop]: Abstraction has 22626 states and 68624 transitions. [2019-12-07 14:30:28,252 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:30:28,253 INFO L276 IsEmpty]: Start isEmpty. Operand 22626 states and 68624 transitions. [2019-12-07 14:30:28,272 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 14:30:28,272 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:30:28,272 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:30:28,272 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:30:28,272 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:30:28,272 INFO L82 PathProgramCache]: Analyzing trace with hash -134226549, now seen corresponding path program 1 times [2019-12-07 14:30:28,272 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:30:28,273 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1568067827] [2019-12-07 14:30:28,273 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:30:28,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:30:28,319 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:30:28,319 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1568067827] [2019-12-07 14:30:28,319 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:30:28,319 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:30:28,320 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [389132905] [2019-12-07 14:30:28,320 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:30:28,320 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:30:28,320 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:30:28,320 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:30:28,320 INFO L87 Difference]: Start difference. First operand 22626 states and 68624 transitions. Second operand 6 states. [2019-12-07 14:30:28,704 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:30:28,704 INFO L93 Difference]: Finished difference Result 26646 states and 79266 transitions. [2019-12-07 14:30:28,705 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 14:30:28,705 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 40 [2019-12-07 14:30:28,705 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:30:28,734 INFO L225 Difference]: With dead ends: 26646 [2019-12-07 14:30:28,734 INFO L226 Difference]: Without dead ends: 26459 [2019-12-07 14:30:28,735 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=47, Invalid=109, Unknown=0, NotChecked=0, Total=156 [2019-12-07 14:30:28,813 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26459 states. [2019-12-07 14:30:29,035 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26459 to 22569. [2019-12-07 14:30:29,035 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22569 states. [2019-12-07 14:30:29,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22569 states to 22569 states and 68489 transitions. [2019-12-07 14:30:29,072 INFO L78 Accepts]: Start accepts. Automaton has 22569 states and 68489 transitions. Word has length 40 [2019-12-07 14:30:29,072 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:30:29,072 INFO L462 AbstractCegarLoop]: Abstraction has 22569 states and 68489 transitions. [2019-12-07 14:30:29,072 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:30:29,072 INFO L276 IsEmpty]: Start isEmpty. Operand 22569 states and 68489 transitions. [2019-12-07 14:30:29,092 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 14:30:29,092 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:30:29,092 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:30:29,092 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:30:29,092 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:30:29,092 INFO L82 PathProgramCache]: Analyzing trace with hash -1136448647, now seen corresponding path program 1 times [2019-12-07 14:30:29,092 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:30:29,093 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [47393200] [2019-12-07 14:30:29,093 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:30:29,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:30:29,211 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:30:29,212 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [47393200] [2019-12-07 14:30:29,212 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:30:29,212 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:30:29,212 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [968063455] [2019-12-07 14:30:29,212 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:30:29,212 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:30:29,212 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:30:29,212 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:30:29,212 INFO L87 Difference]: Start difference. First operand 22569 states and 68489 transitions. Second operand 6 states. [2019-12-07 14:30:29,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:30:29,609 INFO L93 Difference]: Finished difference Result 26307 states and 78473 transitions. [2019-12-07 14:30:29,609 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 14:30:29,609 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 41 [2019-12-07 14:30:29,609 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:30:29,646 INFO L225 Difference]: With dead ends: 26307 [2019-12-07 14:30:29,646 INFO L226 Difference]: Without dead ends: 26036 [2019-12-07 14:30:29,646 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=47, Invalid=109, Unknown=0, NotChecked=0, Total=156 [2019-12-07 14:30:29,725 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26036 states. [2019-12-07 14:30:29,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26036 to 21904. [2019-12-07 14:30:29,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21904 states. [2019-12-07 14:30:29,963 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21904 states to 21904 states and 66880 transitions. [2019-12-07 14:30:29,964 INFO L78 Accepts]: Start accepts. Automaton has 21904 states and 66880 transitions. Word has length 41 [2019-12-07 14:30:29,964 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:30:29,964 INFO L462 AbstractCegarLoop]: Abstraction has 21904 states and 66880 transitions. [2019-12-07 14:30:29,964 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:30:29,964 INFO L276 IsEmpty]: Start isEmpty. Operand 21904 states and 66880 transitions. [2019-12-07 14:30:29,982 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 14:30:29,982 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:30:29,982 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:30:29,982 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:30:29,982 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:30:29,983 INFO L82 PathProgramCache]: Analyzing trace with hash 1425122982, now seen corresponding path program 1 times [2019-12-07 14:30:29,983 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:30:29,983 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1058703664] [2019-12-07 14:30:29,983 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:30:29,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:30:30,013 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:30:30,014 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1058703664] [2019-12-07 14:30:30,014 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:30:30,014 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:30:30,014 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [29604345] [2019-12-07 14:30:30,014 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:30:30,015 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:30:30,015 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:30:30,015 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:30:30,015 INFO L87 Difference]: Start difference. First operand 21904 states and 66880 transitions. Second operand 3 states. [2019-12-07 14:30:30,060 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:30:30,060 INFO L93 Difference]: Finished difference Result 15924 states and 48104 transitions. [2019-12-07 14:30:30,061 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:30:30,061 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2019-12-07 14:30:30,061 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:30:30,078 INFO L225 Difference]: With dead ends: 15924 [2019-12-07 14:30:30,078 INFO L226 Difference]: Without dead ends: 15924 [2019-12-07 14:30:30,078 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:30:30,131 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15924 states. [2019-12-07 14:30:30,263 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15924 to 15620. [2019-12-07 14:30:30,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15620 states. [2019-12-07 14:30:30,287 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15620 states to 15620 states and 47262 transitions. [2019-12-07 14:30:30,287 INFO L78 Accepts]: Start accepts. Automaton has 15620 states and 47262 transitions. Word has length 41 [2019-12-07 14:30:30,287 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:30:30,287 INFO L462 AbstractCegarLoop]: Abstraction has 15620 states and 47262 transitions. [2019-12-07 14:30:30,287 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:30:30,287 INFO L276 IsEmpty]: Start isEmpty. Operand 15620 states and 47262 transitions. [2019-12-07 14:30:30,300 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 14:30:30,300 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:30:30,300 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:30:30,300 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:30:30,300 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:30:30,300 INFO L82 PathProgramCache]: Analyzing trace with hash -1119333898, now seen corresponding path program 1 times [2019-12-07 14:30:30,300 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:30:30,300 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [868974146] [2019-12-07 14:30:30,300 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:30:30,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:30:30,350 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:30:30,350 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [868974146] [2019-12-07 14:30:30,350 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:30:30,351 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 14:30:30,351 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1066316750] [2019-12-07 14:30:30,351 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:30:30,351 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:30:30,351 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:30:30,351 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:30:30,351 INFO L87 Difference]: Start difference. First operand 15620 states and 47262 transitions. Second operand 6 states. [2019-12-07 14:30:30,428 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:30:30,428 INFO L93 Difference]: Finished difference Result 14158 states and 43863 transitions. [2019-12-07 14:30:30,428 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 14:30:30,428 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 42 [2019-12-07 14:30:30,428 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:30:30,444 INFO L225 Difference]: With dead ends: 14158 [2019-12-07 14:30:30,444 INFO L226 Difference]: Without dead ends: 13874 [2019-12-07 14:30:30,444 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:30:30,493 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13874 states. [2019-12-07 14:30:30,586 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13874 to 9698. [2019-12-07 14:30:30,587 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9698 states. [2019-12-07 14:30:30,601 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9698 states to 9698 states and 29812 transitions. [2019-12-07 14:30:30,601 INFO L78 Accepts]: Start accepts. Automaton has 9698 states and 29812 transitions. Word has length 42 [2019-12-07 14:30:30,601 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:30:30,601 INFO L462 AbstractCegarLoop]: Abstraction has 9698 states and 29812 transitions. [2019-12-07 14:30:30,601 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:30:30,601 INFO L276 IsEmpty]: Start isEmpty. Operand 9698 states and 29812 transitions. [2019-12-07 14:30:30,609 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 14:30:30,609 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:30:30,609 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:30:30,609 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:30:30,609 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:30:30,610 INFO L82 PathProgramCache]: Analyzing trace with hash -1613813162, now seen corresponding path program 1 times [2019-12-07 14:30:30,610 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:30:30,610 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1357004177] [2019-12-07 14:30:30,610 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:30:30,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:30:30,676 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:30:30,676 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1357004177] [2019-12-07 14:30:30,676 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:30:30,676 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:30:30,676 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [246326147] [2019-12-07 14:30:30,676 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:30:30,676 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:30:30,677 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:30:30,677 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:30:30,677 INFO L87 Difference]: Start difference. First operand 9698 states and 29812 transitions. Second operand 5 states. [2019-12-07 14:30:30,757 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:30:30,757 INFO L93 Difference]: Finished difference Result 25725 states and 80296 transitions. [2019-12-07 14:30:30,757 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 14:30:30,758 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 56 [2019-12-07 14:30:30,758 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:30:30,771 INFO L225 Difference]: With dead ends: 25725 [2019-12-07 14:30:30,771 INFO L226 Difference]: Without dead ends: 11994 [2019-12-07 14:30:30,771 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:30:30,817 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11994 states. [2019-12-07 14:30:30,894 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11994 to 7352. [2019-12-07 14:30:30,894 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7352 states. [2019-12-07 14:30:30,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7352 states to 7352 states and 22762 transitions. [2019-12-07 14:30:30,904 INFO L78 Accepts]: Start accepts. Automaton has 7352 states and 22762 transitions. Word has length 56 [2019-12-07 14:30:30,904 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:30:30,904 INFO L462 AbstractCegarLoop]: Abstraction has 7352 states and 22762 transitions. [2019-12-07 14:30:30,904 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:30:30,904 INFO L276 IsEmpty]: Start isEmpty. Operand 7352 states and 22762 transitions. [2019-12-07 14:30:30,910 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 14:30:30,910 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:30:30,910 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:30:30,910 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:30:30,910 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:30:30,910 INFO L82 PathProgramCache]: Analyzing trace with hash 1782045904, now seen corresponding path program 2 times [2019-12-07 14:30:30,910 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:30:30,910 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1286074049] [2019-12-07 14:30:30,911 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:30:30,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:30:30,960 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:30:30,960 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1286074049] [2019-12-07 14:30:30,960 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:30:30,960 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:30:30,961 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1209649596] [2019-12-07 14:30:30,961 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:30:30,961 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:30:30,961 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:30:30,961 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:30:30,961 INFO L87 Difference]: Start difference. First operand 7352 states and 22762 transitions. Second operand 4 states. [2019-12-07 14:30:30,997 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:30:30,997 INFO L93 Difference]: Finished difference Result 11994 states and 37458 transitions. [2019-12-07 14:30:30,998 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 14:30:30,998 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 56 [2019-12-07 14:30:30,998 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:30:31,003 INFO L225 Difference]: With dead ends: 11994 [2019-12-07 14:30:31,003 INFO L226 Difference]: Without dead ends: 4819 [2019-12-07 14:30:31,003 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:30:31,032 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4819 states. [2019-12-07 14:30:31,068 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4819 to 4819. [2019-12-07 14:30:31,069 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4819 states. [2019-12-07 14:30:31,075 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4819 states to 4819 states and 15164 transitions. [2019-12-07 14:30:31,075 INFO L78 Accepts]: Start accepts. Automaton has 4819 states and 15164 transitions. Word has length 56 [2019-12-07 14:30:31,076 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:30:31,076 INFO L462 AbstractCegarLoop]: Abstraction has 4819 states and 15164 transitions. [2019-12-07 14:30:31,076 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:30:31,076 INFO L276 IsEmpty]: Start isEmpty. Operand 4819 states and 15164 transitions. [2019-12-07 14:30:31,079 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 14:30:31,080 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:30:31,080 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:30:31,080 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:30:31,080 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:30:31,080 INFO L82 PathProgramCache]: Analyzing trace with hash 259489780, now seen corresponding path program 3 times [2019-12-07 14:30:31,080 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:30:31,080 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1311913418] [2019-12-07 14:30:31,080 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:30:31,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:30:31,224 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:30:31,224 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1311913418] [2019-12-07 14:30:31,224 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:30:31,224 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 14:30:31,224 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1435522873] [2019-12-07 14:30:31,224 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 14:30:31,224 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:30:31,225 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 14:30:31,225 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 14:30:31,225 INFO L87 Difference]: Start difference. First operand 4819 states and 15164 transitions. Second operand 10 states. [2019-12-07 14:30:31,795 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:30:31,796 INFO L93 Difference]: Finished difference Result 8845 states and 27462 transitions. [2019-12-07 14:30:31,796 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 14:30:31,796 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 56 [2019-12-07 14:30:31,796 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:30:31,802 INFO L225 Difference]: With dead ends: 8845 [2019-12-07 14:30:31,803 INFO L226 Difference]: Without dead ends: 6279 [2019-12-07 14:30:31,803 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 86 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=112, Invalid=440, Unknown=0, NotChecked=0, Total=552 [2019-12-07 14:30:31,833 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6279 states. [2019-12-07 14:30:31,877 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6279 to 5939. [2019-12-07 14:30:31,878 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5939 states. [2019-12-07 14:30:31,885 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5939 states to 5939 states and 18454 transitions. [2019-12-07 14:30:31,886 INFO L78 Accepts]: Start accepts. Automaton has 5939 states and 18454 transitions. Word has length 56 [2019-12-07 14:30:31,886 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:30:31,886 INFO L462 AbstractCegarLoop]: Abstraction has 5939 states and 18454 transitions. [2019-12-07 14:30:31,886 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 14:30:31,886 INFO L276 IsEmpty]: Start isEmpty. Operand 5939 states and 18454 transitions. [2019-12-07 14:30:31,890 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 14:30:31,890 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:30:31,890 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:30:31,890 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:30:31,891 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:30:31,891 INFO L82 PathProgramCache]: Analyzing trace with hash 1236301856, now seen corresponding path program 4 times [2019-12-07 14:30:31,891 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:30:31,891 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1131633893] [2019-12-07 14:30:31,891 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:30:31,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:30:32,197 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:30:32,197 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1131633893] [2019-12-07 14:30:32,197 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:30:32,197 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 14:30:32,197 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2069770282] [2019-12-07 14:30:32,198 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 14:30:32,198 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:30:32,198 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 14:30:32,198 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=201, Unknown=0, NotChecked=0, Total=240 [2019-12-07 14:30:32,198 INFO L87 Difference]: Start difference. First operand 5939 states and 18454 transitions. Second operand 16 states. [2019-12-07 14:30:34,240 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:30:34,240 INFO L93 Difference]: Finished difference Result 9477 states and 28636 transitions. [2019-12-07 14:30:34,240 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2019-12-07 14:30:34,240 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 56 [2019-12-07 14:30:34,240 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:30:34,248 INFO L225 Difference]: With dead ends: 9477 [2019-12-07 14:30:34,248 INFO L226 Difference]: Without dead ends: 7617 [2019-12-07 14:30:34,249 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 455 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=277, Invalid=1529, Unknown=0, NotChecked=0, Total=1806 [2019-12-07 14:30:34,282 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7617 states. [2019-12-07 14:30:34,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7617 to 6149. [2019-12-07 14:30:34,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6149 states. [2019-12-07 14:30:34,346 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6149 states to 6149 states and 19060 transitions. [2019-12-07 14:30:34,346 INFO L78 Accepts]: Start accepts. Automaton has 6149 states and 19060 transitions. Word has length 56 [2019-12-07 14:30:34,346 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:30:34,346 INFO L462 AbstractCegarLoop]: Abstraction has 6149 states and 19060 transitions. [2019-12-07 14:30:34,346 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 14:30:34,346 INFO L276 IsEmpty]: Start isEmpty. Operand 6149 states and 19060 transitions. [2019-12-07 14:30:34,351 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 14:30:34,351 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:30:34,351 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:30:34,351 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:30:34,352 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:30:34,352 INFO L82 PathProgramCache]: Analyzing trace with hash 997734682, now seen corresponding path program 5 times [2019-12-07 14:30:34,352 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:30:34,352 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [884911540] [2019-12-07 14:30:34,352 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:30:34,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:30:34,500 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:30:34,500 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [884911540] [2019-12-07 14:30:34,500 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:30:34,500 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 14:30:34,500 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1974784092] [2019-12-07 14:30:34,500 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 14:30:34,501 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:30:34,501 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 14:30:34,501 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 14:30:34,501 INFO L87 Difference]: Start difference. First operand 6149 states and 19060 transitions. Second operand 11 states. [2019-12-07 14:30:35,074 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:30:35,074 INFO L93 Difference]: Finished difference Result 8899 states and 27091 transitions. [2019-12-07 14:30:35,075 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 14:30:35,075 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 56 [2019-12-07 14:30:35,075 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:30:35,082 INFO L225 Difference]: With dead ends: 8899 [2019-12-07 14:30:35,082 INFO L226 Difference]: Without dead ends: 6787 [2019-12-07 14:30:35,082 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 103 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=124, Invalid=526, Unknown=0, NotChecked=0, Total=650 [2019-12-07 14:30:35,113 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6787 states. [2019-12-07 14:30:35,162 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6787 to 6267. [2019-12-07 14:30:35,162 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6267 states. [2019-12-07 14:30:35,170 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6267 states to 6267 states and 19364 transitions. [2019-12-07 14:30:35,170 INFO L78 Accepts]: Start accepts. Automaton has 6267 states and 19364 transitions. Word has length 56 [2019-12-07 14:30:35,171 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:30:35,171 INFO L462 AbstractCegarLoop]: Abstraction has 6267 states and 19364 transitions. [2019-12-07 14:30:35,171 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 14:30:35,171 INFO L276 IsEmpty]: Start isEmpty. Operand 6267 states and 19364 transitions. [2019-12-07 14:30:35,190 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 14:30:35,190 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:30:35,190 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:30:35,190 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:30:35,190 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:30:35,190 INFO L82 PathProgramCache]: Analyzing trace with hash -711328716, now seen corresponding path program 6 times [2019-12-07 14:30:35,190 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:30:35,190 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [277509266] [2019-12-07 14:30:35,191 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:30:35,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:30:35,299 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:30:35,299 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [277509266] [2019-12-07 14:30:35,299 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:30:35,299 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 14:30:35,299 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [951656689] [2019-12-07 14:30:35,299 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 14:30:35,299 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:30:35,299 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 14:30:35,300 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 14:30:35,300 INFO L87 Difference]: Start difference. First operand 6267 states and 19364 transitions. Second operand 10 states. [2019-12-07 14:30:35,982 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:30:35,982 INFO L93 Difference]: Finished difference Result 9885 states and 29875 transitions. [2019-12-07 14:30:35,982 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-12-07 14:30:35,982 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 56 [2019-12-07 14:30:35,982 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:30:35,990 INFO L225 Difference]: With dead ends: 9885 [2019-12-07 14:30:35,990 INFO L226 Difference]: Without dead ends: 7710 [2019-12-07 14:30:35,990 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 86 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=116, Invalid=436, Unknown=0, NotChecked=0, Total=552 [2019-12-07 14:30:36,023 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7710 states. [2019-12-07 14:30:36,076 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7710 to 6496. [2019-12-07 14:30:36,076 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6496 states. [2019-12-07 14:30:36,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6496 states to 6496 states and 19903 transitions. [2019-12-07 14:30:36,085 INFO L78 Accepts]: Start accepts. Automaton has 6496 states and 19903 transitions. Word has length 56 [2019-12-07 14:30:36,086 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:30:36,086 INFO L462 AbstractCegarLoop]: Abstraction has 6496 states and 19903 transitions. [2019-12-07 14:30:36,086 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 14:30:36,086 INFO L276 IsEmpty]: Start isEmpty. Operand 6496 states and 19903 transitions. [2019-12-07 14:30:36,091 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 14:30:36,091 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:30:36,091 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:30:36,091 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:30:36,091 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:30:36,091 INFO L82 PathProgramCache]: Analyzing trace with hash 259978164, now seen corresponding path program 7 times [2019-12-07 14:30:36,091 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:30:36,091 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1313616135] [2019-12-07 14:30:36,091 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:30:36,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:30:36,203 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:30:36,203 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1313616135] [2019-12-07 14:30:36,203 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:30:36,203 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 14:30:36,204 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [985035388] [2019-12-07 14:30:36,204 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 14:30:36,204 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:30:36,204 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 14:30:36,204 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 14:30:36,204 INFO L87 Difference]: Start difference. First operand 6496 states and 19903 transitions. Second operand 11 states. [2019-12-07 14:30:36,889 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:30:36,889 INFO L93 Difference]: Finished difference Result 9494 states and 28552 transitions. [2019-12-07 14:30:36,889 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 14:30:36,889 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 56 [2019-12-07 14:30:36,889 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:30:36,897 INFO L225 Difference]: With dead ends: 9494 [2019-12-07 14:30:36,897 INFO L226 Difference]: Without dead ends: 7522 [2019-12-07 14:30:36,898 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 116 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=130, Invalid=572, Unknown=0, NotChecked=0, Total=702 [2019-12-07 14:30:36,931 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7522 states. [2019-12-07 14:30:36,987 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7522 to 6380. [2019-12-07 14:30:36,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6380 states. [2019-12-07 14:30:36,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6380 states to 6380 states and 19541 transitions. [2019-12-07 14:30:36,996 INFO L78 Accepts]: Start accepts. Automaton has 6380 states and 19541 transitions. Word has length 56 [2019-12-07 14:30:36,996 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:30:36,996 INFO L462 AbstractCegarLoop]: Abstraction has 6380 states and 19541 transitions. [2019-12-07 14:30:36,996 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 14:30:36,996 INFO L276 IsEmpty]: Start isEmpty. Operand 6380 states and 19541 transitions. [2019-12-07 14:30:37,001 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 14:30:37,001 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:30:37,002 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:30:37,002 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:30:37,002 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:30:37,002 INFO L82 PathProgramCache]: Analyzing trace with hash -1250250812, now seen corresponding path program 8 times [2019-12-07 14:30:37,002 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:30:37,002 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2006230543] [2019-12-07 14:30:37,002 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:30:37,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:30:37,132 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:30:37,132 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2006230543] [2019-12-07 14:30:37,132 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:30:37,132 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 14:30:37,132 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1284607735] [2019-12-07 14:30:37,133 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 14:30:37,133 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:30:37,133 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 14:30:37,133 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 14:30:37,133 INFO L87 Difference]: Start difference. First operand 6380 states and 19541 transitions. Second operand 11 states. [2019-12-07 14:30:37,767 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:30:37,767 INFO L93 Difference]: Finished difference Result 8720 states and 26245 transitions. [2019-12-07 14:30:37,767 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-12-07 14:30:37,767 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 56 [2019-12-07 14:30:37,767 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:30:37,775 INFO L225 Difference]: With dead ends: 8720 [2019-12-07 14:30:37,775 INFO L226 Difference]: Without dead ends: 7236 [2019-12-07 14:30:37,775 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 86 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=116, Invalid=484, Unknown=0, NotChecked=0, Total=600 [2019-12-07 14:30:37,808 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7236 states. [2019-12-07 14:30:37,862 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7236 to 6338. [2019-12-07 14:30:37,862 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6338 states. [2019-12-07 14:30:37,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6338 states to 6338 states and 19407 transitions. [2019-12-07 14:30:37,871 INFO L78 Accepts]: Start accepts. Automaton has 6338 states and 19407 transitions. Word has length 56 [2019-12-07 14:30:37,872 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:30:37,872 INFO L462 AbstractCegarLoop]: Abstraction has 6338 states and 19407 transitions. [2019-12-07 14:30:37,872 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 14:30:37,872 INFO L276 IsEmpty]: Start isEmpty. Operand 6338 states and 19407 transitions. [2019-12-07 14:30:37,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 14:30:37,877 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:30:37,877 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:30:37,877 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:30:37,877 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:30:37,877 INFO L82 PathProgramCache]: Analyzing trace with hash 425157206, now seen corresponding path program 9 times [2019-12-07 14:30:37,877 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:30:37,877 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [93849239] [2019-12-07 14:30:37,877 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:30:37,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:30:37,982 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:30:37,982 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [93849239] [2019-12-07 14:30:37,983 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:30:37,983 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 14:30:37,983 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [402420121] [2019-12-07 14:30:37,983 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 14:30:37,983 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:30:37,983 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 14:30:37,983 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 14:30:37,983 INFO L87 Difference]: Start difference. First operand 6338 states and 19407 transitions. Second operand 11 states. [2019-12-07 14:30:38,404 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:30:38,404 INFO L93 Difference]: Finished difference Result 10107 states and 30772 transitions. [2019-12-07 14:30:38,405 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-12-07 14:30:38,405 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 56 [2019-12-07 14:30:38,405 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:30:38,414 INFO L225 Difference]: With dead ends: 10107 [2019-12-07 14:30:38,414 INFO L226 Difference]: Without dead ends: 9413 [2019-12-07 14:30:38,415 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 170 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=170, Invalid=700, Unknown=0, NotChecked=0, Total=870 [2019-12-07 14:30:38,452 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9413 states. [2019-12-07 14:30:38,533 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9413 to 8521. [2019-12-07 14:30:38,534 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8521 states. [2019-12-07 14:30:38,545 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8521 states to 8521 states and 26077 transitions. [2019-12-07 14:30:38,546 INFO L78 Accepts]: Start accepts. Automaton has 8521 states and 26077 transitions. Word has length 56 [2019-12-07 14:30:38,546 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:30:38,546 INFO L462 AbstractCegarLoop]: Abstraction has 8521 states and 26077 transitions. [2019-12-07 14:30:38,546 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 14:30:38,546 INFO L276 IsEmpty]: Start isEmpty. Operand 8521 states and 26077 transitions. [2019-12-07 14:30:38,553 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 14:30:38,553 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:30:38,553 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:30:38,553 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:30:38,553 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:30:38,553 INFO L82 PathProgramCache]: Analyzing trace with hash 2122420018, now seen corresponding path program 10 times [2019-12-07 14:30:38,553 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:30:38,553 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1651157914] [2019-12-07 14:30:38,553 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:30:38,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:30:38,657 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:30:38,657 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1651157914] [2019-12-07 14:30:38,658 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:30:38,658 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 14:30:38,658 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [576691931] [2019-12-07 14:30:38,658 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 14:30:38,658 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:30:38,658 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 14:30:38,658 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 14:30:38,658 INFO L87 Difference]: Start difference. First operand 8521 states and 26077 transitions. Second operand 11 states. [2019-12-07 14:30:39,175 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:30:39,176 INFO L93 Difference]: Finished difference Result 9473 states and 28535 transitions. [2019-12-07 14:30:39,176 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2019-12-07 14:30:39,176 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 56 [2019-12-07 14:30:39,176 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:30:39,183 INFO L225 Difference]: With dead ends: 9473 [2019-12-07 14:30:39,183 INFO L226 Difference]: Without dead ends: 6953 [2019-12-07 14:30:39,183 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 279 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=239, Invalid=951, Unknown=0, NotChecked=0, Total=1190 [2019-12-07 14:30:39,214 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6953 states. [2019-12-07 14:30:39,265 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6953 to 6159. [2019-12-07 14:30:39,265 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6159 states. [2019-12-07 14:30:39,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6159 states to 6159 states and 18725 transitions. [2019-12-07 14:30:39,273 INFO L78 Accepts]: Start accepts. Automaton has 6159 states and 18725 transitions. Word has length 56 [2019-12-07 14:30:39,273 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:30:39,273 INFO L462 AbstractCegarLoop]: Abstraction has 6159 states and 18725 transitions. [2019-12-07 14:30:39,274 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 14:30:39,274 INFO L276 IsEmpty]: Start isEmpty. Operand 6159 states and 18725 transitions. [2019-12-07 14:30:39,278 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 14:30:39,278 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:30:39,278 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:30:39,278 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:30:39,279 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:30:39,279 INFO L82 PathProgramCache]: Analyzing trace with hash 918799478, now seen corresponding path program 11 times [2019-12-07 14:30:39,279 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:30:39,279 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2099568493] [2019-12-07 14:30:39,279 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:30:39,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:30:39,388 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:30:39,389 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2099568493] [2019-12-07 14:30:39,389 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:30:39,389 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 14:30:39,389 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1712358557] [2019-12-07 14:30:39,389 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 14:30:39,389 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:30:39,389 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 14:30:39,389 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 14:30:39,389 INFO L87 Difference]: Start difference. First operand 6159 states and 18725 transitions. Second operand 12 states. [2019-12-07 14:30:39,780 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:30:39,780 INFO L93 Difference]: Finished difference Result 7119 states and 21198 transitions. [2019-12-07 14:30:39,780 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 14:30:39,780 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 56 [2019-12-07 14:30:39,780 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:30:39,787 INFO L225 Difference]: With dead ends: 7119 [2019-12-07 14:30:39,787 INFO L226 Difference]: Without dead ends: 6785 [2019-12-07 14:30:39,787 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 116 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=133, Invalid=569, Unknown=0, NotChecked=0, Total=702 [2019-12-07 14:30:39,818 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6785 states. [2019-12-07 14:30:39,866 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6785 to 6007. [2019-12-07 14:30:39,866 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6007 states. [2019-12-07 14:30:39,874 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6007 states to 6007 states and 18295 transitions. [2019-12-07 14:30:39,874 INFO L78 Accepts]: Start accepts. Automaton has 6007 states and 18295 transitions. Word has length 56 [2019-12-07 14:30:39,874 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:30:39,874 INFO L462 AbstractCegarLoop]: Abstraction has 6007 states and 18295 transitions. [2019-12-07 14:30:39,874 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 14:30:39,874 INFO L276 IsEmpty]: Start isEmpty. Operand 6007 states and 18295 transitions. [2019-12-07 14:30:39,878 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 14:30:39,879 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:30:39,879 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:30:39,879 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:30:39,879 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:30:39,879 INFO L82 PathProgramCache]: Analyzing trace with hash 1649345490, now seen corresponding path program 12 times [2019-12-07 14:30:39,879 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:30:39,879 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [365746448] [2019-12-07 14:30:39,879 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:30:39,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 14:30:39,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 14:30:39,933 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 14:30:39,934 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 14:30:39,936 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [808] [808] ULTIMATE.startENTRY-->L818: Formula: (let ((.cse0 (store |v_#valid_64| 0 0))) (and (= 0 v_~x$read_delayed_var~0.base_6) (= v_~x$r_buff1_thd1~0_448 0) (= 0 v_~x$read_delayed_var~0.offset_6) (= 0 v_~x$w_buff1_used~0_643) (= 0 v_~x~0_243) (= v_~__unbuffered_p2_EBX~0_64 0) (= 0 v_~__unbuffered_p0_EAX~0_82) (= 0 v_~x$r_buff1_thd2~0_283) (= v_~x$flush_delayed~0_67 0) (= 0 v_~__unbuffered_p2_EAX~0_64) (= v_~main$tmp_guard1~0_51 0) (= v_~main$tmp_guard0~0_41 0) (< 0 |v_#StackHeapBarrier_17|) (= v_~x$r_buff1_thd0~0_322 0) (= 0 v_~x$w_buff1~0_350) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1900~0.base_26| 4)) (= v_~weak$$choice2~0_208 0) (= 0 v_~x$w_buff0~0_432) (= 0 v_~x$read_delayed~0_6) (= 0 v_~__unbuffered_cnt~0_96) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1900~0.base_26| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1900~0.base_26|) |v_ULTIMATE.start_main_~#t1900~0.offset_20| 0)) |v_#memory_int_23|) (= 0 v_~x$r_buff0_thd3~0_150) (= 0 |v_ULTIMATE.start_main_~#t1900~0.offset_20|) (= v_~x$r_buff0_thd1~0_385 0) (= 0 v_~x$r_buff1_thd3~0_288) (= v_~x$mem_tmp~0_44 0) (= 0 v_~x$r_buff0_thd2~0_345) (= |v_#NULL.offset_5| 0) (= 0 v_~x$w_buff0_used~0_952) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1900~0.base_26|) (= v_~x$r_buff0_thd0~0_164 0) (= 0 v_~weak$$choice0~0_40) (= v_~y~0_300 0) (= 0 |v_#NULL.base_5|) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1900~0.base_26|)) (= |v_#valid_62| (store .cse0 |v_ULTIMATE.start_main_~#t1900~0.base_26| 1)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_24|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t1901~0.offset=|v_ULTIMATE.start_main_~#t1901~0.offset_20|, ~x$w_buff0~0=v_~x$w_buff0~0_432, ~x$flush_delayed~0=v_~x$flush_delayed~0_67, #NULL.offset=|v_#NULL.offset_5|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_448, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_150, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_40|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_34|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_82, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_64, ULTIMATE.start_main_~#t1900~0.base=|v_ULTIMATE.start_main_~#t1900~0.base_26|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_164, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_64, ~x$w_buff1~0=v_~x$w_buff1~0_350, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_643, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_283, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_6, ~weak$$choice0~0=v_~weak$$choice0~0_40, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_~#t1900~0.offset=|v_ULTIMATE.start_main_~#t1900~0.offset_20|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_96, ~x~0=v_~x~0_243, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_385, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_106|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_288, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_51, ~x$mem_tmp~0=v_~x$mem_tmp~0_44, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_51|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_60|, ULTIMATE.start_main_~#t1902~0.offset=|v_ULTIMATE.start_main_~#t1902~0.offset_14|, ~y~0=v_~y~0_300, ULTIMATE.start_main_~#t1901~0.base=|v_ULTIMATE.start_main_~#t1901~0.base_27|, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_15|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_41, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_322, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_345, #NULL.base=|v_#NULL.base_5|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_952, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_60|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_6, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, #valid=|v_#valid_62|, ULTIMATE.start_main_~#t1902~0.base=|v_ULTIMATE.start_main_~#t1902~0.base_21|, #memory_int=|v_#memory_int_23|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_8|, ~weak$$choice2~0=v_~weak$$choice2~0_208, ~x$read_delayed~0=v_~x$read_delayed~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1901~0.offset, ~x$w_buff0~0, ~x$r_buff0_thd1~0, ~x$flush_delayed~0, #NULL.offset, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~x$r_buff1_thd1~0, ~main$tmp_guard1~0, ~x$r_buff0_thd3~0, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44, ~__unbuffered_p0_EAX~0, ULTIMATE.start_main_~#t1902~0.offset, #length, ~__unbuffered_p2_EAX~0, ~y~0, ULTIMATE.start_main_~#t1901~0.base, ULTIMATE.start_main_~#t1900~0.base, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~nondet40, ~__unbuffered_p2_EBX~0, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ~x$read_delayed_var~0.base, #NULL.base, ~x$w_buff0_used~0, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_~#t1900~0.offset, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_~#t1902~0.base, ULTIMATE.start_main_#t~nondet38, #memory_int, ~__unbuffered_cnt~0, ULTIMATE.start_main_#t~nondet39, ~weak$$choice2~0, ~x~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 14:30:39,936 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L818-1-->L820: Formula: (and (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1901~0.base_10| 4)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1901~0.base_10|) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t1901~0.base_10|)) (not (= |v_ULTIMATE.start_main_~#t1901~0.base_10| 0)) (= |v_ULTIMATE.start_main_~#t1901~0.offset_9| 0) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1901~0.base_10| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1901~0.base_10|) |v_ULTIMATE.start_main_~#t1901~0.offset_9| 1)) |v_#memory_int_15|) (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t1901~0.base_10| 1) |v_#valid_31|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t1901~0.offset=|v_ULTIMATE.start_main_~#t1901~0.offset_9|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_4|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1901~0.base=|v_ULTIMATE.start_main_~#t1901~0.base_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1901~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length, ULTIMATE.start_main_~#t1901~0.base] because there is no mapped edge [2019-12-07 14:30:39,937 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [672] [672] P1ENTRY-->L5-3: Formula: (and (= v_P1Thread1of1ForFork0_~arg.base_6 |v_P1Thread1of1ForFork0_#in~arg.base_8|) (= 1 v_~x$w_buff0_used~0_82) (= v_P1Thread1of1ForFork0_~arg.offset_6 |v_P1Thread1of1ForFork0_#in~arg.offset_8|) (= v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_8 |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|) (= v_~x$w_buff1_used~0_45 v_~x$w_buff0_used~0_83) (= (ite (not (and (not (= (mod v_~x$w_buff1_used~0_45 256) 0)) (not (= (mod v_~x$w_buff0_used~0_82 256) 0)))) 1 0) |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|) (= v_~x$w_buff0~0_23 v_~x$w_buff1~0_17) (not (= 0 v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_8)) (= 1 v_~x$w_buff0~0_22)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_23, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_8|, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_8|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_83} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_22, P1Thread1of1ForFork0___VERIFIER_assert_~expression=v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_8, P1Thread1of1ForFork0_~arg.offset=v_P1Thread1of1ForFork0_~arg.offset_6, P1Thread1of1ForFork0_~arg.base=v_P1Thread1of1ForFork0_~arg.base_6, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_8|, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|, ~x$w_buff1~0=v_~x$w_buff1~0_17, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_8|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_45, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_82} AuxVars[] AssignedVars[~x$w_buff0~0, P1Thread1of1ForFork0___VERIFIER_assert_~expression, P1Thread1of1ForFork0_~arg.offset, P1Thread1of1ForFork0_~arg.base, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 14:30:39,937 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L820-1-->L822: Formula: (and (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1902~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1902~0.base_11|) |v_ULTIMATE.start_main_~#t1902~0.offset_10| 2)) |v_#memory_int_13|) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t1902~0.base_11| 4)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1902~0.base_11|) (= 0 |v_ULTIMATE.start_main_~#t1902~0.offset_10|) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t1902~0.base_11|)) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t1902~0.base_11| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t1902~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_14|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t1902~0.offset=|v_ULTIMATE.start_main_~#t1902~0.offset_10|, ULTIMATE.start_main_~#t1902~0.base=|v_ULTIMATE.start_main_~#t1902~0.base_11|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_13|, #length=|v_#length_13|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1902~0.offset, ULTIMATE.start_main_~#t1902~0.base, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet39] because there is no mapped edge [2019-12-07 14:30:39,938 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L795-2-->L795-4: Formula: (let ((.cse0 (= (mod ~x$w_buff1_used~0_In-1294754579 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In-1294754579 256)))) (or (and (not .cse0) (not .cse1) (= ~x$w_buff1~0_In-1294754579 |P2Thread1of1ForFork1_#t~ite32_Out-1294754579|)) (and (or .cse0 .cse1) (= ~x~0_In-1294754579 |P2Thread1of1ForFork1_#t~ite32_Out-1294754579|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1294754579, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1294754579, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1294754579, ~x~0=~x~0_In-1294754579} OutVars{P2Thread1of1ForFork1_#t~ite32=|P2Thread1of1ForFork1_#t~ite32_Out-1294754579|, ~x$w_buff1~0=~x$w_buff1~0_In-1294754579, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1294754579, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1294754579, ~x~0=~x~0_In-1294754579} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32] because there is no mapped edge [2019-12-07 14:30:39,939 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [677] [677] L795-4-->L796: Formula: (= v_~x~0_18 |v_P2Thread1of1ForFork1_#t~ite32_6|) InVars {P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_6|} OutVars{P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_5|, P2Thread1of1ForFork1_#t~ite33=|v_P2Thread1of1ForFork1_#t~ite33_5|, ~x~0=v_~x~0_18} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32, P2Thread1of1ForFork1_#t~ite33, ~x~0] because there is no mapped edge [2019-12-07 14:30:39,939 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] L796-->L796-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In-1738972703 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In-1738972703 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork1_#t~ite34_Out-1738972703| 0) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork1_#t~ite34_Out-1738972703| ~x$w_buff0_used~0_In-1738972703)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1738972703, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1738972703} OutVars{P2Thread1of1ForFork1_#t~ite34=|P2Thread1of1ForFork1_#t~ite34_Out-1738972703|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1738972703, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1738972703} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-12-07 14:30:39,940 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L740-->L740-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In864016231 256) 0))) (or (and (= |P0Thread1of1ForFork2_#t~ite9_Out864016231| |P0Thread1of1ForFork2_#t~ite8_Out864016231|) .cse0 (= ~x$w_buff0~0_In864016231 |P0Thread1of1ForFork2_#t~ite8_Out864016231|) (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In864016231 256) 0))) (or (= (mod ~x$w_buff0_used~0_In864016231 256) 0) (and (= (mod ~x$r_buff1_thd1~0_In864016231 256) 0) .cse1) (and .cse1 (= (mod ~x$w_buff1_used~0_In864016231 256) 0))))) (and (not .cse0) (= |P0Thread1of1ForFork2_#t~ite8_In864016231| |P0Thread1of1ForFork2_#t~ite8_Out864016231|) (= ~x$w_buff0~0_In864016231 |P0Thread1of1ForFork2_#t~ite9_Out864016231|)))) InVars {~x$w_buff0~0=~x$w_buff0~0_In864016231, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In864016231, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_In864016231|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In864016231, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In864016231, ~weak$$choice2~0=~weak$$choice2~0_In864016231, ~x$w_buff0_used~0=~x$w_buff0_used~0_In864016231} OutVars{~x$w_buff0~0=~x$w_buff0~0_In864016231, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In864016231, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_Out864016231|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In864016231, P0Thread1of1ForFork2_#t~ite9=|P0Thread1of1ForFork2_#t~ite9_Out864016231|, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In864016231, ~weak$$choice2~0=~weak$$choice2~0_In864016231, ~x$w_buff0_used~0=~x$w_buff0_used~0_In864016231} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite8, P0Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 14:30:39,941 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [747] [747] L776-->L776-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In2096790750 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd2~0_In2096790750 256) 0))) (or (and (= ~x$w_buff0_used~0_In2096790750 |P1Thread1of1ForFork0_#t~ite28_Out2096790750|) (or .cse0 .cse1)) (and (= 0 |P1Thread1of1ForFork0_#t~ite28_Out2096790750|) (not .cse0) (not .cse1)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In2096790750, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2096790750} OutVars{~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In2096790750, P1Thread1of1ForFork0_#t~ite28=|P1Thread1of1ForFork0_#t~ite28_Out2096790750|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2096790750} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite28] because there is no mapped edge [2019-12-07 14:30:39,941 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L777-->L777-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff1_thd2~0_In1946001960 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In1946001960 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In1946001960 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1946001960 256)))) (or (and (= |P1Thread1of1ForFork0_#t~ite29_Out1946001960| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= |P1Thread1of1ForFork0_#t~ite29_Out1946001960| ~x$w_buff1_used~0_In1946001960) (or .cse1 .cse0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1946001960, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1946001960, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1946001960, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1946001960} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1946001960, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1946001960, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1946001960, P1Thread1of1ForFork0_#t~ite29=|P1Thread1of1ForFork0_#t~ite29_Out1946001960|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1946001960} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 14:30:39,941 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [753] [753] L778-->L779: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-502074584 256))) (.cse2 (= ~x$r_buff0_thd2~0_In-502074584 ~x$r_buff0_thd2~0_Out-502074584)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-502074584 256)))) (or (and (= 0 ~x$r_buff0_thd2~0_Out-502074584) (not .cse0) (not .cse1)) (and .cse0 .cse2) (and .cse2 .cse1))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-502074584, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-502074584} OutVars{P1Thread1of1ForFork0_#t~ite30=|P1Thread1of1ForFork0_#t~ite30_Out-502074584|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-502074584, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-502074584} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite30, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 14:30:39,941 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L779-->L779-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff0_used~0_In-681213934 256))) (.cse3 (= 0 (mod ~x$r_buff0_thd2~0_In-681213934 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-681213934 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd2~0_In-681213934 256)))) (or (and (= 0 |P1Thread1of1ForFork0_#t~ite31_Out-681213934|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse0 .cse1) (= |P1Thread1of1ForFork0_#t~ite31_Out-681213934| ~x$r_buff1_thd2~0_In-681213934)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-681213934, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-681213934, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-681213934, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-681213934} OutVars{P1Thread1of1ForFork0_#t~ite31=|P1Thread1of1ForFork0_#t~ite31_Out-681213934|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-681213934, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-681213934, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-681213934, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-681213934} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 14:30:39,941 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L779-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= v_~x$r_buff1_thd2~0_52 |v_P1Thread1of1ForFork0_#t~ite31_28|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_63 1) v_~__unbuffered_cnt~0_62)) InVars {P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63} OutVars{P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_27|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_52, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 14:30:39,942 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L797-->L797-2: Formula: (let ((.cse2 (= (mod ~x$r_buff0_thd3~0_In-599208867 256) 0)) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In-599208867 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In-599208867 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-599208867 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff1_used~0_In-599208867 |P2Thread1of1ForFork1_#t~ite35_Out-599208867|) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork1_#t~ite35_Out-599208867| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-599208867, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-599208867, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-599208867, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-599208867} OutVars{P2Thread1of1ForFork1_#t~ite35=|P2Thread1of1ForFork1_#t~ite35_Out-599208867|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-599208867, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-599208867, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-599208867, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-599208867} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite35] because there is no mapped edge [2019-12-07 14:30:39,942 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [745] [745] L798-->L798-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In2030617445 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd3~0_In2030617445 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork1_#t~ite36_Out2030617445| 0)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork1_#t~ite36_Out2030617445| ~x$r_buff0_thd3~0_In2030617445)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In2030617445, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2030617445} OutVars{P2Thread1of1ForFork1_#t~ite36=|P2Thread1of1ForFork1_#t~ite36_Out2030617445|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In2030617445, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2030617445} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-12-07 14:30:39,943 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L743-->L743-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-142739703 256) 0))) (or (and (= |P0Thread1of1ForFork2_#t~ite17_In-142739703| |P0Thread1of1ForFork2_#t~ite17_Out-142739703|) (= ~x$w_buff1_used~0_In-142739703 |P0Thread1of1ForFork2_#t~ite18_Out-142739703|) (not .cse0)) (and (= |P0Thread1of1ForFork2_#t~ite17_Out-142739703| |P0Thread1of1ForFork2_#t~ite18_Out-142739703|) (let ((.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In-142739703 256)))) (or (and (= 0 (mod ~x$w_buff1_used~0_In-142739703 256)) .cse1) (and .cse1 (= (mod ~x$r_buff1_thd1~0_In-142739703 256) 0)) (= 0 (mod ~x$w_buff0_used~0_In-142739703 256)))) (= ~x$w_buff1_used~0_In-142739703 |P0Thread1of1ForFork2_#t~ite17_Out-142739703|) .cse0))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-142739703, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_In-142739703|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-142739703, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-142739703, ~weak$$choice2~0=~weak$$choice2~0_In-142739703, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-142739703} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-142739703, P0Thread1of1ForFork2_#t~ite18=|P0Thread1of1ForFork2_#t~ite18_Out-142739703|, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_Out-142739703|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-142739703, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-142739703, ~weak$$choice2~0=~weak$$choice2~0_In-142739703, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-142739703} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite18, P0Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 14:30:39,943 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [730] [730] L744-->L745: Formula: (and (= v_~x$r_buff0_thd1~0_104 v_~x$r_buff0_thd1~0_103) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_104, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{P0Thread1of1ForFork2_#t~ite20=|v_P0Thread1of1ForFork2_#t~ite20_10|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_103, P0Thread1of1ForFork2_#t~ite19=|v_P0Thread1of1ForFork2_#t~ite19_11|, ~weak$$choice2~0=v_~weak$$choice2~0_39, P0Thread1of1ForFork2_#t~ite21=|v_P0Thread1of1ForFork2_#t~ite21_6|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite20, ~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite19, P0Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 14:30:39,944 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L745-->L745-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-2071928773 256) 0))) (or (and .cse0 (= ~x$r_buff1_thd1~0_In-2071928773 |P0Thread1of1ForFork2_#t~ite23_Out-2071928773|) (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In-2071928773 256) 0))) (or (and (= (mod ~x$w_buff1_used~0_In-2071928773 256) 0) .cse1) (and (= 0 (mod ~x$r_buff1_thd1~0_In-2071928773 256)) .cse1) (= (mod ~x$w_buff0_used~0_In-2071928773 256) 0))) (= |P0Thread1of1ForFork2_#t~ite24_Out-2071928773| |P0Thread1of1ForFork2_#t~ite23_Out-2071928773|)) (and (not .cse0) (= ~x$r_buff1_thd1~0_In-2071928773 |P0Thread1of1ForFork2_#t~ite24_Out-2071928773|) (= |P0Thread1of1ForFork2_#t~ite23_In-2071928773| |P0Thread1of1ForFork2_#t~ite23_Out-2071928773|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-2071928773, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2071928773, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-2071928773, ~weak$$choice2~0=~weak$$choice2~0_In-2071928773, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_In-2071928773|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2071928773} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-2071928773, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2071928773, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-2071928773, P0Thread1of1ForFork2_#t~ite24=|P0Thread1of1ForFork2_#t~ite24_Out-2071928773|, ~weak$$choice2~0=~weak$$choice2~0_In-2071928773, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_Out-2071928773|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2071928773} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite24, P0Thread1of1ForFork2_#t~ite23] because there is no mapped edge [2019-12-07 14:30:39,944 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L799-->L799-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd3~0_In1065375475 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1065375475 256))) (.cse2 (= (mod ~x$r_buff1_thd3~0_In1065375475 256) 0)) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In1065375475 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork1_#t~ite37_Out1065375475| ~x$r_buff1_thd3~0_In1065375475)) (and (= |P2Thread1of1ForFork1_#t~ite37_Out1065375475| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1065375475, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1065375475, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1065375475, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1065375475} OutVars{P2Thread1of1ForFork1_#t~ite37=|P2Thread1of1ForFork1_#t~ite37_Out1065375475|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1065375475, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1065375475, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1065375475, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1065375475} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-12-07 14:30:39,944 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L799-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_57 1) v_~__unbuffered_cnt~0_56) (= v_~x$r_buff1_thd3~0_54 |v_P2Thread1of1ForFork1_#t~ite37_28|) (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|)) InVars {P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57} OutVars{P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_27|, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_54, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37, P2Thread1of1ForFork1_#res.base, ~x$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 14:30:39,944 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [703] [703] L747-->L755: Formula: (and (= v_~x$flush_delayed~0_16 0) (not (= (mod v_~x$flush_delayed~0_17 256) 0)) (= v_~x~0_35 v_~x$mem_tmp~0_10) (= (+ v_~__unbuffered_cnt~0_30 1) v_~__unbuffered_cnt~0_29)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_17, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_30, ~x$mem_tmp~0=v_~x$mem_tmp~0_10} OutVars{P0Thread1of1ForFork2_#t~ite25=|v_P0Thread1of1ForFork2_#t~ite25_13|, ~x$flush_delayed~0=v_~x$flush_delayed~0_16, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_29, ~x$mem_tmp~0=v_~x$mem_tmp~0_10, ~x~0=v_~x~0_35} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite25, ~x$flush_delayed~0, ~__unbuffered_cnt~0, ~x~0] because there is no mapped edge [2019-12-07 14:30:39,944 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [698] [698] L826-->L828-2: Formula: (and (or (= 0 (mod v_~x$w_buff0_used~0_172 256)) (= (mod v_~x$r_buff0_thd0~0_29 256) 0)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_29, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_172} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_29, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_172} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 14:30:39,945 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L828-2-->L828-4: Formula: (let ((.cse0 (= (mod ~x$w_buff1_used~0_In99865692 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd0~0_In99865692 256)))) (or (and (not .cse0) (not .cse1) (= ~x$w_buff1~0_In99865692 |ULTIMATE.start_main_#t~ite41_Out99865692|)) (and (or .cse0 .cse1) (= ~x~0_In99865692 |ULTIMATE.start_main_#t~ite41_Out99865692|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In99865692, ~x$w_buff1_used~0=~x$w_buff1_used~0_In99865692, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In99865692, ~x~0=~x~0_In99865692} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out99865692|, ~x$w_buff1~0=~x$w_buff1~0_In99865692, ~x$w_buff1_used~0=~x$w_buff1_used~0_In99865692, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In99865692, ~x~0=~x~0_In99865692} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41] because there is no mapped edge [2019-12-07 14:30:39,945 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L828-4-->L829: Formula: (= v_~x~0_24 |v_ULTIMATE.start_main_#t~ite41_11|) InVars {ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_11|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_10|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_6|, ~x~0=v_~x~0_24} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite42, ~x~0] because there is no mapped edge [2019-12-07 14:30:39,945 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [744] [744] L829-->L829-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-702445644 256))) (.cse0 (= (mod ~x$r_buff0_thd0~0_In-702445644 256) 0))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In-702445644 |ULTIMATE.start_main_#t~ite43_Out-702445644|)) (and (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite43_Out-702445644|) (not .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-702445644, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-702445644} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-702445644, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out-702445644|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-702445644} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-12-07 14:30:39,945 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [746] [746] L830-->L830-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff1_used~0_In-734814481 256))) (.cse3 (= (mod ~x$r_buff1_thd0~0_In-734814481 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In-734814481 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd0~0_In-734814481 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite44_Out-734814481|)) (and (= ~x$w_buff1_used~0_In-734814481 |ULTIMATE.start_main_#t~ite44_Out-734814481|) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-734814481, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-734814481, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-734814481, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-734814481} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-734814481, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-734814481, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-734814481, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-734814481|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-734814481} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 14:30:39,945 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [751] [751] L831-->L831-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1633402989 256))) (.cse1 (= (mod ~x$r_buff0_thd0~0_In-1633402989 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite45_Out-1633402989| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite45_Out-1633402989| ~x$r_buff0_thd0~0_In-1633402989)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1633402989, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1633402989} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1633402989, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-1633402989|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1633402989} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 14:30:39,946 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [741] [741] L832-->L832-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-957727977 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In-957727977 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd0~0_In-957727977 256))) (.cse3 (= (mod ~x$w_buff1_used~0_In-957727977 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite46_Out-957727977| ~x$r_buff1_thd0~0_In-957727977)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite46_Out-957727977| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-957727977, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-957727977, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-957727977, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-957727977} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-957727977, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out-957727977|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-957727977, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-957727977, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-957727977} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 14:30:39,946 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L832-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_26 (ite (= 0 (ite (not (and (= v_~y~0_272 2) (= 0 v_~__unbuffered_p0_EAX~0_53) (= v_~__unbuffered_p2_EBX~0_34 1) (= 1 v_~__unbuffered_p2_EAX~0_34))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_21 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|) (= v_~x$r_buff1_thd0~0_293 |v_ULTIMATE.start_main_#t~ite46_58|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14| (mod v_~main$tmp_guard1~0_26 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_21 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_53, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_58|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_34, ~y~0=v_~y~0_272} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_53, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_21, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_57|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_26, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_34, ~y~0=v_~y~0_272, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_293, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ~x$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 14:30:39,989 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 02:30:39 BasicIcfg [2019-12-07 14:30:39,989 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 14:30:39,989 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 14:30:39,989 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 14:30:39,990 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 14:30:39,990 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:28:47" (3/4) ... [2019-12-07 14:30:39,991 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 14:30:39,992 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [808] [808] ULTIMATE.startENTRY-->L818: Formula: (let ((.cse0 (store |v_#valid_64| 0 0))) (and (= 0 v_~x$read_delayed_var~0.base_6) (= v_~x$r_buff1_thd1~0_448 0) (= 0 v_~x$read_delayed_var~0.offset_6) (= 0 v_~x$w_buff1_used~0_643) (= 0 v_~x~0_243) (= v_~__unbuffered_p2_EBX~0_64 0) (= 0 v_~__unbuffered_p0_EAX~0_82) (= 0 v_~x$r_buff1_thd2~0_283) (= v_~x$flush_delayed~0_67 0) (= 0 v_~__unbuffered_p2_EAX~0_64) (= v_~main$tmp_guard1~0_51 0) (= v_~main$tmp_guard0~0_41 0) (< 0 |v_#StackHeapBarrier_17|) (= v_~x$r_buff1_thd0~0_322 0) (= 0 v_~x$w_buff1~0_350) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1900~0.base_26| 4)) (= v_~weak$$choice2~0_208 0) (= 0 v_~x$w_buff0~0_432) (= 0 v_~x$read_delayed~0_6) (= 0 v_~__unbuffered_cnt~0_96) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1900~0.base_26| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1900~0.base_26|) |v_ULTIMATE.start_main_~#t1900~0.offset_20| 0)) |v_#memory_int_23|) (= 0 v_~x$r_buff0_thd3~0_150) (= 0 |v_ULTIMATE.start_main_~#t1900~0.offset_20|) (= v_~x$r_buff0_thd1~0_385 0) (= 0 v_~x$r_buff1_thd3~0_288) (= v_~x$mem_tmp~0_44 0) (= 0 v_~x$r_buff0_thd2~0_345) (= |v_#NULL.offset_5| 0) (= 0 v_~x$w_buff0_used~0_952) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1900~0.base_26|) (= v_~x$r_buff0_thd0~0_164 0) (= 0 v_~weak$$choice0~0_40) (= v_~y~0_300 0) (= 0 |v_#NULL.base_5|) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1900~0.base_26|)) (= |v_#valid_62| (store .cse0 |v_ULTIMATE.start_main_~#t1900~0.base_26| 1)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_24|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t1901~0.offset=|v_ULTIMATE.start_main_~#t1901~0.offset_20|, ~x$w_buff0~0=v_~x$w_buff0~0_432, ~x$flush_delayed~0=v_~x$flush_delayed~0_67, #NULL.offset=|v_#NULL.offset_5|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_448, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_150, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_40|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_34|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_82, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_64, ULTIMATE.start_main_~#t1900~0.base=|v_ULTIMATE.start_main_~#t1900~0.base_26|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_164, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_64, ~x$w_buff1~0=v_~x$w_buff1~0_350, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_643, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_283, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_6, ~weak$$choice0~0=v_~weak$$choice0~0_40, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_~#t1900~0.offset=|v_ULTIMATE.start_main_~#t1900~0.offset_20|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_96, ~x~0=v_~x~0_243, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_385, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_106|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_288, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_51, ~x$mem_tmp~0=v_~x$mem_tmp~0_44, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_51|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_60|, ULTIMATE.start_main_~#t1902~0.offset=|v_ULTIMATE.start_main_~#t1902~0.offset_14|, ~y~0=v_~y~0_300, ULTIMATE.start_main_~#t1901~0.base=|v_ULTIMATE.start_main_~#t1901~0.base_27|, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_15|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_41, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_322, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_345, #NULL.base=|v_#NULL.base_5|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_952, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_60|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_6, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, #valid=|v_#valid_62|, ULTIMATE.start_main_~#t1902~0.base=|v_ULTIMATE.start_main_~#t1902~0.base_21|, #memory_int=|v_#memory_int_23|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_8|, ~weak$$choice2~0=v_~weak$$choice2~0_208, ~x$read_delayed~0=v_~x$read_delayed~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1901~0.offset, ~x$w_buff0~0, ~x$r_buff0_thd1~0, ~x$flush_delayed~0, #NULL.offset, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~x$r_buff1_thd1~0, ~main$tmp_guard1~0, ~x$r_buff0_thd3~0, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44, ~__unbuffered_p0_EAX~0, ULTIMATE.start_main_~#t1902~0.offset, #length, ~__unbuffered_p2_EAX~0, ~y~0, ULTIMATE.start_main_~#t1901~0.base, ULTIMATE.start_main_~#t1900~0.base, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~nondet40, ~__unbuffered_p2_EBX~0, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ~x$read_delayed_var~0.base, #NULL.base, ~x$w_buff0_used~0, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_~#t1900~0.offset, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_~#t1902~0.base, ULTIMATE.start_main_#t~nondet38, #memory_int, ~__unbuffered_cnt~0, ULTIMATE.start_main_#t~nondet39, ~weak$$choice2~0, ~x~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 14:30:39,992 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L818-1-->L820: Formula: (and (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1901~0.base_10| 4)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1901~0.base_10|) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t1901~0.base_10|)) (not (= |v_ULTIMATE.start_main_~#t1901~0.base_10| 0)) (= |v_ULTIMATE.start_main_~#t1901~0.offset_9| 0) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1901~0.base_10| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1901~0.base_10|) |v_ULTIMATE.start_main_~#t1901~0.offset_9| 1)) |v_#memory_int_15|) (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t1901~0.base_10| 1) |v_#valid_31|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t1901~0.offset=|v_ULTIMATE.start_main_~#t1901~0.offset_9|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_4|, #length=|v_#length_15|, ULTIMATE.start_main_~#t1901~0.base=|v_ULTIMATE.start_main_~#t1901~0.base_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1901~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length, ULTIMATE.start_main_~#t1901~0.base] because there is no mapped edge [2019-12-07 14:30:39,992 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [672] [672] P1ENTRY-->L5-3: Formula: (and (= v_P1Thread1of1ForFork0_~arg.base_6 |v_P1Thread1of1ForFork0_#in~arg.base_8|) (= 1 v_~x$w_buff0_used~0_82) (= v_P1Thread1of1ForFork0_~arg.offset_6 |v_P1Thread1of1ForFork0_#in~arg.offset_8|) (= v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_8 |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|) (= v_~x$w_buff1_used~0_45 v_~x$w_buff0_used~0_83) (= (ite (not (and (not (= (mod v_~x$w_buff1_used~0_45 256) 0)) (not (= (mod v_~x$w_buff0_used~0_82 256) 0)))) 1 0) |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|) (= v_~x$w_buff0~0_23 v_~x$w_buff1~0_17) (not (= 0 v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_8)) (= 1 v_~x$w_buff0~0_22)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_23, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_8|, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_8|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_83} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_22, P1Thread1of1ForFork0___VERIFIER_assert_~expression=v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_8, P1Thread1of1ForFork0_~arg.offset=v_P1Thread1of1ForFork0_~arg.offset_6, P1Thread1of1ForFork0_~arg.base=v_P1Thread1of1ForFork0_~arg.base_6, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_8|, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|, ~x$w_buff1~0=v_~x$w_buff1~0_17, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_8|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_45, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_82} AuxVars[] AssignedVars[~x$w_buff0~0, P1Thread1of1ForFork0___VERIFIER_assert_~expression, P1Thread1of1ForFork0_~arg.offset, P1Thread1of1ForFork0_~arg.base, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 14:30:39,992 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L820-1-->L822: Formula: (and (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1902~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1902~0.base_11|) |v_ULTIMATE.start_main_~#t1902~0.offset_10| 2)) |v_#memory_int_13|) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t1902~0.base_11| 4)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1902~0.base_11|) (= 0 |v_ULTIMATE.start_main_~#t1902~0.offset_10|) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t1902~0.base_11|)) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t1902~0.base_11| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t1902~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_14|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t1902~0.offset=|v_ULTIMATE.start_main_~#t1902~0.offset_10|, ULTIMATE.start_main_~#t1902~0.base=|v_ULTIMATE.start_main_~#t1902~0.base_11|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_13|, #length=|v_#length_13|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1902~0.offset, ULTIMATE.start_main_~#t1902~0.base, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet39] because there is no mapped edge [2019-12-07 14:30:39,994 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L795-2-->L795-4: Formula: (let ((.cse0 (= (mod ~x$w_buff1_used~0_In-1294754579 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In-1294754579 256)))) (or (and (not .cse0) (not .cse1) (= ~x$w_buff1~0_In-1294754579 |P2Thread1of1ForFork1_#t~ite32_Out-1294754579|)) (and (or .cse0 .cse1) (= ~x~0_In-1294754579 |P2Thread1of1ForFork1_#t~ite32_Out-1294754579|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1294754579, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1294754579, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1294754579, ~x~0=~x~0_In-1294754579} OutVars{P2Thread1of1ForFork1_#t~ite32=|P2Thread1of1ForFork1_#t~ite32_Out-1294754579|, ~x$w_buff1~0=~x$w_buff1~0_In-1294754579, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1294754579, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1294754579, ~x~0=~x~0_In-1294754579} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32] because there is no mapped edge [2019-12-07 14:30:39,994 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [677] [677] L795-4-->L796: Formula: (= v_~x~0_18 |v_P2Thread1of1ForFork1_#t~ite32_6|) InVars {P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_6|} OutVars{P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_5|, P2Thread1of1ForFork1_#t~ite33=|v_P2Thread1of1ForFork1_#t~ite33_5|, ~x~0=v_~x~0_18} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32, P2Thread1of1ForFork1_#t~ite33, ~x~0] because there is no mapped edge [2019-12-07 14:30:39,994 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] L796-->L796-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In-1738972703 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In-1738972703 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork1_#t~ite34_Out-1738972703| 0) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork1_#t~ite34_Out-1738972703| ~x$w_buff0_used~0_In-1738972703)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1738972703, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1738972703} OutVars{P2Thread1of1ForFork1_#t~ite34=|P2Thread1of1ForFork1_#t~ite34_Out-1738972703|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1738972703, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1738972703} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-12-07 14:30:39,995 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L740-->L740-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In864016231 256) 0))) (or (and (= |P0Thread1of1ForFork2_#t~ite9_Out864016231| |P0Thread1of1ForFork2_#t~ite8_Out864016231|) .cse0 (= ~x$w_buff0~0_In864016231 |P0Thread1of1ForFork2_#t~ite8_Out864016231|) (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In864016231 256) 0))) (or (= (mod ~x$w_buff0_used~0_In864016231 256) 0) (and (= (mod ~x$r_buff1_thd1~0_In864016231 256) 0) .cse1) (and .cse1 (= (mod ~x$w_buff1_used~0_In864016231 256) 0))))) (and (not .cse0) (= |P0Thread1of1ForFork2_#t~ite8_In864016231| |P0Thread1of1ForFork2_#t~ite8_Out864016231|) (= ~x$w_buff0~0_In864016231 |P0Thread1of1ForFork2_#t~ite9_Out864016231|)))) InVars {~x$w_buff0~0=~x$w_buff0~0_In864016231, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In864016231, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_In864016231|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In864016231, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In864016231, ~weak$$choice2~0=~weak$$choice2~0_In864016231, ~x$w_buff0_used~0=~x$w_buff0_used~0_In864016231} OutVars{~x$w_buff0~0=~x$w_buff0~0_In864016231, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In864016231, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_Out864016231|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In864016231, P0Thread1of1ForFork2_#t~ite9=|P0Thread1of1ForFork2_#t~ite9_Out864016231|, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In864016231, ~weak$$choice2~0=~weak$$choice2~0_In864016231, ~x$w_buff0_used~0=~x$w_buff0_used~0_In864016231} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite8, P0Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 14:30:39,996 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [747] [747] L776-->L776-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In2096790750 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd2~0_In2096790750 256) 0))) (or (and (= ~x$w_buff0_used~0_In2096790750 |P1Thread1of1ForFork0_#t~ite28_Out2096790750|) (or .cse0 .cse1)) (and (= 0 |P1Thread1of1ForFork0_#t~ite28_Out2096790750|) (not .cse0) (not .cse1)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In2096790750, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2096790750} OutVars{~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In2096790750, P1Thread1of1ForFork0_#t~ite28=|P1Thread1of1ForFork0_#t~ite28_Out2096790750|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2096790750} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite28] because there is no mapped edge [2019-12-07 14:30:39,996 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L777-->L777-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff1_thd2~0_In1946001960 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In1946001960 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In1946001960 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1946001960 256)))) (or (and (= |P1Thread1of1ForFork0_#t~ite29_Out1946001960| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= |P1Thread1of1ForFork0_#t~ite29_Out1946001960| ~x$w_buff1_used~0_In1946001960) (or .cse1 .cse0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1946001960, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1946001960, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1946001960, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1946001960} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1946001960, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1946001960, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1946001960, P1Thread1of1ForFork0_#t~ite29=|P1Thread1of1ForFork0_#t~ite29_Out1946001960|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1946001960} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 14:30:39,996 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [753] [753] L778-->L779: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-502074584 256))) (.cse2 (= ~x$r_buff0_thd2~0_In-502074584 ~x$r_buff0_thd2~0_Out-502074584)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-502074584 256)))) (or (and (= 0 ~x$r_buff0_thd2~0_Out-502074584) (not .cse0) (not .cse1)) (and .cse0 .cse2) (and .cse2 .cse1))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-502074584, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-502074584} OutVars{P1Thread1of1ForFork0_#t~ite30=|P1Thread1of1ForFork0_#t~ite30_Out-502074584|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-502074584, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-502074584} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite30, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 14:30:39,997 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L779-->L779-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff0_used~0_In-681213934 256))) (.cse3 (= 0 (mod ~x$r_buff0_thd2~0_In-681213934 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-681213934 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd2~0_In-681213934 256)))) (or (and (= 0 |P1Thread1of1ForFork0_#t~ite31_Out-681213934|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse0 .cse1) (= |P1Thread1of1ForFork0_#t~ite31_Out-681213934| ~x$r_buff1_thd2~0_In-681213934)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-681213934, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-681213934, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-681213934, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-681213934} OutVars{P1Thread1of1ForFork0_#t~ite31=|P1Thread1of1ForFork0_#t~ite31_Out-681213934|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-681213934, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-681213934, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-681213934, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-681213934} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 14:30:39,997 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L779-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= v_~x$r_buff1_thd2~0_52 |v_P1Thread1of1ForFork0_#t~ite31_28|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_63 1) v_~__unbuffered_cnt~0_62)) InVars {P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63} OutVars{P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_27|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_52, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 14:30:39,997 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L797-->L797-2: Formula: (let ((.cse2 (= (mod ~x$r_buff0_thd3~0_In-599208867 256) 0)) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In-599208867 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In-599208867 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-599208867 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff1_used~0_In-599208867 |P2Thread1of1ForFork1_#t~ite35_Out-599208867|) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork1_#t~ite35_Out-599208867| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-599208867, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-599208867, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-599208867, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-599208867} OutVars{P2Thread1of1ForFork1_#t~ite35=|P2Thread1of1ForFork1_#t~ite35_Out-599208867|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-599208867, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-599208867, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-599208867, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-599208867} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite35] because there is no mapped edge [2019-12-07 14:30:39,997 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [745] [745] L798-->L798-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In2030617445 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd3~0_In2030617445 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork1_#t~ite36_Out2030617445| 0)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork1_#t~ite36_Out2030617445| ~x$r_buff0_thd3~0_In2030617445)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In2030617445, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2030617445} OutVars{P2Thread1of1ForFork1_#t~ite36=|P2Thread1of1ForFork1_#t~ite36_Out2030617445|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In2030617445, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2030617445} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-12-07 14:30:39,998 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L743-->L743-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-142739703 256) 0))) (or (and (= |P0Thread1of1ForFork2_#t~ite17_In-142739703| |P0Thread1of1ForFork2_#t~ite17_Out-142739703|) (= ~x$w_buff1_used~0_In-142739703 |P0Thread1of1ForFork2_#t~ite18_Out-142739703|) (not .cse0)) (and (= |P0Thread1of1ForFork2_#t~ite17_Out-142739703| |P0Thread1of1ForFork2_#t~ite18_Out-142739703|) (let ((.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In-142739703 256)))) (or (and (= 0 (mod ~x$w_buff1_used~0_In-142739703 256)) .cse1) (and .cse1 (= (mod ~x$r_buff1_thd1~0_In-142739703 256) 0)) (= 0 (mod ~x$w_buff0_used~0_In-142739703 256)))) (= ~x$w_buff1_used~0_In-142739703 |P0Thread1of1ForFork2_#t~ite17_Out-142739703|) .cse0))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-142739703, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_In-142739703|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-142739703, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-142739703, ~weak$$choice2~0=~weak$$choice2~0_In-142739703, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-142739703} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-142739703, P0Thread1of1ForFork2_#t~ite18=|P0Thread1of1ForFork2_#t~ite18_Out-142739703|, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_Out-142739703|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-142739703, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-142739703, ~weak$$choice2~0=~weak$$choice2~0_In-142739703, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-142739703} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite18, P0Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 14:30:39,999 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [730] [730] L744-->L745: Formula: (and (= v_~x$r_buff0_thd1~0_104 v_~x$r_buff0_thd1~0_103) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_104, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{P0Thread1of1ForFork2_#t~ite20=|v_P0Thread1of1ForFork2_#t~ite20_10|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_103, P0Thread1of1ForFork2_#t~ite19=|v_P0Thread1of1ForFork2_#t~ite19_11|, ~weak$$choice2~0=v_~weak$$choice2~0_39, P0Thread1of1ForFork2_#t~ite21=|v_P0Thread1of1ForFork2_#t~ite21_6|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite20, ~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite19, P0Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 14:30:39,999 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L745-->L745-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-2071928773 256) 0))) (or (and .cse0 (= ~x$r_buff1_thd1~0_In-2071928773 |P0Thread1of1ForFork2_#t~ite23_Out-2071928773|) (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In-2071928773 256) 0))) (or (and (= (mod ~x$w_buff1_used~0_In-2071928773 256) 0) .cse1) (and (= 0 (mod ~x$r_buff1_thd1~0_In-2071928773 256)) .cse1) (= (mod ~x$w_buff0_used~0_In-2071928773 256) 0))) (= |P0Thread1of1ForFork2_#t~ite24_Out-2071928773| |P0Thread1of1ForFork2_#t~ite23_Out-2071928773|)) (and (not .cse0) (= ~x$r_buff1_thd1~0_In-2071928773 |P0Thread1of1ForFork2_#t~ite24_Out-2071928773|) (= |P0Thread1of1ForFork2_#t~ite23_In-2071928773| |P0Thread1of1ForFork2_#t~ite23_Out-2071928773|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-2071928773, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2071928773, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-2071928773, ~weak$$choice2~0=~weak$$choice2~0_In-2071928773, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_In-2071928773|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2071928773} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-2071928773, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2071928773, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-2071928773, P0Thread1of1ForFork2_#t~ite24=|P0Thread1of1ForFork2_#t~ite24_Out-2071928773|, ~weak$$choice2~0=~weak$$choice2~0_In-2071928773, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_Out-2071928773|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2071928773} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite24, P0Thread1of1ForFork2_#t~ite23] because there is no mapped edge [2019-12-07 14:30:39,999 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L799-->L799-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd3~0_In1065375475 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1065375475 256))) (.cse2 (= (mod ~x$r_buff1_thd3~0_In1065375475 256) 0)) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In1065375475 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork1_#t~ite37_Out1065375475| ~x$r_buff1_thd3~0_In1065375475)) (and (= |P2Thread1of1ForFork1_#t~ite37_Out1065375475| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1065375475, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1065375475, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1065375475, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1065375475} OutVars{P2Thread1of1ForFork1_#t~ite37=|P2Thread1of1ForFork1_#t~ite37_Out1065375475|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1065375475, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1065375475, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1065375475, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1065375475} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-12-07 14:30:39,999 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L799-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_57 1) v_~__unbuffered_cnt~0_56) (= v_~x$r_buff1_thd3~0_54 |v_P2Thread1of1ForFork1_#t~ite37_28|) (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|)) InVars {P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57} OutVars{P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_27|, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_54, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37, P2Thread1of1ForFork1_#res.base, ~x$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 14:30:39,999 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [703] [703] L747-->L755: Formula: (and (= v_~x$flush_delayed~0_16 0) (not (= (mod v_~x$flush_delayed~0_17 256) 0)) (= v_~x~0_35 v_~x$mem_tmp~0_10) (= (+ v_~__unbuffered_cnt~0_30 1) v_~__unbuffered_cnt~0_29)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_17, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_30, ~x$mem_tmp~0=v_~x$mem_tmp~0_10} OutVars{P0Thread1of1ForFork2_#t~ite25=|v_P0Thread1of1ForFork2_#t~ite25_13|, ~x$flush_delayed~0=v_~x$flush_delayed~0_16, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_29, ~x$mem_tmp~0=v_~x$mem_tmp~0_10, ~x~0=v_~x~0_35} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite25, ~x$flush_delayed~0, ~__unbuffered_cnt~0, ~x~0] because there is no mapped edge [2019-12-07 14:30:40,000 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [698] [698] L826-->L828-2: Formula: (and (or (= 0 (mod v_~x$w_buff0_used~0_172 256)) (= (mod v_~x$r_buff0_thd0~0_29 256) 0)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_29, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_172} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_29, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_172} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 14:30:40,000 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L828-2-->L828-4: Formula: (let ((.cse0 (= (mod ~x$w_buff1_used~0_In99865692 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd0~0_In99865692 256)))) (or (and (not .cse0) (not .cse1) (= ~x$w_buff1~0_In99865692 |ULTIMATE.start_main_#t~ite41_Out99865692|)) (and (or .cse0 .cse1) (= ~x~0_In99865692 |ULTIMATE.start_main_#t~ite41_Out99865692|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In99865692, ~x$w_buff1_used~0=~x$w_buff1_used~0_In99865692, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In99865692, ~x~0=~x~0_In99865692} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out99865692|, ~x$w_buff1~0=~x$w_buff1~0_In99865692, ~x$w_buff1_used~0=~x$w_buff1_used~0_In99865692, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In99865692, ~x~0=~x~0_In99865692} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41] because there is no mapped edge [2019-12-07 14:30:40,000 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L828-4-->L829: Formula: (= v_~x~0_24 |v_ULTIMATE.start_main_#t~ite41_11|) InVars {ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_11|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_10|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_6|, ~x~0=v_~x~0_24} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite42, ~x~0] because there is no mapped edge [2019-12-07 14:30:40,000 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [744] [744] L829-->L829-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-702445644 256))) (.cse0 (= (mod ~x$r_buff0_thd0~0_In-702445644 256) 0))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In-702445644 |ULTIMATE.start_main_#t~ite43_Out-702445644|)) (and (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite43_Out-702445644|) (not .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-702445644, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-702445644} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-702445644, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out-702445644|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-702445644} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-12-07 14:30:40,000 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [746] [746] L830-->L830-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff1_used~0_In-734814481 256))) (.cse3 (= (mod ~x$r_buff1_thd0~0_In-734814481 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In-734814481 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd0~0_In-734814481 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite44_Out-734814481|)) (and (= ~x$w_buff1_used~0_In-734814481 |ULTIMATE.start_main_#t~ite44_Out-734814481|) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-734814481, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-734814481, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-734814481, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-734814481} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-734814481, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-734814481, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-734814481, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-734814481|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-734814481} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 14:30:40,000 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [751] [751] L831-->L831-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1633402989 256))) (.cse1 (= (mod ~x$r_buff0_thd0~0_In-1633402989 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite45_Out-1633402989| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite45_Out-1633402989| ~x$r_buff0_thd0~0_In-1633402989)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1633402989, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1633402989} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1633402989, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-1633402989|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1633402989} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 14:30:40,001 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [741] [741] L832-->L832-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-957727977 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In-957727977 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd0~0_In-957727977 256))) (.cse3 (= (mod ~x$w_buff1_used~0_In-957727977 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite46_Out-957727977| ~x$r_buff1_thd0~0_In-957727977)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite46_Out-957727977| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-957727977, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-957727977, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-957727977, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-957727977} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-957727977, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out-957727977|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-957727977, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-957727977, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-957727977} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 14:30:40,001 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L832-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_26 (ite (= 0 (ite (not (and (= v_~y~0_272 2) (= 0 v_~__unbuffered_p0_EAX~0_53) (= v_~__unbuffered_p2_EBX~0_34 1) (= 1 v_~__unbuffered_p2_EAX~0_34))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_21 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|) (= v_~x$r_buff1_thd0~0_293 |v_ULTIMATE.start_main_#t~ite46_58|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14| (mod v_~main$tmp_guard1~0_26 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_21 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_53, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_58|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_34, ~y~0=v_~y~0_272} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_53, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_21, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_57|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_26, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_34, ~y~0=v_~y~0_272, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_293, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ~x$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 14:30:40,051 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_d8739764-5d4e-4321-9a25-da3bc01d8857/bin/uautomizer/witness.graphml [2019-12-07 14:30:40,052 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 14:30:40,053 INFO L168 Benchmark]: Toolchain (without parser) took 113193.57 ms. Allocated memory was 1.0 GB in the beginning and 7.0 GB in the end (delta: 6.0 GB). Free memory was 935.5 MB in the beginning and 4.5 GB in the end (delta: -3.6 GB). Peak memory consumption was 2.4 GB. Max. memory is 11.5 GB. [2019-12-07 14:30:40,053 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 955.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 14:30:40,053 INFO L168 Benchmark]: CACSL2BoogieTranslator took 361.69 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 125.3 MB). Free memory was 935.5 MB in the beginning and 1.1 GB in the end (delta: -157.6 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. [2019-12-07 14:30:40,053 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.29 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 14:30:40,053 INFO L168 Benchmark]: Boogie Preprocessor took 24.17 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 14:30:40,054 INFO L168 Benchmark]: RCFGBuilder took 395.56 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.2 MB). Peak memory consumption was 55.2 MB. Max. memory is 11.5 GB. [2019-12-07 14:30:40,054 INFO L168 Benchmark]: TraceAbstraction took 112310.50 ms. Allocated memory was 1.2 GB in the beginning and 7.0 GB in the end (delta: 5.8 GB). Free memory was 1.0 GB in the beginning and 4.5 GB in the end (delta: -3.5 GB). Peak memory consumption was 2.3 GB. Max. memory is 11.5 GB. [2019-12-07 14:30:40,054 INFO L168 Benchmark]: Witness Printer took 62.22 ms. Allocated memory is still 7.0 GB. Free memory was 4.5 GB in the beginning and 4.5 GB in the end (delta: 14.0 MB). Peak memory consumption was 14.0 MB. Max. memory is 11.5 GB. [2019-12-07 14:30:40,055 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 955.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 361.69 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 125.3 MB). Free memory was 935.5 MB in the beginning and 1.1 GB in the end (delta: -157.6 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.29 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 24.17 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 395.56 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.2 MB). Peak memory consumption was 55.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 112310.50 ms. Allocated memory was 1.2 GB in the beginning and 7.0 GB in the end (delta: 5.8 GB). Free memory was 1.0 GB in the beginning and 4.5 GB in the end (delta: -3.5 GB). Peak memory consumption was 2.3 GB. Max. memory is 11.5 GB. * Witness Printer took 62.22 ms. Allocated memory is still 7.0 GB. Free memory was 4.5 GB in the beginning and 4.5 GB in the end (delta: 14.0 MB). Peak memory consumption was 14.0 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 163 ProgramPointsBefore, 83 ProgramPointsAfterwards, 194 TransitionsBefore, 92 TransitionsAfterwards, 16696 CoEnabledTransitionPairs, 7 FixpointIterations, 32 TrivialSequentialCompositions, 45 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 36 ConcurrentYvCompositions, 26 ChoiceCompositions, 6760 VarBasedMoverChecksPositive, 302 VarBasedMoverChecksNegative, 126 SemBasedMoverChecksPositive, 261 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 66367 CheckedPairsTotal, 113 TotalNumberOfCompositions - CounterExampleResult [Line: 5]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L818] FCALL, FORK 0 pthread_create(&t1900, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L820] FCALL, FORK 0 pthread_create(&t1901, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L822] FCALL, FORK 0 pthread_create(&t1902, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0] [L765] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L766] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L767] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L768] 2 x$r_buff1_thd3 = x$r_buff0_thd3 [L769] 2 x$r_buff0_thd2 = (_Bool)1 [L772] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L775] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L789] 3 __unbuffered_p2_EAX = y [L792] 3 __unbuffered_p2_EBX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L795] 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L775] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L730] 1 y = 2 [L735] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L736] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L737] 1 x$flush_delayed = weak$$choice2 [L738] 1 x$mem_tmp = x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L739] EXPR 1 !x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1) VAL [!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L739] 1 x = !x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1) [L740] 1 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff0)) [L741] EXPR 1 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1))=0, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L741] 1 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1)) [L776] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L777] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L796] 3 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used [L797] 3 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used [L798] 3 x$r_buff0_thd3 = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$r_buff0_thd3 [L742] EXPR 1 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used))=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L742] 1 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used)) [L743] 1 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L745] 1 x$r_buff1_thd1 = weak$$choice2 ? x$r_buff1_thd1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$r_buff1_thd1 : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L746] 1 __unbuffered_p0_EAX = x VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L824] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [\result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L829] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L830] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L831] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 154 locations, 2 error locations. Result: UNSAFE, OverallTime: 112.1s, OverallIterations: 35, TraceHistogramMax: 1, AutomataDifference: 24.7s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 5447 SDtfs, 8294 SDslu, 16228 SDs, 0 SdLazy, 10715 SolverSat, 445 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 5.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 396 GetRequests, 31 SyntacticMatches, 21 SemanticMatches, 344 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1546 ImplicationChecksByTransitivity, 3.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=281033occurred in iteration=7, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 71.1s AutomataMinimizationTime, 34 MinimizatonAttempts, 250573 StatesRemovedByMinimization, 32 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.9s InterpolantComputationTime, 1250 NumberOfCodeBlocks, 1250 NumberOfCodeBlocksAsserted, 35 NumberOfCheckSat, 1160 ConstructedInterpolants, 0 QuantifiedInterpolants, 325525 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 34 InterpolantComputations, 34 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...