./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe005_pso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_45bfda37-33b1-4fca-8f0b-e8866511b7c2/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_45bfda37-33b1-4fca-8f0b-e8866511b7c2/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_45bfda37-33b1-4fca-8f0b-e8866511b7c2/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_45bfda37-33b1-4fca-8f0b-e8866511b7c2/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe005_pso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_45bfda37-33b1-4fca-8f0b-e8866511b7c2/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_45bfda37-33b1-4fca-8f0b-e8866511b7c2/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 0cc07a8a3a84ee2d94eaa17860f3ad074a8e0360 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 14:02:26,814 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 14:02:26,815 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 14:02:26,824 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 14:02:26,824 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 14:02:26,825 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 14:02:26,826 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 14:02:26,828 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 14:02:26,829 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 14:02:26,830 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 14:02:26,831 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 14:02:26,832 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 14:02:26,832 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 14:02:26,833 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 14:02:26,834 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 14:02:26,835 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 14:02:26,836 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 14:02:26,837 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 14:02:26,838 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 14:02:26,840 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 14:02:26,842 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 14:02:26,843 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 14:02:26,843 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 14:02:26,844 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 14:02:26,846 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 14:02:26,846 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 14:02:26,847 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 14:02:26,847 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 14:02:26,848 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 14:02:26,848 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 14:02:26,849 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 14:02:26,849 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 14:02:26,849 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 14:02:26,850 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 14:02:26,851 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 14:02:26,851 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 14:02:26,851 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 14:02:26,852 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 14:02:26,852 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 14:02:26,852 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 14:02:26,853 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 14:02:26,854 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_45bfda37-33b1-4fca-8f0b-e8866511b7c2/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 14:02:26,865 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 14:02:26,865 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 14:02:26,866 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 14:02:26,866 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 14:02:26,866 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 14:02:26,866 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 14:02:26,867 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 14:02:26,867 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 14:02:26,867 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 14:02:26,867 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 14:02:26,867 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 14:02:26,867 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 14:02:26,867 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 14:02:26,868 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 14:02:26,868 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 14:02:26,868 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 14:02:26,868 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 14:02:26,868 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 14:02:26,868 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 14:02:26,869 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 14:02:26,869 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 14:02:26,869 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 14:02:26,869 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 14:02:26,869 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 14:02:26,869 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 14:02:26,869 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 14:02:26,869 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 14:02:26,869 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 14:02:26,870 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 14:02:26,870 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_45bfda37-33b1-4fca-8f0b-e8866511b7c2/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 0cc07a8a3a84ee2d94eaa17860f3ad074a8e0360 [2019-12-07 14:02:26,980 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 14:02:26,988 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 14:02:26,990 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 14:02:26,991 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 14:02:26,991 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 14:02:26,992 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_45bfda37-33b1-4fca-8f0b-e8866511b7c2/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe005_pso.oepc.i [2019-12-07 14:02:27,031 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_45bfda37-33b1-4fca-8f0b-e8866511b7c2/bin/uautomizer/data/331f0ada4/69ee406ecc2d4c7db0e5598ae998845b/FLAGd38839218 [2019-12-07 14:02:27,481 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 14:02:27,482 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_45bfda37-33b1-4fca-8f0b-e8866511b7c2/sv-benchmarks/c/pthread-wmm/safe005_pso.oepc.i [2019-12-07 14:02:27,492 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_45bfda37-33b1-4fca-8f0b-e8866511b7c2/bin/uautomizer/data/331f0ada4/69ee406ecc2d4c7db0e5598ae998845b/FLAGd38839218 [2019-12-07 14:02:27,501 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_45bfda37-33b1-4fca-8f0b-e8866511b7c2/bin/uautomizer/data/331f0ada4/69ee406ecc2d4c7db0e5598ae998845b [2019-12-07 14:02:27,503 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 14:02:27,503 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 14:02:27,504 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 14:02:27,504 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 14:02:27,506 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 14:02:27,507 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 02:02:27" (1/1) ... [2019-12-07 14:02:27,509 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3f8fae9c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:02:27, skipping insertion in model container [2019-12-07 14:02:27,509 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 02:02:27" (1/1) ... [2019-12-07 14:02:27,514 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 14:02:27,542 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 14:02:27,793 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 14:02:27,800 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 14:02:27,838 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 14:02:27,883 INFO L208 MainTranslator]: Completed translation [2019-12-07 14:02:27,884 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:02:27 WrapperNode [2019-12-07 14:02:27,884 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 14:02:27,884 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 14:02:27,884 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 14:02:27,884 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 14:02:27,890 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:02:27" (1/1) ... [2019-12-07 14:02:27,903 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:02:27" (1/1) ... [2019-12-07 14:02:27,920 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 14:02:27,921 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 14:02:27,921 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 14:02:27,921 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 14:02:27,927 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:02:27" (1/1) ... [2019-12-07 14:02:27,927 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:02:27" (1/1) ... [2019-12-07 14:02:27,930 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:02:27" (1/1) ... [2019-12-07 14:02:27,930 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:02:27" (1/1) ... [2019-12-07 14:02:27,937 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:02:27" (1/1) ... [2019-12-07 14:02:27,939 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:02:27" (1/1) ... [2019-12-07 14:02:27,942 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:02:27" (1/1) ... [2019-12-07 14:02:27,945 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 14:02:27,945 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 14:02:27,945 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 14:02:27,945 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 14:02:27,946 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:02:27" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_45bfda37-33b1-4fca-8f0b-e8866511b7c2/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 14:02:27,990 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 14:02:27,990 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 14:02:27,990 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 14:02:27,990 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 14:02:27,990 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 14:02:27,990 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 14:02:27,991 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 14:02:27,991 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 14:02:27,991 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 14:02:27,991 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 14:02:27,991 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 14:02:27,991 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 14:02:27,991 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 14:02:27,993 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 14:02:28,342 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 14:02:28,342 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 14:02:28,343 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:02:28 BoogieIcfgContainer [2019-12-07 14:02:28,343 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 14:02:28,343 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 14:02:28,343 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 14:02:28,345 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 14:02:28,345 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 02:02:27" (1/3) ... [2019-12-07 14:02:28,346 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4848f16d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 02:02:28, skipping insertion in model container [2019-12-07 14:02:28,346 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:02:27" (2/3) ... [2019-12-07 14:02:28,346 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4848f16d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 02:02:28, skipping insertion in model container [2019-12-07 14:02:28,346 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:02:28" (3/3) ... [2019-12-07 14:02:28,347 INFO L109 eAbstractionObserver]: Analyzing ICFG safe005_pso.oepc.i [2019-12-07 14:02:28,353 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 14:02:28,353 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 14:02:28,358 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 14:02:28,358 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 14:02:28,384 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,384 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,384 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,385 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,385 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,385 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,385 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,385 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,386 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,386 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,386 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,386 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,386 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,387 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,387 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,387 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,387 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,387 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,387 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,388 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,388 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,388 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,388 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,388 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,389 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,389 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,389 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,389 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,389 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,390 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,390 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,390 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,390 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,390 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,391 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,391 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,391 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,391 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,391 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,392 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,392 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,392 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,392 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,392 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,392 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,393 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,393 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,393 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,393 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,393 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,393 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,394 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,394 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,394 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,394 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,394 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,395 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,395 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,395 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,395 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,395 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,395 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,396 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,396 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,396 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,396 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,396 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,396 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,397 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,397 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,397 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,397 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,397 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,397 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,398 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,398 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,398 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,398 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,398 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,398 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,398 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,399 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,399 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,399 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,399 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,399 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,399 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,400 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,400 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,400 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,400 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,400 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,400 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,401 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,401 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,401 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,402 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,402 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,402 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,402 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,402 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,402 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,403 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,403 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,403 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,403 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,403 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,403 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,404 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,404 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,404 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,404 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,404 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,404 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,405 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,405 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,405 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,405 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,405 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,405 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,406 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,406 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,406 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,406 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,406 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,406 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,407 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,407 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,407 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,407 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,407 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,408 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,408 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,408 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,408 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,408 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,408 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,408 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,409 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,409 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,409 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,409 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,409 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,409 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,410 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,410 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,410 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,410 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,410 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,410 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,411 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,411 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,411 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,411 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,411 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,411 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,411 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,412 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:02:28,425 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 14:02:28,437 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 14:02:28,437 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 14:02:28,437 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 14:02:28,438 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 14:02:28,438 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 14:02:28,438 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 14:02:28,438 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 14:02:28,438 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 14:02:28,449 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 163 places, 194 transitions [2019-12-07 14:02:28,450 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 163 places, 194 transitions [2019-12-07 14:02:28,502 INFO L134 PetriNetUnfolder]: 41/191 cut-off events. [2019-12-07 14:02:28,502 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 14:02:28,511 INFO L76 FinitePrefix]: Finished finitePrefix Result has 201 conditions, 191 events. 41/191 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 721 event pairs. 9/157 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 14:02:28,525 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 163 places, 194 transitions [2019-12-07 14:02:28,553 INFO L134 PetriNetUnfolder]: 41/191 cut-off events. [2019-12-07 14:02:28,553 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 14:02:28,558 INFO L76 FinitePrefix]: Finished finitePrefix Result has 201 conditions, 191 events. 41/191 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 721 event pairs. 9/157 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 14:02:28,572 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 16696 [2019-12-07 14:02:28,573 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 14:02:31,528 WARN L192 SmtUtils]: Spent 147.00 ms on a formula simplification. DAG size of input: 89 DAG size of output: 87 [2019-12-07 14:02:31,692 INFO L206 etLargeBlockEncoding]: Checked pairs total: 66367 [2019-12-07 14:02:31,693 INFO L214 etLargeBlockEncoding]: Total number of compositions: 113 [2019-12-07 14:02:31,695 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 83 places, 92 transitions [2019-12-07 14:02:41,076 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 86132 states. [2019-12-07 14:02:41,077 INFO L276 IsEmpty]: Start isEmpty. Operand 86132 states. [2019-12-07 14:02:41,081 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-07 14:02:41,081 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:02:41,081 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-07 14:02:41,082 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:02:41,085 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:02:41,085 INFO L82 PathProgramCache]: Analyzing trace with hash 795562213, now seen corresponding path program 1 times [2019-12-07 14:02:41,091 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:02:41,091 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1629721930] [2019-12-07 14:02:41,091 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:02:41,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:02:41,227 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:02:41,227 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1629721930] [2019-12-07 14:02:41,228 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:02:41,228 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 14:02:41,228 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1877431285] [2019-12-07 14:02:41,231 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:02:41,231 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:02:41,240 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:02:41,241 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:02:41,242 INFO L87 Difference]: Start difference. First operand 86132 states. Second operand 3 states. [2019-12-07 14:02:41,895 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:02:41,895 INFO L93 Difference]: Finished difference Result 85012 states and 367904 transitions. [2019-12-07 14:02:41,896 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:02:41,897 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-07 14:02:41,897 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:02:42,356 INFO L225 Difference]: With dead ends: 85012 [2019-12-07 14:02:42,357 INFO L226 Difference]: Without dead ends: 80140 [2019-12-07 14:02:42,357 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:02:45,208 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80140 states. [2019-12-07 14:02:46,394 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80140 to 80140. [2019-12-07 14:02:46,395 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80140 states. [2019-12-07 14:02:46,834 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80140 states to 80140 states and 346330 transitions. [2019-12-07 14:02:46,835 INFO L78 Accepts]: Start accepts. Automaton has 80140 states and 346330 transitions. Word has length 5 [2019-12-07 14:02:46,835 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:02:46,835 INFO L462 AbstractCegarLoop]: Abstraction has 80140 states and 346330 transitions. [2019-12-07 14:02:46,835 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:02:46,835 INFO L276 IsEmpty]: Start isEmpty. Operand 80140 states and 346330 transitions. [2019-12-07 14:02:46,841 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 14:02:46,841 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:02:46,841 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:02:46,842 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:02:46,842 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:02:46,842 INFO L82 PathProgramCache]: Analyzing trace with hash -36571135, now seen corresponding path program 1 times [2019-12-07 14:02:46,842 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:02:46,842 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1816161226] [2019-12-07 14:02:46,842 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:02:46,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:02:46,903 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:02:46,903 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1816161226] [2019-12-07 14:02:46,904 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:02:46,904 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:02:46,904 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [163484596] [2019-12-07 14:02:46,905 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:02:46,905 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:02:46,905 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:02:46,906 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:02:46,906 INFO L87 Difference]: Start difference. First operand 80140 states and 346330 transitions. Second operand 4 states. [2019-12-07 14:02:47,660 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:02:47,660 INFO L93 Difference]: Finished difference Result 123388 states and 510822 transitions. [2019-12-07 14:02:47,661 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:02:47,661 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 14:02:47,661 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:02:47,994 INFO L225 Difference]: With dead ends: 123388 [2019-12-07 14:02:47,994 INFO L226 Difference]: Without dead ends: 123290 [2019-12-07 14:02:47,994 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:02:52,906 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123290 states. [2019-12-07 14:02:54,467 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123290 to 114218. [2019-12-07 14:02:54,467 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114218 states. [2019-12-07 14:02:54,777 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114218 states to 114218 states and 477794 transitions. [2019-12-07 14:02:54,778 INFO L78 Accepts]: Start accepts. Automaton has 114218 states and 477794 transitions. Word has length 13 [2019-12-07 14:02:54,778 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:02:54,778 INFO L462 AbstractCegarLoop]: Abstraction has 114218 states and 477794 transitions. [2019-12-07 14:02:54,779 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:02:54,779 INFO L276 IsEmpty]: Start isEmpty. Operand 114218 states and 477794 transitions. [2019-12-07 14:02:54,781 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 14:02:54,781 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:02:54,781 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:02:54,781 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:02:54,781 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:02:54,782 INFO L82 PathProgramCache]: Analyzing trace with hash 424299118, now seen corresponding path program 1 times [2019-12-07 14:02:54,782 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:02:54,782 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [811145436] [2019-12-07 14:02:54,782 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:02:54,799 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:02:54,827 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:02:54,827 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [811145436] [2019-12-07 14:02:54,828 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:02:54,828 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:02:54,828 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1917096716] [2019-12-07 14:02:54,828 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:02:54,828 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:02:54,828 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:02:54,828 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:02:54,829 INFO L87 Difference]: Start difference. First operand 114218 states and 477794 transitions. Second operand 4 states. [2019-12-07 14:02:55,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:02:55,901 INFO L93 Difference]: Finished difference Result 159677 states and 652290 transitions. [2019-12-07 14:02:55,902 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:02:55,902 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 14:02:55,902 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:02:56,297 INFO L225 Difference]: With dead ends: 159677 [2019-12-07 14:02:56,298 INFO L226 Difference]: Without dead ends: 159565 [2019-12-07 14:02:56,298 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:03:00,251 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159565 states. [2019-12-07 14:03:02,061 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159565 to 136035. [2019-12-07 14:03:02,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136035 states. [2019-12-07 14:03:04,848 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136035 states to 136035 states and 564894 transitions. [2019-12-07 14:03:04,849 INFO L78 Accepts]: Start accepts. Automaton has 136035 states and 564894 transitions. Word has length 13 [2019-12-07 14:03:04,849 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:03:04,849 INFO L462 AbstractCegarLoop]: Abstraction has 136035 states and 564894 transitions. [2019-12-07 14:03:04,849 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:03:04,849 INFO L276 IsEmpty]: Start isEmpty. Operand 136035 states and 564894 transitions. [2019-12-07 14:03:04,852 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 14:03:04,852 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:03:04,852 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:03:04,852 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:03:04,852 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:03:04,852 INFO L82 PathProgramCache]: Analyzing trace with hash -2100241523, now seen corresponding path program 1 times [2019-12-07 14:03:04,852 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:03:04,853 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [258071617] [2019-12-07 14:03:04,853 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:03:04,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:03:04,878 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:03:04,879 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [258071617] [2019-12-07 14:03:04,879 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:03:04,879 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:03:04,879 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [218046456] [2019-12-07 14:03:04,879 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:03:04,879 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:03:04,879 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:03:04,880 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:03:04,880 INFO L87 Difference]: Start difference. First operand 136035 states and 564894 transitions. Second operand 3 states. [2019-12-07 14:03:05,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:03:05,661 INFO L93 Difference]: Finished difference Result 181618 states and 742473 transitions. [2019-12-07 14:03:05,662 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:03:05,662 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 14 [2019-12-07 14:03:05,662 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:03:06,129 INFO L225 Difference]: With dead ends: 181618 [2019-12-07 14:03:06,129 INFO L226 Difference]: Without dead ends: 181618 [2019-12-07 14:03:06,129 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:03:10,204 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181618 states. [2019-12-07 14:03:12,309 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181618 to 152081. [2019-12-07 14:03:12,309 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152081 states. [2019-12-07 14:03:13,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152081 states to 152081 states and 628919 transitions. [2019-12-07 14:03:13,156 INFO L78 Accepts]: Start accepts. Automaton has 152081 states and 628919 transitions. Word has length 14 [2019-12-07 14:03:13,156 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:03:13,156 INFO L462 AbstractCegarLoop]: Abstraction has 152081 states and 628919 transitions. [2019-12-07 14:03:13,156 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:03:13,156 INFO L276 IsEmpty]: Start isEmpty. Operand 152081 states and 628919 transitions. [2019-12-07 14:03:13,159 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 14:03:13,159 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:03:13,159 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:03:13,159 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:03:13,159 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:03:13,159 INFO L82 PathProgramCache]: Analyzing trace with hash -2100376187, now seen corresponding path program 1 times [2019-12-07 14:03:13,159 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:03:13,160 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1945365527] [2019-12-07 14:03:13,160 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:03:13,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:03:13,192 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:03:13,192 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1945365527] [2019-12-07 14:03:13,192 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:03:13,192 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:03:13,193 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1698743963] [2019-12-07 14:03:13,193 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:03:13,193 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:03:13,193 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:03:13,193 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:03:13,193 INFO L87 Difference]: Start difference. First operand 152081 states and 628919 transitions. Second operand 4 states. [2019-12-07 14:03:14,057 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:03:14,058 INFO L93 Difference]: Finished difference Result 179622 states and 732719 transitions. [2019-12-07 14:03:14,058 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:03:14,058 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-12-07 14:03:14,058 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:03:14,522 INFO L225 Difference]: With dead ends: 179622 [2019-12-07 14:03:14,522 INFO L226 Difference]: Without dead ends: 179542 [2019-12-07 14:03:14,523 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:03:18,508 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179542 states. [2019-12-07 14:03:22,750 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179542 to 157787. [2019-12-07 14:03:22,750 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157787 states. [2019-12-07 14:03:23,213 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157787 states to 157787 states and 651479 transitions. [2019-12-07 14:03:23,213 INFO L78 Accepts]: Start accepts. Automaton has 157787 states and 651479 transitions. Word has length 14 [2019-12-07 14:03:23,213 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:03:23,213 INFO L462 AbstractCegarLoop]: Abstraction has 157787 states and 651479 transitions. [2019-12-07 14:03:23,213 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:03:23,213 INFO L276 IsEmpty]: Start isEmpty. Operand 157787 states and 651479 transitions. [2019-12-07 14:03:23,216 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 14:03:23,216 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:03:23,216 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:03:23,216 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:03:23,216 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:03:23,216 INFO L82 PathProgramCache]: Analyzing trace with hash -1940234062, now seen corresponding path program 1 times [2019-12-07 14:03:23,216 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:03:23,216 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1786540646] [2019-12-07 14:03:23,216 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:03:23,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:03:23,255 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:03:23,256 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1786540646] [2019-12-07 14:03:23,256 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:03:23,256 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:03:23,256 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [827681889] [2019-12-07 14:03:23,257 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:03:23,257 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:03:23,257 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:03:23,257 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:03:23,257 INFO L87 Difference]: Start difference. First operand 157787 states and 651479 transitions. Second operand 4 states. [2019-12-07 14:03:24,583 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:03:24,583 INFO L93 Difference]: Finished difference Result 189091 states and 772001 transitions. [2019-12-07 14:03:24,584 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:03:24,584 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-12-07 14:03:24,584 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:03:25,054 INFO L225 Difference]: With dead ends: 189091 [2019-12-07 14:03:25,055 INFO L226 Difference]: Without dead ends: 188995 [2019-12-07 14:03:25,055 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:03:29,116 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188995 states. [2019-12-07 14:03:31,717 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188995 to 161868. [2019-12-07 14:03:31,717 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161868 states. [2019-12-07 14:03:32,195 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161868 states to 161868 states and 668265 transitions. [2019-12-07 14:03:32,196 INFO L78 Accepts]: Start accepts. Automaton has 161868 states and 668265 transitions. Word has length 14 [2019-12-07 14:03:32,196 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:03:32,196 INFO L462 AbstractCegarLoop]: Abstraction has 161868 states and 668265 transitions. [2019-12-07 14:03:32,196 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:03:32,196 INFO L276 IsEmpty]: Start isEmpty. Operand 161868 states and 668265 transitions. [2019-12-07 14:03:32,209 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 14:03:32,209 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:03:32,209 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:03:32,209 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:03:32,210 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:03:32,210 INFO L82 PathProgramCache]: Analyzing trace with hash -1828891691, now seen corresponding path program 1 times [2019-12-07 14:03:32,210 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:03:32,210 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [596927122] [2019-12-07 14:03:32,210 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:03:32,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:03:32,266 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:03:32,266 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [596927122] [2019-12-07 14:03:32,267 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:03:32,267 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 14:03:32,267 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1107741765] [2019-12-07 14:03:32,267 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:03:32,267 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:03:32,268 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:03:32,268 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:03:32,268 INFO L87 Difference]: Start difference. First operand 161868 states and 668265 transitions. Second operand 3 states. [2019-12-07 14:03:33,663 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:03:33,663 INFO L93 Difference]: Finished difference Result 305174 states and 1252705 transitions. [2019-12-07 14:03:33,663 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:03:33,664 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 14:03:33,664 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:03:36,980 INFO L225 Difference]: With dead ends: 305174 [2019-12-07 14:03:36,980 INFO L226 Difference]: Without dead ends: 292686 [2019-12-07 14:03:36,980 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:03:42,256 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 292686 states. [2019-12-07 14:03:46,555 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 292686 to 281033. [2019-12-07 14:03:46,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 281033 states. [2019-12-07 14:03:47,830 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 281033 states to 281033 states and 1162981 transitions. [2019-12-07 14:03:47,830 INFO L78 Accepts]: Start accepts. Automaton has 281033 states and 1162981 transitions. Word has length 18 [2019-12-07 14:03:47,831 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:03:47,831 INFO L462 AbstractCegarLoop]: Abstraction has 281033 states and 1162981 transitions. [2019-12-07 14:03:47,831 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:03:47,831 INFO L276 IsEmpty]: Start isEmpty. Operand 281033 states and 1162981 transitions. [2019-12-07 14:03:47,854 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 14:03:47,855 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:03:47,855 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:03:47,855 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:03:47,855 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:03:47,855 INFO L82 PathProgramCache]: Analyzing trace with hash -1446438801, now seen corresponding path program 1 times [2019-12-07 14:03:47,855 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:03:47,855 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1186300738] [2019-12-07 14:03:47,855 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:03:47,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:03:47,883 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:03:47,883 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1186300738] [2019-12-07 14:03:47,883 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:03:47,883 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 14:03:47,883 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1184105656] [2019-12-07 14:03:47,884 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:03:47,884 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:03:47,884 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:03:47,884 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:03:47,884 INFO L87 Difference]: Start difference. First operand 281033 states and 1162981 transitions. Second operand 3 states. [2019-12-07 14:03:49,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:03:49,121 INFO L93 Difference]: Finished difference Result 280142 states and 1159315 transitions. [2019-12-07 14:03:49,122 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:03:49,122 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 14:03:49,122 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:03:50,448 INFO L225 Difference]: With dead ends: 280142 [2019-12-07 14:03:50,449 INFO L226 Difference]: Without dead ends: 278870 [2019-12-07 14:03:50,449 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:03:58,921 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 278870 states. [2019-12-07 14:04:02,392 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 278870 to 271852. [2019-12-07 14:04:02,392 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 271852 states. [2019-12-07 14:04:03,430 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 271852 states to 271852 states and 1126060 transitions. [2019-12-07 14:04:03,430 INFO L78 Accepts]: Start accepts. Automaton has 271852 states and 1126060 transitions. Word has length 19 [2019-12-07 14:04:03,430 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:04:03,431 INFO L462 AbstractCegarLoop]: Abstraction has 271852 states and 1126060 transitions. [2019-12-07 14:04:03,431 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:04:03,431 INFO L276 IsEmpty]: Start isEmpty. Operand 271852 states and 1126060 transitions. [2019-12-07 14:04:03,456 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 14:04:03,456 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:04:03,456 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:04:03,456 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:04:03,456 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:04:03,456 INFO L82 PathProgramCache]: Analyzing trace with hash 550104482, now seen corresponding path program 1 times [2019-12-07 14:04:03,456 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:04:03,457 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [591250200] [2019-12-07 14:04:03,457 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:04:03,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:04:03,490 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:04:03,490 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [591250200] [2019-12-07 14:04:03,490 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:04:03,490 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:04:03,491 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2121022490] [2019-12-07 14:04:03,491 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:04:03,491 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:04:03,491 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:04:03,491 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:04:03,491 INFO L87 Difference]: Start difference. First operand 271852 states and 1126060 transitions. Second operand 5 states. [2019-12-07 14:04:05,808 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:04:05,808 INFO L93 Difference]: Finished difference Result 372957 states and 1508186 transitions. [2019-12-07 14:04:05,808 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 14:04:05,809 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 14:04:05,809 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:04:06,759 INFO L225 Difference]: With dead ends: 372957 [2019-12-07 14:04:06,759 INFO L226 Difference]: Without dead ends: 372405 [2019-12-07 14:04:06,760 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:04:16,762 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 372405 states. [2019-12-07 14:04:21,272 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 372405 to 278586. [2019-12-07 14:04:21,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 278586 states. [2019-12-07 14:04:22,087 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 278586 states to 278586 states and 1151080 transitions. [2019-12-07 14:04:22,087 INFO L78 Accepts]: Start accepts. Automaton has 278586 states and 1151080 transitions. Word has length 19 [2019-12-07 14:04:22,087 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:04:22,087 INFO L462 AbstractCegarLoop]: Abstraction has 278586 states and 1151080 transitions. [2019-12-07 14:04:22,087 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:04:22,087 INFO L276 IsEmpty]: Start isEmpty. Operand 278586 states and 1151080 transitions. [2019-12-07 14:04:22,120 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 14:04:22,120 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:04:22,120 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:04:22,120 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:04:22,120 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:04:22,120 INFO L82 PathProgramCache]: Analyzing trace with hash -2032195279, now seen corresponding path program 1 times [2019-12-07 14:04:22,120 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:04:22,121 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [3305431] [2019-12-07 14:04:22,121 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:04:22,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:04:22,155 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:04:22,155 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [3305431] [2019-12-07 14:04:22,156 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:04:22,156 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:04:22,156 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1304911100] [2019-12-07 14:04:22,156 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:04:22,156 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:04:22,156 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:04:22,157 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:04:22,157 INFO L87 Difference]: Start difference. First operand 278586 states and 1151080 transitions. Second operand 3 states. [2019-12-07 14:04:23,699 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:04:23,699 INFO L93 Difference]: Finished difference Result 261930 states and 1069502 transitions. [2019-12-07 14:04:23,700 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:04:23,700 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2019-12-07 14:04:23,700 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:04:24,387 INFO L225 Difference]: With dead ends: 261930 [2019-12-07 14:04:24,388 INFO L226 Difference]: Without dead ends: 261930 [2019-12-07 14:04:24,388 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:04:29,292 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 261930 states. [2019-12-07 14:04:32,809 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 261930 to 256826. [2019-12-07 14:04:32,809 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 256826 states. [2019-12-07 14:04:33,541 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 256826 states to 256826 states and 1050178 transitions. [2019-12-07 14:04:33,542 INFO L78 Accepts]: Start accepts. Automaton has 256826 states and 1050178 transitions. Word has length 20 [2019-12-07 14:04:33,542 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:04:33,542 INFO L462 AbstractCegarLoop]: Abstraction has 256826 states and 1050178 transitions. [2019-12-07 14:04:33,542 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:04:33,542 INFO L276 IsEmpty]: Start isEmpty. Operand 256826 states and 1050178 transitions. [2019-12-07 14:04:33,568 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 14:04:33,569 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:04:33,569 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:04:33,569 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:04:33,569 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:04:33,569 INFO L82 PathProgramCache]: Analyzing trace with hash -731672601, now seen corresponding path program 1 times [2019-12-07 14:04:33,569 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:04:33,569 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1054204158] [2019-12-07 14:04:33,569 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:04:33,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:04:33,619 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:04:33,620 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1054204158] [2019-12-07 14:04:33,620 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:04:33,620 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:04:33,620 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1542551045] [2019-12-07 14:04:33,620 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:04:33,620 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:04:33,620 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:04:33,620 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:04:33,621 INFO L87 Difference]: Start difference. First operand 256826 states and 1050178 transitions. Second operand 5 states. [2019-12-07 14:04:39,491 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:04:39,491 INFO L93 Difference]: Finished difference Result 437996 states and 1794176 transitions. [2019-12-07 14:04:39,492 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:04:39,492 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 20 [2019-12-07 14:04:39,492 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:04:40,107 INFO L225 Difference]: With dead ends: 437996 [2019-12-07 14:04:40,108 INFO L226 Difference]: Without dead ends: 231629 [2019-12-07 14:04:40,108 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:04:44,445 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 231629 states. [2019-12-07 14:04:47,462 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 231629 to 228832. [2019-12-07 14:04:47,462 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 228832 states. [2019-12-07 14:04:48,398 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 228832 states to 228832 states and 932160 transitions. [2019-12-07 14:04:48,399 INFO L78 Accepts]: Start accepts. Automaton has 228832 states and 932160 transitions. Word has length 20 [2019-12-07 14:04:48,399 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:04:48,399 INFO L462 AbstractCegarLoop]: Abstraction has 228832 states and 932160 transitions. [2019-12-07 14:04:48,399 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:04:48,399 INFO L276 IsEmpty]: Start isEmpty. Operand 228832 states and 932160 transitions. [2019-12-07 14:04:48,426 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 14:04:48,426 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:04:48,426 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:04:48,426 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:04:48,426 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:04:48,427 INFO L82 PathProgramCache]: Analyzing trace with hash -70181007, now seen corresponding path program 1 times [2019-12-07 14:04:48,427 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:04:48,427 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1266693770] [2019-12-07 14:04:48,427 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:04:48,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:04:48,460 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:04:48,460 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1266693770] [2019-12-07 14:04:48,460 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:04:48,460 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:04:48,461 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2043309411] [2019-12-07 14:04:48,461 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:04:48,461 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:04:48,461 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:04:48,461 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:04:48,461 INFO L87 Difference]: Start difference. First operand 228832 states and 932160 transitions. Second operand 5 states. [2019-12-07 14:04:49,861 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:04:49,861 INFO L93 Difference]: Finished difference Result 280313 states and 1122364 transitions. [2019-12-07 14:04:49,862 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 14:04:49,862 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 14:04:49,862 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:04:51,066 INFO L225 Difference]: With dead ends: 280313 [2019-12-07 14:04:51,066 INFO L226 Difference]: Without dead ends: 279113 [2019-12-07 14:04:51,066 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:04:56,084 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 279113 states. [2019-12-07 14:04:59,265 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 279113 to 230953. [2019-12-07 14:04:59,265 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 230953 states. [2019-12-07 14:05:00,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 230953 states to 230953 states and 940145 transitions. [2019-12-07 14:05:00,209 INFO L78 Accepts]: Start accepts. Automaton has 230953 states and 940145 transitions. Word has length 22 [2019-12-07 14:05:00,209 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:00,209 INFO L462 AbstractCegarLoop]: Abstraction has 230953 states and 940145 transitions. [2019-12-07 14:05:00,209 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:05:00,209 INFO L276 IsEmpty]: Start isEmpty. Operand 230953 states and 940145 transitions. [2019-12-07 14:05:00,237 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 14:05:00,237 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:00,237 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:00,237 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:00,237 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:00,237 INFO L82 PathProgramCache]: Analyzing trace with hash 1001801374, now seen corresponding path program 1 times [2019-12-07 14:05:00,237 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:00,238 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1766250065] [2019-12-07 14:05:00,238 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:00,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:00,273 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:00,273 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1766250065] [2019-12-07 14:05:00,273 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:00,273 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:05:00,273 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1007298836] [2019-12-07 14:05:00,273 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:05:00,273 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:00,274 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:05:00,274 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:05:00,274 INFO L87 Difference]: Start difference. First operand 230953 states and 940145 transitions. Second operand 5 states. [2019-12-07 14:05:04,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:04,423 INFO L93 Difference]: Finished difference Result 305032 states and 1215591 transitions. [2019-12-07 14:05:04,424 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 14:05:04,424 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 14:05:04,424 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:05,165 INFO L225 Difference]: With dead ends: 305032 [2019-12-07 14:05:05,166 INFO L226 Difference]: Without dead ends: 303760 [2019-12-07 14:05:05,166 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:05:10,211 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 303760 states. [2019-12-07 14:05:13,994 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 303760 to 233429. [2019-12-07 14:05:13,994 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 233429 states. [2019-12-07 14:05:14,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 233429 states to 233429 states and 949842 transitions. [2019-12-07 14:05:14,644 INFO L78 Accepts]: Start accepts. Automaton has 233429 states and 949842 transitions. Word has length 22 [2019-12-07 14:05:14,644 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:14,644 INFO L462 AbstractCegarLoop]: Abstraction has 233429 states and 949842 transitions. [2019-12-07 14:05:14,644 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:05:14,644 INFO L276 IsEmpty]: Start isEmpty. Operand 233429 states and 949842 transitions. [2019-12-07 14:05:14,673 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 14:05:14,673 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:14,673 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:14,673 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:14,673 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:14,673 INFO L82 PathProgramCache]: Analyzing trace with hash -633645132, now seen corresponding path program 1 times [2019-12-07 14:05:14,673 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:14,673 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [773931063] [2019-12-07 14:05:14,674 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:14,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:14,712 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:14,713 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [773931063] [2019-12-07 14:05:14,713 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:14,713 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:05:14,713 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [681901382] [2019-12-07 14:05:14,713 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:05:14,713 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:14,713 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:05:14,714 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:05:14,714 INFO L87 Difference]: Start difference. First operand 233429 states and 949842 transitions. Second operand 5 states. [2019-12-07 14:05:16,533 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:16,534 INFO L93 Difference]: Finished difference Result 290771 states and 1162840 transitions. [2019-12-07 14:05:16,534 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 14:05:16,534 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 14:05:16,535 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:17,280 INFO L225 Difference]: With dead ends: 290771 [2019-12-07 14:05:17,280 INFO L226 Difference]: Without dead ends: 288873 [2019-12-07 14:05:17,280 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:05:22,426 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 288873 states. [2019-12-07 14:05:25,949 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 288873 to 237202. [2019-12-07 14:05:25,950 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 237202 states. [2019-12-07 14:05:26,609 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 237202 states to 237202 states and 964529 transitions. [2019-12-07 14:05:26,609 INFO L78 Accepts]: Start accepts. Automaton has 237202 states and 964529 transitions. Word has length 22 [2019-12-07 14:05:26,609 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:26,609 INFO L462 AbstractCegarLoop]: Abstraction has 237202 states and 964529 transitions. [2019-12-07 14:05:26,609 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:05:26,609 INFO L276 IsEmpty]: Start isEmpty. Operand 237202 states and 964529 transitions. [2019-12-07 14:05:26,641 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 14:05:26,641 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:26,641 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:26,641 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:26,641 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:26,641 INFO L82 PathProgramCache]: Analyzing trace with hash -255003167, now seen corresponding path program 1 times [2019-12-07 14:05:26,641 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:26,642 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1161348887] [2019-12-07 14:05:26,642 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:26,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:26,674 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:26,674 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1161348887] [2019-12-07 14:05:26,674 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:26,675 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:05:26,675 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1769678848] [2019-12-07 14:05:26,675 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:05:26,675 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:26,675 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:05:26,675 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:05:26,676 INFO L87 Difference]: Start difference. First operand 237202 states and 964529 transitions. Second operand 5 states. [2019-12-07 14:05:28,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:28,574 INFO L93 Difference]: Finished difference Result 322209 states and 1284818 transitions. [2019-12-07 14:05:28,575 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 14:05:28,575 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 14:05:28,575 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:29,393 INFO L225 Difference]: With dead ends: 322209 [2019-12-07 14:05:29,393 INFO L226 Difference]: Without dead ends: 320331 [2019-12-07 14:05:29,393 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:05:35,146 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 320331 states. [2019-12-07 14:05:41,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 320331 to 247955. [2019-12-07 14:05:41,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 247955 states. [2019-12-07 14:05:42,917 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 247955 states to 247955 states and 1007476 transitions. [2019-12-07 14:05:42,917 INFO L78 Accepts]: Start accepts. Automaton has 247955 states and 1007476 transitions. Word has length 22 [2019-12-07 14:05:42,917 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:42,917 INFO L462 AbstractCegarLoop]: Abstraction has 247955 states and 1007476 transitions. [2019-12-07 14:05:42,917 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:05:42,917 INFO L276 IsEmpty]: Start isEmpty. Operand 247955 states and 1007476 transitions. [2019-12-07 14:05:42,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 14:05:42,953 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:42,953 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:42,953 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:42,953 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:42,953 INFO L82 PathProgramCache]: Analyzing trace with hash -1261591994, now seen corresponding path program 1 times [2019-12-07 14:05:42,953 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:42,953 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2088353313] [2019-12-07 14:05:42,953 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:42,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:42,995 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:42,995 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2088353313] [2019-12-07 14:05:42,995 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:42,995 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:05:42,995 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [281272770] [2019-12-07 14:05:42,995 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:05:42,995 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:42,996 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:05:42,996 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:05:42,996 INFO L87 Difference]: Start difference. First operand 247955 states and 1007476 transitions. Second operand 4 states. [2019-12-07 14:05:43,209 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:43,210 INFO L93 Difference]: Finished difference Result 61672 states and 211913 transitions. [2019-12-07 14:05:43,210 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 14:05:43,210 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 22 [2019-12-07 14:05:43,210 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:43,284 INFO L225 Difference]: With dead ends: 61672 [2019-12-07 14:05:43,284 INFO L226 Difference]: Without dead ends: 46774 [2019-12-07 14:05:43,285 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:05:43,474 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46774 states. [2019-12-07 14:05:43,938 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46774 to 46774. [2019-12-07 14:05:43,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46774 states. [2019-12-07 14:05:44,018 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46774 states to 46774 states and 152388 transitions. [2019-12-07 14:05:44,018 INFO L78 Accepts]: Start accepts. Automaton has 46774 states and 152388 transitions. Word has length 22 [2019-12-07 14:05:44,018 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:44,018 INFO L462 AbstractCegarLoop]: Abstraction has 46774 states and 152388 transitions. [2019-12-07 14:05:44,018 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:05:44,018 INFO L276 IsEmpty]: Start isEmpty. Operand 46774 states and 152388 transitions. [2019-12-07 14:05:44,036 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 14:05:44,037 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:44,037 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:44,037 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:44,037 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:44,037 INFO L82 PathProgramCache]: Analyzing trace with hash -1151300207, now seen corresponding path program 1 times [2019-12-07 14:05:44,037 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:44,037 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1601367748] [2019-12-07 14:05:44,037 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:44,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:44,079 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:44,079 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1601367748] [2019-12-07 14:05:44,079 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:44,079 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:05:44,080 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1833109904] [2019-12-07 14:05:44,080 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:05:44,080 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:44,080 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:05:44,080 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:05:44,080 INFO L87 Difference]: Start difference. First operand 46774 states and 152388 transitions. Second operand 5 states. [2019-12-07 14:05:44,167 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:44,167 INFO L93 Difference]: Finished difference Result 20448 states and 63617 transitions. [2019-12-07 14:05:44,168 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:05:44,168 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 31 [2019-12-07 14:05:44,168 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:44,188 INFO L225 Difference]: With dead ends: 20448 [2019-12-07 14:05:44,188 INFO L226 Difference]: Without dead ends: 17741 [2019-12-07 14:05:44,188 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:05:44,245 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17741 states. [2019-12-07 14:05:44,393 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17741 to 17389. [2019-12-07 14:05:44,393 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17389 states. [2019-12-07 14:05:44,419 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17389 states to 17389 states and 53893 transitions. [2019-12-07 14:05:44,420 INFO L78 Accepts]: Start accepts. Automaton has 17389 states and 53893 transitions. Word has length 31 [2019-12-07 14:05:44,420 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:44,420 INFO L462 AbstractCegarLoop]: Abstraction has 17389 states and 53893 transitions. [2019-12-07 14:05:44,420 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:05:44,420 INFO L276 IsEmpty]: Start isEmpty. Operand 17389 states and 53893 transitions. [2019-12-07 14:05:44,434 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 14:05:44,434 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:44,434 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:44,434 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:44,434 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:44,434 INFO L82 PathProgramCache]: Analyzing trace with hash -134226549, now seen corresponding path program 1 times [2019-12-07 14:05:44,434 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:44,435 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [419666131] [2019-12-07 14:05:44,435 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:44,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:44,487 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:44,487 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [419666131] [2019-12-07 14:05:44,487 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:44,487 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:05:44,487 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [357135639] [2019-12-07 14:05:44,488 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:05:44,488 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:44,488 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:05:44,488 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:05:44,488 INFO L87 Difference]: Start difference. First operand 17389 states and 53893 transitions. Second operand 6 states. [2019-12-07 14:05:45,195 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:45,195 INFO L93 Difference]: Finished difference Result 21392 states and 64588 transitions. [2019-12-07 14:05:45,195 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 14:05:45,195 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 40 [2019-12-07 14:05:45,195 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:45,216 INFO L225 Difference]: With dead ends: 21392 [2019-12-07 14:05:45,216 INFO L226 Difference]: Without dead ends: 21205 [2019-12-07 14:05:45,216 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=47, Invalid=109, Unknown=0, NotChecked=0, Total=156 [2019-12-07 14:05:45,278 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21205 states. [2019-12-07 14:05:45,441 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21205 to 17311. [2019-12-07 14:05:45,441 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17311 states. [2019-12-07 14:05:45,468 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17311 states to 17311 states and 53684 transitions. [2019-12-07 14:05:45,468 INFO L78 Accepts]: Start accepts. Automaton has 17311 states and 53684 transitions. Word has length 40 [2019-12-07 14:05:45,468 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:45,468 INFO L462 AbstractCegarLoop]: Abstraction has 17311 states and 53684 transitions. [2019-12-07 14:05:45,468 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:05:45,468 INFO L276 IsEmpty]: Start isEmpty. Operand 17311 states and 53684 transitions. [2019-12-07 14:05:45,482 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 14:05:45,482 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:45,482 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:45,483 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:45,483 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:45,483 INFO L82 PathProgramCache]: Analyzing trace with hash 1884333106, now seen corresponding path program 1 times [2019-12-07 14:05:45,483 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:45,483 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1645755515] [2019-12-07 14:05:45,483 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:45,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:45,502 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:45,503 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1645755515] [2019-12-07 14:05:45,503 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:45,503 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:05:45,503 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [382518285] [2019-12-07 14:05:45,503 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:05:45,504 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:45,504 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:05:45,504 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:05:45,504 INFO L87 Difference]: Start difference. First operand 17311 states and 53684 transitions. Second operand 3 states. [2019-12-07 14:05:45,571 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:45,571 INFO L93 Difference]: Finished difference Result 20139 states and 60662 transitions. [2019-12-07 14:05:45,571 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:05:45,571 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2019-12-07 14:05:45,571 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:45,593 INFO L225 Difference]: With dead ends: 20139 [2019-12-07 14:05:45,593 INFO L226 Difference]: Without dead ends: 20139 [2019-12-07 14:05:45,593 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:05:45,654 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20139 states. [2019-12-07 14:05:45,820 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20139 to 18190. [2019-12-07 14:05:45,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18190 states. [2019-12-07 14:05:45,848 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18190 states to 18190 states and 55399 transitions. [2019-12-07 14:05:45,848 INFO L78 Accepts]: Start accepts. Automaton has 18190 states and 55399 transitions. Word has length 40 [2019-12-07 14:05:45,848 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:45,848 INFO L462 AbstractCegarLoop]: Abstraction has 18190 states and 55399 transitions. [2019-12-07 14:05:45,848 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:05:45,848 INFO L276 IsEmpty]: Start isEmpty. Operand 18190 states and 55399 transitions. [2019-12-07 14:05:45,863 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 14:05:45,864 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:45,864 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:45,864 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:45,864 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:45,864 INFO L82 PathProgramCache]: Analyzing trace with hash -1136448647, now seen corresponding path program 1 times [2019-12-07 14:05:45,864 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:45,864 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1858724211] [2019-12-07 14:05:45,864 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:45,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:45,921 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:45,921 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1858724211] [2019-12-07 14:05:45,921 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:45,921 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:05:45,921 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [952771421] [2019-12-07 14:05:45,921 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:05:45,921 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:45,922 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:05:45,922 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:05:45,922 INFO L87 Difference]: Start difference. First operand 18190 states and 55399 transitions. Second operand 6 states. [2019-12-07 14:05:46,303 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:46,304 INFO L93 Difference]: Finished difference Result 20918 states and 62519 transitions. [2019-12-07 14:05:46,304 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 14:05:46,304 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 41 [2019-12-07 14:05:46,304 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:46,325 INFO L225 Difference]: With dead ends: 20918 [2019-12-07 14:05:46,325 INFO L226 Difference]: Without dead ends: 20647 [2019-12-07 14:05:46,326 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=47, Invalid=109, Unknown=0, NotChecked=0, Total=156 [2019-12-07 14:05:46,387 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20647 states. [2019-12-07 14:05:46,546 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20647 to 16806. [2019-12-07 14:05:46,546 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16806 states. [2019-12-07 14:05:46,572 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16806 states to 16806 states and 51754 transitions. [2019-12-07 14:05:46,572 INFO L78 Accepts]: Start accepts. Automaton has 16806 states and 51754 transitions. Word has length 41 [2019-12-07 14:05:46,573 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:46,573 INFO L462 AbstractCegarLoop]: Abstraction has 16806 states and 51754 transitions. [2019-12-07 14:05:46,573 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:05:46,573 INFO L276 IsEmpty]: Start isEmpty. Operand 16806 states and 51754 transitions. [2019-12-07 14:05:46,587 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 14:05:46,587 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:46,587 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:46,587 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:46,587 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:46,588 INFO L82 PathProgramCache]: Analyzing trace with hash 1425122982, now seen corresponding path program 1 times [2019-12-07 14:05:46,588 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:46,588 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1656577207] [2019-12-07 14:05:46,588 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:46,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:46,620 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:46,620 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1656577207] [2019-12-07 14:05:46,621 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:46,621 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:05:46,621 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [877721826] [2019-12-07 14:05:46,621 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:05:46,621 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:46,621 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:05:46,622 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:05:46,622 INFO L87 Difference]: Start difference. First operand 16806 states and 51754 transitions. Second operand 3 states. [2019-12-07 14:05:46,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:46,670 INFO L93 Difference]: Finished difference Result 15924 states and 48104 transitions. [2019-12-07 14:05:46,670 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:05:46,670 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2019-12-07 14:05:46,670 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:46,688 INFO L225 Difference]: With dead ends: 15924 [2019-12-07 14:05:46,688 INFO L226 Difference]: Without dead ends: 15924 [2019-12-07 14:05:46,688 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:05:46,740 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15924 states. [2019-12-07 14:05:46,870 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15924 to 15620. [2019-12-07 14:05:46,870 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15620 states. [2019-12-07 14:05:46,894 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15620 states to 15620 states and 47262 transitions. [2019-12-07 14:05:46,894 INFO L78 Accepts]: Start accepts. Automaton has 15620 states and 47262 transitions. Word has length 41 [2019-12-07 14:05:46,894 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:46,894 INFO L462 AbstractCegarLoop]: Abstraction has 15620 states and 47262 transitions. [2019-12-07 14:05:46,894 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:05:46,894 INFO L276 IsEmpty]: Start isEmpty. Operand 15620 states and 47262 transitions. [2019-12-07 14:05:46,907 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 14:05:46,907 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:46,907 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:46,908 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:46,908 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:46,908 INFO L82 PathProgramCache]: Analyzing trace with hash -1119333898, now seen corresponding path program 1 times [2019-12-07 14:05:46,908 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:46,908 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [359283384] [2019-12-07 14:05:46,908 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:46,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:46,960 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:46,960 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [359283384] [2019-12-07 14:05:46,960 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:46,960 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 14:05:46,961 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [489830464] [2019-12-07 14:05:46,961 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:05:46,961 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:46,961 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:05:46,961 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:05:46,961 INFO L87 Difference]: Start difference. First operand 15620 states and 47262 transitions. Second operand 6 states. [2019-12-07 14:05:47,040 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:47,040 INFO L93 Difference]: Finished difference Result 14158 states and 43863 transitions. [2019-12-07 14:05:47,041 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 14:05:47,041 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 42 [2019-12-07 14:05:47,041 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:47,056 INFO L225 Difference]: With dead ends: 14158 [2019-12-07 14:05:47,056 INFO L226 Difference]: Without dead ends: 13874 [2019-12-07 14:05:47,057 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:05:47,104 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13874 states. [2019-12-07 14:05:47,198 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13874 to 9698. [2019-12-07 14:05:47,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9698 states. [2019-12-07 14:05:47,211 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9698 states to 9698 states and 29812 transitions. [2019-12-07 14:05:47,211 INFO L78 Accepts]: Start accepts. Automaton has 9698 states and 29812 transitions. Word has length 42 [2019-12-07 14:05:47,212 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:47,212 INFO L462 AbstractCegarLoop]: Abstraction has 9698 states and 29812 transitions. [2019-12-07 14:05:47,212 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:05:47,212 INFO L276 IsEmpty]: Start isEmpty. Operand 9698 states and 29812 transitions. [2019-12-07 14:05:47,219 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 14:05:47,219 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:47,219 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:47,220 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:47,220 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:47,220 INFO L82 PathProgramCache]: Analyzing trace with hash -1613813162, now seen corresponding path program 1 times [2019-12-07 14:05:47,220 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:47,220 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [751093840] [2019-12-07 14:05:47,220 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:47,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:47,282 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:47,282 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [751093840] [2019-12-07 14:05:47,282 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:47,282 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:05:47,282 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [385090125] [2019-12-07 14:05:47,283 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:05:47,283 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:47,283 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:05:47,283 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:05:47,283 INFO L87 Difference]: Start difference. First operand 9698 states and 29812 transitions. Second operand 5 states. [2019-12-07 14:05:47,466 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:47,467 INFO L93 Difference]: Finished difference Result 25725 states and 80296 transitions. [2019-12-07 14:05:47,467 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 14:05:47,467 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 56 [2019-12-07 14:05:47,467 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:47,482 INFO L225 Difference]: With dead ends: 25725 [2019-12-07 14:05:47,482 INFO L226 Difference]: Without dead ends: 11994 [2019-12-07 14:05:47,482 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:05:47,524 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11994 states. [2019-12-07 14:05:47,594 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11994 to 7352. [2019-12-07 14:05:47,594 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7352 states. [2019-12-07 14:05:47,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7352 states to 7352 states and 22762 transitions. [2019-12-07 14:05:47,604 INFO L78 Accepts]: Start accepts. Automaton has 7352 states and 22762 transitions. Word has length 56 [2019-12-07 14:05:47,604 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:47,604 INFO L462 AbstractCegarLoop]: Abstraction has 7352 states and 22762 transitions. [2019-12-07 14:05:47,604 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:05:47,604 INFO L276 IsEmpty]: Start isEmpty. Operand 7352 states and 22762 transitions. [2019-12-07 14:05:47,610 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 14:05:47,610 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:47,610 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:47,610 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:47,610 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:47,610 INFO L82 PathProgramCache]: Analyzing trace with hash 1782045904, now seen corresponding path program 2 times [2019-12-07 14:05:47,610 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:47,610 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1850421308] [2019-12-07 14:05:47,610 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:47,622 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:47,672 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:47,673 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1850421308] [2019-12-07 14:05:47,673 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:47,673 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:05:47,673 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1695953921] [2019-12-07 14:05:47,673 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:05:47,674 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:47,674 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:05:47,674 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:05:47,674 INFO L87 Difference]: Start difference. First operand 7352 states and 22762 transitions. Second operand 4 states. [2019-12-07 14:05:47,718 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:47,718 INFO L93 Difference]: Finished difference Result 11994 states and 37458 transitions. [2019-12-07 14:05:47,718 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 14:05:47,718 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 56 [2019-12-07 14:05:47,718 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:47,724 INFO L225 Difference]: With dead ends: 11994 [2019-12-07 14:05:47,724 INFO L226 Difference]: Without dead ends: 4819 [2019-12-07 14:05:47,724 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:05:47,752 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4819 states. [2019-12-07 14:05:47,791 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4819 to 4819. [2019-12-07 14:05:47,791 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4819 states. [2019-12-07 14:05:47,798 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4819 states to 4819 states and 15164 transitions. [2019-12-07 14:05:47,798 INFO L78 Accepts]: Start accepts. Automaton has 4819 states and 15164 transitions. Word has length 56 [2019-12-07 14:05:47,798 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:47,798 INFO L462 AbstractCegarLoop]: Abstraction has 4819 states and 15164 transitions. [2019-12-07 14:05:47,798 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:05:47,798 INFO L276 IsEmpty]: Start isEmpty. Operand 4819 states and 15164 transitions. [2019-12-07 14:05:47,802 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 14:05:47,802 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:47,802 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:47,802 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:47,802 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:47,802 INFO L82 PathProgramCache]: Analyzing trace with hash 259489780, now seen corresponding path program 3 times [2019-12-07 14:05:47,802 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:47,802 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2033896461] [2019-12-07 14:05:47,802 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:47,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:47,934 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:47,934 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2033896461] [2019-12-07 14:05:47,934 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:47,934 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 14:05:47,934 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2104105912] [2019-12-07 14:05:47,934 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 14:05:47,935 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:47,935 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 14:05:47,935 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 14:05:47,935 INFO L87 Difference]: Start difference. First operand 4819 states and 15164 transitions. Second operand 10 states. [2019-12-07 14:05:48,501 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:48,502 INFO L93 Difference]: Finished difference Result 8845 states and 27462 transitions. [2019-12-07 14:05:48,502 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 14:05:48,502 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 56 [2019-12-07 14:05:48,502 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:48,508 INFO L225 Difference]: With dead ends: 8845 [2019-12-07 14:05:48,508 INFO L226 Difference]: Without dead ends: 6279 [2019-12-07 14:05:48,509 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=74, Invalid=268, Unknown=0, NotChecked=0, Total=342 [2019-12-07 14:05:48,538 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6279 states. [2019-12-07 14:05:48,583 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6279 to 5939. [2019-12-07 14:05:48,583 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5939 states. [2019-12-07 14:05:48,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5939 states to 5939 states and 18454 transitions. [2019-12-07 14:05:48,590 INFO L78 Accepts]: Start accepts. Automaton has 5939 states and 18454 transitions. Word has length 56 [2019-12-07 14:05:48,591 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:48,591 INFO L462 AbstractCegarLoop]: Abstraction has 5939 states and 18454 transitions. [2019-12-07 14:05:48,591 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 14:05:48,591 INFO L276 IsEmpty]: Start isEmpty. Operand 5939 states and 18454 transitions. [2019-12-07 14:05:48,595 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 14:05:48,595 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:48,595 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:48,595 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:48,595 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:48,595 INFO L82 PathProgramCache]: Analyzing trace with hash 1236301856, now seen corresponding path program 4 times [2019-12-07 14:05:48,595 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:48,595 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [754926001] [2019-12-07 14:05:48,595 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:48,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:48,917 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:48,918 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [754926001] [2019-12-07 14:05:48,918 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:48,918 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 14:05:48,918 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [213106525] [2019-12-07 14:05:48,918 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 14:05:48,918 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:48,919 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 14:05:48,919 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=201, Unknown=0, NotChecked=0, Total=240 [2019-12-07 14:05:48,919 INFO L87 Difference]: Start difference. First operand 5939 states and 18454 transitions. Second operand 16 states. [2019-12-07 14:05:50,151 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:50,152 INFO L93 Difference]: Finished difference Result 9477 states and 28636 transitions. [2019-12-07 14:05:50,152 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2019-12-07 14:05:50,152 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 56 [2019-12-07 14:05:50,152 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:50,160 INFO L225 Difference]: With dead ends: 9477 [2019-12-07 14:05:50,160 INFO L226 Difference]: Without dead ends: 7617 [2019-12-07 14:05:50,161 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 455 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=277, Invalid=1529, Unknown=0, NotChecked=0, Total=1806 [2019-12-07 14:05:50,193 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7617 states. [2019-12-07 14:05:50,249 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7617 to 6149. [2019-12-07 14:05:50,250 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6149 states. [2019-12-07 14:05:50,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6149 states to 6149 states and 19060 transitions. [2019-12-07 14:05:50,258 INFO L78 Accepts]: Start accepts. Automaton has 6149 states and 19060 transitions. Word has length 56 [2019-12-07 14:05:50,258 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:50,259 INFO L462 AbstractCegarLoop]: Abstraction has 6149 states and 19060 transitions. [2019-12-07 14:05:50,259 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 14:05:50,259 INFO L276 IsEmpty]: Start isEmpty. Operand 6149 states and 19060 transitions. [2019-12-07 14:05:50,263 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 14:05:50,263 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:50,263 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:50,264 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:50,264 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:50,264 INFO L82 PathProgramCache]: Analyzing trace with hash 997734682, now seen corresponding path program 5 times [2019-12-07 14:05:50,264 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:50,264 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [412149228] [2019-12-07 14:05:50,264 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:50,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:50,406 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:50,406 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [412149228] [2019-12-07 14:05:50,406 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:50,406 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 14:05:50,407 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [989675550] [2019-12-07 14:05:50,407 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 14:05:50,407 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:50,407 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 14:05:50,407 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 14:05:50,407 INFO L87 Difference]: Start difference. First operand 6149 states and 19060 transitions. Second operand 11 states. [2019-12-07 14:05:51,032 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:51,032 INFO L93 Difference]: Finished difference Result 8899 states and 27091 transitions. [2019-12-07 14:05:51,033 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 14:05:51,033 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 56 [2019-12-07 14:05:51,033 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:51,041 INFO L225 Difference]: With dead ends: 8899 [2019-12-07 14:05:51,041 INFO L226 Difference]: Without dead ends: 6787 [2019-12-07 14:05:51,041 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 47 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=86, Invalid=334, Unknown=0, NotChecked=0, Total=420 [2019-12-07 14:05:51,072 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6787 states. [2019-12-07 14:05:51,121 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6787 to 6267. [2019-12-07 14:05:51,122 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6267 states. [2019-12-07 14:05:51,130 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6267 states to 6267 states and 19364 transitions. [2019-12-07 14:05:51,130 INFO L78 Accepts]: Start accepts. Automaton has 6267 states and 19364 transitions. Word has length 56 [2019-12-07 14:05:51,130 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:51,130 INFO L462 AbstractCegarLoop]: Abstraction has 6267 states and 19364 transitions. [2019-12-07 14:05:51,130 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 14:05:51,130 INFO L276 IsEmpty]: Start isEmpty. Operand 6267 states and 19364 transitions. [2019-12-07 14:05:51,135 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 14:05:51,135 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:51,135 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:51,135 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:51,135 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:51,135 INFO L82 PathProgramCache]: Analyzing trace with hash -711328716, now seen corresponding path program 6 times [2019-12-07 14:05:51,135 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:51,136 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2035933149] [2019-12-07 14:05:51,136 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:51,144 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:51,243 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:51,243 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2035933149] [2019-12-07 14:05:51,243 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:51,243 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 14:05:51,243 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [539965310] [2019-12-07 14:05:51,244 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 14:05:51,244 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:51,244 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 14:05:51,244 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 14:05:51,244 INFO L87 Difference]: Start difference. First operand 6267 states and 19364 transitions. Second operand 10 states. [2019-12-07 14:05:51,878 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:51,878 INFO L93 Difference]: Finished difference Result 9885 states and 29875 transitions. [2019-12-07 14:05:51,878 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-12-07 14:05:51,879 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 56 [2019-12-07 14:05:51,879 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:51,887 INFO L225 Difference]: With dead ends: 9885 [2019-12-07 14:05:51,887 INFO L226 Difference]: Without dead ends: 7710 [2019-12-07 14:05:51,888 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 86 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=116, Invalid=436, Unknown=0, NotChecked=0, Total=552 [2019-12-07 14:05:51,920 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7710 states. [2019-12-07 14:05:51,987 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7710 to 6496. [2019-12-07 14:05:51,987 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6496 states. [2019-12-07 14:05:51,995 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6496 states to 6496 states and 19903 transitions. [2019-12-07 14:05:51,995 INFO L78 Accepts]: Start accepts. Automaton has 6496 states and 19903 transitions. Word has length 56 [2019-12-07 14:05:51,995 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:51,995 INFO L462 AbstractCegarLoop]: Abstraction has 6496 states and 19903 transitions. [2019-12-07 14:05:51,996 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 14:05:51,996 INFO L276 IsEmpty]: Start isEmpty. Operand 6496 states and 19903 transitions. [2019-12-07 14:05:52,000 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 14:05:52,000 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:52,001 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:52,001 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:52,001 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:52,001 INFO L82 PathProgramCache]: Analyzing trace with hash 259978164, now seen corresponding path program 7 times [2019-12-07 14:05:52,001 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:52,001 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1619370030] [2019-12-07 14:05:52,002 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:52,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:52,126 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:52,127 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1619370030] [2019-12-07 14:05:52,127 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:52,127 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 14:05:52,127 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1921753975] [2019-12-07 14:05:52,127 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 14:05:52,127 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:52,127 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 14:05:52,127 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 14:05:52,128 INFO L87 Difference]: Start difference. First operand 6496 states and 19903 transitions. Second operand 11 states. [2019-12-07 14:05:52,776 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:52,776 INFO L93 Difference]: Finished difference Result 9494 states and 28552 transitions. [2019-12-07 14:05:52,777 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 14:05:52,777 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 56 [2019-12-07 14:05:52,777 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:52,784 INFO L225 Difference]: With dead ends: 9494 [2019-12-07 14:05:52,785 INFO L226 Difference]: Without dead ends: 7522 [2019-12-07 14:05:52,785 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 116 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=130, Invalid=572, Unknown=0, NotChecked=0, Total=702 [2019-12-07 14:05:52,816 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7522 states. [2019-12-07 14:05:52,867 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7522 to 6380. [2019-12-07 14:05:52,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6380 states. [2019-12-07 14:05:52,876 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6380 states to 6380 states and 19541 transitions. [2019-12-07 14:05:52,876 INFO L78 Accepts]: Start accepts. Automaton has 6380 states and 19541 transitions. Word has length 56 [2019-12-07 14:05:52,876 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:52,876 INFO L462 AbstractCegarLoop]: Abstraction has 6380 states and 19541 transitions. [2019-12-07 14:05:52,876 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 14:05:52,876 INFO L276 IsEmpty]: Start isEmpty. Operand 6380 states and 19541 transitions. [2019-12-07 14:05:52,881 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 14:05:52,881 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:52,881 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:52,881 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:52,881 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:52,881 INFO L82 PathProgramCache]: Analyzing trace with hash -1250250812, now seen corresponding path program 8 times [2019-12-07 14:05:52,881 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:52,881 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1669922143] [2019-12-07 14:05:52,882 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:52,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:53,167 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:53,167 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1669922143] [2019-12-07 14:05:53,167 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:53,167 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 14:05:53,167 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1029046397] [2019-12-07 14:05:53,168 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 14:05:53,168 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:53,168 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 14:05:53,168 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2019-12-07 14:05:53,168 INFO L87 Difference]: Start difference. First operand 6380 states and 19541 transitions. Second operand 15 states. [2019-12-07 14:05:54,618 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:54,619 INFO L93 Difference]: Finished difference Result 8345 states and 24967 transitions. [2019-12-07 14:05:54,619 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 14:05:54,619 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 56 [2019-12-07 14:05:54,620 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:54,633 INFO L225 Difference]: With dead ends: 8345 [2019-12-07 14:05:54,633 INFO L226 Difference]: Without dead ends: 7469 [2019-12-07 14:05:54,634 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 122 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=144, Invalid=726, Unknown=0, NotChecked=0, Total=870 [2019-12-07 14:05:54,673 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7469 states. [2019-12-07 14:05:54,726 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7469 to 6478. [2019-12-07 14:05:54,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6478 states. [2019-12-07 14:05:54,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6478 states to 6478 states and 19826 transitions. [2019-12-07 14:05:54,735 INFO L78 Accepts]: Start accepts. Automaton has 6478 states and 19826 transitions. Word has length 56 [2019-12-07 14:05:54,735 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:54,735 INFO L462 AbstractCegarLoop]: Abstraction has 6478 states and 19826 transitions. [2019-12-07 14:05:54,735 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 14:05:54,735 INFO L276 IsEmpty]: Start isEmpty. Operand 6478 states and 19826 transitions. [2019-12-07 14:05:54,740 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 14:05:54,740 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:54,740 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:54,740 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:54,740 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:54,740 INFO L82 PathProgramCache]: Analyzing trace with hash 425157206, now seen corresponding path program 9 times [2019-12-07 14:05:54,741 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:54,741 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [159922797] [2019-12-07 14:05:54,741 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:54,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:54,895 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:54,895 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [159922797] [2019-12-07 14:05:54,895 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:54,895 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 14:05:54,895 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1918510214] [2019-12-07 14:05:54,896 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 14:05:54,896 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:54,896 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 14:05:54,896 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=130, Unknown=0, NotChecked=0, Total=156 [2019-12-07 14:05:54,896 INFO L87 Difference]: Start difference. First operand 6478 states and 19826 transitions. Second operand 13 states. [2019-12-07 14:05:56,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:56,691 INFO L93 Difference]: Finished difference Result 10732 states and 32567 transitions. [2019-12-07 14:05:56,692 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-12-07 14:05:56,692 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 56 [2019-12-07 14:05:56,692 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:56,710 INFO L225 Difference]: With dead ends: 10732 [2019-12-07 14:05:56,710 INFO L226 Difference]: Without dead ends: 10294 [2019-12-07 14:05:56,711 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 271 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=232, Invalid=1100, Unknown=0, NotChecked=0, Total=1332 [2019-12-07 14:05:56,751 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10294 states. [2019-12-07 14:05:56,829 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10294 to 8866. [2019-12-07 14:05:56,829 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8866 states. [2019-12-07 14:05:56,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8866 states to 8866 states and 27043 transitions. [2019-12-07 14:05:56,842 INFO L78 Accepts]: Start accepts. Automaton has 8866 states and 27043 transitions. Word has length 56 [2019-12-07 14:05:56,842 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:56,842 INFO L462 AbstractCegarLoop]: Abstraction has 8866 states and 27043 transitions. [2019-12-07 14:05:56,842 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 14:05:56,843 INFO L276 IsEmpty]: Start isEmpty. Operand 8866 states and 27043 transitions. [2019-12-07 14:05:56,850 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 14:05:56,850 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:56,850 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:56,850 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:56,850 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:56,850 INFO L82 PathProgramCache]: Analyzing trace with hash 2122420018, now seen corresponding path program 10 times [2019-12-07 14:05:56,850 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:56,850 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [981922954] [2019-12-07 14:05:56,850 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:56,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:56,990 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:56,991 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [981922954] [2019-12-07 14:05:56,991 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:56,991 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 14:05:56,991 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [966259492] [2019-12-07 14:05:56,991 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 14:05:56,991 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:56,991 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 14:05:56,991 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=128, Unknown=0, NotChecked=0, Total=156 [2019-12-07 14:05:56,991 INFO L87 Difference]: Start difference. First operand 8866 states and 27043 transitions. Second operand 13 states. [2019-12-07 14:05:58,325 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:58,326 INFO L93 Difference]: Finished difference Result 10642 states and 31830 transitions. [2019-12-07 14:05:58,326 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-12-07 14:05:58,326 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 56 [2019-12-07 14:05:58,326 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:58,333 INFO L225 Difference]: With dead ends: 10642 [2019-12-07 14:05:58,333 INFO L226 Difference]: Without dead ends: 7210 [2019-12-07 14:05:58,334 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 266 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=236, Invalid=1096, Unknown=0, NotChecked=0, Total=1332 [2019-12-07 14:05:58,364 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7210 states. [2019-12-07 14:05:58,415 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7210 to 6364. [2019-12-07 14:05:58,415 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6364 states. [2019-12-07 14:05:58,424 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6364 states to 6364 states and 19422 transitions. [2019-12-07 14:05:58,424 INFO L78 Accepts]: Start accepts. Automaton has 6364 states and 19422 transitions. Word has length 56 [2019-12-07 14:05:58,424 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:58,424 INFO L462 AbstractCegarLoop]: Abstraction has 6364 states and 19422 transitions. [2019-12-07 14:05:58,424 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 14:05:58,424 INFO L276 IsEmpty]: Start isEmpty. Operand 6364 states and 19422 transitions. [2019-12-07 14:05:58,429 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 14:05:58,429 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:58,429 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:58,429 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:58,430 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:58,430 INFO L82 PathProgramCache]: Analyzing trace with hash 918799478, now seen corresponding path program 11 times [2019-12-07 14:05:58,430 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:58,430 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [416566368] [2019-12-07 14:05:58,430 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:58,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:58,569 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:58,570 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [416566368] [2019-12-07 14:05:58,570 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:58,570 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 14:05:58,570 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1838011324] [2019-12-07 14:05:58,570 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 14:05:58,570 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:58,570 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 14:05:58,570 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 14:05:58,570 INFO L87 Difference]: Start difference. First operand 6364 states and 19422 transitions. Second operand 12 states. [2019-12-07 14:05:59,383 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:59,383 INFO L93 Difference]: Finished difference Result 9597 states and 28710 transitions. [2019-12-07 14:05:59,384 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2019-12-07 14:05:59,384 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 56 [2019-12-07 14:05:59,384 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:59,396 INFO L225 Difference]: With dead ends: 9597 [2019-12-07 14:05:59,397 INFO L226 Difference]: Without dead ends: 6857 [2019-12-07 14:05:59,398 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 378 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=276, Invalid=1284, Unknown=0, NotChecked=0, Total=1560 [2019-12-07 14:05:59,437 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6857 states. [2019-12-07 14:05:59,485 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6857 to 6007. [2019-12-07 14:05:59,485 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6007 states. [2019-12-07 14:05:59,493 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6007 states to 6007 states and 18295 transitions. [2019-12-07 14:05:59,493 INFO L78 Accepts]: Start accepts. Automaton has 6007 states and 18295 transitions. Word has length 56 [2019-12-07 14:05:59,494 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:59,494 INFO L462 AbstractCegarLoop]: Abstraction has 6007 states and 18295 transitions. [2019-12-07 14:05:59,494 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 14:05:59,494 INFO L276 IsEmpty]: Start isEmpty. Operand 6007 states and 18295 transitions. [2019-12-07 14:05:59,498 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 14:05:59,499 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:59,499 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:59,499 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:59,499 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:59,499 INFO L82 PathProgramCache]: Analyzing trace with hash 1649345490, now seen corresponding path program 12 times [2019-12-07 14:05:59,499 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:59,499 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [941644473] [2019-12-07 14:05:59,499 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:59,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 14:05:59,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 14:05:59,556 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 14:05:59,556 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 14:05:59,558 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [808] [808] ULTIMATE.startENTRY-->L818: Formula: (let ((.cse0 (store |v_#valid_64| 0 0))) (and (= 0 v_~x$read_delayed_var~0.base_6) (= v_~x$r_buff1_thd1~0_448 0) (= 0 v_~x$read_delayed_var~0.offset_6) (= 0 v_~x$w_buff1_used~0_643) (= 0 v_~x~0_243) (= v_~__unbuffered_p2_EBX~0_64 0) (= 0 v_~__unbuffered_p0_EAX~0_82) (= 0 v_~x$r_buff1_thd2~0_283) (= v_~x$flush_delayed~0_67 0) (= 0 v_~__unbuffered_p2_EAX~0_64) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1903~0.base_26| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1903~0.base_26|) |v_ULTIMATE.start_main_~#t1903~0.offset_20| 0)) |v_#memory_int_23|) (= v_~main$tmp_guard1~0_51 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1903~0.base_26|) 0) (= v_~main$tmp_guard0~0_41 0) (< 0 |v_#StackHeapBarrier_17|) (= 0 |v_ULTIMATE.start_main_~#t1903~0.offset_20|) (= v_~x$r_buff1_thd0~0_322 0) (= 0 v_~x$w_buff1~0_350) (= v_~weak$$choice2~0_208 0) (= 0 v_~x$w_buff0~0_432) (= 0 v_~x$read_delayed~0_6) (= 0 v_~__unbuffered_cnt~0_96) (= 0 v_~x$r_buff0_thd3~0_150) (= v_~x$r_buff0_thd1~0_385 0) (= 0 v_~x$r_buff1_thd3~0_288) (= v_~x$mem_tmp~0_44 0) (= 0 v_~x$r_buff0_thd2~0_345) (= |v_#NULL.offset_5| 0) (= 0 v_~x$w_buff0_used~0_952) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1903~0.base_26|) (= v_~x$r_buff0_thd0~0_164 0) (= 0 v_~weak$$choice0~0_40) (= v_~y~0_300 0) (= |v_#valid_62| (store .cse0 |v_ULTIMATE.start_main_~#t1903~0.base_26| 1)) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1903~0.base_26| 4)) (= 0 |v_#NULL.base_5|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_24|, #length=|v_#length_24|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_432, ~x$flush_delayed~0=v_~x$flush_delayed~0_67, ULTIMATE.start_main_~#t1904~0.offset=|v_ULTIMATE.start_main_~#t1904~0.offset_20|, #NULL.offset=|v_#NULL.offset_5|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_448, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_150, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_40|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_34|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_82, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_64, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_164, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_64, ~x$w_buff1~0=v_~x$w_buff1~0_350, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_643, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_283, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_6, ~weak$$choice0~0=v_~weak$$choice0~0_40, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_96, ULTIMATE.start_main_~#t1905~0.base=|v_ULTIMATE.start_main_~#t1905~0.base_21|, ~x~0=v_~x~0_243, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_385, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_106|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_288, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_51, ~x$mem_tmp~0=v_~x$mem_tmp~0_44, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_51|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_60|, ULTIMATE.start_main_~#t1904~0.base=|v_ULTIMATE.start_main_~#t1904~0.base_27|, ULTIMATE.start_main_~#t1905~0.offset=|v_ULTIMATE.start_main_~#t1905~0.offset_14|, ~y~0=v_~y~0_300, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_15|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_41, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_322, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_345, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_~#t1903~0.base=|v_ULTIMATE.start_main_~#t1903~0.base_26|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_952, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_60|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_6, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_23|, ULTIMATE.start_main_~#t1903~0.offset=|v_ULTIMATE.start_main_~#t1903~0.offset_20|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_8|, ~weak$$choice2~0=v_~weak$$choice2~0_208, ~x$read_delayed~0=v_~x$read_delayed~0_6} AuxVars[] AssignedVars[~x$w_buff0~0, ~x$r_buff0_thd1~0, ~x$flush_delayed~0, ULTIMATE.start_main_~#t1904~0.offset, #NULL.offset, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~x$r_buff1_thd1~0, ~main$tmp_guard1~0, ~x$r_buff0_thd3~0, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44, ~__unbuffered_p0_EAX~0, ULTIMATE.start_main_~#t1904~0.base, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t1905~0.offset, ~y~0, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~nondet40, ~__unbuffered_p2_EBX~0, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ~x$read_delayed_var~0.base, #NULL.base, ULTIMATE.start_main_~#t1903~0.base, ~x$w_buff0_used~0, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_#t~nondet38, #memory_int, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t1903~0.offset, ULTIMATE.start_main_#t~nondet39, ULTIMATE.start_main_~#t1905~0.base, ~weak$$choice2~0, ~x~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 14:05:59,559 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L818-1-->L820: Formula: (and (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t1904~0.base_10|)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1904~0.base_10|) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t1904~0.base_10| 1)) (not (= |v_ULTIMATE.start_main_~#t1904~0.base_10| 0)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1904~0.base_10| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1904~0.base_10|) |v_ULTIMATE.start_main_~#t1904~0.offset_9| 1)) |v_#memory_int_15|) (= |v_ULTIMATE.start_main_~#t1904~0.offset_9| 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1904~0.base_10| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t1904~0.base=|v_ULTIMATE.start_main_~#t1904~0.base_10|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t1904~0.offset=|v_ULTIMATE.start_main_~#t1904~0.offset_9|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_4|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1904~0.base, #valid, #memory_int, ULTIMATE.start_main_~#t1904~0.offset, ULTIMATE.start_main_#t~nondet38, #length] because there is no mapped edge [2019-12-07 14:05:59,559 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [672] [672] P1ENTRY-->L5-3: Formula: (and (= v_P1Thread1of1ForFork0_~arg.base_6 |v_P1Thread1of1ForFork0_#in~arg.base_8|) (= 1 v_~x$w_buff0_used~0_82) (= v_P1Thread1of1ForFork0_~arg.offset_6 |v_P1Thread1of1ForFork0_#in~arg.offset_8|) (= v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_8 |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|) (= v_~x$w_buff1_used~0_45 v_~x$w_buff0_used~0_83) (= (ite (not (and (not (= (mod v_~x$w_buff1_used~0_45 256) 0)) (not (= (mod v_~x$w_buff0_used~0_82 256) 0)))) 1 0) |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|) (= v_~x$w_buff0~0_23 v_~x$w_buff1~0_17) (not (= 0 v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_8)) (= 1 v_~x$w_buff0~0_22)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_23, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_8|, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_8|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_83} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_22, P1Thread1of1ForFork0___VERIFIER_assert_~expression=v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_8, P1Thread1of1ForFork0_~arg.offset=v_P1Thread1of1ForFork0_~arg.offset_6, P1Thread1of1ForFork0_~arg.base=v_P1Thread1of1ForFork0_~arg.base_6, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_8|, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|, ~x$w_buff1~0=v_~x$w_buff1~0_17, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_8|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_45, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_82} AuxVars[] AssignedVars[~x$w_buff0~0, P1Thread1of1ForFork0___VERIFIER_assert_~expression, P1Thread1of1ForFork0_~arg.offset, P1Thread1of1ForFork0_~arg.base, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 14:05:59,559 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L820-1-->L822: Formula: (and (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t1905~0.base_11| 4)) (= |v_ULTIMATE.start_main_~#t1905~0.offset_10| 0) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t1905~0.base_11| 1)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1905~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1905~0.base_11|) |v_ULTIMATE.start_main_~#t1905~0.offset_10| 2)) |v_#memory_int_13|) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t1905~0.base_11|)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1905~0.base_11|) (not (= 0 |v_ULTIMATE.start_main_~#t1905~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_14|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_13|, #length=|v_#length_13|, ULTIMATE.start_main_~#t1905~0.offset=|v_ULTIMATE.start_main_~#t1905~0.offset_10|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_4|, ULTIMATE.start_main_~#t1905~0.base=|v_ULTIMATE.start_main_~#t1905~0.base_11|} AuxVars[] AssignedVars[#valid, #memory_int, #length, ULTIMATE.start_main_~#t1905~0.offset, ULTIMATE.start_main_#t~nondet39, ULTIMATE.start_main_~#t1905~0.base] because there is no mapped edge [2019-12-07 14:05:59,561 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L795-2-->L795-4: Formula: (let ((.cse0 (= (mod ~x$w_buff1_used~0_In-1294754579 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In-1294754579 256)))) (or (and (not .cse0) (not .cse1) (= ~x$w_buff1~0_In-1294754579 |P2Thread1of1ForFork1_#t~ite32_Out-1294754579|)) (and (or .cse0 .cse1) (= ~x~0_In-1294754579 |P2Thread1of1ForFork1_#t~ite32_Out-1294754579|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1294754579, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1294754579, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1294754579, ~x~0=~x~0_In-1294754579} OutVars{P2Thread1of1ForFork1_#t~ite32=|P2Thread1of1ForFork1_#t~ite32_Out-1294754579|, ~x$w_buff1~0=~x$w_buff1~0_In-1294754579, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1294754579, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1294754579, ~x~0=~x~0_In-1294754579} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32] because there is no mapped edge [2019-12-07 14:05:59,561 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [677] [677] L795-4-->L796: Formula: (= v_~x~0_18 |v_P2Thread1of1ForFork1_#t~ite32_6|) InVars {P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_6|} OutVars{P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_5|, P2Thread1of1ForFork1_#t~ite33=|v_P2Thread1of1ForFork1_#t~ite33_5|, ~x~0=v_~x~0_18} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32, P2Thread1of1ForFork1_#t~ite33, ~x~0] because there is no mapped edge [2019-12-07 14:05:59,562 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] L796-->L796-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In-1738972703 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In-1738972703 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork1_#t~ite34_Out-1738972703| 0) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork1_#t~ite34_Out-1738972703| ~x$w_buff0_used~0_In-1738972703)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1738972703, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1738972703} OutVars{P2Thread1of1ForFork1_#t~ite34=|P2Thread1of1ForFork1_#t~ite34_Out-1738972703|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1738972703, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1738972703} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-12-07 14:05:59,563 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L740-->L740-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In864016231 256) 0))) (or (and (= |P0Thread1of1ForFork2_#t~ite9_Out864016231| |P0Thread1of1ForFork2_#t~ite8_Out864016231|) .cse0 (= ~x$w_buff0~0_In864016231 |P0Thread1of1ForFork2_#t~ite8_Out864016231|) (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In864016231 256) 0))) (or (= (mod ~x$w_buff0_used~0_In864016231 256) 0) (and (= (mod ~x$r_buff1_thd1~0_In864016231 256) 0) .cse1) (and .cse1 (= (mod ~x$w_buff1_used~0_In864016231 256) 0))))) (and (not .cse0) (= |P0Thread1of1ForFork2_#t~ite8_In864016231| |P0Thread1of1ForFork2_#t~ite8_Out864016231|) (= ~x$w_buff0~0_In864016231 |P0Thread1of1ForFork2_#t~ite9_Out864016231|)))) InVars {~x$w_buff0~0=~x$w_buff0~0_In864016231, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In864016231, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_In864016231|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In864016231, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In864016231, ~weak$$choice2~0=~weak$$choice2~0_In864016231, ~x$w_buff0_used~0=~x$w_buff0_used~0_In864016231} OutVars{~x$w_buff0~0=~x$w_buff0~0_In864016231, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In864016231, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_Out864016231|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In864016231, P0Thread1of1ForFork2_#t~ite9=|P0Thread1of1ForFork2_#t~ite9_Out864016231|, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In864016231, ~weak$$choice2~0=~weak$$choice2~0_In864016231, ~x$w_buff0_used~0=~x$w_buff0_used~0_In864016231} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite8, P0Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 14:05:59,563 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [747] [747] L776-->L776-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In2096790750 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd2~0_In2096790750 256) 0))) (or (and (= ~x$w_buff0_used~0_In2096790750 |P1Thread1of1ForFork0_#t~ite28_Out2096790750|) (or .cse0 .cse1)) (and (= 0 |P1Thread1of1ForFork0_#t~ite28_Out2096790750|) (not .cse0) (not .cse1)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In2096790750, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2096790750} OutVars{~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In2096790750, P1Thread1of1ForFork0_#t~ite28=|P1Thread1of1ForFork0_#t~ite28_Out2096790750|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2096790750} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite28] because there is no mapped edge [2019-12-07 14:05:59,564 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L777-->L777-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff1_thd2~0_In1946001960 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In1946001960 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In1946001960 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1946001960 256)))) (or (and (= |P1Thread1of1ForFork0_#t~ite29_Out1946001960| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= |P1Thread1of1ForFork0_#t~ite29_Out1946001960| ~x$w_buff1_used~0_In1946001960) (or .cse1 .cse0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1946001960, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1946001960, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1946001960, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1946001960} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1946001960, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1946001960, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1946001960, P1Thread1of1ForFork0_#t~ite29=|P1Thread1of1ForFork0_#t~ite29_Out1946001960|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1946001960} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 14:05:59,564 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [753] [753] L778-->L779: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-502074584 256))) (.cse2 (= ~x$r_buff0_thd2~0_In-502074584 ~x$r_buff0_thd2~0_Out-502074584)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-502074584 256)))) (or (and (= 0 ~x$r_buff0_thd2~0_Out-502074584) (not .cse0) (not .cse1)) (and .cse0 .cse2) (and .cse2 .cse1))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-502074584, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-502074584} OutVars{P1Thread1of1ForFork0_#t~ite30=|P1Thread1of1ForFork0_#t~ite30_Out-502074584|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-502074584, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-502074584} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite30, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 14:05:59,564 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L779-->L779-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff0_used~0_In-681213934 256))) (.cse3 (= 0 (mod ~x$r_buff0_thd2~0_In-681213934 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-681213934 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd2~0_In-681213934 256)))) (or (and (= 0 |P1Thread1of1ForFork0_#t~ite31_Out-681213934|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse0 .cse1) (= |P1Thread1of1ForFork0_#t~ite31_Out-681213934| ~x$r_buff1_thd2~0_In-681213934)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-681213934, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-681213934, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-681213934, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-681213934} OutVars{P1Thread1of1ForFork0_#t~ite31=|P1Thread1of1ForFork0_#t~ite31_Out-681213934|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-681213934, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-681213934, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-681213934, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-681213934} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 14:05:59,564 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L779-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= v_~x$r_buff1_thd2~0_52 |v_P1Thread1of1ForFork0_#t~ite31_28|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_63 1) v_~__unbuffered_cnt~0_62)) InVars {P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63} OutVars{P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_27|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_52, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 14:05:59,565 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L797-->L797-2: Formula: (let ((.cse2 (= (mod ~x$r_buff0_thd3~0_In-599208867 256) 0)) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In-599208867 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In-599208867 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-599208867 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff1_used~0_In-599208867 |P2Thread1of1ForFork1_#t~ite35_Out-599208867|) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork1_#t~ite35_Out-599208867| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-599208867, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-599208867, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-599208867, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-599208867} OutVars{P2Thread1of1ForFork1_#t~ite35=|P2Thread1of1ForFork1_#t~ite35_Out-599208867|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-599208867, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-599208867, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-599208867, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-599208867} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite35] because there is no mapped edge [2019-12-07 14:05:59,565 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [745] [745] L798-->L798-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In2030617445 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd3~0_In2030617445 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork1_#t~ite36_Out2030617445| 0)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork1_#t~ite36_Out2030617445| ~x$r_buff0_thd3~0_In2030617445)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In2030617445, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2030617445} OutVars{P2Thread1of1ForFork1_#t~ite36=|P2Thread1of1ForFork1_#t~ite36_Out2030617445|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In2030617445, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2030617445} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-12-07 14:05:59,566 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L743-->L743-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-142739703 256) 0))) (or (and (= |P0Thread1of1ForFork2_#t~ite17_In-142739703| |P0Thread1of1ForFork2_#t~ite17_Out-142739703|) (= ~x$w_buff1_used~0_In-142739703 |P0Thread1of1ForFork2_#t~ite18_Out-142739703|) (not .cse0)) (and (= |P0Thread1of1ForFork2_#t~ite17_Out-142739703| |P0Thread1of1ForFork2_#t~ite18_Out-142739703|) (let ((.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In-142739703 256)))) (or (and (= 0 (mod ~x$w_buff1_used~0_In-142739703 256)) .cse1) (and .cse1 (= (mod ~x$r_buff1_thd1~0_In-142739703 256) 0)) (= 0 (mod ~x$w_buff0_used~0_In-142739703 256)))) (= ~x$w_buff1_used~0_In-142739703 |P0Thread1of1ForFork2_#t~ite17_Out-142739703|) .cse0))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-142739703, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_In-142739703|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-142739703, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-142739703, ~weak$$choice2~0=~weak$$choice2~0_In-142739703, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-142739703} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-142739703, P0Thread1of1ForFork2_#t~ite18=|P0Thread1of1ForFork2_#t~ite18_Out-142739703|, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_Out-142739703|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-142739703, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-142739703, ~weak$$choice2~0=~weak$$choice2~0_In-142739703, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-142739703} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite18, P0Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 14:05:59,567 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [730] [730] L744-->L745: Formula: (and (= v_~x$r_buff0_thd1~0_104 v_~x$r_buff0_thd1~0_103) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_104, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{P0Thread1of1ForFork2_#t~ite20=|v_P0Thread1of1ForFork2_#t~ite20_10|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_103, P0Thread1of1ForFork2_#t~ite19=|v_P0Thread1of1ForFork2_#t~ite19_11|, ~weak$$choice2~0=v_~weak$$choice2~0_39, P0Thread1of1ForFork2_#t~ite21=|v_P0Thread1of1ForFork2_#t~ite21_6|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite20, ~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite19, P0Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 14:05:59,567 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L745-->L745-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-2071928773 256) 0))) (or (and .cse0 (= ~x$r_buff1_thd1~0_In-2071928773 |P0Thread1of1ForFork2_#t~ite23_Out-2071928773|) (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In-2071928773 256) 0))) (or (and (= (mod ~x$w_buff1_used~0_In-2071928773 256) 0) .cse1) (and (= 0 (mod ~x$r_buff1_thd1~0_In-2071928773 256)) .cse1) (= (mod ~x$w_buff0_used~0_In-2071928773 256) 0))) (= |P0Thread1of1ForFork2_#t~ite24_Out-2071928773| |P0Thread1of1ForFork2_#t~ite23_Out-2071928773|)) (and (not .cse0) (= ~x$r_buff1_thd1~0_In-2071928773 |P0Thread1of1ForFork2_#t~ite24_Out-2071928773|) (= |P0Thread1of1ForFork2_#t~ite23_In-2071928773| |P0Thread1of1ForFork2_#t~ite23_Out-2071928773|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-2071928773, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2071928773, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-2071928773, ~weak$$choice2~0=~weak$$choice2~0_In-2071928773, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_In-2071928773|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2071928773} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-2071928773, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2071928773, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-2071928773, P0Thread1of1ForFork2_#t~ite24=|P0Thread1of1ForFork2_#t~ite24_Out-2071928773|, ~weak$$choice2~0=~weak$$choice2~0_In-2071928773, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_Out-2071928773|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2071928773} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite24, P0Thread1of1ForFork2_#t~ite23] because there is no mapped edge [2019-12-07 14:05:59,567 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L799-->L799-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd3~0_In1065375475 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1065375475 256))) (.cse2 (= (mod ~x$r_buff1_thd3~0_In1065375475 256) 0)) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In1065375475 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork1_#t~ite37_Out1065375475| ~x$r_buff1_thd3~0_In1065375475)) (and (= |P2Thread1of1ForFork1_#t~ite37_Out1065375475| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1065375475, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1065375475, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1065375475, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1065375475} OutVars{P2Thread1of1ForFork1_#t~ite37=|P2Thread1of1ForFork1_#t~ite37_Out1065375475|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1065375475, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1065375475, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1065375475, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1065375475} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-12-07 14:05:59,567 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L799-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_57 1) v_~__unbuffered_cnt~0_56) (= v_~x$r_buff1_thd3~0_54 |v_P2Thread1of1ForFork1_#t~ite37_28|) (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|)) InVars {P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57} OutVars{P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_27|, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_54, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37, P2Thread1of1ForFork1_#res.base, ~x$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 14:05:59,567 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [703] [703] L747-->L755: Formula: (and (= v_~x$flush_delayed~0_16 0) (not (= (mod v_~x$flush_delayed~0_17 256) 0)) (= v_~x~0_35 v_~x$mem_tmp~0_10) (= (+ v_~__unbuffered_cnt~0_30 1) v_~__unbuffered_cnt~0_29)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_17, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_30, ~x$mem_tmp~0=v_~x$mem_tmp~0_10} OutVars{P0Thread1of1ForFork2_#t~ite25=|v_P0Thread1of1ForFork2_#t~ite25_13|, ~x$flush_delayed~0=v_~x$flush_delayed~0_16, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_29, ~x$mem_tmp~0=v_~x$mem_tmp~0_10, ~x~0=v_~x~0_35} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite25, ~x$flush_delayed~0, ~__unbuffered_cnt~0, ~x~0] because there is no mapped edge [2019-12-07 14:05:59,568 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [698] [698] L826-->L828-2: Formula: (and (or (= 0 (mod v_~x$w_buff0_used~0_172 256)) (= (mod v_~x$r_buff0_thd0~0_29 256) 0)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_29, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_172} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_29, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_172} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 14:05:59,568 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L828-2-->L828-4: Formula: (let ((.cse0 (= (mod ~x$w_buff1_used~0_In99865692 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd0~0_In99865692 256)))) (or (and (not .cse0) (not .cse1) (= ~x$w_buff1~0_In99865692 |ULTIMATE.start_main_#t~ite41_Out99865692|)) (and (or .cse0 .cse1) (= ~x~0_In99865692 |ULTIMATE.start_main_#t~ite41_Out99865692|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In99865692, ~x$w_buff1_used~0=~x$w_buff1_used~0_In99865692, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In99865692, ~x~0=~x~0_In99865692} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out99865692|, ~x$w_buff1~0=~x$w_buff1~0_In99865692, ~x$w_buff1_used~0=~x$w_buff1_used~0_In99865692, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In99865692, ~x~0=~x~0_In99865692} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41] because there is no mapped edge [2019-12-07 14:05:59,568 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L828-4-->L829: Formula: (= v_~x~0_24 |v_ULTIMATE.start_main_#t~ite41_11|) InVars {ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_11|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_10|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_6|, ~x~0=v_~x~0_24} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite42, ~x~0] because there is no mapped edge [2019-12-07 14:05:59,568 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [744] [744] L829-->L829-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-702445644 256))) (.cse0 (= (mod ~x$r_buff0_thd0~0_In-702445644 256) 0))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In-702445644 |ULTIMATE.start_main_#t~ite43_Out-702445644|)) (and (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite43_Out-702445644|) (not .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-702445644, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-702445644} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-702445644, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out-702445644|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-702445644} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-12-07 14:05:59,568 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [746] [746] L830-->L830-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff1_used~0_In-734814481 256))) (.cse3 (= (mod ~x$r_buff1_thd0~0_In-734814481 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In-734814481 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd0~0_In-734814481 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite44_Out-734814481|)) (and (= ~x$w_buff1_used~0_In-734814481 |ULTIMATE.start_main_#t~ite44_Out-734814481|) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-734814481, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-734814481, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-734814481, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-734814481} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-734814481, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-734814481, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-734814481, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-734814481|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-734814481} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 14:05:59,569 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [751] [751] L831-->L831-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1633402989 256))) (.cse1 (= (mod ~x$r_buff0_thd0~0_In-1633402989 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite45_Out-1633402989| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite45_Out-1633402989| ~x$r_buff0_thd0~0_In-1633402989)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1633402989, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1633402989} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1633402989, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-1633402989|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1633402989} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 14:05:59,569 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [741] [741] L832-->L832-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-957727977 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In-957727977 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd0~0_In-957727977 256))) (.cse3 (= (mod ~x$w_buff1_used~0_In-957727977 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite46_Out-957727977| ~x$r_buff1_thd0~0_In-957727977)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite46_Out-957727977| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-957727977, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-957727977, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-957727977, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-957727977} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-957727977, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out-957727977|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-957727977, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-957727977, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-957727977} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 14:05:59,569 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L832-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_26 (ite (= 0 (ite (not (and (= v_~y~0_272 2) (= 0 v_~__unbuffered_p0_EAX~0_53) (= v_~__unbuffered_p2_EBX~0_34 1) (= 1 v_~__unbuffered_p2_EAX~0_34))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_21 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|) (= v_~x$r_buff1_thd0~0_293 |v_ULTIMATE.start_main_#t~ite46_58|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14| (mod v_~main$tmp_guard1~0_26 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_21 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_53, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_58|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_34, ~y~0=v_~y~0_272} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_53, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_21, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_57|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_26, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_34, ~y~0=v_~y~0_272, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_293, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ~x$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 14:05:59,616 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 02:05:59 BasicIcfg [2019-12-07 14:05:59,616 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 14:05:59,617 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 14:05:59,617 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 14:05:59,617 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 14:05:59,617 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:02:28" (3/4) ... [2019-12-07 14:05:59,619 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 14:05:59,619 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [808] [808] ULTIMATE.startENTRY-->L818: Formula: (let ((.cse0 (store |v_#valid_64| 0 0))) (and (= 0 v_~x$read_delayed_var~0.base_6) (= v_~x$r_buff1_thd1~0_448 0) (= 0 v_~x$read_delayed_var~0.offset_6) (= 0 v_~x$w_buff1_used~0_643) (= 0 v_~x~0_243) (= v_~__unbuffered_p2_EBX~0_64 0) (= 0 v_~__unbuffered_p0_EAX~0_82) (= 0 v_~x$r_buff1_thd2~0_283) (= v_~x$flush_delayed~0_67 0) (= 0 v_~__unbuffered_p2_EAX~0_64) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1903~0.base_26| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t1903~0.base_26|) |v_ULTIMATE.start_main_~#t1903~0.offset_20| 0)) |v_#memory_int_23|) (= v_~main$tmp_guard1~0_51 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t1903~0.base_26|) 0) (= v_~main$tmp_guard0~0_41 0) (< 0 |v_#StackHeapBarrier_17|) (= 0 |v_ULTIMATE.start_main_~#t1903~0.offset_20|) (= v_~x$r_buff1_thd0~0_322 0) (= 0 v_~x$w_buff1~0_350) (= v_~weak$$choice2~0_208 0) (= 0 v_~x$w_buff0~0_432) (= 0 v_~x$read_delayed~0_6) (= 0 v_~__unbuffered_cnt~0_96) (= 0 v_~x$r_buff0_thd3~0_150) (= v_~x$r_buff0_thd1~0_385 0) (= 0 v_~x$r_buff1_thd3~0_288) (= v_~x$mem_tmp~0_44 0) (= 0 v_~x$r_buff0_thd2~0_345) (= |v_#NULL.offset_5| 0) (= 0 v_~x$w_buff0_used~0_952) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t1903~0.base_26|) (= v_~x$r_buff0_thd0~0_164 0) (= 0 v_~weak$$choice0~0_40) (= v_~y~0_300 0) (= |v_#valid_62| (store .cse0 |v_ULTIMATE.start_main_~#t1903~0.base_26| 1)) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t1903~0.base_26| 4)) (= 0 |v_#NULL.base_5|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_24|, #length=|v_#length_24|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_432, ~x$flush_delayed~0=v_~x$flush_delayed~0_67, ULTIMATE.start_main_~#t1904~0.offset=|v_ULTIMATE.start_main_~#t1904~0.offset_20|, #NULL.offset=|v_#NULL.offset_5|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_448, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_150, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_40|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_34|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_82, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_64, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_164, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_64, ~x$w_buff1~0=v_~x$w_buff1~0_350, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_643, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_283, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_6, ~weak$$choice0~0=v_~weak$$choice0~0_40, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_96, ULTIMATE.start_main_~#t1905~0.base=|v_ULTIMATE.start_main_~#t1905~0.base_21|, ~x~0=v_~x~0_243, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_385, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_106|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_288, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_51, ~x$mem_tmp~0=v_~x$mem_tmp~0_44, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_51|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_60|, ULTIMATE.start_main_~#t1904~0.base=|v_ULTIMATE.start_main_~#t1904~0.base_27|, ULTIMATE.start_main_~#t1905~0.offset=|v_ULTIMATE.start_main_~#t1905~0.offset_14|, ~y~0=v_~y~0_300, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_15|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_41, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_322, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_345, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_~#t1903~0.base=|v_ULTIMATE.start_main_~#t1903~0.base_26|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_952, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_60|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_6, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, #valid=|v_#valid_62|, #memory_int=|v_#memory_int_23|, ULTIMATE.start_main_~#t1903~0.offset=|v_ULTIMATE.start_main_~#t1903~0.offset_20|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_8|, ~weak$$choice2~0=v_~weak$$choice2~0_208, ~x$read_delayed~0=v_~x$read_delayed~0_6} AuxVars[] AssignedVars[~x$w_buff0~0, ~x$r_buff0_thd1~0, ~x$flush_delayed~0, ULTIMATE.start_main_~#t1904~0.offset, #NULL.offset, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~x$r_buff1_thd1~0, ~main$tmp_guard1~0, ~x$r_buff0_thd3~0, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44, ~__unbuffered_p0_EAX~0, ULTIMATE.start_main_~#t1904~0.base, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t1905~0.offset, ~y~0, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~nondet40, ~__unbuffered_p2_EBX~0, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ~x$read_delayed_var~0.base, #NULL.base, ULTIMATE.start_main_~#t1903~0.base, ~x$w_buff0_used~0, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_#t~nondet38, #memory_int, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t1903~0.offset, ULTIMATE.start_main_#t~nondet39, ULTIMATE.start_main_~#t1905~0.base, ~weak$$choice2~0, ~x~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 14:05:59,619 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L818-1-->L820: Formula: (and (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t1904~0.base_10|)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t1904~0.base_10|) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t1904~0.base_10| 1)) (not (= |v_ULTIMATE.start_main_~#t1904~0.base_10| 0)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1904~0.base_10| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t1904~0.base_10|) |v_ULTIMATE.start_main_~#t1904~0.offset_9| 1)) |v_#memory_int_15|) (= |v_ULTIMATE.start_main_~#t1904~0.offset_9| 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t1904~0.base_10| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t1904~0.base=|v_ULTIMATE.start_main_~#t1904~0.base_10|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t1904~0.offset=|v_ULTIMATE.start_main_~#t1904~0.offset_9|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_4|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t1904~0.base, #valid, #memory_int, ULTIMATE.start_main_~#t1904~0.offset, ULTIMATE.start_main_#t~nondet38, #length] because there is no mapped edge [2019-12-07 14:05:59,620 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [672] [672] P1ENTRY-->L5-3: Formula: (and (= v_P1Thread1of1ForFork0_~arg.base_6 |v_P1Thread1of1ForFork0_#in~arg.base_8|) (= 1 v_~x$w_buff0_used~0_82) (= v_P1Thread1of1ForFork0_~arg.offset_6 |v_P1Thread1of1ForFork0_#in~arg.offset_8|) (= v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_8 |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|) (= v_~x$w_buff1_used~0_45 v_~x$w_buff0_used~0_83) (= (ite (not (and (not (= (mod v_~x$w_buff1_used~0_45 256) 0)) (not (= (mod v_~x$w_buff0_used~0_82 256) 0)))) 1 0) |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|) (= v_~x$w_buff0~0_23 v_~x$w_buff1~0_17) (not (= 0 v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_8)) (= 1 v_~x$w_buff0~0_22)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_23, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_8|, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_8|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_83} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_22, P1Thread1of1ForFork0___VERIFIER_assert_~expression=v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_8, P1Thread1of1ForFork0_~arg.offset=v_P1Thread1of1ForFork0_~arg.offset_6, P1Thread1of1ForFork0_~arg.base=v_P1Thread1of1ForFork0_~arg.base_6, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_8|, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|, ~x$w_buff1~0=v_~x$w_buff1~0_17, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_8|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_45, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_82} AuxVars[] AssignedVars[~x$w_buff0~0, P1Thread1of1ForFork0___VERIFIER_assert_~expression, P1Thread1of1ForFork0_~arg.offset, P1Thread1of1ForFork0_~arg.base, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 14:05:59,620 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L820-1-->L822: Formula: (and (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t1905~0.base_11| 4)) (= |v_ULTIMATE.start_main_~#t1905~0.offset_10| 0) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t1905~0.base_11| 1)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1905~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t1905~0.base_11|) |v_ULTIMATE.start_main_~#t1905~0.offset_10| 2)) |v_#memory_int_13|) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t1905~0.base_11|)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t1905~0.base_11|) (not (= 0 |v_ULTIMATE.start_main_~#t1905~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_14|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_13|, #length=|v_#length_13|, ULTIMATE.start_main_~#t1905~0.offset=|v_ULTIMATE.start_main_~#t1905~0.offset_10|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_4|, ULTIMATE.start_main_~#t1905~0.base=|v_ULTIMATE.start_main_~#t1905~0.base_11|} AuxVars[] AssignedVars[#valid, #memory_int, #length, ULTIMATE.start_main_~#t1905~0.offset, ULTIMATE.start_main_#t~nondet39, ULTIMATE.start_main_~#t1905~0.base] because there is no mapped edge [2019-12-07 14:05:59,621 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L795-2-->L795-4: Formula: (let ((.cse0 (= (mod ~x$w_buff1_used~0_In-1294754579 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In-1294754579 256)))) (or (and (not .cse0) (not .cse1) (= ~x$w_buff1~0_In-1294754579 |P2Thread1of1ForFork1_#t~ite32_Out-1294754579|)) (and (or .cse0 .cse1) (= ~x~0_In-1294754579 |P2Thread1of1ForFork1_#t~ite32_Out-1294754579|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1294754579, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1294754579, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1294754579, ~x~0=~x~0_In-1294754579} OutVars{P2Thread1of1ForFork1_#t~ite32=|P2Thread1of1ForFork1_#t~ite32_Out-1294754579|, ~x$w_buff1~0=~x$w_buff1~0_In-1294754579, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1294754579, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1294754579, ~x~0=~x~0_In-1294754579} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32] because there is no mapped edge [2019-12-07 14:05:59,622 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [677] [677] L795-4-->L796: Formula: (= v_~x~0_18 |v_P2Thread1of1ForFork1_#t~ite32_6|) InVars {P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_6|} OutVars{P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_5|, P2Thread1of1ForFork1_#t~ite33=|v_P2Thread1of1ForFork1_#t~ite33_5|, ~x~0=v_~x~0_18} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32, P2Thread1of1ForFork1_#t~ite33, ~x~0] because there is no mapped edge [2019-12-07 14:05:59,622 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] L796-->L796-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In-1738972703 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In-1738972703 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork1_#t~ite34_Out-1738972703| 0) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork1_#t~ite34_Out-1738972703| ~x$w_buff0_used~0_In-1738972703)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1738972703, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1738972703} OutVars{P2Thread1of1ForFork1_#t~ite34=|P2Thread1of1ForFork1_#t~ite34_Out-1738972703|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1738972703, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1738972703} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-12-07 14:05:59,623 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L740-->L740-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In864016231 256) 0))) (or (and (= |P0Thread1of1ForFork2_#t~ite9_Out864016231| |P0Thread1of1ForFork2_#t~ite8_Out864016231|) .cse0 (= ~x$w_buff0~0_In864016231 |P0Thread1of1ForFork2_#t~ite8_Out864016231|) (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In864016231 256) 0))) (or (= (mod ~x$w_buff0_used~0_In864016231 256) 0) (and (= (mod ~x$r_buff1_thd1~0_In864016231 256) 0) .cse1) (and .cse1 (= (mod ~x$w_buff1_used~0_In864016231 256) 0))))) (and (not .cse0) (= |P0Thread1of1ForFork2_#t~ite8_In864016231| |P0Thread1of1ForFork2_#t~ite8_Out864016231|) (= ~x$w_buff0~0_In864016231 |P0Thread1of1ForFork2_#t~ite9_Out864016231|)))) InVars {~x$w_buff0~0=~x$w_buff0~0_In864016231, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In864016231, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_In864016231|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In864016231, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In864016231, ~weak$$choice2~0=~weak$$choice2~0_In864016231, ~x$w_buff0_used~0=~x$w_buff0_used~0_In864016231} OutVars{~x$w_buff0~0=~x$w_buff0~0_In864016231, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In864016231, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_Out864016231|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In864016231, P0Thread1of1ForFork2_#t~ite9=|P0Thread1of1ForFork2_#t~ite9_Out864016231|, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In864016231, ~weak$$choice2~0=~weak$$choice2~0_In864016231, ~x$w_buff0_used~0=~x$w_buff0_used~0_In864016231} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite8, P0Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 14:05:59,623 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [747] [747] L776-->L776-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In2096790750 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd2~0_In2096790750 256) 0))) (or (and (= ~x$w_buff0_used~0_In2096790750 |P1Thread1of1ForFork0_#t~ite28_Out2096790750|) (or .cse0 .cse1)) (and (= 0 |P1Thread1of1ForFork0_#t~ite28_Out2096790750|) (not .cse0) (not .cse1)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In2096790750, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2096790750} OutVars{~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In2096790750, P1Thread1of1ForFork0_#t~ite28=|P1Thread1of1ForFork0_#t~ite28_Out2096790750|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2096790750} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite28] because there is no mapped edge [2019-12-07 14:05:59,624 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L777-->L777-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff1_thd2~0_In1946001960 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In1946001960 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In1946001960 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1946001960 256)))) (or (and (= |P1Thread1of1ForFork0_#t~ite29_Out1946001960| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= |P1Thread1of1ForFork0_#t~ite29_Out1946001960| ~x$w_buff1_used~0_In1946001960) (or .cse1 .cse0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1946001960, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1946001960, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1946001960, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1946001960} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1946001960, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1946001960, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1946001960, P1Thread1of1ForFork0_#t~ite29=|P1Thread1of1ForFork0_#t~ite29_Out1946001960|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1946001960} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 14:05:59,624 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [753] [753] L778-->L779: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-502074584 256))) (.cse2 (= ~x$r_buff0_thd2~0_In-502074584 ~x$r_buff0_thd2~0_Out-502074584)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-502074584 256)))) (or (and (= 0 ~x$r_buff0_thd2~0_Out-502074584) (not .cse0) (not .cse1)) (and .cse0 .cse2) (and .cse2 .cse1))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-502074584, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-502074584} OutVars{P1Thread1of1ForFork0_#t~ite30=|P1Thread1of1ForFork0_#t~ite30_Out-502074584|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-502074584, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-502074584} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite30, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 14:05:59,624 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L779-->L779-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff0_used~0_In-681213934 256))) (.cse3 (= 0 (mod ~x$r_buff0_thd2~0_In-681213934 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-681213934 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd2~0_In-681213934 256)))) (or (and (= 0 |P1Thread1of1ForFork0_#t~ite31_Out-681213934|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse0 .cse1) (= |P1Thread1of1ForFork0_#t~ite31_Out-681213934| ~x$r_buff1_thd2~0_In-681213934)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-681213934, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-681213934, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-681213934, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-681213934} OutVars{P1Thread1of1ForFork0_#t~ite31=|P1Thread1of1ForFork0_#t~ite31_Out-681213934|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-681213934, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-681213934, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-681213934, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-681213934} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 14:05:59,624 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L779-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= v_~x$r_buff1_thd2~0_52 |v_P1Thread1of1ForFork0_#t~ite31_28|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_63 1) v_~__unbuffered_cnt~0_62)) InVars {P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63} OutVars{P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_27|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_52, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 14:05:59,625 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L797-->L797-2: Formula: (let ((.cse2 (= (mod ~x$r_buff0_thd3~0_In-599208867 256) 0)) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In-599208867 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In-599208867 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-599208867 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff1_used~0_In-599208867 |P2Thread1of1ForFork1_#t~ite35_Out-599208867|) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork1_#t~ite35_Out-599208867| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-599208867, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-599208867, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-599208867, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-599208867} OutVars{P2Thread1of1ForFork1_#t~ite35=|P2Thread1of1ForFork1_#t~ite35_Out-599208867|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-599208867, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-599208867, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-599208867, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-599208867} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite35] because there is no mapped edge [2019-12-07 14:05:59,625 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [745] [745] L798-->L798-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In2030617445 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd3~0_In2030617445 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork1_#t~ite36_Out2030617445| 0)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork1_#t~ite36_Out2030617445| ~x$r_buff0_thd3~0_In2030617445)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In2030617445, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2030617445} OutVars{P2Thread1of1ForFork1_#t~ite36=|P2Thread1of1ForFork1_#t~ite36_Out2030617445|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In2030617445, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2030617445} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-12-07 14:05:59,626 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L743-->L743-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-142739703 256) 0))) (or (and (= |P0Thread1of1ForFork2_#t~ite17_In-142739703| |P0Thread1of1ForFork2_#t~ite17_Out-142739703|) (= ~x$w_buff1_used~0_In-142739703 |P0Thread1of1ForFork2_#t~ite18_Out-142739703|) (not .cse0)) (and (= |P0Thread1of1ForFork2_#t~ite17_Out-142739703| |P0Thread1of1ForFork2_#t~ite18_Out-142739703|) (let ((.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In-142739703 256)))) (or (and (= 0 (mod ~x$w_buff1_used~0_In-142739703 256)) .cse1) (and .cse1 (= (mod ~x$r_buff1_thd1~0_In-142739703 256) 0)) (= 0 (mod ~x$w_buff0_used~0_In-142739703 256)))) (= ~x$w_buff1_used~0_In-142739703 |P0Thread1of1ForFork2_#t~ite17_Out-142739703|) .cse0))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-142739703, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_In-142739703|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-142739703, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-142739703, ~weak$$choice2~0=~weak$$choice2~0_In-142739703, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-142739703} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-142739703, P0Thread1of1ForFork2_#t~ite18=|P0Thread1of1ForFork2_#t~ite18_Out-142739703|, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_Out-142739703|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-142739703, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-142739703, ~weak$$choice2~0=~weak$$choice2~0_In-142739703, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-142739703} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite18, P0Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 14:05:59,626 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [730] [730] L744-->L745: Formula: (and (= v_~x$r_buff0_thd1~0_104 v_~x$r_buff0_thd1~0_103) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_104, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{P0Thread1of1ForFork2_#t~ite20=|v_P0Thread1of1ForFork2_#t~ite20_10|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_103, P0Thread1of1ForFork2_#t~ite19=|v_P0Thread1of1ForFork2_#t~ite19_11|, ~weak$$choice2~0=v_~weak$$choice2~0_39, P0Thread1of1ForFork2_#t~ite21=|v_P0Thread1of1ForFork2_#t~ite21_6|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite20, ~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite19, P0Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 14:05:59,626 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L745-->L745-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-2071928773 256) 0))) (or (and .cse0 (= ~x$r_buff1_thd1~0_In-2071928773 |P0Thread1of1ForFork2_#t~ite23_Out-2071928773|) (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In-2071928773 256) 0))) (or (and (= (mod ~x$w_buff1_used~0_In-2071928773 256) 0) .cse1) (and (= 0 (mod ~x$r_buff1_thd1~0_In-2071928773 256)) .cse1) (= (mod ~x$w_buff0_used~0_In-2071928773 256) 0))) (= |P0Thread1of1ForFork2_#t~ite24_Out-2071928773| |P0Thread1of1ForFork2_#t~ite23_Out-2071928773|)) (and (not .cse0) (= ~x$r_buff1_thd1~0_In-2071928773 |P0Thread1of1ForFork2_#t~ite24_Out-2071928773|) (= |P0Thread1of1ForFork2_#t~ite23_In-2071928773| |P0Thread1of1ForFork2_#t~ite23_Out-2071928773|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-2071928773, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2071928773, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-2071928773, ~weak$$choice2~0=~weak$$choice2~0_In-2071928773, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_In-2071928773|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2071928773} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-2071928773, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2071928773, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-2071928773, P0Thread1of1ForFork2_#t~ite24=|P0Thread1of1ForFork2_#t~ite24_Out-2071928773|, ~weak$$choice2~0=~weak$$choice2~0_In-2071928773, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_Out-2071928773|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2071928773} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite24, P0Thread1of1ForFork2_#t~ite23] because there is no mapped edge [2019-12-07 14:05:59,627 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L799-->L799-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd3~0_In1065375475 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1065375475 256))) (.cse2 (= (mod ~x$r_buff1_thd3~0_In1065375475 256) 0)) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In1065375475 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork1_#t~ite37_Out1065375475| ~x$r_buff1_thd3~0_In1065375475)) (and (= |P2Thread1of1ForFork1_#t~ite37_Out1065375475| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1065375475, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1065375475, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1065375475, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1065375475} OutVars{P2Thread1of1ForFork1_#t~ite37=|P2Thread1of1ForFork1_#t~ite37_Out1065375475|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1065375475, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1065375475, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1065375475, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1065375475} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-12-07 14:05:59,627 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L799-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_57 1) v_~__unbuffered_cnt~0_56) (= v_~x$r_buff1_thd3~0_54 |v_P2Thread1of1ForFork1_#t~ite37_28|) (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|)) InVars {P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57} OutVars{P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_27|, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_54, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37, P2Thread1of1ForFork1_#res.base, ~x$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 14:05:59,627 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [703] [703] L747-->L755: Formula: (and (= v_~x$flush_delayed~0_16 0) (not (= (mod v_~x$flush_delayed~0_17 256) 0)) (= v_~x~0_35 v_~x$mem_tmp~0_10) (= (+ v_~__unbuffered_cnt~0_30 1) v_~__unbuffered_cnt~0_29)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_17, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_30, ~x$mem_tmp~0=v_~x$mem_tmp~0_10} OutVars{P0Thread1of1ForFork2_#t~ite25=|v_P0Thread1of1ForFork2_#t~ite25_13|, ~x$flush_delayed~0=v_~x$flush_delayed~0_16, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_29, ~x$mem_tmp~0=v_~x$mem_tmp~0_10, ~x~0=v_~x~0_35} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite25, ~x$flush_delayed~0, ~__unbuffered_cnt~0, ~x~0] because there is no mapped edge [2019-12-07 14:05:59,627 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [698] [698] L826-->L828-2: Formula: (and (or (= 0 (mod v_~x$w_buff0_used~0_172 256)) (= (mod v_~x$r_buff0_thd0~0_29 256) 0)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_29, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_172} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_29, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_172} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 14:05:59,627 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L828-2-->L828-4: Formula: (let ((.cse0 (= (mod ~x$w_buff1_used~0_In99865692 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd0~0_In99865692 256)))) (or (and (not .cse0) (not .cse1) (= ~x$w_buff1~0_In99865692 |ULTIMATE.start_main_#t~ite41_Out99865692|)) (and (or .cse0 .cse1) (= ~x~0_In99865692 |ULTIMATE.start_main_#t~ite41_Out99865692|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In99865692, ~x$w_buff1_used~0=~x$w_buff1_used~0_In99865692, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In99865692, ~x~0=~x~0_In99865692} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out99865692|, ~x$w_buff1~0=~x$w_buff1~0_In99865692, ~x$w_buff1_used~0=~x$w_buff1_used~0_In99865692, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In99865692, ~x~0=~x~0_In99865692} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41] because there is no mapped edge [2019-12-07 14:05:59,628 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L828-4-->L829: Formula: (= v_~x~0_24 |v_ULTIMATE.start_main_#t~ite41_11|) InVars {ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_11|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_10|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_6|, ~x~0=v_~x~0_24} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite42, ~x~0] because there is no mapped edge [2019-12-07 14:05:59,628 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [744] [744] L829-->L829-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-702445644 256))) (.cse0 (= (mod ~x$r_buff0_thd0~0_In-702445644 256) 0))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In-702445644 |ULTIMATE.start_main_#t~ite43_Out-702445644|)) (and (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite43_Out-702445644|) (not .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-702445644, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-702445644} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-702445644, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out-702445644|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-702445644} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-12-07 14:05:59,628 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [746] [746] L830-->L830-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff1_used~0_In-734814481 256))) (.cse3 (= (mod ~x$r_buff1_thd0~0_In-734814481 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In-734814481 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd0~0_In-734814481 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite44_Out-734814481|)) (and (= ~x$w_buff1_used~0_In-734814481 |ULTIMATE.start_main_#t~ite44_Out-734814481|) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-734814481, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-734814481, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-734814481, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-734814481} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-734814481, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-734814481, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-734814481, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-734814481|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-734814481} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 14:05:59,628 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [751] [751] L831-->L831-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1633402989 256))) (.cse1 (= (mod ~x$r_buff0_thd0~0_In-1633402989 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite45_Out-1633402989| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite45_Out-1633402989| ~x$r_buff0_thd0~0_In-1633402989)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1633402989, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1633402989} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1633402989, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-1633402989|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1633402989} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 14:05:59,629 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [741] [741] L832-->L832-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-957727977 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In-957727977 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd0~0_In-957727977 256))) (.cse3 (= (mod ~x$w_buff1_used~0_In-957727977 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite46_Out-957727977| ~x$r_buff1_thd0~0_In-957727977)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite46_Out-957727977| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-957727977, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-957727977, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-957727977, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-957727977} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-957727977, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out-957727977|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-957727977, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-957727977, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-957727977} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 14:05:59,629 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L832-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_26 (ite (= 0 (ite (not (and (= v_~y~0_272 2) (= 0 v_~__unbuffered_p0_EAX~0_53) (= v_~__unbuffered_p2_EBX~0_34 1) (= 1 v_~__unbuffered_p2_EAX~0_34))) 1 0)) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_21 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|) (= v_~x$r_buff1_thd0~0_293 |v_ULTIMATE.start_main_#t~ite46_58|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14| (mod v_~main$tmp_guard1~0_26 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_21 0)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_53, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_58|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_34, ~y~0=v_~y~0_272} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_53, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_21, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_34, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_57|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_26, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_34, ~y~0=v_~y~0_272, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_293, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ~x$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 14:05:59,682 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_45bfda37-33b1-4fca-8f0b-e8866511b7c2/bin/uautomizer/witness.graphml [2019-12-07 14:05:59,682 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 14:05:59,683 INFO L168 Benchmark]: Toolchain (without parser) took 212179.95 ms. Allocated memory was 1.0 GB in the beginning and 9.2 GB in the end (delta: 8.1 GB). Free memory was 939.3 MB in the beginning and 5.8 GB in the end (delta: -4.8 GB). Peak memory consumption was 3.3 GB. Max. memory is 11.5 GB. [2019-12-07 14:05:59,684 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 14:05:59,684 INFO L168 Benchmark]: CACSL2BoogieTranslator took 380.04 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 84.4 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -112.8 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. [2019-12-07 14:05:59,684 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.18 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 14:05:59,684 INFO L168 Benchmark]: Boogie Preprocessor took 24.18 ms. Allocated memory is still 1.1 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 14:05:59,685 INFO L168 Benchmark]: RCFGBuilder took 397.71 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 989.4 MB in the end (delta: 57.3 MB). Peak memory consumption was 57.3 MB. Max. memory is 11.5 GB. [2019-12-07 14:05:59,685 INFO L168 Benchmark]: TraceAbstraction took 211273.15 ms. Allocated memory was 1.1 GB in the beginning and 9.2 GB in the end (delta: 8.0 GB). Free memory was 989.4 MB in the beginning and 5.8 GB in the end (delta: -4.8 GB). Peak memory consumption was 3.2 GB. Max. memory is 11.5 GB. [2019-12-07 14:05:59,685 INFO L168 Benchmark]: Witness Printer took 65.73 ms. Allocated memory is still 9.2 GB. Free memory was 5.8 GB in the beginning and 5.8 GB in the end (delta: 37.6 MB). Peak memory consumption was 37.6 MB. Max. memory is 11.5 GB. [2019-12-07 14:05:59,687 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 380.04 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 84.4 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -112.8 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.18 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 24.18 ms. Allocated memory is still 1.1 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 397.71 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 989.4 MB in the end (delta: 57.3 MB). Peak memory consumption was 57.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 211273.15 ms. Allocated memory was 1.1 GB in the beginning and 9.2 GB in the end (delta: 8.0 GB). Free memory was 989.4 MB in the beginning and 5.8 GB in the end (delta: -4.8 GB). Peak memory consumption was 3.2 GB. Max. memory is 11.5 GB. * Witness Printer took 65.73 ms. Allocated memory is still 9.2 GB. Free memory was 5.8 GB in the beginning and 5.8 GB in the end (delta: 37.6 MB). Peak memory consumption was 37.6 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.2s, 163 ProgramPointsBefore, 83 ProgramPointsAfterwards, 194 TransitionsBefore, 92 TransitionsAfterwards, 16696 CoEnabledTransitionPairs, 7 FixpointIterations, 32 TrivialSequentialCompositions, 45 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 36 ConcurrentYvCompositions, 26 ChoiceCompositions, 6760 VarBasedMoverChecksPositive, 302 VarBasedMoverChecksNegative, 126 SemBasedMoverChecksPositive, 261 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 66367 CheckedPairsTotal, 113 TotalNumberOfCompositions - CounterExampleResult [Line: 5]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L818] FCALL, FORK 0 pthread_create(&t1903, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L820] FCALL, FORK 0 pthread_create(&t1904, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L822] FCALL, FORK 0 pthread_create(&t1905, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0] [L765] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L766] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L767] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L768] 2 x$r_buff1_thd3 = x$r_buff0_thd3 [L769] 2 x$r_buff0_thd2 = (_Bool)1 [L772] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L775] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L789] 3 __unbuffered_p2_EAX = y [L792] 3 __unbuffered_p2_EBX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L795] 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L775] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L730] 1 y = 2 [L735] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L736] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L737] 1 x$flush_delayed = weak$$choice2 [L738] 1 x$mem_tmp = x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L739] EXPR 1 !x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1) VAL [!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L739] 1 x = !x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1) [L740] 1 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff0)) [L741] EXPR 1 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1))=0, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L741] 1 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1)) [L776] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L777] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L796] 3 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used [L797] 3 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used [L798] 3 x$r_buff0_thd3 = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$r_buff0_thd3 [L742] EXPR 1 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used))=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L742] 1 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used)) [L743] 1 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L745] 1 x$r_buff1_thd1 = weak$$choice2 ? x$r_buff1_thd1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$r_buff1_thd1 : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L746] 1 __unbuffered_p0_EAX = x VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L824] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [\result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L829] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L830] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L831] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 154 locations, 2 error locations. Result: UNSAFE, OverallTime: 211.1s, OverallIterations: 34, TraceHistogramMax: 1, AutomataDifference: 51.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 5264 SDtfs, 8248 SDslu, 16043 SDs, 0 SdLazy, 11363 SolverSat, 462 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 8.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 411 GetRequests, 33 SyntacticMatches, 17 SemanticMatches, 361 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1833 ImplicationChecksByTransitivity, 4.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=281033occurred in iteration=7, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 143.8s AutomataMinimizationTime, 33 MinimizatonAttempts, 501907 StatesRemovedByMinimization, 30 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 2.1s InterpolantComputationTime, 1186 NumberOfCodeBlocks, 1186 NumberOfCodeBlocksAsserted, 34 NumberOfCheckSat, 1097 ConstructedInterpolants, 0 QuantifiedInterpolants, 341758 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 33 InterpolantComputations, 33 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...