./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe008_power.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_ca67d506-568f-4f90-b183-981886d61fa1/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_ca67d506-568f-4f90-b183-981886d61fa1/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_ca67d506-568f-4f90-b183-981886d61fa1/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_ca67d506-568f-4f90-b183-981886d61fa1/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe008_power.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_ca67d506-568f-4f90-b183-981886d61fa1/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_ca67d506-568f-4f90-b183-981886d61fa1/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 12b0a0d8072c4fd3ae9930be8c06779ae4e78e60 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 18:20:36,087 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 18:20:36,088 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 18:20:36,096 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 18:20:36,096 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 18:20:36,097 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 18:20:36,098 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 18:20:36,099 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 18:20:36,101 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 18:20:36,101 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 18:20:36,102 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 18:20:36,103 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 18:20:36,103 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 18:20:36,103 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 18:20:36,104 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 18:20:36,105 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 18:20:36,105 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 18:20:36,106 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 18:20:36,107 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 18:20:36,109 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 18:20:36,110 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 18:20:36,111 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 18:20:36,111 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 18:20:36,112 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 18:20:36,113 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 18:20:36,114 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 18:20:36,114 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 18:20:36,114 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 18:20:36,115 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 18:20:36,115 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 18:20:36,115 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 18:20:36,116 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 18:20:36,116 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 18:20:36,116 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 18:20:36,117 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 18:20:36,117 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 18:20:36,118 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 18:20:36,118 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 18:20:36,118 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 18:20:36,118 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 18:20:36,119 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 18:20:36,119 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_ca67d506-568f-4f90-b183-981886d61fa1/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 18:20:36,128 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 18:20:36,128 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 18:20:36,129 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 18:20:36,129 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 18:20:36,129 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 18:20:36,129 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 18:20:36,129 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 18:20:36,129 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 18:20:36,130 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 18:20:36,130 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 18:20:36,130 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 18:20:36,130 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 18:20:36,130 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 18:20:36,130 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 18:20:36,130 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 18:20:36,130 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 18:20:36,130 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 18:20:36,131 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 18:20:36,131 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 18:20:36,131 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 18:20:36,131 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 18:20:36,131 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:20:36,131 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 18:20:36,131 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 18:20:36,131 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 18:20:36,131 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 18:20:36,132 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 18:20:36,132 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 18:20:36,132 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 18:20:36,132 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_ca67d506-568f-4f90-b183-981886d61fa1/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 12b0a0d8072c4fd3ae9930be8c06779ae4e78e60 [2019-12-07 18:20:36,236 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 18:20:36,246 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 18:20:36,249 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 18:20:36,250 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 18:20:36,251 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 18:20:36,251 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_ca67d506-568f-4f90-b183-981886d61fa1/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe008_power.opt.i [2019-12-07 18:20:36,299 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_ca67d506-568f-4f90-b183-981886d61fa1/bin/uautomizer/data/815a71956/dbb5f19723004c63be47ceca466483ff/FLAGf4fe3e5c9 [2019-12-07 18:20:36,746 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 18:20:36,746 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_ca67d506-568f-4f90-b183-981886d61fa1/sv-benchmarks/c/pthread-wmm/safe008_power.opt.i [2019-12-07 18:20:36,757 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_ca67d506-568f-4f90-b183-981886d61fa1/bin/uautomizer/data/815a71956/dbb5f19723004c63be47ceca466483ff/FLAGf4fe3e5c9 [2019-12-07 18:20:37,076 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_ca67d506-568f-4f90-b183-981886d61fa1/bin/uautomizer/data/815a71956/dbb5f19723004c63be47ceca466483ff [2019-12-07 18:20:37,080 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 18:20:37,082 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 18:20:37,083 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 18:20:37,083 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 18:20:37,087 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 18:20:37,088 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:20:37" (1/1) ... [2019-12-07 18:20:37,090 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@296938c1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:20:37, skipping insertion in model container [2019-12-07 18:20:37,090 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:20:37" (1/1) ... [2019-12-07 18:20:37,095 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 18:20:37,126 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 18:20:37,367 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:20:37,374 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 18:20:37,419 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:20:37,464 INFO L208 MainTranslator]: Completed translation [2019-12-07 18:20:37,464 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:20:37 WrapperNode [2019-12-07 18:20:37,464 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 18:20:37,465 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 18:20:37,465 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 18:20:37,465 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 18:20:37,471 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:20:37" (1/1) ... [2019-12-07 18:20:37,485 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:20:37" (1/1) ... [2019-12-07 18:20:37,503 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 18:20:37,503 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 18:20:37,503 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 18:20:37,503 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 18:20:37,509 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:20:37" (1/1) ... [2019-12-07 18:20:37,509 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:20:37" (1/1) ... [2019-12-07 18:20:37,513 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:20:37" (1/1) ... [2019-12-07 18:20:37,513 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:20:37" (1/1) ... [2019-12-07 18:20:37,522 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:20:37" (1/1) ... [2019-12-07 18:20:37,525 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:20:37" (1/1) ... [2019-12-07 18:20:37,527 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:20:37" (1/1) ... [2019-12-07 18:20:37,531 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 18:20:37,531 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 18:20:37,531 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 18:20:37,531 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 18:20:37,532 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:20:37" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_ca67d506-568f-4f90-b183-981886d61fa1/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:20:37,572 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2019-12-07 18:20:37,572 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 18:20:37,572 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 18:20:37,572 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 18:20:37,572 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 18:20:37,573 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 18:20:37,573 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 18:20:37,573 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 18:20:37,573 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 18:20:37,573 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 18:20:37,573 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 18:20:37,573 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2019-12-07 18:20:37,573 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 18:20:37,573 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 18:20:37,573 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 18:20:37,574 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 18:20:38,014 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 18:20:38,014 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 18:20:38,015 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:20:38 BoogieIcfgContainer [2019-12-07 18:20:38,015 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 18:20:38,016 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 18:20:38,016 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 18:20:38,018 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 18:20:38,018 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 06:20:37" (1/3) ... [2019-12-07 18:20:38,018 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@a7118f0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:20:38, skipping insertion in model container [2019-12-07 18:20:38,018 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:20:37" (2/3) ... [2019-12-07 18:20:38,019 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@a7118f0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:20:38, skipping insertion in model container [2019-12-07 18:20:38,019 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:20:38" (3/3) ... [2019-12-07 18:20:38,020 INFO L109 eAbstractionObserver]: Analyzing ICFG safe008_power.opt.i [2019-12-07 18:20:38,026 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 18:20:38,026 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 18:20:38,031 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 18:20:38,031 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 18:20:38,060 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,060 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,060 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,060 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,060 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,061 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,061 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,061 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,061 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,061 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,062 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,062 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,062 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~mem3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,062 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,062 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,062 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~mem3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,062 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,062 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,063 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,063 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,063 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,063 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,063 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,063 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,063 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,063 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,064 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,064 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,064 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,064 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,064 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,064 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,064 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,064 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,065 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,065 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,066 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,066 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,066 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,066 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,066 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,066 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,066 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,066 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,066 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,067 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,067 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,067 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,067 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,067 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,067 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,067 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,067 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,068 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,068 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,068 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,068 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,068 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,068 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,068 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,068 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,068 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,069 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,069 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,069 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,069 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,069 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,069 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,069 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,069 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,069 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,070 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,070 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,070 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,070 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,070 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,070 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,070 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,071 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,071 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,071 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,071 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,071 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,071 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,071 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,071 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,072 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,072 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,072 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,072 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,072 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,072 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,072 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,072 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,073 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,073 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,073 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,073 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,073 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,073 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,073 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,073 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,073 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,074 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,074 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,074 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,074 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,074 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,074 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,074 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,074 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,075 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,075 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,075 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,075 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,075 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,075 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,075 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,075 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,075 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,076 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,076 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,076 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,076 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,076 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,076 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,076 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,076 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,077 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,077 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,077 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,077 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,077 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,077 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,077 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,077 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,077 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,078 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,078 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,078 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,078 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,078 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,078 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,078 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,078 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,079 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,079 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,079 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,079 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,079 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,079 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,079 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,079 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,079 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,080 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,080 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,080 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,080 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,080 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,080 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,080 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,080 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,080 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,081 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,081 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,081 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,081 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,081 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,081 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,081 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,081 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,082 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,082 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,082 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,082 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,082 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,082 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem56| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,082 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,082 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,082 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,083 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,083 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,083 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,083 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,083 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,083 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,083 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,083 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,083 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,084 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,084 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,084 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,084 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,084 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite55| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,084 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,084 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,084 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,084 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,085 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,085 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,085 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite58| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,085 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem57| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,085 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,085 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite54| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,085 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,085 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,085 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,086 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,086 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,086 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,086 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,086 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,086 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,086 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,086 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,087 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,087 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,087 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem59| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,087 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,087 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,087 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite51| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,087 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,087 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,087 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,088 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite60| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,088 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite61| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,088 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite52| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,088 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite53| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,088 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,088 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite62| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,088 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,088 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,088 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,088 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite63| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,089 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,089 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,089 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,089 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite64| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,089 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,089 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,089 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,089 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite65| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,090 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,090 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,090 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,090 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,090 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,090 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,090 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite68| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,090 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite68| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,091 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite68| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,091 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,091 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~mem66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,091 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,091 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,091 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~mem66| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,091 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite69| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,091 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite69| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,091 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite67| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,092 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite68| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,092 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite69| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,092 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite69| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,092 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite70| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,092 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite70| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,092 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite70| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,092 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite70| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,092 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite71| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,092 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite71| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,093 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite71| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,093 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite71| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,093 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite72| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,093 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite72| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,093 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite72| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,093 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite72| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,093 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,093 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:20:38,105 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 18:20:38,118 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 18:20:38,119 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 18:20:38,119 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 18:20:38,119 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 18:20:38,119 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 18:20:38,119 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 18:20:38,119 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 18:20:38,119 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 18:20:38,131 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 235 places, 293 transitions [2019-12-07 18:20:38,132 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 235 places, 293 transitions [2019-12-07 18:20:38,205 INFO L134 PetriNetUnfolder]: 68/290 cut-off events. [2019-12-07 18:20:38,205 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:20:38,221 INFO L76 FinitePrefix]: Finished finitePrefix Result has 300 conditions, 290 events. 68/290 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 20. Compared 1262 event pairs. 9/229 useless extension candidates. Maximal degree in co-relation 242. Up to 2 conditions per place. [2019-12-07 18:20:38,252 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 235 places, 293 transitions [2019-12-07 18:20:38,300 INFO L134 PetriNetUnfolder]: 68/290 cut-off events. [2019-12-07 18:20:38,300 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:20:38,310 INFO L76 FinitePrefix]: Finished finitePrefix Result has 300 conditions, 290 events. 68/290 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 20. Compared 1262 event pairs. 9/229 useless extension candidates. Maximal degree in co-relation 242. Up to 2 conditions per place. [2019-12-07 18:20:38,340 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 31682 [2019-12-07 18:20:38,341 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 18:20:42,611 WARN L192 SmtUtils]: Spent 313.00 ms on a formula simplification. DAG size of input: 136 DAG size of output: 132 [2019-12-07 18:20:42,753 WARN L192 SmtUtils]: Spent 141.00 ms on a formula simplification that was a NOOP. DAG size: 130 [2019-12-07 18:20:42,785 INFO L206 etLargeBlockEncoding]: Checked pairs total: 167242 [2019-12-07 18:20:42,785 INFO L214 etLargeBlockEncoding]: Total number of compositions: 175 [2019-12-07 18:20:42,788 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 118 places, 145 transitions [2019-12-07 18:21:23,350 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 215972 states. [2019-12-07 18:21:23,351 INFO L276 IsEmpty]: Start isEmpty. Operand 215972 states. [2019-12-07 18:21:23,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 18:21:23,355 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:21:23,356 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 18:21:23,356 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:21:23,360 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:21:23,360 INFO L82 PathProgramCache]: Analyzing trace with hash 1275411, now seen corresponding path program 1 times [2019-12-07 18:21:23,366 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:21:23,366 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1941550224] [2019-12-07 18:21:23,366 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:21:23,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:21:23,501 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:21:23,501 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1941550224] [2019-12-07 18:21:23,501 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:21:23,502 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:21:23,502 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [463776958] [2019-12-07 18:21:23,505 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:21:23,505 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:21:23,514 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:21:23,515 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:21:23,516 INFO L87 Difference]: Start difference. First operand 215972 states. Second operand 3 states. [2019-12-07 18:21:26,410 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:21:26,410 INFO L93 Difference]: Finished difference Result 214184 states and 960653 transitions. [2019-12-07 18:21:26,410 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:21:26,411 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 18:21:26,412 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:21:27,341 INFO L225 Difference]: With dead ends: 214184 [2019-12-07 18:21:27,341 INFO L226 Difference]: Without dead ends: 203875 [2019-12-07 18:21:27,342 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:21:34,683 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 203875 states. [2019-12-07 18:21:37,636 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 203875 to 203875. [2019-12-07 18:21:37,637 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 203875 states. [2019-12-07 18:21:38,734 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 203875 states to 203875 states and 914061 transitions. [2019-12-07 18:21:38,735 INFO L78 Accepts]: Start accepts. Automaton has 203875 states and 914061 transitions. Word has length 3 [2019-12-07 18:21:38,736 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:21:38,736 INFO L462 AbstractCegarLoop]: Abstraction has 203875 states and 914061 transitions. [2019-12-07 18:21:38,736 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:21:38,736 INFO L276 IsEmpty]: Start isEmpty. Operand 203875 states and 914061 transitions. [2019-12-07 18:21:38,743 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 18:21:38,744 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:21:38,744 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:21:38,744 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:21:38,744 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:21:38,744 INFO L82 PathProgramCache]: Analyzing trace with hash 1080836217, now seen corresponding path program 1 times [2019-12-07 18:21:38,744 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:21:38,745 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1626903247] [2019-12-07 18:21:38,745 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:21:38,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:21:38,818 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:21:38,818 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1626903247] [2019-12-07 18:21:38,818 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:21:38,818 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:21:38,818 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1738523085] [2019-12-07 18:21:38,819 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:21:38,819 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:21:38,820 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:21:38,820 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:21:38,820 INFO L87 Difference]: Start difference. First operand 203875 states and 914061 transitions. Second operand 4 states. [2019-12-07 18:21:40,631 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:21:40,631 INFO L93 Difference]: Finished difference Result 324533 states and 1382292 transitions. [2019-12-07 18:21:40,632 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:21:40,632 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 18:21:40,632 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:21:41,507 INFO L225 Difference]: With dead ends: 324533 [2019-12-07 18:21:41,508 INFO L226 Difference]: Without dead ends: 324484 [2019-12-07 18:21:41,508 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:21:53,736 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 324484 states. [2019-12-07 18:21:57,899 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 324484 to 303600. [2019-12-07 18:21:57,900 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 303600 states. [2019-12-07 18:21:58,864 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 303600 states to 303600 states and 1306247 transitions. [2019-12-07 18:21:58,864 INFO L78 Accepts]: Start accepts. Automaton has 303600 states and 1306247 transitions. Word has length 13 [2019-12-07 18:21:58,865 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:21:58,865 INFO L462 AbstractCegarLoop]: Abstraction has 303600 states and 1306247 transitions. [2019-12-07 18:21:58,865 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:21:58,865 INFO L276 IsEmpty]: Start isEmpty. Operand 303600 states and 1306247 transitions. [2019-12-07 18:21:58,868 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 18:21:58,868 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:21:58,868 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:21:58,869 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:21:58,869 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:21:58,869 INFO L82 PathProgramCache]: Analyzing trace with hash -204047335, now seen corresponding path program 1 times [2019-12-07 18:21:58,869 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:21:58,869 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1658687444] [2019-12-07 18:21:58,869 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:21:58,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:21:58,919 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:21:58,920 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1658687444] [2019-12-07 18:21:58,920 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:21:58,920 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:21:58,920 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1468551808] [2019-12-07 18:21:58,920 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:21:58,920 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:21:58,920 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:21:58,920 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:21:58,921 INFO L87 Difference]: Start difference. First operand 303600 states and 1306247 transitions. Second operand 4 states. [2019-12-07 18:22:02,003 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:22:02,003 INFO L93 Difference]: Finished difference Result 445085 states and 1863204 transitions. [2019-12-07 18:22:02,004 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:22:02,004 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 18:22:02,004 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:22:03,291 INFO L225 Difference]: With dead ends: 445085 [2019-12-07 18:22:03,291 INFO L226 Difference]: Without dead ends: 445029 [2019-12-07 18:22:03,292 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:22:17,572 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 445029 states. [2019-12-07 18:22:22,954 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 445029 to 367993. [2019-12-07 18:22:22,954 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 367993 states. [2019-12-07 18:22:24,643 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 367993 states to 367993 states and 1568753 transitions. [2019-12-07 18:22:24,643 INFO L78 Accepts]: Start accepts. Automaton has 367993 states and 1568753 transitions. Word has length 13 [2019-12-07 18:22:24,643 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:22:24,643 INFO L462 AbstractCegarLoop]: Abstraction has 367993 states and 1568753 transitions. [2019-12-07 18:22:24,644 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:22:24,644 INFO L276 IsEmpty]: Start isEmpty. Operand 367993 states and 1568753 transitions. [2019-12-07 18:22:24,648 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 18:22:24,648 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:22:24,648 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:22:24,648 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:22:24,648 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:22:24,649 INFO L82 PathProgramCache]: Analyzing trace with hash 1318284014, now seen corresponding path program 1 times [2019-12-07 18:22:24,649 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:22:24,649 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [812439095] [2019-12-07 18:22:24,649 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:22:24,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:22:24,675 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:22:24,675 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [812439095] [2019-12-07 18:22:24,676 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:22:24,676 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:22:24,676 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1771818565] [2019-12-07 18:22:24,676 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:22:24,676 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:22:24,676 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:22:24,676 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:22:24,677 INFO L87 Difference]: Start difference. First operand 367993 states and 1568753 transitions. Second operand 3 states. [2019-12-07 18:22:27,660 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:22:27,660 INFO L93 Difference]: Finished difference Result 466037 states and 1964311 transitions. [2019-12-07 18:22:27,661 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:22:27,661 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 14 [2019-12-07 18:22:27,661 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:22:34,240 INFO L225 Difference]: With dead ends: 466037 [2019-12-07 18:22:34,240 INFO L226 Difference]: Without dead ends: 466037 [2019-12-07 18:22:34,240 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:22:44,211 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 466037 states. [2019-12-07 18:22:50,483 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 466037 to 391416. [2019-12-07 18:22:50,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 391416 states. [2019-12-07 18:22:51,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 391416 states to 391416 states and 1661164 transitions. [2019-12-07 18:22:51,764 INFO L78 Accepts]: Start accepts. Automaton has 391416 states and 1661164 transitions. Word has length 14 [2019-12-07 18:22:51,764 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:22:51,764 INFO L462 AbstractCegarLoop]: Abstraction has 391416 states and 1661164 transitions. [2019-12-07 18:22:51,765 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:22:51,765 INFO L276 IsEmpty]: Start isEmpty. Operand 391416 states and 1661164 transitions. [2019-12-07 18:22:51,768 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 18:22:51,768 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:22:51,768 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:22:51,768 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:22:51,769 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:22:51,769 INFO L82 PathProgramCache]: Analyzing trace with hash 1318089179, now seen corresponding path program 1 times [2019-12-07 18:22:51,769 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:22:51,769 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [535046679] [2019-12-07 18:22:51,769 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:22:51,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:22:52,387 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:22:52,387 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [535046679] [2019-12-07 18:22:52,387 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:22:52,387 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:22:52,387 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [156160702] [2019-12-07 18:22:52,388 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:22:52,388 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:22:52,388 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:22:52,388 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:22:52,388 INFO L87 Difference]: Start difference. First operand 391416 states and 1661164 transitions. Second operand 5 states. [2019-12-07 18:22:59,618 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:22:59,618 INFO L93 Difference]: Finished difference Result 581632 states and 2422783 transitions. [2019-12-07 18:22:59,619 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:22:59,619 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 14 [2019-12-07 18:22:59,619 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:23:01,464 INFO L225 Difference]: With dead ends: 581632 [2019-12-07 18:23:01,464 INFO L226 Difference]: Without dead ends: 581632 [2019-12-07 18:23:01,464 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:23:12,339 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 581632 states. [2019-12-07 18:23:20,005 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 581632 to 436922. [2019-12-07 18:23:20,005 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 436922 states. [2019-12-07 18:23:21,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 436922 states to 436922 states and 1845670 transitions. [2019-12-07 18:23:21,843 INFO L78 Accepts]: Start accepts. Automaton has 436922 states and 1845670 transitions. Word has length 14 [2019-12-07 18:23:21,843 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:23:21,844 INFO L462 AbstractCegarLoop]: Abstraction has 436922 states and 1845670 transitions. [2019-12-07 18:23:21,844 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:23:21,844 INFO L276 IsEmpty]: Start isEmpty. Operand 436922 states and 1845670 transitions. [2019-12-07 18:23:21,848 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 18:23:21,848 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:23:21,848 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:23:21,848 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:23:21,848 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:23:21,848 INFO L82 PathProgramCache]: Analyzing trace with hash 1503911735, now seen corresponding path program 1 times [2019-12-07 18:23:21,849 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:23:21,849 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1769680271] [2019-12-07 18:23:21,849 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:23:21,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:23:21,910 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:23:21,910 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1769680271] [2019-12-07 18:23:21,911 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:23:21,911 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:23:21,911 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1760949068] [2019-12-07 18:23:21,911 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:23:21,911 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:23:21,912 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:23:21,912 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:23:21,912 INFO L87 Difference]: Start difference. First operand 436922 states and 1845670 transitions. Second operand 5 states. [2019-12-07 18:23:30,444 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:23:30,445 INFO L93 Difference]: Finished difference Result 567981 states and 2373144 transitions. [2019-12-07 18:23:30,445 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:23:30,446 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 14 [2019-12-07 18:23:30,446 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:23:31,938 INFO L225 Difference]: With dead ends: 567981 [2019-12-07 18:23:31,939 INFO L226 Difference]: Without dead ends: 567981 [2019-12-07 18:23:31,939 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:23:42,804 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 567981 states. [2019-12-07 18:23:50,429 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 567981 to 431245. [2019-12-07 18:23:50,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 431245 states. [2019-12-07 18:23:52,430 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 431245 states to 431245 states and 1823903 transitions. [2019-12-07 18:23:52,430 INFO L78 Accepts]: Start accepts. Automaton has 431245 states and 1823903 transitions. Word has length 14 [2019-12-07 18:23:52,431 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:23:52,431 INFO L462 AbstractCegarLoop]: Abstraction has 431245 states and 1823903 transitions. [2019-12-07 18:23:52,431 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:23:52,431 INFO L276 IsEmpty]: Start isEmpty. Operand 431245 states and 1823903 transitions. [2019-12-07 18:23:52,461 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 18:23:52,461 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:23:52,461 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:23:52,462 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:23:52,462 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:23:52,462 INFO L82 PathProgramCache]: Analyzing trace with hash -1315033019, now seen corresponding path program 1 times [2019-12-07 18:23:52,462 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:23:52,462 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [420757513] [2019-12-07 18:23:52,462 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:23:52,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:23:52,508 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:23:52,508 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [420757513] [2019-12-07 18:23:52,508 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:23:52,508 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:23:52,508 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1502498247] [2019-12-07 18:23:52,509 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:23:52,509 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:23:52,509 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:23:52,509 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:23:52,509 INFO L87 Difference]: Start difference. First operand 431245 states and 1823903 transitions. Second operand 5 states. [2019-12-07 18:24:02,060 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:24:02,060 INFO L93 Difference]: Finished difference Result 620957 states and 2576767 transitions. [2019-12-07 18:24:02,061 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:24:02,061 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 18:24:02,061 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:24:03,722 INFO L225 Difference]: With dead ends: 620957 [2019-12-07 18:24:03,722 INFO L226 Difference]: Without dead ends: 620866 [2019-12-07 18:24:03,722 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:24:15,515 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 620866 states. [2019-12-07 18:24:23,696 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 620866 to 458411. [2019-12-07 18:24:23,696 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 458411 states. [2019-12-07 18:24:25,620 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 458411 states to 458411 states and 1934639 transitions. [2019-12-07 18:24:25,620 INFO L78 Accepts]: Start accepts. Automaton has 458411 states and 1934639 transitions. Word has length 19 [2019-12-07 18:24:25,621 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:25,621 INFO L462 AbstractCegarLoop]: Abstraction has 458411 states and 1934639 transitions. [2019-12-07 18:24:25,621 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:24:25,621 INFO L276 IsEmpty]: Start isEmpty. Operand 458411 states and 1934639 transitions. [2019-12-07 18:24:25,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 18:24:25,660 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:25,660 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:25,660 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:25,661 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:25,661 INFO L82 PathProgramCache]: Analyzing trace with hash 1759594211, now seen corresponding path program 1 times [2019-12-07 18:24:25,661 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:25,661 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1347596148] [2019-12-07 18:24:25,661 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:25,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:24:25,702 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:24:25,702 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1347596148] [2019-12-07 18:24:25,702 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:24:25,703 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:24:25,703 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [87117923] [2019-12-07 18:24:25,703 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:24:25,703 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:24:25,703 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:24:25,704 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:24:25,704 INFO L87 Difference]: Start difference. First operand 458411 states and 1934639 transitions. Second operand 4 states. [2019-12-07 18:24:26,133 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:24:26,134 INFO L93 Difference]: Finished difference Result 109435 states and 380984 transitions. [2019-12-07 18:24:26,134 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:24:26,134 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 20 [2019-12-07 18:24:26,134 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:24:26,859 INFO L225 Difference]: With dead ends: 109435 [2019-12-07 18:24:26,860 INFO L226 Difference]: Without dead ends: 85852 [2019-12-07 18:24:26,860 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:24:27,211 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85852 states. [2019-12-07 18:24:28,111 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85852 to 85492. [2019-12-07 18:24:28,111 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85492 states. [2019-12-07 18:24:28,293 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85492 states to 85492 states and 284451 transitions. [2019-12-07 18:24:28,293 INFO L78 Accepts]: Start accepts. Automaton has 85492 states and 284451 transitions. Word has length 20 [2019-12-07 18:24:28,293 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:28,293 INFO L462 AbstractCegarLoop]: Abstraction has 85492 states and 284451 transitions. [2019-12-07 18:24:28,293 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:24:28,293 INFO L276 IsEmpty]: Start isEmpty. Operand 85492 states and 284451 transitions. [2019-12-07 18:24:28,304 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 18:24:28,304 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:28,304 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:28,305 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:28,305 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:28,305 INFO L82 PathProgramCache]: Analyzing trace with hash -1149721652, now seen corresponding path program 1 times [2019-12-07 18:24:28,305 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:28,305 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [472836034] [2019-12-07 18:24:28,305 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:28,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:24:28,359 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:24:28,360 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [472836034] [2019-12-07 18:24:28,360 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:24:28,360 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:24:28,360 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [707283610] [2019-12-07 18:24:28,360 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:24:28,360 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:24:28,360 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:24:28,361 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:24:28,361 INFO L87 Difference]: Start difference. First operand 85492 states and 284451 transitions. Second operand 5 states. [2019-12-07 18:24:29,047 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:24:29,047 INFO L93 Difference]: Finished difference Result 109135 states and 355476 transitions. [2019-12-07 18:24:29,048 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:24:29,048 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 18:24:29,048 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:24:29,622 INFO L225 Difference]: With dead ends: 109135 [2019-12-07 18:24:29,622 INFO L226 Difference]: Without dead ends: 109079 [2019-12-07 18:24:29,622 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:24:30,009 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109079 states. [2019-12-07 18:24:31,021 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109079 to 87547. [2019-12-07 18:24:31,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87547 states. [2019-12-07 18:24:31,207 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87547 states to 87547 states and 290404 transitions. [2019-12-07 18:24:31,207 INFO L78 Accepts]: Start accepts. Automaton has 87547 states and 290404 transitions. Word has length 22 [2019-12-07 18:24:31,208 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:31,208 INFO L462 AbstractCegarLoop]: Abstraction has 87547 states and 290404 transitions. [2019-12-07 18:24:31,208 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:24:31,208 INFO L276 IsEmpty]: Start isEmpty. Operand 87547 states and 290404 transitions. [2019-12-07 18:24:31,219 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 18:24:31,219 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:31,219 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:31,219 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:31,219 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:31,219 INFO L82 PathProgramCache]: Analyzing trace with hash -1319107416, now seen corresponding path program 1 times [2019-12-07 18:24:31,219 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:31,219 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [767440950] [2019-12-07 18:24:31,219 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:31,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:24:31,271 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:24:31,272 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [767440950] [2019-12-07 18:24:31,272 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:24:31,272 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:24:31,272 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [588151541] [2019-12-07 18:24:31,272 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:24:31,273 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:24:31,273 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:24:31,273 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:24:31,273 INFO L87 Difference]: Start difference. First operand 87547 states and 290404 transitions. Second operand 6 states. [2019-12-07 18:24:32,310 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:24:32,310 INFO L93 Difference]: Finished difference Result 121246 states and 394003 transitions. [2019-12-07 18:24:32,311 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 18:24:32,311 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-12-07 18:24:32,311 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:24:32,506 INFO L225 Difference]: With dead ends: 121246 [2019-12-07 18:24:32,506 INFO L226 Difference]: Without dead ends: 121190 [2019-12-07 18:24:32,507 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:24:32,921 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121190 states. [2019-12-07 18:24:34,074 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121190 to 89158. [2019-12-07 18:24:34,074 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89158 states. [2019-12-07 18:24:34,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89158 states to 89158 states and 295240 transitions. [2019-12-07 18:24:34,264 INFO L78 Accepts]: Start accepts. Automaton has 89158 states and 295240 transitions. Word has length 22 [2019-12-07 18:24:34,264 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:34,264 INFO L462 AbstractCegarLoop]: Abstraction has 89158 states and 295240 transitions. [2019-12-07 18:24:34,264 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:24:34,264 INFO L276 IsEmpty]: Start isEmpty. Operand 89158 states and 295240 transitions. [2019-12-07 18:24:34,286 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 18:24:34,286 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:34,286 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:34,286 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:34,286 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:34,286 INFO L82 PathProgramCache]: Analyzing trace with hash -2104474958, now seen corresponding path program 1 times [2019-12-07 18:24:34,286 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:34,286 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1859968486] [2019-12-07 18:24:34,287 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:34,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:24:34,358 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:24:34,358 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1859968486] [2019-12-07 18:24:34,358 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:24:34,358 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:24:34,359 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [138581597] [2019-12-07 18:24:34,359 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:24:34,359 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:24:34,359 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:24:34,359 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:24:34,359 INFO L87 Difference]: Start difference. First operand 89158 states and 295240 transitions. Second operand 6 states. [2019-12-07 18:24:35,141 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:24:35,142 INFO L93 Difference]: Finished difference Result 119357 states and 387961 transitions. [2019-12-07 18:24:35,142 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:24:35,142 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 25 [2019-12-07 18:24:35,142 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:24:35,343 INFO L225 Difference]: With dead ends: 119357 [2019-12-07 18:24:35,343 INFO L226 Difference]: Without dead ends: 119157 [2019-12-07 18:24:35,343 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:24:35,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119157 states. [2019-12-07 18:24:38,564 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119157 to 97302. [2019-12-07 18:24:38,565 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97302 states. [2019-12-07 18:24:38,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97302 states to 97302 states and 320358 transitions. [2019-12-07 18:24:38,758 INFO L78 Accepts]: Start accepts. Automaton has 97302 states and 320358 transitions. Word has length 25 [2019-12-07 18:24:38,759 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:38,759 INFO L462 AbstractCegarLoop]: Abstraction has 97302 states and 320358 transitions. [2019-12-07 18:24:38,759 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:24:38,759 INFO L276 IsEmpty]: Start isEmpty. Operand 97302 states and 320358 transitions. [2019-12-07 18:24:38,775 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 18:24:38,775 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:38,775 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:38,775 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:38,776 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:38,776 INFO L82 PathProgramCache]: Analyzing trace with hash 728629617, now seen corresponding path program 1 times [2019-12-07 18:24:38,776 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:38,776 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1433765345] [2019-12-07 18:24:38,776 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:38,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:24:38,798 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:24:38,798 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1433765345] [2019-12-07 18:24:38,798 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:24:38,798 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:24:38,798 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1900317197] [2019-12-07 18:24:38,799 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:24:38,799 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:24:38,799 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:24:38,799 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:24:38,799 INFO L87 Difference]: Start difference. First operand 97302 states and 320358 transitions. Second operand 3 states. [2019-12-07 18:24:39,143 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:24:39,144 INFO L93 Difference]: Finished difference Result 114368 states and 368383 transitions. [2019-12-07 18:24:39,144 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:24:39,144 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2019-12-07 18:24:39,144 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:24:39,334 INFO L225 Difference]: With dead ends: 114368 [2019-12-07 18:24:39,334 INFO L226 Difference]: Without dead ends: 114368 [2019-12-07 18:24:39,335 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:24:39,757 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114368 states. [2019-12-07 18:24:41,030 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114368 to 96001. [2019-12-07 18:24:41,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96001 states. [2019-12-07 18:24:41,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96001 states to 96001 states and 310379 transitions. [2019-12-07 18:24:41,226 INFO L78 Accepts]: Start accepts. Automaton has 96001 states and 310379 transitions. Word has length 25 [2019-12-07 18:24:41,227 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:41,227 INFO L462 AbstractCegarLoop]: Abstraction has 96001 states and 310379 transitions. [2019-12-07 18:24:41,227 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:24:41,227 INFO L276 IsEmpty]: Start isEmpty. Operand 96001 states and 310379 transitions. [2019-12-07 18:24:41,248 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2019-12-07 18:24:41,248 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:41,248 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:41,248 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:41,248 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:41,248 INFO L82 PathProgramCache]: Analyzing trace with hash 1761884185, now seen corresponding path program 1 times [2019-12-07 18:24:41,249 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:41,249 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [132422525] [2019-12-07 18:24:41,249 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:41,259 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:24:41,309 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:24:41,309 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [132422525] [2019-12-07 18:24:41,309 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:24:41,309 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:24:41,309 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1447893497] [2019-12-07 18:24:41,310 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:24:41,310 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:24:41,310 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:24:41,310 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:24:41,310 INFO L87 Difference]: Start difference. First operand 96001 states and 310379 transitions. Second operand 5 states. [2019-12-07 18:24:42,132 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:24:42,132 INFO L93 Difference]: Finished difference Result 140951 states and 456463 transitions. [2019-12-07 18:24:42,133 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:24:42,133 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2019-12-07 18:24:42,134 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:24:42,370 INFO L225 Difference]: With dead ends: 140951 [2019-12-07 18:24:42,370 INFO L226 Difference]: Without dead ends: 140703 [2019-12-07 18:24:42,371 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:24:42,865 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140703 states. [2019-12-07 18:24:44,404 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140703 to 98363. [2019-12-07 18:24:44,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 98363 states. [2019-12-07 18:24:44,613 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98363 states to 98363 states and 319081 transitions. [2019-12-07 18:24:44,614 INFO L78 Accepts]: Start accepts. Automaton has 98363 states and 319081 transitions. Word has length 26 [2019-12-07 18:24:44,614 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:44,614 INFO L462 AbstractCegarLoop]: Abstraction has 98363 states and 319081 transitions. [2019-12-07 18:24:44,614 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:24:44,614 INFO L276 IsEmpty]: Start isEmpty. Operand 98363 states and 319081 transitions. [2019-12-07 18:24:44,657 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 18:24:44,658 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:44,658 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:44,658 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:44,658 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:44,658 INFO L82 PathProgramCache]: Analyzing trace with hash 642431426, now seen corresponding path program 1 times [2019-12-07 18:24:44,658 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:44,658 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1133205343] [2019-12-07 18:24:44,659 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:44,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:24:44,702 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:24:44,703 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1133205343] [2019-12-07 18:24:44,703 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:24:44,703 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:24:44,703 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2129066432] [2019-12-07 18:24:44,703 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:24:44,703 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:24:44,703 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:24:44,704 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:24:44,704 INFO L87 Difference]: Start difference. First operand 98363 states and 319081 transitions. Second operand 5 states. [2019-12-07 18:24:45,588 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:24:45,588 INFO L93 Difference]: Finished difference Result 134041 states and 428241 transitions. [2019-12-07 18:24:45,589 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:24:45,589 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 30 [2019-12-07 18:24:45,589 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:24:45,812 INFO L225 Difference]: With dead ends: 134041 [2019-12-07 18:24:45,812 INFO L226 Difference]: Without dead ends: 134041 [2019-12-07 18:24:45,812 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:24:46,275 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134041 states. [2019-12-07 18:24:47,809 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134041 to 114260. [2019-12-07 18:24:47,809 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114260 states. [2019-12-07 18:24:48,048 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114260 states to 114260 states and 369492 transitions. [2019-12-07 18:24:48,049 INFO L78 Accepts]: Start accepts. Automaton has 114260 states and 369492 transitions. Word has length 30 [2019-12-07 18:24:48,049 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:48,049 INFO L462 AbstractCegarLoop]: Abstraction has 114260 states and 369492 transitions. [2019-12-07 18:24:48,049 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:24:48,049 INFO L276 IsEmpty]: Start isEmpty. Operand 114260 states and 369492 transitions. [2019-12-07 18:24:48,096 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 18:24:48,096 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:48,096 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:48,096 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:48,096 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:48,096 INFO L82 PathProgramCache]: Analyzing trace with hash -762774042, now seen corresponding path program 1 times [2019-12-07 18:24:48,097 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:48,097 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1553834218] [2019-12-07 18:24:48,097 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:48,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:24:48,140 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:24:48,140 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1553834218] [2019-12-07 18:24:48,140 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:24:48,140 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:24:48,140 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1735722137] [2019-12-07 18:24:48,141 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:24:48,141 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:24:48,141 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:24:48,141 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:24:48,141 INFO L87 Difference]: Start difference. First operand 114260 states and 369492 transitions. Second operand 3 states. [2019-12-07 18:24:48,689 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:24:48,689 INFO L93 Difference]: Finished difference Result 114260 states and 366810 transitions. [2019-12-07 18:24:48,690 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:24:48,690 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 31 [2019-12-07 18:24:48,690 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:24:48,882 INFO L225 Difference]: With dead ends: 114260 [2019-12-07 18:24:48,882 INFO L226 Difference]: Without dead ends: 114260 [2019-12-07 18:24:48,883 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:24:49,295 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114260 states. [2019-12-07 18:24:50,499 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114260 to 112738. [2019-12-07 18:24:50,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112738 states. [2019-12-07 18:24:50,732 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112738 states to 112738 states and 362094 transitions. [2019-12-07 18:24:50,733 INFO L78 Accepts]: Start accepts. Automaton has 112738 states and 362094 transitions. Word has length 31 [2019-12-07 18:24:50,733 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:50,733 INFO L462 AbstractCegarLoop]: Abstraction has 112738 states and 362094 transitions. [2019-12-07 18:24:50,733 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:24:50,733 INFO L276 IsEmpty]: Start isEmpty. Operand 112738 states and 362094 transitions. [2019-12-07 18:24:50,776 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 18:24:50,776 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:50,776 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:50,776 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:50,776 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:50,776 INFO L82 PathProgramCache]: Analyzing trace with hash -1693722372, now seen corresponding path program 1 times [2019-12-07 18:24:50,776 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:50,777 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2135232452] [2019-12-07 18:24:50,777 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:50,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:24:50,817 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:24:50,817 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2135232452] [2019-12-07 18:24:50,817 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:24:50,818 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:24:50,818 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1231307395] [2019-12-07 18:24:50,818 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:24:50,818 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:24:50,818 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:24:50,818 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:24:50,818 INFO L87 Difference]: Start difference. First operand 112738 states and 362094 transitions. Second operand 4 states. [2019-12-07 18:24:51,336 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:24:51,337 INFO L93 Difference]: Finished difference Result 113927 states and 364577 transitions. [2019-12-07 18:24:51,337 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:24:51,337 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 31 [2019-12-07 18:24:51,337 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:24:51,518 INFO L225 Difference]: With dead ends: 113927 [2019-12-07 18:24:51,518 INFO L226 Difference]: Without dead ends: 112530 [2019-12-07 18:24:51,518 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:24:51,927 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112530 states. [2019-12-07 18:24:53,119 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112530 to 112530. [2019-12-07 18:24:53,119 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112530 states. [2019-12-07 18:24:53,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112530 states to 112530 states and 361284 transitions. [2019-12-07 18:24:53,351 INFO L78 Accepts]: Start accepts. Automaton has 112530 states and 361284 transitions. Word has length 31 [2019-12-07 18:24:53,351 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:53,351 INFO L462 AbstractCegarLoop]: Abstraction has 112530 states and 361284 transitions. [2019-12-07 18:24:53,352 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:24:53,352 INFO L276 IsEmpty]: Start isEmpty. Operand 112530 states and 361284 transitions. [2019-12-07 18:24:53,399 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2019-12-07 18:24:53,399 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:53,399 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:53,400 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:53,400 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:53,400 INFO L82 PathProgramCache]: Analyzing trace with hash -1582539924, now seen corresponding path program 1 times [2019-12-07 18:24:53,400 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:53,400 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1503732016] [2019-12-07 18:24:53,400 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:53,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:24:53,446 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:24:53,447 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1503732016] [2019-12-07 18:24:53,447 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:24:53,447 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:24:53,447 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [40077629] [2019-12-07 18:24:53,447 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:24:53,448 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:24:53,448 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:24:53,448 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:24:53,448 INFO L87 Difference]: Start difference. First operand 112530 states and 361284 transitions. Second operand 5 states. [2019-12-07 18:24:53,746 WARN L192 SmtUtils]: Spent 183.00 ms on a formula simplification that was a NOOP. DAG size: 9 [2019-12-07 18:24:54,000 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:24:54,000 INFO L93 Difference]: Finished difference Result 124078 states and 396179 transitions. [2019-12-07 18:24:54,000 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:24:54,001 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 32 [2019-12-07 18:24:54,001 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:24:54,031 INFO L225 Difference]: With dead ends: 124078 [2019-12-07 18:24:54,031 INFO L226 Difference]: Without dead ends: 27146 [2019-12-07 18:24:54,032 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:24:54,114 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27146 states. [2019-12-07 18:24:54,344 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27146 to 26882. [2019-12-07 18:24:54,345 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26882 states. [2019-12-07 18:24:54,383 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26882 states to 26882 states and 78254 transitions. [2019-12-07 18:24:54,383 INFO L78 Accepts]: Start accepts. Automaton has 26882 states and 78254 transitions. Word has length 32 [2019-12-07 18:24:54,383 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:54,383 INFO L462 AbstractCegarLoop]: Abstraction has 26882 states and 78254 transitions. [2019-12-07 18:24:54,383 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:24:54,383 INFO L276 IsEmpty]: Start isEmpty. Operand 26882 states and 78254 transitions. [2019-12-07 18:24:54,390 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 18:24:54,390 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:54,390 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:54,391 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:54,391 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:54,391 INFO L82 PathProgramCache]: Analyzing trace with hash -1282662367, now seen corresponding path program 1 times [2019-12-07 18:24:54,391 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:54,391 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1710177006] [2019-12-07 18:24:54,391 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:54,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:24:54,456 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:24:54,456 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1710177006] [2019-12-07 18:24:54,456 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:24:54,456 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:24:54,456 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [907907039] [2019-12-07 18:24:54,457 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:24:54,457 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:24:54,457 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:24:54,457 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:24:54,457 INFO L87 Difference]: Start difference. First operand 26882 states and 78254 transitions. Second operand 6 states. [2019-12-07 18:24:54,884 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:24:54,884 INFO L93 Difference]: Finished difference Result 41332 states and 119834 transitions. [2019-12-07 18:24:54,884 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 18:24:54,885 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 33 [2019-12-07 18:24:54,885 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:24:54,927 INFO L225 Difference]: With dead ends: 41332 [2019-12-07 18:24:54,927 INFO L226 Difference]: Without dead ends: 40651 [2019-12-07 18:24:54,928 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 5 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=40, Invalid=92, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:24:55,035 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40651 states. [2019-12-07 18:24:55,363 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40651 to 29039. [2019-12-07 18:24:55,363 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29039 states. [2019-12-07 18:24:55,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29039 states to 29039 states and 84689 transitions. [2019-12-07 18:24:55,409 INFO L78 Accepts]: Start accepts. Automaton has 29039 states and 84689 transitions. Word has length 33 [2019-12-07 18:24:55,410 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:55,410 INFO L462 AbstractCegarLoop]: Abstraction has 29039 states and 84689 transitions. [2019-12-07 18:24:55,410 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:24:55,410 INFO L276 IsEmpty]: Start isEmpty. Operand 29039 states and 84689 transitions. [2019-12-07 18:24:55,419 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 18:24:55,419 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:55,419 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:55,420 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:55,420 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:55,420 INFO L82 PathProgramCache]: Analyzing trace with hash -703020691, now seen corresponding path program 1 times [2019-12-07 18:24:55,420 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:55,420 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2129100497] [2019-12-07 18:24:55,420 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:55,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:24:55,462 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:24:55,462 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2129100497] [2019-12-07 18:24:55,462 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:24:55,463 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:24:55,463 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [362058666] [2019-12-07 18:24:55,463 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:24:55,463 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:24:55,463 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:24:55,463 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:24:55,463 INFO L87 Difference]: Start difference. First operand 29039 states and 84689 transitions. Second operand 5 states. [2019-12-07 18:24:55,533 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:24:55,533 INFO L93 Difference]: Finished difference Result 18005 states and 50367 transitions. [2019-12-07 18:24:55,533 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:24:55,533 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 34 [2019-12-07 18:24:55,533 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:24:55,549 INFO L225 Difference]: With dead ends: 18005 [2019-12-07 18:24:55,549 INFO L226 Difference]: Without dead ends: 16379 [2019-12-07 18:24:55,549 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:24:55,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16379 states. [2019-12-07 18:24:55,712 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16379 to 15110. [2019-12-07 18:24:55,712 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15110 states. [2019-12-07 18:24:55,734 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15110 states to 15110 states and 42473 transitions. [2019-12-07 18:24:55,734 INFO L78 Accepts]: Start accepts. Automaton has 15110 states and 42473 transitions. Word has length 34 [2019-12-07 18:24:55,734 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:55,734 INFO L462 AbstractCegarLoop]: Abstraction has 15110 states and 42473 transitions. [2019-12-07 18:24:55,734 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:24:55,734 INFO L276 IsEmpty]: Start isEmpty. Operand 15110 states and 42473 transitions. [2019-12-07 18:24:55,742 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 18:24:55,742 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:55,742 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:55,742 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:55,742 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:55,742 INFO L82 PathProgramCache]: Analyzing trace with hash 1175801098, now seen corresponding path program 1 times [2019-12-07 18:24:55,742 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:55,743 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1995717643] [2019-12-07 18:24:55,743 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:55,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:24:55,807 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:24:55,807 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1995717643] [2019-12-07 18:24:55,807 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:24:55,807 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:24:55,808 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1568018939] [2019-12-07 18:24:55,808 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:24:55,808 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:24:55,808 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:24:55,808 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:24:55,808 INFO L87 Difference]: Start difference. First operand 15110 states and 42473 transitions. Second operand 6 states. [2019-12-07 18:24:56,301 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:24:56,301 INFO L93 Difference]: Finished difference Result 22955 states and 63826 transitions. [2019-12-07 18:24:56,301 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 18:24:56,301 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2019-12-07 18:24:56,301 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:24:56,321 INFO L225 Difference]: With dead ends: 22955 [2019-12-07 18:24:56,321 INFO L226 Difference]: Without dead ends: 22709 [2019-12-07 18:24:56,321 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:24:56,367 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22709 states. [2019-12-07 18:24:56,504 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22709 to 13583. [2019-12-07 18:24:56,504 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13583 states. [2019-12-07 18:24:56,521 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13583 states to 13583 states and 37909 transitions. [2019-12-07 18:24:56,522 INFO L78 Accepts]: Start accepts. Automaton has 13583 states and 37909 transitions. Word has length 34 [2019-12-07 18:24:56,522 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:56,522 INFO L462 AbstractCegarLoop]: Abstraction has 13583 states and 37909 transitions. [2019-12-07 18:24:56,522 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:24:56,522 INFO L276 IsEmpty]: Start isEmpty. Operand 13583 states and 37909 transitions. [2019-12-07 18:24:56,528 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 18:24:56,528 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:56,528 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:56,528 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:56,528 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:56,528 INFO L82 PathProgramCache]: Analyzing trace with hash -276856144, now seen corresponding path program 2 times [2019-12-07 18:24:56,529 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:56,529 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [693381484] [2019-12-07 18:24:56,529 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:56,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:24:56,597 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:24:56,597 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [693381484] [2019-12-07 18:24:56,597 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:24:56,597 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:24:56,597 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1036468803] [2019-12-07 18:24:56,598 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:24:56,598 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:24:56,598 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:24:56,598 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:24:56,598 INFO L87 Difference]: Start difference. First operand 13583 states and 37909 transitions. Second operand 7 states. [2019-12-07 18:24:57,387 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:24:57,387 INFO L93 Difference]: Finished difference Result 27278 states and 76256 transitions. [2019-12-07 18:24:57,387 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 18:24:57,387 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 34 [2019-12-07 18:24:57,388 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:24:57,415 INFO L225 Difference]: With dead ends: 27278 [2019-12-07 18:24:57,415 INFO L226 Difference]: Without dead ends: 27134 [2019-12-07 18:24:57,415 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 9 SyntacticMatches, 1 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 34 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=79, Invalid=161, Unknown=0, NotChecked=0, Total=240 [2019-12-07 18:24:57,469 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27134 states. [2019-12-07 18:24:57,644 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27134 to 13561. [2019-12-07 18:24:57,644 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13561 states. [2019-12-07 18:24:57,664 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13561 states to 13561 states and 37852 transitions. [2019-12-07 18:24:57,664 INFO L78 Accepts]: Start accepts. Automaton has 13561 states and 37852 transitions. Word has length 34 [2019-12-07 18:24:57,664 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:57,664 INFO L462 AbstractCegarLoop]: Abstraction has 13561 states and 37852 transitions. [2019-12-07 18:24:57,664 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:24:57,665 INFO L276 IsEmpty]: Start isEmpty. Operand 13561 states and 37852 transitions. [2019-12-07 18:24:57,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 18:24:57,671 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:57,672 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:57,672 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:57,672 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:57,672 INFO L82 PathProgramCache]: Analyzing trace with hash 1049017354, now seen corresponding path program 3 times [2019-12-07 18:24:57,672 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:57,672 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1958572883] [2019-12-07 18:24:57,672 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:57,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:24:57,740 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:24:57,741 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1958572883] [2019-12-07 18:24:57,741 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:24:57,741 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:24:57,741 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1178852933] [2019-12-07 18:24:57,741 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:24:57,741 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:24:57,741 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:24:57,741 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:24:57,741 INFO L87 Difference]: Start difference. First operand 13561 states and 37852 transitions. Second operand 6 states. [2019-12-07 18:24:58,208 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:24:58,209 INFO L93 Difference]: Finished difference Result 20619 states and 56872 transitions. [2019-12-07 18:24:58,209 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 18:24:58,209 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2019-12-07 18:24:58,209 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:24:58,227 INFO L225 Difference]: With dead ends: 20619 [2019-12-07 18:24:58,227 INFO L226 Difference]: Without dead ends: 20428 [2019-12-07 18:24:58,227 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:24:58,270 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20428 states. [2019-12-07 18:24:58,412 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20428 to 13122. [2019-12-07 18:24:58,412 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13122 states. [2019-12-07 18:24:58,431 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13122 states to 13122 states and 36722 transitions. [2019-12-07 18:24:58,431 INFO L78 Accepts]: Start accepts. Automaton has 13122 states and 36722 transitions. Word has length 34 [2019-12-07 18:24:58,431 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:58,432 INFO L462 AbstractCegarLoop]: Abstraction has 13122 states and 36722 transitions. [2019-12-07 18:24:58,432 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:24:58,432 INFO L276 IsEmpty]: Start isEmpty. Operand 13122 states and 36722 transitions. [2019-12-07 18:24:58,442 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-12-07 18:24:58,443 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:58,443 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:58,443 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:58,443 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:58,443 INFO L82 PathProgramCache]: Analyzing trace with hash 1194460305, now seen corresponding path program 1 times [2019-12-07 18:24:58,443 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:58,443 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [533068078] [2019-12-07 18:24:58,443 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:58,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:24:58,527 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:24:58,527 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [533068078] [2019-12-07 18:24:58,527 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:24:58,527 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:24:58,528 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1459987824] [2019-12-07 18:24:58,528 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:24:58,528 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:24:58,528 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:24:58,528 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:24:58,528 INFO L87 Difference]: Start difference. First operand 13122 states and 36722 transitions. Second operand 7 states. [2019-12-07 18:24:58,967 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:24:58,967 INFO L93 Difference]: Finished difference Result 17567 states and 48455 transitions. [2019-12-07 18:24:58,967 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 18:24:58,967 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 51 [2019-12-07 18:24:58,967 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:24:58,982 INFO L225 Difference]: With dead ends: 17567 [2019-12-07 18:24:58,982 INFO L226 Difference]: Without dead ends: 17233 [2019-12-07 18:24:58,982 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 1 SyntacticMatches, 7 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=60, Invalid=180, Unknown=0, NotChecked=0, Total=240 [2019-12-07 18:24:59,018 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17233 states. [2019-12-07 18:24:59,151 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17233 to 13930. [2019-12-07 18:24:59,151 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13930 states. [2019-12-07 18:24:59,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13930 states to 13930 states and 39106 transitions. [2019-12-07 18:24:59,171 INFO L78 Accepts]: Start accepts. Automaton has 13930 states and 39106 transitions. Word has length 51 [2019-12-07 18:24:59,172 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:59,172 INFO L462 AbstractCegarLoop]: Abstraction has 13930 states and 39106 transitions. [2019-12-07 18:24:59,172 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:24:59,172 INFO L276 IsEmpty]: Start isEmpty. Operand 13930 states and 39106 transitions. [2019-12-07 18:24:59,183 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 18:24:59,183 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:59,183 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:59,184 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:59,184 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:59,184 INFO L82 PathProgramCache]: Analyzing trace with hash 840960704, now seen corresponding path program 1 times [2019-12-07 18:24:59,184 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:59,184 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [194147632] [2019-12-07 18:24:59,184 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:59,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:24:59,252 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:24:59,252 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [194147632] [2019-12-07 18:24:59,252 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:24:59,252 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:24:59,252 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1319976177] [2019-12-07 18:24:59,252 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:24:59,252 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:24:59,252 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:24:59,253 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:24:59,253 INFO L87 Difference]: Start difference. First operand 13930 states and 39106 transitions. Second operand 6 states. [2019-12-07 18:24:59,619 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:24:59,619 INFO L93 Difference]: Finished difference Result 18942 states and 52746 transitions. [2019-12-07 18:24:59,620 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 18:24:59,620 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2019-12-07 18:24:59,620 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:24:59,636 INFO L225 Difference]: With dead ends: 18942 [2019-12-07 18:24:59,636 INFO L226 Difference]: Without dead ends: 18694 [2019-12-07 18:24:59,637 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:24:59,676 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18694 states. [2019-12-07 18:24:59,809 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18694 to 13843. [2019-12-07 18:24:59,809 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13843 states. [2019-12-07 18:24:59,830 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13843 states to 13843 states and 38940 transitions. [2019-12-07 18:24:59,830 INFO L78 Accepts]: Start accepts. Automaton has 13843 states and 38940 transitions. Word has length 52 [2019-12-07 18:24:59,830 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:24:59,830 INFO L462 AbstractCegarLoop]: Abstraction has 13843 states and 38940 transitions. [2019-12-07 18:24:59,830 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:24:59,830 INFO L276 IsEmpty]: Start isEmpty. Operand 13843 states and 38940 transitions. [2019-12-07 18:24:59,841 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 18:24:59,842 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:24:59,842 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:24:59,842 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:24:59,842 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:24:59,842 INFO L82 PathProgramCache]: Analyzing trace with hash -1594824760, now seen corresponding path program 2 times [2019-12-07 18:24:59,842 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:24:59,842 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1474867347] [2019-12-07 18:24:59,842 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:24:59,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:24:59,907 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:24:59,907 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1474867347] [2019-12-07 18:24:59,907 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:24:59,907 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:24:59,907 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1833247470] [2019-12-07 18:24:59,908 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:24:59,908 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:24:59,908 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:24:59,908 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:24:59,908 INFO L87 Difference]: Start difference. First operand 13843 states and 38940 transitions. Second operand 7 states. [2019-12-07 18:25:00,483 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:25:00,483 INFO L93 Difference]: Finished difference Result 19839 states and 55200 transitions. [2019-12-07 18:25:00,483 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 18:25:00,483 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 52 [2019-12-07 18:25:00,483 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:25:00,500 INFO L225 Difference]: With dead ends: 19839 [2019-12-07 18:25:00,500 INFO L226 Difference]: Without dead ends: 19595 [2019-12-07 18:25:00,500 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 6 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=86, Invalid=220, Unknown=0, NotChecked=0, Total=306 [2019-12-07 18:25:00,540 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19595 states. [2019-12-07 18:25:00,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19595 to 13010. [2019-12-07 18:25:00,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13010 states. [2019-12-07 18:25:00,693 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13010 states to 13010 states and 36564 transitions. [2019-12-07 18:25:00,694 INFO L78 Accepts]: Start accepts. Automaton has 13010 states and 36564 transitions. Word has length 52 [2019-12-07 18:25:00,694 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:25:00,694 INFO L462 AbstractCegarLoop]: Abstraction has 13010 states and 36564 transitions. [2019-12-07 18:25:00,694 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:25:00,694 INFO L276 IsEmpty]: Start isEmpty. Operand 13010 states and 36564 transitions. [2019-12-07 18:25:00,705 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 18:25:00,705 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:25:00,705 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:25:00,705 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:25:00,705 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:25:00,705 INFO L82 PathProgramCache]: Analyzing trace with hash 647184366, now seen corresponding path program 3 times [2019-12-07 18:25:00,705 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:25:00,705 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1979158286] [2019-12-07 18:25:00,706 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:25:00,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:25:00,837 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:25:00,837 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1979158286] [2019-12-07 18:25:00,837 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:25:00,837 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 18:25:00,837 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1474842397] [2019-12-07 18:25:00,838 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 18:25:00,838 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:25:00,838 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 18:25:00,838 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:25:00,838 INFO L87 Difference]: Start difference. First operand 13010 states and 36564 transitions. Second operand 8 states. [2019-12-07 18:25:01,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:25:01,901 INFO L93 Difference]: Finished difference Result 26631 states and 74675 transitions. [2019-12-07 18:25:01,902 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 18:25:01,902 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 52 [2019-12-07 18:25:01,903 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:25:01,941 INFO L225 Difference]: With dead ends: 26631 [2019-12-07 18:25:01,942 INFO L226 Difference]: Without dead ends: 26463 [2019-12-07 18:25:01,942 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 12 SyntacticMatches, 1 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 74 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=112, Invalid=308, Unknown=0, NotChecked=0, Total=420 [2019-12-07 18:25:01,997 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26463 states. [2019-12-07 18:25:02,172 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26463 to 12991. [2019-12-07 18:25:02,172 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12991 states. [2019-12-07 18:25:02,191 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12991 states to 12991 states and 36526 transitions. [2019-12-07 18:25:02,192 INFO L78 Accepts]: Start accepts. Automaton has 12991 states and 36526 transitions. Word has length 52 [2019-12-07 18:25:02,192 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:25:02,192 INFO L462 AbstractCegarLoop]: Abstraction has 12991 states and 36526 transitions. [2019-12-07 18:25:02,192 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 18:25:02,192 INFO L276 IsEmpty]: Start isEmpty. Operand 12991 states and 36526 transitions. [2019-12-07 18:25:02,203 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 18:25:02,203 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:25:02,203 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:25:02,203 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:25:02,203 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:25:02,203 INFO L82 PathProgramCache]: Analyzing trace with hash -1961002360, now seen corresponding path program 4 times [2019-12-07 18:25:02,203 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:25:02,203 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2073338649] [2019-12-07 18:25:02,204 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:25:02,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:25:02,281 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:25:02,281 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2073338649] [2019-12-07 18:25:02,281 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:25:02,281 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:25:02,281 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [576882114] [2019-12-07 18:25:02,282 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:25:02,282 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:25:02,282 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:25:02,282 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:25:02,282 INFO L87 Difference]: Start difference. First operand 12991 states and 36526 transitions. Second operand 7 states. [2019-12-07 18:25:02,850 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:25:02,850 INFO L93 Difference]: Finished difference Result 20101 states and 55812 transitions. [2019-12-07 18:25:02,850 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 18:25:02,850 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 52 [2019-12-07 18:25:02,851 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:25:02,869 INFO L225 Difference]: With dead ends: 20101 [2019-12-07 18:25:02,869 INFO L226 Difference]: Without dead ends: 19904 [2019-12-07 18:25:02,869 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 6 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=76, Invalid=196, Unknown=0, NotChecked=0, Total=272 [2019-12-07 18:25:02,911 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19904 states. [2019-12-07 18:25:03,062 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19904 to 12783. [2019-12-07 18:25:03,062 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12783 states. [2019-12-07 18:25:03,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12783 states to 12783 states and 36149 transitions. [2019-12-07 18:25:03,081 INFO L78 Accepts]: Start accepts. Automaton has 12783 states and 36149 transitions. Word has length 52 [2019-12-07 18:25:03,081 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:25:03,081 INFO L462 AbstractCegarLoop]: Abstraction has 12783 states and 36149 transitions. [2019-12-07 18:25:03,081 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:25:03,081 INFO L276 IsEmpty]: Start isEmpty. Operand 12783 states and 36149 transitions. [2019-12-07 18:25:03,092 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 18:25:03,092 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:25:03,092 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:25:03,092 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:25:03,092 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:25:03,093 INFO L82 PathProgramCache]: Analyzing trace with hash -608867291, now seen corresponding path program 1 times [2019-12-07 18:25:03,093 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:25:03,093 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [775361496] [2019-12-07 18:25:03,093 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:25:03,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:25:03,127 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:25:03,127 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [775361496] [2019-12-07 18:25:03,127 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:25:03,127 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:25:03,127 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1200255376] [2019-12-07 18:25:03,127 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:25:03,127 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:25:03,127 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:25:03,128 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:25:03,128 INFO L87 Difference]: Start difference. First operand 12783 states and 36149 transitions. Second operand 3 states. [2019-12-07 18:25:03,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:25:03,206 INFO L93 Difference]: Finished difference Result 18107 states and 51175 transitions. [2019-12-07 18:25:03,207 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:25:03,207 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 56 [2019-12-07 18:25:03,207 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:25:03,223 INFO L225 Difference]: With dead ends: 18107 [2019-12-07 18:25:03,224 INFO L226 Difference]: Without dead ends: 18107 [2019-12-07 18:25:03,224 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:25:03,262 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18107 states. [2019-12-07 18:25:03,392 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18107 to 13205. [2019-12-07 18:25:03,392 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13205 states. [2019-12-07 18:25:03,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13205 states to 13205 states and 37162 transitions. [2019-12-07 18:25:03,411 INFO L78 Accepts]: Start accepts. Automaton has 13205 states and 37162 transitions. Word has length 56 [2019-12-07 18:25:03,411 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:25:03,412 INFO L462 AbstractCegarLoop]: Abstraction has 13205 states and 37162 transitions. [2019-12-07 18:25:03,412 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:25:03,412 INFO L276 IsEmpty]: Start isEmpty. Operand 13205 states and 37162 transitions. [2019-12-07 18:25:03,423 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 18:25:03,423 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:25:03,424 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:25:03,424 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:25:03,424 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:25:03,424 INFO L82 PathProgramCache]: Analyzing trace with hash -646020817, now seen corresponding path program 1 times [2019-12-07 18:25:03,424 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:25:03,424 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1120512865] [2019-12-07 18:25:03,424 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:25:03,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:25:03,474 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:25:03,474 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1120512865] [2019-12-07 18:25:03,474 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:25:03,474 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:25:03,474 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1590971298] [2019-12-07 18:25:03,475 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:25:03,475 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:25:03,475 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:25:03,475 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:25:03,475 INFO L87 Difference]: Start difference. First operand 13205 states and 37162 transitions. Second operand 6 states. [2019-12-07 18:25:03,545 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:25:03,545 INFO L93 Difference]: Finished difference Result 12610 states and 35805 transitions. [2019-12-07 18:25:03,546 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:25:03,546 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 57 [2019-12-07 18:25:03,546 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:25:03,559 INFO L225 Difference]: With dead ends: 12610 [2019-12-07 18:25:03,559 INFO L226 Difference]: Without dead ends: 12516 [2019-12-07 18:25:03,559 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:25:03,589 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12516 states. [2019-12-07 18:25:03,685 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12516 to 11430. [2019-12-07 18:25:03,685 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11430 states. [2019-12-07 18:25:03,701 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11430 states to 11430 states and 32677 transitions. [2019-12-07 18:25:03,702 INFO L78 Accepts]: Start accepts. Automaton has 11430 states and 32677 transitions. Word has length 57 [2019-12-07 18:25:03,702 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:25:03,702 INFO L462 AbstractCegarLoop]: Abstraction has 11430 states and 32677 transitions. [2019-12-07 18:25:03,702 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:25:03,702 INFO L276 IsEmpty]: Start isEmpty. Operand 11430 states and 32677 transitions. [2019-12-07 18:25:03,711 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 18:25:03,711 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:25:03,711 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:25:03,712 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:25:03,712 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:25:03,712 INFO L82 PathProgramCache]: Analyzing trace with hash 1417116384, now seen corresponding path program 1 times [2019-12-07 18:25:03,712 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:25:03,712 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1333640452] [2019-12-07 18:25:03,712 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:25:03,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:25:03,743 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:25:03,744 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1333640452] [2019-12-07 18:25:03,744 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:25:03,744 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:25:03,744 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [522160650] [2019-12-07 18:25:03,744 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:25:03,744 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:25:03,744 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:25:03,744 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:25:03,744 INFO L87 Difference]: Start difference. First operand 11430 states and 32677 transitions. Second operand 3 states. [2019-12-07 18:25:03,770 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:25:03,770 INFO L93 Difference]: Finished difference Result 11429 states and 32675 transitions. [2019-12-07 18:25:03,771 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:25:03,771 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 68 [2019-12-07 18:25:03,771 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:25:03,781 INFO L225 Difference]: With dead ends: 11429 [2019-12-07 18:25:03,781 INFO L226 Difference]: Without dead ends: 11429 [2019-12-07 18:25:03,781 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:25:03,807 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11429 states. [2019-12-07 18:25:03,894 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11429 to 11429. [2019-12-07 18:25:03,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11429 states. [2019-12-07 18:25:03,910 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11429 states to 11429 states and 32675 transitions. [2019-12-07 18:25:03,910 INFO L78 Accepts]: Start accepts. Automaton has 11429 states and 32675 transitions. Word has length 68 [2019-12-07 18:25:03,910 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:25:03,910 INFO L462 AbstractCegarLoop]: Abstraction has 11429 states and 32675 transitions. [2019-12-07 18:25:03,910 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:25:03,910 INFO L276 IsEmpty]: Start isEmpty. Operand 11429 states and 32675 transitions. [2019-12-07 18:25:03,919 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2019-12-07 18:25:03,919 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:25:03,919 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:25:03,919 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:25:03,919 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:25:03,919 INFO L82 PathProgramCache]: Analyzing trace with hash 968070735, now seen corresponding path program 1 times [2019-12-07 18:25:03,919 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:25:03,919 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1635675136] [2019-12-07 18:25:03,919 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:25:03,936 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:25:03,964 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:25:03,964 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1635675136] [2019-12-07 18:25:03,964 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:25:03,964 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:25:03,964 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2096218938] [2019-12-07 18:25:03,965 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:25:03,965 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:25:03,965 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:25:03,965 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:25:03,965 INFO L87 Difference]: Start difference. First operand 11429 states and 32675 transitions. Second operand 3 states. [2019-12-07 18:25:03,990 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:25:03,991 INFO L93 Difference]: Finished difference Result 11429 states and 32674 transitions. [2019-12-07 18:25:03,991 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:25:03,991 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 69 [2019-12-07 18:25:03,991 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:25:04,001 INFO L225 Difference]: With dead ends: 11429 [2019-12-07 18:25:04,001 INFO L226 Difference]: Without dead ends: 11429 [2019-12-07 18:25:04,001 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:25:04,026 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11429 states. [2019-12-07 18:25:04,101 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11429 to 7689. [2019-12-07 18:25:04,101 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7689 states. [2019-12-07 18:25:04,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7689 states to 7689 states and 22233 transitions. [2019-12-07 18:25:04,112 INFO L78 Accepts]: Start accepts. Automaton has 7689 states and 22233 transitions. Word has length 69 [2019-12-07 18:25:04,112 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:25:04,112 INFO L462 AbstractCegarLoop]: Abstraction has 7689 states and 22233 transitions. [2019-12-07 18:25:04,112 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:25:04,112 INFO L276 IsEmpty]: Start isEmpty. Operand 7689 states and 22233 transitions. [2019-12-07 18:25:04,118 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-12-07 18:25:04,118 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:25:04,118 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:25:04,118 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:25:04,118 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:25:04,118 INFO L82 PathProgramCache]: Analyzing trace with hash -163624531, now seen corresponding path program 1 times [2019-12-07 18:25:04,118 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:25:04,119 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [45899406] [2019-12-07 18:25:04,119 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:25:04,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:25:04,175 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:25:04,176 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [45899406] [2019-12-07 18:25:04,176 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:25:04,176 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:25:04,176 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2077137045] [2019-12-07 18:25:04,176 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:25:04,176 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:25:04,177 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:25:04,177 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:25:04,177 INFO L87 Difference]: Start difference. First operand 7689 states and 22233 transitions. Second operand 5 states. [2019-12-07 18:25:04,218 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:25:04,219 INFO L93 Difference]: Finished difference Result 10123 states and 29319 transitions. [2019-12-07 18:25:04,219 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:25:04,219 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 70 [2019-12-07 18:25:04,219 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:25:04,221 INFO L225 Difference]: With dead ends: 10123 [2019-12-07 18:25:04,221 INFO L226 Difference]: Without dead ends: 2764 [2019-12-07 18:25:04,222 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:25:04,234 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2764 states. [2019-12-07 18:25:04,252 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2764 to 2764. [2019-12-07 18:25:04,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2764 states. [2019-12-07 18:25:04,255 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2764 states to 2764 states and 7919 transitions. [2019-12-07 18:25:04,256 INFO L78 Accepts]: Start accepts. Automaton has 2764 states and 7919 transitions. Word has length 70 [2019-12-07 18:25:04,256 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:25:04,256 INFO L462 AbstractCegarLoop]: Abstraction has 2764 states and 7919 transitions. [2019-12-07 18:25:04,256 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:25:04,256 INFO L276 IsEmpty]: Start isEmpty. Operand 2764 states and 7919 transitions. [2019-12-07 18:25:04,258 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2019-12-07 18:25:04,258 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:25:04,258 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:25:04,258 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:25:04,258 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:25:04,258 INFO L82 PathProgramCache]: Analyzing trace with hash -711143795, now seen corresponding path program 2 times [2019-12-07 18:25:04,258 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:25:04,258 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1278580350] [2019-12-07 18:25:04,258 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:25:04,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:25:04,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:25:04,372 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 18:25:04,372 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 18:25:04,374 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1261] [1261] ULTIMATE.startENTRY-->L840: Formula: (let ((.cse1 (store |v_#valid_66| 0 0))) (let ((.cse0 (store .cse1 |v_~#x~0.base_152| 1))) (and (= 0 v_~x$w_buff1~0_233) (= v_~__unbuffered_p1_EAX$r_buff1_thd2~0_7 0) (= 0 v_~weak$$choice0~0_156) (= 0 v_~x$r_buff1_thd3~0_230) (= (store .cse0 |v_ULTIMATE.start_main_~#t1964~0.base_24| 1) |v_#valid_64|) (= v_~__unbuffered_p1_EAX$r_buff0_thd3~0_5 0) (= |v_#length_30| (store (store |v_#length_31| |v_~#x~0.base_152| 4) |v_ULTIMATE.start_main_~#t1964~0.base_24| 4)) (= v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_46 0) (= v_~x$r_buff0_thd0~0_121 0) (= 0 v_~weak$$choice1~0_85) (= v_~__unbuffered_p1_EAX$r_buff1_thd3~0_8 0) (= |v_#memory_int_278| (store |v_#memory_int_279| |v_ULTIMATE.start_main_~#t1964~0.base_24| (store (select |v_#memory_int_279| |v_ULTIMATE.start_main_~#t1964~0.base_24|) |v_ULTIMATE.start_main_~#t1964~0.offset_19| 0))) (= 0 v_~x$r_buff0_thd2~0_544) (= v_~__unbuffered_p1_EAX$read_delayed~0_56 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1964~0.base_24|)) (< |v_#StackHeapBarrier_19| |v_ULTIMATE.start_main_~#t1964~0.base_24|) (= 0 v_~x$read_delayed~0_8) (= v_~x$flush_delayed~0_31 0) (= 0 v_~x$read_delayed_var~0.offset_8) (= v_~__unbuffered_p1_EAX$w_buff1_used~0_8 0) (= v_~__unbuffered_p1_EAX$read_delayed_var~0.base_46 0) (= v_~__unbuffered_p1_EAX$r_buff1_thd0~0_8 0) (= v_~__unbuffered_cnt~0_122 0) (= v_~main$tmp_guard1~0_23 0) (= v_~x$r_buff1_thd0~0_248 0) (= v_~__unbuffered_p1_EAX$w_buff0~0_8 0) (= 0 v_~x$w_buff0~0_313) (= v_~main$tmp_guard0~0_32 0) (= v_~x$w_buff0_used~0_1098 0) (= v_~y~0_37 0) (= 0 |v_#NULL.base_5|) (= v_~__unbuffered_p1_EAX$r_buff0_thd1~0_8 0) (= (select .cse1 |v_~#x~0.base_152|) 0) (= 0 v_~weak$$choice2~0_80) (= (select (select |v_#memory_int_279| |v_~#x~0.base_152|) |v_~#x~0.offset_152|) 0) (= v_~__unbuffered_p1_EAX$r_buff0_thd0~0_7 0) (= v_~__unbuffered_p1_EAX$w_buff1~0_8 0) (= 0 |v_ULTIMATE.start_main_~#t1964~0.offset_19|) (< 0 |v_#StackHeapBarrier_19|) (= v_~__unbuffered_p1_EAX$r_buff0_thd2~0_8 0) (= v_~__unbuffered_p1_EAX$flush_delayed~0_8 0) (= 0 v_~x$read_delayed_var~0.base_8) (< |v_#StackHeapBarrier_19| |v_~#x~0.base_152|) (= v_~z~0_125 0) (= 0 v_~x$r_buff1_thd2~0_577) (= v_~__unbuffered_p1_EAX$r_buff1_thd1~0_8 0) (= 0 |v_~#x~0.offset_152|) (= 0 v_~__unbuffered_p1_EAX~0_67) (= v_~x$r_buff1_thd1~0_213 0) (= v_~__unbuffered_p1_EAX$w_buff0_used~0_7 0) (= v_~x$mem_tmp~0_18 0) (= |v_#NULL.offset_5| 0) (= 0 v_~x$w_buff1_used~0_667) (= 0 v_~x$r_buff0_thd3~0_135) (= v_~x$r_buff0_thd1~0_267 0) (= 0 v_~__unbuffered_p2_EAX~0_38) (= 0 v_~__unbuffered_p1_EAX$mem_tmp~0_8)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_19|, #valid=|v_#valid_66|, #memory_int=|v_#memory_int_279|, #length=|v_#length_31|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_313, ULTIMATE.start_main_#t~nondet74=|v_ULTIMATE.start_main_#t~nondet74_9|, ~__unbuffered_p1_EAX$r_buff0_thd0~0=v_~__unbuffered_p1_EAX$r_buff0_thd0~0_7, ~__unbuffered_p1_EAX$r_buff1_thd2~0=v_~__unbuffered_p1_EAX$r_buff1_thd2~0_7, ~x$flush_delayed~0=v_~x$flush_delayed~0_31, #NULL.offset=|v_#NULL.offset_5|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_213, ULTIMATE.start_main_~#t1966~0.base=|v_ULTIMATE.start_main_~#t1966~0.base_21|, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_135, ~weak$$choice1~0=v_~weak$$choice1~0_85, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_67, ~__unbuffered_p1_EAX$w_buff0~0=v_~__unbuffered_p1_EAX$w_buff0~0_8, ~__unbuffered_p1_EAX$read_delayed_var~0.base=v_~__unbuffered_p1_EAX$read_delayed_var~0.base_46, #length=|v_#length_30|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_38, ULTIMATE.start_main_~#t1964~0.offset=|v_ULTIMATE.start_main_~#t1964~0.offset_19|, ULTIMATE.start_main_~#t1964~0.base=|v_ULTIMATE.start_main_~#t1964~0.base_24|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_121, ~__unbuffered_p1_EAX$r_buff0_thd1~0=v_~__unbuffered_p1_EAX$r_buff0_thd1~0_8, ~#x~0.offset=|v_~#x~0.offset_152|, ~x$w_buff1~0=v_~x$w_buff1~0_233, ~__unbuffered_p1_EAX$r_buff1_thd3~0=v_~__unbuffered_p1_EAX$r_buff1_thd3~0_8, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_667, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_577, ULTIMATE.start_main_#t~ite79=|v_ULTIMATE.start_main_#t~ite79_73|, ULTIMATE.start_main_~#t1965~0.offset=|v_ULTIMATE.start_main_~#t1965~0.offset_17|, ULTIMATE.start_main_#t~ite77=|v_ULTIMATE.start_main_#t~ite77_29|, ULTIMATE.start_main_#t~nondet83=|v_ULTIMATE.start_main_#t~nondet83_91|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_8, ~weak$$choice0~0=v_~weak$$choice0~0_156, #StackHeapBarrier=|v_#StackHeapBarrier_19|, ULTIMATE.start_main_#t~ite82=|v_ULTIMATE.start_main_#t~ite82_105|, ~__unbuffered_p1_EAX$w_buff1_used~0=v_~__unbuffered_p1_EAX$w_buff1_used~0_8, ULTIMATE.start_main_#t~ite80=|v_ULTIMATE.start_main_#t~ite80_83|, ~__unbuffered_p1_EAX$w_buff1~0=v_~__unbuffered_p1_EAX$w_buff1~0_8, ULTIMATE.start_main_~#t1966~0.offset=|v_ULTIMATE.start_main_~#t1966~0.offset_17|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_122, ~__unbuffered_p1_EAX$r_buff0_thd2~0=v_~__unbuffered_p1_EAX$r_buff0_thd2~0_8, ULTIMATE.start_main_#t~nondet75=|v_ULTIMATE.start_main_#t~nondet75_20|, ~__unbuffered_p1_EAX$r_buff1_thd0~0=v_~__unbuffered_p1_EAX$r_buff1_thd0~0_8, ~__unbuffered_p1_EAX$flush_delayed~0=v_~__unbuffered_p1_EAX$flush_delayed~0_8, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_267, ULTIMATE.start_main_#t~nondet73=|v_ULTIMATE.start_main_#t~nondet73_10|, ~__unbuffered_p1_EAX$read_delayed~0=v_~__unbuffered_p1_EAX$read_delayed~0_56, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_230, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~x$mem_tmp~0=v_~x$mem_tmp~0_18, ULTIMATE.start_main_#t~ite86=|v_ULTIMATE.start_main_#t~ite86_47|, ~__unbuffered_p1_EAX$mem_tmp~0=v_~__unbuffered_p1_EAX$mem_tmp~0_8, ULTIMATE.start_main_~#t1965~0.base=|v_ULTIMATE.start_main_~#t1965~0.base_23|, ~y~0=v_~y~0_37, ~__unbuffered_p1_EAX$r_buff0_thd3~0=v_~__unbuffered_p1_EAX$r_buff0_thd3~0_5, ULTIMATE.start_main_#t~mem76=|v_ULTIMATE.start_main_#t~mem76_28|, ~__unbuffered_p1_EAX$r_buff1_thd1~0=v_~__unbuffered_p1_EAX$r_buff1_thd1~0_8, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_46, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_32, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_248, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_544, ULTIMATE.start_main_#t~ite78=|v_ULTIMATE.start_main_#t~ite78_28|, #NULL.base=|v_#NULL.base_5|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_1098, ULTIMATE.start_main_#t~ite85=|v_ULTIMATE.start_main_#t~ite85_40|, ~__unbuffered_p1_EAX$w_buff0_used~0=v_~__unbuffered_p1_EAX$w_buff0_used~0_7, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_8, ULTIMATE.start_main_#t~ite81=|v_ULTIMATE.start_main_#t~ite81_27|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_278|, ~#x~0.base=|v_~#x~0.base_152|, ULTIMATE.start_main_#t~mem84=|v_ULTIMATE.start_main_#t~mem84_37|, ~z~0=v_~z~0_125, ~weak$$choice2~0=v_~weak$$choice2~0_80, ~x$read_delayed~0=v_~x$read_delayed~0_8} AuxVars[] AssignedVars[~x$w_buff0~0, ULTIMATE.start_main_#t~nondet74, ~__unbuffered_p1_EAX$r_buff0_thd0~0, ~__unbuffered_p1_EAX$r_buff1_thd2~0, ~x$flush_delayed~0, #NULL.offset, ~x$r_buff1_thd1~0, ULTIMATE.start_main_~#t1966~0.base, ~x$r_buff0_thd3~0, ~weak$$choice1~0, ~__unbuffered_p1_EAX~0, ~__unbuffered_p1_EAX$w_buff0~0, ~__unbuffered_p1_EAX$read_delayed_var~0.base, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t1964~0.offset, ULTIMATE.start_main_~#t1964~0.base, ~x$r_buff0_thd0~0, ~__unbuffered_p1_EAX$r_buff0_thd1~0, ~#x~0.offset, ~x$w_buff1~0, ~__unbuffered_p1_EAX$r_buff1_thd3~0, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite79, ULTIMATE.start_main_~#t1965~0.offset, ULTIMATE.start_main_#t~ite77, ULTIMATE.start_main_#t~nondet83, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite82, ~__unbuffered_p1_EAX$w_buff1_used~0, ULTIMATE.start_main_#t~ite80, ~__unbuffered_p1_EAX$w_buff1~0, ULTIMATE.start_main_~#t1966~0.offset, ~__unbuffered_cnt~0, ~__unbuffered_p1_EAX$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet75, ~__unbuffered_p1_EAX$r_buff1_thd0~0, ~__unbuffered_p1_EAX$flush_delayed~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~nondet73, ~__unbuffered_p1_EAX$read_delayed~0, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite86, ~__unbuffered_p1_EAX$mem_tmp~0, ULTIMATE.start_main_~#t1965~0.base, ~y~0, ~__unbuffered_p1_EAX$r_buff0_thd3~0, ULTIMATE.start_main_#t~mem76, ~__unbuffered_p1_EAX$r_buff1_thd1~0, ~__unbuffered_p1_EAX$read_delayed_var~0.offset, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite78, #NULL.base, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite85, ~__unbuffered_p1_EAX$w_buff0_used~0, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite81, ULTIMATE.start_main_#res, #valid, #memory_int, ~#x~0.base, ULTIMATE.start_main_#t~mem84, ~z~0, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 18:25:04,375 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1200] [1200] L840-1-->L842: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t1965~0.base_11|)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1965~0.base_11| 4)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1965~0.base_11|) (= 0 |v_ULTIMATE.start_main_~#t1965~0.offset_9|) (= |v_#memory_int_154| (store |v_#memory_int_155| |v_ULTIMATE.start_main_~#t1965~0.base_11| (store (select |v_#memory_int_155| |v_ULTIMATE.start_main_~#t1965~0.base_11|) |v_ULTIMATE.start_main_~#t1965~0.offset_9| 1))) (= (store |v_#valid_39| |v_ULTIMATE.start_main_~#t1965~0.base_11| 1) |v_#valid_38|) (= (select |v_#valid_39| |v_ULTIMATE.start_main_~#t1965~0.base_11|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_155|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet73=|v_ULTIMATE.start_main_#t~nondet73_4|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_154|, ULTIMATE.start_main_~#t1965~0.base=|v_ULTIMATE.start_main_~#t1965~0.base_11|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1965~0.offset=|v_ULTIMATE.start_main_~#t1965~0.offset_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet73, #valid, #memory_int, ULTIMATE.start_main_~#t1965~0.base, #length, ULTIMATE.start_main_~#t1965~0.offset] because there is no mapped edge [2019-12-07 18:25:04,376 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1204] [1204] L842-1-->L844: Formula: (and (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t1966~0.base_11| 4)) (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1966~0.base_11|)) (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1966~0.base_11| 1)) (= 0 |v_ULTIMATE.start_main_~#t1966~0.offset_9|) (= |v_#memory_int_156| (store |v_#memory_int_157| |v_ULTIMATE.start_main_~#t1966~0.base_11| (store (select |v_#memory_int_157| |v_ULTIMATE.start_main_~#t1966~0.base_11|) |v_ULTIMATE.start_main_~#t1966~0.offset_9| 2))) (not (= |v_ULTIMATE.start_main_~#t1966~0.base_11| 0)) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t1966~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_157|, #length=|v_#length_20|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~nondet74=|v_ULTIMATE.start_main_#t~nondet74_3|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_156|, ULTIMATE.start_main_~#t1966~0.offset=|v_ULTIMATE.start_main_~#t1966~0.offset_9|, #length=|v_#length_19|, ULTIMATE.start_main_~#t1966~0.base=|v_ULTIMATE.start_main_~#t1966~0.base_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet74, #valid, #memory_int, ULTIMATE.start_main_~#t1966~0.offset, #length, ULTIMATE.start_main_~#t1966~0.base] because there is no mapped edge [2019-12-07 18:25:04,378 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1229] [1229] L781-->L781-14: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In519012562 256)))) (or (and (= (mod ~x$w_buff0_used~0_In519012562 256) 0) (= |P1Thread1of1ForFork0_#t~ite28_Out519012562| |P1Thread1of1ForFork0_#t~ite29_Out519012562|) .cse0 (= |P1Thread1of1ForFork0_#t~ite28_Out519012562| ~x$w_buff0~0_In519012562)) (and (not .cse0) (= ~x$w_buff0~0_In519012562 |P1Thread1of1ForFork0_#t~ite29_Out519012562|) (= |P1Thread1of1ForFork0_#t~ite28_In519012562| |P1Thread1of1ForFork0_#t~ite28_Out519012562|)))) InVars {~x$w_buff0~0=~x$w_buff0~0_In519012562, ~weak$$choice2~0=~weak$$choice2~0_In519012562, P1Thread1of1ForFork0_#t~ite28=|P1Thread1of1ForFork0_#t~ite28_In519012562|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In519012562} OutVars{~x$w_buff0~0=~x$w_buff0~0_In519012562, ~weak$$choice2~0=~weak$$choice2~0_In519012562, P1Thread1of1ForFork0_#t~ite28=|P1Thread1of1ForFork0_#t~ite28_Out519012562|, P1Thread1of1ForFork0_#t~ite29=|P1Thread1of1ForFork0_#t~ite29_Out519012562|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In519012562} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite28, P1Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 18:25:04,381 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1104] [1104] L785-->L786: Formula: (and (not (= (mod v_~weak$$choice2~0_27 256) 0)) (= v_~x$r_buff0_thd2~0_111 v_~x$r_buff0_thd2~0_110)) InVars {~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_111, ~weak$$choice2~0=v_~weak$$choice2~0_27} OutVars{P1Thread1of1ForFork0_#t~ite47=|v_P1Thread1of1ForFork0_#t~ite47_9|, P1Thread1of1ForFork0_#t~ite46=|v_P1Thread1of1ForFork0_#t~ite46_9|, P1Thread1of1ForFork0_#t~ite45=|v_P1Thread1of1ForFork0_#t~ite45_6|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_110, ~weak$$choice2~0=v_~weak$$choice2~0_27, P1Thread1of1ForFork0_#t~ite49=|v_P1Thread1of1ForFork0_#t~ite49_5|, P1Thread1of1ForFork0_#t~ite48=|v_P1Thread1of1ForFork0_#t~ite48_5|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite47, P1Thread1of1ForFork0_#t~ite46, P1Thread1of1ForFork0_#t~ite45, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite49, P1Thread1of1ForFork0_#t~ite48] because there is no mapped edge [2019-12-07 18:25:04,382 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1067] [1067] L790-->L797: Formula: (and (= 0 v_~x$flush_delayed~0_6) (= 1 v_~y~0_5) (= (store |v_#memory_int_40| |v_~#x~0.base_24| (store (select |v_#memory_int_40| |v_~#x~0.base_24|) |v_~#x~0.offset_24| v_~x$mem_tmp~0_4)) |v_#memory_int_39|) (not (= 0 (mod v_~x$flush_delayed~0_7 256)))) InVars {~#x~0.offset=|v_~#x~0.offset_24|, ~x$flush_delayed~0=v_~x$flush_delayed~0_7, #memory_int=|v_#memory_int_40|, ~#x~0.base=|v_~#x~0.base_24|, ~x$mem_tmp~0=v_~x$mem_tmp~0_4} OutVars{P1Thread1of1ForFork0_#t~mem57=|v_P1Thread1of1ForFork0_#t~mem57_3|, ~x$flush_delayed~0=v_~x$flush_delayed~0_6, ~#x~0.offset=|v_~#x~0.offset_24|, P1Thread1of1ForFork0_#t~ite58=|v_P1Thread1of1ForFork0_#t~ite58_5|, #memory_int=|v_#memory_int_39|, ~#x~0.base=|v_~#x~0.base_24|, ~x$mem_tmp~0=v_~x$mem_tmp~0_4, ~y~0=v_~y~0_5} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~mem57, ~x$flush_delayed~0, P1Thread1of1ForFork0_#t~ite58, #memory_int, ~y~0] because there is no mapped edge [2019-12-07 18:25:04,383 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1175] [1175] L817-2-->L817-5: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd3~0_In-1321658315 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In-1321658315 256) 0)) (.cse2 (= |P2Thread1of1ForFork1_#t~ite68_Out-1321658315| |P2Thread1of1ForFork1_#t~ite67_Out-1321658315|))) (or (and (or .cse0 .cse1) (= (select (select |#memory_int_In-1321658315| |~#x~0.base_In-1321658315|) |~#x~0.offset_In-1321658315|) |P2Thread1of1ForFork1_#t~mem66_Out-1321658315|) .cse2 (= |P2Thread1of1ForFork1_#t~mem66_Out-1321658315| |P2Thread1of1ForFork1_#t~ite67_Out-1321658315|)) (and (not .cse1) (not .cse0) (= |P2Thread1of1ForFork1_#t~mem66_In-1321658315| |P2Thread1of1ForFork1_#t~mem66_Out-1321658315|) .cse2 (= |P2Thread1of1ForFork1_#t~ite67_Out-1321658315| ~x$w_buff1~0_In-1321658315)))) InVars {~#x~0.offset=|~#x~0.offset_In-1321658315|, ~x$w_buff1~0=~x$w_buff1~0_In-1321658315, ~#x~0.base=|~#x~0.base_In-1321658315|, #memory_int=|#memory_int_In-1321658315|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1321658315, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1321658315, P2Thread1of1ForFork1_#t~mem66=|P2Thread1of1ForFork1_#t~mem66_In-1321658315|} OutVars{P2Thread1of1ForFork1_#t~ite68=|P2Thread1of1ForFork1_#t~ite68_Out-1321658315|, P2Thread1of1ForFork1_#t~ite67=|P2Thread1of1ForFork1_#t~ite67_Out-1321658315|, ~#x~0.offset=|~#x~0.offset_In-1321658315|, ~x$w_buff1~0=~x$w_buff1~0_In-1321658315, ~#x~0.base=|~#x~0.base_In-1321658315|, #memory_int=|#memory_int_In-1321658315|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1321658315, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1321658315, P2Thread1of1ForFork1_#t~mem66=|P2Thread1of1ForFork1_#t~mem66_Out-1321658315|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite68, P2Thread1of1ForFork1_#t~ite67, P2Thread1of1ForFork1_#t~mem66] because there is no mapped edge [2019-12-07 18:25:04,384 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1158] [1158] L797-2-->L797-5: Formula: (let ((.cse0 (= |P1Thread1of1ForFork0_#t~ite60_Out499854089| |P1Thread1of1ForFork0_#t~ite61_Out499854089|)) (.cse1 (= 0 (mod ~x$r_buff1_thd2~0_In499854089 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In499854089 256)))) (or (and .cse0 (not .cse1) (= |P1Thread1of1ForFork0_#t~ite60_Out499854089| ~x$w_buff1~0_In499854089) (not .cse2) (= |P1Thread1of1ForFork0_#t~mem59_In499854089| |P1Thread1of1ForFork0_#t~mem59_Out499854089|)) (and .cse0 (or .cse1 .cse2) (= |P1Thread1of1ForFork0_#t~mem59_Out499854089| (select (select |#memory_int_In499854089| |~#x~0.base_In499854089|) |~#x~0.offset_In499854089|)) (= |P1Thread1of1ForFork0_#t~mem59_Out499854089| |P1Thread1of1ForFork0_#t~ite60_Out499854089|)))) InVars {P1Thread1of1ForFork0_#t~mem59=|P1Thread1of1ForFork0_#t~mem59_In499854089|, ~#x~0.offset=|~#x~0.offset_In499854089|, ~x$w_buff1~0=~x$w_buff1~0_In499854089, ~#x~0.base=|~#x~0.base_In499854089|, #memory_int=|#memory_int_In499854089|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In499854089, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In499854089} OutVars{P1Thread1of1ForFork0_#t~mem59=|P1Thread1of1ForFork0_#t~mem59_Out499854089|, ~#x~0.offset=|~#x~0.offset_In499854089|, P1Thread1of1ForFork0_#t~ite60=|P1Thread1of1ForFork0_#t~ite60_Out499854089|, P1Thread1of1ForFork0_#t~ite61=|P1Thread1of1ForFork0_#t~ite61_Out499854089|, ~x$w_buff1~0=~x$w_buff1~0_In499854089, ~#x~0.base=|~#x~0.base_In499854089|, #memory_int=|#memory_int_In499854089|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In499854089, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In499854089} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~mem59, P1Thread1of1ForFork0_#t~ite60, P1Thread1of1ForFork0_#t~ite61] because there is no mapped edge [2019-12-07 18:25:04,384 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1097] [1097] P0ENTRY-->L4-3: Formula: (and (= v_~x$w_buff0~0_60 v_~x$w_buff1~0_46) (= |v_P0Thread1of1ForFork2_#in~arg.offset_17| v_P0Thread1of1ForFork2_~arg.offset_15) (= (ite (not (and (not (= (mod v_~x$w_buff1_used~0_134 256) 0)) (not (= (mod v_~x$w_buff0_used~0_224 256) 0)))) 1 0) |v_P0Thread1of1ForFork2___VERIFIER_assert_#in~expression_15|) (= v_~z~0_27 2) (= 1 v_~x$w_buff0~0_59) (= v_P0Thread1of1ForFork2___VERIFIER_assert_~expression_17 |v_P0Thread1of1ForFork2___VERIFIER_assert_#in~expression_15|) (= v_~x$w_buff0_used~0_225 v_~x$w_buff1_used~0_134) (= 1 v_~x$w_buff0_used~0_224) (not (= 0 v_P0Thread1of1ForFork2___VERIFIER_assert_~expression_17)) (= v_P0Thread1of1ForFork2_~arg.base_15 |v_P0Thread1of1ForFork2_#in~arg.base_17|)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_60, P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_17|, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_17|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_225} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_59, P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_17|, ~x$w_buff1~0=v_~x$w_buff1~0_46, P0Thread1of1ForFork2_~arg.offset=v_P0Thread1of1ForFork2_~arg.offset_15, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_134, P0Thread1of1ForFork2___VERIFIER_assert_~expression=v_P0Thread1of1ForFork2___VERIFIER_assert_~expression_17, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_17|, ~z~0=v_~z~0_27, P0Thread1of1ForFork2_~arg.base=v_P0Thread1of1ForFork2_~arg.base_15, P0Thread1of1ForFork2___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork2___VERIFIER_assert_#in~expression_15|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_224} AuxVars[] AssignedVars[~x$w_buff0~0, ~x$w_buff1~0, P0Thread1of1ForFork2_~arg.offset, ~x$w_buff1_used~0, P0Thread1of1ForFork2___VERIFIER_assert_~expression, ~z~0, P0Thread1of1ForFork2_~arg.base, P0Thread1of1ForFork2___VERIFIER_assert_#in~expression, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 18:25:04,384 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1163] [1163] L818-->L818-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In1981988761 256))) (.cse1 (= (mod ~x$r_buff0_thd3~0_In1981988761 256) 0))) (or (and (= 0 |P2Thread1of1ForFork1_#t~ite69_Out1981988761|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In1981988761 |P2Thread1of1ForFork1_#t~ite69_Out1981988761|)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1981988761, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1981988761} OutVars{P2Thread1of1ForFork1_#t~ite69=|P2Thread1of1ForFork1_#t~ite69_Out1981988761|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1981988761, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1981988761} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite69] because there is no mapped edge [2019-12-07 18:25:04,385 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1161] [1161] L819-->L819-2: Formula: (let ((.cse3 (= (mod ~x$r_buff0_thd3~0_In-1266283425 256) 0)) (.cse2 (= (mod ~x$w_buff0_used~0_In-1266283425 256) 0)) (.cse1 (= (mod ~x$r_buff1_thd3~0_In-1266283425 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In-1266283425 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork1_#t~ite70_Out-1266283425|)) (and (or .cse3 .cse2) (= ~x$w_buff1_used~0_In-1266283425 |P2Thread1of1ForFork1_#t~ite70_Out-1266283425|) (or .cse1 .cse0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1266283425, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1266283425, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1266283425, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1266283425} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-1266283425, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1266283425, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1266283425, P2Thread1of1ForFork1_#t~ite70=|P2Thread1of1ForFork1_#t~ite70_Out-1266283425|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1266283425} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite70] because there is no mapped edge [2019-12-07 18:25:04,385 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1168] [1168] L798-->L798-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In-659054413 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In-659054413 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork0_#t~ite62_Out-659054413| ~x$w_buff0_used~0_In-659054413)) (and (not .cse0) (= 0 |P1Thread1of1ForFork0_#t~ite62_Out-659054413|) (not .cse1)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-659054413, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-659054413} OutVars{P1Thread1of1ForFork0_#t~ite62=|P1Thread1of1ForFork0_#t~ite62_Out-659054413|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-659054413, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-659054413} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite62] because there is no mapped edge [2019-12-07 18:25:04,386 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1177] [1177] L820-->L820-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1403000816 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In-1403000816 256)))) (or (and (= 0 |P2Thread1of1ForFork1_#t~ite71_Out-1403000816|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~x$r_buff0_thd3~0_In-1403000816 |P2Thread1of1ForFork1_#t~ite71_Out-1403000816|)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1403000816, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1403000816} OutVars{P2Thread1of1ForFork1_#t~ite71=|P2Thread1of1ForFork1_#t~ite71_Out-1403000816|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1403000816, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1403000816} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite71] because there is no mapped edge [2019-12-07 18:25:04,387 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1164] [1164] L821-->L821-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd3~0_In1052812165 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In1052812165 256) 0)) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In1052812165 256))) (.cse2 (= (mod ~x$r_buff1_thd3~0_In1052812165 256) 0))) (or (and (= 0 |P2Thread1of1ForFork1_#t~ite72_Out1052812165|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~x$r_buff1_thd3~0_In1052812165 |P2Thread1of1ForFork1_#t~ite72_Out1052812165|) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1052812165, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1052812165, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1052812165, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1052812165} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1052812165, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1052812165, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1052812165, P2Thread1of1ForFork1_#t~ite72=|P2Thread1of1ForFork1_#t~ite72_Out1052812165|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1052812165} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite72] because there is no mapped edge [2019-12-07 18:25:04,387 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1228] [1228] L821-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= v_~__unbuffered_cnt~0_75 (+ v_~__unbuffered_cnt~0_76 1)) (= |v_P2Thread1of1ForFork1_#t~ite72_48| v_~x$r_buff1_thd3~0_197) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_76, P2Thread1of1ForFork1_#t~ite72=|v_P2Thread1of1ForFork1_#t~ite72_48|} OutVars{P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_197, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_75, P2Thread1of1ForFork1_#t~ite72=|v_P2Thread1of1ForFork1_#t~ite72_47|, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#res.base, ~x$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#t~ite72, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 18:25:04,387 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1166] [1166] L799-->L799-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff0_used~0_In1950970040 256))) (.cse3 (= 0 (mod ~x$r_buff0_thd2~0_In1950970040 256))) (.cse1 (= (mod ~x$w_buff1_used~0_In1950970040 256) 0)) (.cse0 (= (mod ~x$r_buff1_thd2~0_In1950970040 256) 0))) (or (and (= |P1Thread1of1ForFork0_#t~ite63_Out1950970040| ~x$w_buff1_used~0_In1950970040) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= |P1Thread1of1ForFork0_#t~ite63_Out1950970040| 0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1950970040, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1950970040, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1950970040, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1950970040} OutVars{P1Thread1of1ForFork0_#t~ite63=|P1Thread1of1ForFork0_#t~ite63_Out1950970040|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1950970040, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1950970040, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1950970040, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1950970040} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite63] because there is no mapped edge [2019-12-07 18:25:04,388 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1162] [1162] L800-->L800-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In1212841127 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1212841127 256)))) (or (and (= |P1Thread1of1ForFork0_#t~ite64_Out1212841127| ~x$r_buff0_thd2~0_In1212841127) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |P1Thread1of1ForFork0_#t~ite64_Out1212841127| 0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1212841127, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1212841127} OutVars{P1Thread1of1ForFork0_#t~ite64=|P1Thread1of1ForFork0_#t~ite64_Out1212841127|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1212841127, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1212841127} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite64] because there is no mapped edge [2019-12-07 18:25:04,388 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1159] [1159] L801-->L801-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff1_used~0_In-99045963 256))) (.cse3 (= (mod ~x$r_buff1_thd2~0_In-99045963 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In-99045963 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In-99045963 256) 0))) (or (and (or .cse0 .cse1) (= ~x$r_buff1_thd2~0_In-99045963 |P1Thread1of1ForFork0_#t~ite65_Out-99045963|) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= |P1Thread1of1ForFork0_#t~ite65_Out-99045963| 0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-99045963, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-99045963, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-99045963, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-99045963} OutVars{P1Thread1of1ForFork0_#t~ite65=|P1Thread1of1ForFork0_#t~ite65_Out-99045963|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-99045963, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-99045963, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-99045963, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-99045963} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite65] because there is no mapped edge [2019-12-07 18:25:04,388 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1211] [1211] L801-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= v_~x$r_buff1_thd2~0_329 |v_P1Thread1of1ForFork0_#t~ite65_28|) (= v_~__unbuffered_cnt~0_49 (+ v_~__unbuffered_cnt~0_50 1)) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|)) InVars {P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_50} OutVars{P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_27|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_329, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite65, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 18:25:04,390 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1165] [1165] L762-->L762-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1679605578 256))) (.cse1 (= (mod ~x$r_buff0_thd1~0_In-1679605578 256) 0))) (or (and (= ~x$w_buff0_used~0_In-1679605578 |P0Thread1of1ForFork2_#t~ite6_Out-1679605578|) (or .cse0 .cse1)) (and (= |P0Thread1of1ForFork2_#t~ite6_Out-1679605578| 0) (not .cse0) (not .cse1)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1679605578, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1679605578} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1679605578, P0Thread1of1ForFork2_#t~ite6=|P0Thread1of1ForFork2_#t~ite6_Out-1679605578|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1679605578} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 18:25:04,390 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1167] [1167] L763-->L763-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff0_thd1~0_In-524588296 256))) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In-524588296 256))) (.cse1 (= (mod ~x$w_buff1_used~0_In-524588296 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd1~0_In-524588296 256)))) (or (and (= ~x$w_buff1_used~0_In-524588296 |P0Thread1of1ForFork2_#t~ite7_Out-524588296|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P0Thread1of1ForFork2_#t~ite7_Out-524588296|) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-524588296, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-524588296, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-524588296, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-524588296} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-524588296, P0Thread1of1ForFork2_#t~ite7=|P0Thread1of1ForFork2_#t~ite7_Out-524588296|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-524588296, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-524588296, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-524588296} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 18:25:04,391 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1176] [1176] L764-->L765: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In-890182027 256) 0)) (.cse2 (= ~x$r_buff0_thd1~0_Out-890182027 ~x$r_buff0_thd1~0_In-890182027)) (.cse1 (= (mod ~x$r_buff0_thd1~0_In-890182027 256) 0))) (or (and (not .cse0) (not .cse1) (= ~x$r_buff0_thd1~0_Out-890182027 0)) (and .cse0 .cse2) (and .cse2 .cse1))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-890182027, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-890182027} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_Out-890182027, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_Out-890182027|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-890182027} AuxVars[] AssignedVars[~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 18:25:04,391 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1172] [1172] L765-->L765-2: Formula: (let ((.cse3 (= 0 (mod ~x$w_buff1_used~0_In577992335 256))) (.cse2 (= 0 (mod ~x$r_buff1_thd1~0_In577992335 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In577992335 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd1~0_In577992335 256) 0))) (or (and (= 0 |P0Thread1of1ForFork2_#t~ite9_Out577992335|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= ~x$r_buff1_thd1~0_In577992335 |P0Thread1of1ForFork2_#t~ite9_Out577992335|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In577992335, ~x$w_buff1_used~0=~x$w_buff1_used~0_In577992335, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In577992335, ~x$w_buff0_used~0=~x$w_buff0_used~0_In577992335} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In577992335, ~x$w_buff1_used~0=~x$w_buff1_used~0_In577992335, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In577992335, P0Thread1of1ForFork2_#t~ite9=|P0Thread1of1ForFork2_#t~ite9_Out577992335|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In577992335} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 18:25:04,391 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1225] [1225] L765-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork2_#t~ite9_30| v_~x$r_buff1_thd1~0_174) (= (+ v_~__unbuffered_cnt~0_70 1) v_~__unbuffered_cnt~0_69) (= |v_P0Thread1of1ForFork2_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork2_#res.base_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P0Thread1of1ForFork2_#t~ite9=|v_P0Thread1of1ForFork2_#t~ite9_30|} OutVars{P0Thread1of1ForFork2_#res.offset=|v_P0Thread1of1ForFork2_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_174, P0Thread1of1ForFork2_#t~ite9=|v_P0Thread1of1ForFork2_#t~ite9_29|, P0Thread1of1ForFork2_#res.base=|v_P0Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork2_#t~ite9, P0Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 18:25:04,392 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1147] [1147] L848-->L850-2: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (or (= 0 (mod v_~x$r_buff0_thd0~0_50 256)) (= 0 (mod v_~x$w_buff0_used~0_403 256)))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_50, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_403} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_50, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_403} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 18:25:04,392 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1179] [1179] L850-2-->L850-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite78_Out-1542067963| |ULTIMATE.start_main_#t~ite77_Out-1542067963|)) (.cse2 (= (mod ~x$w_buff1_used~0_In-1542067963 256) 0)) (.cse1 (= (mod ~x$r_buff1_thd0~0_In-1542067963 256) 0))) (or (and .cse0 (not .cse1) (not .cse2) (= |ULTIMATE.start_main_#t~mem76_In-1542067963| |ULTIMATE.start_main_#t~mem76_Out-1542067963|) (= ~x$w_buff1~0_In-1542067963 |ULTIMATE.start_main_#t~ite77_Out-1542067963|)) (and .cse0 (= |ULTIMATE.start_main_#t~mem76_Out-1542067963| |ULTIMATE.start_main_#t~ite77_Out-1542067963|) (or .cse2 .cse1) (= (select (select |#memory_int_In-1542067963| |~#x~0.base_In-1542067963|) |~#x~0.offset_In-1542067963|) |ULTIMATE.start_main_#t~mem76_Out-1542067963|)))) InVars {ULTIMATE.start_main_#t~mem76=|ULTIMATE.start_main_#t~mem76_In-1542067963|, ~#x~0.offset=|~#x~0.offset_In-1542067963|, ~x$w_buff1~0=~x$w_buff1~0_In-1542067963, ~#x~0.base=|~#x~0.base_In-1542067963|, #memory_int=|#memory_int_In-1542067963|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1542067963, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1542067963} OutVars{ULTIMATE.start_main_#t~mem76=|ULTIMATE.start_main_#t~mem76_Out-1542067963|, ~#x~0.offset=|~#x~0.offset_In-1542067963|, ~x$w_buff1~0=~x$w_buff1~0_In-1542067963, ~#x~0.base=|~#x~0.base_In-1542067963|, #memory_int=|#memory_int_In-1542067963|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1542067963, ULTIMATE.start_main_#t~ite77=|ULTIMATE.start_main_#t~ite77_Out-1542067963|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1542067963, ULTIMATE.start_main_#t~ite78=|ULTIMATE.start_main_#t~ite78_Out-1542067963|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem76, ULTIMATE.start_main_#t~ite77, ULTIMATE.start_main_#t~ite78] because there is no mapped edge [2019-12-07 18:25:04,393 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1155] [1155] L851-->L851-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-2117412486 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-2117412486 256)))) (or (and (= ~x$w_buff0_used~0_In-2117412486 |ULTIMATE.start_main_#t~ite79_Out-2117412486|) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite79_Out-2117412486|) (not .cse0) (not .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-2117412486, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2117412486} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-2117412486, ULTIMATE.start_main_#t~ite79=|ULTIMATE.start_main_#t~ite79_Out-2117412486|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2117412486} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite79] because there is no mapped edge [2019-12-07 18:25:04,393 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1180] [1180] L852-->L852-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-91526923 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-91526923 256))) (.cse3 (= (mod ~x$w_buff1_used~0_In-91526923 256) 0)) (.cse2 (= (mod ~x$r_buff1_thd0~0_In-91526923 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite80_Out-91526923| ~x$w_buff1_used~0_In-91526923)) (and (= |ULTIMATE.start_main_#t~ite80_Out-91526923| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-91526923, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-91526923, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-91526923, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-91526923} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-91526923, ULTIMATE.start_main_#t~ite80=|ULTIMATE.start_main_#t~ite80_Out-91526923|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-91526923, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-91526923, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-91526923} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite80] because there is no mapped edge [2019-12-07 18:25:04,394 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1169] [1169] L853-->L853-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In-1890655386 256) 0)) (.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In-1890655386 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite81_Out-1890655386|) (not .cse0) (not .cse1)) (and (= ~x$r_buff0_thd0~0_In-1890655386 |ULTIMATE.start_main_#t~ite81_Out-1890655386|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1890655386, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1890655386} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1890655386, ULTIMATE.start_main_#t~ite81=|ULTIMATE.start_main_#t~ite81_Out-1890655386|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1890655386} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite81] because there is no mapped edge [2019-12-07 18:25:04,394 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1154] [1154] L854-->L854-2: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In-1501937698 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In-1501937698 256))) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In-1501937698 256))) (.cse3 (= (mod ~x$r_buff0_thd0~0_In-1501937698 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite82_Out-1501937698|)) (and (= |ULTIMATE.start_main_#t~ite82_Out-1501937698| ~x$r_buff1_thd0~0_In-1501937698) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1501937698, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1501937698, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1501937698, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1501937698} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1501937698, ULTIMATE.start_main_#t~ite82=|ULTIMATE.start_main_#t~ite82_Out-1501937698|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1501937698, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1501937698, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1501937698} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite82] because there is no mapped edge [2019-12-07 18:25:04,395 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1152] [1152] L858-->L858-3: Formula: (let ((.cse0 (not (= 0 (mod ~__unbuffered_p1_EAX$read_delayed~0_In2055131799 256)))) (.cse1 (= 0 (mod ~weak$$choice1~0_In2055131799 256)))) (or (and (= |ULTIMATE.start_main_#t~mem84_In2055131799| |ULTIMATE.start_main_#t~mem84_Out2055131799|) .cse0 .cse1 (= ~__unbuffered_p1_EAX~0_In2055131799 |ULTIMATE.start_main_#t~ite85_Out2055131799|)) (and (= |ULTIMATE.start_main_#t~mem84_Out2055131799| (select (select |#memory_int_In2055131799| ~__unbuffered_p1_EAX$read_delayed_var~0.base_In2055131799) ~__unbuffered_p1_EAX$read_delayed_var~0.offset_In2055131799)) .cse0 (not .cse1) (= |ULTIMATE.start_main_#t~mem84_Out2055131799| |ULTIMATE.start_main_#t~ite85_Out2055131799|)))) InVars {~weak$$choice1~0=~weak$$choice1~0_In2055131799, ~__unbuffered_p1_EAX~0=~__unbuffered_p1_EAX~0_In2055131799, ~__unbuffered_p1_EAX$read_delayed~0=~__unbuffered_p1_EAX$read_delayed~0_In2055131799, ~__unbuffered_p1_EAX$read_delayed_var~0.base=~__unbuffered_p1_EAX$read_delayed_var~0.base_In2055131799, #memory_int=|#memory_int_In2055131799|, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=~__unbuffered_p1_EAX$read_delayed_var~0.offset_In2055131799, ULTIMATE.start_main_#t~mem84=|ULTIMATE.start_main_#t~mem84_In2055131799|} OutVars{ULTIMATE.start_main_#t~ite85=|ULTIMATE.start_main_#t~ite85_Out2055131799|, ~weak$$choice1~0=~weak$$choice1~0_In2055131799, ~__unbuffered_p1_EAX~0=~__unbuffered_p1_EAX~0_In2055131799, ~__unbuffered_p1_EAX$read_delayed~0=~__unbuffered_p1_EAX$read_delayed~0_In2055131799, ~__unbuffered_p1_EAX$read_delayed_var~0.base=~__unbuffered_p1_EAX$read_delayed_var~0.base_In2055131799, #memory_int=|#memory_int_In2055131799|, ULTIMATE.start_main_#t~mem84=|ULTIMATE.start_main_#t~mem84_Out2055131799|, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=~__unbuffered_p1_EAX$read_delayed_var~0.offset_In2055131799} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite85, ULTIMATE.start_main_#t~mem84] because there is no mapped edge [2019-12-07 18:25:04,395 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1209] [1209] L858-3-->L4: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8| (mod v_~main$tmp_guard1~0_11 256)) (let ((.cse3 (= 1 v_~__unbuffered_p2_EAX~0_17)) (.cse0 (= v_~z~0_57 2)) (.cse4 (= 1 v_~__unbuffered_p1_EAX~0_33)) (.cse1 (= |v_ULTIMATE.start_main_#t~ite85_21| v_~__unbuffered_p1_EAX~0_33)) (.cse2 (= v_~main$tmp_guard1~0_11 1))) (or (and (not .cse0) .cse1 .cse2) (and .cse1 .cse2 (not .cse3)) (and .cse3 .cse0 .cse4 .cse1 (= v_~main$tmp_guard1~0_11 0)) (and (not .cse4) .cse1 .cse2)))) InVars {ULTIMATE.start_main_#t~ite85=|v_ULTIMATE.start_main_#t~ite85_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_17, ~z~0=v_~z~0_57} OutVars{ULTIMATE.start_main_#t~ite85=|v_ULTIMATE.start_main_#t~ite85_20|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_33, ULTIMATE.start_main_#t~mem84=|v_ULTIMATE.start_main_#t~mem84_16|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_11, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_17, ~z~0=v_~z~0_57, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|, ULTIMATE.start_main_#t~ite86=|v_ULTIMATE.start_main_#t~ite86_23|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite85, ULTIMATE.start___VERIFIER_assert_~expression, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_#t~mem84, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression, ULTIMATE.start_main_#t~ite86] because there is no mapped edge [2019-12-07 18:25:04,395 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1194] [1194] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 18:25:04,458 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 06:25:04 BasicIcfg [2019-12-07 18:25:04,458 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 18:25:04,459 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 18:25:04,459 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 18:25:04,459 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 18:25:04,459 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:20:38" (3/4) ... [2019-12-07 18:25:04,461 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 18:25:04,461 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1261] [1261] ULTIMATE.startENTRY-->L840: Formula: (let ((.cse1 (store |v_#valid_66| 0 0))) (let ((.cse0 (store .cse1 |v_~#x~0.base_152| 1))) (and (= 0 v_~x$w_buff1~0_233) (= v_~__unbuffered_p1_EAX$r_buff1_thd2~0_7 0) (= 0 v_~weak$$choice0~0_156) (= 0 v_~x$r_buff1_thd3~0_230) (= (store .cse0 |v_ULTIMATE.start_main_~#t1964~0.base_24| 1) |v_#valid_64|) (= v_~__unbuffered_p1_EAX$r_buff0_thd3~0_5 0) (= |v_#length_30| (store (store |v_#length_31| |v_~#x~0.base_152| 4) |v_ULTIMATE.start_main_~#t1964~0.base_24| 4)) (= v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_46 0) (= v_~x$r_buff0_thd0~0_121 0) (= 0 v_~weak$$choice1~0_85) (= v_~__unbuffered_p1_EAX$r_buff1_thd3~0_8 0) (= |v_#memory_int_278| (store |v_#memory_int_279| |v_ULTIMATE.start_main_~#t1964~0.base_24| (store (select |v_#memory_int_279| |v_ULTIMATE.start_main_~#t1964~0.base_24|) |v_ULTIMATE.start_main_~#t1964~0.offset_19| 0))) (= 0 v_~x$r_buff0_thd2~0_544) (= v_~__unbuffered_p1_EAX$read_delayed~0_56 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t1964~0.base_24|)) (< |v_#StackHeapBarrier_19| |v_ULTIMATE.start_main_~#t1964~0.base_24|) (= 0 v_~x$read_delayed~0_8) (= v_~x$flush_delayed~0_31 0) (= 0 v_~x$read_delayed_var~0.offset_8) (= v_~__unbuffered_p1_EAX$w_buff1_used~0_8 0) (= v_~__unbuffered_p1_EAX$read_delayed_var~0.base_46 0) (= v_~__unbuffered_p1_EAX$r_buff1_thd0~0_8 0) (= v_~__unbuffered_cnt~0_122 0) (= v_~main$tmp_guard1~0_23 0) (= v_~x$r_buff1_thd0~0_248 0) (= v_~__unbuffered_p1_EAX$w_buff0~0_8 0) (= 0 v_~x$w_buff0~0_313) (= v_~main$tmp_guard0~0_32 0) (= v_~x$w_buff0_used~0_1098 0) (= v_~y~0_37 0) (= 0 |v_#NULL.base_5|) (= v_~__unbuffered_p1_EAX$r_buff0_thd1~0_8 0) (= (select .cse1 |v_~#x~0.base_152|) 0) (= 0 v_~weak$$choice2~0_80) (= (select (select |v_#memory_int_279| |v_~#x~0.base_152|) |v_~#x~0.offset_152|) 0) (= v_~__unbuffered_p1_EAX$r_buff0_thd0~0_7 0) (= v_~__unbuffered_p1_EAX$w_buff1~0_8 0) (= 0 |v_ULTIMATE.start_main_~#t1964~0.offset_19|) (< 0 |v_#StackHeapBarrier_19|) (= v_~__unbuffered_p1_EAX$r_buff0_thd2~0_8 0) (= v_~__unbuffered_p1_EAX$flush_delayed~0_8 0) (= 0 v_~x$read_delayed_var~0.base_8) (< |v_#StackHeapBarrier_19| |v_~#x~0.base_152|) (= v_~z~0_125 0) (= 0 v_~x$r_buff1_thd2~0_577) (= v_~__unbuffered_p1_EAX$r_buff1_thd1~0_8 0) (= 0 |v_~#x~0.offset_152|) (= 0 v_~__unbuffered_p1_EAX~0_67) (= v_~x$r_buff1_thd1~0_213 0) (= v_~__unbuffered_p1_EAX$w_buff0_used~0_7 0) (= v_~x$mem_tmp~0_18 0) (= |v_#NULL.offset_5| 0) (= 0 v_~x$w_buff1_used~0_667) (= 0 v_~x$r_buff0_thd3~0_135) (= v_~x$r_buff0_thd1~0_267 0) (= 0 v_~__unbuffered_p2_EAX~0_38) (= 0 v_~__unbuffered_p1_EAX$mem_tmp~0_8)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_19|, #valid=|v_#valid_66|, #memory_int=|v_#memory_int_279|, #length=|v_#length_31|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_313, ULTIMATE.start_main_#t~nondet74=|v_ULTIMATE.start_main_#t~nondet74_9|, ~__unbuffered_p1_EAX$r_buff0_thd0~0=v_~__unbuffered_p1_EAX$r_buff0_thd0~0_7, ~__unbuffered_p1_EAX$r_buff1_thd2~0=v_~__unbuffered_p1_EAX$r_buff1_thd2~0_7, ~x$flush_delayed~0=v_~x$flush_delayed~0_31, #NULL.offset=|v_#NULL.offset_5|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_213, ULTIMATE.start_main_~#t1966~0.base=|v_ULTIMATE.start_main_~#t1966~0.base_21|, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_135, ~weak$$choice1~0=v_~weak$$choice1~0_85, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_67, ~__unbuffered_p1_EAX$w_buff0~0=v_~__unbuffered_p1_EAX$w_buff0~0_8, ~__unbuffered_p1_EAX$read_delayed_var~0.base=v_~__unbuffered_p1_EAX$read_delayed_var~0.base_46, #length=|v_#length_30|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_38, ULTIMATE.start_main_~#t1964~0.offset=|v_ULTIMATE.start_main_~#t1964~0.offset_19|, ULTIMATE.start_main_~#t1964~0.base=|v_ULTIMATE.start_main_~#t1964~0.base_24|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_121, ~__unbuffered_p1_EAX$r_buff0_thd1~0=v_~__unbuffered_p1_EAX$r_buff0_thd1~0_8, ~#x~0.offset=|v_~#x~0.offset_152|, ~x$w_buff1~0=v_~x$w_buff1~0_233, ~__unbuffered_p1_EAX$r_buff1_thd3~0=v_~__unbuffered_p1_EAX$r_buff1_thd3~0_8, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_667, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_577, ULTIMATE.start_main_#t~ite79=|v_ULTIMATE.start_main_#t~ite79_73|, ULTIMATE.start_main_~#t1965~0.offset=|v_ULTIMATE.start_main_~#t1965~0.offset_17|, ULTIMATE.start_main_#t~ite77=|v_ULTIMATE.start_main_#t~ite77_29|, ULTIMATE.start_main_#t~nondet83=|v_ULTIMATE.start_main_#t~nondet83_91|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_8, ~weak$$choice0~0=v_~weak$$choice0~0_156, #StackHeapBarrier=|v_#StackHeapBarrier_19|, ULTIMATE.start_main_#t~ite82=|v_ULTIMATE.start_main_#t~ite82_105|, ~__unbuffered_p1_EAX$w_buff1_used~0=v_~__unbuffered_p1_EAX$w_buff1_used~0_8, ULTIMATE.start_main_#t~ite80=|v_ULTIMATE.start_main_#t~ite80_83|, ~__unbuffered_p1_EAX$w_buff1~0=v_~__unbuffered_p1_EAX$w_buff1~0_8, ULTIMATE.start_main_~#t1966~0.offset=|v_ULTIMATE.start_main_~#t1966~0.offset_17|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_122, ~__unbuffered_p1_EAX$r_buff0_thd2~0=v_~__unbuffered_p1_EAX$r_buff0_thd2~0_8, ULTIMATE.start_main_#t~nondet75=|v_ULTIMATE.start_main_#t~nondet75_20|, ~__unbuffered_p1_EAX$r_buff1_thd0~0=v_~__unbuffered_p1_EAX$r_buff1_thd0~0_8, ~__unbuffered_p1_EAX$flush_delayed~0=v_~__unbuffered_p1_EAX$flush_delayed~0_8, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_267, ULTIMATE.start_main_#t~nondet73=|v_ULTIMATE.start_main_#t~nondet73_10|, ~__unbuffered_p1_EAX$read_delayed~0=v_~__unbuffered_p1_EAX$read_delayed~0_56, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_230, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~x$mem_tmp~0=v_~x$mem_tmp~0_18, ULTIMATE.start_main_#t~ite86=|v_ULTIMATE.start_main_#t~ite86_47|, ~__unbuffered_p1_EAX$mem_tmp~0=v_~__unbuffered_p1_EAX$mem_tmp~0_8, ULTIMATE.start_main_~#t1965~0.base=|v_ULTIMATE.start_main_~#t1965~0.base_23|, ~y~0=v_~y~0_37, ~__unbuffered_p1_EAX$r_buff0_thd3~0=v_~__unbuffered_p1_EAX$r_buff0_thd3~0_5, ULTIMATE.start_main_#t~mem76=|v_ULTIMATE.start_main_#t~mem76_28|, ~__unbuffered_p1_EAX$r_buff1_thd1~0=v_~__unbuffered_p1_EAX$r_buff1_thd1~0_8, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_46, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_32, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_248, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_544, ULTIMATE.start_main_#t~ite78=|v_ULTIMATE.start_main_#t~ite78_28|, #NULL.base=|v_#NULL.base_5|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_1098, ULTIMATE.start_main_#t~ite85=|v_ULTIMATE.start_main_#t~ite85_40|, ~__unbuffered_p1_EAX$w_buff0_used~0=v_~__unbuffered_p1_EAX$w_buff0_used~0_7, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_8, ULTIMATE.start_main_#t~ite81=|v_ULTIMATE.start_main_#t~ite81_27|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_278|, ~#x~0.base=|v_~#x~0.base_152|, ULTIMATE.start_main_#t~mem84=|v_ULTIMATE.start_main_#t~mem84_37|, ~z~0=v_~z~0_125, ~weak$$choice2~0=v_~weak$$choice2~0_80, ~x$read_delayed~0=v_~x$read_delayed~0_8} AuxVars[] AssignedVars[~x$w_buff0~0, ULTIMATE.start_main_#t~nondet74, ~__unbuffered_p1_EAX$r_buff0_thd0~0, ~__unbuffered_p1_EAX$r_buff1_thd2~0, ~x$flush_delayed~0, #NULL.offset, ~x$r_buff1_thd1~0, ULTIMATE.start_main_~#t1966~0.base, ~x$r_buff0_thd3~0, ~weak$$choice1~0, ~__unbuffered_p1_EAX~0, ~__unbuffered_p1_EAX$w_buff0~0, ~__unbuffered_p1_EAX$read_delayed_var~0.base, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t1964~0.offset, ULTIMATE.start_main_~#t1964~0.base, ~x$r_buff0_thd0~0, ~__unbuffered_p1_EAX$r_buff0_thd1~0, ~#x~0.offset, ~x$w_buff1~0, ~__unbuffered_p1_EAX$r_buff1_thd3~0, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite79, ULTIMATE.start_main_~#t1965~0.offset, ULTIMATE.start_main_#t~ite77, ULTIMATE.start_main_#t~nondet83, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite82, ~__unbuffered_p1_EAX$w_buff1_used~0, ULTIMATE.start_main_#t~ite80, ~__unbuffered_p1_EAX$w_buff1~0, ULTIMATE.start_main_~#t1966~0.offset, ~__unbuffered_cnt~0, ~__unbuffered_p1_EAX$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet75, ~__unbuffered_p1_EAX$r_buff1_thd0~0, ~__unbuffered_p1_EAX$flush_delayed~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~nondet73, ~__unbuffered_p1_EAX$read_delayed~0, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite86, ~__unbuffered_p1_EAX$mem_tmp~0, ULTIMATE.start_main_~#t1965~0.base, ~y~0, ~__unbuffered_p1_EAX$r_buff0_thd3~0, ULTIMATE.start_main_#t~mem76, ~__unbuffered_p1_EAX$r_buff1_thd1~0, ~__unbuffered_p1_EAX$read_delayed_var~0.offset, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite78, #NULL.base, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite85, ~__unbuffered_p1_EAX$w_buff0_used~0, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite81, ULTIMATE.start_main_#res, #valid, #memory_int, ~#x~0.base, ULTIMATE.start_main_#t~mem84, ~z~0, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 18:25:04,462 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1200] [1200] L840-1-->L842: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t1965~0.base_11|)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t1965~0.base_11| 4)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t1965~0.base_11|) (= 0 |v_ULTIMATE.start_main_~#t1965~0.offset_9|) (= |v_#memory_int_154| (store |v_#memory_int_155| |v_ULTIMATE.start_main_~#t1965~0.base_11| (store (select |v_#memory_int_155| |v_ULTIMATE.start_main_~#t1965~0.base_11|) |v_ULTIMATE.start_main_~#t1965~0.offset_9| 1))) (= (store |v_#valid_39| |v_ULTIMATE.start_main_~#t1965~0.base_11| 1) |v_#valid_38|) (= (select |v_#valid_39| |v_ULTIMATE.start_main_~#t1965~0.base_11|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_155|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet73=|v_ULTIMATE.start_main_#t~nondet73_4|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_154|, ULTIMATE.start_main_~#t1965~0.base=|v_ULTIMATE.start_main_~#t1965~0.base_11|, #length=|v_#length_17|, ULTIMATE.start_main_~#t1965~0.offset=|v_ULTIMATE.start_main_~#t1965~0.offset_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet73, #valid, #memory_int, ULTIMATE.start_main_~#t1965~0.base, #length, ULTIMATE.start_main_~#t1965~0.offset] because there is no mapped edge [2019-12-07 18:25:04,462 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1204] [1204] L842-1-->L844: Formula: (and (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t1966~0.base_11| 4)) (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t1966~0.base_11|)) (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t1966~0.base_11| 1)) (= 0 |v_ULTIMATE.start_main_~#t1966~0.offset_9|) (= |v_#memory_int_156| (store |v_#memory_int_157| |v_ULTIMATE.start_main_~#t1966~0.base_11| (store (select |v_#memory_int_157| |v_ULTIMATE.start_main_~#t1966~0.base_11|) |v_ULTIMATE.start_main_~#t1966~0.offset_9| 2))) (not (= |v_ULTIMATE.start_main_~#t1966~0.base_11| 0)) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t1966~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_157|, #length=|v_#length_20|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~nondet74=|v_ULTIMATE.start_main_#t~nondet74_3|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_156|, ULTIMATE.start_main_~#t1966~0.offset=|v_ULTIMATE.start_main_~#t1966~0.offset_9|, #length=|v_#length_19|, ULTIMATE.start_main_~#t1966~0.base=|v_ULTIMATE.start_main_~#t1966~0.base_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet74, #valid, #memory_int, ULTIMATE.start_main_~#t1966~0.offset, #length, ULTIMATE.start_main_~#t1966~0.base] because there is no mapped edge [2019-12-07 18:25:04,464 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1229] [1229] L781-->L781-14: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In519012562 256)))) (or (and (= (mod ~x$w_buff0_used~0_In519012562 256) 0) (= |P1Thread1of1ForFork0_#t~ite28_Out519012562| |P1Thread1of1ForFork0_#t~ite29_Out519012562|) .cse0 (= |P1Thread1of1ForFork0_#t~ite28_Out519012562| ~x$w_buff0~0_In519012562)) (and (not .cse0) (= ~x$w_buff0~0_In519012562 |P1Thread1of1ForFork0_#t~ite29_Out519012562|) (= |P1Thread1of1ForFork0_#t~ite28_In519012562| |P1Thread1of1ForFork0_#t~ite28_Out519012562|)))) InVars {~x$w_buff0~0=~x$w_buff0~0_In519012562, ~weak$$choice2~0=~weak$$choice2~0_In519012562, P1Thread1of1ForFork0_#t~ite28=|P1Thread1of1ForFork0_#t~ite28_In519012562|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In519012562} OutVars{~x$w_buff0~0=~x$w_buff0~0_In519012562, ~weak$$choice2~0=~weak$$choice2~0_In519012562, P1Thread1of1ForFork0_#t~ite28=|P1Thread1of1ForFork0_#t~ite28_Out519012562|, P1Thread1of1ForFork0_#t~ite29=|P1Thread1of1ForFork0_#t~ite29_Out519012562|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In519012562} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite28, P1Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 18:25:04,467 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1104] [1104] L785-->L786: Formula: (and (not (= (mod v_~weak$$choice2~0_27 256) 0)) (= v_~x$r_buff0_thd2~0_111 v_~x$r_buff0_thd2~0_110)) InVars {~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_111, ~weak$$choice2~0=v_~weak$$choice2~0_27} OutVars{P1Thread1of1ForFork0_#t~ite47=|v_P1Thread1of1ForFork0_#t~ite47_9|, P1Thread1of1ForFork0_#t~ite46=|v_P1Thread1of1ForFork0_#t~ite46_9|, P1Thread1of1ForFork0_#t~ite45=|v_P1Thread1of1ForFork0_#t~ite45_6|, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_110, ~weak$$choice2~0=v_~weak$$choice2~0_27, P1Thread1of1ForFork0_#t~ite49=|v_P1Thread1of1ForFork0_#t~ite49_5|, P1Thread1of1ForFork0_#t~ite48=|v_P1Thread1of1ForFork0_#t~ite48_5|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite47, P1Thread1of1ForFork0_#t~ite46, P1Thread1of1ForFork0_#t~ite45, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite49, P1Thread1of1ForFork0_#t~ite48] because there is no mapped edge [2019-12-07 18:25:04,468 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1067] [1067] L790-->L797: Formula: (and (= 0 v_~x$flush_delayed~0_6) (= 1 v_~y~0_5) (= (store |v_#memory_int_40| |v_~#x~0.base_24| (store (select |v_#memory_int_40| |v_~#x~0.base_24|) |v_~#x~0.offset_24| v_~x$mem_tmp~0_4)) |v_#memory_int_39|) (not (= 0 (mod v_~x$flush_delayed~0_7 256)))) InVars {~#x~0.offset=|v_~#x~0.offset_24|, ~x$flush_delayed~0=v_~x$flush_delayed~0_7, #memory_int=|v_#memory_int_40|, ~#x~0.base=|v_~#x~0.base_24|, ~x$mem_tmp~0=v_~x$mem_tmp~0_4} OutVars{P1Thread1of1ForFork0_#t~mem57=|v_P1Thread1of1ForFork0_#t~mem57_3|, ~x$flush_delayed~0=v_~x$flush_delayed~0_6, ~#x~0.offset=|v_~#x~0.offset_24|, P1Thread1of1ForFork0_#t~ite58=|v_P1Thread1of1ForFork0_#t~ite58_5|, #memory_int=|v_#memory_int_39|, ~#x~0.base=|v_~#x~0.base_24|, ~x$mem_tmp~0=v_~x$mem_tmp~0_4, ~y~0=v_~y~0_5} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~mem57, ~x$flush_delayed~0, P1Thread1of1ForFork0_#t~ite58, #memory_int, ~y~0] because there is no mapped edge [2019-12-07 18:25:04,469 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1175] [1175] L817-2-->L817-5: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd3~0_In-1321658315 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In-1321658315 256) 0)) (.cse2 (= |P2Thread1of1ForFork1_#t~ite68_Out-1321658315| |P2Thread1of1ForFork1_#t~ite67_Out-1321658315|))) (or (and (or .cse0 .cse1) (= (select (select |#memory_int_In-1321658315| |~#x~0.base_In-1321658315|) |~#x~0.offset_In-1321658315|) |P2Thread1of1ForFork1_#t~mem66_Out-1321658315|) .cse2 (= |P2Thread1of1ForFork1_#t~mem66_Out-1321658315| |P2Thread1of1ForFork1_#t~ite67_Out-1321658315|)) (and (not .cse1) (not .cse0) (= |P2Thread1of1ForFork1_#t~mem66_In-1321658315| |P2Thread1of1ForFork1_#t~mem66_Out-1321658315|) .cse2 (= |P2Thread1of1ForFork1_#t~ite67_Out-1321658315| ~x$w_buff1~0_In-1321658315)))) InVars {~#x~0.offset=|~#x~0.offset_In-1321658315|, ~x$w_buff1~0=~x$w_buff1~0_In-1321658315, ~#x~0.base=|~#x~0.base_In-1321658315|, #memory_int=|#memory_int_In-1321658315|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1321658315, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1321658315, P2Thread1of1ForFork1_#t~mem66=|P2Thread1of1ForFork1_#t~mem66_In-1321658315|} OutVars{P2Thread1of1ForFork1_#t~ite68=|P2Thread1of1ForFork1_#t~ite68_Out-1321658315|, P2Thread1of1ForFork1_#t~ite67=|P2Thread1of1ForFork1_#t~ite67_Out-1321658315|, ~#x~0.offset=|~#x~0.offset_In-1321658315|, ~x$w_buff1~0=~x$w_buff1~0_In-1321658315, ~#x~0.base=|~#x~0.base_In-1321658315|, #memory_int=|#memory_int_In-1321658315|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1321658315, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1321658315, P2Thread1of1ForFork1_#t~mem66=|P2Thread1of1ForFork1_#t~mem66_Out-1321658315|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite68, P2Thread1of1ForFork1_#t~ite67, P2Thread1of1ForFork1_#t~mem66] because there is no mapped edge [2019-12-07 18:25:04,470 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1158] [1158] L797-2-->L797-5: Formula: (let ((.cse0 (= |P1Thread1of1ForFork0_#t~ite60_Out499854089| |P1Thread1of1ForFork0_#t~ite61_Out499854089|)) (.cse1 (= 0 (mod ~x$r_buff1_thd2~0_In499854089 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In499854089 256)))) (or (and .cse0 (not .cse1) (= |P1Thread1of1ForFork0_#t~ite60_Out499854089| ~x$w_buff1~0_In499854089) (not .cse2) (= |P1Thread1of1ForFork0_#t~mem59_In499854089| |P1Thread1of1ForFork0_#t~mem59_Out499854089|)) (and .cse0 (or .cse1 .cse2) (= |P1Thread1of1ForFork0_#t~mem59_Out499854089| (select (select |#memory_int_In499854089| |~#x~0.base_In499854089|) |~#x~0.offset_In499854089|)) (= |P1Thread1of1ForFork0_#t~mem59_Out499854089| |P1Thread1of1ForFork0_#t~ite60_Out499854089|)))) InVars {P1Thread1of1ForFork0_#t~mem59=|P1Thread1of1ForFork0_#t~mem59_In499854089|, ~#x~0.offset=|~#x~0.offset_In499854089|, ~x$w_buff1~0=~x$w_buff1~0_In499854089, ~#x~0.base=|~#x~0.base_In499854089|, #memory_int=|#memory_int_In499854089|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In499854089, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In499854089} OutVars{P1Thread1of1ForFork0_#t~mem59=|P1Thread1of1ForFork0_#t~mem59_Out499854089|, ~#x~0.offset=|~#x~0.offset_In499854089|, P1Thread1of1ForFork0_#t~ite60=|P1Thread1of1ForFork0_#t~ite60_Out499854089|, P1Thread1of1ForFork0_#t~ite61=|P1Thread1of1ForFork0_#t~ite61_Out499854089|, ~x$w_buff1~0=~x$w_buff1~0_In499854089, ~#x~0.base=|~#x~0.base_In499854089|, #memory_int=|#memory_int_In499854089|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In499854089, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In499854089} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~mem59, P1Thread1of1ForFork0_#t~ite60, P1Thread1of1ForFork0_#t~ite61] because there is no mapped edge [2019-12-07 18:25:04,470 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1097] [1097] P0ENTRY-->L4-3: Formula: (and (= v_~x$w_buff0~0_60 v_~x$w_buff1~0_46) (= |v_P0Thread1of1ForFork2_#in~arg.offset_17| v_P0Thread1of1ForFork2_~arg.offset_15) (= (ite (not (and (not (= (mod v_~x$w_buff1_used~0_134 256) 0)) (not (= (mod v_~x$w_buff0_used~0_224 256) 0)))) 1 0) |v_P0Thread1of1ForFork2___VERIFIER_assert_#in~expression_15|) (= v_~z~0_27 2) (= 1 v_~x$w_buff0~0_59) (= v_P0Thread1of1ForFork2___VERIFIER_assert_~expression_17 |v_P0Thread1of1ForFork2___VERIFIER_assert_#in~expression_15|) (= v_~x$w_buff0_used~0_225 v_~x$w_buff1_used~0_134) (= 1 v_~x$w_buff0_used~0_224) (not (= 0 v_P0Thread1of1ForFork2___VERIFIER_assert_~expression_17)) (= v_P0Thread1of1ForFork2_~arg.base_15 |v_P0Thread1of1ForFork2_#in~arg.base_17|)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_60, P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_17|, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_17|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_225} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_59, P0Thread1of1ForFork2_#in~arg.offset=|v_P0Thread1of1ForFork2_#in~arg.offset_17|, ~x$w_buff1~0=v_~x$w_buff1~0_46, P0Thread1of1ForFork2_~arg.offset=v_P0Thread1of1ForFork2_~arg.offset_15, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_134, P0Thread1of1ForFork2___VERIFIER_assert_~expression=v_P0Thread1of1ForFork2___VERIFIER_assert_~expression_17, P0Thread1of1ForFork2_#in~arg.base=|v_P0Thread1of1ForFork2_#in~arg.base_17|, ~z~0=v_~z~0_27, P0Thread1of1ForFork2_~arg.base=v_P0Thread1of1ForFork2_~arg.base_15, P0Thread1of1ForFork2___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork2___VERIFIER_assert_#in~expression_15|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_224} AuxVars[] AssignedVars[~x$w_buff0~0, ~x$w_buff1~0, P0Thread1of1ForFork2_~arg.offset, ~x$w_buff1_used~0, P0Thread1of1ForFork2___VERIFIER_assert_~expression, ~z~0, P0Thread1of1ForFork2_~arg.base, P0Thread1of1ForFork2___VERIFIER_assert_#in~expression, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 18:25:04,470 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1163] [1163] L818-->L818-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In1981988761 256))) (.cse1 (= (mod ~x$r_buff0_thd3~0_In1981988761 256) 0))) (or (and (= 0 |P2Thread1of1ForFork1_#t~ite69_Out1981988761|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In1981988761 |P2Thread1of1ForFork1_#t~ite69_Out1981988761|)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1981988761, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1981988761} OutVars{P2Thread1of1ForFork1_#t~ite69=|P2Thread1of1ForFork1_#t~ite69_Out1981988761|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1981988761, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1981988761} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite69] because there is no mapped edge [2019-12-07 18:25:04,471 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1161] [1161] L819-->L819-2: Formula: (let ((.cse3 (= (mod ~x$r_buff0_thd3~0_In-1266283425 256) 0)) (.cse2 (= (mod ~x$w_buff0_used~0_In-1266283425 256) 0)) (.cse1 (= (mod ~x$r_buff1_thd3~0_In-1266283425 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In-1266283425 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork1_#t~ite70_Out-1266283425|)) (and (or .cse3 .cse2) (= ~x$w_buff1_used~0_In-1266283425 |P2Thread1of1ForFork1_#t~ite70_Out-1266283425|) (or .cse1 .cse0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1266283425, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1266283425, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1266283425, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1266283425} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-1266283425, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1266283425, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1266283425, P2Thread1of1ForFork1_#t~ite70=|P2Thread1of1ForFork1_#t~ite70_Out-1266283425|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1266283425} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite70] because there is no mapped edge [2019-12-07 18:25:04,471 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1168] [1168] L798-->L798-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In-659054413 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In-659054413 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork0_#t~ite62_Out-659054413| ~x$w_buff0_used~0_In-659054413)) (and (not .cse0) (= 0 |P1Thread1of1ForFork0_#t~ite62_Out-659054413|) (not .cse1)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-659054413, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-659054413} OutVars{P1Thread1of1ForFork0_#t~ite62=|P1Thread1of1ForFork0_#t~ite62_Out-659054413|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-659054413, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-659054413} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite62] because there is no mapped edge [2019-12-07 18:25:04,472 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1177] [1177] L820-->L820-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1403000816 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In-1403000816 256)))) (or (and (= 0 |P2Thread1of1ForFork1_#t~ite71_Out-1403000816|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~x$r_buff0_thd3~0_In-1403000816 |P2Thread1of1ForFork1_#t~ite71_Out-1403000816|)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1403000816, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1403000816} OutVars{P2Thread1of1ForFork1_#t~ite71=|P2Thread1of1ForFork1_#t~ite71_Out-1403000816|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1403000816, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1403000816} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite71] because there is no mapped edge [2019-12-07 18:25:04,473 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1164] [1164] L821-->L821-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd3~0_In1052812165 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In1052812165 256) 0)) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In1052812165 256))) (.cse2 (= (mod ~x$r_buff1_thd3~0_In1052812165 256) 0))) (or (and (= 0 |P2Thread1of1ForFork1_#t~ite72_Out1052812165|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~x$r_buff1_thd3~0_In1052812165 |P2Thread1of1ForFork1_#t~ite72_Out1052812165|) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1052812165, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1052812165, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1052812165, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1052812165} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1052812165, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1052812165, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1052812165, P2Thread1of1ForFork1_#t~ite72=|P2Thread1of1ForFork1_#t~ite72_Out1052812165|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1052812165} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite72] because there is no mapped edge [2019-12-07 18:25:04,473 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1228] [1228] L821-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= v_~__unbuffered_cnt~0_75 (+ v_~__unbuffered_cnt~0_76 1)) (= |v_P2Thread1of1ForFork1_#t~ite72_48| v_~x$r_buff1_thd3~0_197) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_76, P2Thread1of1ForFork1_#t~ite72=|v_P2Thread1of1ForFork1_#t~ite72_48|} OutVars{P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_197, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_75, P2Thread1of1ForFork1_#t~ite72=|v_P2Thread1of1ForFork1_#t~ite72_47|, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#res.base, ~x$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#t~ite72, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 18:25:04,473 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1166] [1166] L799-->L799-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff0_used~0_In1950970040 256))) (.cse3 (= 0 (mod ~x$r_buff0_thd2~0_In1950970040 256))) (.cse1 (= (mod ~x$w_buff1_used~0_In1950970040 256) 0)) (.cse0 (= (mod ~x$r_buff1_thd2~0_In1950970040 256) 0))) (or (and (= |P1Thread1of1ForFork0_#t~ite63_Out1950970040| ~x$w_buff1_used~0_In1950970040) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= |P1Thread1of1ForFork0_#t~ite63_Out1950970040| 0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1950970040, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1950970040, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1950970040, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1950970040} OutVars{P1Thread1of1ForFork0_#t~ite63=|P1Thread1of1ForFork0_#t~ite63_Out1950970040|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1950970040, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1950970040, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1950970040, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1950970040} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite63] because there is no mapped edge [2019-12-07 18:25:04,473 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1162] [1162] L800-->L800-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In1212841127 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1212841127 256)))) (or (and (= |P1Thread1of1ForFork0_#t~ite64_Out1212841127| ~x$r_buff0_thd2~0_In1212841127) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |P1Thread1of1ForFork0_#t~ite64_Out1212841127| 0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1212841127, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1212841127} OutVars{P1Thread1of1ForFork0_#t~ite64=|P1Thread1of1ForFork0_#t~ite64_Out1212841127|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1212841127, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1212841127} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite64] because there is no mapped edge [2019-12-07 18:25:04,474 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1159] [1159] L801-->L801-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff1_used~0_In-99045963 256))) (.cse3 (= (mod ~x$r_buff1_thd2~0_In-99045963 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In-99045963 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In-99045963 256) 0))) (or (and (or .cse0 .cse1) (= ~x$r_buff1_thd2~0_In-99045963 |P1Thread1of1ForFork0_#t~ite65_Out-99045963|) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= |P1Thread1of1ForFork0_#t~ite65_Out-99045963| 0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-99045963, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-99045963, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-99045963, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-99045963} OutVars{P1Thread1of1ForFork0_#t~ite65=|P1Thread1of1ForFork0_#t~ite65_Out-99045963|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-99045963, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-99045963, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-99045963, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-99045963} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite65] because there is no mapped edge [2019-12-07 18:25:04,474 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1211] [1211] L801-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= v_~x$r_buff1_thd2~0_329 |v_P1Thread1of1ForFork0_#t~ite65_28|) (= v_~__unbuffered_cnt~0_49 (+ v_~__unbuffered_cnt~0_50 1)) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|)) InVars {P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_50} OutVars{P1Thread1of1ForFork0_#t~ite65=|v_P1Thread1of1ForFork0_#t~ite65_27|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_329, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite65, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 18:25:04,475 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1165] [1165] L762-->L762-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1679605578 256))) (.cse1 (= (mod ~x$r_buff0_thd1~0_In-1679605578 256) 0))) (or (and (= ~x$w_buff0_used~0_In-1679605578 |P0Thread1of1ForFork2_#t~ite6_Out-1679605578|) (or .cse0 .cse1)) (and (= |P0Thread1of1ForFork2_#t~ite6_Out-1679605578| 0) (not .cse0) (not .cse1)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1679605578, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1679605578} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1679605578, P0Thread1of1ForFork2_#t~ite6=|P0Thread1of1ForFork2_#t~ite6_Out-1679605578|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1679605578} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 18:25:04,476 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1167] [1167] L763-->L763-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff0_thd1~0_In-524588296 256))) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In-524588296 256))) (.cse1 (= (mod ~x$w_buff1_used~0_In-524588296 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd1~0_In-524588296 256)))) (or (and (= ~x$w_buff1_used~0_In-524588296 |P0Thread1of1ForFork2_#t~ite7_Out-524588296|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P0Thread1of1ForFork2_#t~ite7_Out-524588296|) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-524588296, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-524588296, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-524588296, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-524588296} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-524588296, P0Thread1of1ForFork2_#t~ite7=|P0Thread1of1ForFork2_#t~ite7_Out-524588296|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-524588296, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-524588296, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-524588296} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 18:25:04,477 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1176] [1176] L764-->L765: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In-890182027 256) 0)) (.cse2 (= ~x$r_buff0_thd1~0_Out-890182027 ~x$r_buff0_thd1~0_In-890182027)) (.cse1 (= (mod ~x$r_buff0_thd1~0_In-890182027 256) 0))) (or (and (not .cse0) (not .cse1) (= ~x$r_buff0_thd1~0_Out-890182027 0)) (and .cse0 .cse2) (and .cse2 .cse1))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-890182027, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-890182027} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_Out-890182027, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_Out-890182027|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-890182027} AuxVars[] AssignedVars[~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 18:25:04,477 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1172] [1172] L765-->L765-2: Formula: (let ((.cse3 (= 0 (mod ~x$w_buff1_used~0_In577992335 256))) (.cse2 (= 0 (mod ~x$r_buff1_thd1~0_In577992335 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In577992335 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd1~0_In577992335 256) 0))) (or (and (= 0 |P0Thread1of1ForFork2_#t~ite9_Out577992335|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= ~x$r_buff1_thd1~0_In577992335 |P0Thread1of1ForFork2_#t~ite9_Out577992335|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In577992335, ~x$w_buff1_used~0=~x$w_buff1_used~0_In577992335, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In577992335, ~x$w_buff0_used~0=~x$w_buff0_used~0_In577992335} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In577992335, ~x$w_buff1_used~0=~x$w_buff1_used~0_In577992335, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In577992335, P0Thread1of1ForFork2_#t~ite9=|P0Thread1of1ForFork2_#t~ite9_Out577992335|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In577992335} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 18:25:04,477 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1225] [1225] L765-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork2_#t~ite9_30| v_~x$r_buff1_thd1~0_174) (= (+ v_~__unbuffered_cnt~0_70 1) v_~__unbuffered_cnt~0_69) (= |v_P0Thread1of1ForFork2_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork2_#res.base_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P0Thread1of1ForFork2_#t~ite9=|v_P0Thread1of1ForFork2_#t~ite9_30|} OutVars{P0Thread1of1ForFork2_#res.offset=|v_P0Thread1of1ForFork2_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_174, P0Thread1of1ForFork2_#t~ite9=|v_P0Thread1of1ForFork2_#t~ite9_29|, P0Thread1of1ForFork2_#res.base=|v_P0Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork2_#t~ite9, P0Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 18:25:04,477 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1147] [1147] L848-->L850-2: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (or (= 0 (mod v_~x$r_buff0_thd0~0_50 256)) (= 0 (mod v_~x$w_buff0_used~0_403 256)))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_50, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_403} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_50, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_403} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 18:25:04,477 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1179] [1179] L850-2-->L850-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite78_Out-1542067963| |ULTIMATE.start_main_#t~ite77_Out-1542067963|)) (.cse2 (= (mod ~x$w_buff1_used~0_In-1542067963 256) 0)) (.cse1 (= (mod ~x$r_buff1_thd0~0_In-1542067963 256) 0))) (or (and .cse0 (not .cse1) (not .cse2) (= |ULTIMATE.start_main_#t~mem76_In-1542067963| |ULTIMATE.start_main_#t~mem76_Out-1542067963|) (= ~x$w_buff1~0_In-1542067963 |ULTIMATE.start_main_#t~ite77_Out-1542067963|)) (and .cse0 (= |ULTIMATE.start_main_#t~mem76_Out-1542067963| |ULTIMATE.start_main_#t~ite77_Out-1542067963|) (or .cse2 .cse1) (= (select (select |#memory_int_In-1542067963| |~#x~0.base_In-1542067963|) |~#x~0.offset_In-1542067963|) |ULTIMATE.start_main_#t~mem76_Out-1542067963|)))) InVars {ULTIMATE.start_main_#t~mem76=|ULTIMATE.start_main_#t~mem76_In-1542067963|, ~#x~0.offset=|~#x~0.offset_In-1542067963|, ~x$w_buff1~0=~x$w_buff1~0_In-1542067963, ~#x~0.base=|~#x~0.base_In-1542067963|, #memory_int=|#memory_int_In-1542067963|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1542067963, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1542067963} OutVars{ULTIMATE.start_main_#t~mem76=|ULTIMATE.start_main_#t~mem76_Out-1542067963|, ~#x~0.offset=|~#x~0.offset_In-1542067963|, ~x$w_buff1~0=~x$w_buff1~0_In-1542067963, ~#x~0.base=|~#x~0.base_In-1542067963|, #memory_int=|#memory_int_In-1542067963|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1542067963, ULTIMATE.start_main_#t~ite77=|ULTIMATE.start_main_#t~ite77_Out-1542067963|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1542067963, ULTIMATE.start_main_#t~ite78=|ULTIMATE.start_main_#t~ite78_Out-1542067963|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem76, ULTIMATE.start_main_#t~ite77, ULTIMATE.start_main_#t~ite78] because there is no mapped edge [2019-12-07 18:25:04,478 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1155] [1155] L851-->L851-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-2117412486 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-2117412486 256)))) (or (and (= ~x$w_buff0_used~0_In-2117412486 |ULTIMATE.start_main_#t~ite79_Out-2117412486|) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite79_Out-2117412486|) (not .cse0) (not .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-2117412486, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2117412486} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-2117412486, ULTIMATE.start_main_#t~ite79=|ULTIMATE.start_main_#t~ite79_Out-2117412486|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2117412486} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite79] because there is no mapped edge [2019-12-07 18:25:04,479 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1180] [1180] L852-->L852-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-91526923 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-91526923 256))) (.cse3 (= (mod ~x$w_buff1_used~0_In-91526923 256) 0)) (.cse2 (= (mod ~x$r_buff1_thd0~0_In-91526923 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite80_Out-91526923| ~x$w_buff1_used~0_In-91526923)) (and (= |ULTIMATE.start_main_#t~ite80_Out-91526923| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-91526923, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-91526923, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-91526923, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-91526923} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-91526923, ULTIMATE.start_main_#t~ite80=|ULTIMATE.start_main_#t~ite80_Out-91526923|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-91526923, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-91526923, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-91526923} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite80] because there is no mapped edge [2019-12-07 18:25:04,479 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1169] [1169] L853-->L853-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In-1890655386 256) 0)) (.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In-1890655386 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite81_Out-1890655386|) (not .cse0) (not .cse1)) (and (= ~x$r_buff0_thd0~0_In-1890655386 |ULTIMATE.start_main_#t~ite81_Out-1890655386|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1890655386, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1890655386} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1890655386, ULTIMATE.start_main_#t~ite81=|ULTIMATE.start_main_#t~ite81_Out-1890655386|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1890655386} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite81] because there is no mapped edge [2019-12-07 18:25:04,480 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1154] [1154] L854-->L854-2: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In-1501937698 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In-1501937698 256))) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In-1501937698 256))) (.cse3 (= (mod ~x$r_buff0_thd0~0_In-1501937698 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite82_Out-1501937698|)) (and (= |ULTIMATE.start_main_#t~ite82_Out-1501937698| ~x$r_buff1_thd0~0_In-1501937698) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1501937698, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1501937698, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1501937698, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1501937698} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1501937698, ULTIMATE.start_main_#t~ite82=|ULTIMATE.start_main_#t~ite82_Out-1501937698|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1501937698, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1501937698, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1501937698} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite82] because there is no mapped edge [2019-12-07 18:25:04,480 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1152] [1152] L858-->L858-3: Formula: (let ((.cse0 (not (= 0 (mod ~__unbuffered_p1_EAX$read_delayed~0_In2055131799 256)))) (.cse1 (= 0 (mod ~weak$$choice1~0_In2055131799 256)))) (or (and (= |ULTIMATE.start_main_#t~mem84_In2055131799| |ULTIMATE.start_main_#t~mem84_Out2055131799|) .cse0 .cse1 (= ~__unbuffered_p1_EAX~0_In2055131799 |ULTIMATE.start_main_#t~ite85_Out2055131799|)) (and (= |ULTIMATE.start_main_#t~mem84_Out2055131799| (select (select |#memory_int_In2055131799| ~__unbuffered_p1_EAX$read_delayed_var~0.base_In2055131799) ~__unbuffered_p1_EAX$read_delayed_var~0.offset_In2055131799)) .cse0 (not .cse1) (= |ULTIMATE.start_main_#t~mem84_Out2055131799| |ULTIMATE.start_main_#t~ite85_Out2055131799|)))) InVars {~weak$$choice1~0=~weak$$choice1~0_In2055131799, ~__unbuffered_p1_EAX~0=~__unbuffered_p1_EAX~0_In2055131799, ~__unbuffered_p1_EAX$read_delayed~0=~__unbuffered_p1_EAX$read_delayed~0_In2055131799, ~__unbuffered_p1_EAX$read_delayed_var~0.base=~__unbuffered_p1_EAX$read_delayed_var~0.base_In2055131799, #memory_int=|#memory_int_In2055131799|, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=~__unbuffered_p1_EAX$read_delayed_var~0.offset_In2055131799, ULTIMATE.start_main_#t~mem84=|ULTIMATE.start_main_#t~mem84_In2055131799|} OutVars{ULTIMATE.start_main_#t~ite85=|ULTIMATE.start_main_#t~ite85_Out2055131799|, ~weak$$choice1~0=~weak$$choice1~0_In2055131799, ~__unbuffered_p1_EAX~0=~__unbuffered_p1_EAX~0_In2055131799, ~__unbuffered_p1_EAX$read_delayed~0=~__unbuffered_p1_EAX$read_delayed~0_In2055131799, ~__unbuffered_p1_EAX$read_delayed_var~0.base=~__unbuffered_p1_EAX$read_delayed_var~0.base_In2055131799, #memory_int=|#memory_int_In2055131799|, ULTIMATE.start_main_#t~mem84=|ULTIMATE.start_main_#t~mem84_Out2055131799|, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=~__unbuffered_p1_EAX$read_delayed_var~0.offset_In2055131799} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite85, ULTIMATE.start_main_#t~mem84] because there is no mapped edge [2019-12-07 18:25:04,480 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1209] [1209] L858-3-->L4: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8| (mod v_~main$tmp_guard1~0_11 256)) (let ((.cse3 (= 1 v_~__unbuffered_p2_EAX~0_17)) (.cse0 (= v_~z~0_57 2)) (.cse4 (= 1 v_~__unbuffered_p1_EAX~0_33)) (.cse1 (= |v_ULTIMATE.start_main_#t~ite85_21| v_~__unbuffered_p1_EAX~0_33)) (.cse2 (= v_~main$tmp_guard1~0_11 1))) (or (and (not .cse0) .cse1 .cse2) (and .cse1 .cse2 (not .cse3)) (and .cse3 .cse0 .cse4 .cse1 (= v_~main$tmp_guard1~0_11 0)) (and (not .cse4) .cse1 .cse2)))) InVars {ULTIMATE.start_main_#t~ite85=|v_ULTIMATE.start_main_#t~ite85_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_17, ~z~0=v_~z~0_57} OutVars{ULTIMATE.start_main_#t~ite85=|v_ULTIMATE.start_main_#t~ite85_20|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_33, ULTIMATE.start_main_#t~mem84=|v_ULTIMATE.start_main_#t~mem84_16|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_11, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_17, ~z~0=v_~z~0_57, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|, ULTIMATE.start_main_#t~ite86=|v_ULTIMATE.start_main_#t~ite86_23|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite85, ULTIMATE.start___VERIFIER_assert_~expression, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_#t~mem84, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression, ULTIMATE.start_main_#t~ite86] because there is no mapped edge [2019-12-07 18:25:04,480 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [1194] [1194] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 18:25:04,538 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_ca67d506-568f-4f90-b183-981886d61fa1/bin/uautomizer/witness.graphml [2019-12-07 18:25:04,538 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 18:25:04,539 INFO L168 Benchmark]: Toolchain (without parser) took 267458.57 ms. Allocated memory was 1.0 GB in the beginning and 7.9 GB in the end (delta: 6.9 GB). Free memory was 939.3 MB in the beginning and 4.5 GB in the end (delta: -3.6 GB). Peak memory consumption was 3.3 GB. Max. memory is 11.5 GB. [2019-12-07 18:25:04,540 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:25:04,540 INFO L168 Benchmark]: CACSL2BoogieTranslator took 381.85 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 93.3 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -115.0 MB). Peak memory consumption was 23.8 MB. Max. memory is 11.5 GB. [2019-12-07 18:25:04,540 INFO L168 Benchmark]: Boogie Procedure Inliner took 38.01 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:25:04,540 INFO L168 Benchmark]: Boogie Preprocessor took 27.96 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 18:25:04,541 INFO L168 Benchmark]: RCFGBuilder took 483.88 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 976.9 MB in the end (delta: 72.1 MB). Peak memory consumption was 72.1 MB. Max. memory is 11.5 GB. [2019-12-07 18:25:04,541 INFO L168 Benchmark]: TraceAbstraction took 266442.62 ms. Allocated memory was 1.1 GB in the beginning and 7.9 GB in the end (delta: 6.8 GB). Free memory was 976.9 MB in the beginning and 4.6 GB in the end (delta: -3.6 GB). Peak memory consumption was 3.1 GB. Max. memory is 11.5 GB. [2019-12-07 18:25:04,541 INFO L168 Benchmark]: Witness Printer took 79.79 ms. Allocated memory is still 7.9 GB. Free memory was 4.6 GB in the beginning and 4.5 GB in the end (delta: 83.5 MB). Peak memory consumption was 83.5 MB. Max. memory is 11.5 GB. [2019-12-07 18:25:04,542 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 381.85 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 93.3 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -115.0 MB). Peak memory consumption was 23.8 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 38.01 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 27.96 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 483.88 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 976.9 MB in the end (delta: 72.1 MB). Peak memory consumption was 72.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 266442.62 ms. Allocated memory was 1.1 GB in the beginning and 7.9 GB in the end (delta: 6.8 GB). Free memory was 976.9 MB in the beginning and 4.6 GB in the end (delta: -3.6 GB). Peak memory consumption was 3.1 GB. Max. memory is 11.5 GB. * Witness Printer took 79.79 ms. Allocated memory is still 7.9 GB. Free memory was 4.6 GB in the beginning and 4.5 GB in the end (delta: 83.5 MB). Peak memory consumption was 83.5 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 4.6s, 235 ProgramPointsBefore, 118 ProgramPointsAfterwards, 293 TransitionsBefore, 145 TransitionsAfterwards, 31682 CoEnabledTransitionPairs, 8 FixpointIterations, 50 TrivialSequentialCompositions, 58 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 67 ConcurrentYvCompositions, 35 ChoiceCompositions, 11793 VarBasedMoverChecksPositive, 337 VarBasedMoverChecksNegative, 111 SemBasedMoverChecksPositive, 344 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.1s, 0 MoverChecksTotal, 167242 CheckedPairsTotal, 175 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L840] FCALL, FORK 0 pthread_create(&t1964, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff0_thd3=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$r_buff1_thd3=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={5:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L842] FCALL, FORK 0 pthread_create(&t1965, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff0_thd3=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$r_buff1_thd3=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={5:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L775] 2 weak$$choice0 = __VERIFIER_nondet_bool() [L776] 2 weak$$choice2 = __VERIFIER_nondet_bool() [L777] 2 x$flush_delayed = weak$$choice2 [L778] EXPR 2 \read(x) [L778] 2 x$mem_tmp = x [L779] 2 weak$$choice1 = __VERIFIER_nondet_bool() [L780] EXPR 2 !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) [L780] EXPR 2 \read(x) [L780] EXPR 2 !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) VAL [!x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x))))=0, \read(x)=0, __unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff0_thd3=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$r_buff1_thd3=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=3, weak$$choice2=1, x={5:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L780] 2 x = !x$w_buff0_used ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x : (weak$$choice1 ? x$w_buff0 : x$w_buff1)) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$w_buff1 : x$w_buff0) : (weak$$choice0 ? x$w_buff0 : x)))) [L844] FCALL, FORK 0 pthread_create(&t1966, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff0_thd3=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$r_buff1_thd3=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=3, weak$$choice2=1, x={5:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L781] 2 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff0 : x$w_buff0)))) [L782] EXPR 2 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : x$w_buff1)))) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff0_thd3=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$r_buff1_thd3=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=3, weak$$choice2=1, weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : x$w_buff1))))=0, x={5:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L782] 2 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? x$w_buff1 : x$w_buff1)))) [L783] EXPR 2 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 || !weak$$choice1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : weak$$choice0)))) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff0_thd3=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$r_buff1_thd3=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=3, weak$$choice2=1, weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 || !weak$$choice1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : weak$$choice0))))=0, x={5:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L783] 2 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 || !weak$$choice1 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : weak$$choice0)))) [L784] EXPR 2 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff0_thd3=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$r_buff1_thd3=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=3, weak$$choice2=1, weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))))=0, x={5:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L784] 2 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? weak$$choice0 : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L786] EXPR 2 weak$$choice2 ? x$r_buff1_thd2 : (!x$w_buff0_used ? x$r_buff1_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$r_buff1_thd2 : (_Bool)0) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff0_thd3=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$r_buff1_thd3=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=3, weak$$choice2=1, weak$$choice2 ? x$r_buff1_thd2 : (!x$w_buff0_used ? x$r_buff1_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$r_buff1_thd2 : (_Bool)0) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))))=0, x={5:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L786] 2 x$r_buff1_thd2 = weak$$choice2 ? x$r_buff1_thd2 : (!x$w_buff0_used ? x$r_buff1_thd2 : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (x$w_buff0_used && !x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (weak$$choice0 ? x$r_buff1_thd2 : (_Bool)0) : (x$w_buff0_used && x$r_buff1_thd2 && x$w_buff1_used && !x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)))) [L787] 2 __unbuffered_p1_EAX$read_delayed = (_Bool)1 [L788] 2 __unbuffered_p1_EAX$read_delayed_var = &x [L789] EXPR 2 \read(x) [L789] 2 __unbuffered_p1_EAX = x [L811] 3 __unbuffered_p2_EAX = y [L814] 3 z = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff0_thd3=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$r_buff1_thd3=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={5:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=3, weak$$choice2=1, x={5:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L817] EXPR 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff0_thd3=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$r_buff1_thd3=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={5:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=3, weak$$choice2=1, x={5:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L817] 3 x = x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) [L797] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff0_thd3=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$r_buff1_thd3=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={5:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=3, weak$$choice2=1, x={5:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L818] 3 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used [L797] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L798] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L819] 3 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used [L820] 3 x$r_buff0_thd3 = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$r_buff0_thd3 [L799] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L800] 2 x$r_buff0_thd2 = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$r_buff0_thd2 [L754] 1 x$r_buff1_thd0 = x$r_buff0_thd0 [L755] 1 x$r_buff1_thd1 = x$r_buff0_thd1 [L756] 1 x$r_buff1_thd2 = x$r_buff0_thd2 [L757] 1 x$r_buff1_thd3 = x$r_buff0_thd3 [L758] 1 x$r_buff0_thd1 = (_Bool)1 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff0_thd3=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$r_buff1_thd3=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={5:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=3, weak$$choice2=1, x={5:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L761] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff0_thd3=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$r_buff1_thd3=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={5:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=3, weak$$choice2=1, x={5:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L761] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L762] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L763] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L846] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff0_thd3=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$r_buff1_thd3=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={5:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=4, weak$$choice1=3, weak$$choice2=1, x={5:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=1, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L850] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L851] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L852] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L853] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L854] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L857] 0 weak$$choice1 = __VERIFIER_nondet_bool() - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 226 locations, 2 error locations. Result: UNSAFE, OverallTime: 266.2s, OverallIterations: 33, TraceHistogramMax: 1, AutomataDifference: 65.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 7851 SDtfs, 9798 SDslu, 15609 SDs, 0 SdLazy, 11145 SolverSat, 622 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 6.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 325 GetRequests, 80 SyntacticMatches, 34 SemanticMatches, 211 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 328 ImplicationChecksByTransitivity, 2.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=458411occurred in iteration=7, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 151.9s AutomataMinimizationTime, 32 MinimizatonAttempts, 862441 StatesRemovedByMinimization, 28 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 1.9s InterpolantComputationTime, 1172 NumberOfCodeBlocks, 1172 NumberOfCodeBlocksAsserted, 33 NumberOfCheckSat, 1070 ConstructedInterpolants, 0 QuantifiedInterpolants, 133740 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 32 InterpolantComputations, 32 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...