./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe009_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_074ac776-3957-4899-a189-df92ab2e1ec7/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_074ac776-3957-4899-a189-df92ab2e1ec7/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_074ac776-3957-4899-a189-df92ab2e1ec7/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_074ac776-3957-4899-a189-df92ab2e1ec7/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe009_rmo.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_074ac776-3957-4899-a189-df92ab2e1ec7/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_074ac776-3957-4899-a189-df92ab2e1ec7/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 6418551c7b2ff4079f46747cc16d35fa879d6bb4 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 18:36:25,100 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 18:36:25,101 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 18:36:25,109 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 18:36:25,109 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 18:36:25,110 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 18:36:25,110 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 18:36:25,112 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 18:36:25,113 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 18:36:25,113 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 18:36:25,114 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 18:36:25,115 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 18:36:25,115 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 18:36:25,116 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 18:36:25,116 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 18:36:25,117 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 18:36:25,118 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 18:36:25,118 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 18:36:25,120 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 18:36:25,121 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 18:36:25,122 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 18:36:25,123 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 18:36:25,124 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 18:36:25,124 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 18:36:25,126 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 18:36:25,126 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 18:36:25,126 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 18:36:25,127 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 18:36:25,127 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 18:36:25,127 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 18:36:25,128 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 18:36:25,128 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 18:36:25,128 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 18:36:25,129 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 18:36:25,129 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 18:36:25,130 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 18:36:25,130 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 18:36:25,130 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 18:36:25,130 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 18:36:25,131 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 18:36:25,131 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 18:36:25,132 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_074ac776-3957-4899-a189-df92ab2e1ec7/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 18:36:25,141 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 18:36:25,141 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 18:36:25,142 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 18:36:25,142 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 18:36:25,142 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 18:36:25,143 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 18:36:25,143 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 18:36:25,143 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 18:36:25,143 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 18:36:25,143 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 18:36:25,143 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 18:36:25,143 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 18:36:25,143 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 18:36:25,144 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 18:36:25,144 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 18:36:25,144 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 18:36:25,144 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 18:36:25,144 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 18:36:25,144 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 18:36:25,144 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 18:36:25,144 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 18:36:25,145 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:36:25,145 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 18:36:25,145 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 18:36:25,145 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 18:36:25,145 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 18:36:25,145 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 18:36:25,145 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 18:36:25,145 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 18:36:25,145 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_074ac776-3957-4899-a189-df92ab2e1ec7/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 6418551c7b2ff4079f46747cc16d35fa879d6bb4 [2019-12-07 18:36:25,244 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 18:36:25,252 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 18:36:25,254 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 18:36:25,255 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 18:36:25,256 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 18:36:25,256 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_074ac776-3957-4899-a189-df92ab2e1ec7/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe009_rmo.opt.i [2019-12-07 18:36:25,303 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_074ac776-3957-4899-a189-df92ab2e1ec7/bin/uautomizer/data/35819967b/c1376d950c544007b03d603d512d36cf/FLAGcc9503bfd [2019-12-07 18:36:25,784 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 18:36:25,785 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_074ac776-3957-4899-a189-df92ab2e1ec7/sv-benchmarks/c/pthread-wmm/safe009_rmo.opt.i [2019-12-07 18:36:25,798 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_074ac776-3957-4899-a189-df92ab2e1ec7/bin/uautomizer/data/35819967b/c1376d950c544007b03d603d512d36cf/FLAGcc9503bfd [2019-12-07 18:36:26,278 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_074ac776-3957-4899-a189-df92ab2e1ec7/bin/uautomizer/data/35819967b/c1376d950c544007b03d603d512d36cf [2019-12-07 18:36:26,279 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 18:36:26,280 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 18:36:26,281 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 18:36:26,281 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 18:36:26,283 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 18:36:26,284 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:36:26" (1/1) ... [2019-12-07 18:36:26,285 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@227d51b0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:36:26, skipping insertion in model container [2019-12-07 18:36:26,286 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:36:26" (1/1) ... [2019-12-07 18:36:26,290 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 18:36:26,324 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 18:36:26,585 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:36:26,592 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 18:36:26,634 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:36:26,679 INFO L208 MainTranslator]: Completed translation [2019-12-07 18:36:26,679 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:36:26 WrapperNode [2019-12-07 18:36:26,679 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 18:36:26,680 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 18:36:26,680 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 18:36:26,680 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 18:36:26,685 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:36:26" (1/1) ... [2019-12-07 18:36:26,699 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:36:26" (1/1) ... [2019-12-07 18:36:26,715 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 18:36:26,715 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 18:36:26,715 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 18:36:26,716 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 18:36:26,722 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:36:26" (1/1) ... [2019-12-07 18:36:26,722 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:36:26" (1/1) ... [2019-12-07 18:36:26,725 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:36:26" (1/1) ... [2019-12-07 18:36:26,725 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:36:26" (1/1) ... [2019-12-07 18:36:26,733 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:36:26" (1/1) ... [2019-12-07 18:36:26,736 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:36:26" (1/1) ... [2019-12-07 18:36:26,738 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:36:26" (1/1) ... [2019-12-07 18:36:26,742 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 18:36:26,742 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 18:36:26,742 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 18:36:26,742 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 18:36:26,743 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:36:26" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_074ac776-3957-4899-a189-df92ab2e1ec7/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:36:26,782 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2019-12-07 18:36:26,782 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 18:36:26,782 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 18:36:26,782 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 18:36:26,783 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 18:36:26,783 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 18:36:26,783 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 18:36:26,783 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 18:36:26,783 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 18:36:26,783 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 18:36:26,783 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 18:36:26,784 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2019-12-07 18:36:26,784 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 18:36:26,784 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 18:36:26,784 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 18:36:26,785 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 18:36:27,182 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 18:36:27,182 INFO L287 CfgBuilder]: Removed 6 assume(true) statements. [2019-12-07 18:36:27,183 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:36:27 BoogieIcfgContainer [2019-12-07 18:36:27,183 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 18:36:27,184 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 18:36:27,184 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 18:36:27,186 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 18:36:27,187 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 06:36:26" (1/3) ... [2019-12-07 18:36:27,187 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@648c1a92 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:36:27, skipping insertion in model container [2019-12-07 18:36:27,187 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:36:26" (2/3) ... [2019-12-07 18:36:27,188 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@648c1a92 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:36:27, skipping insertion in model container [2019-12-07 18:36:27,188 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:36:27" (3/3) ... [2019-12-07 18:36:27,189 INFO L109 eAbstractionObserver]: Analyzing ICFG safe009_rmo.opt.i [2019-12-07 18:36:27,196 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 18:36:27,196 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 18:36:27,200 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-12-07 18:36:27,201 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 18:36:27,228 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,228 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,228 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,228 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,229 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,229 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,229 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,229 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,229 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~mem3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,229 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,229 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,229 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~mem3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,229 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,230 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,230 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,230 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,230 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,230 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,230 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,230 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,230 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,230 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,230 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,231 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,231 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,231 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,231 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,231 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,231 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,231 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,231 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,232 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,233 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,233 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,233 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,233 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,233 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,233 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~nondet11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,233 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,234 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,234 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,234 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,234 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,234 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,235 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,235 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,235 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,237 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,237 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,237 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,238 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,238 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,238 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,238 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,238 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,238 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,239 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,239 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,239 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,239 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,239 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,239 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,240 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,240 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,240 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,240 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,240 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,240 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,241 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,241 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,241 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,241 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,241 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,241 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,242 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,242 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,242 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,242 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,242 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,242 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,242 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,243 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,243 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,243 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,243 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,243 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,244 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,244 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,244 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,244 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,244 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,244 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,244 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,245 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,245 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,245 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,245 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,245 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,246 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,246 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,246 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,246 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,246 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,246 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,246 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,247 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,247 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,247 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,248 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,248 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,248 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,248 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,248 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,248 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,248 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,249 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,249 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,249 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,249 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,249 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,249 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,250 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,250 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,250 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,250 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,250 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,250 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,250 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,251 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,251 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,251 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,251 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,251 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,251 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,251 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,252 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,252 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,252 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~mem37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,252 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,252 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,252 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,253 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,253 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,253 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,253 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,253 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,253 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,253 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,254 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,254 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,254 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,254 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,254 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,254 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,255 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,255 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,255 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,255 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,255 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,256 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,256 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,256 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,256 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,256 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,256 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,256 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,257 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~mem44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,257 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,257 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,257 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~mem44| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,257 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,257 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,258 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite45| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,258 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite46| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,258 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,258 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite47| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,258 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,258 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,258 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,259 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite48| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,259 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,259 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,259 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,259 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite49| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,259 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,259 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,259 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,259 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite50| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,260 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,260 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:36:27,270 INFO L249 AbstractCegarLoop]: Starting to check reachability of 4 error locations. [2019-12-07 18:36:27,282 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 18:36:27,282 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 18:36:27,282 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 18:36:27,282 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 18:36:27,282 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 18:36:27,282 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 18:36:27,282 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 18:36:27,282 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 18:36:27,293 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 192 places, 230 transitions [2019-12-07 18:36:27,294 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 192 places, 230 transitions [2019-12-07 18:36:27,354 INFO L134 PetriNetUnfolder]: 48/227 cut-off events. [2019-12-07 18:36:27,354 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:36:27,364 INFO L76 FinitePrefix]: Finished finitePrefix Result has 237 conditions, 227 events. 48/227 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 13. Compared 744 event pairs. 9/187 useless extension candidates. Maximal degree in co-relation 180. Up to 2 conditions per place. [2019-12-07 18:36:27,381 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 192 places, 230 transitions [2019-12-07 18:36:27,412 INFO L134 PetriNetUnfolder]: 48/227 cut-off events. [2019-12-07 18:36:27,412 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:36:27,418 INFO L76 FinitePrefix]: Finished finitePrefix Result has 237 conditions, 227 events. 48/227 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 13. Compared 744 event pairs. 9/187 useless extension candidates. Maximal degree in co-relation 180. Up to 2 conditions per place. [2019-12-07 18:36:27,435 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19530 [2019-12-07 18:36:27,435 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 18:36:30,810 WARN L192 SmtUtils]: Spent 135.00 ms on a formula simplification that was a NOOP. DAG size: 126 [2019-12-07 18:36:30,934 WARN L192 SmtUtils]: Spent 121.00 ms on a formula simplification that was a NOOP. DAG size: 122 [2019-12-07 18:36:31,233 WARN L192 SmtUtils]: Spent 291.00 ms on a formula simplification. DAG size of input: 134 DAG size of output: 130 [2019-12-07 18:36:31,373 WARN L192 SmtUtils]: Spent 138.00 ms on a formula simplification that was a NOOP. DAG size: 128 [2019-12-07 18:36:31,390 INFO L206 etLargeBlockEncoding]: Checked pairs total: 80972 [2019-12-07 18:36:31,391 INFO L214 etLargeBlockEncoding]: Total number of compositions: 145 [2019-12-07 18:36:31,394 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 86 places, 95 transitions [2019-12-07 18:36:40,289 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 88334 states. [2019-12-07 18:36:40,290 INFO L276 IsEmpty]: Start isEmpty. Operand 88334 states. [2019-12-07 18:36:40,321 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2019-12-07 18:36:40,321 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:36:40,321 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:36:40,322 INFO L410 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:36:40,325 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:36:40,326 INFO L82 PathProgramCache]: Analyzing trace with hash -986847660, now seen corresponding path program 1 times [2019-12-07 18:36:40,332 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:36:40,332 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [166720993] [2019-12-07 18:36:40,332 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:36:40,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:36:40,603 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:36:40,604 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [166720993] [2019-12-07 18:36:40,605 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:36:40,605 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:36:40,606 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1248594382] [2019-12-07 18:36:40,610 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:36:40,610 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:36:40,620 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:36:40,620 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:36:40,622 INFO L87 Difference]: Start difference. First operand 88334 states. Second operand 3 states. [2019-12-07 18:36:41,160 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:36:41,160 INFO L93 Difference]: Finished difference Result 83186 states and 357098 transitions. [2019-12-07 18:36:41,161 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:36:41,162 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 17 [2019-12-07 18:36:41,162 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:36:41,615 INFO L225 Difference]: With dead ends: 83186 [2019-12-07 18:36:41,615 INFO L226 Difference]: Without dead ends: 78038 [2019-12-07 18:36:41,616 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:36:43,392 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78038 states. [2019-12-07 18:36:44,501 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78038 to 78038. [2019-12-07 18:36:44,502 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 78038 states. [2019-12-07 18:36:44,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78038 states to 78038 states and 334946 transitions. [2019-12-07 18:36:44,759 INFO L78 Accepts]: Start accepts. Automaton has 78038 states and 334946 transitions. Word has length 17 [2019-12-07 18:36:44,759 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:36:44,759 INFO L462 AbstractCegarLoop]: Abstraction has 78038 states and 334946 transitions. [2019-12-07 18:36:44,760 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:36:44,760 INFO L276 IsEmpty]: Start isEmpty. Operand 78038 states and 334946 transitions. [2019-12-07 18:36:44,785 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 18:36:44,785 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:36:44,785 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:36:44,786 INFO L410 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:36:44,786 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:36:44,786 INFO L82 PathProgramCache]: Analyzing trace with hash -1233893207, now seen corresponding path program 1 times [2019-12-07 18:36:44,786 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:36:44,786 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [989231860] [2019-12-07 18:36:44,787 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:36:44,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:36:44,867 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:36:44,868 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [989231860] [2019-12-07 18:36:44,868 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:36:44,868 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:36:44,868 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1976288431] [2019-12-07 18:36:44,869 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:36:44,870 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:36:44,870 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:36:44,870 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:36:44,870 INFO L87 Difference]: Start difference. First operand 78038 states and 334946 transitions. Second operand 4 states. [2019-12-07 18:36:45,001 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:36:45,001 INFO L93 Difference]: Finished difference Result 24050 states and 84774 transitions. [2019-12-07 18:36:45,001 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:36:45,002 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 18 [2019-12-07 18:36:45,002 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:36:45,033 INFO L225 Difference]: With dead ends: 24050 [2019-12-07 18:36:45,033 INFO L226 Difference]: Without dead ends: 18902 [2019-12-07 18:36:45,033 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:36:45,134 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18902 states. [2019-12-07 18:36:46,537 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18902 to 18902. [2019-12-07 18:36:46,537 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18902 states. [2019-12-07 18:36:46,567 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18902 states to 18902 states and 63546 transitions. [2019-12-07 18:36:46,567 INFO L78 Accepts]: Start accepts. Automaton has 18902 states and 63546 transitions. Word has length 18 [2019-12-07 18:36:46,567 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:36:46,567 INFO L462 AbstractCegarLoop]: Abstraction has 18902 states and 63546 transitions. [2019-12-07 18:36:46,567 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:36:46,567 INFO L276 IsEmpty]: Start isEmpty. Operand 18902 states and 63546 transitions. [2019-12-07 18:36:46,576 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 18:36:46,576 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:36:46,576 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:36:46,576 INFO L410 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:36:46,576 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:36:46,576 INFO L82 PathProgramCache]: Analyzing trace with hash 1045408296, now seen corresponding path program 1 times [2019-12-07 18:36:46,576 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:36:46,576 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [683630423] [2019-12-07 18:36:46,577 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:36:46,603 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:36:46,647 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:36:46,647 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [683630423] [2019-12-07 18:36:46,647 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:36:46,647 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:36:46,647 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1137314367] [2019-12-07 18:36:46,648 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:36:46,648 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:36:46,648 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:36:46,648 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:36:46,648 INFO L87 Difference]: Start difference. First operand 18902 states and 63546 transitions. Second operand 5 states. [2019-12-07 18:36:46,701 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:36:46,701 INFO L93 Difference]: Finished difference Result 7674 states and 24474 transitions. [2019-12-07 18:36:46,701 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:36:46,701 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 18:36:46,702 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:36:46,717 INFO L225 Difference]: With dead ends: 7674 [2019-12-07 18:36:46,717 INFO L226 Difference]: Without dead ends: 6750 [2019-12-07 18:36:46,718 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:36:46,750 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6750 states. [2019-12-07 18:36:46,810 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6750 to 6750. [2019-12-07 18:36:46,810 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6750 states. [2019-12-07 18:36:46,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6750 states to 6750 states and 21462 transitions. [2019-12-07 18:36:46,821 INFO L78 Accepts]: Start accepts. Automaton has 6750 states and 21462 transitions. Word has length 28 [2019-12-07 18:36:46,821 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:36:46,821 INFO L462 AbstractCegarLoop]: Abstraction has 6750 states and 21462 transitions. [2019-12-07 18:36:46,821 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:36:46,821 INFO L276 IsEmpty]: Start isEmpty. Operand 6750 states and 21462 transitions. [2019-12-07 18:36:46,829 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2019-12-07 18:36:46,829 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:36:46,829 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:36:46,829 INFO L410 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:36:46,829 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:36:46,829 INFO L82 PathProgramCache]: Analyzing trace with hash 2112949587, now seen corresponding path program 1 times [2019-12-07 18:36:46,829 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:36:46,830 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1159965558] [2019-12-07 18:36:46,830 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:36:46,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:36:46,890 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:36:46,890 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1159965558] [2019-12-07 18:36:46,890 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:36:46,891 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:36:46,891 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1421198592] [2019-12-07 18:36:46,891 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:36:46,891 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:36:46,891 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:36:46,891 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:36:46,892 INFO L87 Difference]: Start difference. First operand 6750 states and 21462 transitions. Second operand 3 states. [2019-12-07 18:36:46,914 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:36:46,914 INFO L93 Difference]: Finished difference Result 6750 states and 20951 transitions. [2019-12-07 18:36:46,915 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:36:46,915 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 38 [2019-12-07 18:36:46,915 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:36:46,926 INFO L225 Difference]: With dead ends: 6750 [2019-12-07 18:36:46,926 INFO L226 Difference]: Without dead ends: 6750 [2019-12-07 18:36:46,927 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:36:46,960 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6750 states. [2019-12-07 18:36:47,014 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6750 to 6750. [2019-12-07 18:36:47,015 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6750 states. [2019-12-07 18:36:47,026 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6750 states to 6750 states and 20951 transitions. [2019-12-07 18:36:47,026 INFO L78 Accepts]: Start accepts. Automaton has 6750 states and 20951 transitions. Word has length 38 [2019-12-07 18:36:47,026 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:36:47,026 INFO L462 AbstractCegarLoop]: Abstraction has 6750 states and 20951 transitions. [2019-12-07 18:36:47,026 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:36:47,026 INFO L276 IsEmpty]: Start isEmpty. Operand 6750 states and 20951 transitions. [2019-12-07 18:36:47,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 18:36:47,034 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:36:47,034 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:36:47,034 INFO L410 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:36:47,034 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:36:47,034 INFO L82 PathProgramCache]: Analyzing trace with hash -1023772364, now seen corresponding path program 1 times [2019-12-07 18:36:47,035 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:36:47,035 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1063294884] [2019-12-07 18:36:47,035 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:36:47,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:36:47,092 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:36:47,092 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1063294884] [2019-12-07 18:36:47,093 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:36:47,093 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:36:47,093 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1267025220] [2019-12-07 18:36:47,093 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:36:47,093 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:36:47,093 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:36:47,093 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:36:47,093 INFO L87 Difference]: Start difference. First operand 6750 states and 20951 transitions. Second operand 3 states. [2019-12-07 18:36:47,170 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:36:47,170 INFO L93 Difference]: Finished difference Result 6534 states and 20057 transitions. [2019-12-07 18:36:47,170 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:36:47,170 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 39 [2019-12-07 18:36:47,171 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:36:47,179 INFO L225 Difference]: With dead ends: 6534 [2019-12-07 18:36:47,180 INFO L226 Difference]: Without dead ends: 6534 [2019-12-07 18:36:47,180 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:36:47,211 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6534 states. [2019-12-07 18:36:47,264 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6534 to 6534. [2019-12-07 18:36:47,264 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6534 states. [2019-12-07 18:36:47,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6534 states to 6534 states and 20057 transitions. [2019-12-07 18:36:47,274 INFO L78 Accepts]: Start accepts. Automaton has 6534 states and 20057 transitions. Word has length 39 [2019-12-07 18:36:47,274 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:36:47,274 INFO L462 AbstractCegarLoop]: Abstraction has 6534 states and 20057 transitions. [2019-12-07 18:36:47,274 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:36:47,274 INFO L276 IsEmpty]: Start isEmpty. Operand 6534 states and 20057 transitions. [2019-12-07 18:36:47,281 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 18:36:47,281 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:36:47,281 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:36:47,281 INFO L410 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:36:47,281 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:36:47,281 INFO L82 PathProgramCache]: Analyzing trace with hash 110137820, now seen corresponding path program 2 times [2019-12-07 18:36:47,281 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:36:47,282 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1841026877] [2019-12-07 18:36:47,282 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:36:47,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:36:47,321 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:36:47,321 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1841026877] [2019-12-07 18:36:47,321 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:36:47,321 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:36:47,321 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1493100982] [2019-12-07 18:36:47,322 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:36:47,322 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:36:47,322 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:36:47,322 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:36:47,322 INFO L87 Difference]: Start difference. First operand 6534 states and 20057 transitions. Second operand 4 states. [2019-12-07 18:36:47,502 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:36:47,502 INFO L93 Difference]: Finished difference Result 9345 states and 27784 transitions. [2019-12-07 18:36:47,502 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:36:47,502 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 39 [2019-12-07 18:36:47,503 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:36:47,514 INFO L225 Difference]: With dead ends: 9345 [2019-12-07 18:36:47,514 INFO L226 Difference]: Without dead ends: 9345 [2019-12-07 18:36:47,514 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:36:47,549 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9345 states. [2019-12-07 18:36:47,634 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9345 to 8300. [2019-12-07 18:36:47,634 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8300 states. [2019-12-07 18:36:47,646 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8300 states to 8300 states and 25119 transitions. [2019-12-07 18:36:47,646 INFO L78 Accepts]: Start accepts. Automaton has 8300 states and 25119 transitions. Word has length 39 [2019-12-07 18:36:47,646 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:36:47,646 INFO L462 AbstractCegarLoop]: Abstraction has 8300 states and 25119 transitions. [2019-12-07 18:36:47,646 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:36:47,647 INFO L276 IsEmpty]: Start isEmpty. Operand 8300 states and 25119 transitions. [2019-12-07 18:36:47,656 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 18:36:47,656 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:36:47,656 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:36:47,656 INFO L410 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:36:47,657 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:36:47,657 INFO L82 PathProgramCache]: Analyzing trace with hash -1670978222, now seen corresponding path program 1 times [2019-12-07 18:36:47,657 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:36:47,657 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [155767848] [2019-12-07 18:36:47,657 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:36:47,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:36:47,722 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:36:47,723 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [155767848] [2019-12-07 18:36:47,723 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:36:47,723 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:36:47,723 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [671938396] [2019-12-07 18:36:47,723 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:36:47,724 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:36:47,724 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:36:47,724 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:36:47,724 INFO L87 Difference]: Start difference. First operand 8300 states and 25119 transitions. Second operand 6 states. [2019-12-07 18:36:47,795 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:36:47,795 INFO L93 Difference]: Finished difference Result 7494 states and 23251 transitions. [2019-12-07 18:36:47,795 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:36:47,795 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 40 [2019-12-07 18:36:47,796 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:36:47,803 INFO L225 Difference]: With dead ends: 7494 [2019-12-07 18:36:47,803 INFO L226 Difference]: Without dead ends: 7415 [2019-12-07 18:36:47,803 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:36:47,833 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7415 states. [2019-12-07 18:36:47,892 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7415 to 7415. [2019-12-07 18:36:47,892 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7415 states. [2019-12-07 18:36:47,902 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7415 states to 7415 states and 23078 transitions. [2019-12-07 18:36:47,902 INFO L78 Accepts]: Start accepts. Automaton has 7415 states and 23078 transitions. Word has length 40 [2019-12-07 18:36:47,902 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:36:47,902 INFO L462 AbstractCegarLoop]: Abstraction has 7415 states and 23078 transitions. [2019-12-07 18:36:47,902 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:36:47,902 INFO L276 IsEmpty]: Start isEmpty. Operand 7415 states and 23078 transitions. [2019-12-07 18:36:47,911 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 18:36:47,911 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:36:47,911 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:36:47,911 INFO L410 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:36:47,911 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:36:47,911 INFO L82 PathProgramCache]: Analyzing trace with hash 647981034, now seen corresponding path program 1 times [2019-12-07 18:36:47,911 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:36:47,912 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [494973610] [2019-12-07 18:36:47,912 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:36:47,920 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:36:47,941 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:36:47,941 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [494973610] [2019-12-07 18:36:47,941 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:36:47,941 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:36:47,941 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [469407337] [2019-12-07 18:36:47,941 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:36:47,942 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:36:47,942 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:36:47,942 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:36:47,942 INFO L87 Difference]: Start difference. First operand 7415 states and 23078 transitions. Second operand 3 states. [2019-12-07 18:36:47,993 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:36:47,993 INFO L93 Difference]: Finished difference Result 11603 states and 35425 transitions. [2019-12-07 18:36:47,993 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:36:47,993 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 60 [2019-12-07 18:36:47,994 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:36:48,005 INFO L225 Difference]: With dead ends: 11603 [2019-12-07 18:36:48,005 INFO L226 Difference]: Without dead ends: 11603 [2019-12-07 18:36:48,005 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:36:48,043 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11603 states. [2019-12-07 18:36:48,123 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11603 to 8618. [2019-12-07 18:36:48,123 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8618 states. [2019-12-07 18:36:48,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8618 states to 8618 states and 26525 transitions. [2019-12-07 18:36:48,135 INFO L78 Accepts]: Start accepts. Automaton has 8618 states and 26525 transitions. Word has length 60 [2019-12-07 18:36:48,135 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:36:48,135 INFO L462 AbstractCegarLoop]: Abstraction has 8618 states and 26525 transitions. [2019-12-07 18:36:48,135 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:36:48,135 INFO L276 IsEmpty]: Start isEmpty. Operand 8618 states and 26525 transitions. [2019-12-07 18:36:48,145 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 18:36:48,145 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:36:48,145 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:36:48,146 INFO L410 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:36:48,146 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:36:48,146 INFO L82 PathProgramCache]: Analyzing trace with hash 1417370441, now seen corresponding path program 1 times [2019-12-07 18:36:48,146 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:36:48,146 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [995254164] [2019-12-07 18:36:48,146 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:36:48,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:36:48,213 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:36:48,213 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [995254164] [2019-12-07 18:36:48,213 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:36:48,214 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:36:48,214 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1503371439] [2019-12-07 18:36:48,214 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:36:48,214 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:36:48,214 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:36:48,214 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:36:48,214 INFO L87 Difference]: Start difference. First operand 8618 states and 26525 transitions. Second operand 5 states. [2019-12-07 18:36:48,503 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:36:48,503 INFO L93 Difference]: Finished difference Result 11869 states and 35975 transitions. [2019-12-07 18:36:48,503 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:36:48,503 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 60 [2019-12-07 18:36:48,504 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:36:48,517 INFO L225 Difference]: With dead ends: 11869 [2019-12-07 18:36:48,517 INFO L226 Difference]: Without dead ends: 11869 [2019-12-07 18:36:48,518 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:36:48,561 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11869 states. [2019-12-07 18:36:48,691 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11869 to 9606. [2019-12-07 18:36:48,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9606 states. [2019-12-07 18:36:48,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9606 states to 9606 states and 29591 transitions. [2019-12-07 18:36:48,705 INFO L78 Accepts]: Start accepts. Automaton has 9606 states and 29591 transitions. Word has length 60 [2019-12-07 18:36:48,705 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:36:48,705 INFO L462 AbstractCegarLoop]: Abstraction has 9606 states and 29591 transitions. [2019-12-07 18:36:48,705 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:36:48,705 INFO L276 IsEmpty]: Start isEmpty. Operand 9606 states and 29591 transitions. [2019-12-07 18:36:48,716 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2019-12-07 18:36:48,717 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:36:48,717 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:36:48,717 INFO L410 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:36:48,717 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:36:48,717 INFO L82 PathProgramCache]: Analyzing trace with hash 1976422663, now seen corresponding path program 2 times [2019-12-07 18:36:48,717 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:36:48,717 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [471673149] [2019-12-07 18:36:48,717 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:36:48,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:36:48,785 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:36:48,785 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [471673149] [2019-12-07 18:36:48,785 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:36:48,785 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:36:48,785 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1734940066] [2019-12-07 18:36:48,786 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:36:48,786 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:36:48,786 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:36:48,786 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:36:48,786 INFO L87 Difference]: Start difference. First operand 9606 states and 29591 transitions. Second operand 6 states. [2019-12-07 18:36:48,950 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:36:48,950 INFO L93 Difference]: Finished difference Result 13402 states and 40515 transitions. [2019-12-07 18:36:48,950 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:36:48,950 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 60 [2019-12-07 18:36:48,950 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:36:48,964 INFO L225 Difference]: With dead ends: 13402 [2019-12-07 18:36:48,964 INFO L226 Difference]: Without dead ends: 13402 [2019-12-07 18:36:48,964 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:36:49,004 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13402 states. [2019-12-07 18:36:49,090 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13402 to 8169. [2019-12-07 18:36:49,090 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8169 states. [2019-12-07 18:36:49,101 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8169 states to 8169 states and 25161 transitions. [2019-12-07 18:36:49,101 INFO L78 Accepts]: Start accepts. Automaton has 8169 states and 25161 transitions. Word has length 60 [2019-12-07 18:36:49,102 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:36:49,102 INFO L462 AbstractCegarLoop]: Abstraction has 8169 states and 25161 transitions. [2019-12-07 18:36:49,102 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:36:49,102 INFO L276 IsEmpty]: Start isEmpty. Operand 8169 states and 25161 transitions. [2019-12-07 18:36:49,111 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2019-12-07 18:36:49,112 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:36:49,112 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:36:49,112 INFO L410 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:36:49,112 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:36:49,112 INFO L82 PathProgramCache]: Analyzing trace with hash 1407709555, now seen corresponding path program 1 times [2019-12-07 18:36:49,112 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:36:49,113 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1316392779] [2019-12-07 18:36:49,113 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:36:49,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:36:49,192 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:36:49,192 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1316392779] [2019-12-07 18:36:49,193 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:36:49,193 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:36:49,193 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1680259116] [2019-12-07 18:36:49,193 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:36:49,193 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:36:49,193 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:36:49,194 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:36:49,194 INFO L87 Difference]: Start difference. First operand 8169 states and 25161 transitions. Second operand 3 states. [2019-12-07 18:36:49,225 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:36:49,226 INFO L93 Difference]: Finished difference Result 7751 states and 23494 transitions. [2019-12-07 18:36:49,226 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:36:49,226 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2019-12-07 18:36:49,226 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:36:49,237 INFO L225 Difference]: With dead ends: 7751 [2019-12-07 18:36:49,237 INFO L226 Difference]: Without dead ends: 7751 [2019-12-07 18:36:49,237 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:36:49,280 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7751 states. [2019-12-07 18:36:49,347 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7751 to 7219. [2019-12-07 18:36:49,347 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7219 states. [2019-12-07 18:36:49,356 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7219 states to 7219 states and 21974 transitions. [2019-12-07 18:36:49,357 INFO L78 Accepts]: Start accepts. Automaton has 7219 states and 21974 transitions. Word has length 61 [2019-12-07 18:36:49,357 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:36:49,357 INFO L462 AbstractCegarLoop]: Abstraction has 7219 states and 21974 transitions. [2019-12-07 18:36:49,357 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:36:49,357 INFO L276 IsEmpty]: Start isEmpty. Operand 7219 states and 21974 transitions. [2019-12-07 18:36:49,362 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2019-12-07 18:36:49,362 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:36:49,362 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:36:49,363 INFO L410 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:36:49,363 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:36:49,363 INFO L82 PathProgramCache]: Analyzing trace with hash -1654475063, now seen corresponding path program 1 times [2019-12-07 18:36:49,363 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:36:49,363 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [298493467] [2019-12-07 18:36:49,363 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:36:49,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:36:49,412 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:36:49,412 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [298493467] [2019-12-07 18:36:49,412 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:36:49,412 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:36:49,412 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1724658744] [2019-12-07 18:36:49,413 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:36:49,413 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:36:49,413 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:36:49,413 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:36:49,413 INFO L87 Difference]: Start difference. First operand 7219 states and 21974 transitions. Second operand 3 states. [2019-12-07 18:36:49,438 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:36:49,438 INFO L93 Difference]: Finished difference Result 7218 states and 21972 transitions. [2019-12-07 18:36:49,438 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:36:49,438 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 62 [2019-12-07 18:36:49,438 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:36:49,446 INFO L225 Difference]: With dead ends: 7218 [2019-12-07 18:36:49,446 INFO L226 Difference]: Without dead ends: 7218 [2019-12-07 18:36:49,446 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:36:49,475 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7218 states. [2019-12-07 18:36:49,533 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7218 to 7218. [2019-12-07 18:36:49,533 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7218 states. [2019-12-07 18:36:49,543 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7218 states to 7218 states and 21972 transitions. [2019-12-07 18:36:49,544 INFO L78 Accepts]: Start accepts. Automaton has 7218 states and 21972 transitions. Word has length 62 [2019-12-07 18:36:49,544 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:36:49,544 INFO L462 AbstractCegarLoop]: Abstraction has 7218 states and 21972 transitions. [2019-12-07 18:36:49,544 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:36:49,544 INFO L276 IsEmpty]: Start isEmpty. Operand 7218 states and 21972 transitions. [2019-12-07 18:36:49,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2019-12-07 18:36:49,550 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:36:49,550 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:36:49,550 INFO L410 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:36:49,550 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:36:49,550 INFO L82 PathProgramCache]: Analyzing trace with hash 249256444, now seen corresponding path program 1 times [2019-12-07 18:36:49,550 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:36:49,551 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [805381753] [2019-12-07 18:36:49,551 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:36:49,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:36:49,612 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:36:49,613 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [805381753] [2019-12-07 18:36:49,613 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:36:49,613 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:36:49,613 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [722562538] [2019-12-07 18:36:49,614 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:36:49,614 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:36:49,614 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:36:49,614 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:36:49,614 INFO L87 Difference]: Start difference. First operand 7218 states and 21972 transitions. Second operand 4 states. [2019-12-07 18:36:49,650 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:36:49,650 INFO L93 Difference]: Finished difference Result 8682 states and 25955 transitions. [2019-12-07 18:36:49,650 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:36:49,650 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 63 [2019-12-07 18:36:49,650 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:36:49,653 INFO L225 Difference]: With dead ends: 8682 [2019-12-07 18:36:49,653 INFO L226 Difference]: Without dead ends: 2856 [2019-12-07 18:36:49,653 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:36:49,664 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2856 states. [2019-12-07 18:36:49,684 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2856 to 2856. [2019-12-07 18:36:49,684 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2856 states. [2019-12-07 18:36:49,687 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2856 states to 2856 states and 7948 transitions. [2019-12-07 18:36:49,687 INFO L78 Accepts]: Start accepts. Automaton has 2856 states and 7948 transitions. Word has length 63 [2019-12-07 18:36:49,687 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:36:49,688 INFO L462 AbstractCegarLoop]: Abstraction has 2856 states and 7948 transitions. [2019-12-07 18:36:49,688 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:36:49,688 INFO L276 IsEmpty]: Start isEmpty. Operand 2856 states and 7948 transitions. [2019-12-07 18:36:49,690 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2019-12-07 18:36:49,690 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:36:49,690 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:36:49,690 INFO L410 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:36:49,690 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:36:49,690 INFO L82 PathProgramCache]: Analyzing trace with hash 1682076282, now seen corresponding path program 2 times [2019-12-07 18:36:49,690 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:36:49,690 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1947689425] [2019-12-07 18:36:49,690 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:36:49,718 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:36:49,760 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:36:49,761 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1947689425] [2019-12-07 18:36:49,761 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:36:49,761 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:36:49,761 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1697016594] [2019-12-07 18:36:49,761 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:36:49,761 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:36:49,762 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:36:49,762 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:36:49,762 INFO L87 Difference]: Start difference. First operand 2856 states and 7948 transitions. Second operand 6 states. [2019-12-07 18:36:49,805 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:36:49,805 INFO L93 Difference]: Finished difference Result 4562 states and 12613 transitions. [2019-12-07 18:36:49,805 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:36:49,805 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 63 [2019-12-07 18:36:49,805 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:36:49,806 INFO L225 Difference]: With dead ends: 4562 [2019-12-07 18:36:49,806 INFO L226 Difference]: Without dead ends: 1937 [2019-12-07 18:36:49,807 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:36:49,816 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1937 states. [2019-12-07 18:36:49,827 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1937 to 1937. [2019-12-07 18:36:49,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1937 states. [2019-12-07 18:36:49,829 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1937 states to 1937 states and 5248 transitions. [2019-12-07 18:36:49,829 INFO L78 Accepts]: Start accepts. Automaton has 1937 states and 5248 transitions. Word has length 63 [2019-12-07 18:36:49,830 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:36:49,830 INFO L462 AbstractCegarLoop]: Abstraction has 1937 states and 5248 transitions. [2019-12-07 18:36:49,830 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:36:49,830 INFO L276 IsEmpty]: Start isEmpty. Operand 1937 states and 5248 transitions. [2019-12-07 18:36:49,831 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2019-12-07 18:36:49,831 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:36:49,831 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:36:49,831 INFO L410 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:36:49,831 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:36:49,831 INFO L82 PathProgramCache]: Analyzing trace with hash -1116199452, now seen corresponding path program 3 times [2019-12-07 18:36:49,831 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:36:49,831 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1435586403] [2019-12-07 18:36:49,831 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:36:49,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:36:49,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:36:49,934 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 18:36:49,934 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 18:36:49,936 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [959] [959] ULTIMATE.startENTRY-->L825: Formula: (let ((.cse1 (store |v_#valid_75| 0 0))) (let ((.cse0 (store .cse1 |v_~#x~0.base_140| 1))) (and (= (select (select |v_#memory_int_277| |v_~#x~0.base_140|) |v_~#x~0.offset_140|) 0) (= 0 v_~x$r_buff0_thd1~0_68) (= v_~x$r_buff1_thd3~0_58 0) (= v_~__unbuffered_p1_EAX$r_buff0_thd3~0_8 0) (= v_~x$r_buff1_thd1~0_56 0) (= v_~__unbuffered_p1_EAX$r_buff1_thd3~0_7 0) (= 0 v_~x$read_delayed_var~0.base_7) (= 0 v_~__unbuffered_p0_EAX~0_58) (= v_~__unbuffered_p1_EAX$w_buff1_used~0_8 0) (= 0 v_~x$read_delayed~0_7) (= v_~__unbuffered_p1_EAX$r_buff1_thd0~0_8 0) (= |v_#valid_73| (store .cse0 |v_ULTIMATE.start_main_~#t2000~0.base_24| 1)) (= 0 v_~weak$$choice2~0_98) (= 0 v_~x$r_buff0_thd0~0_92) (= v_~__unbuffered_p1_EAX$w_buff0~0_8 0) (= 0 v_~x$r_buff0_thd3~0_78) (= 0 v_~x$w_buff0~0_96) (= 0 v_~x$read_delayed_var~0.offset_7) (= 0 v_~__unbuffered_cnt~0_77) (= v_~main$tmp_guard0~0_54 0) (= 0 v_~x$r_buff0_thd2~0_264) (= v_~__unbuffered_p1_EAX$r_buff0_thd1~0_8 0) (= 0 v_~weak$$choice1~0_32) (= v_~__unbuffered_p1_EAX$w_buff1~0_8 0) (= v_~__unbuffered_p1_EAX$r_buff0_thd0~0_7 0) (= 0 (select .cse1 |v_~#x~0.base_140|)) (= v_~x$mem_tmp~0_39 0) (< 0 |v_#StackHeapBarrier_22|) (< |v_#StackHeapBarrier_22| |v_ULTIMATE.start_main_~#t2000~0.base_24|) (= 0 v_~x$w_buff1~0_81) (= 0 v_~__unbuffered_p1_EAX~0_61) (= v_~x$flush_delayed~0_68 0) (= 0 v_~x$r_buff1_thd2~0_177) (= v_~__unbuffered_p1_EAX$r_buff0_thd2~0_8 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t2000~0.base_24|) 0) (= v_~__unbuffered_p1_EAX$flush_delayed~0_8 0) (= 0 v_~weak$$choice0~0_17) (= v_~__unbuffered_p1_EAX$r_buff1_thd2~0_8 0) (= 0 v_~x$w_buff0_used~0_579) (= v_~__unbuffered_p1_EAX$r_buff1_thd1~0_8 0) (= v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_35 0) (= v_~y~0_85 0) (= 0 |v_#NULL.base_4|) (= 0 |v_ULTIMATE.start_main_~#t2000~0.offset_18|) (= 0 |v_~#x~0.offset_140|) (= v_~__unbuffered_p1_EAX$read_delayed~0_41 0) (= v_~main$tmp_guard1~0_32 0) (= v_~__unbuffered_p1_EAX$w_buff0_used~0_7 0) (= v_~__unbuffered_p1_EAX$read_delayed_var~0.base_35 0) (= 0 v_~x$w_buff1_used~0_346) (= |v_#length_36| (store (store |v_#length_37| |v_~#x~0.base_140| 4) |v_ULTIMATE.start_main_~#t2000~0.base_24| 4)) (= |v_#NULL.offset_4| 0) (= 0 v_~__unbuffered_p1_EAX$mem_tmp~0_8) (= (store |v_#memory_int_277| |v_ULTIMATE.start_main_~#t2000~0.base_24| (store (select |v_#memory_int_277| |v_ULTIMATE.start_main_~#t2000~0.base_24|) |v_ULTIMATE.start_main_~#t2000~0.offset_18| 0)) |v_#memory_int_276|) (< |v_#StackHeapBarrier_22| |v_~#x~0.base_140|) (= v_~x$r_buff1_thd0~0_55 0)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_22|, #valid=|v_#valid_75|, #memory_int=|v_#memory_int_277|, #length=|v_#length_37|} OutVars{ULTIMATE.start_main_#t~nondet53=|v_ULTIMATE.start_main_#t~nondet53_26|, ~x$w_buff0~0=v_~x$w_buff0~0_96, ULTIMATE.start_main_#t~nondet51=|v_ULTIMATE.start_main_#t~nondet51_10|, ~__unbuffered_p1_EAX$r_buff0_thd0~0=v_~__unbuffered_p1_EAX$r_buff0_thd0~0_7, ~__unbuffered_p1_EAX$r_buff1_thd2~0=v_~__unbuffered_p1_EAX$r_buff1_thd2~0_8, ~x$flush_delayed~0=v_~x$flush_delayed~0_68, #NULL.offset=|v_#NULL.offset_4|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_56, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_78, ULTIMATE.start_main_#t~ite64=|v_ULTIMATE.start_main_#t~ite64_59|, ~weak$$choice1~0=v_~weak$$choice1~0_32, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_58, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_61, ~__unbuffered_p1_EAX$w_buff0~0=v_~__unbuffered_p1_EAX$w_buff0~0_8, ~__unbuffered_p1_EAX$read_delayed_var~0.base=v_~__unbuffered_p1_EAX$read_delayed_var~0.base_35, #length=|v_#length_36|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_92, ULTIMATE.start_main_#t~mem54=|v_ULTIMATE.start_main_#t~mem54_26|, ~__unbuffered_p1_EAX$r_buff0_thd1~0=v_~__unbuffered_p1_EAX$r_buff0_thd1~0_8, ~#x~0.offset=|v_~#x~0.offset_140|, ~x$w_buff1~0=v_~x$w_buff1~0_81, ~__unbuffered_p1_EAX$r_buff1_thd3~0=v_~__unbuffered_p1_EAX$r_buff1_thd3~0_7, ULTIMATE.start_main_#t~ite58=|v_ULTIMATE.start_main_#t~ite58_169|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_346, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_177, ULTIMATE.start_main_#t~ite56=|v_ULTIMATE.start_main_#t~ite56_46|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ULTIMATE.start_main_#t~ite63=|v_ULTIMATE.start_main_#t~ite63_48|, ~weak$$choice0~0=v_~weak$$choice0~0_17, #StackHeapBarrier=|v_#StackHeapBarrier_22|, ~__unbuffered_p1_EAX$w_buff1_used~0=v_~__unbuffered_p1_EAX$w_buff1_used~0_8, ~__unbuffered_p1_EAX$w_buff1~0=v_~__unbuffered_p1_EAX$w_buff1~0_8, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77, ~__unbuffered_p1_EAX$r_buff0_thd2~0=v_~__unbuffered_p1_EAX$r_buff0_thd2~0_8, ~__unbuffered_p1_EAX$r_buff1_thd0~0=v_~__unbuffered_p1_EAX$r_buff1_thd0~0_8, ~__unbuffered_p1_EAX$flush_delayed~0=v_~__unbuffered_p1_EAX$flush_delayed~0_8, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_68, ULTIMATE.start_main_#t~nondet52=|v_ULTIMATE.start_main_#t~nondet52_9|, ~__unbuffered_p1_EAX$read_delayed~0=v_~__unbuffered_p1_EAX$read_delayed~0_41, ULTIMATE.start_main_#t~mem62=|v_ULTIMATE.start_main_#t~mem62_43|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_58, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_32, ~x$mem_tmp~0=v_~x$mem_tmp~0_39, ULTIMATE.start_main_~#t2002~0.offset=|v_ULTIMATE.start_main_~#t2002~0.offset_17|, ~__unbuffered_p1_EAX$mem_tmp~0=v_~__unbuffered_p1_EAX$mem_tmp~0_8, ULTIMATE.start_main_~#t2000~0.base=|v_ULTIMATE.start_main_~#t2000~0.base_24|, ~y~0=v_~y~0_85, ~__unbuffered_p1_EAX$r_buff0_thd3~0=v_~__unbuffered_p1_EAX$r_buff0_thd3~0_8, ~__unbuffered_p1_EAX$r_buff1_thd1~0=v_~__unbuffered_p1_EAX$r_buff1_thd1~0_8, ULTIMATE.start_main_#t~ite57=|v_ULTIMATE.start_main_#t~ite57_149|, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_35, ULTIMATE.start_main_~#t2001~0.offset=|v_ULTIMATE.start_main_~#t2001~0.offset_20|, ULTIMATE.start_main_#t~ite59=|v_ULTIMATE.start_main_#t~ite59_23|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_54, ULTIMATE.start_main_~#t2001~0.base=|v_ULTIMATE.start_main_~#t2001~0.base_25|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_55, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_264, ULTIMATE.start_main_#t~nondet61=|v_ULTIMATE.start_main_#t~nondet61_31|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite55=|v_ULTIMATE.start_main_#t~ite55_29|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_579, ~__unbuffered_p1_EAX$w_buff0_used~0=v_~__unbuffered_p1_EAX$w_buff0_used~0_7, ULTIMATE.start_main_~#t2002~0.base=|v_ULTIMATE.start_main_~#t2002~0.base_21|, ULTIMATE.start_main_#t~ite60=|v_ULTIMATE.start_main_#t~ite60_28|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, #valid=|v_#valid_73|, #memory_int=|v_#memory_int_276|, ~#x~0.base=|v_~#x~0.base_140|, ~weak$$choice2~0=v_~weak$$choice2~0_98, ULTIMATE.start_main_~#t2000~0.offset=|v_ULTIMATE.start_main_~#t2000~0.offset_18|, ~x$read_delayed~0=v_~x$read_delayed~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet53, ~x$w_buff0~0, ULTIMATE.start_main_#t~nondet51, ~__unbuffered_p1_EAX$r_buff0_thd0~0, ~__unbuffered_p1_EAX$r_buff1_thd2~0, ~x$flush_delayed~0, #NULL.offset, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite64, ~weak$$choice1~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, ~__unbuffered_p1_EAX$w_buff0~0, ~__unbuffered_p1_EAX$read_delayed_var~0.base, #length, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~mem54, ~__unbuffered_p1_EAX$r_buff0_thd1~0, ~#x~0.offset, ~x$w_buff1~0, ~__unbuffered_p1_EAX$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite58, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite56, ~x$read_delayed_var~0.base, ULTIMATE.start_main_#t~ite63, ~weak$$choice0~0, ~__unbuffered_p1_EAX$w_buff1_used~0, ~__unbuffered_p1_EAX$w_buff1~0, ~__unbuffered_cnt~0, ~__unbuffered_p1_EAX$r_buff0_thd2~0, ~__unbuffered_p1_EAX$r_buff1_thd0~0, ~__unbuffered_p1_EAX$flush_delayed~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~nondet52, ~__unbuffered_p1_EAX$read_delayed~0, ULTIMATE.start_main_#t~mem62, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ~x$mem_tmp~0, ULTIMATE.start_main_~#t2002~0.offset, ~__unbuffered_p1_EAX$mem_tmp~0, ULTIMATE.start_main_~#t2000~0.base, ~y~0, ~__unbuffered_p1_EAX$r_buff0_thd3~0, ~__unbuffered_p1_EAX$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite57, ~__unbuffered_p1_EAX$read_delayed_var~0.offset, ULTIMATE.start_main_~#t2001~0.offset, ULTIMATE.start_main_#t~ite59, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t2001~0.base, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet61, #NULL.base, ULTIMATE.start_main_#t~ite55, ~x$w_buff0_used~0, ~__unbuffered_p1_EAX$w_buff0_used~0, ULTIMATE.start_main_~#t2002~0.base, ULTIMATE.start_main_#t~ite60, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ~#x~0.base, ~weak$$choice2~0, ULTIMATE.start_main_~#t2000~0.offset, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 18:36:49,937 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [912] [912] L825-1-->L827: Formula: (and (= |v_ULTIMATE.start_main_~#t2001~0.offset_10| 0) (= (select |v_#valid_34| |v_ULTIMATE.start_main_~#t2001~0.base_11|) 0) (= (store |v_#memory_int_139| |v_ULTIMATE.start_main_~#t2001~0.base_11| (store (select |v_#memory_int_139| |v_ULTIMATE.start_main_~#t2001~0.base_11|) |v_ULTIMATE.start_main_~#t2001~0.offset_10| 1)) |v_#memory_int_138|) (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t2001~0.base_11| 4)) (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t2001~0.base_11| 1)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t2001~0.base_11|) (not (= 0 |v_ULTIMATE.start_main_~#t2001~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_139|, #length=|v_#length_20|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet51=|v_ULTIMATE.start_main_#t~nondet51_5|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_138|, ULTIMATE.start_main_~#t2001~0.offset=|v_ULTIMATE.start_main_~#t2001~0.offset_10|, #length=|v_#length_19|, ULTIMATE.start_main_~#t2001~0.base=|v_ULTIMATE.start_main_~#t2001~0.base_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet51, #valid, #memory_int, ULTIMATE.start_main_~#t2001~0.offset, #length, ULTIMATE.start_main_~#t2001~0.base] because there is no mapped edge [2019-12-07 18:36:49,938 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [928] [928] L827-1-->L829: Formula: (and (= |v_ULTIMATE.start_main_~#t2002~0.offset_11| 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t2002~0.base_13| 4)) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t2002~0.base_13|) (= (store |v_#memory_int_203| |v_ULTIMATE.start_main_~#t2002~0.base_13| (store (select |v_#memory_int_203| |v_ULTIMATE.start_main_~#t2002~0.base_13|) |v_ULTIMATE.start_main_~#t2002~0.offset_11| 2)) |v_#memory_int_202|) (= (select |v_#valid_44| |v_ULTIMATE.start_main_~#t2002~0.base_13|) 0) (= |v_#valid_43| (store |v_#valid_44| |v_ULTIMATE.start_main_~#t2002~0.base_13| 1)) (not (= |v_ULTIMATE.start_main_~#t2002~0.base_13| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_44|, #memory_int=|v_#memory_int_203|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t2002~0.base=|v_ULTIMATE.start_main_~#t2002~0.base_13|, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~nondet52=|v_ULTIMATE.start_main_#t~nondet52_5|, #valid=|v_#valid_43|, #memory_int=|v_#memory_int_202|, ULTIMATE.start_main_~#t2002~0.offset=|v_ULTIMATE.start_main_~#t2002~0.offset_11|, #length=|v_#length_23|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2002~0.base, ULTIMATE.start_main_#t~nondet52, #valid, #memory_int, ULTIMATE.start_main_~#t2002~0.offset, #length] because there is no mapped edge [2019-12-07 18:36:49,940 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [953] [953] L769-->L770: Formula: (let ((.cse2 (= 0 (mod ~weak$$choice2~0_In2073597236 256))) (.cse1 (= ~x$w_buff0~0_Out2073597236 ~x$w_buff0~0_In2073597236))) (or (let ((.cse0 (not (= 0 (mod ~x$r_buff0_thd2~0_In2073597236 256))))) (and (or .cse0 (not (= 0 (mod ~x$r_buff1_thd2~0_In2073597236 256)))) .cse1 (not (= 0 (mod ~x$w_buff0_used~0_In2073597236 256))) (or .cse0 (not (= (mod ~x$w_buff1_used~0_In2073597236 256) 0))) .cse2)) (and (not .cse2) .cse1))) InVars {~x$w_buff0~0=~x$w_buff0~0_In2073597236, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2073597236, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In2073597236, ~weak$$choice2~0=~weak$$choice2~0_In2073597236, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In2073597236, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2073597236} OutVars{~x$w_buff0~0=~x$w_buff0~0_Out2073597236, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2073597236, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In2073597236, P1Thread1of1ForFork0_#t~ite16=|P1Thread1of1ForFork0_#t~ite16_Out2073597236|, ~weak$$choice2~0=~weak$$choice2~0_In2073597236, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In2073597236, P1Thread1of1ForFork0_#t~ite18=|P1Thread1of1ForFork0_#t~ite18_Out2073597236|, P1Thread1of1ForFork0_#t~ite17=|P1Thread1of1ForFork0_#t~ite17_Out2073597236|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2073597236} AuxVars[] AssignedVars[~x$w_buff0~0, P1Thread1of1ForFork0_#t~ite16, P1Thread1of1ForFork0_#t~ite18, P1Thread1of1ForFork0_#t~ite17] because there is no mapped edge [2019-12-07 18:36:49,940 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L770-->L771: Formula: (and (= v_~x$w_buff1~0_31 v_~x$w_buff1~0_30) (not (= 0 (mod v_~weak$$choice2~0_25 256)))) InVars {~x$w_buff1~0=v_~x$w_buff1~0_31, ~weak$$choice2~0=v_~weak$$choice2~0_25} OutVars{P1Thread1of1ForFork0_#t~ite19=|v_P1Thread1of1ForFork0_#t~ite19_10|, P1Thread1of1ForFork0_#t~ite20=|v_P1Thread1of1ForFork0_#t~ite20_9|, P1Thread1of1ForFork0_#t~ite21=|v_P1Thread1of1ForFork0_#t~ite21_7|, ~x$w_buff1~0=v_~x$w_buff1~0_30, ~weak$$choice2~0=v_~weak$$choice2~0_25} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite19, P1Thread1of1ForFork0_#t~ite20, P1Thread1of1ForFork0_#t~ite21, ~x$w_buff1~0] because there is no mapped edge [2019-12-07 18:36:49,940 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [932] [932] L771-->L771-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In216636703 256)))) (or (and (= ~x$w_buff0_used~0_In216636703 |P1Thread1of1ForFork0_#t~ite23_Out216636703|) (= |P1Thread1of1ForFork0_#t~ite24_Out216636703| |P1Thread1of1ForFork0_#t~ite23_Out216636703|) .cse0 (let ((.cse1 (= (mod ~x$r_buff0_thd2~0_In216636703 256) 0))) (or (and .cse1 (= 0 (mod ~x$r_buff1_thd2~0_In216636703 256))) (and .cse1 (= (mod ~x$w_buff1_used~0_In216636703 256) 0)) (= 0 (mod ~x$w_buff0_used~0_In216636703 256))))) (and (= |P1Thread1of1ForFork0_#t~ite23_In216636703| |P1Thread1of1ForFork0_#t~ite23_Out216636703|) (= ~x$w_buff0_used~0_In216636703 |P1Thread1of1ForFork0_#t~ite24_Out216636703|) (not .cse0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In216636703, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In216636703, P1Thread1of1ForFork0_#t~ite23=|P1Thread1of1ForFork0_#t~ite23_In216636703|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In216636703, ~weak$$choice2~0=~weak$$choice2~0_In216636703, ~x$w_buff0_used~0=~x$w_buff0_used~0_In216636703} OutVars{P1Thread1of1ForFork0_#t~ite24=|P1Thread1of1ForFork0_#t~ite24_Out216636703|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In216636703, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In216636703, P1Thread1of1ForFork0_#t~ite23=|P1Thread1of1ForFork0_#t~ite23_Out216636703|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In216636703, ~weak$$choice2~0=~weak$$choice2~0_In216636703, ~x$w_buff0_used~0=~x$w_buff0_used~0_In216636703} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite24, P1Thread1of1ForFork0_#t~ite23] because there is no mapped edge [2019-12-07 18:36:49,941 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [931] [931] L773-->L774: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In-2101070798 256))) (.cse0 (= (mod ~weak$$choice2~0_In-2101070798 256) 0)) (.cse1 (= ~x$r_buff0_thd2~0_Out-2101070798 ~x$r_buff0_thd2~0_In-2101070798))) (or (and (not .cse0) .cse1) (and .cse0 .cse1 .cse2 (= (mod ~x$r_buff1_thd2~0_In-2101070798 256) 0)) (and .cse0 .cse1 (= 0 (mod ~x$w_buff1_used~0_In-2101070798 256)) .cse2) (and .cse0 (= (mod ~x$w_buff0_used~0_In-2101070798 256) 0) .cse1))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-2101070798, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-2101070798, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-2101070798, ~weak$$choice2~0=~weak$$choice2~0_In-2101070798, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2101070798} OutVars{P1Thread1of1ForFork0_#t~ite30=|P1Thread1of1ForFork0_#t~ite30_Out-2101070798|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2101070798, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-2101070798, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-2101070798, P1Thread1of1ForFork0_#t~ite28=|P1Thread1of1ForFork0_#t~ite28_Out-2101070798|, ~weak$$choice2~0=~weak$$choice2~0_In-2101070798, P1Thread1of1ForFork0_#t~ite29=|P1Thread1of1ForFork0_#t~ite29_Out-2101070798|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2101070798} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite30, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite28, P1Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 18:36:49,941 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L774-->L778: Formula: (and (= v_~__unbuffered_p1_EAX$read_delayed_var~0.base_12 |v_~#x~0.base_41|) (= v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_12 |v_~#x~0.offset_41|) (= (select (select |v_#memory_int_75| |v_~#x~0.base_41|) |v_~#x~0.offset_41|) v_~__unbuffered_p1_EAX~0_17) (= v_~x$r_buff1_thd2~0_56 v_~x$r_buff1_thd2~0_55) (not (= 0 (mod v_~weak$$choice2~0_24 256))) (= v_~__unbuffered_p1_EAX$read_delayed~0_13 1)) InVars {~#x~0.offset=|v_~#x~0.offset_41|, ~#x~0.base=|v_~#x~0.base_41|, #memory_int=|v_#memory_int_75|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_56, ~weak$$choice2~0=v_~weak$$choice2~0_24} OutVars{~#x~0.offset=|v_~#x~0.offset_41|, ~__unbuffered_p1_EAX$read_delayed~0=v_~__unbuffered_p1_EAX$read_delayed~0_13, P1Thread1of1ForFork0_#t~mem34=|v_P1Thread1of1ForFork0_#t~mem34_6|, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_12, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_55, P1Thread1of1ForFork0_#t~ite33=|v_P1Thread1of1ForFork0_#t~ite33_15|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_17, P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_10|, P1Thread1of1ForFork0_#t~ite32=|v_P1Thread1of1ForFork0_#t~ite32_13|, ~#x~0.base=|v_~#x~0.base_41|, #memory_int=|v_#memory_int_75|, ~__unbuffered_p1_EAX$read_delayed_var~0.base=v_~__unbuffered_p1_EAX$read_delayed_var~0.base_12, ~weak$$choice2~0=v_~weak$$choice2~0_24} AuxVars[] AssignedVars[~__unbuffered_p1_EAX~0, P1Thread1of1ForFork0_#t~ite31, ~__unbuffered_p1_EAX$read_delayed~0, P1Thread1of1ForFork0_#t~ite32, P1Thread1of1ForFork0_#t~mem34, ~__unbuffered_p1_EAX$read_delayed_var~0.base, ~__unbuffered_p1_EAX$read_delayed_var~0.offset, ~x$r_buff1_thd2~0, P1Thread1of1ForFork0_#t~ite33] because there is no mapped edge [2019-12-07 18:36:49,942 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L778-->L785: Formula: (and (= 0 v_~x$flush_delayed~0_6) (= (store |v_#memory_int_46| |v_~#x~0.base_27| (store (select |v_#memory_int_46| |v_~#x~0.base_27|) |v_~#x~0.offset_27| v_~x$mem_tmp~0_4)) |v_#memory_int_45|) (not (= 0 (mod v_~x$flush_delayed~0_7 256))) (= v_~y~0_10 1)) InVars {~#x~0.offset=|v_~#x~0.offset_27|, ~x$flush_delayed~0=v_~x$flush_delayed~0_7, #memory_int=|v_#memory_int_46|, ~#x~0.base=|v_~#x~0.base_27|, ~x$mem_tmp~0=v_~x$mem_tmp~0_4} OutVars{~x$flush_delayed~0=v_~x$flush_delayed~0_6, ~#x~0.offset=|v_~#x~0.offset_27|, P1Thread1of1ForFork0_#t~mem35=|v_P1Thread1of1ForFork0_#t~mem35_3|, #memory_int=|v_#memory_int_45|, ~#x~0.base=|v_~#x~0.base_27|, P1Thread1of1ForFork0_#t~ite36=|v_P1Thread1of1ForFork0_#t~ite36_5|, ~x$mem_tmp~0=v_~x$mem_tmp~0_4, ~y~0=v_~y~0_10} AuxVars[] AssignedVars[~x$flush_delayed~0, P1Thread1of1ForFork0_#t~mem35, #memory_int, P1Thread1of1ForFork0_#t~ite36, ~y~0] because there is no mapped edge [2019-12-07 18:36:49,942 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [869] [869] L785-2-->L785-5: Formula: (let ((.cse0 (= |P1Thread1of1ForFork0_#t~ite39_Out1445510027| |P1Thread1of1ForFork0_#t~ite38_Out1445510027|)) (.cse2 (= (mod ~x$w_buff1_used~0_In1445510027 256) 0)) (.cse1 (= (mod ~x$r_buff1_thd2~0_In1445510027 256) 0))) (or (and (= |P1Thread1of1ForFork0_#t~mem37_In1445510027| |P1Thread1of1ForFork0_#t~mem37_Out1445510027|) .cse0 (not .cse1) (= ~x$w_buff1~0_In1445510027 |P1Thread1of1ForFork0_#t~ite38_Out1445510027|) (not .cse2)) (and .cse0 (= |P1Thread1of1ForFork0_#t~mem37_Out1445510027| |P1Thread1of1ForFork0_#t~ite38_Out1445510027|) (or .cse2 .cse1) (= (select (select |#memory_int_In1445510027| |~#x~0.base_In1445510027|) |~#x~0.offset_In1445510027|) |P1Thread1of1ForFork0_#t~mem37_Out1445510027|)))) InVars {P1Thread1of1ForFork0_#t~mem37=|P1Thread1of1ForFork0_#t~mem37_In1445510027|, ~#x~0.offset=|~#x~0.offset_In1445510027|, ~x$w_buff1~0=~x$w_buff1~0_In1445510027, ~#x~0.base=|~#x~0.base_In1445510027|, #memory_int=|#memory_int_In1445510027|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1445510027, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1445510027} OutVars{P1Thread1of1ForFork0_#t~mem37=|P1Thread1of1ForFork0_#t~mem37_Out1445510027|, ~#x~0.offset=|~#x~0.offset_In1445510027|, ~x$w_buff1~0=~x$w_buff1~0_In1445510027, ~#x~0.base=|~#x~0.base_In1445510027|, #memory_int=|#memory_int_In1445510027|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1445510027, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1445510027, P1Thread1of1ForFork0_#t~ite39=|P1Thread1of1ForFork0_#t~ite39_Out1445510027|, P1Thread1of1ForFork0_#t~ite38=|P1Thread1of1ForFork0_#t~ite38_Out1445510027|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~mem37, P1Thread1of1ForFork0_#t~ite39, P1Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 18:36:49,944 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [891] [891] L802-2-->L802-4: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In-443620961 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-443620961 256)))) (or (and (= |P2Thread1of1ForFork1_#t~mem44_In-443620961| |P2Thread1of1ForFork1_#t~mem44_Out-443620961|) (not .cse0) (not .cse1) (= |P2Thread1of1ForFork1_#t~ite45_Out-443620961| ~x$w_buff1~0_In-443620961)) (and (= |P2Thread1of1ForFork1_#t~mem44_Out-443620961| |P2Thread1of1ForFork1_#t~ite45_Out-443620961|) (= (select (select |#memory_int_In-443620961| |~#x~0.base_In-443620961|) |~#x~0.offset_In-443620961|) |P2Thread1of1ForFork1_#t~mem44_Out-443620961|) (or .cse1 .cse0)))) InVars {~#x~0.offset=|~#x~0.offset_In-443620961|, ~x$w_buff1~0=~x$w_buff1~0_In-443620961, ~#x~0.base=|~#x~0.base_In-443620961|, #memory_int=|#memory_int_In-443620961|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-443620961, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-443620961, P2Thread1of1ForFork1_#t~mem44=|P2Thread1of1ForFork1_#t~mem44_In-443620961|} OutVars{~#x~0.offset=|~#x~0.offset_In-443620961|, P2Thread1of1ForFork1_#t~ite45=|P2Thread1of1ForFork1_#t~ite45_Out-443620961|, ~x$w_buff1~0=~x$w_buff1~0_In-443620961, ~#x~0.base=|~#x~0.base_In-443620961|, #memory_int=|#memory_int_In-443620961|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-443620961, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-443620961, P2Thread1of1ForFork1_#t~mem44=|P2Thread1of1ForFork1_#t~mem44_Out-443620961|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite45, P2Thread1of1ForFork1_#t~mem44] because there is no mapped edge [2019-12-07 18:36:49,944 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L786-->L786-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-1083272070 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In-1083272070 256) 0))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork0_#t~ite40_Out-1083272070| 0)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork0_#t~ite40_Out-1083272070| ~x$w_buff0_used~0_In-1083272070)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1083272070, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1083272070} OutVars{P1Thread1of1ForFork0_#t~ite40=|P1Thread1of1ForFork0_#t~ite40_Out-1083272070|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1083272070, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1083272070} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 18:36:49,944 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L787-->L787-2: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In-1345775623 256))) (.cse3 (= (mod ~x$w_buff0_used~0_In-1345775623 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-1345775623 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd2~0_In-1345775623 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork0_#t~ite41_Out-1345775623|)) (and (or .cse2 .cse3) (= |P1Thread1of1ForFork0_#t~ite41_Out-1345775623| ~x$w_buff1_used~0_In-1345775623) (or .cse0 .cse1)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1345775623, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1345775623, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1345775623, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1345775623} OutVars{P1Thread1of1ForFork0_#t~ite41=|P1Thread1of1ForFork0_#t~ite41_Out-1345775623|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1345775623, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1345775623, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1345775623, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1345775623} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 18:36:49,945 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [889] [889] L788-->L789: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In-2123560167 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-2123560167 256))) (.cse2 (= ~x$r_buff0_thd2~0_Out-2123560167 ~x$r_buff0_thd2~0_In-2123560167))) (or (and (not .cse0) (= ~x$r_buff0_thd2~0_Out-2123560167 0) (not .cse1)) (and .cse2 .cse1) (and .cse0 .cse2))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-2123560167, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2123560167} OutVars{P1Thread1of1ForFork0_#t~ite42=|P1Thread1of1ForFork0_#t~ite42_Out-2123560167|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-2123560167, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2123560167} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite42, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 18:36:49,945 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L789-->L789-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In-5072653 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd2~0_In-5072653 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In-5072653 256))) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In-5072653 256)))) (or (and (or .cse0 .cse1) (= ~x$r_buff1_thd2~0_In-5072653 |P1Thread1of1ForFork0_#t~ite43_Out-5072653|) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork0_#t~ite43_Out-5072653|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-5072653, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-5072653, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-5072653, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-5072653} OutVars{P1Thread1of1ForFork0_#t~ite43=|P1Thread1of1ForFork0_#t~ite43_Out-5072653|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-5072653, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-5072653, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-5072653, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-5072653} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 18:36:49,945 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [907] [907] L789-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|) (= v_~x$r_buff1_thd2~0_106 |v_P1Thread1of1ForFork0_#t~ite43_30|) (= (+ v_~__unbuffered_cnt~0_45 1) v_~__unbuffered_cnt~0_44)) InVars {P1Thread1of1ForFork0_#t~ite43=|v_P1Thread1of1ForFork0_#t~ite43_30|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_45} OutVars{P1Thread1of1ForFork0_#t~ite43=|v_P1Thread1of1ForFork0_#t~ite43_29|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_106, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_44, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite43, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 18:36:49,945 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L750-2-->L750-5: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff1_used~0_In2114761290 256))) (.cse0 (= |P0Thread1of1ForFork2_#t~ite4_Out2114761290| |P0Thread1of1ForFork2_#t~ite5_Out2114761290|)) (.cse1 (= 0 (mod ~x$r_buff1_thd1~0_In2114761290 256)))) (or (and .cse0 (or .cse1 .cse2) (= |P0Thread1of1ForFork2_#t~ite4_Out2114761290| |P0Thread1of1ForFork2_#t~mem3_Out2114761290|) (= |P0Thread1of1ForFork2_#t~mem3_Out2114761290| (select (select |#memory_int_In2114761290| |~#x~0.base_In2114761290|) |~#x~0.offset_In2114761290|))) (and (not .cse2) (= |P0Thread1of1ForFork2_#t~ite4_Out2114761290| ~x$w_buff1~0_In2114761290) .cse0 (= |P0Thread1of1ForFork2_#t~mem3_In2114761290| |P0Thread1of1ForFork2_#t~mem3_Out2114761290|) (not .cse1)))) InVars {P0Thread1of1ForFork2_#t~mem3=|P0Thread1of1ForFork2_#t~mem3_In2114761290|, ~#x~0.offset=|~#x~0.offset_In2114761290|, ~x$w_buff1~0=~x$w_buff1~0_In2114761290, ~#x~0.base=|~#x~0.base_In2114761290|, #memory_int=|#memory_int_In2114761290|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2114761290, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In2114761290} OutVars{P0Thread1of1ForFork2_#t~ite4=|P0Thread1of1ForFork2_#t~ite4_Out2114761290|, P0Thread1of1ForFork2_#t~mem3=|P0Thread1of1ForFork2_#t~mem3_Out2114761290|, ~#x~0.offset=|~#x~0.offset_In2114761290|, P0Thread1of1ForFork2_#t~ite5=|P0Thread1of1ForFork2_#t~ite5_Out2114761290|, ~x$w_buff1~0=~x$w_buff1~0_In2114761290, ~#x~0.base=|~#x~0.base_In2114761290|, #memory_int=|#memory_int_In2114761290|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2114761290, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In2114761290} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite4, P0Thread1of1ForFork2_#t~mem3, P0Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 18:36:49,946 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L751-->L751-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In1851040903 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In1851040903 256)))) (or (and (not .cse0) (= |P0Thread1of1ForFork2_#t~ite6_Out1851040903| 0) (not .cse1)) (and (= |P0Thread1of1ForFork2_#t~ite6_Out1851040903| ~x$w_buff0_used~0_In1851040903) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1851040903, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1851040903} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1851040903, P0Thread1of1ForFork2_#t~ite6=|P0Thread1of1ForFork2_#t~ite6_Out1851040903|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1851040903} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 18:36:49,946 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L752-->L752-2: Formula: (let ((.cse2 (= (mod ~x$r_buff1_thd1~0_In-1723651070 256) 0)) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In-1723651070 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In-1723651070 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1723651070 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork2_#t~ite7_Out-1723651070| 0)) (and (= |P0Thread1of1ForFork2_#t~ite7_Out-1723651070| ~x$w_buff1_used~0_In-1723651070) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1723651070, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1723651070, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1723651070, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1723651070} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1723651070, P0Thread1of1ForFork2_#t~ite7=|P0Thread1of1ForFork2_#t~ite7_Out-1723651070|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1723651070, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1723651070, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1723651070} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 18:36:49,947 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L753-->L754: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd1~0_In-671914974 256) 0)) (.cse2 (= (mod ~x$w_buff0_used~0_In-671914974 256) 0)) (.cse1 (= ~x$r_buff0_thd1~0_Out-671914974 ~x$r_buff0_thd1~0_In-671914974))) (or (and .cse0 .cse1) (and (= ~x$r_buff0_thd1~0_Out-671914974 0) (not .cse0) (not .cse2)) (and .cse2 .cse1))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-671914974, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-671914974} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_Out-671914974, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_Out-671914974|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-671914974} AuxVars[] AssignedVars[~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 18:36:49,947 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [892] [892] L754-->L754-2: Formula: (let ((.cse2 (= (mod ~x$w_buff1_used~0_In2104548372 256) 0)) (.cse3 (= (mod ~x$r_buff1_thd1~0_In2104548372 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In2104548372 256))) (.cse1 (= (mod ~x$r_buff0_thd1~0_In2104548372 256) 0))) (or (and (= 0 |P0Thread1of1ForFork2_#t~ite9_Out2104548372|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= ~x$r_buff1_thd1~0_In2104548372 |P0Thread1of1ForFork2_#t~ite9_Out2104548372|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2104548372, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2104548372, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In2104548372, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2104548372} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2104548372, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2104548372, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In2104548372, P0Thread1of1ForFork2_#t~ite9=|P0Thread1of1ForFork2_#t~ite9_Out2104548372|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2104548372} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 18:36:49,947 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [910] [910] L754-2-->P0EXIT: Formula: (and (= v_~__unbuffered_cnt~0_50 (+ v_~__unbuffered_cnt~0_51 1)) (= |v_P0Thread1of1ForFork2_#res.offset_3| 0) (= |v_P0Thread1of1ForFork2_#t~ite9_22| v_~x$r_buff1_thd1~0_34) (= 0 |v_P0Thread1of1ForFork2_#res.base_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_51, P0Thread1of1ForFork2_#t~ite9=|v_P0Thread1of1ForFork2_#t~ite9_22|} OutVars{P0Thread1of1ForFork2_#res.offset=|v_P0Thread1of1ForFork2_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_50, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_34, P0Thread1of1ForFork2_#t~ite9=|v_P0Thread1of1ForFork2_#t~ite9_21|, P0Thread1of1ForFork2_#res.base=|v_P0Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork2_#t~ite9, P0Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 18:36:49,947 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L802-4-->L803: Formula: (= (store |v_#memory_int_71| |v_~#x~0.base_39| (store (select |v_#memory_int_71| |v_~#x~0.base_39|) |v_~#x~0.offset_39| |v_P2Thread1of1ForFork1_#t~ite45_8|)) |v_#memory_int_70|) InVars {~#x~0.offset=|v_~#x~0.offset_39|, P2Thread1of1ForFork1_#t~ite45=|v_P2Thread1of1ForFork1_#t~ite45_8|, #memory_int=|v_#memory_int_71|, ~#x~0.base=|v_~#x~0.base_39|} OutVars{P2Thread1of1ForFork1_#t~ite46=|v_P2Thread1of1ForFork1_#t~ite46_11|, ~#x~0.offset=|v_~#x~0.offset_39|, P2Thread1of1ForFork1_#t~ite45=|v_P2Thread1of1ForFork1_#t~ite45_7|, #memory_int=|v_#memory_int_70|, ~#x~0.base=|v_~#x~0.base_39|, P2Thread1of1ForFork1_#t~mem44=|v_P2Thread1of1ForFork1_#t~mem44_5|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite46, P2Thread1of1ForFork1_#t~ite45, #memory_int, P2Thread1of1ForFork1_#t~mem44] because there is no mapped edge [2019-12-07 18:36:49,947 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [885] [885] L803-->L803-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In2126147209 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In2126147209 256)))) (or (and (= ~x$w_buff0_used~0_In2126147209 |P2Thread1of1ForFork1_#t~ite47_Out2126147209|) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P2Thread1of1ForFork1_#t~ite47_Out2126147209|) (not .cse0)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In2126147209, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2126147209} OutVars{P2Thread1of1ForFork1_#t~ite47=|P2Thread1of1ForFork1_#t~ite47_Out2126147209|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In2126147209, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2126147209} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite47] because there is no mapped edge [2019-12-07 18:36:49,948 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [888] [888] L804-->L804-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In-1447252809 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-1447252809 256))) (.cse3 (= 0 (mod ~x$r_buff0_thd3~0_In-1447252809 256))) (.cse2 (= (mod ~x$w_buff0_used~0_In-1447252809 256) 0))) (or (and (= |P2Thread1of1ForFork1_#t~ite48_Out-1447252809| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork1_#t~ite48_Out-1447252809| ~x$w_buff1_used~0_In-1447252809) (or .cse3 .cse2)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1447252809, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1447252809, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1447252809, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1447252809} OutVars{P2Thread1of1ForFork1_#t~ite48=|P2Thread1of1ForFork1_#t~ite48_Out-1447252809|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1447252809, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1447252809, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1447252809, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1447252809} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite48] because there is no mapped edge [2019-12-07 18:36:49,948 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [886] [886] L805-->L806: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-2114014848 256))) (.cse2 (= ~x$r_buff0_thd3~0_In-2114014848 ~x$r_buff0_thd3~0_Out-2114014848)) (.cse1 (= (mod ~x$r_buff0_thd3~0_In-2114014848 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 ~x$r_buff0_thd3~0_Out-2114014848)) (and .cse2 .cse0) (and .cse2 .cse1))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-2114014848, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2114014848} OutVars{P2Thread1of1ForFork1_#t~ite49=|P2Thread1of1ForFork1_#t~ite49_Out-2114014848|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_Out-2114014848, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2114014848} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite49, ~x$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 18:36:49,949 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L806-->L806-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff0_used~0_In2088449369 256))) (.cse3 (= (mod ~x$r_buff0_thd3~0_In2088449369 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In2088449369 256))) (.cse0 (= (mod ~x$w_buff1_used~0_In2088449369 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork1_#t~ite50_Out2088449369|)) (and (or .cse2 .cse3) (= ~x$r_buff1_thd3~0_In2088449369 |P2Thread1of1ForFork1_#t~ite50_Out2088449369|) (or .cse1 .cse0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In2088449369, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In2088449369, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In2088449369, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2088449369} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In2088449369, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In2088449369, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In2088449369, P2Thread1of1ForFork1_#t~ite50=|P2Thread1of1ForFork1_#t~ite50_Out2088449369|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2088449369} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite50] because there is no mapped edge [2019-12-07 18:36:49,949 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [930] [930] L806-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_57 1) v_~__unbuffered_cnt~0_56) (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= v_~x$r_buff1_thd3~0_49 |v_P2Thread1of1ForFork1_#t~ite50_40|) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57, P2Thread1of1ForFork1_#t~ite50=|v_P2Thread1of1ForFork1_#t~ite50_40|} OutVars{P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_49, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56, P2Thread1of1ForFork1_#t~ite50=|v_P2Thread1of1ForFork1_#t~ite50_39|, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#res.base, ~x$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#t~ite50, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 18:36:49,949 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [808] [808] L833-->L835-2: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (or (= 0 (mod v_~x$r_buff0_thd0~0_22 256)) (= 0 (mod v_~x$w_buff0_used~0_133 256)))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_22, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_133} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_22, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_133} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 18:36:49,949 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L835-2-->L835-4: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd0~0_In-680076473 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-680076473 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~mem54_Out-680076473| |ULTIMATE.start_main_#t~ite55_Out-680076473|) (= |ULTIMATE.start_main_#t~mem54_Out-680076473| (select (select |#memory_int_In-680076473| |~#x~0.base_In-680076473|) |~#x~0.offset_In-680076473|))) (and (not .cse1) (not .cse0) (= |ULTIMATE.start_main_#t~mem54_In-680076473| |ULTIMATE.start_main_#t~mem54_Out-680076473|) (= ~x$w_buff1~0_In-680076473 |ULTIMATE.start_main_#t~ite55_Out-680076473|)))) InVars {ULTIMATE.start_main_#t~mem54=|ULTIMATE.start_main_#t~mem54_In-680076473|, ~#x~0.offset=|~#x~0.offset_In-680076473|, ~x$w_buff1~0=~x$w_buff1~0_In-680076473, ~#x~0.base=|~#x~0.base_In-680076473|, #memory_int=|#memory_int_In-680076473|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-680076473, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-680076473} OutVars{ULTIMATE.start_main_#t~mem54=|ULTIMATE.start_main_#t~mem54_Out-680076473|, ~#x~0.offset=|~#x~0.offset_In-680076473|, ~x$w_buff1~0=~x$w_buff1~0_In-680076473, ~#x~0.base=|~#x~0.base_In-680076473|, #memory_int=|#memory_int_In-680076473|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-680076473, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-680076473, ULTIMATE.start_main_#t~ite55=|ULTIMATE.start_main_#t~ite55_Out-680076473|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem54, ULTIMATE.start_main_#t~ite55] because there is no mapped edge [2019-12-07 18:36:49,949 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [856] [856] L835-4-->L836: Formula: (= (store |v_#memory_int_79| |v_~#x~0.base_42| (store (select |v_#memory_int_79| |v_~#x~0.base_42|) |v_~#x~0.offset_42| |v_ULTIMATE.start_main_#t~ite55_8|)) |v_#memory_int_78|) InVars {~#x~0.offset=|v_~#x~0.offset_42|, #memory_int=|v_#memory_int_79|, ~#x~0.base=|v_~#x~0.base_42|, ULTIMATE.start_main_#t~ite55=|v_ULTIMATE.start_main_#t~ite55_8|} OutVars{ULTIMATE.start_main_#t~mem54=|v_ULTIMATE.start_main_#t~mem54_5|, ~#x~0.offset=|v_~#x~0.offset_42|, #memory_int=|v_#memory_int_78|, ~#x~0.base=|v_~#x~0.base_42|, ULTIMATE.start_main_#t~ite56=|v_ULTIMATE.start_main_#t~ite56_8|, ULTIMATE.start_main_#t~ite55=|v_ULTIMATE.start_main_#t~ite55_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem54, #memory_int, ULTIMATE.start_main_#t~ite56, ULTIMATE.start_main_#t~ite55] because there is no mapped edge [2019-12-07 18:36:49,949 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [884] [884] L836-->L836-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-221431766 256))) (.cse1 (= (mod ~x$r_buff0_thd0~0_In-221431766 256) 0))) (or (and (= ~x$w_buff0_used~0_In-221431766 |ULTIMATE.start_main_#t~ite57_Out-221431766|) (or .cse0 .cse1)) (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite57_Out-221431766|) (not .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-221431766, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-221431766} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-221431766, ULTIMATE.start_main_#t~ite57=|ULTIMATE.start_main_#t~ite57_Out-221431766|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-221431766} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite57] because there is no mapped edge [2019-12-07 18:36:49,950 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [867] [867] L837-->L837-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In201306404 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In201306404 256) 0)) (.cse3 (= (mod ~x$r_buff1_thd0~0_In201306404 256) 0)) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In201306404 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite58_Out201306404| 0)) (and (= |ULTIMATE.start_main_#t~ite58_Out201306404| ~x$w_buff1_used~0_In201306404) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In201306404, ~x$w_buff1_used~0=~x$w_buff1_used~0_In201306404, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In201306404, ~x$w_buff0_used~0=~x$w_buff0_used~0_In201306404} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In201306404, ULTIMATE.start_main_#t~ite58=|ULTIMATE.start_main_#t~ite58_Out201306404|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In201306404, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In201306404, ~x$w_buff0_used~0=~x$w_buff0_used~0_In201306404} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite58] because there is no mapped edge [2019-12-07 18:36:49,950 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L838-->L839: Formula: (let ((.cse1 (= ~x$r_buff0_thd0~0_Out-671787214 ~x$r_buff0_thd0~0_In-671787214)) (.cse2 (= (mod ~x$r_buff0_thd0~0_In-671787214 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-671787214 256)))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (= ~x$r_buff0_thd0~0_Out-671787214 0) (not .cse2) (not .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-671787214, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-671787214} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_Out-671787214, ULTIMATE.start_main_#t~ite59=|ULTIMATE.start_main_#t~ite59_Out-671787214|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-671787214} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite59] because there is no mapped edge [2019-12-07 18:36:49,951 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L839-->L843: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In1808458810 256))) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In1808458810 256))) (.cse5 (= ~x$r_buff1_thd0~0_Out1808458810 ~x$r_buff1_thd0~0_In1808458810)) (.cse4 (= (mod ~x$r_buff1_thd0~0_In1808458810 256) 0)) (.cse1 (= |ULTIMATE.start_main_#t~nondet61_In1808458810| ~weak$$choice1~0_Out1808458810)) (.cse3 (= ~x$r_buff1_thd0~0_Out1808458810 0)) (.cse6 (= 0 (mod ~x$w_buff1_used~0_In1808458810 256)))) (or (and (not .cse0) .cse1 (not .cse2) .cse3) (and .cse0 .cse1 .cse4 .cse5) (and .cse0 .cse6 .cse1 .cse5) (and .cse6 .cse2 .cse1 .cse5) (and .cse2 .cse1 .cse4 .cse5) (and (not .cse4) .cse1 .cse3 (not .cse6)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1808458810, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1808458810, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1808458810, ULTIMATE.start_main_#t~nondet61=|ULTIMATE.start_main_#t~nondet61_In1808458810|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1808458810} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1808458810, ~weak$$choice1~0=~weak$$choice1~0_Out1808458810, ULTIMATE.start_main_#t~ite60=|ULTIMATE.start_main_#t~ite60_Out1808458810|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1808458810, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_Out1808458810, ULTIMATE.start_main_#t~nondet61=|ULTIMATE.start_main_#t~nondet61_Out1808458810|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1808458810} AuxVars[] AssignedVars[~weak$$choice1~0, ULTIMATE.start_main_#t~ite60, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~nondet61] because there is no mapped edge [2019-12-07 18:36:49,951 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L843-->L843-3: Formula: (let ((.cse0 (= (mod ~weak$$choice1~0_In-909317594 256) 0)) (.cse1 (not (= (mod ~__unbuffered_p1_EAX$read_delayed~0_In-909317594 256) 0)))) (or (and .cse0 (= |ULTIMATE.start_main_#t~ite63_Out-909317594| ~__unbuffered_p1_EAX~0_In-909317594) (= |ULTIMATE.start_main_#t~mem62_In-909317594| |ULTIMATE.start_main_#t~mem62_Out-909317594|) .cse1) (and (= |ULTIMATE.start_main_#t~mem62_Out-909317594| (select (select |#memory_int_In-909317594| ~__unbuffered_p1_EAX$read_delayed_var~0.base_In-909317594) ~__unbuffered_p1_EAX$read_delayed_var~0.offset_In-909317594)) (= |ULTIMATE.start_main_#t~mem62_Out-909317594| |ULTIMATE.start_main_#t~ite63_Out-909317594|) (not .cse0) .cse1))) InVars {~weak$$choice1~0=~weak$$choice1~0_In-909317594, ~__unbuffered_p1_EAX~0=~__unbuffered_p1_EAX~0_In-909317594, ~__unbuffered_p1_EAX$read_delayed~0=~__unbuffered_p1_EAX$read_delayed~0_In-909317594, ULTIMATE.start_main_#t~mem62=|ULTIMATE.start_main_#t~mem62_In-909317594|, ~__unbuffered_p1_EAX$read_delayed_var~0.base=~__unbuffered_p1_EAX$read_delayed_var~0.base_In-909317594, #memory_int=|#memory_int_In-909317594|, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=~__unbuffered_p1_EAX$read_delayed_var~0.offset_In-909317594} OutVars{ULTIMATE.start_main_#t~ite63=|ULTIMATE.start_main_#t~ite63_Out-909317594|, ~weak$$choice1~0=~weak$$choice1~0_In-909317594, ~__unbuffered_p1_EAX~0=~__unbuffered_p1_EAX~0_In-909317594, ~__unbuffered_p1_EAX$read_delayed~0=~__unbuffered_p1_EAX$read_delayed~0_In-909317594, ULTIMATE.start_main_#t~mem62=|ULTIMATE.start_main_#t~mem62_Out-909317594|, ~__unbuffered_p1_EAX$read_delayed_var~0.base=~__unbuffered_p1_EAX$read_delayed_var~0.base_In-909317594, #memory_int=|#memory_int_In-909317594|, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=~__unbuffered_p1_EAX$read_delayed_var~0.offset_In-909317594} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite63, ULTIMATE.start_main_#t~mem62] because there is no mapped edge [2019-12-07 18:36:49,951 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] L843-3-->L4: Formula: (and (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (let ((.cse1 (= v_~y~0_36 2)) (.cse4 (= 1 v_~__unbuffered_p1_EAX~0_27)) (.cse3 (= 2 v_~__unbuffered_p0_EAX~0_31)) (.cse0 (= v_~main$tmp_guard1~0_17 1)) (.cse2 (= |v_ULTIMATE.start_main_#t~ite63_28| v_~__unbuffered_p1_EAX~0_27))) (or (and .cse0 (not .cse1) .cse2) (and (= v_~main$tmp_guard1~0_17 0) .cse3 .cse4 .cse2 .cse1) (and .cse0 (not .cse4) .cse2) (and (not .cse3) .cse0 .cse2)))) InVars {ULTIMATE.start_main_#t~ite63=|v_ULTIMATE.start_main_#t~ite63_28|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_31, ~y~0=v_~y~0_36} OutVars{ULTIMATE.start_main_#t~ite63=|v_ULTIMATE.start_main_#t~ite63_27|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_31, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_8, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_27, ULTIMATE.start_main_#t~mem62=|v_ULTIMATE.start_main_#t~mem62_21|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~y~0=v_~y~0_36, ULTIMATE.start_main_#t~ite64=|v_ULTIMATE.start_main_#t~ite64_29|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite63, ULTIMATE.start___VERIFIER_assert_~expression, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_#t~mem62, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite64, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:36:49,951 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [927] [927] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 18:36:49,999 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 06:36:49 BasicIcfg [2019-12-07 18:36:49,999 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 18:36:49,999 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 18:36:49,999 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 18:36:49,999 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 18:36:50,000 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:36:27" (3/4) ... [2019-12-07 18:36:50,001 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 18:36:50,001 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [959] [959] ULTIMATE.startENTRY-->L825: Formula: (let ((.cse1 (store |v_#valid_75| 0 0))) (let ((.cse0 (store .cse1 |v_~#x~0.base_140| 1))) (and (= (select (select |v_#memory_int_277| |v_~#x~0.base_140|) |v_~#x~0.offset_140|) 0) (= 0 v_~x$r_buff0_thd1~0_68) (= v_~x$r_buff1_thd3~0_58 0) (= v_~__unbuffered_p1_EAX$r_buff0_thd3~0_8 0) (= v_~x$r_buff1_thd1~0_56 0) (= v_~__unbuffered_p1_EAX$r_buff1_thd3~0_7 0) (= 0 v_~x$read_delayed_var~0.base_7) (= 0 v_~__unbuffered_p0_EAX~0_58) (= v_~__unbuffered_p1_EAX$w_buff1_used~0_8 0) (= 0 v_~x$read_delayed~0_7) (= v_~__unbuffered_p1_EAX$r_buff1_thd0~0_8 0) (= |v_#valid_73| (store .cse0 |v_ULTIMATE.start_main_~#t2000~0.base_24| 1)) (= 0 v_~weak$$choice2~0_98) (= 0 v_~x$r_buff0_thd0~0_92) (= v_~__unbuffered_p1_EAX$w_buff0~0_8 0) (= 0 v_~x$r_buff0_thd3~0_78) (= 0 v_~x$w_buff0~0_96) (= 0 v_~x$read_delayed_var~0.offset_7) (= 0 v_~__unbuffered_cnt~0_77) (= v_~main$tmp_guard0~0_54 0) (= 0 v_~x$r_buff0_thd2~0_264) (= v_~__unbuffered_p1_EAX$r_buff0_thd1~0_8 0) (= 0 v_~weak$$choice1~0_32) (= v_~__unbuffered_p1_EAX$w_buff1~0_8 0) (= v_~__unbuffered_p1_EAX$r_buff0_thd0~0_7 0) (= 0 (select .cse1 |v_~#x~0.base_140|)) (= v_~x$mem_tmp~0_39 0) (< 0 |v_#StackHeapBarrier_22|) (< |v_#StackHeapBarrier_22| |v_ULTIMATE.start_main_~#t2000~0.base_24|) (= 0 v_~x$w_buff1~0_81) (= 0 v_~__unbuffered_p1_EAX~0_61) (= v_~x$flush_delayed~0_68 0) (= 0 v_~x$r_buff1_thd2~0_177) (= v_~__unbuffered_p1_EAX$r_buff0_thd2~0_8 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t2000~0.base_24|) 0) (= v_~__unbuffered_p1_EAX$flush_delayed~0_8 0) (= 0 v_~weak$$choice0~0_17) (= v_~__unbuffered_p1_EAX$r_buff1_thd2~0_8 0) (= 0 v_~x$w_buff0_used~0_579) (= v_~__unbuffered_p1_EAX$r_buff1_thd1~0_8 0) (= v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_35 0) (= v_~y~0_85 0) (= 0 |v_#NULL.base_4|) (= 0 |v_ULTIMATE.start_main_~#t2000~0.offset_18|) (= 0 |v_~#x~0.offset_140|) (= v_~__unbuffered_p1_EAX$read_delayed~0_41 0) (= v_~main$tmp_guard1~0_32 0) (= v_~__unbuffered_p1_EAX$w_buff0_used~0_7 0) (= v_~__unbuffered_p1_EAX$read_delayed_var~0.base_35 0) (= 0 v_~x$w_buff1_used~0_346) (= |v_#length_36| (store (store |v_#length_37| |v_~#x~0.base_140| 4) |v_ULTIMATE.start_main_~#t2000~0.base_24| 4)) (= |v_#NULL.offset_4| 0) (= 0 v_~__unbuffered_p1_EAX$mem_tmp~0_8) (= (store |v_#memory_int_277| |v_ULTIMATE.start_main_~#t2000~0.base_24| (store (select |v_#memory_int_277| |v_ULTIMATE.start_main_~#t2000~0.base_24|) |v_ULTIMATE.start_main_~#t2000~0.offset_18| 0)) |v_#memory_int_276|) (< |v_#StackHeapBarrier_22| |v_~#x~0.base_140|) (= v_~x$r_buff1_thd0~0_55 0)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_22|, #valid=|v_#valid_75|, #memory_int=|v_#memory_int_277|, #length=|v_#length_37|} OutVars{ULTIMATE.start_main_#t~nondet53=|v_ULTIMATE.start_main_#t~nondet53_26|, ~x$w_buff0~0=v_~x$w_buff0~0_96, ULTIMATE.start_main_#t~nondet51=|v_ULTIMATE.start_main_#t~nondet51_10|, ~__unbuffered_p1_EAX$r_buff0_thd0~0=v_~__unbuffered_p1_EAX$r_buff0_thd0~0_7, ~__unbuffered_p1_EAX$r_buff1_thd2~0=v_~__unbuffered_p1_EAX$r_buff1_thd2~0_8, ~x$flush_delayed~0=v_~x$flush_delayed~0_68, #NULL.offset=|v_#NULL.offset_4|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_56, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_78, ULTIMATE.start_main_#t~ite64=|v_ULTIMATE.start_main_#t~ite64_59|, ~weak$$choice1~0=v_~weak$$choice1~0_32, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_58, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_61, ~__unbuffered_p1_EAX$w_buff0~0=v_~__unbuffered_p1_EAX$w_buff0~0_8, ~__unbuffered_p1_EAX$read_delayed_var~0.base=v_~__unbuffered_p1_EAX$read_delayed_var~0.base_35, #length=|v_#length_36|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_92, ULTIMATE.start_main_#t~mem54=|v_ULTIMATE.start_main_#t~mem54_26|, ~__unbuffered_p1_EAX$r_buff0_thd1~0=v_~__unbuffered_p1_EAX$r_buff0_thd1~0_8, ~#x~0.offset=|v_~#x~0.offset_140|, ~x$w_buff1~0=v_~x$w_buff1~0_81, ~__unbuffered_p1_EAX$r_buff1_thd3~0=v_~__unbuffered_p1_EAX$r_buff1_thd3~0_7, ULTIMATE.start_main_#t~ite58=|v_ULTIMATE.start_main_#t~ite58_169|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_346, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_177, ULTIMATE.start_main_#t~ite56=|v_ULTIMATE.start_main_#t~ite56_46|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ULTIMATE.start_main_#t~ite63=|v_ULTIMATE.start_main_#t~ite63_48|, ~weak$$choice0~0=v_~weak$$choice0~0_17, #StackHeapBarrier=|v_#StackHeapBarrier_22|, ~__unbuffered_p1_EAX$w_buff1_used~0=v_~__unbuffered_p1_EAX$w_buff1_used~0_8, ~__unbuffered_p1_EAX$w_buff1~0=v_~__unbuffered_p1_EAX$w_buff1~0_8, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_77, ~__unbuffered_p1_EAX$r_buff0_thd2~0=v_~__unbuffered_p1_EAX$r_buff0_thd2~0_8, ~__unbuffered_p1_EAX$r_buff1_thd0~0=v_~__unbuffered_p1_EAX$r_buff1_thd0~0_8, ~__unbuffered_p1_EAX$flush_delayed~0=v_~__unbuffered_p1_EAX$flush_delayed~0_8, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_68, ULTIMATE.start_main_#t~nondet52=|v_ULTIMATE.start_main_#t~nondet52_9|, ~__unbuffered_p1_EAX$read_delayed~0=v_~__unbuffered_p1_EAX$read_delayed~0_41, ULTIMATE.start_main_#t~mem62=|v_ULTIMATE.start_main_#t~mem62_43|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_58, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_32, ~x$mem_tmp~0=v_~x$mem_tmp~0_39, ULTIMATE.start_main_~#t2002~0.offset=|v_ULTIMATE.start_main_~#t2002~0.offset_17|, ~__unbuffered_p1_EAX$mem_tmp~0=v_~__unbuffered_p1_EAX$mem_tmp~0_8, ULTIMATE.start_main_~#t2000~0.base=|v_ULTIMATE.start_main_~#t2000~0.base_24|, ~y~0=v_~y~0_85, ~__unbuffered_p1_EAX$r_buff0_thd3~0=v_~__unbuffered_p1_EAX$r_buff0_thd3~0_8, ~__unbuffered_p1_EAX$r_buff1_thd1~0=v_~__unbuffered_p1_EAX$r_buff1_thd1~0_8, ULTIMATE.start_main_#t~ite57=|v_ULTIMATE.start_main_#t~ite57_149|, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_35, ULTIMATE.start_main_~#t2001~0.offset=|v_ULTIMATE.start_main_~#t2001~0.offset_20|, ULTIMATE.start_main_#t~ite59=|v_ULTIMATE.start_main_#t~ite59_23|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_54, ULTIMATE.start_main_~#t2001~0.base=|v_ULTIMATE.start_main_~#t2001~0.base_25|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_55, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_264, ULTIMATE.start_main_#t~nondet61=|v_ULTIMATE.start_main_#t~nondet61_31|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite55=|v_ULTIMATE.start_main_#t~ite55_29|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_579, ~__unbuffered_p1_EAX$w_buff0_used~0=v_~__unbuffered_p1_EAX$w_buff0_used~0_7, ULTIMATE.start_main_~#t2002~0.base=|v_ULTIMATE.start_main_~#t2002~0.base_21|, ULTIMATE.start_main_#t~ite60=|v_ULTIMATE.start_main_#t~ite60_28|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, #valid=|v_#valid_73|, #memory_int=|v_#memory_int_276|, ~#x~0.base=|v_~#x~0.base_140|, ~weak$$choice2~0=v_~weak$$choice2~0_98, ULTIMATE.start_main_~#t2000~0.offset=|v_ULTIMATE.start_main_~#t2000~0.offset_18|, ~x$read_delayed~0=v_~x$read_delayed~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet53, ~x$w_buff0~0, ULTIMATE.start_main_#t~nondet51, ~__unbuffered_p1_EAX$r_buff0_thd0~0, ~__unbuffered_p1_EAX$r_buff1_thd2~0, ~x$flush_delayed~0, #NULL.offset, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite64, ~weak$$choice1~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, ~__unbuffered_p1_EAX$w_buff0~0, ~__unbuffered_p1_EAX$read_delayed_var~0.base, #length, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~mem54, ~__unbuffered_p1_EAX$r_buff0_thd1~0, ~#x~0.offset, ~x$w_buff1~0, ~__unbuffered_p1_EAX$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite58, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite56, ~x$read_delayed_var~0.base, ULTIMATE.start_main_#t~ite63, ~weak$$choice0~0, ~__unbuffered_p1_EAX$w_buff1_used~0, ~__unbuffered_p1_EAX$w_buff1~0, ~__unbuffered_cnt~0, ~__unbuffered_p1_EAX$r_buff0_thd2~0, ~__unbuffered_p1_EAX$r_buff1_thd0~0, ~__unbuffered_p1_EAX$flush_delayed~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~nondet52, ~__unbuffered_p1_EAX$read_delayed~0, ULTIMATE.start_main_#t~mem62, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ~x$mem_tmp~0, ULTIMATE.start_main_~#t2002~0.offset, ~__unbuffered_p1_EAX$mem_tmp~0, ULTIMATE.start_main_~#t2000~0.base, ~y~0, ~__unbuffered_p1_EAX$r_buff0_thd3~0, ~__unbuffered_p1_EAX$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite57, ~__unbuffered_p1_EAX$read_delayed_var~0.offset, ULTIMATE.start_main_~#t2001~0.offset, ULTIMATE.start_main_#t~ite59, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t2001~0.base, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet61, #NULL.base, ULTIMATE.start_main_#t~ite55, ~x$w_buff0_used~0, ~__unbuffered_p1_EAX$w_buff0_used~0, ULTIMATE.start_main_~#t2002~0.base, ULTIMATE.start_main_#t~ite60, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ~#x~0.base, ~weak$$choice2~0, ULTIMATE.start_main_~#t2000~0.offset, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 18:36:50,002 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [912] [912] L825-1-->L827: Formula: (and (= |v_ULTIMATE.start_main_~#t2001~0.offset_10| 0) (= (select |v_#valid_34| |v_ULTIMATE.start_main_~#t2001~0.base_11|) 0) (= (store |v_#memory_int_139| |v_ULTIMATE.start_main_~#t2001~0.base_11| (store (select |v_#memory_int_139| |v_ULTIMATE.start_main_~#t2001~0.base_11|) |v_ULTIMATE.start_main_~#t2001~0.offset_10| 1)) |v_#memory_int_138|) (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t2001~0.base_11| 4)) (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t2001~0.base_11| 1)) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t2001~0.base_11|) (not (= 0 |v_ULTIMATE.start_main_~#t2001~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_139|, #length=|v_#length_20|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet51=|v_ULTIMATE.start_main_#t~nondet51_5|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_138|, ULTIMATE.start_main_~#t2001~0.offset=|v_ULTIMATE.start_main_~#t2001~0.offset_10|, #length=|v_#length_19|, ULTIMATE.start_main_~#t2001~0.base=|v_ULTIMATE.start_main_~#t2001~0.base_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet51, #valid, #memory_int, ULTIMATE.start_main_~#t2001~0.offset, #length, ULTIMATE.start_main_~#t2001~0.base] because there is no mapped edge [2019-12-07 18:36:50,002 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [928] [928] L827-1-->L829: Formula: (and (= |v_ULTIMATE.start_main_~#t2002~0.offset_11| 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t2002~0.base_13| 4)) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t2002~0.base_13|) (= (store |v_#memory_int_203| |v_ULTIMATE.start_main_~#t2002~0.base_13| (store (select |v_#memory_int_203| |v_ULTIMATE.start_main_~#t2002~0.base_13|) |v_ULTIMATE.start_main_~#t2002~0.offset_11| 2)) |v_#memory_int_202|) (= (select |v_#valid_44| |v_ULTIMATE.start_main_~#t2002~0.base_13|) 0) (= |v_#valid_43| (store |v_#valid_44| |v_ULTIMATE.start_main_~#t2002~0.base_13| 1)) (not (= |v_ULTIMATE.start_main_~#t2002~0.base_13| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_44|, #memory_int=|v_#memory_int_203|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t2002~0.base=|v_ULTIMATE.start_main_~#t2002~0.base_13|, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~nondet52=|v_ULTIMATE.start_main_#t~nondet52_5|, #valid=|v_#valid_43|, #memory_int=|v_#memory_int_202|, ULTIMATE.start_main_~#t2002~0.offset=|v_ULTIMATE.start_main_~#t2002~0.offset_11|, #length=|v_#length_23|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2002~0.base, ULTIMATE.start_main_#t~nondet52, #valid, #memory_int, ULTIMATE.start_main_~#t2002~0.offset, #length] because there is no mapped edge [2019-12-07 18:36:50,004 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [953] [953] L769-->L770: Formula: (let ((.cse2 (= 0 (mod ~weak$$choice2~0_In2073597236 256))) (.cse1 (= ~x$w_buff0~0_Out2073597236 ~x$w_buff0~0_In2073597236))) (or (let ((.cse0 (not (= 0 (mod ~x$r_buff0_thd2~0_In2073597236 256))))) (and (or .cse0 (not (= 0 (mod ~x$r_buff1_thd2~0_In2073597236 256)))) .cse1 (not (= 0 (mod ~x$w_buff0_used~0_In2073597236 256))) (or .cse0 (not (= (mod ~x$w_buff1_used~0_In2073597236 256) 0))) .cse2)) (and (not .cse2) .cse1))) InVars {~x$w_buff0~0=~x$w_buff0~0_In2073597236, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2073597236, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In2073597236, ~weak$$choice2~0=~weak$$choice2~0_In2073597236, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In2073597236, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2073597236} OutVars{~x$w_buff0~0=~x$w_buff0~0_Out2073597236, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2073597236, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In2073597236, P1Thread1of1ForFork0_#t~ite16=|P1Thread1of1ForFork0_#t~ite16_Out2073597236|, ~weak$$choice2~0=~weak$$choice2~0_In2073597236, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In2073597236, P1Thread1of1ForFork0_#t~ite18=|P1Thread1of1ForFork0_#t~ite18_Out2073597236|, P1Thread1of1ForFork0_#t~ite17=|P1Thread1of1ForFork0_#t~ite17_Out2073597236|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2073597236} AuxVars[] AssignedVars[~x$w_buff0~0, P1Thread1of1ForFork0_#t~ite16, P1Thread1of1ForFork0_#t~ite18, P1Thread1of1ForFork0_#t~ite17] because there is no mapped edge [2019-12-07 18:36:50,004 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L770-->L771: Formula: (and (= v_~x$w_buff1~0_31 v_~x$w_buff1~0_30) (not (= 0 (mod v_~weak$$choice2~0_25 256)))) InVars {~x$w_buff1~0=v_~x$w_buff1~0_31, ~weak$$choice2~0=v_~weak$$choice2~0_25} OutVars{P1Thread1of1ForFork0_#t~ite19=|v_P1Thread1of1ForFork0_#t~ite19_10|, P1Thread1of1ForFork0_#t~ite20=|v_P1Thread1of1ForFork0_#t~ite20_9|, P1Thread1of1ForFork0_#t~ite21=|v_P1Thread1of1ForFork0_#t~ite21_7|, ~x$w_buff1~0=v_~x$w_buff1~0_30, ~weak$$choice2~0=v_~weak$$choice2~0_25} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite19, P1Thread1of1ForFork0_#t~ite20, P1Thread1of1ForFork0_#t~ite21, ~x$w_buff1~0] because there is no mapped edge [2019-12-07 18:36:50,004 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [932] [932] L771-->L771-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In216636703 256)))) (or (and (= ~x$w_buff0_used~0_In216636703 |P1Thread1of1ForFork0_#t~ite23_Out216636703|) (= |P1Thread1of1ForFork0_#t~ite24_Out216636703| |P1Thread1of1ForFork0_#t~ite23_Out216636703|) .cse0 (let ((.cse1 (= (mod ~x$r_buff0_thd2~0_In216636703 256) 0))) (or (and .cse1 (= 0 (mod ~x$r_buff1_thd2~0_In216636703 256))) (and .cse1 (= (mod ~x$w_buff1_used~0_In216636703 256) 0)) (= 0 (mod ~x$w_buff0_used~0_In216636703 256))))) (and (= |P1Thread1of1ForFork0_#t~ite23_In216636703| |P1Thread1of1ForFork0_#t~ite23_Out216636703|) (= ~x$w_buff0_used~0_In216636703 |P1Thread1of1ForFork0_#t~ite24_Out216636703|) (not .cse0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In216636703, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In216636703, P1Thread1of1ForFork0_#t~ite23=|P1Thread1of1ForFork0_#t~ite23_In216636703|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In216636703, ~weak$$choice2~0=~weak$$choice2~0_In216636703, ~x$w_buff0_used~0=~x$w_buff0_used~0_In216636703} OutVars{P1Thread1of1ForFork0_#t~ite24=|P1Thread1of1ForFork0_#t~ite24_Out216636703|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In216636703, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In216636703, P1Thread1of1ForFork0_#t~ite23=|P1Thread1of1ForFork0_#t~ite23_Out216636703|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In216636703, ~weak$$choice2~0=~weak$$choice2~0_In216636703, ~x$w_buff0_used~0=~x$w_buff0_used~0_In216636703} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite24, P1Thread1of1ForFork0_#t~ite23] because there is no mapped edge [2019-12-07 18:36:50,005 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [931] [931] L773-->L774: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In-2101070798 256))) (.cse0 (= (mod ~weak$$choice2~0_In-2101070798 256) 0)) (.cse1 (= ~x$r_buff0_thd2~0_Out-2101070798 ~x$r_buff0_thd2~0_In-2101070798))) (or (and (not .cse0) .cse1) (and .cse0 .cse1 .cse2 (= (mod ~x$r_buff1_thd2~0_In-2101070798 256) 0)) (and .cse0 .cse1 (= 0 (mod ~x$w_buff1_used~0_In-2101070798 256)) .cse2) (and .cse0 (= (mod ~x$w_buff0_used~0_In-2101070798 256) 0) .cse1))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-2101070798, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-2101070798, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-2101070798, ~weak$$choice2~0=~weak$$choice2~0_In-2101070798, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2101070798} OutVars{P1Thread1of1ForFork0_#t~ite30=|P1Thread1of1ForFork0_#t~ite30_Out-2101070798|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2101070798, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-2101070798, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-2101070798, P1Thread1of1ForFork0_#t~ite28=|P1Thread1of1ForFork0_#t~ite28_Out-2101070798|, ~weak$$choice2~0=~weak$$choice2~0_In-2101070798, P1Thread1of1ForFork0_#t~ite29=|P1Thread1of1ForFork0_#t~ite29_Out-2101070798|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2101070798} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite30, ~x$r_buff0_thd2~0, P1Thread1of1ForFork0_#t~ite28, P1Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 18:36:50,005 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L774-->L778: Formula: (and (= v_~__unbuffered_p1_EAX$read_delayed_var~0.base_12 |v_~#x~0.base_41|) (= v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_12 |v_~#x~0.offset_41|) (= (select (select |v_#memory_int_75| |v_~#x~0.base_41|) |v_~#x~0.offset_41|) v_~__unbuffered_p1_EAX~0_17) (= v_~x$r_buff1_thd2~0_56 v_~x$r_buff1_thd2~0_55) (not (= 0 (mod v_~weak$$choice2~0_24 256))) (= v_~__unbuffered_p1_EAX$read_delayed~0_13 1)) InVars {~#x~0.offset=|v_~#x~0.offset_41|, ~#x~0.base=|v_~#x~0.base_41|, #memory_int=|v_#memory_int_75|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_56, ~weak$$choice2~0=v_~weak$$choice2~0_24} OutVars{~#x~0.offset=|v_~#x~0.offset_41|, ~__unbuffered_p1_EAX$read_delayed~0=v_~__unbuffered_p1_EAX$read_delayed~0_13, P1Thread1of1ForFork0_#t~mem34=|v_P1Thread1of1ForFork0_#t~mem34_6|, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=v_~__unbuffered_p1_EAX$read_delayed_var~0.offset_12, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_55, P1Thread1of1ForFork0_#t~ite33=|v_P1Thread1of1ForFork0_#t~ite33_15|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_17, P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_10|, P1Thread1of1ForFork0_#t~ite32=|v_P1Thread1of1ForFork0_#t~ite32_13|, ~#x~0.base=|v_~#x~0.base_41|, #memory_int=|v_#memory_int_75|, ~__unbuffered_p1_EAX$read_delayed_var~0.base=v_~__unbuffered_p1_EAX$read_delayed_var~0.base_12, ~weak$$choice2~0=v_~weak$$choice2~0_24} AuxVars[] AssignedVars[~__unbuffered_p1_EAX~0, P1Thread1of1ForFork0_#t~ite31, ~__unbuffered_p1_EAX$read_delayed~0, P1Thread1of1ForFork0_#t~ite32, P1Thread1of1ForFork0_#t~mem34, ~__unbuffered_p1_EAX$read_delayed_var~0.base, ~__unbuffered_p1_EAX$read_delayed_var~0.offset, ~x$r_buff1_thd2~0, P1Thread1of1ForFork0_#t~ite33] because there is no mapped edge [2019-12-07 18:36:50,005 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L778-->L785: Formula: (and (= 0 v_~x$flush_delayed~0_6) (= (store |v_#memory_int_46| |v_~#x~0.base_27| (store (select |v_#memory_int_46| |v_~#x~0.base_27|) |v_~#x~0.offset_27| v_~x$mem_tmp~0_4)) |v_#memory_int_45|) (not (= 0 (mod v_~x$flush_delayed~0_7 256))) (= v_~y~0_10 1)) InVars {~#x~0.offset=|v_~#x~0.offset_27|, ~x$flush_delayed~0=v_~x$flush_delayed~0_7, #memory_int=|v_#memory_int_46|, ~#x~0.base=|v_~#x~0.base_27|, ~x$mem_tmp~0=v_~x$mem_tmp~0_4} OutVars{~x$flush_delayed~0=v_~x$flush_delayed~0_6, ~#x~0.offset=|v_~#x~0.offset_27|, P1Thread1of1ForFork0_#t~mem35=|v_P1Thread1of1ForFork0_#t~mem35_3|, #memory_int=|v_#memory_int_45|, ~#x~0.base=|v_~#x~0.base_27|, P1Thread1of1ForFork0_#t~ite36=|v_P1Thread1of1ForFork0_#t~ite36_5|, ~x$mem_tmp~0=v_~x$mem_tmp~0_4, ~y~0=v_~y~0_10} AuxVars[] AssignedVars[~x$flush_delayed~0, P1Thread1of1ForFork0_#t~mem35, #memory_int, P1Thread1of1ForFork0_#t~ite36, ~y~0] because there is no mapped edge [2019-12-07 18:36:50,006 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [869] [869] L785-2-->L785-5: Formula: (let ((.cse0 (= |P1Thread1of1ForFork0_#t~ite39_Out1445510027| |P1Thread1of1ForFork0_#t~ite38_Out1445510027|)) (.cse2 (= (mod ~x$w_buff1_used~0_In1445510027 256) 0)) (.cse1 (= (mod ~x$r_buff1_thd2~0_In1445510027 256) 0))) (or (and (= |P1Thread1of1ForFork0_#t~mem37_In1445510027| |P1Thread1of1ForFork0_#t~mem37_Out1445510027|) .cse0 (not .cse1) (= ~x$w_buff1~0_In1445510027 |P1Thread1of1ForFork0_#t~ite38_Out1445510027|) (not .cse2)) (and .cse0 (= |P1Thread1of1ForFork0_#t~mem37_Out1445510027| |P1Thread1of1ForFork0_#t~ite38_Out1445510027|) (or .cse2 .cse1) (= (select (select |#memory_int_In1445510027| |~#x~0.base_In1445510027|) |~#x~0.offset_In1445510027|) |P1Thread1of1ForFork0_#t~mem37_Out1445510027|)))) InVars {P1Thread1of1ForFork0_#t~mem37=|P1Thread1of1ForFork0_#t~mem37_In1445510027|, ~#x~0.offset=|~#x~0.offset_In1445510027|, ~x$w_buff1~0=~x$w_buff1~0_In1445510027, ~#x~0.base=|~#x~0.base_In1445510027|, #memory_int=|#memory_int_In1445510027|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1445510027, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1445510027} OutVars{P1Thread1of1ForFork0_#t~mem37=|P1Thread1of1ForFork0_#t~mem37_Out1445510027|, ~#x~0.offset=|~#x~0.offset_In1445510027|, ~x$w_buff1~0=~x$w_buff1~0_In1445510027, ~#x~0.base=|~#x~0.base_In1445510027|, #memory_int=|#memory_int_In1445510027|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1445510027, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1445510027, P1Thread1of1ForFork0_#t~ite39=|P1Thread1of1ForFork0_#t~ite39_Out1445510027|, P1Thread1of1ForFork0_#t~ite38=|P1Thread1of1ForFork0_#t~ite38_Out1445510027|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~mem37, P1Thread1of1ForFork0_#t~ite39, P1Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 18:36:50,007 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [891] [891] L802-2-->L802-4: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In-443620961 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-443620961 256)))) (or (and (= |P2Thread1of1ForFork1_#t~mem44_In-443620961| |P2Thread1of1ForFork1_#t~mem44_Out-443620961|) (not .cse0) (not .cse1) (= |P2Thread1of1ForFork1_#t~ite45_Out-443620961| ~x$w_buff1~0_In-443620961)) (and (= |P2Thread1of1ForFork1_#t~mem44_Out-443620961| |P2Thread1of1ForFork1_#t~ite45_Out-443620961|) (= (select (select |#memory_int_In-443620961| |~#x~0.base_In-443620961|) |~#x~0.offset_In-443620961|) |P2Thread1of1ForFork1_#t~mem44_Out-443620961|) (or .cse1 .cse0)))) InVars {~#x~0.offset=|~#x~0.offset_In-443620961|, ~x$w_buff1~0=~x$w_buff1~0_In-443620961, ~#x~0.base=|~#x~0.base_In-443620961|, #memory_int=|#memory_int_In-443620961|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-443620961, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-443620961, P2Thread1of1ForFork1_#t~mem44=|P2Thread1of1ForFork1_#t~mem44_In-443620961|} OutVars{~#x~0.offset=|~#x~0.offset_In-443620961|, P2Thread1of1ForFork1_#t~ite45=|P2Thread1of1ForFork1_#t~ite45_Out-443620961|, ~x$w_buff1~0=~x$w_buff1~0_In-443620961, ~#x~0.base=|~#x~0.base_In-443620961|, #memory_int=|#memory_int_In-443620961|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-443620961, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-443620961, P2Thread1of1ForFork1_#t~mem44=|P2Thread1of1ForFork1_#t~mem44_Out-443620961|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite45, P2Thread1of1ForFork1_#t~mem44] because there is no mapped edge [2019-12-07 18:36:50,007 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L786-->L786-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-1083272070 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In-1083272070 256) 0))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork0_#t~ite40_Out-1083272070| 0)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork0_#t~ite40_Out-1083272070| ~x$w_buff0_used~0_In-1083272070)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1083272070, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1083272070} OutVars{P1Thread1of1ForFork0_#t~ite40=|P1Thread1of1ForFork0_#t~ite40_Out-1083272070|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1083272070, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1083272070} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 18:36:50,008 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L787-->L787-2: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In-1345775623 256))) (.cse3 (= (mod ~x$w_buff0_used~0_In-1345775623 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-1345775623 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd2~0_In-1345775623 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork0_#t~ite41_Out-1345775623|)) (and (or .cse2 .cse3) (= |P1Thread1of1ForFork0_#t~ite41_Out-1345775623| ~x$w_buff1_used~0_In-1345775623) (or .cse0 .cse1)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1345775623, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1345775623, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1345775623, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1345775623} OutVars{P1Thread1of1ForFork0_#t~ite41=|P1Thread1of1ForFork0_#t~ite41_Out-1345775623|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1345775623, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1345775623, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1345775623, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1345775623} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 18:36:50,008 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [889] [889] L788-->L789: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In-2123560167 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-2123560167 256))) (.cse2 (= ~x$r_buff0_thd2~0_Out-2123560167 ~x$r_buff0_thd2~0_In-2123560167))) (or (and (not .cse0) (= ~x$r_buff0_thd2~0_Out-2123560167 0) (not .cse1)) (and .cse2 .cse1) (and .cse0 .cse2))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-2123560167, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2123560167} OutVars{P1Thread1of1ForFork0_#t~ite42=|P1Thread1of1ForFork0_#t~ite42_Out-2123560167|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-2123560167, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2123560167} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite42, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 18:36:50,009 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L789-->L789-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In-5072653 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd2~0_In-5072653 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In-5072653 256))) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In-5072653 256)))) (or (and (or .cse0 .cse1) (= ~x$r_buff1_thd2~0_In-5072653 |P1Thread1of1ForFork0_#t~ite43_Out-5072653|) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork0_#t~ite43_Out-5072653|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-5072653, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-5072653, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-5072653, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-5072653} OutVars{P1Thread1of1ForFork0_#t~ite43=|P1Thread1of1ForFork0_#t~ite43_Out-5072653|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-5072653, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-5072653, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-5072653, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-5072653} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 18:36:50,009 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [907] [907] L789-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|) (= v_~x$r_buff1_thd2~0_106 |v_P1Thread1of1ForFork0_#t~ite43_30|) (= (+ v_~__unbuffered_cnt~0_45 1) v_~__unbuffered_cnt~0_44)) InVars {P1Thread1of1ForFork0_#t~ite43=|v_P1Thread1of1ForFork0_#t~ite43_30|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_45} OutVars{P1Thread1of1ForFork0_#t~ite43=|v_P1Thread1of1ForFork0_#t~ite43_29|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_106, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_44, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite43, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 18:36:50,009 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [870] [870] L750-2-->L750-5: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff1_used~0_In2114761290 256))) (.cse0 (= |P0Thread1of1ForFork2_#t~ite4_Out2114761290| |P0Thread1of1ForFork2_#t~ite5_Out2114761290|)) (.cse1 (= 0 (mod ~x$r_buff1_thd1~0_In2114761290 256)))) (or (and .cse0 (or .cse1 .cse2) (= |P0Thread1of1ForFork2_#t~ite4_Out2114761290| |P0Thread1of1ForFork2_#t~mem3_Out2114761290|) (= |P0Thread1of1ForFork2_#t~mem3_Out2114761290| (select (select |#memory_int_In2114761290| |~#x~0.base_In2114761290|) |~#x~0.offset_In2114761290|))) (and (not .cse2) (= |P0Thread1of1ForFork2_#t~ite4_Out2114761290| ~x$w_buff1~0_In2114761290) .cse0 (= |P0Thread1of1ForFork2_#t~mem3_In2114761290| |P0Thread1of1ForFork2_#t~mem3_Out2114761290|) (not .cse1)))) InVars {P0Thread1of1ForFork2_#t~mem3=|P0Thread1of1ForFork2_#t~mem3_In2114761290|, ~#x~0.offset=|~#x~0.offset_In2114761290|, ~x$w_buff1~0=~x$w_buff1~0_In2114761290, ~#x~0.base=|~#x~0.base_In2114761290|, #memory_int=|#memory_int_In2114761290|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2114761290, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In2114761290} OutVars{P0Thread1of1ForFork2_#t~ite4=|P0Thread1of1ForFork2_#t~ite4_Out2114761290|, P0Thread1of1ForFork2_#t~mem3=|P0Thread1of1ForFork2_#t~mem3_Out2114761290|, ~#x~0.offset=|~#x~0.offset_In2114761290|, P0Thread1of1ForFork2_#t~ite5=|P0Thread1of1ForFork2_#t~ite5_Out2114761290|, ~x$w_buff1~0=~x$w_buff1~0_In2114761290, ~#x~0.base=|~#x~0.base_In2114761290|, #memory_int=|#memory_int_In2114761290|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2114761290, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In2114761290} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite4, P0Thread1of1ForFork2_#t~mem3, P0Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 18:36:50,010 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L751-->L751-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In1851040903 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In1851040903 256)))) (or (and (not .cse0) (= |P0Thread1of1ForFork2_#t~ite6_Out1851040903| 0) (not .cse1)) (and (= |P0Thread1of1ForFork2_#t~ite6_Out1851040903| ~x$w_buff0_used~0_In1851040903) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1851040903, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1851040903} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1851040903, P0Thread1of1ForFork2_#t~ite6=|P0Thread1of1ForFork2_#t~ite6_Out1851040903|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1851040903} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 18:36:50,010 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L752-->L752-2: Formula: (let ((.cse2 (= (mod ~x$r_buff1_thd1~0_In-1723651070 256) 0)) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In-1723651070 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In-1723651070 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1723651070 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork2_#t~ite7_Out-1723651070| 0)) (and (= |P0Thread1of1ForFork2_#t~ite7_Out-1723651070| ~x$w_buff1_used~0_In-1723651070) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1723651070, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1723651070, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1723651070, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1723651070} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1723651070, P0Thread1of1ForFork2_#t~ite7=|P0Thread1of1ForFork2_#t~ite7_Out-1723651070|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1723651070, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1723651070, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1723651070} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 18:36:50,011 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [878] [878] L753-->L754: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd1~0_In-671914974 256) 0)) (.cse2 (= (mod ~x$w_buff0_used~0_In-671914974 256) 0)) (.cse1 (= ~x$r_buff0_thd1~0_Out-671914974 ~x$r_buff0_thd1~0_In-671914974))) (or (and .cse0 .cse1) (and (= ~x$r_buff0_thd1~0_Out-671914974 0) (not .cse0) (not .cse2)) (and .cse2 .cse1))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-671914974, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-671914974} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_Out-671914974, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_Out-671914974|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-671914974} AuxVars[] AssignedVars[~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 18:36:50,011 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [892] [892] L754-->L754-2: Formula: (let ((.cse2 (= (mod ~x$w_buff1_used~0_In2104548372 256) 0)) (.cse3 (= (mod ~x$r_buff1_thd1~0_In2104548372 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In2104548372 256))) (.cse1 (= (mod ~x$r_buff0_thd1~0_In2104548372 256) 0))) (or (and (= 0 |P0Thread1of1ForFork2_#t~ite9_Out2104548372|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= ~x$r_buff1_thd1~0_In2104548372 |P0Thread1of1ForFork2_#t~ite9_Out2104548372|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2104548372, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2104548372, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In2104548372, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2104548372} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2104548372, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2104548372, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In2104548372, P0Thread1of1ForFork2_#t~ite9=|P0Thread1of1ForFork2_#t~ite9_Out2104548372|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2104548372} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 18:36:50,011 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [910] [910] L754-2-->P0EXIT: Formula: (and (= v_~__unbuffered_cnt~0_50 (+ v_~__unbuffered_cnt~0_51 1)) (= |v_P0Thread1of1ForFork2_#res.offset_3| 0) (= |v_P0Thread1of1ForFork2_#t~ite9_22| v_~x$r_buff1_thd1~0_34) (= 0 |v_P0Thread1of1ForFork2_#res.base_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_51, P0Thread1of1ForFork2_#t~ite9=|v_P0Thread1of1ForFork2_#t~ite9_22|} OutVars{P0Thread1of1ForFork2_#res.offset=|v_P0Thread1of1ForFork2_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_50, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_34, P0Thread1of1ForFork2_#t~ite9=|v_P0Thread1of1ForFork2_#t~ite9_21|, P0Thread1of1ForFork2_#res.base=|v_P0Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0, P0Thread1of1ForFork2_#t~ite9, P0Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 18:36:50,011 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L802-4-->L803: Formula: (= (store |v_#memory_int_71| |v_~#x~0.base_39| (store (select |v_#memory_int_71| |v_~#x~0.base_39|) |v_~#x~0.offset_39| |v_P2Thread1of1ForFork1_#t~ite45_8|)) |v_#memory_int_70|) InVars {~#x~0.offset=|v_~#x~0.offset_39|, P2Thread1of1ForFork1_#t~ite45=|v_P2Thread1of1ForFork1_#t~ite45_8|, #memory_int=|v_#memory_int_71|, ~#x~0.base=|v_~#x~0.base_39|} OutVars{P2Thread1of1ForFork1_#t~ite46=|v_P2Thread1of1ForFork1_#t~ite46_11|, ~#x~0.offset=|v_~#x~0.offset_39|, P2Thread1of1ForFork1_#t~ite45=|v_P2Thread1of1ForFork1_#t~ite45_7|, #memory_int=|v_#memory_int_70|, ~#x~0.base=|v_~#x~0.base_39|, P2Thread1of1ForFork1_#t~mem44=|v_P2Thread1of1ForFork1_#t~mem44_5|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite46, P2Thread1of1ForFork1_#t~ite45, #memory_int, P2Thread1of1ForFork1_#t~mem44] because there is no mapped edge [2019-12-07 18:36:50,011 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [885] [885] L803-->L803-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In2126147209 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In2126147209 256)))) (or (and (= ~x$w_buff0_used~0_In2126147209 |P2Thread1of1ForFork1_#t~ite47_Out2126147209|) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P2Thread1of1ForFork1_#t~ite47_Out2126147209|) (not .cse0)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In2126147209, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2126147209} OutVars{P2Thread1of1ForFork1_#t~ite47=|P2Thread1of1ForFork1_#t~ite47_Out2126147209|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In2126147209, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2126147209} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite47] because there is no mapped edge [2019-12-07 18:36:50,011 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [888] [888] L804-->L804-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In-1447252809 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-1447252809 256))) (.cse3 (= 0 (mod ~x$r_buff0_thd3~0_In-1447252809 256))) (.cse2 (= (mod ~x$w_buff0_used~0_In-1447252809 256) 0))) (or (and (= |P2Thread1of1ForFork1_#t~ite48_Out-1447252809| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork1_#t~ite48_Out-1447252809| ~x$w_buff1_used~0_In-1447252809) (or .cse3 .cse2)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1447252809, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1447252809, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1447252809, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1447252809} OutVars{P2Thread1of1ForFork1_#t~ite48=|P2Thread1of1ForFork1_#t~ite48_Out-1447252809|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1447252809, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1447252809, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1447252809, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1447252809} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite48] because there is no mapped edge [2019-12-07 18:36:50,012 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [886] [886] L805-->L806: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-2114014848 256))) (.cse2 (= ~x$r_buff0_thd3~0_In-2114014848 ~x$r_buff0_thd3~0_Out-2114014848)) (.cse1 (= (mod ~x$r_buff0_thd3~0_In-2114014848 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 ~x$r_buff0_thd3~0_Out-2114014848)) (and .cse2 .cse0) (and .cse2 .cse1))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-2114014848, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2114014848} OutVars{P2Thread1of1ForFork1_#t~ite49=|P2Thread1of1ForFork1_#t~ite49_Out-2114014848|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_Out-2114014848, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2114014848} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite49, ~x$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 18:36:50,012 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L806-->L806-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff0_used~0_In2088449369 256))) (.cse3 (= (mod ~x$r_buff0_thd3~0_In2088449369 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In2088449369 256))) (.cse0 (= (mod ~x$w_buff1_used~0_In2088449369 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork1_#t~ite50_Out2088449369|)) (and (or .cse2 .cse3) (= ~x$r_buff1_thd3~0_In2088449369 |P2Thread1of1ForFork1_#t~ite50_Out2088449369|) (or .cse1 .cse0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In2088449369, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In2088449369, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In2088449369, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2088449369} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In2088449369, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In2088449369, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In2088449369, P2Thread1of1ForFork1_#t~ite50=|P2Thread1of1ForFork1_#t~ite50_Out2088449369|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2088449369} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite50] because there is no mapped edge [2019-12-07 18:36:50,012 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [930] [930] L806-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_57 1) v_~__unbuffered_cnt~0_56) (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= v_~x$r_buff1_thd3~0_49 |v_P2Thread1of1ForFork1_#t~ite50_40|) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_57, P2Thread1of1ForFork1_#t~ite50=|v_P2Thread1of1ForFork1_#t~ite50_40|} OutVars{P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_49, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56, P2Thread1of1ForFork1_#t~ite50=|v_P2Thread1of1ForFork1_#t~ite50_39|, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#res.base, ~x$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#t~ite50, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 18:36:50,013 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [808] [808] L833-->L835-2: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (or (= 0 (mod v_~x$r_buff0_thd0~0_22 256)) (= 0 (mod v_~x$w_buff0_used~0_133 256)))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_22, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_133} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_22, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_133} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 18:36:50,013 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L835-2-->L835-4: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd0~0_In-680076473 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-680076473 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~mem54_Out-680076473| |ULTIMATE.start_main_#t~ite55_Out-680076473|) (= |ULTIMATE.start_main_#t~mem54_Out-680076473| (select (select |#memory_int_In-680076473| |~#x~0.base_In-680076473|) |~#x~0.offset_In-680076473|))) (and (not .cse1) (not .cse0) (= |ULTIMATE.start_main_#t~mem54_In-680076473| |ULTIMATE.start_main_#t~mem54_Out-680076473|) (= ~x$w_buff1~0_In-680076473 |ULTIMATE.start_main_#t~ite55_Out-680076473|)))) InVars {ULTIMATE.start_main_#t~mem54=|ULTIMATE.start_main_#t~mem54_In-680076473|, ~#x~0.offset=|~#x~0.offset_In-680076473|, ~x$w_buff1~0=~x$w_buff1~0_In-680076473, ~#x~0.base=|~#x~0.base_In-680076473|, #memory_int=|#memory_int_In-680076473|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-680076473, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-680076473} OutVars{ULTIMATE.start_main_#t~mem54=|ULTIMATE.start_main_#t~mem54_Out-680076473|, ~#x~0.offset=|~#x~0.offset_In-680076473|, ~x$w_buff1~0=~x$w_buff1~0_In-680076473, ~#x~0.base=|~#x~0.base_In-680076473|, #memory_int=|#memory_int_In-680076473|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-680076473, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-680076473, ULTIMATE.start_main_#t~ite55=|ULTIMATE.start_main_#t~ite55_Out-680076473|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem54, ULTIMATE.start_main_#t~ite55] because there is no mapped edge [2019-12-07 18:36:50,013 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [856] [856] L835-4-->L836: Formula: (= (store |v_#memory_int_79| |v_~#x~0.base_42| (store (select |v_#memory_int_79| |v_~#x~0.base_42|) |v_~#x~0.offset_42| |v_ULTIMATE.start_main_#t~ite55_8|)) |v_#memory_int_78|) InVars {~#x~0.offset=|v_~#x~0.offset_42|, #memory_int=|v_#memory_int_79|, ~#x~0.base=|v_~#x~0.base_42|, ULTIMATE.start_main_#t~ite55=|v_ULTIMATE.start_main_#t~ite55_8|} OutVars{ULTIMATE.start_main_#t~mem54=|v_ULTIMATE.start_main_#t~mem54_5|, ~#x~0.offset=|v_~#x~0.offset_42|, #memory_int=|v_#memory_int_78|, ~#x~0.base=|v_~#x~0.base_42|, ULTIMATE.start_main_#t~ite56=|v_ULTIMATE.start_main_#t~ite56_8|, ULTIMATE.start_main_#t~ite55=|v_ULTIMATE.start_main_#t~ite55_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem54, #memory_int, ULTIMATE.start_main_#t~ite56, ULTIMATE.start_main_#t~ite55] because there is no mapped edge [2019-12-07 18:36:50,013 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [884] [884] L836-->L836-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-221431766 256))) (.cse1 (= (mod ~x$r_buff0_thd0~0_In-221431766 256) 0))) (or (and (= ~x$w_buff0_used~0_In-221431766 |ULTIMATE.start_main_#t~ite57_Out-221431766|) (or .cse0 .cse1)) (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite57_Out-221431766|) (not .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-221431766, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-221431766} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-221431766, ULTIMATE.start_main_#t~ite57=|ULTIMATE.start_main_#t~ite57_Out-221431766|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-221431766} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite57] because there is no mapped edge [2019-12-07 18:36:50,013 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [867] [867] L837-->L837-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In201306404 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In201306404 256) 0)) (.cse3 (= (mod ~x$r_buff1_thd0~0_In201306404 256) 0)) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In201306404 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite58_Out201306404| 0)) (and (= |ULTIMATE.start_main_#t~ite58_Out201306404| ~x$w_buff1_used~0_In201306404) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In201306404, ~x$w_buff1_used~0=~x$w_buff1_used~0_In201306404, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In201306404, ~x$w_buff0_used~0=~x$w_buff0_used~0_In201306404} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In201306404, ULTIMATE.start_main_#t~ite58=|ULTIMATE.start_main_#t~ite58_Out201306404|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In201306404, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In201306404, ~x$w_buff0_used~0=~x$w_buff0_used~0_In201306404} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite58] because there is no mapped edge [2019-12-07 18:36:50,014 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L838-->L839: Formula: (let ((.cse1 (= ~x$r_buff0_thd0~0_Out-671787214 ~x$r_buff0_thd0~0_In-671787214)) (.cse2 (= (mod ~x$r_buff0_thd0~0_In-671787214 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-671787214 256)))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (= ~x$r_buff0_thd0~0_Out-671787214 0) (not .cse2) (not .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-671787214, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-671787214} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_Out-671787214, ULTIMATE.start_main_#t~ite59=|ULTIMATE.start_main_#t~ite59_Out-671787214|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-671787214} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite59] because there is no mapped edge [2019-12-07 18:36:50,014 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L839-->L843: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In1808458810 256))) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In1808458810 256))) (.cse5 (= ~x$r_buff1_thd0~0_Out1808458810 ~x$r_buff1_thd0~0_In1808458810)) (.cse4 (= (mod ~x$r_buff1_thd0~0_In1808458810 256) 0)) (.cse1 (= |ULTIMATE.start_main_#t~nondet61_In1808458810| ~weak$$choice1~0_Out1808458810)) (.cse3 (= ~x$r_buff1_thd0~0_Out1808458810 0)) (.cse6 (= 0 (mod ~x$w_buff1_used~0_In1808458810 256)))) (or (and (not .cse0) .cse1 (not .cse2) .cse3) (and .cse0 .cse1 .cse4 .cse5) (and .cse0 .cse6 .cse1 .cse5) (and .cse6 .cse2 .cse1 .cse5) (and .cse2 .cse1 .cse4 .cse5) (and (not .cse4) .cse1 .cse3 (not .cse6)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1808458810, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1808458810, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1808458810, ULTIMATE.start_main_#t~nondet61=|ULTIMATE.start_main_#t~nondet61_In1808458810|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1808458810} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1808458810, ~weak$$choice1~0=~weak$$choice1~0_Out1808458810, ULTIMATE.start_main_#t~ite60=|ULTIMATE.start_main_#t~ite60_Out1808458810|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1808458810, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_Out1808458810, ULTIMATE.start_main_#t~nondet61=|ULTIMATE.start_main_#t~nondet61_Out1808458810|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1808458810} AuxVars[] AssignedVars[~weak$$choice1~0, ULTIMATE.start_main_#t~ite60, ~x$r_buff1_thd0~0, ULTIMATE.start_main_#t~nondet61] because there is no mapped edge [2019-12-07 18:36:50,014 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L843-->L843-3: Formula: (let ((.cse0 (= (mod ~weak$$choice1~0_In-909317594 256) 0)) (.cse1 (not (= (mod ~__unbuffered_p1_EAX$read_delayed~0_In-909317594 256) 0)))) (or (and .cse0 (= |ULTIMATE.start_main_#t~ite63_Out-909317594| ~__unbuffered_p1_EAX~0_In-909317594) (= |ULTIMATE.start_main_#t~mem62_In-909317594| |ULTIMATE.start_main_#t~mem62_Out-909317594|) .cse1) (and (= |ULTIMATE.start_main_#t~mem62_Out-909317594| (select (select |#memory_int_In-909317594| ~__unbuffered_p1_EAX$read_delayed_var~0.base_In-909317594) ~__unbuffered_p1_EAX$read_delayed_var~0.offset_In-909317594)) (= |ULTIMATE.start_main_#t~mem62_Out-909317594| |ULTIMATE.start_main_#t~ite63_Out-909317594|) (not .cse0) .cse1))) InVars {~weak$$choice1~0=~weak$$choice1~0_In-909317594, ~__unbuffered_p1_EAX~0=~__unbuffered_p1_EAX~0_In-909317594, ~__unbuffered_p1_EAX$read_delayed~0=~__unbuffered_p1_EAX$read_delayed~0_In-909317594, ULTIMATE.start_main_#t~mem62=|ULTIMATE.start_main_#t~mem62_In-909317594|, ~__unbuffered_p1_EAX$read_delayed_var~0.base=~__unbuffered_p1_EAX$read_delayed_var~0.base_In-909317594, #memory_int=|#memory_int_In-909317594|, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=~__unbuffered_p1_EAX$read_delayed_var~0.offset_In-909317594} OutVars{ULTIMATE.start_main_#t~ite63=|ULTIMATE.start_main_#t~ite63_Out-909317594|, ~weak$$choice1~0=~weak$$choice1~0_In-909317594, ~__unbuffered_p1_EAX~0=~__unbuffered_p1_EAX~0_In-909317594, ~__unbuffered_p1_EAX$read_delayed~0=~__unbuffered_p1_EAX$read_delayed~0_In-909317594, ULTIMATE.start_main_#t~mem62=|ULTIMATE.start_main_#t~mem62_Out-909317594|, ~__unbuffered_p1_EAX$read_delayed_var~0.base=~__unbuffered_p1_EAX$read_delayed_var~0.base_In-909317594, #memory_int=|#memory_int_In-909317594|, ~__unbuffered_p1_EAX$read_delayed_var~0.offset=~__unbuffered_p1_EAX$read_delayed_var~0.offset_In-909317594} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite63, ULTIMATE.start_main_#t~mem62] because there is no mapped edge [2019-12-07 18:36:50,014 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [895] [895] L843-3-->L4: Formula: (and (= (mod v_~main$tmp_guard1~0_17 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (let ((.cse1 (= v_~y~0_36 2)) (.cse4 (= 1 v_~__unbuffered_p1_EAX~0_27)) (.cse3 (= 2 v_~__unbuffered_p0_EAX~0_31)) (.cse0 (= v_~main$tmp_guard1~0_17 1)) (.cse2 (= |v_ULTIMATE.start_main_#t~ite63_28| v_~__unbuffered_p1_EAX~0_27))) (or (and .cse0 (not .cse1) .cse2) (and (= v_~main$tmp_guard1~0_17 0) .cse3 .cse4 .cse2 .cse1) (and .cse0 (not .cse4) .cse2) (and (not .cse3) .cse0 .cse2)))) InVars {ULTIMATE.start_main_#t~ite63=|v_ULTIMATE.start_main_#t~ite63_28|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_31, ~y~0=v_~y~0_36} OutVars{ULTIMATE.start_main_#t~ite63=|v_ULTIMATE.start_main_#t~ite63_27|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_31, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_8, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_27, ULTIMATE.start_main_#t~mem62=|v_ULTIMATE.start_main_#t~mem62_21|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_17, ~y~0=v_~y~0_36, ULTIMATE.start_main_#t~ite64=|v_ULTIMATE.start_main_#t~ite64_29|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite63, ULTIMATE.start___VERIFIER_assert_~expression, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_#t~mem62, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite64, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:36:50,014 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [927] [927] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_12 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 18:36:50,065 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_074ac776-3957-4899-a189-df92ab2e1ec7/bin/uautomizer/witness.graphml [2019-12-07 18:36:50,065 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 18:36:50,066 INFO L168 Benchmark]: Toolchain (without parser) took 23785.63 ms. Allocated memory was 1.0 GB in the beginning and 3.2 GB in the end (delta: 2.1 GB). Free memory was 937.2 MB in the beginning and 1.7 GB in the end (delta: -716.0 MB). Peak memory consumption was 1.4 GB. Max. memory is 11.5 GB. [2019-12-07 18:36:50,066 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 958.7 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:36:50,066 INFO L168 Benchmark]: CACSL2BoogieTranslator took 398.76 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 95.4 MB). Free memory was 937.2 MB in the beginning and 1.1 GB in the end (delta: -119.4 MB). Peak memory consumption was 18.6 MB. Max. memory is 11.5 GB. [2019-12-07 18:36:50,066 INFO L168 Benchmark]: Boogie Procedure Inliner took 35.34 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:36:50,067 INFO L168 Benchmark]: Boogie Preprocessor took 26.31 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:36:50,067 INFO L168 Benchmark]: RCFGBuilder took 441.43 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 997.1 MB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. [2019-12-07 18:36:50,067 INFO L168 Benchmark]: TraceAbstraction took 22814.89 ms. Allocated memory was 1.1 GB in the beginning and 3.2 GB in the end (delta: 2.0 GB). Free memory was 997.1 MB in the beginning and 1.7 GB in the end (delta: -683.5 MB). Peak memory consumption was 1.4 GB. Max. memory is 11.5 GB. [2019-12-07 18:36:50,067 INFO L168 Benchmark]: Witness Printer took 65.83 ms. Allocated memory is still 3.2 GB. Free memory was 1.7 GB in the beginning and 1.7 GB in the end (delta: 27.4 MB). Peak memory consumption was 27.4 MB. Max. memory is 11.5 GB. [2019-12-07 18:36:50,069 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 958.7 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 398.76 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 95.4 MB). Free memory was 937.2 MB in the beginning and 1.1 GB in the end (delta: -119.4 MB). Peak memory consumption was 18.6 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 35.34 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.31 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 441.43 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 997.1 MB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 22814.89 ms. Allocated memory was 1.1 GB in the beginning and 3.2 GB in the end (delta: 2.0 GB). Free memory was 997.1 MB in the beginning and 1.7 GB in the end (delta: -683.5 MB). Peak memory consumption was 1.4 GB. Max. memory is 11.5 GB. * Witness Printer took 65.83 ms. Allocated memory is still 3.2 GB. Free memory was 1.7 GB in the beginning and 1.7 GB in the end (delta: 27.4 MB). Peak memory consumption was 27.4 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 4.0s, 192 ProgramPointsBefore, 86 ProgramPointsAfterwards, 230 TransitionsBefore, 95 TransitionsAfterwards, 19530 CoEnabledTransitionPairs, 8 FixpointIterations, 49 TrivialSequentialCompositions, 48 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 48 ConcurrentYvCompositions, 33 ChoiceCompositions, 7748 VarBasedMoverChecksPositive, 193 VarBasedMoverChecksNegative, 24 SemBasedMoverChecksPositive, 222 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.6s, 0 MoverChecksTotal, 80972 CheckedPairsTotal, 145 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L825] FCALL, FORK 0 pthread_create(&t2000, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff0_thd3=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$r_buff1_thd3=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={5:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L827] FCALL, FORK 0 pthread_create(&t2001, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff0_thd3=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$r_buff1_thd3=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={5:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L829] FCALL, FORK 0 pthread_create(&t2002, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff0_thd3=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$r_buff1_thd3=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x={5:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L764] 2 weak$$choice0 = __VERIFIER_nondet_bool() [L765] 2 weak$$choice2 = __VERIFIER_nondet_bool() [L766] 2 x$flush_delayed = weak$$choice2 [L767] EXPR 2 \read(x) [L767] 2 x$mem_tmp = x [L768] EXPR 2 !x$w_buff0_used || !x$r_buff0_thd2 && !x$w_buff1_used || !x$r_buff0_thd2 && !x$r_buff1_thd2 ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : x$w_buff1) [L768] EXPR 2 \read(x) [L768] EXPR 2 !x$w_buff0_used || !x$r_buff0_thd2 && !x$w_buff1_used || !x$r_buff0_thd2 && !x$r_buff1_thd2 ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : x$w_buff1) VAL [!x$w_buff0_used || !x$r_buff0_thd2 && !x$w_buff1_used || !x$r_buff0_thd2 && !x$r_buff1_thd2 ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : x$w_buff1)=0, \read(x)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff0_thd3=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$r_buff1_thd3=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=0, weak$$choice2=1, x={5:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L768] 2 x = !x$w_buff0_used || !x$r_buff0_thd2 && !x$w_buff1_used || !x$r_buff0_thd2 && !x$r_buff1_thd2 ? x : (x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : x$w_buff1) [L771] 2 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd2 && !x$w_buff1_used || !x$r_buff0_thd2 && !x$r_buff1_thd2 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used)) [L772] EXPR 2 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd2 && !x$w_buff1_used || !x$r_buff0_thd2 && !x$r_buff1_thd2 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff0_thd3=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$r_buff1_thd3=0, __unbuffered_p1_EAX$read_delayed=0, __unbuffered_p1_EAX$read_delayed_var={0:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=0, weak$$choice2=1, weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd2 && !x$w_buff1_used || !x$r_buff0_thd2 && !x$r_buff1_thd2 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0))=0, x={5:0}, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L772] 2 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd2 && !x$w_buff1_used || !x$r_buff0_thd2 && !x$r_buff1_thd2 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : (_Bool)0)) [L785] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff0_thd3=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$r_buff1_thd3=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={5:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=0, weak$$choice2=1, x={5:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1] [L799] 3 y = 2 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff0_thd3=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$r_buff1_thd3=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={5:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=0, weak$$choice2=1, x={5:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L785] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L802] 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff0_thd3=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$r_buff1_thd3=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={5:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=0, weak$$choice2=1, x={5:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L744] 1 __unbuffered_p0_EAX = y [L747] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=2, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff0_thd3=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$r_buff1_thd3=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={5:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=0, weak$$choice2=1, x={5:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L786] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L787] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L750] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [\read(x)=1, \result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=2, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff0_thd3=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$r_buff1_thd3=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={5:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=0, weak$$choice2=1, x={5:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x=1, y=2] [L750] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L751] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L752] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L803] 3 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used [L804] 3 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used [L831] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=2, __unbuffered_p1_EAX=0, __unbuffered_p1_EAX$flush_delayed=0, __unbuffered_p1_EAX$mem_tmp=0, __unbuffered_p1_EAX$r_buff0_thd0=0, __unbuffered_p1_EAX$r_buff0_thd1=0, __unbuffered_p1_EAX$r_buff0_thd2=0, __unbuffered_p1_EAX$r_buff0_thd3=0, __unbuffered_p1_EAX$r_buff1_thd0=0, __unbuffered_p1_EAX$r_buff1_thd1=0, __unbuffered_p1_EAX$r_buff1_thd2=0, __unbuffered_p1_EAX$r_buff1_thd3=0, __unbuffered_p1_EAX$read_delayed=1, __unbuffered_p1_EAX$read_delayed_var={5:0}, __unbuffered_p1_EAX$w_buff0=0, __unbuffered_p1_EAX$w_buff0_used=0, __unbuffered_p1_EAX$w_buff1=0, __unbuffered_p1_EAX$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=3, weak$$choice1=0, weak$$choice2=1, x={5:0}, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L836] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L837] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 183 locations, 1 error locations. Result: UNSAFE, OverallTime: 22.6s, OverallIterations: 15, TraceHistogramMax: 1, AutomataDifference: 2.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1417 SDtfs, 2215 SDslu, 1743 SDs, 0 SdLazy, 741 SolverSat, 82 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 71 GetRequests, 20 SyntacticMatches, 9 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=88334occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 5.9s AutomataMinimizationTime, 14 MinimizatonAttempts, 12058 StatesRemovedByMinimization, 5 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 0.5s InterpolantComputationTime, 711 NumberOfCodeBlocks, 711 NumberOfCodeBlocksAsserted, 15 NumberOfCheckSat, 634 ConstructedInterpolants, 0 QuantifiedInterpolants, 79016 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 14 InterpolantComputations, 14 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...