./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe010_pso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_beb96312-8bb0-428c-910f-b4a53ff9b4f4/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_beb96312-8bb0-428c-910f-b4a53ff9b4f4/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_beb96312-8bb0-428c-910f-b4a53ff9b4f4/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_beb96312-8bb0-428c-910f-b4a53ff9b4f4/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe010_pso.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_beb96312-8bb0-428c-910f-b4a53ff9b4f4/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_beb96312-8bb0-428c-910f-b4a53ff9b4f4/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 91d6ad7ac966b9170f1c4fb60f8a5eb3423f5597 ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 18:37:16,456 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 18:37:16,458 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 18:37:16,465 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 18:37:16,465 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 18:37:16,466 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 18:37:16,467 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 18:37:16,468 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 18:37:16,470 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 18:37:16,470 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 18:37:16,471 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 18:37:16,472 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 18:37:16,472 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 18:37:16,472 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 18:37:16,473 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 18:37:16,474 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 18:37:16,475 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 18:37:16,475 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 18:37:16,477 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 18:37:16,478 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 18:37:16,479 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 18:37:16,480 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 18:37:16,481 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 18:37:16,481 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 18:37:16,483 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 18:37:16,483 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 18:37:16,483 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 18:37:16,484 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 18:37:16,484 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 18:37:16,484 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 18:37:16,485 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 18:37:16,485 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 18:37:16,485 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 18:37:16,486 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 18:37:16,486 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 18:37:16,486 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 18:37:16,487 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 18:37:16,487 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 18:37:16,487 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 18:37:16,488 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 18:37:16,488 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 18:37:16,489 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_beb96312-8bb0-428c-910f-b4a53ff9b4f4/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 18:37:16,497 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 18:37:16,497 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 18:37:16,498 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 18:37:16,498 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 18:37:16,498 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 18:37:16,499 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 18:37:16,499 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 18:37:16,499 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 18:37:16,499 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 18:37:16,499 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 18:37:16,499 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 18:37:16,499 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 18:37:16,499 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 18:37:16,500 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 18:37:16,500 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 18:37:16,500 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 18:37:16,500 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 18:37:16,500 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 18:37:16,500 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 18:37:16,500 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 18:37:16,501 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 18:37:16,501 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:37:16,501 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 18:37:16,501 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 18:37:16,501 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 18:37:16,501 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 18:37:16,501 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 18:37:16,501 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 18:37:16,502 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 18:37:16,502 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_beb96312-8bb0-428c-910f-b4a53ff9b4f4/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 91d6ad7ac966b9170f1c4fb60f8a5eb3423f5597 [2019-12-07 18:37:16,612 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 18:37:16,620 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 18:37:16,622 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 18:37:16,623 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 18:37:16,623 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 18:37:16,623 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_beb96312-8bb0-428c-910f-b4a53ff9b4f4/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe010_pso.opt.i [2019-12-07 18:37:16,662 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_beb96312-8bb0-428c-910f-b4a53ff9b4f4/bin/uautomizer/data/6bdec5862/a5a43e61122a49adb2ddc4021137c18d/FLAG70253cbd8 [2019-12-07 18:37:17,077 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 18:37:17,077 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_beb96312-8bb0-428c-910f-b4a53ff9b4f4/sv-benchmarks/c/pthread-wmm/safe010_pso.opt.i [2019-12-07 18:37:17,087 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_beb96312-8bb0-428c-910f-b4a53ff9b4f4/bin/uautomizer/data/6bdec5862/a5a43e61122a49adb2ddc4021137c18d/FLAG70253cbd8 [2019-12-07 18:37:17,096 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_beb96312-8bb0-428c-910f-b4a53ff9b4f4/bin/uautomizer/data/6bdec5862/a5a43e61122a49adb2ddc4021137c18d [2019-12-07 18:37:17,098 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 18:37:17,099 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 18:37:17,099 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 18:37:17,099 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 18:37:17,102 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 18:37:17,102 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:37:17" (1/1) ... [2019-12-07 18:37:17,104 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@25138a46 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:37:17, skipping insertion in model container [2019-12-07 18:37:17,104 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:37:17" (1/1) ... [2019-12-07 18:37:17,109 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 18:37:17,137 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 18:37:17,371 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:37:17,379 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 18:37:17,422 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:37:17,468 INFO L208 MainTranslator]: Completed translation [2019-12-07 18:37:17,468 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:37:17 WrapperNode [2019-12-07 18:37:17,468 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 18:37:17,469 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 18:37:17,469 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 18:37:17,469 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 18:37:17,475 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:37:17" (1/1) ... [2019-12-07 18:37:17,488 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:37:17" (1/1) ... [2019-12-07 18:37:17,510 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 18:37:17,510 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 18:37:17,510 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 18:37:17,510 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 18:37:17,517 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:37:17" (1/1) ... [2019-12-07 18:37:17,517 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:37:17" (1/1) ... [2019-12-07 18:37:17,520 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:37:17" (1/1) ... [2019-12-07 18:37:17,521 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:37:17" (1/1) ... [2019-12-07 18:37:17,527 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:37:17" (1/1) ... [2019-12-07 18:37:17,529 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:37:17" (1/1) ... [2019-12-07 18:37:17,532 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:37:17" (1/1) ... [2019-12-07 18:37:17,535 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 18:37:17,536 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 18:37:17,536 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 18:37:17,536 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 18:37:17,536 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:37:17" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_beb96312-8bb0-428c-910f-b4a53ff9b4f4/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:37:17,585 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 18:37:17,585 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 18:37:17,586 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 18:37:17,586 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 18:37:17,586 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 18:37:17,586 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 18:37:17,586 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 18:37:17,586 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 18:37:17,586 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 18:37:17,586 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 18:37:17,586 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 18:37:17,587 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 18:37:17,922 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 18:37:17,923 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 18:37:17,923 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:37:17 BoogieIcfgContainer [2019-12-07 18:37:17,923 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 18:37:17,924 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 18:37:17,924 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 18:37:17,926 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 18:37:17,926 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 06:37:17" (1/3) ... [2019-12-07 18:37:17,926 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@15f542b4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:37:17, skipping insertion in model container [2019-12-07 18:37:17,927 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:37:17" (2/3) ... [2019-12-07 18:37:17,927 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@15f542b4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:37:17, skipping insertion in model container [2019-12-07 18:37:17,927 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:37:17" (3/3) ... [2019-12-07 18:37:17,928 INFO L109 eAbstractionObserver]: Analyzing ICFG safe010_pso.opt.i [2019-12-07 18:37:17,934 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 18:37:17,934 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 18:37:17,939 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 18:37:17,939 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 18:37:17,959 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,960 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,960 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,960 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,960 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,960 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,960 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,960 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,961 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,961 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,961 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,961 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,961 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,961 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,961 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,961 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,962 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,962 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,962 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,962 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,962 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,962 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,962 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,962 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,963 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,963 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,963 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,963 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,963 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,963 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,964 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,964 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,964 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,964 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,964 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,964 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,964 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,965 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,965 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,965 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,965 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,965 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,965 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,966 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,966 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,966 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,966 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,966 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,967 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,967 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,967 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,967 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,967 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,967 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,968 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,968 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,968 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,968 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,968 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,969 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,969 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,969 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,969 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,969 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:37:17,983 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-12-07 18:37:17,997 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 18:37:17,998 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 18:37:17,998 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 18:37:17,998 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 18:37:17,998 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 18:37:17,998 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 18:37:17,998 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 18:37:17,998 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 18:37:18,008 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 146 places, 180 transitions [2019-12-07 18:37:18,009 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 146 places, 180 transitions [2019-12-07 18:37:18,065 INFO L134 PetriNetUnfolder]: 41/178 cut-off events. [2019-12-07 18:37:18,065 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:37:18,073 INFO L76 FinitePrefix]: Finished finitePrefix Result has 185 conditions, 178 events. 41/178 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 460 event pairs. 6/141 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-12-07 18:37:18,083 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 146 places, 180 transitions [2019-12-07 18:37:18,107 INFO L134 PetriNetUnfolder]: 41/178 cut-off events. [2019-12-07 18:37:18,107 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:37:18,111 INFO L76 FinitePrefix]: Finished finitePrefix Result has 185 conditions, 178 events. 41/178 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 460 event pairs. 6/141 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-12-07 18:37:18,119 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 10418 [2019-12-07 18:37:18,120 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 18:37:20,749 WARN L192 SmtUtils]: Spent 122.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 79 [2019-12-07 18:37:20,826 INFO L206 etLargeBlockEncoding]: Checked pairs total: 46090 [2019-12-07 18:37:20,826 INFO L214 etLargeBlockEncoding]: Total number of compositions: 101 [2019-12-07 18:37:20,828 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 79 places, 91 transitions [2019-12-07 18:37:21,183 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 8654 states. [2019-12-07 18:37:21,185 INFO L276 IsEmpty]: Start isEmpty. Operand 8654 states. [2019-12-07 18:37:21,189 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 18:37:21,189 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:37:21,189 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 18:37:21,189 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:37:21,193 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:37:21,193 INFO L82 PathProgramCache]: Analyzing trace with hash 722891, now seen corresponding path program 1 times [2019-12-07 18:37:21,199 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:37:21,200 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1214382399] [2019-12-07 18:37:21,200 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:37:21,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:37:21,331 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:37:21,332 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1214382399] [2019-12-07 18:37:21,332 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:37:21,333 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:37:21,333 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [231605859] [2019-12-07 18:37:21,336 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:37:21,337 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:37:21,345 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:37:21,346 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:37:21,347 INFO L87 Difference]: Start difference. First operand 8654 states. Second operand 3 states. [2019-12-07 18:37:21,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:37:21,511 INFO L93 Difference]: Finished difference Result 8604 states and 28108 transitions. [2019-12-07 18:37:21,512 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:37:21,513 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 18:37:21,513 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:37:21,573 INFO L225 Difference]: With dead ends: 8604 [2019-12-07 18:37:21,573 INFO L226 Difference]: Without dead ends: 8436 [2019-12-07 18:37:21,574 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:37:21,650 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8436 states. [2019-12-07 18:37:21,822 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8436 to 8436. [2019-12-07 18:37:21,823 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8436 states. [2019-12-07 18:37:21,855 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8436 states to 8436 states and 27590 transitions. [2019-12-07 18:37:21,856 INFO L78 Accepts]: Start accepts. Automaton has 8436 states and 27590 transitions. Word has length 3 [2019-12-07 18:37:21,856 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:37:21,856 INFO L462 AbstractCegarLoop]: Abstraction has 8436 states and 27590 transitions. [2019-12-07 18:37:21,856 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:37:21,856 INFO L276 IsEmpty]: Start isEmpty. Operand 8436 states and 27590 transitions. [2019-12-07 18:37:21,858 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 18:37:21,859 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:37:21,859 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:37:21,859 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:37:21,859 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:37:21,859 INFO L82 PathProgramCache]: Analyzing trace with hash -1596153002, now seen corresponding path program 1 times [2019-12-07 18:37:21,859 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:37:21,859 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [219285697] [2019-12-07 18:37:21,860 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:37:21,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:37:21,940 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:37:21,941 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [219285697] [2019-12-07 18:37:21,941 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:37:21,941 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:37:21,941 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2000203511] [2019-12-07 18:37:21,942 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:37:21,942 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:37:21,943 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:37:21,943 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:37:21,943 INFO L87 Difference]: Start difference. First operand 8436 states and 27590 transitions. Second operand 4 states. [2019-12-07 18:37:22,188 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:37:22,188 INFO L93 Difference]: Finished difference Result 13130 states and 41153 transitions. [2019-12-07 18:37:22,189 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:37:22,189 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 18:37:22,189 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:37:22,240 INFO L225 Difference]: With dead ends: 13130 [2019-12-07 18:37:22,240 INFO L226 Difference]: Without dead ends: 13123 [2019-12-07 18:37:22,241 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:37:22,310 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13123 states. [2019-12-07 18:37:22,507 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13123 to 11988. [2019-12-07 18:37:22,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11988 states. [2019-12-07 18:37:22,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11988 states to 11988 states and 38075 transitions. [2019-12-07 18:37:22,531 INFO L78 Accepts]: Start accepts. Automaton has 11988 states and 38075 transitions. Word has length 11 [2019-12-07 18:37:22,531 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:37:22,531 INFO L462 AbstractCegarLoop]: Abstraction has 11988 states and 38075 transitions. [2019-12-07 18:37:22,531 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:37:22,531 INFO L276 IsEmpty]: Start isEmpty. Operand 11988 states and 38075 transitions. [2019-12-07 18:37:22,533 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 18:37:22,534 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:37:22,534 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:37:22,534 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:37:22,534 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:37:22,534 INFO L82 PathProgramCache]: Analyzing trace with hash 1194917716, now seen corresponding path program 1 times [2019-12-07 18:37:22,534 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:37:22,534 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1825504853] [2019-12-07 18:37:22,534 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:37:22,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:37:22,574 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:37:22,574 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1825504853] [2019-12-07 18:37:22,574 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:37:22,574 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:37:22,575 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [748774627] [2019-12-07 18:37:22,575 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:37:22,575 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:37:22,575 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:37:22,575 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:37:22,575 INFO L87 Difference]: Start difference. First operand 11988 states and 38075 transitions. Second operand 4 states. [2019-12-07 18:37:22,725 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:37:22,726 INFO L93 Difference]: Finished difference Result 14736 states and 46267 transitions. [2019-12-07 18:37:22,726 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:37:22,726 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 18:37:22,726 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:37:22,751 INFO L225 Difference]: With dead ends: 14736 [2019-12-07 18:37:22,751 INFO L226 Difference]: Without dead ends: 14736 [2019-12-07 18:37:22,751 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:37:22,823 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14736 states. [2019-12-07 18:37:22,977 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14736 to 13160. [2019-12-07 18:37:22,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13160 states. [2019-12-07 18:37:23,005 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13160 states to 13160 states and 41689 transitions. [2019-12-07 18:37:23,005 INFO L78 Accepts]: Start accepts. Automaton has 13160 states and 41689 transitions. Word has length 11 [2019-12-07 18:37:23,006 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:37:23,006 INFO L462 AbstractCegarLoop]: Abstraction has 13160 states and 41689 transitions. [2019-12-07 18:37:23,006 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:37:23,006 INFO L276 IsEmpty]: Start isEmpty. Operand 13160 states and 41689 transitions. [2019-12-07 18:37:23,009 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2019-12-07 18:37:23,009 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:37:23,009 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:37:23,009 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:37:23,010 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:37:23,010 INFO L82 PathProgramCache]: Analyzing trace with hash -1502155024, now seen corresponding path program 1 times [2019-12-07 18:37:23,010 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:37:23,010 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [391498788] [2019-12-07 18:37:23,010 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:37:23,026 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:37:23,071 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:37:23,072 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [391498788] [2019-12-07 18:37:23,072 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:37:23,072 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:37:23,072 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [709924607] [2019-12-07 18:37:23,072 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:37:23,073 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:37:23,073 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:37:23,073 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:37:23,073 INFO L87 Difference]: Start difference. First operand 13160 states and 41689 transitions. Second operand 5 states. [2019-12-07 18:37:23,396 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:37:23,396 INFO L93 Difference]: Finished difference Result 17572 states and 54523 transitions. [2019-12-07 18:37:23,396 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:37:23,396 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2019-12-07 18:37:23,396 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:37:23,421 INFO L225 Difference]: With dead ends: 17572 [2019-12-07 18:37:23,421 INFO L226 Difference]: Without dead ends: 17565 [2019-12-07 18:37:23,421 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:37:23,493 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17565 states. [2019-12-07 18:37:23,626 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17565 to 13105. [2019-12-07 18:37:23,626 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13105 states. [2019-12-07 18:37:23,646 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13105 states to 13105 states and 41426 transitions. [2019-12-07 18:37:23,646 INFO L78 Accepts]: Start accepts. Automaton has 13105 states and 41426 transitions. Word has length 17 [2019-12-07 18:37:23,646 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:37:23,646 INFO L462 AbstractCegarLoop]: Abstraction has 13105 states and 41426 transitions. [2019-12-07 18:37:23,646 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:37:23,646 INFO L276 IsEmpty]: Start isEmpty. Operand 13105 states and 41426 transitions. [2019-12-07 18:37:23,654 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 18:37:23,654 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:37:23,654 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:37:23,654 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:37:23,654 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:37:23,654 INFO L82 PathProgramCache]: Analyzing trace with hash 933350131, now seen corresponding path program 1 times [2019-12-07 18:37:23,655 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:37:23,655 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1188508432] [2019-12-07 18:37:23,655 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:37:23,665 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:37:23,684 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:37:23,684 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1188508432] [2019-12-07 18:37:23,684 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:37:23,684 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:37:23,685 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1831618393] [2019-12-07 18:37:23,685 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:37:23,685 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:37:23,685 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:37:23,685 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:37:23,685 INFO L87 Difference]: Start difference. First operand 13105 states and 41426 transitions. Second operand 3 states. [2019-12-07 18:37:23,767 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:37:23,767 INFO L93 Difference]: Finished difference Result 16057 states and 50095 transitions. [2019-12-07 18:37:23,767 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:37:23,767 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2019-12-07 18:37:23,768 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:37:23,794 INFO L225 Difference]: With dead ends: 16057 [2019-12-07 18:37:23,795 INFO L226 Difference]: Without dead ends: 16057 [2019-12-07 18:37:23,795 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:37:23,890 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16057 states. [2019-12-07 18:37:24,065 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16057 to 14186. [2019-12-07 18:37:24,066 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14186 states. [2019-12-07 18:37:24,087 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14186 states to 14186 states and 44710 transitions. [2019-12-07 18:37:24,087 INFO L78 Accepts]: Start accepts. Automaton has 14186 states and 44710 transitions. Word has length 25 [2019-12-07 18:37:24,088 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:37:24,088 INFO L462 AbstractCegarLoop]: Abstraction has 14186 states and 44710 transitions. [2019-12-07 18:37:24,088 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:37:24,088 INFO L276 IsEmpty]: Start isEmpty. Operand 14186 states and 44710 transitions. [2019-12-07 18:37:24,094 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 18:37:24,094 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:37:24,094 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:37:24,094 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:37:24,095 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:37:24,095 INFO L82 PathProgramCache]: Analyzing trace with hash 933194542, now seen corresponding path program 1 times [2019-12-07 18:37:24,095 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:37:24,095 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [738431147] [2019-12-07 18:37:24,095 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:37:24,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:37:24,138 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:37:24,138 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [738431147] [2019-12-07 18:37:24,139 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:37:24,139 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:37:24,139 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [879116896] [2019-12-07 18:37:24,139 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:37:24,139 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:37:24,140 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:37:24,140 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:37:24,140 INFO L87 Difference]: Start difference. First operand 14186 states and 44710 transitions. Second operand 4 states. [2019-12-07 18:37:24,164 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:37:24,164 INFO L93 Difference]: Finished difference Result 2296 states and 5226 transitions. [2019-12-07 18:37:24,165 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:37:24,165 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2019-12-07 18:37:24,165 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:37:24,167 INFO L225 Difference]: With dead ends: 2296 [2019-12-07 18:37:24,167 INFO L226 Difference]: Without dead ends: 2019 [2019-12-07 18:37:24,167 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:37:24,172 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2019 states. [2019-12-07 18:37:24,188 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2019 to 2019. [2019-12-07 18:37:24,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2019 states. [2019-12-07 18:37:24,190 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2019 states to 2019 states and 4460 transitions. [2019-12-07 18:37:24,190 INFO L78 Accepts]: Start accepts. Automaton has 2019 states and 4460 transitions. Word has length 25 [2019-12-07 18:37:24,190 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:37:24,190 INFO L462 AbstractCegarLoop]: Abstraction has 2019 states and 4460 transitions. [2019-12-07 18:37:24,190 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:37:24,190 INFO L276 IsEmpty]: Start isEmpty. Operand 2019 states and 4460 transitions. [2019-12-07 18:37:24,192 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-12-07 18:37:24,192 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:37:24,192 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:37:24,192 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:37:24,192 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:37:24,192 INFO L82 PathProgramCache]: Analyzing trace with hash -568804126, now seen corresponding path program 1 times [2019-12-07 18:37:24,192 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:37:24,192 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [821200347] [2019-12-07 18:37:24,192 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:37:24,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:37:24,263 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:37:24,263 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [821200347] [2019-12-07 18:37:24,263 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:37:24,263 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:37:24,263 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [466023058] [2019-12-07 18:37:24,263 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:37:24,264 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:37:24,264 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:37:24,264 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:37:24,264 INFO L87 Difference]: Start difference. First operand 2019 states and 4460 transitions. Second operand 5 states. [2019-12-07 18:37:24,293 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:37:24,293 INFO L93 Difference]: Finished difference Result 416 states and 758 transitions. [2019-12-07 18:37:24,294 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:37:24,294 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 37 [2019-12-07 18:37:24,294 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:37:24,294 INFO L225 Difference]: With dead ends: 416 [2019-12-07 18:37:24,294 INFO L226 Difference]: Without dead ends: 371 [2019-12-07 18:37:24,295 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:37:24,295 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 371 states. [2019-12-07 18:37:24,298 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 371 to 343. [2019-12-07 18:37:24,298 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 343 states. [2019-12-07 18:37:24,298 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 343 states to 343 states and 618 transitions. [2019-12-07 18:37:24,298 INFO L78 Accepts]: Start accepts. Automaton has 343 states and 618 transitions. Word has length 37 [2019-12-07 18:37:24,298 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:37:24,299 INFO L462 AbstractCegarLoop]: Abstraction has 343 states and 618 transitions. [2019-12-07 18:37:24,299 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:37:24,299 INFO L276 IsEmpty]: Start isEmpty. Operand 343 states and 618 transitions. [2019-12-07 18:37:24,300 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 18:37:24,300 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:37:24,300 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:37:24,300 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:37:24,300 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:37:24,301 INFO L82 PathProgramCache]: Analyzing trace with hash -506418728, now seen corresponding path program 1 times [2019-12-07 18:37:24,301 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:37:24,301 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [526862266] [2019-12-07 18:37:24,301 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:37:24,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:37:24,392 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:37:24,393 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [526862266] [2019-12-07 18:37:24,393 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:37:24,393 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 18:37:24,393 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [585855002] [2019-12-07 18:37:24,394 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:37:24,394 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:37:24,394 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:37:24,394 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:37:24,394 INFO L87 Difference]: Start difference. First operand 343 states and 618 transitions. Second operand 7 states. [2019-12-07 18:37:24,648 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:37:24,648 INFO L93 Difference]: Finished difference Result 539 states and 970 transitions. [2019-12-07 18:37:24,648 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 18:37:24,649 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 52 [2019-12-07 18:37:24,649 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:37:24,649 INFO L225 Difference]: With dead ends: 539 [2019-12-07 18:37:24,649 INFO L226 Difference]: Without dead ends: 539 [2019-12-07 18:37:24,649 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=80, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:37:24,650 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 539 states. [2019-12-07 18:37:24,655 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 539 to 444. [2019-12-07 18:37:24,655 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 444 states. [2019-12-07 18:37:24,656 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 444 states to 444 states and 802 transitions. [2019-12-07 18:37:24,656 INFO L78 Accepts]: Start accepts. Automaton has 444 states and 802 transitions. Word has length 52 [2019-12-07 18:37:24,656 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:37:24,656 INFO L462 AbstractCegarLoop]: Abstraction has 444 states and 802 transitions. [2019-12-07 18:37:24,656 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:37:24,656 INFO L276 IsEmpty]: Start isEmpty. Operand 444 states and 802 transitions. [2019-12-07 18:37:24,657 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 18:37:24,657 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:37:24,657 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:37:24,658 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:37:24,658 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:37:24,658 INFO L82 PathProgramCache]: Analyzing trace with hash 22285210, now seen corresponding path program 2 times [2019-12-07 18:37:24,658 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:37:24,658 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [238237231] [2019-12-07 18:37:24,658 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:37:24,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:37:24,716 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:37:24,716 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [238237231] [2019-12-07 18:37:24,716 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:37:24,716 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:37:24,716 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1093126818] [2019-12-07 18:37:24,717 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:37:24,717 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:37:24,717 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:37:24,717 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:37:24,717 INFO L87 Difference]: Start difference. First operand 444 states and 802 transitions. Second operand 5 states. [2019-12-07 18:37:24,843 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:37:24,843 INFO L93 Difference]: Finished difference Result 621 states and 1127 transitions. [2019-12-07 18:37:24,843 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:37:24,843 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 52 [2019-12-07 18:37:24,844 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:37:24,844 INFO L225 Difference]: With dead ends: 621 [2019-12-07 18:37:24,844 INFO L226 Difference]: Without dead ends: 621 [2019-12-07 18:37:24,844 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:37:24,845 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 621 states. [2019-12-07 18:37:24,848 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 621 to 504. [2019-12-07 18:37:24,848 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 504 states. [2019-12-07 18:37:24,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 504 states to 504 states and 921 transitions. [2019-12-07 18:37:24,849 INFO L78 Accepts]: Start accepts. Automaton has 504 states and 921 transitions. Word has length 52 [2019-12-07 18:37:24,849 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:37:24,849 INFO L462 AbstractCegarLoop]: Abstraction has 504 states and 921 transitions. [2019-12-07 18:37:24,849 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:37:24,849 INFO L276 IsEmpty]: Start isEmpty. Operand 504 states and 921 transitions. [2019-12-07 18:37:24,850 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 18:37:24,850 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:37:24,850 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:37:24,850 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:37:24,850 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:37:24,850 INFO L82 PathProgramCache]: Analyzing trace with hash 260455414, now seen corresponding path program 3 times [2019-12-07 18:37:24,850 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:37:24,851 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1300676491] [2019-12-07 18:37:24,851 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:37:24,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:37:24,917 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:37:24,917 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1300676491] [2019-12-07 18:37:24,917 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:37:24,917 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:37:24,917 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [991533875] [2019-12-07 18:37:24,918 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:37:24,918 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:37:24,918 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:37:24,918 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:37:24,918 INFO L87 Difference]: Start difference. First operand 504 states and 921 transitions. Second operand 6 states. [2019-12-07 18:37:25,131 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:37:25,131 INFO L93 Difference]: Finished difference Result 719 states and 1302 transitions. [2019-12-07 18:37:25,132 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 18:37:25,132 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2019-12-07 18:37:25,132 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:37:25,132 INFO L225 Difference]: With dead ends: 719 [2019-12-07 18:37:25,132 INFO L226 Difference]: Without dead ends: 719 [2019-12-07 18:37:25,133 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 3 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:37:25,133 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 719 states. [2019-12-07 18:37:25,136 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 719 to 516. [2019-12-07 18:37:25,136 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 516 states. [2019-12-07 18:37:25,137 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 516 states to 516 states and 943 transitions. [2019-12-07 18:37:25,137 INFO L78 Accepts]: Start accepts. Automaton has 516 states and 943 transitions. Word has length 52 [2019-12-07 18:37:25,137 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:37:25,137 INFO L462 AbstractCegarLoop]: Abstraction has 516 states and 943 transitions. [2019-12-07 18:37:25,137 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:37:25,137 INFO L276 IsEmpty]: Start isEmpty. Operand 516 states and 943 transitions. [2019-12-07 18:37:25,138 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 18:37:25,138 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:37:25,138 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:37:25,138 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:37:25,138 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:37:25,139 INFO L82 PathProgramCache]: Analyzing trace with hash -681731879, now seen corresponding path program 1 times [2019-12-07 18:37:25,139 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:37:25,139 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [734237017] [2019-12-07 18:37:25,139 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:37:25,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:37:25,305 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:37:25,306 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [734237017] [2019-12-07 18:37:25,306 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:37:25,306 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 18:37:25,306 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [907932831] [2019-12-07 18:37:25,306 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 18:37:25,306 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:37:25,306 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 18:37:25,307 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:37:25,307 INFO L87 Difference]: Start difference. First operand 516 states and 943 transitions. Second operand 12 states. [2019-12-07 18:37:25,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:37:25,651 INFO L93 Difference]: Finished difference Result 978 states and 1768 transitions. [2019-12-07 18:37:25,652 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 18:37:25,652 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 53 [2019-12-07 18:37:25,652 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:37:25,653 INFO L225 Difference]: With dead ends: 978 [2019-12-07 18:37:25,653 INFO L226 Difference]: Without dead ends: 471 [2019-12-07 18:37:25,653 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=104, Invalid=276, Unknown=0, NotChecked=0, Total=380 [2019-12-07 18:37:25,654 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 471 states. [2019-12-07 18:37:25,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 471 to 407. [2019-12-07 18:37:25,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 407 states. [2019-12-07 18:37:25,657 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 407 states to 407 states and 753 transitions. [2019-12-07 18:37:25,657 INFO L78 Accepts]: Start accepts. Automaton has 407 states and 753 transitions. Word has length 53 [2019-12-07 18:37:25,657 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:37:25,657 INFO L462 AbstractCegarLoop]: Abstraction has 407 states and 753 transitions. [2019-12-07 18:37:25,657 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 18:37:25,657 INFO L276 IsEmpty]: Start isEmpty. Operand 407 states and 753 transitions. [2019-12-07 18:37:25,658 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 18:37:25,658 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:37:25,658 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:37:25,658 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:37:25,658 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:37:25,658 INFO L82 PathProgramCache]: Analyzing trace with hash -983517111, now seen corresponding path program 1 times [2019-12-07 18:37:25,658 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:37:25,658 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1257186503] [2019-12-07 18:37:25,658 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:37:25,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:37:25,703 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:37:25,703 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1257186503] [2019-12-07 18:37:25,703 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:37:25,704 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:37:25,704 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1857856669] [2019-12-07 18:37:25,704 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:37:25,704 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:37:25,704 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:37:25,704 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:37:25,704 INFO L87 Difference]: Start difference. First operand 407 states and 753 transitions. Second operand 3 states. [2019-12-07 18:37:25,711 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:37:25,711 INFO L93 Difference]: Finished difference Result 357 states and 640 transitions. [2019-12-07 18:37:25,711 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:37:25,711 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-12-07 18:37:25,711 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:37:25,712 INFO L225 Difference]: With dead ends: 357 [2019-12-07 18:37:25,712 INFO L226 Difference]: Without dead ends: 357 [2019-12-07 18:37:25,712 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:37:25,712 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 357 states. [2019-12-07 18:37:25,714 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 357 to 357. [2019-12-07 18:37:25,714 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 357 states. [2019-12-07 18:37:25,714 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 357 states to 357 states and 640 transitions. [2019-12-07 18:37:25,714 INFO L78 Accepts]: Start accepts. Automaton has 357 states and 640 transitions. Word has length 53 [2019-12-07 18:37:25,715 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:37:25,715 INFO L462 AbstractCegarLoop]: Abstraction has 357 states and 640 transitions. [2019-12-07 18:37:25,715 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:37:25,715 INFO L276 IsEmpty]: Start isEmpty. Operand 357 states and 640 transitions. [2019-12-07 18:37:25,715 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 18:37:25,715 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:37:25,715 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:37:25,715 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:37:25,716 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:37:25,716 INFO L82 PathProgramCache]: Analyzing trace with hash -1828454951, now seen corresponding path program 2 times [2019-12-07 18:37:25,716 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:37:25,716 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1514349226] [2019-12-07 18:37:25,716 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:37:25,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:37:25,822 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:37:25,822 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1514349226] [2019-12-07 18:37:25,822 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:37:25,822 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:37:25,822 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [553082703] [2019-12-07 18:37:25,823 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 18:37:25,823 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:37:25,823 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 18:37:25,823 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:37:25,823 INFO L87 Difference]: Start difference. First operand 357 states and 640 transitions. Second operand 9 states. [2019-12-07 18:37:26,259 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:37:26,260 INFO L93 Difference]: Finished difference Result 396 states and 664 transitions. [2019-12-07 18:37:26,260 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 18:37:26,260 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 53 [2019-12-07 18:37:26,260 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:37:26,260 INFO L225 Difference]: With dead ends: 396 [2019-12-07 18:37:26,260 INFO L226 Difference]: Without dead ends: 396 [2019-12-07 18:37:26,261 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 3 SyntacticMatches, 4 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=52, Invalid=130, Unknown=0, NotChecked=0, Total=182 [2019-12-07 18:37:26,261 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 396 states. [2019-12-07 18:37:26,263 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 396 to 255. [2019-12-07 18:37:26,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 255 states. [2019-12-07 18:37:26,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 255 states to 255 states and 432 transitions. [2019-12-07 18:37:26,263 INFO L78 Accepts]: Start accepts. Automaton has 255 states and 432 transitions. Word has length 53 [2019-12-07 18:37:26,263 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:37:26,263 INFO L462 AbstractCegarLoop]: Abstraction has 255 states and 432 transitions. [2019-12-07 18:37:26,263 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 18:37:26,263 INFO L276 IsEmpty]: Start isEmpty. Operand 255 states and 432 transitions. [2019-12-07 18:37:26,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 18:37:26,264 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:37:26,264 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:37:26,264 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:37:26,264 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:37:26,264 INFO L82 PathProgramCache]: Analyzing trace with hash -1114856101, now seen corresponding path program 3 times [2019-12-07 18:37:26,264 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:37:26,264 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [30753306] [2019-12-07 18:37:26,265 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:37:26,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:37:26,305 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:37:26,305 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [30753306] [2019-12-07 18:37:26,305 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:37:26,305 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:37:26,305 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1447585872] [2019-12-07 18:37:26,305 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:37:26,305 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:37:26,306 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:37:26,306 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:37:26,306 INFO L87 Difference]: Start difference. First operand 255 states and 432 transitions. Second operand 3 states. [2019-12-07 18:37:26,330 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:37:26,331 INFO L93 Difference]: Finished difference Result 255 states and 431 transitions. [2019-12-07 18:37:26,331 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:37:26,331 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-12-07 18:37:26,331 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:37:26,331 INFO L225 Difference]: With dead ends: 255 [2019-12-07 18:37:26,331 INFO L226 Difference]: Without dead ends: 255 [2019-12-07 18:37:26,332 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:37:26,332 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 255 states. [2019-12-07 18:37:26,333 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 255 to 206. [2019-12-07 18:37:26,333 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 206 states. [2019-12-07 18:37:26,334 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 206 states to 206 states and 347 transitions. [2019-12-07 18:37:26,334 INFO L78 Accepts]: Start accepts. Automaton has 206 states and 347 transitions. Word has length 53 [2019-12-07 18:37:26,334 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:37:26,334 INFO L462 AbstractCegarLoop]: Abstraction has 206 states and 347 transitions. [2019-12-07 18:37:26,334 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:37:26,334 INFO L276 IsEmpty]: Start isEmpty. Operand 206 states and 347 transitions. [2019-12-07 18:37:26,334 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 18:37:26,334 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:37:26,334 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:37:26,335 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:37:26,335 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:37:26,335 INFO L82 PathProgramCache]: Analyzing trace with hash -1034362442, now seen corresponding path program 1 times [2019-12-07 18:37:26,335 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:37:26,335 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [750937110] [2019-12-07 18:37:26,335 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:37:26,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:37:26,684 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:37:26,684 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [750937110] [2019-12-07 18:37:26,684 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:37:26,684 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2019-12-07 18:37:26,684 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1427488265] [2019-12-07 18:37:26,685 INFO L442 AbstractCegarLoop]: Interpolant automaton has 20 states [2019-12-07 18:37:26,685 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:37:26,685 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2019-12-07 18:37:26,685 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=67, Invalid=313, Unknown=0, NotChecked=0, Total=380 [2019-12-07 18:37:26,685 INFO L87 Difference]: Start difference. First operand 206 states and 347 transitions. Second operand 20 states. [2019-12-07 18:37:27,436 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:37:27,436 INFO L93 Difference]: Finished difference Result 462 states and 782 transitions. [2019-12-07 18:37:27,437 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2019-12-07 18:37:27,437 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 54 [2019-12-07 18:37:27,437 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:37:27,437 INFO L225 Difference]: With dead ends: 462 [2019-12-07 18:37:27,437 INFO L226 Difference]: Without dead ends: 429 [2019-12-07 18:37:27,438 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 1 SyntacticMatches, 4 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 315 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=291, Invalid=1349, Unknown=0, NotChecked=0, Total=1640 [2019-12-07 18:37:27,438 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 429 states. [2019-12-07 18:37:27,440 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 429 to 324. [2019-12-07 18:37:27,440 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 324 states. [2019-12-07 18:37:27,440 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 324 states to 324 states and 552 transitions. [2019-12-07 18:37:27,441 INFO L78 Accepts]: Start accepts. Automaton has 324 states and 552 transitions. Word has length 54 [2019-12-07 18:37:27,441 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:37:27,441 INFO L462 AbstractCegarLoop]: Abstraction has 324 states and 552 transitions. [2019-12-07 18:37:27,441 INFO L463 AbstractCegarLoop]: Interpolant automaton has 20 states. [2019-12-07 18:37:27,441 INFO L276 IsEmpty]: Start isEmpty. Operand 324 states and 552 transitions. [2019-12-07 18:37:27,441 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 18:37:27,441 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:37:27,441 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:37:27,442 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:37:27,442 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:37:27,442 INFO L82 PathProgramCache]: Analyzing trace with hash 916587422, now seen corresponding path program 2 times [2019-12-07 18:37:27,442 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:37:27,442 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1807084799] [2019-12-07 18:37:27,442 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:37:27,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:37:27,587 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:37:27,587 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1807084799] [2019-12-07 18:37:27,587 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:37:27,587 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 18:37:27,587 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1150539892] [2019-12-07 18:37:27,588 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 18:37:27,588 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:37:27,588 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 18:37:27,588 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=129, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:37:27,588 INFO L87 Difference]: Start difference. First operand 324 states and 552 transitions. Second operand 13 states. [2019-12-07 18:37:27,907 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:37:27,907 INFO L93 Difference]: Finished difference Result 431 states and 712 transitions. [2019-12-07 18:37:27,907 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 18:37:27,908 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 54 [2019-12-07 18:37:27,908 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:37:27,908 INFO L225 Difference]: With dead ends: 431 [2019-12-07 18:37:27,908 INFO L226 Difference]: Without dead ends: 396 [2019-12-07 18:37:27,908 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 82 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=112, Invalid=488, Unknown=0, NotChecked=0, Total=600 [2019-12-07 18:37:27,909 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 396 states. [2019-12-07 18:37:27,910 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 396 to 314. [2019-12-07 18:37:27,910 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 314 states. [2019-12-07 18:37:27,911 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 314 states to 314 states and 532 transitions. [2019-12-07 18:37:27,911 INFO L78 Accepts]: Start accepts. Automaton has 314 states and 532 transitions. Word has length 54 [2019-12-07 18:37:27,911 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:37:27,911 INFO L462 AbstractCegarLoop]: Abstraction has 314 states and 532 transitions. [2019-12-07 18:37:27,911 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 18:37:27,911 INFO L276 IsEmpty]: Start isEmpty. Operand 314 states and 532 transitions. [2019-12-07 18:37:27,912 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 18:37:27,912 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:37:27,912 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:37:27,912 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:37:27,912 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:37:27,912 INFO L82 PathProgramCache]: Analyzing trace with hash -91775718, now seen corresponding path program 3 times [2019-12-07 18:37:27,912 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:37:27,912 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2122096277] [2019-12-07 18:37:27,912 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:37:27,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:37:27,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:37:27,975 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 18:37:27,975 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 18:37:27,978 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [702] [702] ULTIMATE.startENTRY-->L779: Formula: (let ((.cse0 (store |v_#valid_47| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= v_~y$r_buff1_thd0~0_329 0) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t2015~0.base_24| 4)) (= v_~y$w_buff0_used~0_834 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t2015~0.base_24|) 0) (= 0 v_~__unbuffered_cnt~0_61) (= 0 v_~weak$$choice0~0_14) (= v_~y$r_buff1_thd1~0_200 0) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2015~0.base_24| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2015~0.base_24|) |v_ULTIMATE.start_main_~#t2015~0.offset_19| 0)) |v_#memory_int_11|) (= 0 v_~x~0_147) (= |v_#NULL.offset_3| 0) (= |v_ULTIMATE.start_main_~#t2015~0.offset_19| 0) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t2015~0.base_24|) (= v_~main$tmp_guard1~0_27 0) (= v_~y$read_delayed~0_6 0) (= 0 v_~__unbuffered_p1_EAX~0_29) (= 0 v_~y$r_buff1_thd2~0_208) (= 0 v_~y$r_buff0_thd2~0_162) (= v_~y$mem_tmp~0_19 0) (= v_~weak$$choice2~0_141 0) (= v_~y$w_buff1_used~0_547 0) (= v_~y$r_buff0_thd1~0_297 0) (= 0 v_~y$flush_delayed~0_36) (= v_~main$tmp_guard0~0_33 0) (= 0 |v_#NULL.base_3|) (= 0 v_~y$w_buff0~0_485) (= 0 v_~y$read_delayed_var~0.offset_6) (= v_~y$r_buff0_thd0~0_416 0) (= v_~y~0_146 0) (= |v_#valid_45| (store .cse0 |v_ULTIMATE.start_main_~#t2015~0.base_24| 1)) (< 0 |v_#StackHeapBarrier_13|) (= v_~y$w_buff1~0_308 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_41|, ULTIMATE.start_main_~#t2016~0.offset=|v_ULTIMATE.start_main_~#t2016~0.offset_16|, #NULL.offset=|v_#NULL.offset_3|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_35|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_145|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_48|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_37|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_36|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ~y$mem_tmp~0=v_~y$mem_tmp~0_19, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_29, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_297, ~y$flush_delayed~0=v_~y$flush_delayed~0_36, #length=|v_#length_13|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_36|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_38|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_21|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_27|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_41|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_44|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_38|, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_36|, ~y$w_buff1~0=v_~y$w_buff1~0_308, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_162, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61, ULTIMATE.start_main_~#t2016~0.base=|v_ULTIMATE.start_main_~#t2016~0.base_19|, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_329, ~x~0=v_~x~0_147, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_834, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_36|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_33|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_27, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_43|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_33|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_42|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_34|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_200, ULTIMATE.start_main_~#t2015~0.base=|v_ULTIMATE.start_main_~#t2015~0.base_24|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_34|, ULTIMATE.start_main_~#t2015~0.offset=|v_ULTIMATE.start_main_~#t2015~0.offset_19|, ~y$w_buff0~0=v_~y$w_buff0~0_485, ~y~0=v_~y~0_146, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_29|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_21|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_33|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_53|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_27|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_33, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_35|, #NULL.base=|v_#NULL.base_3|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_40|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_208, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_37|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_416, #valid=|v_#valid_45|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_14|, ~weak$$choice2~0=v_~weak$$choice2~0_141, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_547} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t2016~0.offset, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~y$mem_tmp~0, ~__unbuffered_p1_EAX~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t2016~0.base, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_~#t2015~0.base, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_~#t2015~0.offset, ~y$w_buff0~0, ~y~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 18:37:27,978 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [675] [675] L779-1-->L781: Formula: (and (= (select |v_#valid_28| |v_ULTIMATE.start_main_~#t2016~0.base_11|) 0) (= (store |v_#memory_int_8| |v_ULTIMATE.start_main_~#t2016~0.base_11| (store (select |v_#memory_int_8| |v_ULTIMATE.start_main_~#t2016~0.base_11|) |v_ULTIMATE.start_main_~#t2016~0.offset_10| 1)) |v_#memory_int_7|) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t2016~0.base_11| 1)) (= 0 |v_ULTIMATE.start_main_~#t2016~0.offset_10|) (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t2016~0.base_11|) (= (store |v_#length_10| |v_ULTIMATE.start_main_~#t2016~0.base_11| 4) |v_#length_9|) (not (= 0 |v_ULTIMATE.start_main_~#t2016~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_8|, #length=|v_#length_10|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_8|, ULTIMATE.start_main_~#t2016~0.offset=|v_ULTIMATE.start_main_~#t2016~0.offset_10|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_7|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_6|, #length=|v_#length_9|, ULTIMATE.start_main_~#t2016~0.base=|v_ULTIMATE.start_main_~#t2016~0.base_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2016~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t2016~0.base] because there is no mapped edge [2019-12-07 18:37:27,978 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [638] [638] P0ENTRY-->L4-3: Formula: (and (= v_~y$w_buff1~0_121 v_~y$w_buff0~0_204) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98 0)) (= v_P0Thread1of1ForFork0_~arg.base_94 |v_P0Thread1of1ForFork0_#in~arg.base_96|) (= 2 v_~y$w_buff0~0_203) (= |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94| (ite (not (and (not (= 0 (mod v_~y$w_buff0_used~0_349 256))) (not (= 0 (mod v_~y$w_buff1_used~0_210 256))))) 1 0)) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94|) (= v_P0Thread1of1ForFork0_~arg.offset_94 |v_P0Thread1of1ForFork0_#in~arg.offset_96|) (= v_~y$w_buff0_used~0_350 v_~y$w_buff1_used~0_210) (= v_~y$w_buff0_used~0_349 1)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_96|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_350, ~y$w_buff0~0=v_~y$w_buff0~0_204, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_96|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_96|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_349, ~y$w_buff1~0=v_~y$w_buff1~0_121, ~y$w_buff0~0=v_~y$w_buff0~0_203, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_96|, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_94, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_94, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_210} AuxVars[] AssignedVars[~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 18:37:27,979 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [642] [642] L756-2-->L756-4: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd2~0_In85697320 256) 0)) (.cse1 (= (mod ~y$w_buff1_used~0_In85697320 256) 0))) (or (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite9_Out85697320| ~y$w_buff1~0_In85697320) (not .cse1)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite9_Out85697320| ~y~0_In85697320)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In85697320, ~y$w_buff1~0=~y$w_buff1~0_In85697320, ~y~0=~y~0_In85697320, ~y$w_buff1_used~0=~y$w_buff1_used~0_In85697320} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In85697320, ~y$w_buff1~0=~y$w_buff1~0_In85697320, P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out85697320|, ~y~0=~y~0_In85697320, ~y$w_buff1_used~0=~y$w_buff1_used~0_In85697320} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9] because there is no mapped edge [2019-12-07 18:37:27,980 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [621] [621] L756-4-->L757: Formula: (= |v_P1Thread1of1ForFork1_#t~ite9_8| v_~y~0_41) InVars {P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_8|} OutVars{P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_7|, P1Thread1of1ForFork1_#t~ite10=|v_P1Thread1of1ForFork1_#t~ite10_13|, ~y~0=v_~y~0_41} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10, ~y~0] because there is no mapped edge [2019-12-07 18:37:27,980 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [646] [646] L757-->L757-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In717503525 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In717503525 256) 0))) (or (and (= ~y$w_buff0_used~0_In717503525 |P1Thread1of1ForFork1_#t~ite11_Out717503525|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out717503525|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In717503525, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In717503525} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In717503525, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In717503525, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out717503525|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 18:37:27,980 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L758-->L758-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff0_thd2~0_In1218618018 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In1218618018 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In1218618018 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd2~0_In1218618018 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite12_Out1218618018| ~y$w_buff1_used~0_In1218618018) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |P1Thread1of1ForFork1_#t~ite12_Out1218618018| 0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1218618018, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1218618018, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1218618018, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1218618018} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1218618018, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1218618018, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1218618018, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out1218618018|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1218618018} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 18:37:27,980 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [645] [645] L759-->L759-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In1375124403 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd2~0_In1375124403 256) 0))) (or (and (= ~y$r_buff0_thd2~0_In1375124403 |P1Thread1of1ForFork1_#t~ite13_Out1375124403|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite13_Out1375124403|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1375124403, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1375124403} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1375124403, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1375124403, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out1375124403|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 18:37:27,980 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L760-->L760-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In-513326958 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd2~0_In-513326958 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In-513326958 256) 0)) (.cse3 (= (mod ~y$r_buff0_thd2~0_In-513326958 256) 0))) (or (and (= ~y$r_buff1_thd2~0_In-513326958 |P1Thread1of1ForFork1_#t~ite14_Out-513326958|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite14_Out-513326958|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-513326958, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-513326958, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-513326958, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-513326958} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-513326958, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-513326958, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-513326958, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-513326958|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-513326958} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 18:37:27,980 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L760-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite14_28| v_~y$r_buff1_thd2~0_91) (= (+ v_~__unbuffered_cnt~0_39 1) v_~__unbuffered_cnt~0_38) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_28|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_91, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_27|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 18:37:27,981 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L737-->L737-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd1~0_In968374911 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In968374911 256)))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork0_#t~ite5_Out968374911| ~y$w_buff0_used~0_In968374911)) (and (not .cse1) (not .cse0) (= |P0Thread1of1ForFork0_#t~ite5_Out968374911| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In968374911, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In968374911} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out968374911|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In968374911, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In968374911} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 18:37:27,981 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [641] [641] L738-->L738-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-482675587 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd1~0_In-482675587 256))) (.cse2 (= (mod ~y$w_buff1_used~0_In-482675587 256) 0)) (.cse3 (= (mod ~y$r_buff1_thd1~0_In-482675587 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite6_Out-482675587| 0)) (and (or .cse1 .cse0) (or .cse2 .cse3) (= |P0Thread1of1ForFork0_#t~ite6_Out-482675587| ~y$w_buff1_used~0_In-482675587)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-482675587, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-482675587, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-482675587, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-482675587} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-482675587|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-482675587, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-482675587, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-482675587, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-482675587} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 18:37:27,981 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L739-->L740: Formula: (let ((.cse1 (= ~y$r_buff0_thd1~0_Out369661034 ~y$r_buff0_thd1~0_In369661034)) (.cse0 (= (mod ~y$r_buff0_thd1~0_In369661034 256) 0)) (.cse2 (= (mod ~y$w_buff0_used~0_In369661034 256) 0))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (not .cse0) (not .cse2) (= ~y$r_buff0_thd1~0_Out369661034 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In369661034, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In369661034} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In369661034, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out369661034|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_Out369661034} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~y$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:37:27,981 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L740-->L740-2: Formula: (let ((.cse2 (= 0 (mod ~y$w_buff0_used~0_In532205848 256))) (.cse3 (= 0 (mod ~y$r_buff0_thd1~0_In532205848 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In532205848 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd1~0_In532205848 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$r_buff1_thd1~0_In532205848 |P0Thread1of1ForFork0_#t~ite8_Out532205848|)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |P0Thread1of1ForFork0_#t~ite8_Out532205848|)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In532205848, ~y$w_buff0_used~0=~y$w_buff0_used~0_In532205848, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In532205848, ~y$w_buff1_used~0=~y$w_buff1_used~0_In532205848} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In532205848, ~y$w_buff0_used~0=~y$w_buff0_used~0_In532205848, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out532205848|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In532205848, ~y$w_buff1_used~0=~y$w_buff1_used~0_In532205848} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 18:37:27,981 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [668] [668] L740-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~y$r_buff1_thd1~0_80 |v_P0Thread1of1ForFork0_#t~ite8_28|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~__unbuffered_cnt~0_31 (+ v_~__unbuffered_cnt~0_32 1))) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_80, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_27|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_31} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 18:37:27,981 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [577] [577] L785-->L787-2: Formula: (and (not (= (mod v_~main$tmp_guard0~0_4 256) 0)) (or (= (mod v_~y$w_buff0_used~0_67 256) 0) (= 0 (mod v_~y$r_buff0_thd0~0_44 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_67, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_44, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_4} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_67, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_44, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_4} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 18:37:27,982 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L787-2-->L787-5: Formula: (let ((.cse2 (= (mod ~y$r_buff1_thd0~0_In108298849 256) 0)) (.cse0 (= |ULTIMATE.start_main_#t~ite18_Out108298849| |ULTIMATE.start_main_#t~ite17_Out108298849|)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In108298849 256)))) (or (and (= ~y~0_In108298849 |ULTIMATE.start_main_#t~ite17_Out108298849|) .cse0 (or .cse1 .cse2)) (and (= ~y$w_buff1~0_In108298849 |ULTIMATE.start_main_#t~ite17_Out108298849|) (not .cse2) .cse0 (not .cse1)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In108298849, ~y~0=~y~0_In108298849, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In108298849, ~y$w_buff1_used~0=~y$w_buff1_used~0_In108298849} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out108298849|, ~y$w_buff1~0=~y$w_buff1~0_In108298849, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out108298849|, ~y~0=~y~0_In108298849, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In108298849, ~y$w_buff1_used~0=~y$w_buff1_used~0_In108298849} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18] because there is no mapped edge [2019-12-07 18:37:27,982 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [644] [644] L788-->L788-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In542650917 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In542650917 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite19_Out542650917| 0)) (and (= ~y$w_buff0_used~0_In542650917 |ULTIMATE.start_main_#t~ite19_Out542650917|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In542650917, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In542650917} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In542650917, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out542650917|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In542650917} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 18:37:27,982 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L789-->L789-2: Formula: (let ((.cse2 (= (mod ~y$w_buff0_used~0_In-791148359 256) 0)) (.cse3 (= (mod ~y$r_buff0_thd0~0_In-791148359 256) 0)) (.cse1 (= (mod ~y$w_buff1_used~0_In-791148359 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd0~0_In-791148359 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite20_Out-791148359| 0)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite20_Out-791148359| ~y$w_buff1_used~0_In-791148359)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-791148359, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-791148359, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-791148359, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-791148359} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-791148359, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-791148359, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-791148359|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-791148359, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-791148359} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 18:37:27,982 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [639] [639] L790-->L790-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In149080008 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In149080008 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite21_Out149080008| ~y$r_buff0_thd0~0_In149080008)) (and (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite21_Out149080008|) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In149080008, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In149080008} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In149080008, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In149080008, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out149080008|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 18:37:27,982 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [651] [651] L791-->L791-2: Formula: (let ((.cse2 (= (mod ~y$w_buff0_used~0_In1858809408 256) 0)) (.cse3 (= (mod ~y$r_buff0_thd0~0_In1858809408 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd0~0_In1858809408 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In1858809408 256)))) (or (and (= |ULTIMATE.start_main_#t~ite22_Out1858809408| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |ULTIMATE.start_main_#t~ite22_Out1858809408| ~y$r_buff1_thd0~0_In1858809408) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1858809408, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1858809408, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1858809408, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1858809408} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1858809408, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1858809408, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1858809408, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out1858809408|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1858809408} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 18:37:27,983 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L800-->L800-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1742421046 256) 0))) (or (and (= ~y$w_buff1~0_In1742421046 |ULTIMATE.start_main_#t~ite31_Out1742421046|) (= |ULTIMATE.start_main_#t~ite32_Out1742421046| |ULTIMATE.start_main_#t~ite31_Out1742421046|) .cse0 (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In1742421046 256) 0))) (or (= 0 (mod ~y$w_buff0_used~0_In1742421046 256)) (and .cse1 (= (mod ~y$w_buff1_used~0_In1742421046 256) 0)) (and (= (mod ~y$r_buff1_thd0~0_In1742421046 256) 0) .cse1)))) (and (= |ULTIMATE.start_main_#t~ite32_Out1742421046| ~y$w_buff1~0_In1742421046) (not .cse0) (= |ULTIMATE.start_main_#t~ite31_In1742421046| |ULTIMATE.start_main_#t~ite31_Out1742421046|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In1742421046, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1742421046, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1742421046, ~weak$$choice2~0=~weak$$choice2~0_In1742421046, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_In1742421046|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1742421046, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1742421046} OutVars{~y$w_buff1~0=~y$w_buff1~0_In1742421046, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1742421046, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1742421046, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_Out1742421046|, ~weak$$choice2~0=~weak$$choice2~0_In1742421046, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out1742421046|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1742421046, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1742421046} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32] because there is no mapped edge [2019-12-07 18:37:27,984 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [637] [637] L803-->L804: Formula: (and (= v_~y$r_buff0_thd0~0_162 v_~y$r_buff0_thd0~0_163) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_163, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_9|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_11|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_18|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_162, ~weak$$choice2~0=v_~weak$$choice2~0_39} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39, ~y$r_buff0_thd0~0] because there is no mapped edge [2019-12-07 18:37:27,985 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L806-->L809-1: Formula: (and (= 0 v_~y$flush_delayed~0_24) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6| (mod v_~main$tmp_guard1~0_12 256)) (not (= 0 (mod v_~y$flush_delayed~0_25 256))) (= v_~y~0_106 v_~y$mem_tmp~0_13)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_13, ~y$flush_delayed~0=v_~y$flush_delayed~0_25, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_13, ~y$flush_delayed~0=v_~y$flush_delayed~0_24, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12, ~y~0=v_~y~0_106, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_22|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[~y$flush_delayed~0, ~y~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:37:27,985 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L809-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 18:37:28,029 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 06:37:28 BasicIcfg [2019-12-07 18:37:28,029 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 18:37:28,029 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 18:37:28,029 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 18:37:28,029 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 18:37:28,030 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:37:17" (3/4) ... [2019-12-07 18:37:28,031 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 18:37:28,032 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [702] [702] ULTIMATE.startENTRY-->L779: Formula: (let ((.cse0 (store |v_#valid_47| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= v_~y$r_buff1_thd0~0_329 0) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t2015~0.base_24| 4)) (= v_~y$w_buff0_used~0_834 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t2015~0.base_24|) 0) (= 0 v_~__unbuffered_cnt~0_61) (= 0 v_~weak$$choice0~0_14) (= v_~y$r_buff1_thd1~0_200 0) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2015~0.base_24| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2015~0.base_24|) |v_ULTIMATE.start_main_~#t2015~0.offset_19| 0)) |v_#memory_int_11|) (= 0 v_~x~0_147) (= |v_#NULL.offset_3| 0) (= |v_ULTIMATE.start_main_~#t2015~0.offset_19| 0) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t2015~0.base_24|) (= v_~main$tmp_guard1~0_27 0) (= v_~y$read_delayed~0_6 0) (= 0 v_~__unbuffered_p1_EAX~0_29) (= 0 v_~y$r_buff1_thd2~0_208) (= 0 v_~y$r_buff0_thd2~0_162) (= v_~y$mem_tmp~0_19 0) (= v_~weak$$choice2~0_141 0) (= v_~y$w_buff1_used~0_547 0) (= v_~y$r_buff0_thd1~0_297 0) (= 0 v_~y$flush_delayed~0_36) (= v_~main$tmp_guard0~0_33 0) (= 0 |v_#NULL.base_3|) (= 0 v_~y$w_buff0~0_485) (= 0 v_~y$read_delayed_var~0.offset_6) (= v_~y$r_buff0_thd0~0_416 0) (= v_~y~0_146 0) (= |v_#valid_45| (store .cse0 |v_ULTIMATE.start_main_~#t2015~0.base_24| 1)) (< 0 |v_#StackHeapBarrier_13|) (= v_~y$w_buff1~0_308 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_41|, ULTIMATE.start_main_~#t2016~0.offset=|v_ULTIMATE.start_main_~#t2016~0.offset_16|, #NULL.offset=|v_#NULL.offset_3|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_35|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_145|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_48|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_37|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_36|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ~y$mem_tmp~0=v_~y$mem_tmp~0_19, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_29, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_297, ~y$flush_delayed~0=v_~y$flush_delayed~0_36, #length=|v_#length_13|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_36|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_38|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_21|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_27|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_41|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_44|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_38|, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_36|, ~y$w_buff1~0=v_~y$w_buff1~0_308, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_162, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61, ULTIMATE.start_main_~#t2016~0.base=|v_ULTIMATE.start_main_~#t2016~0.base_19|, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_329, ~x~0=v_~x~0_147, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_834, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_36|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_33|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_27, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_43|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_33|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_42|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_34|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_200, ULTIMATE.start_main_~#t2015~0.base=|v_ULTIMATE.start_main_~#t2015~0.base_24|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_34|, ULTIMATE.start_main_~#t2015~0.offset=|v_ULTIMATE.start_main_~#t2015~0.offset_19|, ~y$w_buff0~0=v_~y$w_buff0~0_485, ~y~0=v_~y~0_146, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_29|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_21|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_33|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_53|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_27|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_33, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_35|, #NULL.base=|v_#NULL.base_3|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_40|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_208, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_37|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_416, #valid=|v_#valid_45|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_14|, ~weak$$choice2~0=v_~weak$$choice2~0_141, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_547} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t2016~0.offset, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~y$mem_tmp~0, ~__unbuffered_p1_EAX~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t2016~0.base, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_~#t2015~0.base, ULTIMATE.start_main_#t~ite30, ULTIMATE.start_main_~#t2015~0.offset, ~y$w_buff0~0, ~y~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 18:37:28,032 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [675] [675] L779-1-->L781: Formula: (and (= (select |v_#valid_28| |v_ULTIMATE.start_main_~#t2016~0.base_11|) 0) (= (store |v_#memory_int_8| |v_ULTIMATE.start_main_~#t2016~0.base_11| (store (select |v_#memory_int_8| |v_ULTIMATE.start_main_~#t2016~0.base_11|) |v_ULTIMATE.start_main_~#t2016~0.offset_10| 1)) |v_#memory_int_7|) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t2016~0.base_11| 1)) (= 0 |v_ULTIMATE.start_main_~#t2016~0.offset_10|) (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t2016~0.base_11|) (= (store |v_#length_10| |v_ULTIMATE.start_main_~#t2016~0.base_11| 4) |v_#length_9|) (not (= 0 |v_ULTIMATE.start_main_~#t2016~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_8|, #length=|v_#length_10|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_8|, ULTIMATE.start_main_~#t2016~0.offset=|v_ULTIMATE.start_main_~#t2016~0.offset_10|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_7|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_6|, #length=|v_#length_9|, ULTIMATE.start_main_~#t2016~0.base=|v_ULTIMATE.start_main_~#t2016~0.base_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2016~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t2016~0.base] because there is no mapped edge [2019-12-07 18:37:28,032 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [638] [638] P0ENTRY-->L4-3: Formula: (and (= v_~y$w_buff1~0_121 v_~y$w_buff0~0_204) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98 0)) (= v_P0Thread1of1ForFork0_~arg.base_94 |v_P0Thread1of1ForFork0_#in~arg.base_96|) (= 2 v_~y$w_buff0~0_203) (= |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94| (ite (not (and (not (= 0 (mod v_~y$w_buff0_used~0_349 256))) (not (= 0 (mod v_~y$w_buff1_used~0_210 256))))) 1 0)) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94|) (= v_P0Thread1of1ForFork0_~arg.offset_94 |v_P0Thread1of1ForFork0_#in~arg.offset_96|) (= v_~y$w_buff0_used~0_350 v_~y$w_buff1_used~0_210) (= v_~y$w_buff0_used~0_349 1)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_96|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_350, ~y$w_buff0~0=v_~y$w_buff0~0_204, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_96|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_96|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_349, ~y$w_buff1~0=v_~y$w_buff1~0_121, ~y$w_buff0~0=v_~y$w_buff0~0_203, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_96|, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_94, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_94, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_210} AuxVars[] AssignedVars[~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 18:37:28,033 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [642] [642] L756-2-->L756-4: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd2~0_In85697320 256) 0)) (.cse1 (= (mod ~y$w_buff1_used~0_In85697320 256) 0))) (or (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite9_Out85697320| ~y$w_buff1~0_In85697320) (not .cse1)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite9_Out85697320| ~y~0_In85697320)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In85697320, ~y$w_buff1~0=~y$w_buff1~0_In85697320, ~y~0=~y~0_In85697320, ~y$w_buff1_used~0=~y$w_buff1_used~0_In85697320} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In85697320, ~y$w_buff1~0=~y$w_buff1~0_In85697320, P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out85697320|, ~y~0=~y~0_In85697320, ~y$w_buff1_used~0=~y$w_buff1_used~0_In85697320} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9] because there is no mapped edge [2019-12-07 18:37:28,033 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [621] [621] L756-4-->L757: Formula: (= |v_P1Thread1of1ForFork1_#t~ite9_8| v_~y~0_41) InVars {P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_8|} OutVars{P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_7|, P1Thread1of1ForFork1_#t~ite10=|v_P1Thread1of1ForFork1_#t~ite10_13|, ~y~0=v_~y~0_41} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10, ~y~0] because there is no mapped edge [2019-12-07 18:37:28,033 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [646] [646] L757-->L757-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In717503525 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In717503525 256) 0))) (or (and (= ~y$w_buff0_used~0_In717503525 |P1Thread1of1ForFork1_#t~ite11_Out717503525|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out717503525|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In717503525, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In717503525} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In717503525, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In717503525, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out717503525|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 18:37:28,033 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L758-->L758-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff0_thd2~0_In1218618018 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In1218618018 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In1218618018 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd2~0_In1218618018 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite12_Out1218618018| ~y$w_buff1_used~0_In1218618018) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |P1Thread1of1ForFork1_#t~ite12_Out1218618018| 0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1218618018, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1218618018, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1218618018, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1218618018} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1218618018, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1218618018, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1218618018, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out1218618018|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1218618018} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 18:37:28,033 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [645] [645] L759-->L759-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In1375124403 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd2~0_In1375124403 256) 0))) (or (and (= ~y$r_buff0_thd2~0_In1375124403 |P1Thread1of1ForFork1_#t~ite13_Out1375124403|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite13_Out1375124403|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1375124403, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1375124403} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1375124403, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1375124403, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out1375124403|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 18:37:28,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L760-->L760-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In-513326958 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd2~0_In-513326958 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In-513326958 256) 0)) (.cse3 (= (mod ~y$r_buff0_thd2~0_In-513326958 256) 0))) (or (and (= ~y$r_buff1_thd2~0_In-513326958 |P1Thread1of1ForFork1_#t~ite14_Out-513326958|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite14_Out-513326958|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-513326958, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-513326958, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-513326958, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-513326958} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-513326958, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-513326958, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-513326958, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-513326958|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-513326958} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 18:37:28,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L760-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite14_28| v_~y$r_buff1_thd2~0_91) (= (+ v_~__unbuffered_cnt~0_39 1) v_~__unbuffered_cnt~0_38) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_28|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_91, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_27|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 18:37:28,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L737-->L737-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd1~0_In968374911 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In968374911 256)))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork0_#t~ite5_Out968374911| ~y$w_buff0_used~0_In968374911)) (and (not .cse1) (not .cse0) (= |P0Thread1of1ForFork0_#t~ite5_Out968374911| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In968374911, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In968374911} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out968374911|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In968374911, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In968374911} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 18:37:28,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [641] [641] L738-->L738-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-482675587 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd1~0_In-482675587 256))) (.cse2 (= (mod ~y$w_buff1_used~0_In-482675587 256) 0)) (.cse3 (= (mod ~y$r_buff1_thd1~0_In-482675587 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite6_Out-482675587| 0)) (and (or .cse1 .cse0) (or .cse2 .cse3) (= |P0Thread1of1ForFork0_#t~ite6_Out-482675587| ~y$w_buff1_used~0_In-482675587)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-482675587, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-482675587, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-482675587, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-482675587} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-482675587|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-482675587, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-482675587, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-482675587, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-482675587} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 18:37:28,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L739-->L740: Formula: (let ((.cse1 (= ~y$r_buff0_thd1~0_Out369661034 ~y$r_buff0_thd1~0_In369661034)) (.cse0 (= (mod ~y$r_buff0_thd1~0_In369661034 256) 0)) (.cse2 (= (mod ~y$w_buff0_used~0_In369661034 256) 0))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (not .cse0) (not .cse2) (= ~y$r_buff0_thd1~0_Out369661034 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In369661034, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In369661034} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In369661034, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out369661034|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_Out369661034} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~y$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:37:28,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L740-->L740-2: Formula: (let ((.cse2 (= 0 (mod ~y$w_buff0_used~0_In532205848 256))) (.cse3 (= 0 (mod ~y$r_buff0_thd1~0_In532205848 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In532205848 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd1~0_In532205848 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$r_buff1_thd1~0_In532205848 |P0Thread1of1ForFork0_#t~ite8_Out532205848|)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |P0Thread1of1ForFork0_#t~ite8_Out532205848|)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In532205848, ~y$w_buff0_used~0=~y$w_buff0_used~0_In532205848, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In532205848, ~y$w_buff1_used~0=~y$w_buff1_used~0_In532205848} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In532205848, ~y$w_buff0_used~0=~y$w_buff0_used~0_In532205848, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out532205848|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In532205848, ~y$w_buff1_used~0=~y$w_buff1_used~0_In532205848} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 18:37:28,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [668] [668] L740-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~y$r_buff1_thd1~0_80 |v_P0Thread1of1ForFork0_#t~ite8_28|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~__unbuffered_cnt~0_31 (+ v_~__unbuffered_cnt~0_32 1))) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_80, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_27|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_31} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 18:37:28,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [577] [577] L785-->L787-2: Formula: (and (not (= (mod v_~main$tmp_guard0~0_4 256) 0)) (or (= (mod v_~y$w_buff0_used~0_67 256) 0) (= 0 (mod v_~y$r_buff0_thd0~0_44 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_67, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_44, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_4} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_67, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_44, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_4} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 18:37:28,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L787-2-->L787-5: Formula: (let ((.cse2 (= (mod ~y$r_buff1_thd0~0_In108298849 256) 0)) (.cse0 (= |ULTIMATE.start_main_#t~ite18_Out108298849| |ULTIMATE.start_main_#t~ite17_Out108298849|)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In108298849 256)))) (or (and (= ~y~0_In108298849 |ULTIMATE.start_main_#t~ite17_Out108298849|) .cse0 (or .cse1 .cse2)) (and (= ~y$w_buff1~0_In108298849 |ULTIMATE.start_main_#t~ite17_Out108298849|) (not .cse2) .cse0 (not .cse1)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In108298849, ~y~0=~y~0_In108298849, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In108298849, ~y$w_buff1_used~0=~y$w_buff1_used~0_In108298849} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out108298849|, ~y$w_buff1~0=~y$w_buff1~0_In108298849, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out108298849|, ~y~0=~y~0_In108298849, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In108298849, ~y$w_buff1_used~0=~y$w_buff1_used~0_In108298849} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18] because there is no mapped edge [2019-12-07 18:37:28,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [644] [644] L788-->L788-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In542650917 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In542650917 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite19_Out542650917| 0)) (and (= ~y$w_buff0_used~0_In542650917 |ULTIMATE.start_main_#t~ite19_Out542650917|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In542650917, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In542650917} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In542650917, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out542650917|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In542650917} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 18:37:28,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L789-->L789-2: Formula: (let ((.cse2 (= (mod ~y$w_buff0_used~0_In-791148359 256) 0)) (.cse3 (= (mod ~y$r_buff0_thd0~0_In-791148359 256) 0)) (.cse1 (= (mod ~y$w_buff1_used~0_In-791148359 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd0~0_In-791148359 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite20_Out-791148359| 0)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite20_Out-791148359| ~y$w_buff1_used~0_In-791148359)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-791148359, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-791148359, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-791148359, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-791148359} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-791148359, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-791148359, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-791148359|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-791148359, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-791148359} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 18:37:28,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [639] [639] L790-->L790-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In149080008 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In149080008 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite21_Out149080008| ~y$r_buff0_thd0~0_In149080008)) (and (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite21_Out149080008|) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In149080008, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In149080008} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In149080008, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In149080008, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out149080008|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 18:37:28,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [651] [651] L791-->L791-2: Formula: (let ((.cse2 (= (mod ~y$w_buff0_used~0_In1858809408 256) 0)) (.cse3 (= (mod ~y$r_buff0_thd0~0_In1858809408 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd0~0_In1858809408 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In1858809408 256)))) (or (and (= |ULTIMATE.start_main_#t~ite22_Out1858809408| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |ULTIMATE.start_main_#t~ite22_Out1858809408| ~y$r_buff1_thd0~0_In1858809408) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1858809408, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1858809408, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1858809408, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1858809408} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1858809408, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1858809408, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1858809408, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out1858809408|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1858809408} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 18:37:28,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L800-->L800-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1742421046 256) 0))) (or (and (= ~y$w_buff1~0_In1742421046 |ULTIMATE.start_main_#t~ite31_Out1742421046|) (= |ULTIMATE.start_main_#t~ite32_Out1742421046| |ULTIMATE.start_main_#t~ite31_Out1742421046|) .cse0 (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In1742421046 256) 0))) (or (= 0 (mod ~y$w_buff0_used~0_In1742421046 256)) (and .cse1 (= (mod ~y$w_buff1_used~0_In1742421046 256) 0)) (and (= (mod ~y$r_buff1_thd0~0_In1742421046 256) 0) .cse1)))) (and (= |ULTIMATE.start_main_#t~ite32_Out1742421046| ~y$w_buff1~0_In1742421046) (not .cse0) (= |ULTIMATE.start_main_#t~ite31_In1742421046| |ULTIMATE.start_main_#t~ite31_Out1742421046|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In1742421046, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1742421046, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1742421046, ~weak$$choice2~0=~weak$$choice2~0_In1742421046, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_In1742421046|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1742421046, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1742421046} OutVars{~y$w_buff1~0=~y$w_buff1~0_In1742421046, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1742421046, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1742421046, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_Out1742421046|, ~weak$$choice2~0=~weak$$choice2~0_In1742421046, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out1742421046|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1742421046, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1742421046} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32] because there is no mapped edge [2019-12-07 18:37:28,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [637] [637] L803-->L804: Formula: (and (= v_~y$r_buff0_thd0~0_162 v_~y$r_buff0_thd0~0_163) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_163, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_9|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_11|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_18|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_162, ~weak$$choice2~0=v_~weak$$choice2~0_39} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39, ~y$r_buff0_thd0~0] because there is no mapped edge [2019-12-07 18:37:28,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L806-->L809-1: Formula: (and (= 0 v_~y$flush_delayed~0_24) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6| (mod v_~main$tmp_guard1~0_12 256)) (not (= 0 (mod v_~y$flush_delayed~0_25 256))) (= v_~y~0_106 v_~y$mem_tmp~0_13)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_13, ~y$flush_delayed~0=v_~y$flush_delayed~0_25, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_13, ~y$flush_delayed~0=v_~y$flush_delayed~0_24, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12, ~y~0=v_~y~0_106, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_22|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[~y$flush_delayed~0, ~y~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:37:28,038 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L809-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 18:37:28,088 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_beb96312-8bb0-428c-910f-b4a53ff9b4f4/bin/uautomizer/witness.graphml [2019-12-07 18:37:28,089 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 18:37:28,090 INFO L168 Benchmark]: Toolchain (without parser) took 10991.08 ms. Allocated memory was 1.0 GB in the beginning and 1.4 GB in the end (delta: 403.7 MB). Free memory was 937.2 MB in the beginning and 865.1 MB in the end (delta: 72.1 MB). Peak memory consumption was 475.8 MB. Max. memory is 11.5 GB. [2019-12-07 18:37:28,090 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 958.7 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:37:28,090 INFO L168 Benchmark]: CACSL2BoogieTranslator took 369.27 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 99.6 MB). Free memory was 937.2 MB in the beginning and 1.1 GB in the end (delta: -132.7 MB). Peak memory consumption was 19.7 MB. Max. memory is 11.5 GB. [2019-12-07 18:37:28,090 INFO L168 Benchmark]: Boogie Procedure Inliner took 41.23 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 18:37:28,091 INFO L168 Benchmark]: Boogie Preprocessor took 25.21 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:37:28,091 INFO L168 Benchmark]: RCFGBuilder took 387.89 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 49.8 MB). Peak memory consumption was 49.8 MB. Max. memory is 11.5 GB. [2019-12-07 18:37:28,091 INFO L168 Benchmark]: TraceAbstraction took 10104.87 ms. Allocated memory was 1.1 GB in the beginning and 1.4 GB in the end (delta: 304.1 MB). Free memory was 1.0 GB in the beginning and 878.9 MB in the end (delta: 135.8 MB). Peak memory consumption was 439.8 MB. Max. memory is 11.5 GB. [2019-12-07 18:37:28,091 INFO L168 Benchmark]: Witness Printer took 59.46 ms. Allocated memory is still 1.4 GB. Free memory was 878.9 MB in the beginning and 865.1 MB in the end (delta: 13.9 MB). Peak memory consumption was 13.9 MB. Max. memory is 11.5 GB. [2019-12-07 18:37:28,093 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 958.7 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 369.27 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 99.6 MB). Free memory was 937.2 MB in the beginning and 1.1 GB in the end (delta: -132.7 MB). Peak memory consumption was 19.7 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 41.23 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.21 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 387.89 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 49.8 MB). Peak memory consumption was 49.8 MB. Max. memory is 11.5 GB. * TraceAbstraction took 10104.87 ms. Allocated memory was 1.1 GB in the beginning and 1.4 GB in the end (delta: 304.1 MB). Free memory was 1.0 GB in the beginning and 878.9 MB in the end (delta: 135.8 MB). Peak memory consumption was 439.8 MB. Max. memory is 11.5 GB. * Witness Printer took 59.46 ms. Allocated memory is still 1.4 GB. Free memory was 878.9 MB in the beginning and 865.1 MB in the end (delta: 13.9 MB). Peak memory consumption was 13.9 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 2.8s, 146 ProgramPointsBefore, 79 ProgramPointsAfterwards, 180 TransitionsBefore, 91 TransitionsAfterwards, 10418 CoEnabledTransitionPairs, 7 FixpointIterations, 28 TrivialSequentialCompositions, 39 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 34 ConcurrentYvCompositions, 25 ChoiceCompositions, 3678 VarBasedMoverChecksPositive, 231 VarBasedMoverChecksNegative, 69 SemBasedMoverChecksPositive, 221 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.9s, 0 MoverChecksTotal, 46090 CheckedPairsTotal, 101 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L779] FCALL, FORK 0 pthread_create(&t2015, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L781] FCALL, FORK 0 pthread_create(&t2016, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L727] 1 y$r_buff1_thd0 = y$r_buff0_thd0 [L728] 1 y$r_buff1_thd1 = y$r_buff0_thd1 [L729] 1 y$r_buff1_thd2 = y$r_buff0_thd2 [L730] 1 y$r_buff0_thd1 = (_Bool)1 [L733] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L736] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L750] 2 __unbuffered_p1_EAX = x [L753] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L736] 1 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L756] 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L757] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L758] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L759] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L737] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L738] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L783] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L787] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L788] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L789] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L790] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L791] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L794] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L795] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L796] 0 y$flush_delayed = weak$$choice2 [L797] 0 y$mem_tmp = y VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L799] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L799] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L800] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L801] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L801] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L802] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L802] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L804] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L804] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L805] 0 main$tmp_guard1 = !(y == 2 && __unbuffered_p1_EAX == 1) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 140 locations, 2 error locations. Result: UNSAFE, OverallTime: 9.9s, OverallIterations: 17, TraceHistogramMax: 1, AutomataDifference: 3.7s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1700 SDtfs, 1853 SDslu, 4440 SDs, 0 SdLazy, 3327 SolverSat, 201 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 185 GetRequests, 27 SyntacticMatches, 19 SemanticMatches, 139 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 495 ImplicationChecksByTransitivity, 1.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=14186occurred in iteration=5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 1.3s AutomataMinimizationTime, 16 MinimizatonAttempts, 9926 StatesRemovedByMinimization, 13 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.1s InterpolantComputationTime, 659 NumberOfCodeBlocks, 659 NumberOfCodeBlocksAsserted, 17 NumberOfCheckSat, 589 ConstructedInterpolants, 0 QuantifiedInterpolants, 120760 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 16 InterpolantComputations, 16 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...