./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe010_rmo.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_8f479560-b2dd-411b-a417-d0fb3bbde14b/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_8f479560-b2dd-411b-a417-d0fb3bbde14b/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_8f479560-b2dd-411b-a417-d0fb3bbde14b/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_8f479560-b2dd-411b-a417-d0fb3bbde14b/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe010_rmo.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_8f479560-b2dd-411b-a417-d0fb3bbde14b/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_8f479560-b2dd-411b-a417-d0fb3bbde14b/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash ad7a03e4ce6743566424918d18fa966b8d8855df ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 11:18:11,593 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 11:18:11,594 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 11:18:11,601 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 11:18:11,601 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 11:18:11,602 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 11:18:11,603 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 11:18:11,604 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 11:18:11,606 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 11:18:11,606 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 11:18:11,607 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 11:18:11,607 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 11:18:11,608 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 11:18:11,608 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 11:18:11,609 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 11:18:11,610 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 11:18:11,610 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 11:18:11,611 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 11:18:11,612 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 11:18:11,614 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 11:18:11,615 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 11:18:11,615 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 11:18:11,616 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 11:18:11,616 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 11:18:11,618 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 11:18:11,618 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 11:18:11,618 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 11:18:11,619 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 11:18:11,619 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 11:18:11,620 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 11:18:11,620 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 11:18:11,620 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 11:18:11,621 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 11:18:11,621 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 11:18:11,622 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 11:18:11,622 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 11:18:11,622 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 11:18:11,622 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 11:18:11,622 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 11:18:11,623 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 11:18:11,623 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 11:18:11,624 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_8f479560-b2dd-411b-a417-d0fb3bbde14b/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 11:18:11,633 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 11:18:11,633 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 11:18:11,634 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 11:18:11,634 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 11:18:11,634 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 11:18:11,634 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 11:18:11,635 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 11:18:11,635 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 11:18:11,635 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 11:18:11,635 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 11:18:11,635 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 11:18:11,635 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 11:18:11,635 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 11:18:11,635 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 11:18:11,636 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 11:18:11,636 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 11:18:11,636 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 11:18:11,636 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 11:18:11,636 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 11:18:11,636 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 11:18:11,636 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 11:18:11,636 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 11:18:11,637 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 11:18:11,637 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 11:18:11,637 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 11:18:11,637 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 11:18:11,637 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 11:18:11,637 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 11:18:11,637 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 11:18:11,637 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_8f479560-b2dd-411b-a417-d0fb3bbde14b/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ad7a03e4ce6743566424918d18fa966b8d8855df [2019-12-07 11:18:11,738 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 11:18:11,748 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 11:18:11,751 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 11:18:11,752 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 11:18:11,752 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 11:18:11,753 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_8f479560-b2dd-411b-a417-d0fb3bbde14b/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe010_rmo.oepc.i [2019-12-07 11:18:11,795 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_8f479560-b2dd-411b-a417-d0fb3bbde14b/bin/uautomizer/data/18f29338d/08efa095872d4ac1a665ca9bdb48d3e4/FLAGc510d37fc [2019-12-07 11:18:12,209 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 11:18:12,209 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_8f479560-b2dd-411b-a417-d0fb3bbde14b/sv-benchmarks/c/pthread-wmm/safe010_rmo.oepc.i [2019-12-07 11:18:12,219 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_8f479560-b2dd-411b-a417-d0fb3bbde14b/bin/uautomizer/data/18f29338d/08efa095872d4ac1a665ca9bdb48d3e4/FLAGc510d37fc [2019-12-07 11:18:12,577 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_8f479560-b2dd-411b-a417-d0fb3bbde14b/bin/uautomizer/data/18f29338d/08efa095872d4ac1a665ca9bdb48d3e4 [2019-12-07 11:18:12,581 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 11:18:12,583 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 11:18:12,585 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 11:18:12,585 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 11:18:12,589 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 11:18:12,590 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 11:18:12" (1/1) ... [2019-12-07 11:18:12,593 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7030ab51 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:18:12, skipping insertion in model container [2019-12-07 11:18:12,594 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 11:18:12" (1/1) ... [2019-12-07 11:18:12,599 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 11:18:12,627 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 11:18:12,881 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 11:18:12,891 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 11:18:12,943 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 11:18:12,992 INFO L208 MainTranslator]: Completed translation [2019-12-07 11:18:12,992 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:18:12 WrapperNode [2019-12-07 11:18:12,992 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 11:18:12,993 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 11:18:12,993 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 11:18:12,993 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 11:18:12,999 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:18:12" (1/1) ... [2019-12-07 11:18:13,015 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:18:12" (1/1) ... [2019-12-07 11:18:13,043 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 11:18:13,043 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 11:18:13,043 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 11:18:13,043 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 11:18:13,050 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:18:12" (1/1) ... [2019-12-07 11:18:13,050 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:18:12" (1/1) ... [2019-12-07 11:18:13,053 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:18:12" (1/1) ... [2019-12-07 11:18:13,054 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:18:12" (1/1) ... [2019-12-07 11:18:13,060 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:18:12" (1/1) ... [2019-12-07 11:18:13,063 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:18:12" (1/1) ... [2019-12-07 11:18:13,066 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:18:12" (1/1) ... [2019-12-07 11:18:13,069 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 11:18:13,070 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 11:18:13,070 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 11:18:13,070 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 11:18:13,070 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:18:12" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_8f479560-b2dd-411b-a417-d0fb3bbde14b/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 11:18:13,114 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 11:18:13,115 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 11:18:13,115 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 11:18:13,115 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 11:18:13,115 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 11:18:13,115 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 11:18:13,115 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 11:18:13,115 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 11:18:13,115 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 11:18:13,115 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 11:18:13,115 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 11:18:13,116 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 11:18:13,451 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 11:18:13,451 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 11:18:13,452 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:18:13 BoogieIcfgContainer [2019-12-07 11:18:13,452 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 11:18:13,453 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 11:18:13,453 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 11:18:13,455 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 11:18:13,455 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 11:18:12" (1/3) ... [2019-12-07 11:18:13,456 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@297c920a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 11:18:13, skipping insertion in model container [2019-12-07 11:18:13,456 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:18:12" (2/3) ... [2019-12-07 11:18:13,456 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@297c920a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 11:18:13, skipping insertion in model container [2019-12-07 11:18:13,456 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:18:13" (3/3) ... [2019-12-07 11:18:13,457 INFO L109 eAbstractionObserver]: Analyzing ICFG safe010_rmo.oepc.i [2019-12-07 11:18:13,463 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 11:18:13,463 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 11:18:13,468 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 11:18:13,468 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 11:18:13,490 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,490 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,490 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,490 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,490 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,490 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,491 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,491 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,491 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,492 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,492 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,492 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,492 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,492 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,492 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,493 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,493 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,493 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,493 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,493 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,493 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,494 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,494 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,494 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,494 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,494 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,495 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,495 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,495 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,495 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,495 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,496 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,496 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,496 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,496 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,496 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,497 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,497 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,497 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,497 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,497 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,498 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,498 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,498 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,498 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,498 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,498 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,499 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,499 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,499 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,499 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,499 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,500 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,500 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,500 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,500 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,500 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,500 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,501 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,501 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,501 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,501 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,501 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,501 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:18:13,514 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-12-07 11:18:13,527 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 11:18:13,528 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 11:18:13,528 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 11:18:13,528 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 11:18:13,528 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 11:18:13,528 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 11:18:13,528 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 11:18:13,528 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 11:18:13,538 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 146 places, 180 transitions [2019-12-07 11:18:13,539 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 146 places, 180 transitions [2019-12-07 11:18:13,588 INFO L134 PetriNetUnfolder]: 41/178 cut-off events. [2019-12-07 11:18:13,589 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 11:18:13,599 INFO L76 FinitePrefix]: Finished finitePrefix Result has 185 conditions, 178 events. 41/178 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 460 event pairs. 6/141 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-12-07 11:18:13,611 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 146 places, 180 transitions [2019-12-07 11:18:13,634 INFO L134 PetriNetUnfolder]: 41/178 cut-off events. [2019-12-07 11:18:13,634 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 11:18:13,637 INFO L76 FinitePrefix]: Finished finitePrefix Result has 185 conditions, 178 events. 41/178 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 460 event pairs. 6/141 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-12-07 11:18:13,645 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 10418 [2019-12-07 11:18:13,646 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 11:18:16,361 WARN L192 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 81 DAG size of output: 79 [2019-12-07 11:18:16,436 INFO L206 etLargeBlockEncoding]: Checked pairs total: 46090 [2019-12-07 11:18:16,436 INFO L214 etLargeBlockEncoding]: Total number of compositions: 101 [2019-12-07 11:18:16,439 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 79 places, 91 transitions [2019-12-07 11:18:16,775 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 8654 states. [2019-12-07 11:18:16,776 INFO L276 IsEmpty]: Start isEmpty. Operand 8654 states. [2019-12-07 11:18:16,780 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 11:18:16,780 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:18:16,780 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 11:18:16,781 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:18:16,784 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:18:16,785 INFO L82 PathProgramCache]: Analyzing trace with hash 722891, now seen corresponding path program 1 times [2019-12-07 11:18:16,790 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:18:16,791 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [703960770] [2019-12-07 11:18:16,791 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:18:16,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:18:16,919 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:18:16,919 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [703960770] [2019-12-07 11:18:16,920 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:18:16,920 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 11:18:16,921 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1134554135] [2019-12-07 11:18:16,925 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:18:16,925 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:18:16,937 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:18:16,938 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:18:16,940 INFO L87 Difference]: Start difference. First operand 8654 states. Second operand 3 states. [2019-12-07 11:18:17,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:18:17,122 INFO L93 Difference]: Finished difference Result 8604 states and 28108 transitions. [2019-12-07 11:18:17,122 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:18:17,123 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 11:18:17,123 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:18:17,190 INFO L225 Difference]: With dead ends: 8604 [2019-12-07 11:18:17,191 INFO L226 Difference]: Without dead ends: 8436 [2019-12-07 11:18:17,191 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:18:17,281 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8436 states. [2019-12-07 11:18:17,453 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8436 to 8436. [2019-12-07 11:18:17,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8436 states. [2019-12-07 11:18:17,484 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8436 states to 8436 states and 27590 transitions. [2019-12-07 11:18:17,485 INFO L78 Accepts]: Start accepts. Automaton has 8436 states and 27590 transitions. Word has length 3 [2019-12-07 11:18:17,485 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:18:17,486 INFO L462 AbstractCegarLoop]: Abstraction has 8436 states and 27590 transitions. [2019-12-07 11:18:17,486 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:18:17,486 INFO L276 IsEmpty]: Start isEmpty. Operand 8436 states and 27590 transitions. [2019-12-07 11:18:17,488 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 11:18:17,488 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:18:17,488 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:18:17,488 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:18:17,488 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:18:17,489 INFO L82 PathProgramCache]: Analyzing trace with hash -1596153002, now seen corresponding path program 1 times [2019-12-07 11:18:17,489 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:18:17,489 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [187066492] [2019-12-07 11:18:17,489 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:18:17,514 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:18:17,566 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:18:17,567 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [187066492] [2019-12-07 11:18:17,567 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:18:17,567 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:18:17,567 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1302031681] [2019-12-07 11:18:17,568 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:18:17,569 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:18:17,569 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:18:17,569 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:18:17,569 INFO L87 Difference]: Start difference. First operand 8436 states and 27590 transitions. Second operand 4 states. [2019-12-07 11:18:17,835 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:18:17,835 INFO L93 Difference]: Finished difference Result 13130 states and 41153 transitions. [2019-12-07 11:18:17,836 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:18:17,836 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 11:18:17,836 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:18:17,885 INFO L225 Difference]: With dead ends: 13130 [2019-12-07 11:18:17,885 INFO L226 Difference]: Without dead ends: 13123 [2019-12-07 11:18:17,886 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:18:17,954 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13123 states. [2019-12-07 11:18:18,160 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13123 to 11988. [2019-12-07 11:18:18,160 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11988 states. [2019-12-07 11:18:18,183 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11988 states to 11988 states and 38075 transitions. [2019-12-07 11:18:18,184 INFO L78 Accepts]: Start accepts. Automaton has 11988 states and 38075 transitions. Word has length 11 [2019-12-07 11:18:18,184 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:18:18,184 INFO L462 AbstractCegarLoop]: Abstraction has 11988 states and 38075 transitions. [2019-12-07 11:18:18,184 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:18:18,184 INFO L276 IsEmpty]: Start isEmpty. Operand 11988 states and 38075 transitions. [2019-12-07 11:18:18,186 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 11:18:18,186 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:18:18,186 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:18:18,186 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:18:18,187 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:18:18,187 INFO L82 PathProgramCache]: Analyzing trace with hash 1194917716, now seen corresponding path program 1 times [2019-12-07 11:18:18,187 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:18:18,187 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1156152283] [2019-12-07 11:18:18,187 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:18:18,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:18:18,227 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:18:18,228 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1156152283] [2019-12-07 11:18:18,228 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:18:18,228 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:18:18,228 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [145982969] [2019-12-07 11:18:18,228 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:18:18,228 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:18:18,228 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:18:18,229 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:18:18,229 INFO L87 Difference]: Start difference. First operand 11988 states and 38075 transitions. Second operand 4 states. [2019-12-07 11:18:18,388 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:18:18,388 INFO L93 Difference]: Finished difference Result 14736 states and 46267 transitions. [2019-12-07 11:18:18,389 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:18:18,389 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 11:18:18,389 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:18:18,413 INFO L225 Difference]: With dead ends: 14736 [2019-12-07 11:18:18,413 INFO L226 Difference]: Without dead ends: 14736 [2019-12-07 11:18:18,413 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:18:18,484 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14736 states. [2019-12-07 11:18:18,637 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14736 to 13160. [2019-12-07 11:18:18,637 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13160 states. [2019-12-07 11:18:18,663 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13160 states to 13160 states and 41689 transitions. [2019-12-07 11:18:18,663 INFO L78 Accepts]: Start accepts. Automaton has 13160 states and 41689 transitions. Word has length 11 [2019-12-07 11:18:18,663 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:18:18,663 INFO L462 AbstractCegarLoop]: Abstraction has 13160 states and 41689 transitions. [2019-12-07 11:18:18,663 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:18:18,663 INFO L276 IsEmpty]: Start isEmpty. Operand 13160 states and 41689 transitions. [2019-12-07 11:18:18,667 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2019-12-07 11:18:18,667 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:18:18,667 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:18:18,667 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:18:18,667 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:18:18,668 INFO L82 PathProgramCache]: Analyzing trace with hash -1502155024, now seen corresponding path program 1 times [2019-12-07 11:18:18,668 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:18:18,668 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1069305065] [2019-12-07 11:18:18,668 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:18:18,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:18:18,713 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:18:18,713 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1069305065] [2019-12-07 11:18:18,713 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:18:18,713 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:18:18,713 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [221734448] [2019-12-07 11:18:18,714 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:18:18,714 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:18:18,714 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:18:18,714 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:18:18,714 INFO L87 Difference]: Start difference. First operand 13160 states and 41689 transitions. Second operand 5 states. [2019-12-07 11:18:19,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:18:19,032 INFO L93 Difference]: Finished difference Result 17572 states and 54523 transitions. [2019-12-07 11:18:19,032 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 11:18:19,032 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2019-12-07 11:18:19,033 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:18:19,060 INFO L225 Difference]: With dead ends: 17572 [2019-12-07 11:18:19,060 INFO L226 Difference]: Without dead ends: 17565 [2019-12-07 11:18:19,060 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:18:19,131 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17565 states. [2019-12-07 11:18:19,266 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17565 to 13105. [2019-12-07 11:18:19,266 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13105 states. [2019-12-07 11:18:19,286 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13105 states to 13105 states and 41426 transitions. [2019-12-07 11:18:19,286 INFO L78 Accepts]: Start accepts. Automaton has 13105 states and 41426 transitions. Word has length 17 [2019-12-07 11:18:19,286 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:18:19,286 INFO L462 AbstractCegarLoop]: Abstraction has 13105 states and 41426 transitions. [2019-12-07 11:18:19,286 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:18:19,286 INFO L276 IsEmpty]: Start isEmpty. Operand 13105 states and 41426 transitions. [2019-12-07 11:18:19,294 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 11:18:19,294 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:18:19,294 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:18:19,294 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:18:19,294 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:18:19,294 INFO L82 PathProgramCache]: Analyzing trace with hash 933350131, now seen corresponding path program 1 times [2019-12-07 11:18:19,295 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:18:19,295 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [638887298] [2019-12-07 11:18:19,295 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:18:19,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:18:19,326 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:18:19,326 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [638887298] [2019-12-07 11:18:19,327 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:18:19,327 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:18:19,327 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1362381501] [2019-12-07 11:18:19,327 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:18:19,327 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:18:19,327 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:18:19,327 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:18:19,327 INFO L87 Difference]: Start difference. First operand 13105 states and 41426 transitions. Second operand 3 states. [2019-12-07 11:18:19,393 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:18:19,393 INFO L93 Difference]: Finished difference Result 16057 states and 50095 transitions. [2019-12-07 11:18:19,394 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:18:19,394 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2019-12-07 11:18:19,394 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:18:19,418 INFO L225 Difference]: With dead ends: 16057 [2019-12-07 11:18:19,418 INFO L226 Difference]: Without dead ends: 16057 [2019-12-07 11:18:19,418 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:18:19,486 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16057 states. [2019-12-07 11:18:19,630 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16057 to 14186. [2019-12-07 11:18:19,630 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14186 states. [2019-12-07 11:18:19,710 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14186 states to 14186 states and 44710 transitions. [2019-12-07 11:18:19,710 INFO L78 Accepts]: Start accepts. Automaton has 14186 states and 44710 transitions. Word has length 25 [2019-12-07 11:18:19,711 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:18:19,711 INFO L462 AbstractCegarLoop]: Abstraction has 14186 states and 44710 transitions. [2019-12-07 11:18:19,711 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:18:19,711 INFO L276 IsEmpty]: Start isEmpty. Operand 14186 states and 44710 transitions. [2019-12-07 11:18:19,718 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 11:18:19,718 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:18:19,718 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:18:19,718 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:18:19,718 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:18:19,718 INFO L82 PathProgramCache]: Analyzing trace with hash 933194542, now seen corresponding path program 1 times [2019-12-07 11:18:19,718 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:18:19,719 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [107993615] [2019-12-07 11:18:19,719 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:18:19,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:18:19,764 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:18:19,764 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [107993615] [2019-12-07 11:18:19,764 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:18:19,764 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:18:19,765 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1161014680] [2019-12-07 11:18:19,765 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:18:19,765 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:18:19,765 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:18:19,765 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:18:19,765 INFO L87 Difference]: Start difference. First operand 14186 states and 44710 transitions. Second operand 4 states. [2019-12-07 11:18:19,785 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:18:19,785 INFO L93 Difference]: Finished difference Result 2296 states and 5226 transitions. [2019-12-07 11:18:19,786 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 11:18:19,786 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2019-12-07 11:18:19,786 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:18:19,788 INFO L225 Difference]: With dead ends: 2296 [2019-12-07 11:18:19,788 INFO L226 Difference]: Without dead ends: 2019 [2019-12-07 11:18:19,789 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:18:19,792 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2019 states. [2019-12-07 11:18:19,806 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2019 to 2019. [2019-12-07 11:18:19,806 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2019 states. [2019-12-07 11:18:19,808 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2019 states to 2019 states and 4460 transitions. [2019-12-07 11:18:19,808 INFO L78 Accepts]: Start accepts. Automaton has 2019 states and 4460 transitions. Word has length 25 [2019-12-07 11:18:19,808 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:18:19,808 INFO L462 AbstractCegarLoop]: Abstraction has 2019 states and 4460 transitions. [2019-12-07 11:18:19,808 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:18:19,809 INFO L276 IsEmpty]: Start isEmpty. Operand 2019 states and 4460 transitions. [2019-12-07 11:18:19,810 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-12-07 11:18:19,810 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:18:19,810 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:18:19,811 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:18:19,811 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:18:19,811 INFO L82 PathProgramCache]: Analyzing trace with hash -568804126, now seen corresponding path program 1 times [2019-12-07 11:18:19,811 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:18:19,811 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1865814279] [2019-12-07 11:18:19,811 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:18:19,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:18:19,890 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:18:19,890 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1865814279] [2019-12-07 11:18:19,891 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:18:19,891 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:18:19,891 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [419343045] [2019-12-07 11:18:19,891 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:18:19,891 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:18:19,892 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:18:19,892 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:18:19,892 INFO L87 Difference]: Start difference. First operand 2019 states and 4460 transitions. Second operand 5 states. [2019-12-07 11:18:19,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:18:19,921 INFO L93 Difference]: Finished difference Result 416 states and 758 transitions. [2019-12-07 11:18:19,921 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:18:19,921 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 37 [2019-12-07 11:18:19,921 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:18:19,922 INFO L225 Difference]: With dead ends: 416 [2019-12-07 11:18:19,922 INFO L226 Difference]: Without dead ends: 371 [2019-12-07 11:18:19,922 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:18:19,923 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 371 states. [2019-12-07 11:18:19,924 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 371 to 343. [2019-12-07 11:18:19,924 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 343 states. [2019-12-07 11:18:19,925 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 343 states to 343 states and 618 transitions. [2019-12-07 11:18:19,925 INFO L78 Accepts]: Start accepts. Automaton has 343 states and 618 transitions. Word has length 37 [2019-12-07 11:18:19,925 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:18:19,925 INFO L462 AbstractCegarLoop]: Abstraction has 343 states and 618 transitions. [2019-12-07 11:18:19,925 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:18:19,925 INFO L276 IsEmpty]: Start isEmpty. Operand 343 states and 618 transitions. [2019-12-07 11:18:19,926 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 11:18:19,926 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:18:19,926 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:18:19,927 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:18:19,927 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:18:19,927 INFO L82 PathProgramCache]: Analyzing trace with hash -506418728, now seen corresponding path program 1 times [2019-12-07 11:18:19,927 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:18:19,927 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1735081514] [2019-12-07 11:18:19,927 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:18:19,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:18:20,011 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:18:20,011 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1735081514] [2019-12-07 11:18:20,011 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:18:20,011 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 11:18:20,011 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [498799824] [2019-12-07 11:18:20,011 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 11:18:20,012 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:18:20,012 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 11:18:20,012 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:18:20,012 INFO L87 Difference]: Start difference. First operand 343 states and 618 transitions. Second operand 7 states. [2019-12-07 11:18:20,269 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:18:20,269 INFO L93 Difference]: Finished difference Result 539 states and 970 transitions. [2019-12-07 11:18:20,270 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 11:18:20,270 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 52 [2019-12-07 11:18:20,270 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:18:20,270 INFO L225 Difference]: With dead ends: 539 [2019-12-07 11:18:20,270 INFO L226 Difference]: Without dead ends: 539 [2019-12-07 11:18:20,271 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 5 SyntacticMatches, 3 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=80, Unknown=0, NotChecked=0, Total=110 [2019-12-07 11:18:20,272 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 539 states. [2019-12-07 11:18:20,274 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 539 to 444. [2019-12-07 11:18:20,274 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 444 states. [2019-12-07 11:18:20,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 444 states to 444 states and 802 transitions. [2019-12-07 11:18:20,275 INFO L78 Accepts]: Start accepts. Automaton has 444 states and 802 transitions. Word has length 52 [2019-12-07 11:18:20,275 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:18:20,275 INFO L462 AbstractCegarLoop]: Abstraction has 444 states and 802 transitions. [2019-12-07 11:18:20,275 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 11:18:20,275 INFO L276 IsEmpty]: Start isEmpty. Operand 444 states and 802 transitions. [2019-12-07 11:18:20,276 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 11:18:20,276 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:18:20,276 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:18:20,276 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:18:20,276 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:18:20,276 INFO L82 PathProgramCache]: Analyzing trace with hash 22285210, now seen corresponding path program 2 times [2019-12-07 11:18:20,276 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:18:20,277 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [993615910] [2019-12-07 11:18:20,277 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:18:20,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:18:20,354 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:18:20,354 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [993615910] [2019-12-07 11:18:20,354 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:18:20,354 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 11:18:20,355 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [830663917] [2019-12-07 11:18:20,355 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:18:20,355 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:18:20,355 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:18:20,355 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:18:20,356 INFO L87 Difference]: Start difference. First operand 444 states and 802 transitions. Second operand 5 states. [2019-12-07 11:18:20,493 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:18:20,493 INFO L93 Difference]: Finished difference Result 621 states and 1127 transitions. [2019-12-07 11:18:20,494 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 11:18:20,494 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 52 [2019-12-07 11:18:20,494 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:18:20,494 INFO L225 Difference]: With dead ends: 621 [2019-12-07 11:18:20,494 INFO L226 Difference]: Without dead ends: 621 [2019-12-07 11:18:20,494 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:18:20,495 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 621 states. [2019-12-07 11:18:20,498 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 621 to 504. [2019-12-07 11:18:20,498 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 504 states. [2019-12-07 11:18:20,499 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 504 states to 504 states and 921 transitions. [2019-12-07 11:18:20,499 INFO L78 Accepts]: Start accepts. Automaton has 504 states and 921 transitions. Word has length 52 [2019-12-07 11:18:20,499 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:18:20,499 INFO L462 AbstractCegarLoop]: Abstraction has 504 states and 921 transitions. [2019-12-07 11:18:20,499 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:18:20,499 INFO L276 IsEmpty]: Start isEmpty. Operand 504 states and 921 transitions. [2019-12-07 11:18:20,500 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 11:18:20,500 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:18:20,500 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:18:20,500 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:18:20,500 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:18:20,501 INFO L82 PathProgramCache]: Analyzing trace with hash 260455414, now seen corresponding path program 3 times [2019-12-07 11:18:20,501 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:18:20,501 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [26297474] [2019-12-07 11:18:20,501 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:18:20,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:18:20,569 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:18:20,570 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [26297474] [2019-12-07 11:18:20,570 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:18:20,570 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 11:18:20,570 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [667135640] [2019-12-07 11:18:20,570 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:18:20,570 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:18:20,570 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:18:20,571 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:18:20,571 INFO L87 Difference]: Start difference. First operand 504 states and 921 transitions. Second operand 6 states. [2019-12-07 11:18:20,776 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:18:20,776 INFO L93 Difference]: Finished difference Result 719 states and 1302 transitions. [2019-12-07 11:18:20,777 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 11:18:20,777 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2019-12-07 11:18:20,777 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:18:20,777 INFO L225 Difference]: With dead ends: 719 [2019-12-07 11:18:20,777 INFO L226 Difference]: Without dead ends: 719 [2019-12-07 11:18:20,778 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2019-12-07 11:18:20,778 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 719 states. [2019-12-07 11:18:20,781 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 719 to 516. [2019-12-07 11:18:20,781 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 516 states. [2019-12-07 11:18:20,782 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 516 states to 516 states and 943 transitions. [2019-12-07 11:18:20,782 INFO L78 Accepts]: Start accepts. Automaton has 516 states and 943 transitions. Word has length 52 [2019-12-07 11:18:20,782 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:18:20,782 INFO L462 AbstractCegarLoop]: Abstraction has 516 states and 943 transitions. [2019-12-07 11:18:20,782 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:18:20,782 INFO L276 IsEmpty]: Start isEmpty. Operand 516 states and 943 transitions. [2019-12-07 11:18:20,783 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 11:18:20,783 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:18:20,783 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:18:20,783 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:18:20,783 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:18:20,783 INFO L82 PathProgramCache]: Analyzing trace with hash -681731879, now seen corresponding path program 1 times [2019-12-07 11:18:20,784 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:18:20,784 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2085648796] [2019-12-07 11:18:20,784 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:18:20,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:18:20,821 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:18:20,821 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2085648796] [2019-12-07 11:18:20,821 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:18:20,821 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:18:20,821 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [128470600] [2019-12-07 11:18:20,822 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:18:20,822 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:18:20,822 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:18:20,822 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:18:20,822 INFO L87 Difference]: Start difference. First operand 516 states and 943 transitions. Second operand 3 states. [2019-12-07 11:18:20,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:18:20,849 INFO L93 Difference]: Finished difference Result 516 states and 942 transitions. [2019-12-07 11:18:20,850 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:18:20,850 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-12-07 11:18:20,850 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:18:20,850 INFO L225 Difference]: With dead ends: 516 [2019-12-07 11:18:20,850 INFO L226 Difference]: Without dead ends: 516 [2019-12-07 11:18:20,851 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:18:20,851 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 516 states. [2019-12-07 11:18:20,854 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 516 to 383. [2019-12-07 11:18:20,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 383 states. [2019-12-07 11:18:20,854 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 383 states to 383 states and 698 transitions. [2019-12-07 11:18:20,854 INFO L78 Accepts]: Start accepts. Automaton has 383 states and 698 transitions. Word has length 53 [2019-12-07 11:18:20,855 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:18:20,855 INFO L462 AbstractCegarLoop]: Abstraction has 383 states and 698 transitions. [2019-12-07 11:18:20,855 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:18:20,855 INFO L276 IsEmpty]: Start isEmpty. Operand 383 states and 698 transitions. [2019-12-07 11:18:20,855 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 11:18:20,855 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:18:20,855 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:18:20,856 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:18:20,856 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:18:20,856 INFO L82 PathProgramCache]: Analyzing trace with hash 1294054807, now seen corresponding path program 1 times [2019-12-07 11:18:20,856 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:18:20,856 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1507664920] [2019-12-07 11:18:20,856 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:18:20,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:18:20,890 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:18:20,891 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1507664920] [2019-12-07 11:18:20,891 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:18:20,891 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:18:20,891 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2136512345] [2019-12-07 11:18:20,891 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:18:20,891 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:18:20,891 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:18:20,891 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:18:20,892 INFO L87 Difference]: Start difference. First operand 383 states and 698 transitions. Second operand 3 states. [2019-12-07 11:18:20,900 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:18:20,900 INFO L93 Difference]: Finished difference Result 367 states and 649 transitions. [2019-12-07 11:18:20,900 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:18:20,900 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-12-07 11:18:20,901 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:18:20,901 INFO L225 Difference]: With dead ends: 367 [2019-12-07 11:18:20,901 INFO L226 Difference]: Without dead ends: 367 [2019-12-07 11:18:20,901 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:18:20,902 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 367 states. [2019-12-07 11:18:20,903 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 367 to 331. [2019-12-07 11:18:20,904 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 331 states. [2019-12-07 11:18:20,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 331 states to 331 states and 581 transitions. [2019-12-07 11:18:20,904 INFO L78 Accepts]: Start accepts. Automaton has 331 states and 581 transitions. Word has length 53 [2019-12-07 11:18:20,904 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:18:20,904 INFO L462 AbstractCegarLoop]: Abstraction has 331 states and 581 transitions. [2019-12-07 11:18:20,904 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:18:20,904 INFO L276 IsEmpty]: Start isEmpty. Operand 331 states and 581 transitions. [2019-12-07 11:18:20,905 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 11:18:20,905 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:18:20,905 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:18:20,905 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:18:20,905 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:18:20,905 INFO L82 PathProgramCache]: Analyzing trace with hash -731863498, now seen corresponding path program 1 times [2019-12-07 11:18:20,905 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:18:20,905 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [900010136] [2019-12-07 11:18:20,905 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:18:20,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:18:21,070 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:18:21,070 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [900010136] [2019-12-07 11:18:21,070 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:18:21,071 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 11:18:21,071 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1581884576] [2019-12-07 11:18:21,071 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 11:18:21,071 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:18:21,071 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 11:18:21,072 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=112, Unknown=0, NotChecked=0, Total=156 [2019-12-07 11:18:21,072 INFO L87 Difference]: Start difference. First operand 331 states and 581 transitions. Second operand 13 states. [2019-12-07 11:18:21,614 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:18:21,614 INFO L93 Difference]: Finished difference Result 815 states and 1389 transitions. [2019-12-07 11:18:21,614 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 11:18:21,614 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 54 [2019-12-07 11:18:21,614 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:18:21,615 INFO L225 Difference]: With dead ends: 815 [2019-12-07 11:18:21,615 INFO L226 Difference]: Without dead ends: 272 [2019-12-07 11:18:21,615 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 80 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=123, Invalid=339, Unknown=0, NotChecked=0, Total=462 [2019-12-07 11:18:21,616 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 272 states. [2019-12-07 11:18:21,617 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 272 to 221. [2019-12-07 11:18:21,617 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 221 states. [2019-12-07 11:18:21,618 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 221 states to 221 states and 391 transitions. [2019-12-07 11:18:21,618 INFO L78 Accepts]: Start accepts. Automaton has 221 states and 391 transitions. Word has length 54 [2019-12-07 11:18:21,618 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:18:21,618 INFO L462 AbstractCegarLoop]: Abstraction has 221 states and 391 transitions. [2019-12-07 11:18:21,618 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 11:18:21,618 INFO L276 IsEmpty]: Start isEmpty. Operand 221 states and 391 transitions. [2019-12-07 11:18:21,618 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 11:18:21,618 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:18:21,618 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:18:21,619 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:18:21,619 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:18:21,619 INFO L82 PathProgramCache]: Analyzing trace with hash -1034362442, now seen corresponding path program 2 times [2019-12-07 11:18:21,619 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:18:21,619 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [182826990] [2019-12-07 11:18:21,619 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:18:21,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:18:21,778 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:18:21,778 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [182826990] [2019-12-07 11:18:21,779 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:18:21,779 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 11:18:21,779 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2130117410] [2019-12-07 11:18:21,779 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 11:18:21,779 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:18:21,779 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 11:18:21,779 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=106, Unknown=0, NotChecked=0, Total=132 [2019-12-07 11:18:21,780 INFO L87 Difference]: Start difference. First operand 221 states and 391 transitions. Second operand 12 states. [2019-12-07 11:18:22,080 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:18:22,080 INFO L93 Difference]: Finished difference Result 380 states and 651 transitions. [2019-12-07 11:18:22,080 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-07 11:18:22,080 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 54 [2019-12-07 11:18:22,081 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:18:22,081 INFO L225 Difference]: With dead ends: 380 [2019-12-07 11:18:22,081 INFO L226 Difference]: Without dead ends: 347 [2019-12-07 11:18:22,081 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 47 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=62, Invalid=280, Unknown=0, NotChecked=0, Total=342 [2019-12-07 11:18:22,082 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 347 states. [2019-12-07 11:18:22,084 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 347 to 317. [2019-12-07 11:18:22,084 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 317 states. [2019-12-07 11:18:22,084 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 317 states to 317 states and 555 transitions. [2019-12-07 11:18:22,084 INFO L78 Accepts]: Start accepts. Automaton has 317 states and 555 transitions. Word has length 54 [2019-12-07 11:18:22,084 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:18:22,084 INFO L462 AbstractCegarLoop]: Abstraction has 317 states and 555 transitions. [2019-12-07 11:18:22,084 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 11:18:22,084 INFO L276 IsEmpty]: Start isEmpty. Operand 317 states and 555 transitions. [2019-12-07 11:18:22,085 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 11:18:22,085 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:18:22,085 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:18:22,085 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:18:22,085 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:18:22,085 INFO L82 PathProgramCache]: Analyzing trace with hash -1623394108, now seen corresponding path program 3 times [2019-12-07 11:18:22,085 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:18:22,085 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2007823916] [2019-12-07 11:18:22,085 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:18:22,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:18:22,268 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:18:22,268 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2007823916] [2019-12-07 11:18:22,268 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:18:22,268 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 11:18:22,268 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [501721047] [2019-12-07 11:18:22,268 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 11:18:22,269 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:18:22,269 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 11:18:22,269 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2019-12-07 11:18:22,269 INFO L87 Difference]: Start difference. First operand 317 states and 555 transitions. Second operand 14 states. [2019-12-07 11:18:22,592 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:18:22,592 INFO L93 Difference]: Finished difference Result 438 states and 740 transitions. [2019-12-07 11:18:22,592 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 11:18:22,593 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 54 [2019-12-07 11:18:22,593 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:18:22,593 INFO L225 Difference]: With dead ends: 438 [2019-12-07 11:18:22,593 INFO L226 Difference]: Without dead ends: 403 [2019-12-07 11:18:22,593 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 92 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=97, Invalid=503, Unknown=0, NotChecked=0, Total=600 [2019-12-07 11:18:22,594 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 403 states. [2019-12-07 11:18:22,596 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 403 to 321. [2019-12-07 11:18:22,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 321 states. [2019-12-07 11:18:22,596 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 321 states to 321 states and 562 transitions. [2019-12-07 11:18:22,596 INFO L78 Accepts]: Start accepts. Automaton has 321 states and 562 transitions. Word has length 54 [2019-12-07 11:18:22,596 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:18:22,596 INFO L462 AbstractCegarLoop]: Abstraction has 321 states and 562 transitions. [2019-12-07 11:18:22,596 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 11:18:22,596 INFO L276 IsEmpty]: Start isEmpty. Operand 321 states and 562 transitions. [2019-12-07 11:18:22,597 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 11:18:22,597 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:18:22,597 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:18:22,597 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:18:22,597 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:18:22,597 INFO L82 PathProgramCache]: Analyzing trace with hash 1326135034, now seen corresponding path program 4 times [2019-12-07 11:18:22,597 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:18:22,597 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1571680698] [2019-12-07 11:18:22,598 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:18:22,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:18:22,744 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:18:22,744 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1571680698] [2019-12-07 11:18:22,745 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:18:22,745 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 11:18:22,745 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [389141179] [2019-12-07 11:18:22,745 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 11:18:22,745 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:18:22,745 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 11:18:22,745 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=129, Unknown=0, NotChecked=0, Total=156 [2019-12-07 11:18:22,745 INFO L87 Difference]: Start difference. First operand 321 states and 562 transitions. Second operand 13 states. [2019-12-07 11:18:23,067 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:18:23,067 INFO L93 Difference]: Finished difference Result 426 states and 719 transitions. [2019-12-07 11:18:23,067 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 11:18:23,067 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 54 [2019-12-07 11:18:23,068 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:18:23,068 INFO L225 Difference]: With dead ends: 426 [2019-12-07 11:18:23,068 INFO L226 Difference]: Without dead ends: 391 [2019-12-07 11:18:23,068 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 82 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=112, Invalid=488, Unknown=0, NotChecked=0, Total=600 [2019-12-07 11:18:23,069 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 391 states. [2019-12-07 11:18:23,070 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 391 to 329. [2019-12-07 11:18:23,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 329 states. [2019-12-07 11:18:23,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 329 states to 329 states and 576 transitions. [2019-12-07 11:18:23,071 INFO L78 Accepts]: Start accepts. Automaton has 329 states and 576 transitions. Word has length 54 [2019-12-07 11:18:23,071 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:18:23,071 INFO L462 AbstractCegarLoop]: Abstraction has 329 states and 576 transitions. [2019-12-07 11:18:23,071 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 11:18:23,071 INFO L276 IsEmpty]: Start isEmpty. Operand 329 states and 576 transitions. [2019-12-07 11:18:23,072 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 11:18:23,072 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:18:23,072 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:18:23,072 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:18:23,072 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:18:23,072 INFO L82 PathProgramCache]: Analyzing trace with hash -91775718, now seen corresponding path program 5 times [2019-12-07 11:18:23,072 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:18:23,072 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1598494485] [2019-12-07 11:18:23,072 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:18:23,091 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 11:18:23,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 11:18:23,144 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 11:18:23,144 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 11:18:23,147 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [702] [702] ULTIMATE.startENTRY-->L779: Formula: (let ((.cse0 (store |v_#valid_47| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= v_~y$r_buff1_thd0~0_329 0) (= v_~y$w_buff0_used~0_834 0) (= 0 |v_ULTIMATE.start_main_~#t2017~0.offset_19|) (= 0 v_~__unbuffered_cnt~0_61) (= |v_#valid_45| (store .cse0 |v_ULTIMATE.start_main_~#t2017~0.base_24| 1)) (= 0 v_~weak$$choice0~0_14) (= v_~y$r_buff1_thd1~0_200 0) (= 0 v_~x~0_147) (= |v_#NULL.offset_3| 0) (= v_~main$tmp_guard1~0_27 0) (= v_~y$read_delayed~0_6 0) (= 0 v_~__unbuffered_p1_EAX~0_29) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t2017~0.base_24|) (= 0 v_~y$r_buff1_thd2~0_208) (= 0 v_~y$r_buff0_thd2~0_162) (= v_~y$mem_tmp~0_19 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t2017~0.base_24|)) (= v_~weak$$choice2~0_141 0) (= v_~y$w_buff1_used~0_547 0) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t2017~0.base_24| 4) |v_#length_13|) (= v_~y$r_buff0_thd1~0_297 0) (= 0 v_~y$flush_delayed~0_36) (= v_~main$tmp_guard0~0_33 0) (= 0 |v_#NULL.base_3|) (= 0 v_~y$w_buff0~0_485) (= 0 v_~y$read_delayed_var~0.offset_6) (= v_~y$r_buff0_thd0~0_416 0) (= v_~y~0_146 0) (< 0 |v_#StackHeapBarrier_13|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2017~0.base_24| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2017~0.base_24|) |v_ULTIMATE.start_main_~#t2017~0.offset_19| 0)) |v_#memory_int_11|) (= v_~y$w_buff1~0_308 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_41|, #NULL.offset=|v_#NULL.offset_3|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_35|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_145|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_48|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_37|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_36|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ~y$mem_tmp~0=v_~y$mem_tmp~0_19, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_29, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_297, ~y$flush_delayed~0=v_~y$flush_delayed~0_36, ULTIMATE.start_main_~#t2017~0.base=|v_ULTIMATE.start_main_~#t2017~0.base_24|, #length=|v_#length_13|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_36|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_38|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_21|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_27|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_41|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_44|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_38|, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_36|, ~y$w_buff1~0=v_~y$w_buff1~0_308, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_162, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_329, ~x~0=v_~x~0_147, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_834, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_36|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_33|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_27, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_43|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_33|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_42|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_34|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_200, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_34|, ~y$w_buff0~0=v_~y$w_buff0~0_485, ~y~0=v_~y~0_146, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_29|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_21|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_33|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_53|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_27|, ULTIMATE.start_main_~#t2018~0.offset=|v_ULTIMATE.start_main_~#t2018~0.offset_16|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_33, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_35|, #NULL.base=|v_#NULL.base_3|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_40|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_208, ULTIMATE.start_main_~#t2018~0.base=|v_ULTIMATE.start_main_~#t2018~0.base_19|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_37|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_416, #valid=|v_#valid_45|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t2017~0.offset=|v_ULTIMATE.start_main_~#t2017~0.offset_19|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_14|, ~weak$$choice2~0=v_~weak$$choice2~0_141, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_547} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~y$mem_tmp~0, ~__unbuffered_p1_EAX~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, ULTIMATE.start_main_~#t2017~0.base, #length, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_~#t2018~0.offset, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_~#t2018~0.base, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_~#t2017~0.offset, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 11:18:23,147 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [675] [675] L779-1-->L781: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t2018~0.base_11|)) (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t2018~0.base_11|) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t2018~0.base_11|)) (= |v_#memory_int_7| (store |v_#memory_int_8| |v_ULTIMATE.start_main_~#t2018~0.base_11| (store (select |v_#memory_int_8| |v_ULTIMATE.start_main_~#t2018~0.base_11|) |v_ULTIMATE.start_main_~#t2018~0.offset_10| 1))) (= |v_#length_9| (store |v_#length_10| |v_ULTIMATE.start_main_~#t2018~0.base_11| 4)) (= (store |v_#valid_28| |v_ULTIMATE.start_main_~#t2018~0.base_11| 1) |v_#valid_27|) (= 0 |v_ULTIMATE.start_main_~#t2018~0.offset_10|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_8|, #length=|v_#length_10|} OutVars{ULTIMATE.start_main_~#t2018~0.base=|v_ULTIMATE.start_main_~#t2018~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_7|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_6|, ULTIMATE.start_main_~#t2018~0.offset=|v_ULTIMATE.start_main_~#t2018~0.offset_10|, #length=|v_#length_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2018~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_~#t2018~0.offset, #length] because there is no mapped edge [2019-12-07 11:18:23,148 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [638] [638] P0ENTRY-->L4-3: Formula: (and (= v_~y$w_buff1~0_121 v_~y$w_buff0~0_204) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98 0)) (= v_P0Thread1of1ForFork0_~arg.base_94 |v_P0Thread1of1ForFork0_#in~arg.base_96|) (= 2 v_~y$w_buff0~0_203) (= |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94| (ite (not (and (not (= 0 (mod v_~y$w_buff0_used~0_349 256))) (not (= 0 (mod v_~y$w_buff1_used~0_210 256))))) 1 0)) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94|) (= v_P0Thread1of1ForFork0_~arg.offset_94 |v_P0Thread1of1ForFork0_#in~arg.offset_96|) (= v_~y$w_buff0_used~0_350 v_~y$w_buff1_used~0_210) (= v_~y$w_buff0_used~0_349 1)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_96|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_350, ~y$w_buff0~0=v_~y$w_buff0~0_204, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_96|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_96|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_349, ~y$w_buff1~0=v_~y$w_buff1~0_121, ~y$w_buff0~0=v_~y$w_buff0~0_203, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_96|, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_94, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_94, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_210} AuxVars[] AssignedVars[~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 11:18:23,149 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [642] [642] L756-2-->L756-4: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd2~0_In-647298868 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-647298868 256)))) (or (and (or .cse0 .cse1) (= ~y~0_In-647298868 |P1Thread1of1ForFork1_#t~ite9_Out-647298868|)) (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite9_Out-647298868| ~y$w_buff1~0_In-647298868) (not .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-647298868, ~y$w_buff1~0=~y$w_buff1~0_In-647298868, ~y~0=~y~0_In-647298868, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-647298868} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-647298868, ~y$w_buff1~0=~y$w_buff1~0_In-647298868, P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out-647298868|, ~y~0=~y~0_In-647298868, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-647298868} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9] because there is no mapped edge [2019-12-07 11:18:23,149 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [621] [621] L756-4-->L757: Formula: (= |v_P1Thread1of1ForFork1_#t~ite9_8| v_~y~0_41) InVars {P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_8|} OutVars{P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_7|, P1Thread1of1ForFork1_#t~ite10=|v_P1Thread1of1ForFork1_#t~ite10_13|, ~y~0=v_~y~0_41} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10, ~y~0] because there is no mapped edge [2019-12-07 11:18:23,149 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [646] [646] L757-->L757-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In775103514 256))) (.cse1 (= (mod ~y$r_buff0_thd2~0_In775103514 256) 0))) (or (and (= ~y$w_buff0_used~0_In775103514 |P1Thread1of1ForFork1_#t~ite11_Out775103514|) (or .cse0 .cse1)) (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out775103514|) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In775103514, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In775103514} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In775103514, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In775103514, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out775103514|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 11:18:23,149 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L758-->L758-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In148911314 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd2~0_In148911314 256))) (.cse3 (= (mod ~y$r_buff0_thd2~0_In148911314 256) 0)) (.cse2 (= (mod ~y$w_buff0_used~0_In148911314 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite12_Out148911314| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse3 .cse2) (= ~y$w_buff1_used~0_In148911314 |P1Thread1of1ForFork1_#t~ite12_Out148911314|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In148911314, ~y$w_buff0_used~0=~y$w_buff0_used~0_In148911314, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In148911314, ~y$w_buff1_used~0=~y$w_buff1_used~0_In148911314} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In148911314, ~y$w_buff0_used~0=~y$w_buff0_used~0_In148911314, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In148911314, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out148911314|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In148911314} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 11:18:23,149 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [645] [645] L759-->L759-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-967948249 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-967948249 256)))) (or (and (or .cse0 .cse1) (= ~y$r_buff0_thd2~0_In-967948249 |P1Thread1of1ForFork1_#t~ite13_Out-967948249|)) (and (not .cse1) (= 0 |P1Thread1of1ForFork1_#t~ite13_Out-967948249|) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-967948249, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-967948249} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-967948249, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-967948249, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-967948249|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 11:18:23,150 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L760-->L760-2: Formula: (let ((.cse1 (= (mod ~y$r_buff1_thd2~0_In-2002713524 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-2002713524 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd2~0_In-2002713524 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In-2002713524 256) 0))) (or (and (or .cse0 .cse1) (= ~y$r_buff1_thd2~0_In-2002713524 |P1Thread1of1ForFork1_#t~ite14_Out-2002713524|) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite14_Out-2002713524|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-2002713524, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2002713524, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-2002713524, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2002713524} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-2002713524, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2002713524, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-2002713524, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-2002713524|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2002713524} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 11:18:23,150 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L760-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite14_28| v_~y$r_buff1_thd2~0_91) (= (+ v_~__unbuffered_cnt~0_39 1) v_~__unbuffered_cnt~0_38) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_28|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_91, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_27|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 11:18:23,150 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L737-->L737-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd1~0_In-1818477929 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In-1818477929 256) 0))) (or (and (= ~y$w_buff0_used~0_In-1818477929 |P0Thread1of1ForFork0_#t~ite5_Out-1818477929|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out-1818477929|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1818477929, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1818477929} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-1818477929|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1818477929, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1818477929} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 11:18:23,150 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [641] [641] L738-->L738-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd1~0_In-1142675037 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1142675037 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd1~0_In-1142675037 256))) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In-1142675037 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$w_buff1_used~0_In-1142675037 |P0Thread1of1ForFork0_#t~ite6_Out-1142675037|)) (and (= 0 |P0Thread1of1ForFork0_#t~ite6_Out-1142675037|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-1142675037, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1142675037, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1142675037, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1142675037} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-1142675037|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-1142675037, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1142675037, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1142675037, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1142675037} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 11:18:23,150 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L739-->L740: Formula: (let ((.cse0 (= ~y$r_buff0_thd1~0_Out-5084836 ~y$r_buff0_thd1~0_In-5084836)) (.cse1 (= 0 (mod ~y$r_buff0_thd1~0_In-5084836 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In-5084836 256) 0))) (or (and .cse0 .cse1) (and .cse2 .cse0) (and (not .cse1) (not .cse2) (= 0 ~y$r_buff0_thd1~0_Out-5084836)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-5084836, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-5084836} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-5084836, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-5084836|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_Out-5084836} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~y$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 11:18:23,150 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L740-->L740-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In458564793 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd1~0_In458564793 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In458564793 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd1~0_In458564793 256)))) (or (and (or .cse0 .cse1) (= ~y$r_buff1_thd1~0_In458564793 |P0Thread1of1ForFork0_#t~ite8_Out458564793|) (or .cse2 .cse3)) (and (= |P0Thread1of1ForFork0_#t~ite8_Out458564793| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In458564793, ~y$w_buff0_used~0=~y$w_buff0_used~0_In458564793, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In458564793, ~y$w_buff1_used~0=~y$w_buff1_used~0_In458564793} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In458564793, ~y$w_buff0_used~0=~y$w_buff0_used~0_In458564793, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out458564793|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In458564793, ~y$w_buff1_used~0=~y$w_buff1_used~0_In458564793} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 11:18:23,150 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [668] [668] L740-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~y$r_buff1_thd1~0_80 |v_P0Thread1of1ForFork0_#t~ite8_28|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~__unbuffered_cnt~0_31 (+ v_~__unbuffered_cnt~0_32 1))) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_80, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_27|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_31} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 11:18:23,151 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [577] [577] L785-->L787-2: Formula: (and (not (= (mod v_~main$tmp_guard0~0_4 256) 0)) (or (= (mod v_~y$w_buff0_used~0_67 256) 0) (= 0 (mod v_~y$r_buff0_thd0~0_44 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_67, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_44, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_4} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_67, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_44, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_4} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 11:18:23,151 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L787-2-->L787-5: Formula: (let ((.cse2 (= (mod ~y$w_buff1_used~0_In-779855956 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-779855956 256))) (.cse0 (= |ULTIMATE.start_main_#t~ite18_Out-779855956| |ULTIMATE.start_main_#t~ite17_Out-779855956|))) (or (and (= ~y~0_In-779855956 |ULTIMATE.start_main_#t~ite17_Out-779855956|) .cse0 (or .cse1 .cse2)) (and (not .cse2) (not .cse1) .cse0 (= ~y$w_buff1~0_In-779855956 |ULTIMATE.start_main_#t~ite17_Out-779855956|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-779855956, ~y~0=~y~0_In-779855956, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-779855956, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-779855956} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out-779855956|, ~y$w_buff1~0=~y$w_buff1~0_In-779855956, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-779855956|, ~y~0=~y~0_In-779855956, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-779855956, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-779855956} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18] because there is no mapped edge [2019-12-07 11:18:23,151 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [644] [644] L788-->L788-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In1077331589 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1077331589 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite19_Out1077331589|) (not .cse1)) (and (= ~y$w_buff0_used~0_In1077331589 |ULTIMATE.start_main_#t~ite19_Out1077331589|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1077331589, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1077331589} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1077331589, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out1077331589|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1077331589} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 11:18:23,151 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L789-->L789-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In800092036 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In800092036 256) 0)) (.cse1 (= (mod ~y$w_buff1_used~0_In800092036 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In800092036 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite20_Out800092036|)) (and (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite20_Out800092036| ~y$w_buff1_used~0_In800092036) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In800092036, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In800092036, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In800092036, ~y$w_buff1_used~0=~y$w_buff1_used~0_In800092036} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In800092036, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In800092036, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out800092036|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In800092036, ~y$w_buff1_used~0=~y$w_buff1_used~0_In800092036} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 11:18:23,151 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [639] [639] L790-->L790-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In1291729050 256))) (.cse1 (= (mod ~y$r_buff0_thd0~0_In1291729050 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite21_Out1291729050|)) (and (= ~y$r_buff0_thd0~0_In1291729050 |ULTIMATE.start_main_#t~ite21_Out1291729050|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1291729050, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1291729050} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1291729050, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1291729050, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out1291729050|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 11:18:23,152 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [651] [651] L791-->L791-2: Formula: (let ((.cse2 (= 0 (mod ~y$w_buff0_used~0_In2125794619 256))) (.cse3 (= (mod ~y$r_buff0_thd0~0_In2125794619 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In2125794619 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In2125794619 256)))) (or (and (= |ULTIMATE.start_main_#t~ite22_Out2125794619| ~y$r_buff1_thd0~0_In2125794619) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite22_Out2125794619| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In2125794619, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2125794619, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2125794619, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2125794619} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In2125794619, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2125794619, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2125794619, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out2125794619|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2125794619} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 11:18:23,153 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L800-->L800-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-357438716 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite31_In-357438716| |ULTIMATE.start_main_#t~ite31_Out-357438716|) (= |ULTIMATE.start_main_#t~ite32_Out-357438716| ~y$w_buff1~0_In-357438716)) (and .cse0 (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-357438716 256) 0))) (or (and .cse1 (= (mod ~y$w_buff1_used~0_In-357438716 256) 0)) (= 0 (mod ~y$w_buff0_used~0_In-357438716 256)) (and .cse1 (= (mod ~y$r_buff1_thd0~0_In-357438716 256) 0)))) (= |ULTIMATE.start_main_#t~ite31_Out-357438716| ~y$w_buff1~0_In-357438716) (= |ULTIMATE.start_main_#t~ite31_Out-357438716| |ULTIMATE.start_main_#t~ite32_Out-357438716|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-357438716, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-357438716, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-357438716, ~weak$$choice2~0=~weak$$choice2~0_In-357438716, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_In-357438716|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-357438716, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-357438716} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-357438716, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-357438716, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-357438716, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_Out-357438716|, ~weak$$choice2~0=~weak$$choice2~0_In-357438716, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out-357438716|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-357438716, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-357438716} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32] because there is no mapped edge [2019-12-07 11:18:23,153 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [637] [637] L803-->L804: Formula: (and (= v_~y$r_buff0_thd0~0_162 v_~y$r_buff0_thd0~0_163) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_163, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_9|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_11|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_18|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_162, ~weak$$choice2~0=v_~weak$$choice2~0_39} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39, ~y$r_buff0_thd0~0] because there is no mapped edge [2019-12-07 11:18:23,154 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L806-->L809-1: Formula: (and (= 0 v_~y$flush_delayed~0_24) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6| (mod v_~main$tmp_guard1~0_12 256)) (not (= 0 (mod v_~y$flush_delayed~0_25 256))) (= v_~y~0_106 v_~y$mem_tmp~0_13)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_13, ~y$flush_delayed~0=v_~y$flush_delayed~0_25, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_13, ~y$flush_delayed~0=v_~y$flush_delayed~0_24, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12, ~y~0=v_~y~0_106, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_22|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[~y$flush_delayed~0, ~y~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 11:18:23,154 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L809-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 11:18:23,198 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 11:18:23 BasicIcfg [2019-12-07 11:18:23,198 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 11:18:23,198 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 11:18:23,198 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 11:18:23,198 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 11:18:23,199 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:18:13" (3/4) ... [2019-12-07 11:18:23,200 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 11:18:23,200 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [702] [702] ULTIMATE.startENTRY-->L779: Formula: (let ((.cse0 (store |v_#valid_47| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= v_~y$r_buff1_thd0~0_329 0) (= v_~y$w_buff0_used~0_834 0) (= 0 |v_ULTIMATE.start_main_~#t2017~0.offset_19|) (= 0 v_~__unbuffered_cnt~0_61) (= |v_#valid_45| (store .cse0 |v_ULTIMATE.start_main_~#t2017~0.base_24| 1)) (= 0 v_~weak$$choice0~0_14) (= v_~y$r_buff1_thd1~0_200 0) (= 0 v_~x~0_147) (= |v_#NULL.offset_3| 0) (= v_~main$tmp_guard1~0_27 0) (= v_~y$read_delayed~0_6 0) (= 0 v_~__unbuffered_p1_EAX~0_29) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t2017~0.base_24|) (= 0 v_~y$r_buff1_thd2~0_208) (= 0 v_~y$r_buff0_thd2~0_162) (= v_~y$mem_tmp~0_19 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t2017~0.base_24|)) (= v_~weak$$choice2~0_141 0) (= v_~y$w_buff1_used~0_547 0) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t2017~0.base_24| 4) |v_#length_13|) (= v_~y$r_buff0_thd1~0_297 0) (= 0 v_~y$flush_delayed~0_36) (= v_~main$tmp_guard0~0_33 0) (= 0 |v_#NULL.base_3|) (= 0 v_~y$w_buff0~0_485) (= 0 v_~y$read_delayed_var~0.offset_6) (= v_~y$r_buff0_thd0~0_416 0) (= v_~y~0_146 0) (< 0 |v_#StackHeapBarrier_13|) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2017~0.base_24| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2017~0.base_24|) |v_ULTIMATE.start_main_~#t2017~0.offset_19| 0)) |v_#memory_int_11|) (= v_~y$w_buff1~0_308 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_41|, #NULL.offset=|v_#NULL.offset_3|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_35|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_145|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_48|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_37|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_36|, ~y$read_delayed~0=v_~y$read_delayed~0_6, ~y$mem_tmp~0=v_~y$mem_tmp~0_19, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_29, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_297, ~y$flush_delayed~0=v_~y$flush_delayed~0_36, ULTIMATE.start_main_~#t2017~0.base=|v_ULTIMATE.start_main_~#t2017~0.base_24|, #length=|v_#length_13|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_36|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_38|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_21|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_27|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_41|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_44|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_38|, ~weak$$choice0~0=v_~weak$$choice0~0_14, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_36|, ~y$w_buff1~0=v_~y$w_buff1~0_308, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_162, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_10|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_329, ~x~0=v_~x~0_147, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_834, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_36|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_33|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_27, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_43|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_33|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_42|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_34|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_200, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_34|, ~y$w_buff0~0=v_~y$w_buff0~0_485, ~y~0=v_~y~0_146, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_29|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_21|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_33|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_53|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_27|, ULTIMATE.start_main_~#t2018~0.offset=|v_ULTIMATE.start_main_~#t2018~0.offset_16|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_33, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_35|, #NULL.base=|v_#NULL.base_3|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_40|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_208, ULTIMATE.start_main_~#t2018~0.base=|v_ULTIMATE.start_main_~#t2018~0.base_19|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_37|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_416, #valid=|v_#valid_45|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t2017~0.offset=|v_ULTIMATE.start_main_~#t2017~0.offset_19|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_14|, ~weak$$choice2~0=v_~weak$$choice2~0_141, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_547} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~y$mem_tmp~0, ~__unbuffered_p1_EAX~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, ULTIMATE.start_main_~#t2017~0.base, #length, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_~#t2018~0.offset, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_~#t2018~0.base, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_~#t2017~0.offset, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 11:18:23,201 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [675] [675] L779-1-->L781: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t2018~0.base_11|)) (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t2018~0.base_11|) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t2018~0.base_11|)) (= |v_#memory_int_7| (store |v_#memory_int_8| |v_ULTIMATE.start_main_~#t2018~0.base_11| (store (select |v_#memory_int_8| |v_ULTIMATE.start_main_~#t2018~0.base_11|) |v_ULTIMATE.start_main_~#t2018~0.offset_10| 1))) (= |v_#length_9| (store |v_#length_10| |v_ULTIMATE.start_main_~#t2018~0.base_11| 4)) (= (store |v_#valid_28| |v_ULTIMATE.start_main_~#t2018~0.base_11| 1) |v_#valid_27|) (= 0 |v_ULTIMATE.start_main_~#t2018~0.offset_10|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_8|, #length=|v_#length_10|} OutVars{ULTIMATE.start_main_~#t2018~0.base=|v_ULTIMATE.start_main_~#t2018~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_7|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_6|, ULTIMATE.start_main_~#t2018~0.offset=|v_ULTIMATE.start_main_~#t2018~0.offset_10|, #length=|v_#length_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2018~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_~#t2018~0.offset, #length] because there is no mapped edge [2019-12-07 11:18:23,201 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [638] [638] P0ENTRY-->L4-3: Formula: (and (= v_~y$w_buff1~0_121 v_~y$w_buff0~0_204) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98 0)) (= v_P0Thread1of1ForFork0_~arg.base_94 |v_P0Thread1of1ForFork0_#in~arg.base_96|) (= 2 v_~y$w_buff0~0_203) (= |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94| (ite (not (and (not (= 0 (mod v_~y$w_buff0_used~0_349 256))) (not (= 0 (mod v_~y$w_buff1_used~0_210 256))))) 1 0)) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94|) (= v_P0Thread1of1ForFork0_~arg.offset_94 |v_P0Thread1of1ForFork0_#in~arg.offset_96|) (= v_~y$w_buff0_used~0_350 v_~y$w_buff1_used~0_210) (= v_~y$w_buff0_used~0_349 1)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_96|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_350, ~y$w_buff0~0=v_~y$w_buff0~0_204, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_96|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_96|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_349, ~y$w_buff1~0=v_~y$w_buff1~0_121, ~y$w_buff0~0=v_~y$w_buff0~0_203, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_98, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_96|, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_94, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_94|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_94, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_210} AuxVars[] AssignedVars[~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 11:18:23,202 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [642] [642] L756-2-->L756-4: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd2~0_In-647298868 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-647298868 256)))) (or (and (or .cse0 .cse1) (= ~y~0_In-647298868 |P1Thread1of1ForFork1_#t~ite9_Out-647298868|)) (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite9_Out-647298868| ~y$w_buff1~0_In-647298868) (not .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-647298868, ~y$w_buff1~0=~y$w_buff1~0_In-647298868, ~y~0=~y~0_In-647298868, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-647298868} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-647298868, ~y$w_buff1~0=~y$w_buff1~0_In-647298868, P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out-647298868|, ~y~0=~y~0_In-647298868, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-647298868} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9] because there is no mapped edge [2019-12-07 11:18:23,202 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [621] [621] L756-4-->L757: Formula: (= |v_P1Thread1of1ForFork1_#t~ite9_8| v_~y~0_41) InVars {P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_8|} OutVars{P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_7|, P1Thread1of1ForFork1_#t~ite10=|v_P1Thread1of1ForFork1_#t~ite10_13|, ~y~0=v_~y~0_41} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10, ~y~0] because there is no mapped edge [2019-12-07 11:18:23,202 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [646] [646] L757-->L757-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In775103514 256))) (.cse1 (= (mod ~y$r_buff0_thd2~0_In775103514 256) 0))) (or (and (= ~y$w_buff0_used~0_In775103514 |P1Thread1of1ForFork1_#t~ite11_Out775103514|) (or .cse0 .cse1)) (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out775103514|) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In775103514, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In775103514} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In775103514, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In775103514, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out775103514|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 11:18:23,202 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L758-->L758-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In148911314 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd2~0_In148911314 256))) (.cse3 (= (mod ~y$r_buff0_thd2~0_In148911314 256) 0)) (.cse2 (= (mod ~y$w_buff0_used~0_In148911314 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite12_Out148911314| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse3 .cse2) (= ~y$w_buff1_used~0_In148911314 |P1Thread1of1ForFork1_#t~ite12_Out148911314|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In148911314, ~y$w_buff0_used~0=~y$w_buff0_used~0_In148911314, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In148911314, ~y$w_buff1_used~0=~y$w_buff1_used~0_In148911314} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In148911314, ~y$w_buff0_used~0=~y$w_buff0_used~0_In148911314, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In148911314, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out148911314|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In148911314} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 11:18:23,202 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [645] [645] L759-->L759-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-967948249 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-967948249 256)))) (or (and (or .cse0 .cse1) (= ~y$r_buff0_thd2~0_In-967948249 |P1Thread1of1ForFork1_#t~ite13_Out-967948249|)) (and (not .cse1) (= 0 |P1Thread1of1ForFork1_#t~ite13_Out-967948249|) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-967948249, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-967948249} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-967948249, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-967948249, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-967948249|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 11:18:23,202 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L760-->L760-2: Formula: (let ((.cse1 (= (mod ~y$r_buff1_thd2~0_In-2002713524 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-2002713524 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd2~0_In-2002713524 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In-2002713524 256) 0))) (or (and (or .cse0 .cse1) (= ~y$r_buff1_thd2~0_In-2002713524 |P1Thread1of1ForFork1_#t~ite14_Out-2002713524|) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite14_Out-2002713524|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-2002713524, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2002713524, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-2002713524, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2002713524} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-2002713524, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2002713524, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-2002713524, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-2002713524|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2002713524} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 11:18:23,202 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L760-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite14_28| v_~y$r_buff1_thd2~0_91) (= (+ v_~__unbuffered_cnt~0_39 1) v_~__unbuffered_cnt~0_38) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_28|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_91, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_38, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_27|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 11:18:23,203 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L737-->L737-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd1~0_In-1818477929 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In-1818477929 256) 0))) (or (and (= ~y$w_buff0_used~0_In-1818477929 |P0Thread1of1ForFork0_#t~ite5_Out-1818477929|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out-1818477929|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1818477929, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1818477929} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-1818477929|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1818477929, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1818477929} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 11:18:23,203 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [641] [641] L738-->L738-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd1~0_In-1142675037 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1142675037 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd1~0_In-1142675037 256))) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In-1142675037 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$w_buff1_used~0_In-1142675037 |P0Thread1of1ForFork0_#t~ite6_Out-1142675037|)) (and (= 0 |P0Thread1of1ForFork0_#t~ite6_Out-1142675037|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-1142675037, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1142675037, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1142675037, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1142675037} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-1142675037|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-1142675037, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1142675037, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1142675037, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1142675037} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 11:18:23,203 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L739-->L740: Formula: (let ((.cse0 (= ~y$r_buff0_thd1~0_Out-5084836 ~y$r_buff0_thd1~0_In-5084836)) (.cse1 (= 0 (mod ~y$r_buff0_thd1~0_In-5084836 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In-5084836 256) 0))) (or (and .cse0 .cse1) (and .cse2 .cse0) (and (not .cse1) (not .cse2) (= 0 ~y$r_buff0_thd1~0_Out-5084836)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-5084836, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-5084836} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-5084836, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-5084836|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_Out-5084836} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~y$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 11:18:23,203 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L740-->L740-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In458564793 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd1~0_In458564793 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In458564793 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd1~0_In458564793 256)))) (or (and (or .cse0 .cse1) (= ~y$r_buff1_thd1~0_In458564793 |P0Thread1of1ForFork0_#t~ite8_Out458564793|) (or .cse2 .cse3)) (and (= |P0Thread1of1ForFork0_#t~ite8_Out458564793| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In458564793, ~y$w_buff0_used~0=~y$w_buff0_used~0_In458564793, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In458564793, ~y$w_buff1_used~0=~y$w_buff1_used~0_In458564793} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In458564793, ~y$w_buff0_used~0=~y$w_buff0_used~0_In458564793, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out458564793|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In458564793, ~y$w_buff1_used~0=~y$w_buff1_used~0_In458564793} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 11:18:23,203 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [668] [668] L740-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~y$r_buff1_thd1~0_80 |v_P0Thread1of1ForFork0_#t~ite8_28|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~__unbuffered_cnt~0_31 (+ v_~__unbuffered_cnt~0_32 1))) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_80, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_27|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_31} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 11:18:23,203 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [577] [577] L785-->L787-2: Formula: (and (not (= (mod v_~main$tmp_guard0~0_4 256) 0)) (or (= (mod v_~y$w_buff0_used~0_67 256) 0) (= 0 (mod v_~y$r_buff0_thd0~0_44 256)))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_67, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_44, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_4} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_67, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_44, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_4} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 11:18:23,203 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L787-2-->L787-5: Formula: (let ((.cse2 (= (mod ~y$w_buff1_used~0_In-779855956 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-779855956 256))) (.cse0 (= |ULTIMATE.start_main_#t~ite18_Out-779855956| |ULTIMATE.start_main_#t~ite17_Out-779855956|))) (or (and (= ~y~0_In-779855956 |ULTIMATE.start_main_#t~ite17_Out-779855956|) .cse0 (or .cse1 .cse2)) (and (not .cse2) (not .cse1) .cse0 (= ~y$w_buff1~0_In-779855956 |ULTIMATE.start_main_#t~ite17_Out-779855956|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-779855956, ~y~0=~y~0_In-779855956, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-779855956, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-779855956} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out-779855956|, ~y$w_buff1~0=~y$w_buff1~0_In-779855956, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out-779855956|, ~y~0=~y~0_In-779855956, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-779855956, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-779855956} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18] because there is no mapped edge [2019-12-07 11:18:23,204 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [644] [644] L788-->L788-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In1077331589 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1077331589 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite19_Out1077331589|) (not .cse1)) (and (= ~y$w_buff0_used~0_In1077331589 |ULTIMATE.start_main_#t~ite19_Out1077331589|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1077331589, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1077331589} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1077331589, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out1077331589|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1077331589} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 11:18:23,204 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L789-->L789-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In800092036 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In800092036 256) 0)) (.cse1 (= (mod ~y$w_buff1_used~0_In800092036 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In800092036 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite20_Out800092036|)) (and (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite20_Out800092036| ~y$w_buff1_used~0_In800092036) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In800092036, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In800092036, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In800092036, ~y$w_buff1_used~0=~y$w_buff1_used~0_In800092036} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In800092036, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In800092036, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out800092036|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In800092036, ~y$w_buff1_used~0=~y$w_buff1_used~0_In800092036} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 11:18:23,204 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [639] [639] L790-->L790-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In1291729050 256))) (.cse1 (= (mod ~y$r_buff0_thd0~0_In1291729050 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite21_Out1291729050|)) (and (= ~y$r_buff0_thd0~0_In1291729050 |ULTIMATE.start_main_#t~ite21_Out1291729050|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1291729050, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1291729050} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1291729050, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1291729050, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out1291729050|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 11:18:23,204 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [651] [651] L791-->L791-2: Formula: (let ((.cse2 (= 0 (mod ~y$w_buff0_used~0_In2125794619 256))) (.cse3 (= (mod ~y$r_buff0_thd0~0_In2125794619 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In2125794619 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In2125794619 256)))) (or (and (= |ULTIMATE.start_main_#t~ite22_Out2125794619| ~y$r_buff1_thd0~0_In2125794619) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite22_Out2125794619| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In2125794619, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2125794619, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2125794619, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2125794619} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In2125794619, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2125794619, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2125794619, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out2125794619|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2125794619} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 11:18:23,205 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L800-->L800-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-357438716 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite31_In-357438716| |ULTIMATE.start_main_#t~ite31_Out-357438716|) (= |ULTIMATE.start_main_#t~ite32_Out-357438716| ~y$w_buff1~0_In-357438716)) (and .cse0 (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-357438716 256) 0))) (or (and .cse1 (= (mod ~y$w_buff1_used~0_In-357438716 256) 0)) (= 0 (mod ~y$w_buff0_used~0_In-357438716 256)) (and .cse1 (= (mod ~y$r_buff1_thd0~0_In-357438716 256) 0)))) (= |ULTIMATE.start_main_#t~ite31_Out-357438716| ~y$w_buff1~0_In-357438716) (= |ULTIMATE.start_main_#t~ite31_Out-357438716| |ULTIMATE.start_main_#t~ite32_Out-357438716|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-357438716, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-357438716, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-357438716, ~weak$$choice2~0=~weak$$choice2~0_In-357438716, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_In-357438716|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-357438716, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-357438716} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-357438716, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-357438716, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-357438716, ULTIMATE.start_main_#t~ite31=|ULTIMATE.start_main_#t~ite31_Out-357438716|, ~weak$$choice2~0=~weak$$choice2~0_In-357438716, ULTIMATE.start_main_#t~ite32=|ULTIMATE.start_main_#t~ite32_Out-357438716|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-357438716, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-357438716} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite32] because there is no mapped edge [2019-12-07 11:18:23,206 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [637] [637] L803-->L804: Formula: (and (= v_~y$r_buff0_thd0~0_162 v_~y$r_buff0_thd0~0_163) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_163, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_9|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_11|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_18|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_162, ~weak$$choice2~0=v_~weak$$choice2~0_39} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39, ~y$r_buff0_thd0~0] because there is no mapped edge [2019-12-07 11:18:23,206 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L806-->L809-1: Formula: (and (= 0 v_~y$flush_delayed~0_24) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6| (mod v_~main$tmp_guard1~0_12 256)) (not (= 0 (mod v_~y$flush_delayed~0_25 256))) (= v_~y~0_106 v_~y$mem_tmp~0_13)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_13, ~y$flush_delayed~0=v_~y$flush_delayed~0_25, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_13, ~y$flush_delayed~0=v_~y$flush_delayed~0_24, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12, ~y~0=v_~y~0_106, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_22|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[~y$flush_delayed~0, ~y~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 11:18:23,206 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L809-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 11:18:23,256 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_8f479560-b2dd-411b-a417-d0fb3bbde14b/bin/uautomizer/witness.graphml [2019-12-07 11:18:23,257 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 11:18:23,258 INFO L168 Benchmark]: Toolchain (without parser) took 10675.24 ms. Allocated memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: 440.4 MB). Free memory was 938.1 MB in the beginning and 1.0 GB in the end (delta: -88.7 MB). Peak memory consumption was 351.7 MB. Max. memory is 11.5 GB. [2019-12-07 11:18:23,258 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 11:18:23,258 INFO L168 Benchmark]: CACSL2BoogieTranslator took 407.81 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 97.0 MB). Free memory was 938.1 MB in the beginning and 1.1 GB in the end (delta: -130.9 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. [2019-12-07 11:18:23,259 INFO L168 Benchmark]: Boogie Procedure Inliner took 49.97 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 11:18:23,259 INFO L168 Benchmark]: Boogie Preprocessor took 26.45 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 11:18:23,259 INFO L168 Benchmark]: RCFGBuilder took 382.54 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 48.7 MB). Peak memory consumption was 48.7 MB. Max. memory is 11.5 GB. [2019-12-07 11:18:23,259 INFO L168 Benchmark]: TraceAbstraction took 9745.02 ms. Allocated memory was 1.1 GB in the beginning and 1.5 GB in the end (delta: 343.4 MB). Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: -26.4 MB). Peak memory consumption was 317.0 MB. Max. memory is 11.5 GB. [2019-12-07 11:18:23,260 INFO L168 Benchmark]: Witness Printer took 58.55 ms. Allocated memory is still 1.5 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 14.5 MB). Peak memory consumption was 14.5 MB. Max. memory is 11.5 GB. [2019-12-07 11:18:23,261 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 407.81 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 97.0 MB). Free memory was 938.1 MB in the beginning and 1.1 GB in the end (delta: -130.9 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 49.97 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.45 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 382.54 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 48.7 MB). Peak memory consumption was 48.7 MB. Max. memory is 11.5 GB. * TraceAbstraction took 9745.02 ms. Allocated memory was 1.1 GB in the beginning and 1.5 GB in the end (delta: 343.4 MB). Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: -26.4 MB). Peak memory consumption was 317.0 MB. Max. memory is 11.5 GB. * Witness Printer took 58.55 ms. Allocated memory is still 1.5 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 14.5 MB). Peak memory consumption was 14.5 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 2.8s, 146 ProgramPointsBefore, 79 ProgramPointsAfterwards, 180 TransitionsBefore, 91 TransitionsAfterwards, 10418 CoEnabledTransitionPairs, 7 FixpointIterations, 28 TrivialSequentialCompositions, 39 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 34 ConcurrentYvCompositions, 25 ChoiceCompositions, 3678 VarBasedMoverChecksPositive, 231 VarBasedMoverChecksNegative, 69 SemBasedMoverChecksPositive, 221 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.9s, 0 MoverChecksTotal, 46090 CheckedPairsTotal, 101 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L779] FCALL, FORK 0 pthread_create(&t2017, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L781] FCALL, FORK 0 pthread_create(&t2018, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L727] 1 y$r_buff1_thd0 = y$r_buff0_thd0 [L728] 1 y$r_buff1_thd1 = y$r_buff0_thd1 [L729] 1 y$r_buff1_thd2 = y$r_buff0_thd2 [L730] 1 y$r_buff0_thd1 = (_Bool)1 [L733] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L736] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L750] 2 __unbuffered_p1_EAX = x [L753] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L736] 1 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L756] 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L757] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L758] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L759] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L737] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L738] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L783] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L787] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L788] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L789] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L790] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L791] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L794] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L795] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L796] 0 y$flush_delayed = weak$$choice2 [L797] 0 y$mem_tmp = y VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L798] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L799] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L799] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L800] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L801] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L801] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L802] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L802] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L804] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L804] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L805] 0 main$tmp_guard1 = !(y == 2 && __unbuffered_p1_EAX == 1) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p1_EAX=1, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 140 locations, 2 error locations. Result: UNSAFE, OverallTime: 9.6s, OverallIterations: 17, TraceHistogramMax: 1, AutomataDifference: 3.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1701 SDtfs, 1691 SDslu, 4654 SDs, 0 SdLazy, 3039 SolverSat, 170 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 169 GetRequests, 25 SyntacticMatches, 14 SemanticMatches, 130 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 328 ImplicationChecksByTransitivity, 1.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=14186occurred in iteration=5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 1.3s AutomataMinimizationTime, 16 MinimizatonAttempts, 9879 StatesRemovedByMinimization, 14 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.0s InterpolantComputationTime, 661 NumberOfCodeBlocks, 661 NumberOfCodeBlocksAsserted, 17 NumberOfCheckSat, 591 ConstructedInterpolants, 0 QuantifiedInterpolants, 119024 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 16 InterpolantComputations, 16 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...