./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe011_pso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_87b65545-3c72-4835-a4aa-bace229fd197/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_87b65545-3c72-4835-a4aa-bace229fd197/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_87b65545-3c72-4835-a4aa-bace229fd197/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_87b65545-3c72-4835-a4aa-bace229fd197/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe011_pso.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_87b65545-3c72-4835-a4aa-bace229fd197/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_87b65545-3c72-4835-a4aa-bace229fd197/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 2cf8b6334ecec1e717b5fb7df9f9330c8a23a009 ...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 12:01:41,270 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 12:01:41,271 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 12:01:41,279 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 12:01:41,279 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 12:01:41,280 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 12:01:41,281 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 12:01:41,282 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 12:01:41,284 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 12:01:41,285 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 12:01:41,285 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 12:01:41,286 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 12:01:41,286 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 12:01:41,287 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 12:01:41,288 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 12:01:41,289 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 12:01:41,289 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 12:01:41,290 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 12:01:41,292 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 12:01:41,293 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 12:01:41,295 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 12:01:41,296 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 12:01:41,297 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 12:01:41,297 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 12:01:41,299 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 12:01:41,299 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 12:01:41,299 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 12:01:41,300 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 12:01:41,300 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 12:01:41,301 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 12:01:41,301 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 12:01:41,301 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 12:01:41,302 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 12:01:41,303 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 12:01:41,303 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 12:01:41,304 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 12:01:41,304 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 12:01:41,304 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 12:01:41,304 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 12:01:41,305 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 12:01:41,306 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 12:01:41,306 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_87b65545-3c72-4835-a4aa-bace229fd197/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 12:01:41,319 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 12:01:41,319 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 12:01:41,320 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 12:01:41,321 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 12:01:41,321 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 12:01:41,321 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 12:01:41,321 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 12:01:41,321 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 12:01:41,321 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 12:01:41,322 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 12:01:41,322 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 12:01:41,322 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 12:01:41,322 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 12:01:41,322 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 12:01:41,323 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 12:01:41,323 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 12:01:41,323 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 12:01:41,323 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 12:01:41,323 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 12:01:41,324 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 12:01:41,324 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 12:01:41,324 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 12:01:41,324 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 12:01:41,324 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 12:01:41,324 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 12:01:41,325 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 12:01:41,325 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 12:01:41,325 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 12:01:41,325 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 12:01:41,325 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_87b65545-3c72-4835-a4aa-bace229fd197/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2cf8b6334ecec1e717b5fb7df9f9330c8a23a009 [2019-12-07 12:01:41,437 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 12:01:41,444 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 12:01:41,447 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 12:01:41,448 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 12:01:41,448 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 12:01:41,448 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_87b65545-3c72-4835-a4aa-bace229fd197/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe011_pso.opt.i [2019-12-07 12:01:41,484 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_87b65545-3c72-4835-a4aa-bace229fd197/bin/uautomizer/data/878f8d30f/607ef531250d450282fc6da243179ca3/FLAG3a0c32c36 [2019-12-07 12:01:41,951 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 12:01:41,952 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_87b65545-3c72-4835-a4aa-bace229fd197/sv-benchmarks/c/pthread-wmm/safe011_pso.opt.i [2019-12-07 12:01:41,963 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_87b65545-3c72-4835-a4aa-bace229fd197/bin/uautomizer/data/878f8d30f/607ef531250d450282fc6da243179ca3/FLAG3a0c32c36 [2019-12-07 12:01:41,972 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_87b65545-3c72-4835-a4aa-bace229fd197/bin/uautomizer/data/878f8d30f/607ef531250d450282fc6da243179ca3 [2019-12-07 12:01:41,974 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 12:01:41,975 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 12:01:41,976 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 12:01:41,976 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 12:01:41,978 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 12:01:41,979 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 12:01:41" (1/1) ... [2019-12-07 12:01:41,980 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@68daf569 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:01:41, skipping insertion in model container [2019-12-07 12:01:41,980 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 12:01:41" (1/1) ... [2019-12-07 12:01:41,985 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 12:01:42,013 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 12:01:42,261 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 12:01:42,270 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 12:01:42,328 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 12:01:42,377 INFO L208 MainTranslator]: Completed translation [2019-12-07 12:01:42,377 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:01:42 WrapperNode [2019-12-07 12:01:42,377 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 12:01:42,378 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 12:01:42,378 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 12:01:42,378 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 12:01:42,384 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:01:42" (1/1) ... [2019-12-07 12:01:42,402 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:01:42" (1/1) ... [2019-12-07 12:01:42,429 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 12:01:42,429 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 12:01:42,429 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 12:01:42,429 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 12:01:42,437 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:01:42" (1/1) ... [2019-12-07 12:01:42,437 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:01:42" (1/1) ... [2019-12-07 12:01:42,441 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:01:42" (1/1) ... [2019-12-07 12:01:42,441 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:01:42" (1/1) ... [2019-12-07 12:01:42,451 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:01:42" (1/1) ... [2019-12-07 12:01:42,455 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:01:42" (1/1) ... [2019-12-07 12:01:42,458 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:01:42" (1/1) ... [2019-12-07 12:01:42,461 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 12:01:42,461 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 12:01:42,461 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 12:01:42,461 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 12:01:42,462 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:01:42" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_87b65545-3c72-4835-a4aa-bace229fd197/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 12:01:42,500 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 12:01:42,500 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 12:01:42,500 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 12:01:42,501 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 12:01:42,501 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 12:01:42,501 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 12:01:42,501 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 12:01:42,501 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 12:01:42,501 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 12:01:42,501 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 12:01:42,501 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 12:01:42,501 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 12:01:42,501 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 12:01:42,502 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 12:01:42,860 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 12:01:42,861 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 12:01:42,861 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:01:42 BoogieIcfgContainer [2019-12-07 12:01:42,861 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 12:01:42,862 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 12:01:42,862 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 12:01:42,864 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 12:01:42,864 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 12:01:41" (1/3) ... [2019-12-07 12:01:42,865 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@232d5aee and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 12:01:42, skipping insertion in model container [2019-12-07 12:01:42,865 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:01:42" (2/3) ... [2019-12-07 12:01:42,865 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@232d5aee and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 12:01:42, skipping insertion in model container [2019-12-07 12:01:42,865 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:01:42" (3/3) ... [2019-12-07 12:01:42,866 INFO L109 eAbstractionObserver]: Analyzing ICFG safe011_pso.opt.i [2019-12-07 12:01:42,872 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 12:01:42,873 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 12:01:42,878 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 12:01:42,878 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 12:01:42,902 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,902 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,902 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,902 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,902 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,902 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,902 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,903 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,903 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,903 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,903 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,903 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,903 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,904 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,904 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,904 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,904 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,904 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,904 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,905 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,905 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,905 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,905 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,905 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,906 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,906 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,906 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,906 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,906 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,906 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,907 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,907 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,908 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,908 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,908 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,908 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,908 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,908 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,909 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,909 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,909 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,909 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,909 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,910 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,910 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,910 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,910 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,910 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,911 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,911 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,911 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,911 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,911 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,911 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,912 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,912 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,912 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,912 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,912 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,912 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,913 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,913 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,913 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,913 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,914 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,914 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,914 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,914 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,914 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,914 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,915 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,915 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,915 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,915 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,915 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,915 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,916 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,916 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,916 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,916 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,916 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,916 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,917 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,917 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,917 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,917 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,917 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,917 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,918 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,918 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,918 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,918 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,918 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,918 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:01:42,930 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 12:01:42,943 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 12:01:42,943 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 12:01:42,943 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 12:01:42,943 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 12:01:42,943 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 12:01:42,943 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 12:01:42,943 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 12:01:42,943 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 12:01:42,954 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 174 places, 211 transitions [2019-12-07 12:01:42,955 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 174 places, 211 transitions [2019-12-07 12:01:43,009 INFO L134 PetriNetUnfolder]: 47/208 cut-off events. [2019-12-07 12:01:43,009 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 12:01:43,020 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 208 events. 47/208 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 572 event pairs. 9/168 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 12:01:43,034 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 174 places, 211 transitions [2019-12-07 12:01:43,062 INFO L134 PetriNetUnfolder]: 47/208 cut-off events. [2019-12-07 12:01:43,062 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 12:01:43,067 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 208 events. 47/208 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 572 event pairs. 9/168 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 12:01:43,081 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 17074 [2019-12-07 12:01:43,082 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 12:01:45,816 WARN L192 SmtUtils]: Spent 133.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 85 [2019-12-07 12:01:45,910 INFO L206 etLargeBlockEncoding]: Checked pairs total: 87419 [2019-12-07 12:01:45,910 INFO L214 etLargeBlockEncoding]: Total number of compositions: 111 [2019-12-07 12:01:45,913 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 94 places, 106 transitions [2019-12-07 12:01:58,735 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 107408 states. [2019-12-07 12:01:58,737 INFO L276 IsEmpty]: Start isEmpty. Operand 107408 states. [2019-12-07 12:01:58,740 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-07 12:01:58,741 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:01:58,741 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-07 12:01:58,741 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:01:58,745 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:01:58,745 INFO L82 PathProgramCache]: Analyzing trace with hash 809706692, now seen corresponding path program 1 times [2019-12-07 12:01:58,751 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:01:58,751 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [692143188] [2019-12-07 12:01:58,751 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:01:58,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:01:58,888 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:01:58,889 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [692143188] [2019-12-07 12:01:58,889 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:01:58,890 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 12:01:58,890 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [165607783] [2019-12-07 12:01:58,893 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:01:58,893 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:01:58,902 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:01:58,903 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:01:58,904 INFO L87 Difference]: Start difference. First operand 107408 states. Second operand 3 states. [2019-12-07 12:01:59,643 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:01:59,643 INFO L93 Difference]: Finished difference Result 107108 states and 460900 transitions. [2019-12-07 12:01:59,644 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:01:59,645 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-07 12:01:59,645 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:02:00,186 INFO L225 Difference]: With dead ends: 107108 [2019-12-07 12:02:00,187 INFO L226 Difference]: Without dead ends: 104924 [2019-12-07 12:02:00,188 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:02:03,646 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104924 states. [2019-12-07 12:02:06,641 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104924 to 104924. [2019-12-07 12:02:06,642 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104924 states. [2019-12-07 12:02:06,947 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104924 states to 104924 states and 451982 transitions. [2019-12-07 12:02:06,948 INFO L78 Accepts]: Start accepts. Automaton has 104924 states and 451982 transitions. Word has length 5 [2019-12-07 12:02:06,948 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:02:06,949 INFO L462 AbstractCegarLoop]: Abstraction has 104924 states and 451982 transitions. [2019-12-07 12:02:06,949 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:02:06,949 INFO L276 IsEmpty]: Start isEmpty. Operand 104924 states and 451982 transitions. [2019-12-07 12:02:06,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 12:02:06,952 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:02:06,952 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:02:06,952 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:02:06,952 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:02:06,952 INFO L82 PathProgramCache]: Analyzing trace with hash 1056800905, now seen corresponding path program 1 times [2019-12-07 12:02:06,953 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:02:06,953 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1733110949] [2019-12-07 12:02:06,953 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:02:06,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:02:07,019 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:02:07,019 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1733110949] [2019-12-07 12:02:07,020 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:02:07,020 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:02:07,020 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1149000123] [2019-12-07 12:02:07,021 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:02:07,021 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:02:07,021 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:02:07,021 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:02:07,021 INFO L87 Difference]: Start difference. First operand 104924 states and 451982 transitions. Second operand 4 states. [2019-12-07 12:02:07,884 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:02:07,884 INFO L93 Difference]: Finished difference Result 168606 states and 697152 transitions. [2019-12-07 12:02:07,885 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:02:07,885 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 12:02:07,885 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:02:08,303 INFO L225 Difference]: With dead ends: 168606 [2019-12-07 12:02:08,303 INFO L226 Difference]: Without dead ends: 168557 [2019-12-07 12:02:08,303 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:02:12,910 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168557 states. [2019-12-07 12:02:15,042 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168557 to 152629. [2019-12-07 12:02:15,042 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152629 states. [2019-12-07 12:02:15,690 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152629 states to 152629 states and 638547 transitions. [2019-12-07 12:02:15,690 INFO L78 Accepts]: Start accepts. Automaton has 152629 states and 638547 transitions. Word has length 11 [2019-12-07 12:02:15,690 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:02:15,690 INFO L462 AbstractCegarLoop]: Abstraction has 152629 states and 638547 transitions. [2019-12-07 12:02:15,690 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:02:15,690 INFO L276 IsEmpty]: Start isEmpty. Operand 152629 states and 638547 transitions. [2019-12-07 12:02:15,694 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 12:02:15,694 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:02:15,694 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:02:15,695 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:02:15,695 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:02:15,695 INFO L82 PathProgramCache]: Analyzing trace with hash 933289536, now seen corresponding path program 1 times [2019-12-07 12:02:15,695 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:02:15,695 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1155939252] [2019-12-07 12:02:15,695 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:02:15,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:02:15,738 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:02:15,739 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1155939252] [2019-12-07 12:02:15,739 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:02:15,739 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:02:15,739 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1938624405] [2019-12-07 12:02:15,739 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:02:15,739 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:02:15,739 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:02:15,740 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:02:15,740 INFO L87 Difference]: Start difference. First operand 152629 states and 638547 transitions. Second operand 4 states. [2019-12-07 12:02:16,837 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:02:16,837 INFO L93 Difference]: Finished difference Result 217678 states and 889823 transitions. [2019-12-07 12:02:16,838 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:02:16,838 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 12:02:16,838 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:02:17,408 INFO L225 Difference]: With dead ends: 217678 [2019-12-07 12:02:17,408 INFO L226 Difference]: Without dead ends: 217615 [2019-12-07 12:02:17,408 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:02:24,735 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 217615 states. [2019-12-07 12:02:27,204 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 217615 to 183279. [2019-12-07 12:02:27,204 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183279 states. [2019-12-07 12:02:27,739 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183279 states to 183279 states and 761454 transitions. [2019-12-07 12:02:27,740 INFO L78 Accepts]: Start accepts. Automaton has 183279 states and 761454 transitions. Word has length 13 [2019-12-07 12:02:27,740 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:02:27,740 INFO L462 AbstractCegarLoop]: Abstraction has 183279 states and 761454 transitions. [2019-12-07 12:02:27,740 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:02:27,741 INFO L276 IsEmpty]: Start isEmpty. Operand 183279 states and 761454 transitions. [2019-12-07 12:02:27,742 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 12:02:27,743 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:02:27,743 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:02:27,743 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:02:27,743 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:02:27,743 INFO L82 PathProgramCache]: Analyzing trace with hash -1797085387, now seen corresponding path program 1 times [2019-12-07 12:02:27,743 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:02:27,743 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1568321971] [2019-12-07 12:02:27,744 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:02:27,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:02:27,784 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:02:27,784 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1568321971] [2019-12-07 12:02:27,784 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:02:27,784 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:02:27,784 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1489947795] [2019-12-07 12:02:27,785 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:02:27,785 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:02:27,785 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:02:27,785 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:02:27,785 INFO L87 Difference]: Start difference. First operand 183279 states and 761454 transitions. Second operand 4 states. [2019-12-07 12:02:29,319 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:02:29,319 INFO L93 Difference]: Finished difference Result 228772 states and 941089 transitions. [2019-12-07 12:02:29,319 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:02:29,319 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 12:02:29,320 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:02:29,887 INFO L225 Difference]: With dead ends: 228772 [2019-12-07 12:02:29,887 INFO L226 Difference]: Without dead ends: 228772 [2019-12-07 12:02:29,887 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:02:35,023 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 228772 states. [2019-12-07 12:02:40,170 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 228772 to 193424. [2019-12-07 12:02:40,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 193424 states. [2019-12-07 12:02:40,935 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193424 states to 193424 states and 803706 transitions. [2019-12-07 12:02:40,935 INFO L78 Accepts]: Start accepts. Automaton has 193424 states and 803706 transitions. Word has length 13 [2019-12-07 12:02:40,935 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:02:40,935 INFO L462 AbstractCegarLoop]: Abstraction has 193424 states and 803706 transitions. [2019-12-07 12:02:40,935 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:02:40,935 INFO L276 IsEmpty]: Start isEmpty. Operand 193424 states and 803706 transitions. [2019-12-07 12:02:40,948 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 12:02:40,948 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:02:40,949 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:02:40,949 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:02:40,949 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:02:40,949 INFO L82 PathProgramCache]: Analyzing trace with hash 1117796869, now seen corresponding path program 1 times [2019-12-07 12:02:40,949 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:02:40,949 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [933022577] [2019-12-07 12:02:40,949 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:02:40,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:02:41,004 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:02:41,004 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [933022577] [2019-12-07 12:02:41,005 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:02:41,005 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:02:41,005 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [16353922] [2019-12-07 12:02:41,005 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:02:41,005 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:02:41,005 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:02:41,005 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:02:41,005 INFO L87 Difference]: Start difference. First operand 193424 states and 803706 transitions. Second operand 5 states. [2019-12-07 12:02:42,632 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:02:42,632 INFO L93 Difference]: Finished difference Result 284752 states and 1156454 transitions. [2019-12-07 12:02:42,633 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 12:02:42,633 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 12:02:42,633 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:02:43,333 INFO L225 Difference]: With dead ends: 284752 [2019-12-07 12:02:43,333 INFO L226 Difference]: Without dead ends: 284612 [2019-12-07 12:02:43,334 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 12:02:52,507 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 284612 states. [2019-12-07 12:02:55,457 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 284612 to 212401. [2019-12-07 12:02:55,457 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 212401 states. [2019-12-07 12:02:56,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 212401 states to 212401 states and 878348 transitions. [2019-12-07 12:02:56,361 INFO L78 Accepts]: Start accepts. Automaton has 212401 states and 878348 transitions. Word has length 19 [2019-12-07 12:02:56,362 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:02:56,362 INFO L462 AbstractCegarLoop]: Abstraction has 212401 states and 878348 transitions. [2019-12-07 12:02:56,362 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:02:56,362 INFO L276 IsEmpty]: Start isEmpty. Operand 212401 states and 878348 transitions. [2019-12-07 12:02:56,372 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 12:02:56,373 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:02:56,373 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:02:56,373 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:02:56,373 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:02:56,373 INFO L82 PathProgramCache]: Analyzing trace with hash 658145402, now seen corresponding path program 1 times [2019-12-07 12:02:56,373 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:02:56,373 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [99389325] [2019-12-07 12:02:56,373 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:02:56,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:02:56,406 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:02:56,407 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [99389325] [2019-12-07 12:02:56,407 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:02:56,407 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:02:56,407 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [310809134] [2019-12-07 12:02:56,407 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:02:56,408 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:02:56,408 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:02:56,408 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:02:56,408 INFO L87 Difference]: Start difference. First operand 212401 states and 878348 transitions. Second operand 3 states. [2019-12-07 12:02:56,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:02:56,517 INFO L93 Difference]: Finished difference Result 37328 states and 121606 transitions. [2019-12-07 12:02:56,517 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:02:56,517 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 12:02:56,517 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:02:56,572 INFO L225 Difference]: With dead ends: 37328 [2019-12-07 12:02:56,573 INFO L226 Difference]: Without dead ends: 37328 [2019-12-07 12:02:56,573 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:02:56,760 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37328 states. [2019-12-07 12:02:57,098 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37328 to 37328. [2019-12-07 12:02:57,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37328 states. [2019-12-07 12:02:57,161 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37328 states to 37328 states and 121606 transitions. [2019-12-07 12:02:57,161 INFO L78 Accepts]: Start accepts. Automaton has 37328 states and 121606 transitions. Word has length 19 [2019-12-07 12:02:57,162 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:02:57,162 INFO L462 AbstractCegarLoop]: Abstraction has 37328 states and 121606 transitions. [2019-12-07 12:02:57,162 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:02:57,162 INFO L276 IsEmpty]: Start isEmpty. Operand 37328 states and 121606 transitions. [2019-12-07 12:02:57,167 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 12:02:57,167 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:02:57,167 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:02:57,167 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:02:57,167 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:02:57,168 INFO L82 PathProgramCache]: Analyzing trace with hash 7812214, now seen corresponding path program 1 times [2019-12-07 12:02:57,168 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:02:57,168 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1983704457] [2019-12-07 12:02:57,168 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:02:57,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:02:57,213 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:02:57,213 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1983704457] [2019-12-07 12:02:57,213 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:02:57,213 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:02:57,213 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [888587700] [2019-12-07 12:02:57,214 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:02:57,214 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:02:57,214 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:02:57,214 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:02:57,214 INFO L87 Difference]: Start difference. First operand 37328 states and 121606 transitions. Second operand 5 states. [2019-12-07 12:02:57,549 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:02:57,549 INFO L93 Difference]: Finished difference Result 51416 states and 164048 transitions. [2019-12-07 12:02:57,549 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 12:02:57,549 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 12:02:57,550 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:02:57,625 INFO L225 Difference]: With dead ends: 51416 [2019-12-07 12:02:57,625 INFO L226 Difference]: Without dead ends: 51416 [2019-12-07 12:02:57,625 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:02:57,847 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51416 states. [2019-12-07 12:02:58,678 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51416 to 41234. [2019-12-07 12:02:58,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41234 states. [2019-12-07 12:02:58,741 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41234 states to 41234 states and 133454 transitions. [2019-12-07 12:02:58,741 INFO L78 Accepts]: Start accepts. Automaton has 41234 states and 133454 transitions. Word has length 25 [2019-12-07 12:02:58,742 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:02:58,742 INFO L462 AbstractCegarLoop]: Abstraction has 41234 states and 133454 transitions. [2019-12-07 12:02:58,742 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:02:58,742 INFO L276 IsEmpty]: Start isEmpty. Operand 41234 states and 133454 transitions. [2019-12-07 12:02:58,748 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 12:02:58,748 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:02:58,748 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:02:58,748 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:02:58,748 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:02:58,748 INFO L82 PathProgramCache]: Analyzing trace with hash -782102681, now seen corresponding path program 1 times [2019-12-07 12:02:58,748 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:02:58,748 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [931485982] [2019-12-07 12:02:58,748 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:02:58,761 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:02:58,797 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:02:58,797 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [931485982] [2019-12-07 12:02:58,797 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:02:58,797 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:02:58,797 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1346577529] [2019-12-07 12:02:58,797 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:02:58,798 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:02:58,798 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:02:58,798 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:02:58,798 INFO L87 Difference]: Start difference. First operand 41234 states and 133454 transitions. Second operand 5 states. [2019-12-07 12:02:59,150 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:02:59,151 INFO L93 Difference]: Finished difference Result 55154 states and 175550 transitions. [2019-12-07 12:02:59,151 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 12:02:59,151 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 12:02:59,151 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:02:59,230 INFO L225 Difference]: With dead ends: 55154 [2019-12-07 12:02:59,231 INFO L226 Difference]: Without dead ends: 55154 [2019-12-07 12:02:59,231 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:02:59,462 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55154 states. [2019-12-07 12:02:59,919 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55154 to 43275. [2019-12-07 12:02:59,920 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43275 states. [2019-12-07 12:02:59,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43275 states to 43275 states and 139859 transitions. [2019-12-07 12:02:59,991 INFO L78 Accepts]: Start accepts. Automaton has 43275 states and 139859 transitions. Word has length 25 [2019-12-07 12:02:59,992 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:02:59,992 INFO L462 AbstractCegarLoop]: Abstraction has 43275 states and 139859 transitions. [2019-12-07 12:02:59,992 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:02:59,992 INFO L276 IsEmpty]: Start isEmpty. Operand 43275 states and 139859 transitions. [2019-12-07 12:03:00,003 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 12:03:00,004 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:03:00,004 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:03:00,004 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:03:00,004 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:03:00,004 INFO L82 PathProgramCache]: Analyzing trace with hash -310678356, now seen corresponding path program 1 times [2019-12-07 12:03:00,004 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:03:00,004 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [347148935] [2019-12-07 12:03:00,004 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:03:00,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:03:00,053 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:03:00,053 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [347148935] [2019-12-07 12:03:00,054 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:03:00,054 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:03:00,054 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [730503401] [2019-12-07 12:03:00,054 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 12:03:00,054 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:03:00,055 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 12:03:00,055 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:03:00,055 INFO L87 Difference]: Start difference. First operand 43275 states and 139859 transitions. Second operand 6 states. [2019-12-07 12:03:00,747 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:03:00,747 INFO L93 Difference]: Finished difference Result 54041 states and 172398 transitions. [2019-12-07 12:03:00,748 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 12:03:00,748 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 31 [2019-12-07 12:03:00,748 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:03:00,826 INFO L225 Difference]: With dead ends: 54041 [2019-12-07 12:03:00,827 INFO L226 Difference]: Without dead ends: 54028 [2019-12-07 12:03:00,827 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=57, Invalid=153, Unknown=0, NotChecked=0, Total=210 [2019-12-07 12:03:01,055 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54028 states. [2019-12-07 12:03:01,582 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54028 to 39992. [2019-12-07 12:03:01,582 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39992 states. [2019-12-07 12:03:01,645 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39992 states to 39992 states and 129830 transitions. [2019-12-07 12:03:01,645 INFO L78 Accepts]: Start accepts. Automaton has 39992 states and 129830 transitions. Word has length 31 [2019-12-07 12:03:01,645 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:03:01,645 INFO L462 AbstractCegarLoop]: Abstraction has 39992 states and 129830 transitions. [2019-12-07 12:03:01,645 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 12:03:01,645 INFO L276 IsEmpty]: Start isEmpty. Operand 39992 states and 129830 transitions. [2019-12-07 12:03:01,668 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 12:03:01,668 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:03:01,668 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:03:01,668 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:03:01,668 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:03:01,668 INFO L82 PathProgramCache]: Analyzing trace with hash -1797088220, now seen corresponding path program 1 times [2019-12-07 12:03:01,668 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:03:01,668 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1977708344] [2019-12-07 12:03:01,668 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:03:01,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:03:01,699 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:03:01,699 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1977708344] [2019-12-07 12:03:01,699 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:03:01,699 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:03:01,699 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [246179873] [2019-12-07 12:03:01,700 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:03:01,700 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:03:01,700 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:03:01,700 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:03:01,700 INFO L87 Difference]: Start difference. First operand 39992 states and 129830 transitions. Second operand 3 states. [2019-12-07 12:03:01,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:03:01,845 INFO L93 Difference]: Finished difference Result 46835 states and 152675 transitions. [2019-12-07 12:03:01,845 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:03:01,845 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 39 [2019-12-07 12:03:01,845 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:03:01,909 INFO L225 Difference]: With dead ends: 46835 [2019-12-07 12:03:01,909 INFO L226 Difference]: Without dead ends: 46835 [2019-12-07 12:03:01,909 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:03:02,117 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46835 states. [2019-12-07 12:03:02,551 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46835 to 44393. [2019-12-07 12:03:02,552 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44393 states. [2019-12-07 12:03:02,626 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44393 states to 44393 states and 145223 transitions. [2019-12-07 12:03:02,626 INFO L78 Accepts]: Start accepts. Automaton has 44393 states and 145223 transitions. Word has length 39 [2019-12-07 12:03:02,626 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:03:02,626 INFO L462 AbstractCegarLoop]: Abstraction has 44393 states and 145223 transitions. [2019-12-07 12:03:02,627 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:03:02,627 INFO L276 IsEmpty]: Start isEmpty. Operand 44393 states and 145223 transitions. [2019-12-07 12:03:02,648 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 12:03:02,648 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:03:02,648 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:03:02,648 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:03:02,648 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:03:02,649 INFO L82 PathProgramCache]: Analyzing trace with hash -1663208923, now seen corresponding path program 1 times [2019-12-07 12:03:02,649 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:03:02,649 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1834684748] [2019-12-07 12:03:02,649 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:03:02,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:03:02,690 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:03:02,690 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1834684748] [2019-12-07 12:03:02,690 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:03:02,690 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:03:02,691 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1120925190] [2019-12-07 12:03:02,691 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:03:02,691 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:03:02,691 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:03:02,691 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:03:02,691 INFO L87 Difference]: Start difference. First operand 44393 states and 145223 transitions. Second operand 4 states. [2019-12-07 12:03:02,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:03:02,715 INFO L93 Difference]: Finished difference Result 7906 states and 21265 transitions. [2019-12-07 12:03:02,715 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 12:03:02,716 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 39 [2019-12-07 12:03:02,716 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:03:02,722 INFO L225 Difference]: With dead ends: 7906 [2019-12-07 12:03:02,722 INFO L226 Difference]: Without dead ends: 7906 [2019-12-07 12:03:02,722 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:03:02,746 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7906 states. [2019-12-07 12:03:02,798 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7906 to 7794. [2019-12-07 12:03:02,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7794 states. [2019-12-07 12:03:02,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7794 states to 7794 states and 20945 transitions. [2019-12-07 12:03:02,807 INFO L78 Accepts]: Start accepts. Automaton has 7794 states and 20945 transitions. Word has length 39 [2019-12-07 12:03:02,807 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:03:02,807 INFO L462 AbstractCegarLoop]: Abstraction has 7794 states and 20945 transitions. [2019-12-07 12:03:02,807 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:03:02,807 INFO L276 IsEmpty]: Start isEmpty. Operand 7794 states and 20945 transitions. [2019-12-07 12:03:02,812 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-12-07 12:03:02,812 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:03:02,812 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:03:02,813 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:03:02,813 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:03:02,813 INFO L82 PathProgramCache]: Analyzing trace with hash 995119447, now seen corresponding path program 1 times [2019-12-07 12:03:02,813 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:03:02,813 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2074053978] [2019-12-07 12:03:02,813 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:03:02,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:03:02,858 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:03:02,858 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2074053978] [2019-12-07 12:03:02,858 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:03:02,858 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:03:02,858 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [322974217] [2019-12-07 12:03:02,859 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:03:02,859 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:03:02,859 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:03:02,859 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:03:02,859 INFO L87 Difference]: Start difference. First operand 7794 states and 20945 transitions. Second operand 5 states. [2019-12-07 12:03:02,884 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:03:02,884 INFO L93 Difference]: Finished difference Result 5050 states and 14454 transitions. [2019-12-07 12:03:02,884 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:03:02,884 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 51 [2019-12-07 12:03:02,885 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:03:02,889 INFO L225 Difference]: With dead ends: 5050 [2019-12-07 12:03:02,889 INFO L226 Difference]: Without dead ends: 5050 [2019-12-07 12:03:02,889 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:03:02,910 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5050 states. [2019-12-07 12:03:02,944 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5050 to 4686. [2019-12-07 12:03:02,945 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4686 states. [2019-12-07 12:03:02,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4686 states to 4686 states and 13470 transitions. [2019-12-07 12:03:02,950 INFO L78 Accepts]: Start accepts. Automaton has 4686 states and 13470 transitions. Word has length 51 [2019-12-07 12:03:02,950 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:03:02,950 INFO L462 AbstractCegarLoop]: Abstraction has 4686 states and 13470 transitions. [2019-12-07 12:03:02,951 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:03:02,951 INFO L276 IsEmpty]: Start isEmpty. Operand 4686 states and 13470 transitions. [2019-12-07 12:03:02,954 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 12:03:02,954 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:03:02,954 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:03:02,954 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:03:02,954 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:03:02,954 INFO L82 PathProgramCache]: Analyzing trace with hash -151073877, now seen corresponding path program 1 times [2019-12-07 12:03:02,954 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:03:02,954 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1461869995] [2019-12-07 12:03:02,955 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:03:02,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:03:02,988 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:03:02,988 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1461869995] [2019-12-07 12:03:02,989 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:03:02,989 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:03:02,989 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1740442386] [2019-12-07 12:03:02,989 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:03:02,989 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:03:02,989 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:03:02,989 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:03:02,989 INFO L87 Difference]: Start difference. First operand 4686 states and 13470 transitions. Second operand 3 states. [2019-12-07 12:03:03,023 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:03:03,023 INFO L93 Difference]: Finished difference Result 4690 states and 13463 transitions. [2019-12-07 12:03:03,023 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:03:03,023 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 12:03:03,024 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:03:03,028 INFO L225 Difference]: With dead ends: 4690 [2019-12-07 12:03:03,028 INFO L226 Difference]: Without dead ends: 4690 [2019-12-07 12:03:03,028 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:03:03,048 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4690 states. [2019-12-07 12:03:03,085 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4690 to 4682. [2019-12-07 12:03:03,085 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4682 states. [2019-12-07 12:03:03,090 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4682 states to 4682 states and 13455 transitions. [2019-12-07 12:03:03,091 INFO L78 Accepts]: Start accepts. Automaton has 4682 states and 13455 transitions. Word has length 65 [2019-12-07 12:03:03,091 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:03:03,091 INFO L462 AbstractCegarLoop]: Abstraction has 4682 states and 13455 transitions. [2019-12-07 12:03:03,091 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:03:03,091 INFO L276 IsEmpty]: Start isEmpty. Operand 4682 states and 13455 transitions. [2019-12-07 12:03:03,094 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 12:03:03,094 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:03:03,095 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:03:03,095 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:03:03,095 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:03:03,095 INFO L82 PathProgramCache]: Analyzing trace with hash -160756913, now seen corresponding path program 1 times [2019-12-07 12:03:03,095 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:03:03,095 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [281325831] [2019-12-07 12:03:03,095 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:03:03,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:03:03,168 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:03:03,169 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [281325831] [2019-12-07 12:03:03,169 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:03:03,169 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 12:03:03,169 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1782248618] [2019-12-07 12:03:03,169 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:03:03,169 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:03:03,170 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:03:03,170 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:03:03,170 INFO L87 Difference]: Start difference. First operand 4682 states and 13455 transitions. Second operand 5 states. [2019-12-07 12:03:03,355 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:03:03,355 INFO L93 Difference]: Finished difference Result 7088 states and 20210 transitions. [2019-12-07 12:03:03,355 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 12:03:03,355 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 65 [2019-12-07 12:03:03,356 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:03:03,362 INFO L225 Difference]: With dead ends: 7088 [2019-12-07 12:03:03,362 INFO L226 Difference]: Without dead ends: 7088 [2019-12-07 12:03:03,362 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:03:03,386 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7088 states. [2019-12-07 12:03:03,440 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7088 to 6274. [2019-12-07 12:03:03,440 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6274 states. [2019-12-07 12:03:03,447 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6274 states to 6274 states and 17966 transitions. [2019-12-07 12:03:03,448 INFO L78 Accepts]: Start accepts. Automaton has 6274 states and 17966 transitions. Word has length 65 [2019-12-07 12:03:03,448 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:03:03,448 INFO L462 AbstractCegarLoop]: Abstraction has 6274 states and 17966 transitions. [2019-12-07 12:03:03,448 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:03:03,448 INFO L276 IsEmpty]: Start isEmpty. Operand 6274 states and 17966 transitions. [2019-12-07 12:03:03,453 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 12:03:03,453 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:03:03,453 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:03:03,453 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:03:03,453 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:03:03,453 INFO L82 PathProgramCache]: Analyzing trace with hash 947021199, now seen corresponding path program 2 times [2019-12-07 12:03:03,453 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:03:03,453 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1347320607] [2019-12-07 12:03:03,453 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:03:03,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:03:03,518 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:03:03,518 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1347320607] [2019-12-07 12:03:03,518 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:03:03,518 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 12:03:03,518 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [580489449] [2019-12-07 12:03:03,519 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 12:03:03,519 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:03:03,519 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 12:03:03,519 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:03:03,519 INFO L87 Difference]: Start difference. First operand 6274 states and 17966 transitions. Second operand 6 states. [2019-12-07 12:03:03,843 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:03:03,844 INFO L93 Difference]: Finished difference Result 10388 states and 29637 transitions. [2019-12-07 12:03:03,844 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 12:03:03,844 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 65 [2019-12-07 12:03:03,844 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:03:03,853 INFO L225 Difference]: With dead ends: 10388 [2019-12-07 12:03:03,853 INFO L226 Difference]: Without dead ends: 10388 [2019-12-07 12:03:03,853 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 12:03:03,884 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10388 states. [2019-12-07 12:03:03,964 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10388 to 7007. [2019-12-07 12:03:03,964 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7007 states. [2019-12-07 12:03:03,972 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7007 states to 7007 states and 20125 transitions. [2019-12-07 12:03:03,973 INFO L78 Accepts]: Start accepts. Automaton has 7007 states and 20125 transitions. Word has length 65 [2019-12-07 12:03:03,973 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:03:03,973 INFO L462 AbstractCegarLoop]: Abstraction has 7007 states and 20125 transitions. [2019-12-07 12:03:03,973 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 12:03:03,973 INFO L276 IsEmpty]: Start isEmpty. Operand 7007 states and 20125 transitions. [2019-12-07 12:03:03,978 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 12:03:03,978 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:03:03,978 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:03:03,978 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:03:03,979 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:03:03,979 INFO L82 PathProgramCache]: Analyzing trace with hash 493762319, now seen corresponding path program 3 times [2019-12-07 12:03:03,979 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:03:03,979 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [638641578] [2019-12-07 12:03:03,979 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:03:03,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:03:04,030 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:03:04,031 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [638641578] [2019-12-07 12:03:04,031 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:03:04,031 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:03:04,031 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [849129413] [2019-12-07 12:03:04,031 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:03:04,031 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:03:04,031 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:03:04,032 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:03:04,032 INFO L87 Difference]: Start difference. First operand 7007 states and 20125 transitions. Second operand 3 states. [2019-12-07 12:03:04,071 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:03:04,071 INFO L93 Difference]: Finished difference Result 7007 states and 20124 transitions. [2019-12-07 12:03:04,072 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:03:04,072 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 12:03:04,072 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:03:04,078 INFO L225 Difference]: With dead ends: 7007 [2019-12-07 12:03:04,078 INFO L226 Difference]: Without dead ends: 7007 [2019-12-07 12:03:04,079 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:03:04,103 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7007 states. [2019-12-07 12:03:04,153 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7007 to 5762. [2019-12-07 12:03:04,153 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5762 states. [2019-12-07 12:03:04,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5762 states to 5762 states and 16680 transitions. [2019-12-07 12:03:04,160 INFO L78 Accepts]: Start accepts. Automaton has 5762 states and 16680 transitions. Word has length 65 [2019-12-07 12:03:04,160 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:03:04,160 INFO L462 AbstractCegarLoop]: Abstraction has 5762 states and 16680 transitions. [2019-12-07 12:03:04,160 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:03:04,160 INFO L276 IsEmpty]: Start isEmpty. Operand 5762 states and 16680 transitions. [2019-12-07 12:03:04,164 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 12:03:04,164 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:03:04,165 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:03:04,165 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:03:04,165 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:03:04,165 INFO L82 PathProgramCache]: Analyzing trace with hash 1182372639, now seen corresponding path program 1 times [2019-12-07 12:03:04,165 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:03:04,165 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [643133052] [2019-12-07 12:03:04,165 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:03:04,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:03:04,234 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:03:04,234 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [643133052] [2019-12-07 12:03:04,234 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:03:04,234 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 12:03:04,235 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1463610099] [2019-12-07 12:03:04,235 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 12:03:04,235 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:03:04,235 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 12:03:04,235 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:03:04,235 INFO L87 Difference]: Start difference. First operand 5762 states and 16680 transitions. Second operand 6 states. [2019-12-07 12:03:04,311 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:03:04,311 INFO L93 Difference]: Finished difference Result 10964 states and 32012 transitions. [2019-12-07 12:03:04,311 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 12:03:04,311 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 66 [2019-12-07 12:03:04,311 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:03:04,316 INFO L225 Difference]: With dead ends: 10964 [2019-12-07 12:03:04,316 INFO L226 Difference]: Without dead ends: 5617 [2019-12-07 12:03:04,317 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-12-07 12:03:04,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5617 states. [2019-12-07 12:03:04,372 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5617 to 4610. [2019-12-07 12:03:04,372 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4610 states. [2019-12-07 12:03:04,377 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4610 states to 4610 states and 13302 transitions. [2019-12-07 12:03:04,377 INFO L78 Accepts]: Start accepts. Automaton has 4610 states and 13302 transitions. Word has length 66 [2019-12-07 12:03:04,378 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:03:04,378 INFO L462 AbstractCegarLoop]: Abstraction has 4610 states and 13302 transitions. [2019-12-07 12:03:04,378 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 12:03:04,378 INFO L276 IsEmpty]: Start isEmpty. Operand 4610 states and 13302 transitions. [2019-12-07 12:03:04,381 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 12:03:04,381 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:03:04,381 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:03:04,381 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:03:04,381 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:03:04,382 INFO L82 PathProgramCache]: Analyzing trace with hash -488816463, now seen corresponding path program 2 times [2019-12-07 12:03:04,382 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:03:04,382 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [297788822] [2019-12-07 12:03:04,382 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:03:04,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:03:04,413 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:03:04,413 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [297788822] [2019-12-07 12:03:04,413 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:03:04,413 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:03:04,414 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1201088948] [2019-12-07 12:03:04,414 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:03:04,414 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:03:04,414 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:03:04,414 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:03:04,414 INFO L87 Difference]: Start difference. First operand 4610 states and 13302 transitions. Second operand 3 states. [2019-12-07 12:03:04,430 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:03:04,430 INFO L93 Difference]: Finished difference Result 4040 states and 11365 transitions. [2019-12-07 12:03:04,430 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:03:04,431 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 12:03:04,431 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:03:04,434 INFO L225 Difference]: With dead ends: 4040 [2019-12-07 12:03:04,434 INFO L226 Difference]: Without dead ends: 4040 [2019-12-07 12:03:04,435 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:03:04,452 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4040 states. [2019-12-07 12:03:04,480 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4040 to 3925. [2019-12-07 12:03:04,480 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3925 states. [2019-12-07 12:03:04,485 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3925 states to 3925 states and 11042 transitions. [2019-12-07 12:03:04,485 INFO L78 Accepts]: Start accepts. Automaton has 3925 states and 11042 transitions. Word has length 66 [2019-12-07 12:03:04,485 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:03:04,485 INFO L462 AbstractCegarLoop]: Abstraction has 3925 states and 11042 transitions. [2019-12-07 12:03:04,485 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:03:04,485 INFO L276 IsEmpty]: Start isEmpty. Operand 3925 states and 11042 transitions. [2019-12-07 12:03:04,488 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 12:03:04,488 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:03:04,488 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:03:04,488 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:03:04,488 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:03:04,488 INFO L82 PathProgramCache]: Analyzing trace with hash 286457063, now seen corresponding path program 1 times [2019-12-07 12:03:04,488 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:03:04,489 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1440004269] [2019-12-07 12:03:04,489 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:03:04,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:03:04,520 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:03:04,520 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1440004269] [2019-12-07 12:03:04,521 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:03:04,521 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:03:04,521 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [475275419] [2019-12-07 12:03:04,521 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:03:04,521 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:03:04,521 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:03:04,521 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:03:04,521 INFO L87 Difference]: Start difference. First operand 3925 states and 11042 transitions. Second operand 3 states. [2019-12-07 12:03:04,537 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:03:04,537 INFO L93 Difference]: Finished difference Result 3925 states and 10847 transitions. [2019-12-07 12:03:04,537 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:03:04,537 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-12-07 12:03:04,537 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:03:04,541 INFO L225 Difference]: With dead ends: 3925 [2019-12-07 12:03:04,541 INFO L226 Difference]: Without dead ends: 3925 [2019-12-07 12:03:04,541 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:03:04,558 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3925 states. [2019-12-07 12:03:04,585 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3925 to 3650. [2019-12-07 12:03:04,586 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3650 states. [2019-12-07 12:03:04,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3650 states to 3650 states and 10098 transitions. [2019-12-07 12:03:04,590 INFO L78 Accepts]: Start accepts. Automaton has 3650 states and 10098 transitions. Word has length 67 [2019-12-07 12:03:04,590 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:03:04,590 INFO L462 AbstractCegarLoop]: Abstraction has 3650 states and 10098 transitions. [2019-12-07 12:03:04,590 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:03:04,590 INFO L276 IsEmpty]: Start isEmpty. Operand 3650 states and 10098 transitions. [2019-12-07 12:03:04,593 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 12:03:04,593 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:03:04,593 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:03:04,594 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:03:04,594 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:03:04,594 INFO L82 PathProgramCache]: Analyzing trace with hash -923654555, now seen corresponding path program 1 times [2019-12-07 12:03:04,594 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:03:04,594 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [275257470] [2019-12-07 12:03:04,594 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:03:04,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:03:04,676 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:03:04,676 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [275257470] [2019-12-07 12:03:04,676 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:03:04,676 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 12:03:04,676 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1033999177] [2019-12-07 12:03:04,677 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 12:03:04,677 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:03:04,677 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 12:03:04,677 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:03:04,677 INFO L87 Difference]: Start difference. First operand 3650 states and 10098 transitions. Second operand 7 states. [2019-12-07 12:03:04,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:03:04,739 INFO L93 Difference]: Finished difference Result 5803 states and 16157 transitions. [2019-12-07 12:03:04,739 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 12:03:04,739 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 68 [2019-12-07 12:03:04,739 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:03:04,741 INFO L225 Difference]: With dead ends: 5803 [2019-12-07 12:03:04,741 INFO L226 Difference]: Without dead ends: 2197 [2019-12-07 12:03:04,741 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=61, Unknown=0, NotChecked=0, Total=90 [2019-12-07 12:03:04,754 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2197 states. [2019-12-07 12:03:04,766 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2197 to 1804. [2019-12-07 12:03:04,766 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1804 states. [2019-12-07 12:03:04,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1804 states to 1804 states and 5006 transitions. [2019-12-07 12:03:04,768 INFO L78 Accepts]: Start accepts. Automaton has 1804 states and 5006 transitions. Word has length 68 [2019-12-07 12:03:04,769 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:03:04,769 INFO L462 AbstractCegarLoop]: Abstraction has 1804 states and 5006 transitions. [2019-12-07 12:03:04,769 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 12:03:04,769 INFO L276 IsEmpty]: Start isEmpty. Operand 1804 states and 5006 transitions. [2019-12-07 12:03:04,770 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 12:03:04,770 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:03:04,770 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:03:04,770 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:03:04,770 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:03:04,770 INFO L82 PathProgramCache]: Analyzing trace with hash -1093105687, now seen corresponding path program 2 times [2019-12-07 12:03:04,770 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:03:04,770 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [486884915] [2019-12-07 12:03:04,771 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:03:04,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:03:04,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:03:04,841 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:03:04,841 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 12:03:04,844 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] ULTIMATE.startENTRY-->L805: Formula: (let ((.cse0 (store |v_#valid_49| 0 0))) (and (= 0 v_~x$w_buff0_used~0_815) (= v_~x$r_buff0_thd1~0_121 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t2034~0.base_21|)) (= v_~x$flush_delayed~0_33 0) (= v_~y~0_122 0) (= 0 v_~x$r_buff0_thd3~0_131) (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t2034~0.base_21| 4)) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t2034~0.base_21|) (= 0 v_~x$r_buff1_thd3~0_199) (= v_~x$mem_tmp~0_19 0) (= 0 v_~x$r_buff1_thd2~0_200) (= v_~weak$$choice2~0_113 0) (= v_~z~0_31 0) (= v_~main$tmp_guard1~0_21 0) (= 0 v_~x$w_buff1~0_221) (= 0 v_~weak$$choice0~0_15) (= v_~main$tmp_guard0~0_23 0) (= 0 v_~x$read_delayed_var~0.base_7) (< 0 |v_#StackHeapBarrier_15|) (= v_~x$r_buff0_thd0~0_372 0) (= 0 v_~x~0_181) (= 0 |v_#NULL.base_4|) (= v_~__unbuffered_cnt~0_156 0) (= 0 v_~x$read_delayed~0_7) (= 0 v_~x$r_buff0_thd2~0_212) (= 0 v_~x$w_buff1_used~0_499) (= |v_#valid_47| (store .cse0 |v_ULTIMATE.start_main_~#t2034~0.base_21| 1)) (= |v_#NULL.offset_4| 0) (= v_~x$r_buff1_thd1~0_184 0) (= v_~x$r_buff1_thd0~0_296 0) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2034~0.base_21| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2034~0.base_21|) |v_ULTIMATE.start_main_~#t2034~0.offset_18| 0)) |v_#memory_int_15|) (= 0 v_~x$read_delayed_var~0.offset_7) (= 0 v_~__unbuffered_p2_EAX~0_22) (= 0 |v_ULTIMATE.start_main_~#t2034~0.offset_18|) (= 0 v_~x$w_buff0~0_269))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_49|, #memory_int=|v_#memory_int_16|, #length=|v_#length_20|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_22|, ~x$w_buff0~0=v_~x$w_buff0~0_269, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_28|, ~x$flush_delayed~0=v_~x$flush_delayed~0_33, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_40|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_30|, ULTIMATE.start_main_~#t2036~0.offset=|v_ULTIMATE.start_main_~#t2036~0.offset_17|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_30|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_46|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_184, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_131, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_51|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_37|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_46|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_33|, #length=|v_#length_19|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_22, ULTIMATE.start_main_~#t2035~0.base=|v_ULTIMATE.start_main_~#t2035~0.base_22|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_372, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_11|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_38|, ~x$w_buff1~0=v_~x$w_buff1~0_221, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_43|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_499, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_200, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_49|, ULTIMATE.start_main_~#t2034~0.offset=|v_ULTIMATE.start_main_~#t2034~0.offset_18|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_112|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ~weak$$choice0~0=v_~weak$$choice0~0_15, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_33|, ULTIMATE.start_main_~#t2034~0.base=|v_ULTIMATE.start_main_~#t2034~0.base_21|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_156, ~x~0=v_~x~0_181, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_121, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_22|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_34|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_32|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_30|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_199, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_21, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_118|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_18|, ~x$mem_tmp~0=v_~x$mem_tmp~0_19, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_26|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_51|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_32|, ~y~0=v_~y~0_122, ULTIMATE.start_main_~#t2035~0.offset=|v_ULTIMATE.start_main_~#t2035~0.offset_18|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_11|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_24|, ULTIMATE.start_main_~#t2036~0.base=|v_ULTIMATE.start_main_~#t2036~0.base_21|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_26|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_49|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_23, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_296, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_212, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_60|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_39|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_815, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_33|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_21|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_15|, ~z~0=v_~z~0_31, ~weak$$choice2~0=v_~weak$$choice2~0_113, ~x$read_delayed~0=v_~x$read_delayed~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_~#t2036~0.offset, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t2035~0.base, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_~#t2034~0.offset, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_~#t2034~0.base, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~nondet31, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite51, ~y~0, ULTIMATE.start_main_~#t2035~0.offset, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_~#t2036~0.base, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 12:03:04,844 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L805-1-->L807: Formula: (and (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2035~0.base_13| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2035~0.base_13|) |v_ULTIMATE.start_main_~#t2035~0.offset_11| 1)) |v_#memory_int_11|) (= |v_#valid_32| (store |v_#valid_33| |v_ULTIMATE.start_main_~#t2035~0.base_13| 1)) (not (= |v_ULTIMATE.start_main_~#t2035~0.base_13| 0)) (= 0 (select |v_#valid_33| |v_ULTIMATE.start_main_~#t2035~0.base_13|)) (= 0 |v_ULTIMATE.start_main_~#t2035~0.offset_11|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2035~0.base_13|) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t2035~0.base_13| 4) |v_#length_15|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_6|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t2035~0.offset=|v_ULTIMATE.start_main_~#t2035~0.offset_11|, ULTIMATE.start_main_~#t2035~0.base=|v_ULTIMATE.start_main_~#t2035~0.base_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet21, #valid, #memory_int, #length, ULTIMATE.start_main_~#t2035~0.offset, ULTIMATE.start_main_~#t2035~0.base] because there is no mapped edge [2019-12-07 12:03:04,845 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] P1ENTRY-->L4-3: Formula: (and (not (= 0 v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_11)) (= v_P1Thread1of1ForFork1_~arg.offset_9 |v_P1Thread1of1ForFork1_#in~arg.offset_11|) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_9| v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_11) (= 1 v_~x$w_buff0_used~0_98) (= v_P1Thread1of1ForFork1_~arg.base_9 |v_P1Thread1of1ForFork1_#in~arg.base_11|) (= v_~x$w_buff1_used~0_55 v_~x$w_buff0_used~0_99) (= 2 v_~x$w_buff0~0_30) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_9| (ite (not (and (not (= (mod v_~x$w_buff0_used~0_98 256) 0)) (not (= 0 (mod v_~x$w_buff1_used~0_55 256))))) 1 0)) (= v_~x$w_buff0~0_31 v_~x$w_buff1~0_21)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_31, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_11|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_11|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_99} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_11, ~x$w_buff0~0=v_~x$w_buff0~0_30, P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_9, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_9|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_9, ~x$w_buff1~0=v_~x$w_buff1~0_21, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_11|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_11|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_55, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_98} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$w_buff0~0, P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 12:03:04,845 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L807-1-->L809: Formula: (and (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t2036~0.base_9|) (= |v_ULTIMATE.start_main_~#t2036~0.offset_8| 0) (= (select |v_#valid_28| |v_ULTIMATE.start_main_~#t2036~0.base_9|) 0) (= (store |v_#valid_28| |v_ULTIMATE.start_main_~#t2036~0.base_9| 1) |v_#valid_27|) (not (= |v_ULTIMATE.start_main_~#t2036~0.base_9| 0)) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t2036~0.base_9| 4) |v_#length_13|) (= (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t2036~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t2036~0.base_9|) |v_ULTIMATE.start_main_~#t2036~0.offset_8| 2)) |v_#memory_int_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t2036~0.base=|v_ULTIMATE.start_main_~#t2036~0.base_9|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~#t2036~0.offset=|v_ULTIMATE.start_main_~#t2036~0.offset_8|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2036~0.base, ULTIMATE.start_main_#t~nondet22, #valid, #memory_int, ULTIMATE.start_main_~#t2036~0.offset, #length] because there is no mapped edge [2019-12-07 12:03:04,846 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L782-2-->L782-4: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd3~0_In-1360076320 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-1360076320 256)))) (or (and (not .cse0) (not .cse1) (= ~x$w_buff1~0_In-1360076320 |P2Thread1of1ForFork2_#t~ite15_Out-1360076320|)) (and (or .cse1 .cse0) (= ~x~0_In-1360076320 |P2Thread1of1ForFork2_#t~ite15_Out-1360076320|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1360076320, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1360076320, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1360076320, ~x~0=~x~0_In-1360076320} OutVars{P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out-1360076320|, ~x$w_buff1~0=~x$w_buff1~0_In-1360076320, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1360076320, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1360076320, ~x~0=~x~0_In-1360076320} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 12:03:04,846 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [695] [695] L782-4-->L783: Formula: (= |v_P2Thread1of1ForFork2_#t~ite15_6| v_~x~0_17) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_6|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_5|, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_5|, ~x~0=v_~x~0_17} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, P2Thread1of1ForFork2_#t~ite16, ~x~0] because there is no mapped edge [2019-12-07 12:03:04,846 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L783-->L783-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd3~0_In1257176016 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In1257176016 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite17_Out1257176016| 0) (not .cse1)) (and (= ~x$w_buff0_used~0_In1257176016 |P2Thread1of1ForFork2_#t~ite17_Out1257176016|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1257176016, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1257176016} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1257176016, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out1257176016|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1257176016} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 12:03:04,847 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L784-->L784-2: Formula: (let ((.cse2 (= (mod ~x$r_buff0_thd3~0_In-1079476413 256) 0)) (.cse3 (= (mod ~x$w_buff0_used~0_In-1079476413 256) 0)) (.cse0 (= (mod ~x$r_buff1_thd3~0_In-1079476413 256) 0)) (.cse1 (= (mod ~x$w_buff1_used~0_In-1079476413 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite18_Out-1079476413| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~x$w_buff1_used~0_In-1079476413 |P2Thread1of1ForFork2_#t~ite18_Out-1079476413|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1079476413, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1079476413, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1079476413, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1079476413} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-1079476413, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1079476413, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1079476413, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out-1079476413|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1079476413} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 12:03:04,847 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L785-->L785-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In1715476261 256))) (.cse0 (= (mod ~x$r_buff0_thd3~0_In1715476261 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork2_#t~ite19_Out1715476261|)) (and (or .cse1 .cse0) (= ~x$r_buff0_thd3~0_In1715476261 |P2Thread1of1ForFork2_#t~ite19_Out1715476261|)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1715476261, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1715476261} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1715476261, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out1715476261|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1715476261} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 12:03:04,847 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [769] [769] L786-->L786-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In1300560303 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In1300560303 256))) (.cse3 (= (mod ~x$w_buff0_used~0_In1300560303 256) 0)) (.cse2 (= 0 (mod ~x$r_buff0_thd3~0_In1300560303 256)))) (or (and (or .cse0 .cse1) (= ~x$r_buff1_thd3~0_In1300560303 |P2Thread1of1ForFork2_#t~ite20_Out1300560303|) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork2_#t~ite20_Out1300560303|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1300560303, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1300560303, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1300560303, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1300560303} OutVars{P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out1300560303|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1300560303, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1300560303, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1300560303, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1300560303} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 12:03:04,848 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [804] [804] L786-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_75 1) v_~__unbuffered_cnt~0_74) (= |v_P2Thread1of1ForFork2_#t~ite20_54| v_~x$r_buff1_thd3~0_147)) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_54|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_75} OutVars{P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_53|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_147, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_74, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, ~x$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 12:03:04,848 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L733-2-->L733-5: Formula: (let ((.cse0 (= |P0Thread1of1ForFork0_#t~ite4_Out809263801| |P0Thread1of1ForFork0_#t~ite3_Out809263801|)) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In809263801 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd1~0_In809263801 256)))) (or (and .cse0 (not .cse1) (not .cse2) (= ~x$w_buff1~0_In809263801 |P0Thread1of1ForFork0_#t~ite3_Out809263801|)) (and .cse0 (= |P0Thread1of1ForFork0_#t~ite3_Out809263801| ~x~0_In809263801) (or .cse2 .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In809263801, ~x$w_buff1_used~0=~x$w_buff1_used~0_In809263801, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In809263801, ~x~0=~x~0_In809263801} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out809263801|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out809263801|, ~x$w_buff1~0=~x$w_buff1~0_In809263801, ~x$w_buff1_used~0=~x$w_buff1_used~0_In809263801, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In809263801, ~x~0=~x~0_In809263801} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-12-07 12:03:04,848 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L734-->L734-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1584477352 256))) (.cse0 (= (mod ~x$r_buff0_thd1~0_In-1584477352 256) 0))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork0_#t~ite5_Out-1584477352| ~x$w_buff0_used~0_In-1584477352)) (and (not .cse1) (= |P0Thread1of1ForFork0_#t~ite5_Out-1584477352| 0) (not .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1584477352, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1584477352} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-1584477352|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1584477352, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1584477352} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 12:03:04,848 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L735-->L735-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd1~0_In-2100251890 256))) (.cse1 (= (mod ~x$w_buff1_used~0_In-2100251890 256) 0)) (.cse2 (= (mod ~x$r_buff0_thd1~0_In-2100251890 256) 0)) (.cse3 (= (mod ~x$w_buff0_used~0_In-2100251890 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite6_Out-2100251890| ~x$w_buff1_used~0_In-2100251890) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P0Thread1of1ForFork0_#t~ite6_Out-2100251890|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-2100251890, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2100251890, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-2100251890, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2100251890} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-2100251890|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-2100251890, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2100251890, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-2100251890, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2100251890} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 12:03:04,849 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L736-->L736-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In1148316624 256) 0)) (.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In1148316624 256)))) (or (and (not .cse0) (= |P0Thread1of1ForFork0_#t~ite7_Out1148316624| 0) (not .cse1)) (and (= |P0Thread1of1ForFork0_#t~ite7_Out1148316624| ~x$r_buff0_thd1~0_In1148316624) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1148316624, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1148316624} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1148316624, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out1148316624|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1148316624} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 12:03:04,849 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L737-->L737-2: Formula: (let ((.cse2 (= (mod ~x$r_buff0_thd1~0_In675719929 256) 0)) (.cse3 (= (mod ~x$w_buff0_used~0_In675719929 256) 0)) (.cse1 (= (mod ~x$r_buff1_thd1~0_In675719929 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In675719929 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite8_Out675719929|)) (and (= ~x$r_buff1_thd1~0_In675719929 |P0Thread1of1ForFork0_#t~ite8_Out675719929|) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In675719929, ~x$w_buff1_used~0=~x$w_buff1_used~0_In675719929, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In675719929, ~x$w_buff0_used~0=~x$w_buff0_used~0_In675719929} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In675719929, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out675719929|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In675719929, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In675719929, ~x$w_buff0_used~0=~x$w_buff0_used~0_In675719929} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 12:03:04,849 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L737-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~x$r_buff1_thd1~0_126 |v_P0Thread1of1ForFork0_#t~ite8_34|) (= (+ v_~__unbuffered_cnt~0_63 1) v_~__unbuffered_cnt~0_62)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_33|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_126} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 12:03:04,849 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L763-->L763-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In1496158667 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In1496158667 256) 0))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out1496158667|) (not .cse1)) (and (= ~x$w_buff0_used~0_In1496158667 |P1Thread1of1ForFork1_#t~ite11_Out1496158667|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1496158667, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1496158667} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out1496158667|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1496158667, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1496158667} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 12:03:04,850 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L764-->L764-2: Formula: (let ((.cse3 (= (mod ~x$r_buff1_thd2~0_In-653706639 256) 0)) (.cse2 (= (mod ~x$w_buff1_used~0_In-653706639 256) 0)) (.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-653706639 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-653706639 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite12_Out-653706639| 0)) (and (= |P1Thread1of1ForFork1_#t~ite12_Out-653706639| ~x$w_buff1_used~0_In-653706639) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-653706639, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-653706639, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-653706639, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-653706639} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-653706639, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-653706639, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-653706639|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-653706639, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-653706639} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 12:03:04,850 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L765-->L766: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd2~0_In1160303114 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In1160303114 256) 0)) (.cse2 (= ~x$r_buff0_thd2~0_Out1160303114 ~x$r_buff0_thd2~0_In1160303114))) (or (and (= ~x$r_buff0_thd2~0_Out1160303114 0) (not .cse0) (not .cse1)) (and .cse0 .cse2) (and .cse1 .cse2))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1160303114, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1160303114} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out1160303114|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out1160303114, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1160303114} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 12:03:04,850 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L766-->L766-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff0_used~0_In-1412485217 256))) (.cse3 (= (mod ~x$r_buff0_thd2~0_In-1412485217 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In-1412485217 256) 0)) (.cse1 (= (mod ~x$r_buff1_thd2~0_In-1412485217 256) 0))) (or (and (= ~x$r_buff1_thd2~0_In-1412485217 |P1Thread1of1ForFork1_#t~ite14_Out-1412485217|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P1Thread1of1ForFork1_#t~ite14_Out-1412485217|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1412485217, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1412485217, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1412485217, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1412485217} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-1412485217, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1412485217, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1412485217, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-1412485217|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1412485217} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 12:03:04,850 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L766-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~x$r_buff1_thd2~0_154 |v_P1Thread1of1ForFork1_#t~ite14_40|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_93 1) v_~__unbuffered_cnt~0_92)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_93, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_40|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_154, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_92, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_39|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 12:03:04,850 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [711] [711] L809-1-->L815: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 12:03:04,850 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L815-2-->L815-5: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In-645777556 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In-645777556 256))) (.cse2 (= |ULTIMATE.start_main_#t~ite24_Out-645777556| |ULTIMATE.start_main_#t~ite25_Out-645777556|))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite24_Out-645777556| ~x$w_buff1~0_In-645777556) (not .cse1) .cse2) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite24_Out-645777556| ~x~0_In-645777556) .cse2))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-645777556, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-645777556, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-645777556, ~x~0=~x~0_In-645777556} OutVars{~x$w_buff1~0=~x$w_buff1~0_In-645777556, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out-645777556|, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out-645777556|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-645777556, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-645777556, ~x~0=~x~0_In-645777556} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 12:03:04,851 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L816-->L816-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In1970976071 256) 0)) (.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In1970976071 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In1970976071 |ULTIMATE.start_main_#t~ite26_Out1970976071|)) (and (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite26_Out1970976071|) (not .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1970976071, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1970976071} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1970976071, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out1970976071|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1970976071} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 12:03:04,851 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L817-->L817-2: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd0~0_In-1252117463 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-1252117463 256))) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In-1252117463 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd0~0_In-1252117463 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite27_Out-1252117463| 0)) (and (or .cse1 .cse0) (= ~x$w_buff1_used~0_In-1252117463 |ULTIMATE.start_main_#t~ite27_Out-1252117463|) (or .cse3 .cse2)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1252117463, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1252117463, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1252117463, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1252117463} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1252117463, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1252117463, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out-1252117463|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1252117463, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1252117463} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 12:03:04,851 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L818-->L818-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In963096052 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In963096052 256)))) (or (and (= ~x$r_buff0_thd0~0_In963096052 |ULTIMATE.start_main_#t~ite28_Out963096052|) (or .cse0 .cse1)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite28_Out963096052| 0) (not .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In963096052, ~x$w_buff0_used~0=~x$w_buff0_used~0_In963096052} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In963096052, ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out963096052|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In963096052} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 12:03:04,852 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L819-->L819-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In1618561659 256))) (.cse0 (= (mod ~x$r_buff0_thd0~0_In1618561659 256) 0)) (.cse2 (= (mod ~x$r_buff1_thd0~0_In1618561659 256) 0)) (.cse3 (= (mod ~x$w_buff1_used~0_In1618561659 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite29_Out1618561659| ~x$r_buff1_thd0~0_In1618561659)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite29_Out1618561659| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1618561659, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1618561659, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1618561659, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1618561659} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1618561659, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out1618561659|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1618561659, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1618561659, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1618561659} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 12:03:04,854 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L831-->L832: Formula: (and (= v_~x$r_buff0_thd0~0_111 v_~x$r_buff0_thd0~0_110) (not (= (mod v_~weak$$choice2~0_23 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_111, ~weak$$choice2~0=v_~weak$$choice2~0_23} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_110, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_6|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_10|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|, ~weak$$choice2~0=v_~weak$$choice2~0_23} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 12:03:04,855 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L834-->L837-1: Formula: (and (= v_~x$mem_tmp~0_12 v_~x~0_151) (= (mod v_~main$tmp_guard1~0_14 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|) (= v_~x$flush_delayed~0_25 0) (not (= (mod v_~x$flush_delayed~0_26 256) 0))) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_26, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_14, ~x$mem_tmp~0=v_~x$mem_tmp~0_12} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_24|, ~x$flush_delayed~0=v_~x$flush_delayed~0_25, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_14, ~x$mem_tmp~0=v_~x$mem_tmp~0_12, ~x~0=v_~x~0_151, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ~x$flush_delayed~0, ~x~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 12:03:04,855 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L837-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 12:03:04,912 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 12:03:04 BasicIcfg [2019-12-07 12:03:04,912 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 12:03:04,912 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 12:03:04,912 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 12:03:04,913 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 12:03:04,913 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:01:42" (3/4) ... [2019-12-07 12:03:04,914 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 12:03:04,915 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] ULTIMATE.startENTRY-->L805: Formula: (let ((.cse0 (store |v_#valid_49| 0 0))) (and (= 0 v_~x$w_buff0_used~0_815) (= v_~x$r_buff0_thd1~0_121 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t2034~0.base_21|)) (= v_~x$flush_delayed~0_33 0) (= v_~y~0_122 0) (= 0 v_~x$r_buff0_thd3~0_131) (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t2034~0.base_21| 4)) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t2034~0.base_21|) (= 0 v_~x$r_buff1_thd3~0_199) (= v_~x$mem_tmp~0_19 0) (= 0 v_~x$r_buff1_thd2~0_200) (= v_~weak$$choice2~0_113 0) (= v_~z~0_31 0) (= v_~main$tmp_guard1~0_21 0) (= 0 v_~x$w_buff1~0_221) (= 0 v_~weak$$choice0~0_15) (= v_~main$tmp_guard0~0_23 0) (= 0 v_~x$read_delayed_var~0.base_7) (< 0 |v_#StackHeapBarrier_15|) (= v_~x$r_buff0_thd0~0_372 0) (= 0 v_~x~0_181) (= 0 |v_#NULL.base_4|) (= v_~__unbuffered_cnt~0_156 0) (= 0 v_~x$read_delayed~0_7) (= 0 v_~x$r_buff0_thd2~0_212) (= 0 v_~x$w_buff1_used~0_499) (= |v_#valid_47| (store .cse0 |v_ULTIMATE.start_main_~#t2034~0.base_21| 1)) (= |v_#NULL.offset_4| 0) (= v_~x$r_buff1_thd1~0_184 0) (= v_~x$r_buff1_thd0~0_296 0) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2034~0.base_21| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2034~0.base_21|) |v_ULTIMATE.start_main_~#t2034~0.offset_18| 0)) |v_#memory_int_15|) (= 0 v_~x$read_delayed_var~0.offset_7) (= 0 v_~__unbuffered_p2_EAX~0_22) (= 0 |v_ULTIMATE.start_main_~#t2034~0.offset_18|) (= 0 v_~x$w_buff0~0_269))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_49|, #memory_int=|v_#memory_int_16|, #length=|v_#length_20|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_22|, ~x$w_buff0~0=v_~x$w_buff0~0_269, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_28|, ~x$flush_delayed~0=v_~x$flush_delayed~0_33, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_40|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_30|, ULTIMATE.start_main_~#t2036~0.offset=|v_ULTIMATE.start_main_~#t2036~0.offset_17|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_30|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_46|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_184, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_131, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_51|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_37|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_46|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_33|, #length=|v_#length_19|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_22, ULTIMATE.start_main_~#t2035~0.base=|v_ULTIMATE.start_main_~#t2035~0.base_22|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_372, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_11|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_38|, ~x$w_buff1~0=v_~x$w_buff1~0_221, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_43|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_499, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_200, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_49|, ULTIMATE.start_main_~#t2034~0.offset=|v_ULTIMATE.start_main_~#t2034~0.offset_18|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_112|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ~weak$$choice0~0=v_~weak$$choice0~0_15, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_33|, ULTIMATE.start_main_~#t2034~0.base=|v_ULTIMATE.start_main_~#t2034~0.base_21|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_156, ~x~0=v_~x~0_181, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_121, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_22|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_34|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_32|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_30|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_199, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_21, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_118|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_18|, ~x$mem_tmp~0=v_~x$mem_tmp~0_19, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_26|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_51|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_32|, ~y~0=v_~y~0_122, ULTIMATE.start_main_~#t2035~0.offset=|v_ULTIMATE.start_main_~#t2035~0.offset_18|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_11|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_24|, ULTIMATE.start_main_~#t2036~0.base=|v_ULTIMATE.start_main_~#t2036~0.base_21|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_26|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_49|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_23, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_296, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_212, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_60|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_39|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_815, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_33|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_21|, #valid=|v_#valid_47|, #memory_int=|v_#memory_int_15|, ~z~0=v_~z~0_31, ~weak$$choice2~0=v_~weak$$choice2~0_113, ~x$read_delayed~0=v_~x$read_delayed~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_~#t2036~0.offset, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t2035~0.base, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_~#t2034~0.offset, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_~#t2034~0.base, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~nondet31, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite51, ~y~0, ULTIMATE.start_main_~#t2035~0.offset, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_~#t2036~0.base, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 12:03:04,915 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L805-1-->L807: Formula: (and (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2035~0.base_13| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2035~0.base_13|) |v_ULTIMATE.start_main_~#t2035~0.offset_11| 1)) |v_#memory_int_11|) (= |v_#valid_32| (store |v_#valid_33| |v_ULTIMATE.start_main_~#t2035~0.base_13| 1)) (not (= |v_ULTIMATE.start_main_~#t2035~0.base_13| 0)) (= 0 (select |v_#valid_33| |v_ULTIMATE.start_main_~#t2035~0.base_13|)) (= 0 |v_ULTIMATE.start_main_~#t2035~0.offset_11|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2035~0.base_13|) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t2035~0.base_13| 4) |v_#length_15|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_6|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t2035~0.offset=|v_ULTIMATE.start_main_~#t2035~0.offset_11|, ULTIMATE.start_main_~#t2035~0.base=|v_ULTIMATE.start_main_~#t2035~0.base_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet21, #valid, #memory_int, #length, ULTIMATE.start_main_~#t2035~0.offset, ULTIMATE.start_main_~#t2035~0.base] because there is no mapped edge [2019-12-07 12:03:04,915 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] P1ENTRY-->L4-3: Formula: (and (not (= 0 v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_11)) (= v_P1Thread1of1ForFork1_~arg.offset_9 |v_P1Thread1of1ForFork1_#in~arg.offset_11|) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_9| v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_11) (= 1 v_~x$w_buff0_used~0_98) (= v_P1Thread1of1ForFork1_~arg.base_9 |v_P1Thread1of1ForFork1_#in~arg.base_11|) (= v_~x$w_buff1_used~0_55 v_~x$w_buff0_used~0_99) (= 2 v_~x$w_buff0~0_30) (= |v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_9| (ite (not (and (not (= (mod v_~x$w_buff0_used~0_98 256) 0)) (not (= 0 (mod v_~x$w_buff1_used~0_55 256))))) 1 0)) (= v_~x$w_buff0~0_31 v_~x$w_buff1~0_21)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_31, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_11|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_11|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_99} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=v_P1Thread1of1ForFork1___VERIFIER_assert_~expression_11, ~x$w_buff0~0=v_~x$w_buff0~0_30, P1Thread1of1ForFork1_~arg.offset=v_P1Thread1of1ForFork1_~arg.offset_9, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_9|, P1Thread1of1ForFork1_~arg.base=v_P1Thread1of1ForFork1_~arg.base_9, ~x$w_buff1~0=v_~x$w_buff1~0_21, P1Thread1of1ForFork1_#in~arg.base=|v_P1Thread1of1ForFork1_#in~arg.base_11|, P1Thread1of1ForFork1_#in~arg.offset=|v_P1Thread1of1ForFork1_#in~arg.offset_11|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_55, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_98} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$w_buff0~0, P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 12:03:04,916 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L807-1-->L809: Formula: (and (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t2036~0.base_9|) (= |v_ULTIMATE.start_main_~#t2036~0.offset_8| 0) (= (select |v_#valid_28| |v_ULTIMATE.start_main_~#t2036~0.base_9|) 0) (= (store |v_#valid_28| |v_ULTIMATE.start_main_~#t2036~0.base_9| 1) |v_#valid_27|) (not (= |v_ULTIMATE.start_main_~#t2036~0.base_9| 0)) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t2036~0.base_9| 4) |v_#length_13|) (= (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t2036~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t2036~0.base_9|) |v_ULTIMATE.start_main_~#t2036~0.offset_8| 2)) |v_#memory_int_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t2036~0.base=|v_ULTIMATE.start_main_~#t2036~0.base_9|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~#t2036~0.offset=|v_ULTIMATE.start_main_~#t2036~0.offset_8|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2036~0.base, ULTIMATE.start_main_#t~nondet22, #valid, #memory_int, ULTIMATE.start_main_~#t2036~0.offset, #length] because there is no mapped edge [2019-12-07 12:03:04,917 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L782-2-->L782-4: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd3~0_In-1360076320 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-1360076320 256)))) (or (and (not .cse0) (not .cse1) (= ~x$w_buff1~0_In-1360076320 |P2Thread1of1ForFork2_#t~ite15_Out-1360076320|)) (and (or .cse1 .cse0) (= ~x~0_In-1360076320 |P2Thread1of1ForFork2_#t~ite15_Out-1360076320|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1360076320, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1360076320, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1360076320, ~x~0=~x~0_In-1360076320} OutVars{P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out-1360076320|, ~x$w_buff1~0=~x$w_buff1~0_In-1360076320, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1360076320, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1360076320, ~x~0=~x~0_In-1360076320} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 12:03:04,917 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [695] [695] L782-4-->L783: Formula: (= |v_P2Thread1of1ForFork2_#t~ite15_6| v_~x~0_17) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_6|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_5|, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_5|, ~x~0=v_~x~0_17} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, P2Thread1of1ForFork2_#t~ite16, ~x~0] because there is no mapped edge [2019-12-07 12:03:04,917 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L783-->L783-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd3~0_In1257176016 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In1257176016 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite17_Out1257176016| 0) (not .cse1)) (and (= ~x$w_buff0_used~0_In1257176016 |P2Thread1of1ForFork2_#t~ite17_Out1257176016|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1257176016, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1257176016} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1257176016, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out1257176016|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1257176016} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 12:03:04,917 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L784-->L784-2: Formula: (let ((.cse2 (= (mod ~x$r_buff0_thd3~0_In-1079476413 256) 0)) (.cse3 (= (mod ~x$w_buff0_used~0_In-1079476413 256) 0)) (.cse0 (= (mod ~x$r_buff1_thd3~0_In-1079476413 256) 0)) (.cse1 (= (mod ~x$w_buff1_used~0_In-1079476413 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite18_Out-1079476413| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~x$w_buff1_used~0_In-1079476413 |P2Thread1of1ForFork2_#t~ite18_Out-1079476413|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1079476413, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1079476413, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1079476413, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1079476413} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-1079476413, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-1079476413, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1079476413, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out-1079476413|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1079476413} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 12:03:04,918 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L785-->L785-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In1715476261 256))) (.cse0 (= (mod ~x$r_buff0_thd3~0_In1715476261 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork2_#t~ite19_Out1715476261|)) (and (or .cse1 .cse0) (= ~x$r_buff0_thd3~0_In1715476261 |P2Thread1of1ForFork2_#t~ite19_Out1715476261|)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1715476261, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1715476261} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1715476261, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out1715476261|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1715476261} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 12:03:04,918 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [769] [769] L786-->L786-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In1300560303 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In1300560303 256))) (.cse3 (= (mod ~x$w_buff0_used~0_In1300560303 256) 0)) (.cse2 (= 0 (mod ~x$r_buff0_thd3~0_In1300560303 256)))) (or (and (or .cse0 .cse1) (= ~x$r_buff1_thd3~0_In1300560303 |P2Thread1of1ForFork2_#t~ite20_Out1300560303|) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork2_#t~ite20_Out1300560303|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1300560303, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1300560303, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1300560303, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1300560303} OutVars{P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out1300560303|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1300560303, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1300560303, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1300560303, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1300560303} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 12:03:04,918 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [804] [804] L786-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_75 1) v_~__unbuffered_cnt~0_74) (= |v_P2Thread1of1ForFork2_#t~ite20_54| v_~x$r_buff1_thd3~0_147)) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_54|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_75} OutVars{P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_53|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_147, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_74, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, ~x$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 12:03:04,918 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L733-2-->L733-5: Formula: (let ((.cse0 (= |P0Thread1of1ForFork0_#t~ite4_Out809263801| |P0Thread1of1ForFork0_#t~ite3_Out809263801|)) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In809263801 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd1~0_In809263801 256)))) (or (and .cse0 (not .cse1) (not .cse2) (= ~x$w_buff1~0_In809263801 |P0Thread1of1ForFork0_#t~ite3_Out809263801|)) (and .cse0 (= |P0Thread1of1ForFork0_#t~ite3_Out809263801| ~x~0_In809263801) (or .cse2 .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In809263801, ~x$w_buff1_used~0=~x$w_buff1_used~0_In809263801, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In809263801, ~x~0=~x~0_In809263801} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out809263801|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out809263801|, ~x$w_buff1~0=~x$w_buff1~0_In809263801, ~x$w_buff1_used~0=~x$w_buff1_used~0_In809263801, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In809263801, ~x~0=~x~0_In809263801} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-12-07 12:03:04,918 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L734-->L734-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1584477352 256))) (.cse0 (= (mod ~x$r_buff0_thd1~0_In-1584477352 256) 0))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork0_#t~ite5_Out-1584477352| ~x$w_buff0_used~0_In-1584477352)) (and (not .cse1) (= |P0Thread1of1ForFork0_#t~ite5_Out-1584477352| 0) (not .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1584477352, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1584477352} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-1584477352|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1584477352, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1584477352} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 12:03:04,919 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L735-->L735-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd1~0_In-2100251890 256))) (.cse1 (= (mod ~x$w_buff1_used~0_In-2100251890 256) 0)) (.cse2 (= (mod ~x$r_buff0_thd1~0_In-2100251890 256) 0)) (.cse3 (= (mod ~x$w_buff0_used~0_In-2100251890 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite6_Out-2100251890| ~x$w_buff1_used~0_In-2100251890) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P0Thread1of1ForFork0_#t~ite6_Out-2100251890|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-2100251890, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2100251890, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-2100251890, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2100251890} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-2100251890|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-2100251890, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2100251890, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-2100251890, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2100251890} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 12:03:04,919 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L736-->L736-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In1148316624 256) 0)) (.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In1148316624 256)))) (or (and (not .cse0) (= |P0Thread1of1ForFork0_#t~ite7_Out1148316624| 0) (not .cse1)) (and (= |P0Thread1of1ForFork0_#t~ite7_Out1148316624| ~x$r_buff0_thd1~0_In1148316624) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1148316624, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1148316624} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1148316624, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out1148316624|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1148316624} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 12:03:04,919 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L737-->L737-2: Formula: (let ((.cse2 (= (mod ~x$r_buff0_thd1~0_In675719929 256) 0)) (.cse3 (= (mod ~x$w_buff0_used~0_In675719929 256) 0)) (.cse1 (= (mod ~x$r_buff1_thd1~0_In675719929 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In675719929 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite8_Out675719929|)) (and (= ~x$r_buff1_thd1~0_In675719929 |P0Thread1of1ForFork0_#t~ite8_Out675719929|) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In675719929, ~x$w_buff1_used~0=~x$w_buff1_used~0_In675719929, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In675719929, ~x$w_buff0_used~0=~x$w_buff0_used~0_In675719929} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In675719929, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out675719929|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In675719929, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In675719929, ~x$w_buff0_used~0=~x$w_buff0_used~0_In675719929} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 12:03:04,919 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [799] [799] L737-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~x$r_buff1_thd1~0_126 |v_P0Thread1of1ForFork0_#t~ite8_34|) (= (+ v_~__unbuffered_cnt~0_63 1) v_~__unbuffered_cnt~0_62)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_33|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_126} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 12:03:04,920 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L763-->L763-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In1496158667 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In1496158667 256) 0))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out1496158667|) (not .cse1)) (and (= ~x$w_buff0_used~0_In1496158667 |P1Thread1of1ForFork1_#t~ite11_Out1496158667|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1496158667, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1496158667} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out1496158667|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1496158667, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1496158667} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 12:03:04,920 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L764-->L764-2: Formula: (let ((.cse3 (= (mod ~x$r_buff1_thd2~0_In-653706639 256) 0)) (.cse2 (= (mod ~x$w_buff1_used~0_In-653706639 256) 0)) (.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-653706639 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-653706639 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite12_Out-653706639| 0)) (and (= |P1Thread1of1ForFork1_#t~ite12_Out-653706639| ~x$w_buff1_used~0_In-653706639) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-653706639, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-653706639, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-653706639, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-653706639} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-653706639, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-653706639, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-653706639|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-653706639, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-653706639} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 12:03:04,920 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L765-->L766: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd2~0_In1160303114 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In1160303114 256) 0)) (.cse2 (= ~x$r_buff0_thd2~0_Out1160303114 ~x$r_buff0_thd2~0_In1160303114))) (or (and (= ~x$r_buff0_thd2~0_Out1160303114 0) (not .cse0) (not .cse1)) (and .cse0 .cse2) (and .cse1 .cse2))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1160303114, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1160303114} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out1160303114|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out1160303114, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1160303114} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 12:03:04,920 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L766-->L766-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff0_used~0_In-1412485217 256))) (.cse3 (= (mod ~x$r_buff0_thd2~0_In-1412485217 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In-1412485217 256) 0)) (.cse1 (= (mod ~x$r_buff1_thd2~0_In-1412485217 256) 0))) (or (and (= ~x$r_buff1_thd2~0_In-1412485217 |P1Thread1of1ForFork1_#t~ite14_Out-1412485217|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P1Thread1of1ForFork1_#t~ite14_Out-1412485217|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1412485217, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1412485217, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1412485217, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1412485217} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-1412485217, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1412485217, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1412485217, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-1412485217|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1412485217} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 12:03:04,920 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L766-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~x$r_buff1_thd2~0_154 |v_P1Thread1of1ForFork1_#t~ite14_40|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_93 1) v_~__unbuffered_cnt~0_92)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_93, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_40|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_154, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_92, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_39|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 12:03:04,920 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [711] [711] L809-1-->L815: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 12:03:04,921 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L815-2-->L815-5: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In-645777556 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In-645777556 256))) (.cse2 (= |ULTIMATE.start_main_#t~ite24_Out-645777556| |ULTIMATE.start_main_#t~ite25_Out-645777556|))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite24_Out-645777556| ~x$w_buff1~0_In-645777556) (not .cse1) .cse2) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite24_Out-645777556| ~x~0_In-645777556) .cse2))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-645777556, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-645777556, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-645777556, ~x~0=~x~0_In-645777556} OutVars{~x$w_buff1~0=~x$w_buff1~0_In-645777556, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out-645777556|, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out-645777556|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-645777556, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-645777556, ~x~0=~x~0_In-645777556} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 12:03:04,921 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L816-->L816-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In1970976071 256) 0)) (.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In1970976071 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In1970976071 |ULTIMATE.start_main_#t~ite26_Out1970976071|)) (and (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite26_Out1970976071|) (not .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1970976071, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1970976071} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1970976071, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out1970976071|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1970976071} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 12:03:04,921 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L817-->L817-2: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd0~0_In-1252117463 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-1252117463 256))) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In-1252117463 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd0~0_In-1252117463 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite27_Out-1252117463| 0)) (and (or .cse1 .cse0) (= ~x$w_buff1_used~0_In-1252117463 |ULTIMATE.start_main_#t~ite27_Out-1252117463|) (or .cse3 .cse2)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1252117463, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1252117463, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1252117463, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1252117463} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1252117463, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1252117463, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out-1252117463|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1252117463, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1252117463} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 12:03:04,921 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L818-->L818-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In963096052 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In963096052 256)))) (or (and (= ~x$r_buff0_thd0~0_In963096052 |ULTIMATE.start_main_#t~ite28_Out963096052|) (or .cse0 .cse1)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite28_Out963096052| 0) (not .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In963096052, ~x$w_buff0_used~0=~x$w_buff0_used~0_In963096052} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In963096052, ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out963096052|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In963096052} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 12:03:04,922 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L819-->L819-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In1618561659 256))) (.cse0 (= (mod ~x$r_buff0_thd0~0_In1618561659 256) 0)) (.cse2 (= (mod ~x$r_buff1_thd0~0_In1618561659 256) 0)) (.cse3 (= (mod ~x$w_buff1_used~0_In1618561659 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite29_Out1618561659| ~x$r_buff1_thd0~0_In1618561659)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite29_Out1618561659| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1618561659, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1618561659, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1618561659, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1618561659} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1618561659, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out1618561659|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1618561659, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1618561659, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1618561659} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 12:03:04,924 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [722] [722] L831-->L832: Formula: (and (= v_~x$r_buff0_thd0~0_111 v_~x$r_buff0_thd0~0_110) (not (= (mod v_~weak$$choice2~0_23 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_111, ~weak$$choice2~0=v_~weak$$choice2~0_23} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_110, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_6|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_10|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|, ~weak$$choice2~0=v_~weak$$choice2~0_23} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 12:03:04,925 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L834-->L837-1: Formula: (and (= v_~x$mem_tmp~0_12 v_~x~0_151) (= (mod v_~main$tmp_guard1~0_14 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|) (= v_~x$flush_delayed~0_25 0) (not (= (mod v_~x$flush_delayed~0_26 256) 0))) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_26, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_14, ~x$mem_tmp~0=v_~x$mem_tmp~0_12} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_24|, ~x$flush_delayed~0=v_~x$flush_delayed~0_25, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_14, ~x$mem_tmp~0=v_~x$mem_tmp~0_12, ~x~0=v_~x~0_151, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ~x$flush_delayed~0, ~x~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 12:03:04,925 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L837-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 12:03:04,980 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_87b65545-3c72-4835-a4aa-bace229fd197/bin/uautomizer/witness.graphml [2019-12-07 12:03:04,980 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 12:03:04,981 INFO L168 Benchmark]: Toolchain (without parser) took 83005.91 ms. Allocated memory was 1.0 GB in the beginning and 7.5 GB in the end (delta: 6.5 GB). Free memory was 932.6 MB in the beginning and 4.1 GB in the end (delta: -3.2 GB). Peak memory consumption was 3.3 GB. Max. memory is 11.5 GB. [2019-12-07 12:03:04,981 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 955.4 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 12:03:04,981 INFO L168 Benchmark]: CACSL2BoogieTranslator took 401.83 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 92.8 MB). Free memory was 932.6 MB in the beginning and 1.1 GB in the end (delta: -127.8 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. [2019-12-07 12:03:04,982 INFO L168 Benchmark]: Boogie Procedure Inliner took 51.18 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 12:03:04,982 INFO L168 Benchmark]: Boogie Preprocessor took 31.80 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 12:03:04,982 INFO L168 Benchmark]: RCFGBuilder took 400.32 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 998.3 MB in the end (delta: 56.8 MB). Peak memory consumption was 56.8 MB. Max. memory is 11.5 GB. [2019-12-07 12:03:04,982 INFO L168 Benchmark]: TraceAbstraction took 82050.17 ms. Allocated memory was 1.1 GB in the beginning and 7.5 GB in the end (delta: 6.4 GB). Free memory was 998.3 MB in the beginning and 4.2 GB in the end (delta: -3.2 GB). Peak memory consumption was 3.2 GB. Max. memory is 11.5 GB. [2019-12-07 12:03:04,983 INFO L168 Benchmark]: Witness Printer took 67.53 ms. Allocated memory is still 7.5 GB. Free memory was 4.2 GB in the beginning and 4.1 GB in the end (delta: 43.0 MB). Peak memory consumption was 43.0 MB. Max. memory is 11.5 GB. [2019-12-07 12:03:04,984 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 955.4 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 401.83 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 92.8 MB). Free memory was 932.6 MB in the beginning and 1.1 GB in the end (delta: -127.8 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 51.18 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 31.80 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 400.32 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 998.3 MB in the end (delta: 56.8 MB). Peak memory consumption was 56.8 MB. Max. memory is 11.5 GB. * TraceAbstraction took 82050.17 ms. Allocated memory was 1.1 GB in the beginning and 7.5 GB in the end (delta: 6.4 GB). Free memory was 998.3 MB in the beginning and 4.2 GB in the end (delta: -3.2 GB). Peak memory consumption was 3.2 GB. Max. memory is 11.5 GB. * Witness Printer took 67.53 ms. Allocated memory is still 7.5 GB. Free memory was 4.2 GB in the beginning and 4.1 GB in the end (delta: 43.0 MB). Peak memory consumption was 43.0 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 2.9s, 174 ProgramPointsBefore, 94 ProgramPointsAfterwards, 211 TransitionsBefore, 106 TransitionsAfterwards, 17074 CoEnabledTransitionPairs, 8 FixpointIterations, 31 TrivialSequentialCompositions, 42 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 38 ConcurrentYvCompositions, 29 ChoiceCompositions, 6170 VarBasedMoverChecksPositive, 251 VarBasedMoverChecksNegative, 77 SemBasedMoverChecksPositive, 248 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 87419 CheckedPairsTotal, 111 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L805] FCALL, FORK 0 pthread_create(&t2034, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L807] FCALL, FORK 0 pthread_create(&t2035, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L809] FCALL, FORK 0 pthread_create(&t2036, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L752] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L753] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L754] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L755] 2 x$r_buff1_thd3 = x$r_buff0_thd3 [L756] 2 x$r_buff0_thd2 = (_Bool)1 [L759] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L776] 3 __unbuffered_p2_EAX = y [L779] 3 z = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L727] 1 z = 2 [L730] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L782] 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L733] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L783] 3 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used [L762] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L784] 3 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used [L785] 3 x$r_buff0_thd3 = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$r_buff0_thd3 [L733] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L734] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L735] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L736] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L762] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L763] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L764] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L815] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L815] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L816] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L817] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L818] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L819] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L822] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L823] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L824] 0 x$flush_delayed = weak$$choice2 [L825] 0 x$mem_tmp = x VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L826] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L826] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L827] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L827] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L828] EXPR 0 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L828] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L829] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L829] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L830] EXPR 0 weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L830] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L832] EXPR 0 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L832] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L833] 0 main$tmp_guard1 = !(x == 2 && z == 2 && __unbuffered_p2_EAX == 1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 165 locations, 2 error locations. Result: UNSAFE, OverallTime: 81.9s, OverallIterations: 21, TraceHistogramMax: 1, AutomataDifference: 11.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 3350 SDtfs, 2481 SDslu, 5693 SDs, 0 SdLazy, 2971 SolverSat, 140 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 114 GetRequests, 28 SyntacticMatches, 10 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 0.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=212401occurred in iteration=5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 53.2s AutomataMinimizationTime, 20 MinimizatonAttempts, 204076 StatesRemovedByMinimization, 18 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.6s InterpolantComputationTime, 885 NumberOfCodeBlocks, 885 NumberOfCodeBlocksAsserted, 21 NumberOfCheckSat, 797 ConstructedInterpolants, 0 QuantifiedInterpolants, 114643 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 20 InterpolantComputations, 20 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...