./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe011_rmo.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_ffa96673-b4a9-48f3-a58b-c7c790fef0fa/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_ffa96673-b4a9-48f3-a58b-c7c790fef0fa/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_ffa96673-b4a9-48f3-a58b-c7c790fef0fa/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_ffa96673-b4a9-48f3-a58b-c7c790fef0fa/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe011_rmo.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_ffa96673-b4a9-48f3-a58b-c7c790fef0fa/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_ffa96673-b4a9-48f3-a58b-c7c790fef0fa/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 72819179e4b32e9766c3a41334d2b2772314b032 .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 17:09:16,202 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 17:09:16,204 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 17:09:16,211 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 17:09:16,211 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 17:09:16,212 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 17:09:16,213 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 17:09:16,214 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 17:09:16,216 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 17:09:16,217 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 17:09:16,217 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 17:09:16,218 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 17:09:16,218 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 17:09:16,219 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 17:09:16,220 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 17:09:16,220 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 17:09:16,221 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 17:09:16,222 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 17:09:16,223 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 17:09:16,225 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 17:09:16,226 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 17:09:16,226 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 17:09:16,227 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 17:09:16,227 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 17:09:16,229 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 17:09:16,229 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 17:09:16,229 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 17:09:16,230 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 17:09:16,230 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 17:09:16,231 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 17:09:16,231 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 17:09:16,231 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 17:09:16,232 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 17:09:16,232 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 17:09:16,233 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 17:09:16,233 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 17:09:16,233 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 17:09:16,233 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 17:09:16,233 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 17:09:16,234 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 17:09:16,234 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 17:09:16,235 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_ffa96673-b4a9-48f3-a58b-c7c790fef0fa/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 17:09:16,244 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 17:09:16,244 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 17:09:16,245 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 17:09:16,245 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 17:09:16,245 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 17:09:16,245 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 17:09:16,245 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 17:09:16,245 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 17:09:16,245 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 17:09:16,245 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 17:09:16,245 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 17:09:16,245 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 17:09:16,246 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 17:09:16,246 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 17:09:16,246 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 17:09:16,246 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 17:09:16,246 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 17:09:16,246 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 17:09:16,246 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 17:09:16,246 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 17:09:16,246 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 17:09:16,247 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:09:16,247 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 17:09:16,247 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 17:09:16,247 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 17:09:16,247 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 17:09:16,247 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 17:09:16,247 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 17:09:16,247 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 17:09:16,247 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_ffa96673-b4a9-48f3-a58b-c7c790fef0fa/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 72819179e4b32e9766c3a41334d2b2772314b032 [2019-12-07 17:09:16,347 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 17:09:16,355 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 17:09:16,357 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 17:09:16,358 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 17:09:16,358 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 17:09:16,358 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_ffa96673-b4a9-48f3-a58b-c7c790fef0fa/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe011_rmo.oepc.i [2019-12-07 17:09:16,396 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_ffa96673-b4a9-48f3-a58b-c7c790fef0fa/bin/uautomizer/data/729467775/c6dfd836e4404bcea206c1eab66a68b7/FLAGa2d496597 [2019-12-07 17:09:16,875 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 17:09:16,876 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_ffa96673-b4a9-48f3-a58b-c7c790fef0fa/sv-benchmarks/c/pthread-wmm/safe011_rmo.oepc.i [2019-12-07 17:09:16,886 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_ffa96673-b4a9-48f3-a58b-c7c790fef0fa/bin/uautomizer/data/729467775/c6dfd836e4404bcea206c1eab66a68b7/FLAGa2d496597 [2019-12-07 17:09:16,895 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_ffa96673-b4a9-48f3-a58b-c7c790fef0fa/bin/uautomizer/data/729467775/c6dfd836e4404bcea206c1eab66a68b7 [2019-12-07 17:09:16,897 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 17:09:16,898 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 17:09:16,898 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 17:09:16,898 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 17:09:16,900 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 17:09:16,901 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:09:16" (1/1) ... [2019-12-07 17:09:16,903 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1c8002ab and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:09:16, skipping insertion in model container [2019-12-07 17:09:16,903 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:09:16" (1/1) ... [2019-12-07 17:09:16,907 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 17:09:16,935 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 17:09:17,184 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:09:17,191 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 17:09:17,231 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:09:17,275 INFO L208 MainTranslator]: Completed translation [2019-12-07 17:09:17,275 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:09:17 WrapperNode [2019-12-07 17:09:17,275 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 17:09:17,276 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 17:09:17,276 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 17:09:17,276 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 17:09:17,281 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:09:17" (1/1) ... [2019-12-07 17:09:17,294 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:09:17" (1/1) ... [2019-12-07 17:09:17,314 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 17:09:17,315 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 17:09:17,315 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 17:09:17,315 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 17:09:17,321 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:09:17" (1/1) ... [2019-12-07 17:09:17,321 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:09:17" (1/1) ... [2019-12-07 17:09:17,324 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:09:17" (1/1) ... [2019-12-07 17:09:17,325 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:09:17" (1/1) ... [2019-12-07 17:09:17,331 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:09:17" (1/1) ... [2019-12-07 17:09:17,334 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:09:17" (1/1) ... [2019-12-07 17:09:17,336 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:09:17" (1/1) ... [2019-12-07 17:09:17,340 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 17:09:17,340 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 17:09:17,340 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 17:09:17,340 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 17:09:17,341 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:09:17" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_ffa96673-b4a9-48f3-a58b-c7c790fef0fa/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:09:17,384 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 17:09:17,385 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 17:09:17,385 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 17:09:17,385 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 17:09:17,385 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 17:09:17,385 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 17:09:17,385 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 17:09:17,385 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 17:09:17,385 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 17:09:17,385 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 17:09:17,385 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 17:09:17,385 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 17:09:17,386 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 17:09:17,387 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 17:09:17,753 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 17:09:17,753 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 17:09:17,754 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:09:17 BoogieIcfgContainer [2019-12-07 17:09:17,754 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 17:09:17,754 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 17:09:17,755 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 17:09:17,756 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 17:09:17,757 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 05:09:16" (1/3) ... [2019-12-07 17:09:17,757 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3ca8b9be and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:09:17, skipping insertion in model container [2019-12-07 17:09:17,757 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:09:17" (2/3) ... [2019-12-07 17:09:17,757 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3ca8b9be and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:09:17, skipping insertion in model container [2019-12-07 17:09:17,758 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:09:17" (3/3) ... [2019-12-07 17:09:17,759 INFO L109 eAbstractionObserver]: Analyzing ICFG safe011_rmo.oepc.i [2019-12-07 17:09:17,765 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 17:09:17,765 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 17:09:17,770 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 17:09:17,771 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 17:09:17,794 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,794 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,794 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,794 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,794 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,795 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,795 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,795 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,795 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,795 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,795 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,795 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,796 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,796 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,796 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,796 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,796 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,796 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,796 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,796 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,797 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,797 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,797 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,797 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,797 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,797 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,797 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,797 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,797 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,798 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,798 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,798 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,798 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,798 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,798 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,798 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,799 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,799 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,799 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,799 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,799 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,799 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,799 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,799 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,800 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,800 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,800 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,800 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,800 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,800 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,800 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,800 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,801 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,801 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,801 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,801 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,801 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,801 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,801 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,801 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,801 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,801 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,802 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,802 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,802 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,802 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,802 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,802 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,802 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,803 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,803 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,803 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,803 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,803 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,803 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,803 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,803 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,803 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,803 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,804 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,804 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,804 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,804 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,804 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,804 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,804 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,804 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,804 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,805 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,805 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,805 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,805 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,805 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,805 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:09:17,816 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 17:09:17,828 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 17:09:17,828 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 17:09:17,828 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 17:09:17,828 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 17:09:17,828 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 17:09:17,829 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 17:09:17,829 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 17:09:17,829 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 17:09:17,839 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 174 places, 211 transitions [2019-12-07 17:09:17,840 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 174 places, 211 transitions [2019-12-07 17:09:17,893 INFO L134 PetriNetUnfolder]: 47/208 cut-off events. [2019-12-07 17:09:17,893 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:09:17,902 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 208 events. 47/208 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 573 event pairs. 9/168 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 17:09:17,917 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 174 places, 211 transitions [2019-12-07 17:09:17,944 INFO L134 PetriNetUnfolder]: 47/208 cut-off events. [2019-12-07 17:09:17,944 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:09:17,950 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 208 events. 47/208 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 573 event pairs. 9/168 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 17:09:17,966 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 17114 [2019-12-07 17:09:17,966 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 17:09:20,868 WARN L192 SmtUtils]: Spent 138.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 85 [2019-12-07 17:09:20,963 INFO L206 etLargeBlockEncoding]: Checked pairs total: 86146 [2019-12-07 17:09:20,963 INFO L214 etLargeBlockEncoding]: Total number of compositions: 112 [2019-12-07 17:09:20,965 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 93 places, 104 transitions [2019-12-07 17:09:33,047 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 104862 states. [2019-12-07 17:09:33,048 INFO L276 IsEmpty]: Start isEmpty. Operand 104862 states. [2019-12-07 17:09:33,052 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 17:09:33,052 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:09:33,052 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 17:09:33,053 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:09:33,056 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:09:33,056 INFO L82 PathProgramCache]: Analyzing trace with hash 844471, now seen corresponding path program 1 times [2019-12-07 17:09:33,062 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:09:33,062 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1343744132] [2019-12-07 17:09:33,062 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:09:33,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:09:33,193 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:09:33,193 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1343744132] [2019-12-07 17:09:33,194 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:09:33,194 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:09:33,194 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1370096301] [2019-12-07 17:09:33,197 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:09:33,197 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:09:33,206 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:09:33,207 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:09:33,208 INFO L87 Difference]: Start difference. First operand 104862 states. Second operand 3 states. [2019-12-07 17:09:33,939 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:09:33,939 INFO L93 Difference]: Finished difference Result 104560 states and 448162 transitions. [2019-12-07 17:09:33,940 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:09:33,941 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 17:09:33,941 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:09:34,496 INFO L225 Difference]: With dead ends: 104560 [2019-12-07 17:09:34,496 INFO L226 Difference]: Without dead ends: 102376 [2019-12-07 17:09:34,497 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:09:37,760 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102376 states. [2019-12-07 17:09:40,556 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102376 to 102376. [2019-12-07 17:09:40,557 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102376 states. [2019-12-07 17:09:40,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102376 states to 102376 states and 439244 transitions. [2019-12-07 17:09:40,882 INFO L78 Accepts]: Start accepts. Automaton has 102376 states and 439244 transitions. Word has length 3 [2019-12-07 17:09:40,882 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:09:40,883 INFO L462 AbstractCegarLoop]: Abstraction has 102376 states and 439244 transitions. [2019-12-07 17:09:40,883 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:09:40,883 INFO L276 IsEmpty]: Start isEmpty. Operand 102376 states and 439244 transitions. [2019-12-07 17:09:40,887 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 17:09:40,887 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:09:40,888 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:09:40,888 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:09:40,888 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:09:40,888 INFO L82 PathProgramCache]: Analyzing trace with hash 205437058, now seen corresponding path program 1 times [2019-12-07 17:09:40,888 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:09:40,889 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1798261590] [2019-12-07 17:09:40,889 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:09:40,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:09:40,966 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:09:40,967 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1798261590] [2019-12-07 17:09:40,967 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:09:40,967 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:09:40,967 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1744893258] [2019-12-07 17:09:40,968 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:09:40,968 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:09:40,969 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:09:40,969 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:09:40,969 INFO L87 Difference]: Start difference. First operand 102376 states and 439244 transitions. Second operand 4 states. [2019-12-07 17:09:41,865 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:09:41,865 INFO L93 Difference]: Finished difference Result 164490 states and 678436 transitions. [2019-12-07 17:09:41,866 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:09:41,866 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 17:09:41,866 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:09:42,541 INFO L225 Difference]: With dead ends: 164490 [2019-12-07 17:09:42,542 INFO L226 Difference]: Without dead ends: 164441 [2019-12-07 17:09:42,542 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:09:46,878 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164441 states. [2019-12-07 17:09:48,959 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164441 to 148513. [2019-12-07 17:09:48,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148513 states. [2019-12-07 17:09:49,356 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148513 states to 148513 states and 619831 transitions. [2019-12-07 17:09:49,356 INFO L78 Accepts]: Start accepts. Automaton has 148513 states and 619831 transitions. Word has length 11 [2019-12-07 17:09:49,356 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:09:49,356 INFO L462 AbstractCegarLoop]: Abstraction has 148513 states and 619831 transitions. [2019-12-07 17:09:49,356 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:09:49,356 INFO L276 IsEmpty]: Start isEmpty. Operand 148513 states and 619831 transitions. [2019-12-07 17:09:49,361 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 17:09:49,361 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:09:49,362 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:09:49,362 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:09:49,362 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:09:49,362 INFO L82 PathProgramCache]: Analyzing trace with hash 1045519438, now seen corresponding path program 1 times [2019-12-07 17:09:49,362 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:09:49,362 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [884961154] [2019-12-07 17:09:49,363 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:09:49,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:09:49,425 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:09:49,425 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [884961154] [2019-12-07 17:09:49,425 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:09:49,426 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:09:49,426 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [158304688] [2019-12-07 17:09:49,426 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:09:49,426 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:09:49,426 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:09:49,426 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:09:49,426 INFO L87 Difference]: Start difference. First operand 148513 states and 619831 transitions. Second operand 4 states. [2019-12-07 17:09:50,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:09:50,487 INFO L93 Difference]: Finished difference Result 211896 states and 864765 transitions. [2019-12-07 17:09:50,487 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:09:50,488 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 17:09:50,488 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:09:51,054 INFO L225 Difference]: With dead ends: 211896 [2019-12-07 17:09:51,054 INFO L226 Difference]: Without dead ends: 211833 [2019-12-07 17:09:51,054 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:09:58,050 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 211833 states. [2019-12-07 17:10:00,468 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 211833 to 178183. [2019-12-07 17:10:00,469 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178183 states. [2019-12-07 17:10:01,029 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178183 states to 178183 states and 738846 transitions. [2019-12-07 17:10:01,029 INFO L78 Accepts]: Start accepts. Automaton has 178183 states and 738846 transitions. Word has length 13 [2019-12-07 17:10:01,030 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:10:01,030 INFO L462 AbstractCegarLoop]: Abstraction has 178183 states and 738846 transitions. [2019-12-07 17:10:01,030 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:10:01,030 INFO L276 IsEmpty]: Start isEmpty. Operand 178183 states and 738846 transitions. [2019-12-07 17:10:01,032 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 17:10:01,032 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:10:01,032 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:10:01,032 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:10:01,032 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:10:01,032 INFO L82 PathProgramCache]: Analyzing trace with hash 31849685, now seen corresponding path program 1 times [2019-12-07 17:10:01,033 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:10:01,033 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [803366511] [2019-12-07 17:10:01,033 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:10:01,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:10:01,069 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:10:01,069 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [803366511] [2019-12-07 17:10:01,070 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:10:01,070 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:10:01,070 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1439650296] [2019-12-07 17:10:01,070 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:10:01,070 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:10:01,070 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:10:01,071 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:10:01,071 INFO L87 Difference]: Start difference. First operand 178183 states and 738846 transitions. Second operand 3 states. [2019-12-07 17:10:01,180 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:10:01,180 INFO L93 Difference]: Finished difference Result 36088 states and 117391 transitions. [2019-12-07 17:10:01,181 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:10:01,181 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 13 [2019-12-07 17:10:01,181 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:10:01,232 INFO L225 Difference]: With dead ends: 36088 [2019-12-07 17:10:01,232 INFO L226 Difference]: Without dead ends: 36088 [2019-12-07 17:10:01,232 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:10:01,762 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36088 states. [2019-12-07 17:10:02,071 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36088 to 36088. [2019-12-07 17:10:02,071 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36088 states. [2019-12-07 17:10:02,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36088 states to 36088 states and 117391 transitions. [2019-12-07 17:10:02,132 INFO L78 Accepts]: Start accepts. Automaton has 36088 states and 117391 transitions. Word has length 13 [2019-12-07 17:10:02,132 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:10:02,132 INFO L462 AbstractCegarLoop]: Abstraction has 36088 states and 117391 transitions. [2019-12-07 17:10:02,132 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:10:02,132 INFO L276 IsEmpty]: Start isEmpty. Operand 36088 states and 117391 transitions. [2019-12-07 17:10:02,135 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 17:10:02,135 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:10:02,135 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:10:02,136 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:10:02,136 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:10:02,136 INFO L82 PathProgramCache]: Analyzing trace with hash -1539749953, now seen corresponding path program 1 times [2019-12-07 17:10:02,136 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:10:02,136 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1065108183] [2019-12-07 17:10:02,136 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:10:02,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:10:02,189 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:10:02,190 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1065108183] [2019-12-07 17:10:02,190 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:10:02,190 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:10:02,190 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [192438808] [2019-12-07 17:10:02,190 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:10:02,190 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:10:02,190 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:10:02,191 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:10:02,191 INFO L87 Difference]: Start difference. First operand 36088 states and 117391 transitions. Second operand 5 states. [2019-12-07 17:10:02,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:10:02,692 INFO L93 Difference]: Finished difference Result 49088 states and 156546 transitions. [2019-12-07 17:10:02,692 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:10:02,692 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 17:10:02,692 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:10:02,756 INFO L225 Difference]: With dead ends: 49088 [2019-12-07 17:10:02,757 INFO L226 Difference]: Without dead ends: 49075 [2019-12-07 17:10:02,757 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:10:02,983 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49075 states. [2019-12-07 17:10:03,394 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49075 to 36431. [2019-12-07 17:10:03,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36431 states. [2019-12-07 17:10:03,458 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36431 states to 36431 states and 118357 transitions. [2019-12-07 17:10:03,459 INFO L78 Accepts]: Start accepts. Automaton has 36431 states and 118357 transitions. Word has length 19 [2019-12-07 17:10:03,459 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:10:03,459 INFO L462 AbstractCegarLoop]: Abstraction has 36431 states and 118357 transitions. [2019-12-07 17:10:03,459 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:10:03,459 INFO L276 IsEmpty]: Start isEmpty. Operand 36431 states and 118357 transitions. [2019-12-07 17:10:03,467 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 17:10:03,467 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:10:03,467 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:10:03,467 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:10:03,468 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:10:03,468 INFO L82 PathProgramCache]: Analyzing trace with hash 1129453691, now seen corresponding path program 1 times [2019-12-07 17:10:03,468 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:10:03,468 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1005456497] [2019-12-07 17:10:03,468 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:10:03,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:10:03,515 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:10:03,515 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1005456497] [2019-12-07 17:10:03,515 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:10:03,516 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:10:03,516 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [232812204] [2019-12-07 17:10:03,516 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:10:03,516 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:10:03,516 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:10:03,517 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:10:03,517 INFO L87 Difference]: Start difference. First operand 36431 states and 118357 transitions. Second operand 4 states. [2019-12-07 17:10:03,542 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:10:03,542 INFO L93 Difference]: Finished difference Result 7050 states and 19283 transitions. [2019-12-07 17:10:03,543 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:10:03,543 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2019-12-07 17:10:03,543 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:10:03,548 INFO L225 Difference]: With dead ends: 7050 [2019-12-07 17:10:03,548 INFO L226 Difference]: Without dead ends: 7050 [2019-12-07 17:10:03,548 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:10:03,572 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7050 states. [2019-12-07 17:10:03,619 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7050 to 6938. [2019-12-07 17:10:03,619 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6938 states. [2019-12-07 17:10:03,627 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6938 states to 6938 states and 18963 transitions. [2019-12-07 17:10:03,627 INFO L78 Accepts]: Start accepts. Automaton has 6938 states and 18963 transitions. Word has length 25 [2019-12-07 17:10:03,627 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:10:03,627 INFO L462 AbstractCegarLoop]: Abstraction has 6938 states and 18963 transitions. [2019-12-07 17:10:03,628 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:10:03,628 INFO L276 IsEmpty]: Start isEmpty. Operand 6938 states and 18963 transitions. [2019-12-07 17:10:03,636 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-12-07 17:10:03,636 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:10:03,636 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:10:03,636 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:10:03,636 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:10:03,636 INFO L82 PathProgramCache]: Analyzing trace with hash -1811341367, now seen corresponding path program 1 times [2019-12-07 17:10:03,636 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:10:03,637 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2077298365] [2019-12-07 17:10:03,637 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:10:03,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:10:03,922 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:10:03,922 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2077298365] [2019-12-07 17:10:03,922 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:10:03,922 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 17:10:03,923 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [466178419] [2019-12-07 17:10:03,923 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 17:10:03,923 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:10:03,923 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 17:10:03,923 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2019-12-07 17:10:03,924 INFO L87 Difference]: Start difference. First operand 6938 states and 18963 transitions. Second operand 10 states. [2019-12-07 17:10:04,596 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:10:04,596 INFO L93 Difference]: Finished difference Result 9217 states and 24458 transitions. [2019-12-07 17:10:04,596 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 17:10:04,596 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 37 [2019-12-07 17:10:04,597 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:10:04,604 INFO L225 Difference]: With dead ends: 9217 [2019-12-07 17:10:04,604 INFO L226 Difference]: Without dead ends: 9217 [2019-12-07 17:10:04,604 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=96, Invalid=246, Unknown=0, NotChecked=0, Total=342 [2019-12-07 17:10:04,632 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9217 states. [2019-12-07 17:10:04,691 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9217 to 8187. [2019-12-07 17:10:04,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8187 states. [2019-12-07 17:10:04,701 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8187 states to 8187 states and 21997 transitions. [2019-12-07 17:10:04,701 INFO L78 Accepts]: Start accepts. Automaton has 8187 states and 21997 transitions. Word has length 37 [2019-12-07 17:10:04,701 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:10:04,701 INFO L462 AbstractCegarLoop]: Abstraction has 8187 states and 21997 transitions. [2019-12-07 17:10:04,701 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 17:10:04,701 INFO L276 IsEmpty]: Start isEmpty. Operand 8187 states and 21997 transitions. [2019-12-07 17:10:04,708 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-12-07 17:10:04,708 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:10:04,708 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:10:04,708 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:10:04,708 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:10:04,709 INFO L82 PathProgramCache]: Analyzing trace with hash 1409735543, now seen corresponding path program 2 times [2019-12-07 17:10:04,709 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:10:04,709 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [991780761] [2019-12-07 17:10:04,709 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:10:04,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:10:04,746 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:10:04,746 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [991780761] [2019-12-07 17:10:04,746 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:10:04,746 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:10:04,746 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [8456565] [2019-12-07 17:10:04,747 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:10:04,747 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:10:04,747 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:10:04,747 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:10:04,747 INFO L87 Difference]: Start difference. First operand 8187 states and 21997 transitions. Second operand 5 states. [2019-12-07 17:10:04,774 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:10:04,774 INFO L93 Difference]: Finished difference Result 5724 states and 16241 transitions. [2019-12-07 17:10:04,774 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:10:04,774 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 37 [2019-12-07 17:10:04,775 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:10:04,781 INFO L225 Difference]: With dead ends: 5724 [2019-12-07 17:10:04,781 INFO L226 Difference]: Without dead ends: 5724 [2019-12-07 17:10:04,782 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:10:04,809 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5724 states. [2019-12-07 17:10:04,852 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5724 to 5021. [2019-12-07 17:10:04,853 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5021 states. [2019-12-07 17:10:04,859 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5021 states to 5021 states and 14338 transitions. [2019-12-07 17:10:04,859 INFO L78 Accepts]: Start accepts. Automaton has 5021 states and 14338 transitions. Word has length 37 [2019-12-07 17:10:04,859 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:10:04,859 INFO L462 AbstractCegarLoop]: Abstraction has 5021 states and 14338 transitions. [2019-12-07 17:10:04,859 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:10:04,859 INFO L276 IsEmpty]: Start isEmpty. Operand 5021 states and 14338 transitions. [2019-12-07 17:10:04,865 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 17:10:04,865 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:10:04,865 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:10:04,865 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:10:04,866 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:10:04,866 INFO L82 PathProgramCache]: Analyzing trace with hash 1876753934, now seen corresponding path program 1 times [2019-12-07 17:10:04,866 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:10:04,866 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1384478176] [2019-12-07 17:10:04,866 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:10:04,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:10:04,901 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:10:04,901 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1384478176] [2019-12-07 17:10:04,901 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:10:04,901 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:10:04,902 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1872540574] [2019-12-07 17:10:04,902 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:10:04,902 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:10:04,902 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:10:04,902 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:10:04,902 INFO L87 Difference]: Start difference. First operand 5021 states and 14338 transitions. Second operand 3 states. [2019-12-07 17:10:04,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:10:04,936 INFO L93 Difference]: Finished difference Result 5032 states and 14352 transitions. [2019-12-07 17:10:04,936 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:10:04,936 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 17:10:04,937 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:10:04,941 INFO L225 Difference]: With dead ends: 5032 [2019-12-07 17:10:04,941 INFO L226 Difference]: Without dead ends: 5032 [2019-12-07 17:10:04,941 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:10:04,961 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5032 states. [2019-12-07 17:10:04,995 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5032 to 5028. [2019-12-07 17:10:04,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5028 states. [2019-12-07 17:10:05,001 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5028 states to 5028 states and 14348 transitions. [2019-12-07 17:10:05,001 INFO L78 Accepts]: Start accepts. Automaton has 5028 states and 14348 transitions. Word has length 65 [2019-12-07 17:10:05,001 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:10:05,001 INFO L462 AbstractCegarLoop]: Abstraction has 5028 states and 14348 transitions. [2019-12-07 17:10:05,002 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:10:05,002 INFO L276 IsEmpty]: Start isEmpty. Operand 5028 states and 14348 transitions. [2019-12-07 17:10:05,007 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 17:10:05,007 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:10:05,007 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:10:05,008 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:10:05,008 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:10:05,008 INFO L82 PathProgramCache]: Analyzing trace with hash 1173172274, now seen corresponding path program 1 times [2019-12-07 17:10:05,008 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:10:05,008 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2097950932] [2019-12-07 17:10:05,008 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:10:05,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:10:05,051 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:10:05,051 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2097950932] [2019-12-07 17:10:05,052 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:10:05,052 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:10:05,052 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1814149108] [2019-12-07 17:10:05,052 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:10:05,052 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:10:05,052 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:10:05,052 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:10:05,052 INFO L87 Difference]: Start difference. First operand 5028 states and 14348 transitions. Second operand 3 states. [2019-12-07 17:10:05,086 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:10:05,087 INFO L93 Difference]: Finished difference Result 5032 states and 14342 transitions. [2019-12-07 17:10:05,087 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:10:05,087 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 17:10:05,087 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:10:05,092 INFO L225 Difference]: With dead ends: 5032 [2019-12-07 17:10:05,092 INFO L226 Difference]: Without dead ends: 5032 [2019-12-07 17:10:05,092 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:10:05,113 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5032 states. [2019-12-07 17:10:05,148 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5032 to 5024. [2019-12-07 17:10:05,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5024 states. [2019-12-07 17:10:05,154 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5024 states to 5024 states and 14334 transitions. [2019-12-07 17:10:05,155 INFO L78 Accepts]: Start accepts. Automaton has 5024 states and 14334 transitions. Word has length 65 [2019-12-07 17:10:05,155 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:10:05,155 INFO L462 AbstractCegarLoop]: Abstraction has 5024 states and 14334 transitions. [2019-12-07 17:10:05,155 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:10:05,155 INFO L276 IsEmpty]: Start isEmpty. Operand 5024 states and 14334 transitions. [2019-12-07 17:10:05,161 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 17:10:05,161 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:10:05,161 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:10:05,161 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:10:05,162 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:10:05,162 INFO L82 PathProgramCache]: Analyzing trace with hash 1163492121, now seen corresponding path program 1 times [2019-12-07 17:10:05,162 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:10:05,162 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1498590336] [2019-12-07 17:10:05,162 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:10:05,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:10:05,214 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:10:05,215 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1498590336] [2019-12-07 17:10:05,215 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:10:05,215 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:10:05,215 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1725325098] [2019-12-07 17:10:05,215 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:10:05,215 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:10:05,215 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:10:05,216 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:10:05,216 INFO L87 Difference]: Start difference. First operand 5024 states and 14334 transitions. Second operand 5 states. [2019-12-07 17:10:05,434 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:10:05,434 INFO L93 Difference]: Finished difference Result 7476 states and 21200 transitions. [2019-12-07 17:10:05,434 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:10:05,435 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 65 [2019-12-07 17:10:05,435 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:10:05,441 INFO L225 Difference]: With dead ends: 7476 [2019-12-07 17:10:05,441 INFO L226 Difference]: Without dead ends: 7476 [2019-12-07 17:10:05,442 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:10:05,467 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7476 states. [2019-12-07 17:10:05,525 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7476 to 6331. [2019-12-07 17:10:05,525 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6331 states. [2019-12-07 17:10:05,533 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6331 states to 6331 states and 18103 transitions. [2019-12-07 17:10:05,533 INFO L78 Accepts]: Start accepts. Automaton has 6331 states and 18103 transitions. Word has length 65 [2019-12-07 17:10:05,533 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:10:05,533 INFO L462 AbstractCegarLoop]: Abstraction has 6331 states and 18103 transitions. [2019-12-07 17:10:05,533 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:10:05,533 INFO L276 IsEmpty]: Start isEmpty. Operand 6331 states and 18103 transitions. [2019-12-07 17:10:05,540 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 17:10:05,541 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:10:05,541 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:10:05,541 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:10:05,541 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:10:05,541 INFO L82 PathProgramCache]: Analyzing trace with hash -2061317327, now seen corresponding path program 2 times [2019-12-07 17:10:05,541 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:10:05,541 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [24513623] [2019-12-07 17:10:05,541 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:10:05,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:10:05,590 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:10:05,590 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [24513623] [2019-12-07 17:10:05,590 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:10:05,590 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:10:05,590 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2058664891] [2019-12-07 17:10:05,591 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:10:05,591 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:10:05,591 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:10:05,591 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:10:05,591 INFO L87 Difference]: Start difference. First operand 6331 states and 18103 transitions. Second operand 3 states. [2019-12-07 17:10:05,610 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:10:05,610 INFO L93 Difference]: Finished difference Result 6018 states and 16976 transitions. [2019-12-07 17:10:05,610 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:10:05,611 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 17:10:05,611 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:10:05,615 INFO L225 Difference]: With dead ends: 6018 [2019-12-07 17:10:05,615 INFO L226 Difference]: Without dead ends: 6018 [2019-12-07 17:10:05,615 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:10:05,636 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6018 states. [2019-12-07 17:10:05,679 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6018 to 5730. [2019-12-07 17:10:05,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5730 states. [2019-12-07 17:10:05,686 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5730 states to 5730 states and 16184 transitions. [2019-12-07 17:10:05,686 INFO L78 Accepts]: Start accepts. Automaton has 5730 states and 16184 transitions. Word has length 65 [2019-12-07 17:10:05,686 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:10:05,686 INFO L462 AbstractCegarLoop]: Abstraction has 5730 states and 16184 transitions. [2019-12-07 17:10:05,686 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:10:05,686 INFO L276 IsEmpty]: Start isEmpty. Operand 5730 states and 16184 transitions. [2019-12-07 17:10:05,692 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 17:10:05,692 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:10:05,692 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:10:05,692 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:10:05,692 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:10:05,693 INFO L82 PathProgramCache]: Analyzing trace with hash 373738635, now seen corresponding path program 1 times [2019-12-07 17:10:05,693 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:10:05,693 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1387946479] [2019-12-07 17:10:05,693 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:10:05,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:10:05,748 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:10:05,748 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1387946479] [2019-12-07 17:10:05,749 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:10:05,749 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:10:05,749 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [699263126] [2019-12-07 17:10:05,749 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:10:05,749 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:10:05,749 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:10:05,750 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:10:05,750 INFO L87 Difference]: Start difference. First operand 5730 states and 16184 transitions. Second operand 3 states. [2019-12-07 17:10:06,020 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:10:06,020 INFO L93 Difference]: Finished difference Result 5730 states and 15959 transitions. [2019-12-07 17:10:06,020 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:10:06,020 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 17:10:06,020 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:10:06,026 INFO L225 Difference]: With dead ends: 5730 [2019-12-07 17:10:06,026 INFO L226 Difference]: Without dead ends: 5730 [2019-12-07 17:10:06,026 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:10:06,050 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5730 states. [2019-12-07 17:10:06,086 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5730 to 5538. [2019-12-07 17:10:06,086 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5538 states. [2019-12-07 17:10:06,092 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5538 states to 5538 states and 15439 transitions. [2019-12-07 17:10:06,093 INFO L78 Accepts]: Start accepts. Automaton has 5538 states and 15439 transitions. Word has length 66 [2019-12-07 17:10:06,093 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:10:06,093 INFO L462 AbstractCegarLoop]: Abstraction has 5538 states and 15439 transitions. [2019-12-07 17:10:06,093 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:10:06,093 INFO L276 IsEmpty]: Start isEmpty. Operand 5538 states and 15439 transitions. [2019-12-07 17:10:06,099 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 17:10:06,099 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:10:06,099 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:10:06,099 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:10:06,099 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:10:06,099 INFO L82 PathProgramCache]: Analyzing trace with hash 184206773, now seen corresponding path program 1 times [2019-12-07 17:10:06,099 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:10:06,100 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1787866964] [2019-12-07 17:10:06,100 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:10:06,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:10:06,169 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:10:06,170 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1787866964] [2019-12-07 17:10:06,170 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:10:06,170 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:10:06,170 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [812037185] [2019-12-07 17:10:06,170 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:10:06,170 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:10:06,170 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:10:06,171 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:10:06,171 INFO L87 Difference]: Start difference. First operand 5538 states and 15439 transitions. Second operand 3 states. [2019-12-07 17:10:06,209 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:10:06,210 INFO L93 Difference]: Finished difference Result 5538 states and 15438 transitions. [2019-12-07 17:10:06,210 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:10:06,210 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-12-07 17:10:06,210 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:10:06,214 INFO L225 Difference]: With dead ends: 5538 [2019-12-07 17:10:06,214 INFO L226 Difference]: Without dead ends: 5538 [2019-12-07 17:10:06,215 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:10:06,235 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5538 states. [2019-12-07 17:10:06,270 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5538 to 3917. [2019-12-07 17:10:06,270 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3917 states. [2019-12-07 17:10:06,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3917 states to 3917 states and 10953 transitions. [2019-12-07 17:10:06,275 INFO L78 Accepts]: Start accepts. Automaton has 3917 states and 10953 transitions. Word has length 67 [2019-12-07 17:10:06,275 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:10:06,275 INFO L462 AbstractCegarLoop]: Abstraction has 3917 states and 10953 transitions. [2019-12-07 17:10:06,275 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:10:06,275 INFO L276 IsEmpty]: Start isEmpty. Operand 3917 states and 10953 transitions. [2019-12-07 17:10:06,279 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 17:10:06,279 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:10:06,279 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:10:06,279 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:10:06,279 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:10:06,280 INFO L82 PathProgramCache]: Analyzing trace with hash 823194101, now seen corresponding path program 1 times [2019-12-07 17:10:06,280 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:10:06,280 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [361862701] [2019-12-07 17:10:06,280 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:10:06,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:10:06,362 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:10:06,362 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [361862701] [2019-12-07 17:10:06,362 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:10:06,362 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:10:06,362 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1651966558] [2019-12-07 17:10:06,363 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 17:10:06,363 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:10:06,363 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 17:10:06,363 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:10:06,363 INFO L87 Difference]: Start difference. First operand 3917 states and 10953 transitions. Second operand 7 states. [2019-12-07 17:10:06,434 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:10:06,434 INFO L93 Difference]: Finished difference Result 7916 states and 22244 transitions. [2019-12-07 17:10:06,435 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 17:10:06,435 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 68 [2019-12-07 17:10:06,435 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:10:06,439 INFO L225 Difference]: With dead ends: 7916 [2019-12-07 17:10:06,439 INFO L226 Difference]: Without dead ends: 4613 [2019-12-07 17:10:06,439 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=61, Unknown=0, NotChecked=0, Total=90 [2019-12-07 17:10:06,458 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4613 states. [2019-12-07 17:10:06,486 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4613 to 3665. [2019-12-07 17:10:06,487 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3665 states. [2019-12-07 17:10:06,491 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3665 states to 3665 states and 10216 transitions. [2019-12-07 17:10:06,491 INFO L78 Accepts]: Start accepts. Automaton has 3665 states and 10216 transitions. Word has length 68 [2019-12-07 17:10:06,491 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:10:06,491 INFO L462 AbstractCegarLoop]: Abstraction has 3665 states and 10216 transitions. [2019-12-07 17:10:06,491 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 17:10:06,491 INFO L276 IsEmpty]: Start isEmpty. Operand 3665 states and 10216 transitions. [2019-12-07 17:10:06,495 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 17:10:06,495 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:10:06,495 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:10:06,495 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:10:06,495 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:10:06,495 INFO L82 PathProgramCache]: Analyzing trace with hash -829052917, now seen corresponding path program 2 times [2019-12-07 17:10:06,495 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:10:06,495 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1761130376] [2019-12-07 17:10:06,495 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:10:06,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:10:06,773 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:10:06,774 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1761130376] [2019-12-07 17:10:06,774 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:10:06,774 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 17:10:06,774 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [794863887] [2019-12-07 17:10:06,774 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 17:10:06,774 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:10:06,774 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 17:10:06,775 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=229, Unknown=0, NotChecked=0, Total=272 [2019-12-07 17:10:06,775 INFO L87 Difference]: Start difference. First operand 3665 states and 10216 transitions. Second operand 17 states. [2019-12-07 17:10:08,656 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:10:08,656 INFO L93 Difference]: Finished difference Result 10742 states and 29502 transitions. [2019-12-07 17:10:08,656 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 56 states. [2019-12-07 17:10:08,656 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 68 [2019-12-07 17:10:08,656 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:10:08,664 INFO L225 Difference]: With dead ends: 10742 [2019-12-07 17:10:08,664 INFO L226 Difference]: Without dead ends: 10266 [2019-12-07 17:10:08,666 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 5 SyntacticMatches, 1 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 970 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=542, Invalid=3240, Unknown=0, NotChecked=0, Total=3782 [2019-12-07 17:10:08,693 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10266 states. [2019-12-07 17:10:08,750 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10266 to 5938. [2019-12-07 17:10:08,750 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5938 states. [2019-12-07 17:10:08,757 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5938 states to 5938 states and 16468 transitions. [2019-12-07 17:10:08,757 INFO L78 Accepts]: Start accepts. Automaton has 5938 states and 16468 transitions. Word has length 68 [2019-12-07 17:10:08,757 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:10:08,758 INFO L462 AbstractCegarLoop]: Abstraction has 5938 states and 16468 transitions. [2019-12-07 17:10:08,758 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 17:10:08,758 INFO L276 IsEmpty]: Start isEmpty. Operand 5938 states and 16468 transitions. [2019-12-07 17:10:08,763 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 17:10:08,763 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:10:08,763 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:10:08,764 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:10:08,764 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:10:08,764 INFO L82 PathProgramCache]: Analyzing trace with hash 1851838847, now seen corresponding path program 3 times [2019-12-07 17:10:08,764 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:10:08,764 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1656649698] [2019-12-07 17:10:08,764 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:10:08,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:10:08,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:10:08,850 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 17:10:08,850 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 17:10:08,853 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] ULTIMATE.startENTRY-->L805: Formula: (let ((.cse0 (store |v_#valid_55| 0 0))) (and (= v_~__unbuffered_cnt~0_140 0) (= 0 v_~z$flush_delayed~0_34) (= (store |v_#length_26| |v_ULTIMATE.start_main_~#t2037~0.base_21| 4) |v_#length_25|) (= v_~z$r_buff1_thd0~0_308 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t2037~0.base_21|)) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t2037~0.base_21|) (= v_~z$w_buff1_used~0_516 0) (= v_~z$r_buff1_thd1~0_190 0) (= v_~z$read_delayed~0_8 0) (= |v_#valid_53| (store .cse0 |v_ULTIMATE.start_main_~#t2037~0.base_21| 1)) (= v_~z$w_buff0~0_342 0) (= v_~main$tmp_guard1~0_21 0) (= v_~z$read_delayed_var~0.offset_7 0) (< 0 |v_#StackHeapBarrier_18|) (= v_~z$r_buff1_thd2~0_206 0) (= v_~y~0_34 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t2037~0.base_21| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t2037~0.base_21|) |v_ULTIMATE.start_main_~#t2037~0.offset_17| 0)) |v_#memory_int_21|) (= 0 |v_#NULL.base_4|) (= 0 v_~z$r_buff0_thd3~0_140) (= v_~z$read_delayed_var~0.base_7 0) (= v_~z$r_buff0_thd1~0_226 0) (= 0 |v_ULTIMATE.start_main_~#t2037~0.offset_17|) (= v_~main$tmp_guard0~0_21 0) (= v_~weak$$choice2~0_109 0) (= v_~z$mem_tmp~0_19 0) (= v_~z$r_buff0_thd0~0_374 0) (= |v_#NULL.offset_4| 0) (= 0 v_~z$r_buff1_thd3~0_196) (= v_~z$r_buff0_thd2~0_140 0) (= 0 v_~__unbuffered_p2_EAX~0_36) (= v_~z$w_buff0_used~0_875 0) (= 0 v_~weak$$choice0~0_13) (= v_~z$w_buff1~0_249 0) (= 0 v_~x~0_138) (= v_~z~0_182 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_55|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_21|, ULTIMATE.start_main_~#t2039~0.offset=|v_ULTIMATE.start_main_~#t2039~0.offset_16|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_27|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_206, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_39|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_29|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_29|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_49|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_47|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_25|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_45|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_32|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_374, ULTIMATE.start_main_~#t2038~0.base=|v_ULTIMATE.start_main_~#t2038~0.base_20|, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_36, ~z$mem_tmp~0=v_~z$mem_tmp~0_19, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_10|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_43|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_42|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_516, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_52|, ~z$flush_delayed~0=v_~z$flush_delayed~0_34, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_111|, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_32|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_190, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_140, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_140, ULTIMATE.start_main_~#t2039~0.base=|v_ULTIMATE.start_main_~#t2039~0.base_20|, ~x~0=v_~x~0_138, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_21|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_33|, ~z$read_delayed~0=v_~z$read_delayed~0_8, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_31|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_29|, ~z$w_buff1~0=v_~z$w_buff1~0_249, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_21, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_121|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_17|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_25|, ULTIMATE.start_main_~#t2037~0.base=|v_ULTIMATE.start_main_~#t2037~0.base_21|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_41|, ULTIMATE.start_main_~#t2038~0.offset=|v_ULTIMATE.start_main_~#t2038~0.offset_17|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_31|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_308, ~y~0=v_~y~0_34, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_140, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_10|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_21|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_875, ~z$w_buff0~0=v_~z$w_buff0~0_342, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_196, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_25|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_54|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_21, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_59|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_38|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_32|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, #valid=|v_#valid_53|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_182, ULTIMATE.start_main_~#t2037~0.offset=|v_ULTIMATE.start_main_~#t2037~0.offset_17|, ~weak$$choice2~0=v_~weak$$choice2~0_109, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_226} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ULTIMATE.start_main_~#t2039~0.offset, ULTIMATE.start_main_#t~ite28, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ULTIMATE.start_main_~#t2038~0.base, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ~z$w_buff1_used~0, ULTIMATE.start_main_#t~ite37, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t2039~0.base, ~x~0, ULTIMATE.start_main_#t~nondet31, ULTIMATE.start_main_#t~ite29, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_~#t2037~0.base, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_~#t2038~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ~z$w_buff0_used~0, ~z$w_buff0~0, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ULTIMATE.start_main_~#t2037~0.offset, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:10:08,853 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L805-1-->L807: Formula: (and (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t2038~0.base_12|) (not (= |v_ULTIMATE.start_main_~#t2038~0.base_12| 0)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t2038~0.base_12| 4)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2038~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2038~0.base_12|) |v_ULTIMATE.start_main_~#t2038~0.offset_11| 1)) |v_#memory_int_13|) (= (store |v_#valid_35| |v_ULTIMATE.start_main_~#t2038~0.base_12| 1) |v_#valid_34|) (= 0 |v_ULTIMATE.start_main_~#t2038~0.offset_11|) (= 0 (select |v_#valid_35| |v_ULTIMATE.start_main_~#t2038~0.base_12|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t2038~0.offset=|v_ULTIMATE.start_main_~#t2038~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_6|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t2038~0.base=|v_ULTIMATE.start_main_~#t2038~0.base_12|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2038~0.offset, ULTIMATE.start_main_#t~nondet21, #valid, #memory_int, ULTIMATE.start_main_~#t2038~0.base, #length] because there is no mapped edge [2019-12-07 17:10:08,854 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [724] [724] P0ENTRY-->L4-3: Formula: (and (= v_~z$w_buff0_used~0_226 v_~z$w_buff1_used~0_114) (= v_P0Thread1of1ForFork0_~arg.base_20 |v_P0Thread1of1ForFork0_#in~arg.base_22|) (= 2 v_~z$w_buff0~0_55) (= v_~z$w_buff0~0_56 v_~z$w_buff1~0_53) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_24 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_20|) (= (ite (not (and (not (= 0 (mod v_~z$w_buff0_used~0_225 256))) (not (= 0 (mod v_~z$w_buff1_used~0_114 256))))) 1 0) |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_20|) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_24 0)) (= v_P0Thread1of1ForFork0_~arg.offset_20 |v_P0Thread1of1ForFork0_#in~arg.offset_22|) (= v_~z$w_buff0_used~0_225 1)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_22|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_226, ~z$w_buff0~0=v_~z$w_buff0~0_56, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_22|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_22|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_225, ~z$w_buff0~0=v_~z$w_buff0~0_55, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_24, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_114, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_22|, ~z$w_buff1~0=v_~z$w_buff1~0_53, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_20, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_20|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_20} AuxVars[] AssignedVars[~z$w_buff0_used~0, ~z$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~z$w_buff1_used~0, ~z$w_buff1~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 17:10:08,854 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L807-1-->L809: Formula: (and (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t2039~0.base_9| 1)) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t2039~0.base_9| 4)) (= 0 |v_ULTIMATE.start_main_~#t2039~0.offset_8|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t2039~0.base_9|) (= (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t2039~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t2039~0.base_9|) |v_ULTIMATE.start_main_~#t2039~0.offset_8| 2)) |v_#memory_int_9|) (not (= |v_ULTIMATE.start_main_~#t2039~0.base_9| 0)) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t2039~0.base_9|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t2039~0.offset=|v_ULTIMATE.start_main_~#t2039~0.offset_8|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_9|, #length=|v_#length_13|, ULTIMATE.start_main_~#t2039~0.base=|v_ULTIMATE.start_main_~#t2039~0.base_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2039~0.offset, ULTIMATE.start_main_#t~nondet22, #valid, #memory_int, #length, ULTIMATE.start_main_~#t2039~0.base] because there is no mapped edge [2019-12-07 17:10:08,855 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L743-->L743-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In686230072 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd1~0_In686230072 256) 0))) (or (and (= ~z$w_buff0_used~0_In686230072 |P0Thread1of1ForFork0_#t~ite5_Out686230072|) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out686230072|) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In686230072, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In686230072} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out686230072|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In686230072, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In686230072} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 17:10:08,855 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L744-->L744-2: Formula: (let ((.cse3 (= (mod ~z$w_buff0_used~0_In-308498725 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In-308498725 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In-308498725 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd1~0_In-308498725 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite6_Out-308498725| 0)) (and (= ~z$w_buff1_used~0_In-308498725 |P0Thread1of1ForFork0_#t~ite6_Out-308498725|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-308498725, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-308498725, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-308498725, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-308498725} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-308498725|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-308498725, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-308498725, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-308498725, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-308498725} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 17:10:08,856 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L745-->L746: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In606523300 256))) (.cse0 (= ~z$r_buff0_thd1~0_Out606523300 ~z$r_buff0_thd1~0_In606523300)) (.cse2 (= (mod ~z$w_buff0_used~0_In606523300 256) 0))) (or (and .cse0 .cse1) (and (= ~z$r_buff0_thd1~0_Out606523300 0) (not .cse1) (not .cse2)) (and .cse0 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In606523300, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In606523300} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In606523300, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out606523300|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out606523300} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:10:08,856 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L746-->L746-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In-342514464 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd1~0_In-342514464 256))) (.cse3 (= (mod ~z$w_buff0_used~0_In-342514464 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In-342514464 256)))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite8_Out-342514464|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$r_buff1_thd1~0_In-342514464 |P0Thread1of1ForFork0_#t~ite8_Out-342514464|) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-342514464, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-342514464, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-342514464, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-342514464} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-342514464, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-342514464|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-342514464, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-342514464, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-342514464} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 17:10:08,856 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L746-2-->P0EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_44 1) v_~__unbuffered_cnt~0_43) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~z$r_buff1_thd1~0_63 |v_P0Thread1of1ForFork0_#t~ite8_26|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_44} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_25|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_63, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_43} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, ~z$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 17:10:08,857 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L762-2-->L762-5: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In-351621619 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In-351621619 256) 0)) (.cse2 (= |P1Thread1of1ForFork1_#t~ite10_Out-351621619| |P1Thread1of1ForFork1_#t~ite9_Out-351621619|))) (or (and (not .cse0) (= ~z$w_buff1~0_In-351621619 |P1Thread1of1ForFork1_#t~ite9_Out-351621619|) (not .cse1) .cse2) (and (or .cse0 .cse1) .cse2 (= ~z~0_In-351621619 |P1Thread1of1ForFork1_#t~ite9_Out-351621619|)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-351621619, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-351621619, ~z$w_buff1~0=~z$w_buff1~0_In-351621619, ~z~0=~z~0_In-351621619} OutVars{P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out-351621619|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-351621619, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-351621619, P1Thread1of1ForFork1_#t~ite10=|P1Thread1of1ForFork1_#t~ite10_Out-351621619|, ~z$w_buff1~0=~z$w_buff1~0_In-351621619, ~z~0=~z~0_In-351621619} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10] because there is no mapped edge [2019-12-07 17:10:08,857 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L782-2-->L782-4: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In-1609766594 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In-1609766594 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite15_Out-1609766594| ~z$w_buff1~0_In-1609766594)) (and (= |P2Thread1of1ForFork2_#t~ite15_Out-1609766594| ~z~0_In-1609766594) (or .cse0 .cse1)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1609766594, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1609766594, ~z$w_buff1~0=~z$w_buff1~0_In-1609766594, ~z~0=~z~0_In-1609766594} OutVars{P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out-1609766594|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1609766594, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1609766594, ~z$w_buff1~0=~z$w_buff1~0_In-1609766594, ~z~0=~z~0_In-1609766594} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 17:10:08,857 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L782-4-->L783: Formula: (= |v_P2Thread1of1ForFork2_#t~ite15_8| v_~z~0_20) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_8|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_7|, ~z~0=v_~z~0_20, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_11|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, ~z~0, P2Thread1of1ForFork2_#t~ite16] because there is no mapped edge [2019-12-07 17:10:08,857 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L783-->L783-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1335209998 256))) (.cse0 (= (mod ~z$r_buff0_thd3~0_In1335209998 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite17_Out1335209998| ~z$w_buff0_used~0_In1335209998)) (and (= 0 |P2Thread1of1ForFork2_#t~ite17_Out1335209998|) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1335209998, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1335209998} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1335209998, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1335209998, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out1335209998|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 17:10:08,858 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L784-->L784-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In-1120921837 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1120921837 256))) (.cse3 (= (mod ~z$r_buff0_thd3~0_In-1120921837 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1120921837 256)))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite18_Out-1120921837|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In-1120921837 |P2Thread1of1ForFork2_#t~ite18_Out-1120921837|) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1120921837, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1120921837, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1120921837, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1120921837} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1120921837, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1120921837, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1120921837, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1120921837, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out-1120921837|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 17:10:08,858 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] L785-->L785-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1939096546 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1939096546 256)))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite19_Out1939096546|) (not .cse1)) (and (or .cse0 .cse1) (= ~z$r_buff0_thd3~0_In1939096546 |P2Thread1of1ForFork2_#t~ite19_Out1939096546|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1939096546, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1939096546} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1939096546, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1939096546, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out1939096546|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 17:10:08,858 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L786-->L786-2: Formula: (let ((.cse2 (= (mod ~z$w_buff1_used~0_In-1881895725 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd3~0_In-1881895725 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1881895725 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-1881895725 256)))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite20_Out-1881895725|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse1 .cse0) (= |P2Thread1of1ForFork2_#t~ite20_Out-1881895725| ~z$r_buff1_thd3~0_In-1881895725)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1881895725, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1881895725, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1881895725, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1881895725} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1881895725, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out-1881895725|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1881895725, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1881895725, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1881895725} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 17:10:08,858 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [804] [804] L786-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= v_~__unbuffered_cnt~0_54 (+ v_~__unbuffered_cnt~0_55 1)) (= |v_P2Thread1of1ForFork2_#t~ite20_30| v_~z$r_buff1_thd3~0_67)) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_30|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55} OutVars{P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_29|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_67, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, ~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 17:10:08,858 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L763-->L763-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In1273576336 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In1273576336 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite11_Out1273576336| 0) (not .cse0) (not .cse1)) (and (= |P1Thread1of1ForFork1_#t~ite11_Out1273576336| ~z$w_buff0_used~0_In1273576336) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1273576336, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1273576336} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1273576336, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out1273576336|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1273576336} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 17:10:08,859 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L764-->L764-2: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In-307138578 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In-307138578 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd2~0_In-307138578 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-307138578 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite12_Out-307138578| 0)) (and (or .cse1 .cse0) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In-307138578 |P1Thread1of1ForFork1_#t~ite12_Out-307138578|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-307138578, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-307138578, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-307138578, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-307138578} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-307138578, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-307138578, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-307138578, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-307138578|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-307138578} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 17:10:08,859 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L765-->L765-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In1974063873 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd2~0_In1974063873 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite13_Out1974063873| ~z$r_buff0_thd2~0_In1974063873) (or .cse0 .cse1)) (and (not .cse1) (= |P1Thread1of1ForFork1_#t~ite13_Out1974063873| 0) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1974063873, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1974063873} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1974063873, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out1974063873|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1974063873} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 17:10:08,859 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L766-->L766-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-978361699 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In-978361699 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In-978361699 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd2~0_In-978361699 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork1_#t~ite14_Out-978361699| ~z$r_buff1_thd2~0_In-978361699)) (and (= 0 |P1Thread1of1ForFork1_#t~ite14_Out-978361699|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-978361699, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-978361699, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-978361699, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-978361699} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-978361699, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-978361699, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-978361699, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-978361699|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-978361699} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 17:10:08,859 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L766-2-->P1EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_61 1) v_~__unbuffered_cnt~0_60) (= |v_P1Thread1of1ForFork1_#t~ite14_30| v_~z$r_buff1_thd2~0_84) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_30|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_84, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_29|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 17:10:08,860 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [708] [708] L809-1-->L815: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_18) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_18} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_18, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 17:10:08,860 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L815-2-->L815-5: Formula: (let ((.cse2 (= |ULTIMATE.start_main_#t~ite25_Out-490919227| |ULTIMATE.start_main_#t~ite24_Out-490919227|)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-490919227 256))) (.cse0 (= (mod ~z$r_buff1_thd0~0_In-490919227 256) 0))) (or (and (not .cse0) (not .cse1) (= ~z$w_buff1~0_In-490919227 |ULTIMATE.start_main_#t~ite24_Out-490919227|) .cse2) (and (= ~z~0_In-490919227 |ULTIMATE.start_main_#t~ite24_Out-490919227|) .cse2 (or .cse1 .cse0)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-490919227, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-490919227, ~z$w_buff1~0=~z$w_buff1~0_In-490919227, ~z~0=~z~0_In-490919227} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-490919227, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out-490919227|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-490919227, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out-490919227|, ~z$w_buff1~0=~z$w_buff1~0_In-490919227, ~z~0=~z~0_In-490919227} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 17:10:08,860 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L816-->L816-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-1764628685 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1764628685 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-1764628685 |ULTIMATE.start_main_#t~ite26_Out-1764628685|)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite26_Out-1764628685| 0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1764628685, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1764628685} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1764628685, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1764628685, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out-1764628685|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 17:10:08,860 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L817-->L817-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff0_used~0_In477671427 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd0~0_In477671427 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In477671427 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In477671427 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite27_Out477671427| ~z$w_buff1_used~0_In477671427)) (and (= 0 |ULTIMATE.start_main_#t~ite27_Out477671427|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In477671427, ~z$w_buff0_used~0=~z$w_buff0_used~0_In477671427, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In477671427, ~z$w_buff1_used~0=~z$w_buff1_used~0_In477671427} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In477671427, ~z$w_buff0_used~0=~z$w_buff0_used~0_In477671427, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In477671427, ~z$w_buff1_used~0=~z$w_buff1_used~0_In477671427, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out477671427|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 17:10:08,861 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L818-->L818-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-948031726 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-948031726 256)))) (or (and (= |ULTIMATE.start_main_#t~ite28_Out-948031726| ~z$r_buff0_thd0~0_In-948031726) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite28_Out-948031726|) (not .cse0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-948031726, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-948031726} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-948031726, ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out-948031726|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-948031726} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 17:10:08,861 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L819-->L819-2: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In470643174 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In470643174 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd0~0_In470643174 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In470643174 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite29_Out470643174| ~z$r_buff1_thd0~0_In470643174)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= |ULTIMATE.start_main_#t~ite29_Out470643174| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In470643174, ~z$w_buff0_used~0=~z$w_buff0_used~0_In470643174, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In470643174, ~z$w_buff1_used~0=~z$w_buff1_used~0_In470643174} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In470643174, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out470643174|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In470643174, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In470643174, ~z$w_buff1_used~0=~z$w_buff1_used~0_In470643174} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 17:10:08,863 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L831-->L832: Formula: (and (= v_~z$r_buff0_thd0~0_103 v_~z$r_buff0_thd0~0_102) (not (= (mod v_~weak$$choice2~0_23 256) 0))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_103, ~weak$$choice2~0=v_~weak$$choice2~0_23} OutVars{~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_102, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_6|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_10|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|, ~weak$$choice2~0=v_~weak$$choice2~0_23} AuxVars[] AssignedVars[~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 17:10:08,864 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L834-->L837-1: Formula: (and (= v_~z$mem_tmp~0_11 v_~z~0_133) (= (mod v_~main$tmp_guard1~0_9 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (not (= 0 (mod v_~z$flush_delayed~0_21 256))) (= 0 v_~z$flush_delayed~0_20)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_11, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_21} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_11, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_18|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_20, ~z~0=v_~z~0_133, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:10:08,864 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L837-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 17:10:08,934 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 05:10:08 BasicIcfg [2019-12-07 17:10:08,935 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 17:10:08,935 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 17:10:08,935 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 17:10:08,935 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 17:10:08,935 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:09:17" (3/4) ... [2019-12-07 17:10:08,937 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 17:10:08,937 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] ULTIMATE.startENTRY-->L805: Formula: (let ((.cse0 (store |v_#valid_55| 0 0))) (and (= v_~__unbuffered_cnt~0_140 0) (= 0 v_~z$flush_delayed~0_34) (= (store |v_#length_26| |v_ULTIMATE.start_main_~#t2037~0.base_21| 4) |v_#length_25|) (= v_~z$r_buff1_thd0~0_308 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t2037~0.base_21|)) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t2037~0.base_21|) (= v_~z$w_buff1_used~0_516 0) (= v_~z$r_buff1_thd1~0_190 0) (= v_~z$read_delayed~0_8 0) (= |v_#valid_53| (store .cse0 |v_ULTIMATE.start_main_~#t2037~0.base_21| 1)) (= v_~z$w_buff0~0_342 0) (= v_~main$tmp_guard1~0_21 0) (= v_~z$read_delayed_var~0.offset_7 0) (< 0 |v_#StackHeapBarrier_18|) (= v_~z$r_buff1_thd2~0_206 0) (= v_~y~0_34 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t2037~0.base_21| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t2037~0.base_21|) |v_ULTIMATE.start_main_~#t2037~0.offset_17| 0)) |v_#memory_int_21|) (= 0 |v_#NULL.base_4|) (= 0 v_~z$r_buff0_thd3~0_140) (= v_~z$read_delayed_var~0.base_7 0) (= v_~z$r_buff0_thd1~0_226 0) (= 0 |v_ULTIMATE.start_main_~#t2037~0.offset_17|) (= v_~main$tmp_guard0~0_21 0) (= v_~weak$$choice2~0_109 0) (= v_~z$mem_tmp~0_19 0) (= v_~z$r_buff0_thd0~0_374 0) (= |v_#NULL.offset_4| 0) (= 0 v_~z$r_buff1_thd3~0_196) (= v_~z$r_buff0_thd2~0_140 0) (= 0 v_~__unbuffered_p2_EAX~0_36) (= v_~z$w_buff0_used~0_875 0) (= 0 v_~weak$$choice0~0_13) (= v_~z$w_buff1~0_249 0) (= 0 v_~x~0_138) (= v_~z~0_182 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_55|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_21|, ULTIMATE.start_main_~#t2039~0.offset=|v_ULTIMATE.start_main_~#t2039~0.offset_16|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_27|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_206, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_39|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_29|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_29|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_49|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_47|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_25|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_45|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_32|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_374, ULTIMATE.start_main_~#t2038~0.base=|v_ULTIMATE.start_main_~#t2038~0.base_20|, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_36, ~z$mem_tmp~0=v_~z$mem_tmp~0_19, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_10|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_43|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_42|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_516, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_52|, ~z$flush_delayed~0=v_~z$flush_delayed~0_34, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_111|, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_32|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_190, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_140, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_140, ULTIMATE.start_main_~#t2039~0.base=|v_ULTIMATE.start_main_~#t2039~0.base_20|, ~x~0=v_~x~0_138, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_21|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_33|, ~z$read_delayed~0=v_~z$read_delayed~0_8, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_31|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_29|, ~z$w_buff1~0=v_~z$w_buff1~0_249, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_21, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_121|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_17|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_25|, ULTIMATE.start_main_~#t2037~0.base=|v_ULTIMATE.start_main_~#t2037~0.base_21|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_41|, ULTIMATE.start_main_~#t2038~0.offset=|v_ULTIMATE.start_main_~#t2038~0.offset_17|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_31|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_308, ~y~0=v_~y~0_34, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_140, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_10|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_21|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_875, ~z$w_buff0~0=v_~z$w_buff0~0_342, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_196, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_25|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_54|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_21, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_59|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_38|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_32|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, #valid=|v_#valid_53|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_182, ULTIMATE.start_main_~#t2037~0.offset=|v_ULTIMATE.start_main_~#t2037~0.offset_17|, ~weak$$choice2~0=v_~weak$$choice2~0_109, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_226} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ULTIMATE.start_main_~#t2039~0.offset, ULTIMATE.start_main_#t~ite28, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ULTIMATE.start_main_~#t2038~0.base, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ~z$w_buff1_used~0, ULTIMATE.start_main_#t~ite37, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t2039~0.base, ~x~0, ULTIMATE.start_main_#t~nondet31, ULTIMATE.start_main_#t~ite29, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_~#t2037~0.base, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_~#t2038~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ~z$w_buff0_used~0, ~z$w_buff0~0, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ULTIMATE.start_main_~#t2037~0.offset, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:10:08,937 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L805-1-->L807: Formula: (and (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t2038~0.base_12|) (not (= |v_ULTIMATE.start_main_~#t2038~0.base_12| 0)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t2038~0.base_12| 4)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2038~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2038~0.base_12|) |v_ULTIMATE.start_main_~#t2038~0.offset_11| 1)) |v_#memory_int_13|) (= (store |v_#valid_35| |v_ULTIMATE.start_main_~#t2038~0.base_12| 1) |v_#valid_34|) (= 0 |v_ULTIMATE.start_main_~#t2038~0.offset_11|) (= 0 (select |v_#valid_35| |v_ULTIMATE.start_main_~#t2038~0.base_12|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t2038~0.offset=|v_ULTIMATE.start_main_~#t2038~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_6|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t2038~0.base=|v_ULTIMATE.start_main_~#t2038~0.base_12|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2038~0.offset, ULTIMATE.start_main_#t~nondet21, #valid, #memory_int, ULTIMATE.start_main_~#t2038~0.base, #length] because there is no mapped edge [2019-12-07 17:10:08,937 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [724] [724] P0ENTRY-->L4-3: Formula: (and (= v_~z$w_buff0_used~0_226 v_~z$w_buff1_used~0_114) (= v_P0Thread1of1ForFork0_~arg.base_20 |v_P0Thread1of1ForFork0_#in~arg.base_22|) (= 2 v_~z$w_buff0~0_55) (= v_~z$w_buff0~0_56 v_~z$w_buff1~0_53) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_24 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_20|) (= (ite (not (and (not (= 0 (mod v_~z$w_buff0_used~0_225 256))) (not (= 0 (mod v_~z$w_buff1_used~0_114 256))))) 1 0) |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_20|) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_24 0)) (= v_P0Thread1of1ForFork0_~arg.offset_20 |v_P0Thread1of1ForFork0_#in~arg.offset_22|) (= v_~z$w_buff0_used~0_225 1)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_22|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_226, ~z$w_buff0~0=v_~z$w_buff0~0_56, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_22|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_22|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_225, ~z$w_buff0~0=v_~z$w_buff0~0_55, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_24, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_114, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_22|, ~z$w_buff1~0=v_~z$w_buff1~0_53, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_20, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_20|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_20} AuxVars[] AssignedVars[~z$w_buff0_used~0, ~z$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~z$w_buff1_used~0, ~z$w_buff1~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 17:10:08,938 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L807-1-->L809: Formula: (and (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t2039~0.base_9| 1)) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t2039~0.base_9| 4)) (= 0 |v_ULTIMATE.start_main_~#t2039~0.offset_8|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t2039~0.base_9|) (= (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t2039~0.base_9| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t2039~0.base_9|) |v_ULTIMATE.start_main_~#t2039~0.offset_8| 2)) |v_#memory_int_9|) (not (= |v_ULTIMATE.start_main_~#t2039~0.base_9| 0)) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t2039~0.base_9|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_10|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t2039~0.offset=|v_ULTIMATE.start_main_~#t2039~0.offset_8|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_9|, #length=|v_#length_13|, ULTIMATE.start_main_~#t2039~0.base=|v_ULTIMATE.start_main_~#t2039~0.base_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2039~0.offset, ULTIMATE.start_main_#t~nondet22, #valid, #memory_int, #length, ULTIMATE.start_main_~#t2039~0.base] because there is no mapped edge [2019-12-07 17:10:08,938 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L743-->L743-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In686230072 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd1~0_In686230072 256) 0))) (or (and (= ~z$w_buff0_used~0_In686230072 |P0Thread1of1ForFork0_#t~ite5_Out686230072|) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out686230072|) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In686230072, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In686230072} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out686230072|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In686230072, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In686230072} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 17:10:08,939 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L744-->L744-2: Formula: (let ((.cse3 (= (mod ~z$w_buff0_used~0_In-308498725 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In-308498725 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In-308498725 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd1~0_In-308498725 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite6_Out-308498725| 0)) (and (= ~z$w_buff1_used~0_In-308498725 |P0Thread1of1ForFork0_#t~ite6_Out-308498725|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-308498725, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-308498725, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-308498725, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-308498725} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-308498725|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-308498725, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-308498725, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-308498725, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-308498725} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 17:10:08,939 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L745-->L746: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In606523300 256))) (.cse0 (= ~z$r_buff0_thd1~0_Out606523300 ~z$r_buff0_thd1~0_In606523300)) (.cse2 (= (mod ~z$w_buff0_used~0_In606523300 256) 0))) (or (and .cse0 .cse1) (and (= ~z$r_buff0_thd1~0_Out606523300 0) (not .cse1) (not .cse2)) (and .cse0 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In606523300, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In606523300} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In606523300, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out606523300|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out606523300} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 17:10:08,939 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L746-->L746-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In-342514464 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd1~0_In-342514464 256))) (.cse3 (= (mod ~z$w_buff0_used~0_In-342514464 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In-342514464 256)))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite8_Out-342514464|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$r_buff1_thd1~0_In-342514464 |P0Thread1of1ForFork0_#t~ite8_Out-342514464|) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-342514464, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-342514464, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-342514464, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-342514464} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-342514464, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-342514464|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-342514464, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-342514464, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-342514464} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 17:10:08,940 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L746-2-->P0EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_44 1) v_~__unbuffered_cnt~0_43) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~z$r_buff1_thd1~0_63 |v_P0Thread1of1ForFork0_#t~ite8_26|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_44} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_25|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_63, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_43} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, ~z$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 17:10:08,940 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L762-2-->L762-5: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In-351621619 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In-351621619 256) 0)) (.cse2 (= |P1Thread1of1ForFork1_#t~ite10_Out-351621619| |P1Thread1of1ForFork1_#t~ite9_Out-351621619|))) (or (and (not .cse0) (= ~z$w_buff1~0_In-351621619 |P1Thread1of1ForFork1_#t~ite9_Out-351621619|) (not .cse1) .cse2) (and (or .cse0 .cse1) .cse2 (= ~z~0_In-351621619 |P1Thread1of1ForFork1_#t~ite9_Out-351621619|)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-351621619, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-351621619, ~z$w_buff1~0=~z$w_buff1~0_In-351621619, ~z~0=~z~0_In-351621619} OutVars{P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out-351621619|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-351621619, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-351621619, P1Thread1of1ForFork1_#t~ite10=|P1Thread1of1ForFork1_#t~ite10_Out-351621619|, ~z$w_buff1~0=~z$w_buff1~0_In-351621619, ~z~0=~z~0_In-351621619} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10] because there is no mapped edge [2019-12-07 17:10:08,940 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L782-2-->L782-4: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In-1609766594 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In-1609766594 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite15_Out-1609766594| ~z$w_buff1~0_In-1609766594)) (and (= |P2Thread1of1ForFork2_#t~ite15_Out-1609766594| ~z~0_In-1609766594) (or .cse0 .cse1)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1609766594, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1609766594, ~z$w_buff1~0=~z$w_buff1~0_In-1609766594, ~z~0=~z~0_In-1609766594} OutVars{P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out-1609766594|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1609766594, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1609766594, ~z$w_buff1~0=~z$w_buff1~0_In-1609766594, ~z~0=~z~0_In-1609766594} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 17:10:08,940 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L782-4-->L783: Formula: (= |v_P2Thread1of1ForFork2_#t~ite15_8| v_~z~0_20) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_8|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_7|, ~z~0=v_~z~0_20, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_11|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, ~z~0, P2Thread1of1ForFork2_#t~ite16] because there is no mapped edge [2019-12-07 17:10:08,940 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L783-->L783-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1335209998 256))) (.cse0 (= (mod ~z$r_buff0_thd3~0_In1335209998 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite17_Out1335209998| ~z$w_buff0_used~0_In1335209998)) (and (= 0 |P2Thread1of1ForFork2_#t~ite17_Out1335209998|) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1335209998, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1335209998} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1335209998, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1335209998, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out1335209998|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 17:10:08,941 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L784-->L784-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In-1120921837 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1120921837 256))) (.cse3 (= (mod ~z$r_buff0_thd3~0_In-1120921837 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1120921837 256)))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite18_Out-1120921837|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In-1120921837 |P2Thread1of1ForFork2_#t~ite18_Out-1120921837|) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1120921837, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1120921837, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1120921837, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1120921837} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1120921837, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1120921837, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1120921837, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1120921837, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out-1120921837|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 17:10:08,941 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] L785-->L785-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1939096546 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1939096546 256)))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite19_Out1939096546|) (not .cse1)) (and (or .cse0 .cse1) (= ~z$r_buff0_thd3~0_In1939096546 |P2Thread1of1ForFork2_#t~ite19_Out1939096546|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1939096546, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1939096546} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1939096546, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1939096546, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out1939096546|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 17:10:08,941 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L786-->L786-2: Formula: (let ((.cse2 (= (mod ~z$w_buff1_used~0_In-1881895725 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd3~0_In-1881895725 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1881895725 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-1881895725 256)))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite20_Out-1881895725|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse1 .cse0) (= |P2Thread1of1ForFork2_#t~ite20_Out-1881895725| ~z$r_buff1_thd3~0_In-1881895725)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1881895725, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1881895725, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1881895725, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1881895725} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1881895725, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out-1881895725|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1881895725, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1881895725, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1881895725} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 17:10:08,941 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [804] [804] L786-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= v_~__unbuffered_cnt~0_54 (+ v_~__unbuffered_cnt~0_55 1)) (= |v_P2Thread1of1ForFork2_#t~ite20_30| v_~z$r_buff1_thd3~0_67)) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_30|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55} OutVars{P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_29|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_67, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, ~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 17:10:08,942 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L763-->L763-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In1273576336 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In1273576336 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite11_Out1273576336| 0) (not .cse0) (not .cse1)) (and (= |P1Thread1of1ForFork1_#t~ite11_Out1273576336| ~z$w_buff0_used~0_In1273576336) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1273576336, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1273576336} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1273576336, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out1273576336|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1273576336} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 17:10:08,942 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L764-->L764-2: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In-307138578 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In-307138578 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd2~0_In-307138578 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-307138578 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite12_Out-307138578| 0)) (and (or .cse1 .cse0) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In-307138578 |P1Thread1of1ForFork1_#t~ite12_Out-307138578|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-307138578, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-307138578, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-307138578, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-307138578} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-307138578, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-307138578, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-307138578, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-307138578|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-307138578} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 17:10:08,942 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L765-->L765-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In1974063873 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd2~0_In1974063873 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite13_Out1974063873| ~z$r_buff0_thd2~0_In1974063873) (or .cse0 .cse1)) (and (not .cse1) (= |P1Thread1of1ForFork1_#t~ite13_Out1974063873| 0) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1974063873, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1974063873} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1974063873, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out1974063873|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1974063873} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 17:10:08,942 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L766-->L766-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-978361699 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In-978361699 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In-978361699 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd2~0_In-978361699 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork1_#t~ite14_Out-978361699| ~z$r_buff1_thd2~0_In-978361699)) (and (= 0 |P1Thread1of1ForFork1_#t~ite14_Out-978361699|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-978361699, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-978361699, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-978361699, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-978361699} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-978361699, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-978361699, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-978361699, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-978361699|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-978361699} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 17:10:08,942 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L766-2-->P1EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_61 1) v_~__unbuffered_cnt~0_60) (= |v_P1Thread1of1ForFork1_#t~ite14_30| v_~z$r_buff1_thd2~0_84) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_30|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_84, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_29|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 17:10:08,943 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [708] [708] L809-1-->L815: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_18) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_18} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_18, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 17:10:08,943 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L815-2-->L815-5: Formula: (let ((.cse2 (= |ULTIMATE.start_main_#t~ite25_Out-490919227| |ULTIMATE.start_main_#t~ite24_Out-490919227|)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-490919227 256))) (.cse0 (= (mod ~z$r_buff1_thd0~0_In-490919227 256) 0))) (or (and (not .cse0) (not .cse1) (= ~z$w_buff1~0_In-490919227 |ULTIMATE.start_main_#t~ite24_Out-490919227|) .cse2) (and (= ~z~0_In-490919227 |ULTIMATE.start_main_#t~ite24_Out-490919227|) .cse2 (or .cse1 .cse0)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-490919227, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-490919227, ~z$w_buff1~0=~z$w_buff1~0_In-490919227, ~z~0=~z~0_In-490919227} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-490919227, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out-490919227|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-490919227, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out-490919227|, ~z$w_buff1~0=~z$w_buff1~0_In-490919227, ~z~0=~z~0_In-490919227} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 17:10:08,943 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L816-->L816-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-1764628685 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1764628685 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-1764628685 |ULTIMATE.start_main_#t~ite26_Out-1764628685|)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite26_Out-1764628685| 0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1764628685, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1764628685} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1764628685, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1764628685, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out-1764628685|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 17:10:08,943 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L817-->L817-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff0_used~0_In477671427 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd0~0_In477671427 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In477671427 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In477671427 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite27_Out477671427| ~z$w_buff1_used~0_In477671427)) (and (= 0 |ULTIMATE.start_main_#t~ite27_Out477671427|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In477671427, ~z$w_buff0_used~0=~z$w_buff0_used~0_In477671427, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In477671427, ~z$w_buff1_used~0=~z$w_buff1_used~0_In477671427} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In477671427, ~z$w_buff0_used~0=~z$w_buff0_used~0_In477671427, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In477671427, ~z$w_buff1_used~0=~z$w_buff1_used~0_In477671427, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out477671427|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 17:10:08,944 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L818-->L818-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-948031726 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-948031726 256)))) (or (and (= |ULTIMATE.start_main_#t~ite28_Out-948031726| ~z$r_buff0_thd0~0_In-948031726) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite28_Out-948031726|) (not .cse0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-948031726, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-948031726} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-948031726, ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out-948031726|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-948031726} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 17:10:08,944 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L819-->L819-2: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In470643174 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In470643174 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd0~0_In470643174 256))) (.cse2 (= (mod ~z$w_buff0_used~0_In470643174 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite29_Out470643174| ~z$r_buff1_thd0~0_In470643174)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= |ULTIMATE.start_main_#t~ite29_Out470643174| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In470643174, ~z$w_buff0_used~0=~z$w_buff0_used~0_In470643174, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In470643174, ~z$w_buff1_used~0=~z$w_buff1_used~0_In470643174} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In470643174, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out470643174|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In470643174, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In470643174, ~z$w_buff1_used~0=~z$w_buff1_used~0_In470643174} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 17:10:08,946 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [721] [721] L831-->L832: Formula: (and (= v_~z$r_buff0_thd0~0_103 v_~z$r_buff0_thd0~0_102) (not (= (mod v_~weak$$choice2~0_23 256) 0))) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_103, ~weak$$choice2~0=v_~weak$$choice2~0_23} OutVars{~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_102, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_6|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_10|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|, ~weak$$choice2~0=v_~weak$$choice2~0_23} AuxVars[] AssignedVars[~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 17:10:08,947 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L834-->L837-1: Formula: (and (= v_~z$mem_tmp~0_11 v_~z~0_133) (= (mod v_~main$tmp_guard1~0_9 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (not (= 0 (mod v_~z$flush_delayed~0_21 256))) (= 0 v_~z$flush_delayed~0_20)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_11, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_21} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_11, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_18|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_9, ~z$flush_delayed~0=v_~z$flush_delayed~0_20, ~z~0=v_~z~0_133, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:10:08,947 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [788] [788] L837-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_5|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 17:10:09,023 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_ffa96673-b4a9-48f3-a58b-c7c790fef0fa/bin/uautomizer/witness.graphml [2019-12-07 17:10:09,023 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 17:10:09,024 INFO L168 Benchmark]: Toolchain (without parser) took 52126.92 ms. Allocated memory was 1.0 GB in the beginning and 6.5 GB in the end (delta: 5.5 GB). Free memory was 937.1 MB in the beginning and 3.3 GB in the end (delta: -2.4 GB). Peak memory consumption was 3.1 GB. Max. memory is 11.5 GB. [2019-12-07 17:10:09,025 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:10:09,025 INFO L168 Benchmark]: CACSL2BoogieTranslator took 377.34 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 112.2 MB). Free memory was 937.1 MB in the beginning and 1.1 GB in the end (delta: -142.8 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. [2019-12-07 17:10:09,026 INFO L168 Benchmark]: Boogie Procedure Inliner took 38.84 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:10:09,026 INFO L168 Benchmark]: Boogie Preprocessor took 24.92 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:10:09,026 INFO L168 Benchmark]: RCFGBuilder took 414.05 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.3 MB). Peak memory consumption was 56.3 MB. Max. memory is 11.5 GB. [2019-12-07 17:10:09,027 INFO L168 Benchmark]: TraceAbstraction took 51180.13 ms. Allocated memory was 1.1 GB in the beginning and 6.5 GB in the end (delta: 5.4 GB). Free memory was 1.0 GB in the beginning and 3.3 GB in the end (delta: -2.3 GB). Peak memory consumption was 3.1 GB. Max. memory is 11.5 GB. [2019-12-07 17:10:09,027 INFO L168 Benchmark]: Witness Printer took 88.65 ms. Allocated memory is still 6.5 GB. Free memory was 3.3 GB in the beginning and 3.3 GB in the end (delta: 15.2 MB). Peak memory consumption was 15.2 MB. Max. memory is 11.5 GB. [2019-12-07 17:10:09,029 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 377.34 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 112.2 MB). Free memory was 937.1 MB in the beginning and 1.1 GB in the end (delta: -142.8 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 38.84 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 24.92 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 414.05 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.3 MB). Peak memory consumption was 56.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 51180.13 ms. Allocated memory was 1.1 GB in the beginning and 6.5 GB in the end (delta: 5.4 GB). Free memory was 1.0 GB in the beginning and 3.3 GB in the end (delta: -2.3 GB). Peak memory consumption was 3.1 GB. Max. memory is 11.5 GB. * Witness Printer took 88.65 ms. Allocated memory is still 6.5 GB. Free memory was 3.3 GB in the beginning and 3.3 GB in the end (delta: 15.2 MB). Peak memory consumption was 15.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.1s, 174 ProgramPointsBefore, 93 ProgramPointsAfterwards, 211 TransitionsBefore, 104 TransitionsAfterwards, 17114 CoEnabledTransitionPairs, 8 FixpointIterations, 31 TrivialSequentialCompositions, 44 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 37 ConcurrentYvCompositions, 30 ChoiceCompositions, 6114 VarBasedMoverChecksPositive, 254 VarBasedMoverChecksNegative, 80 SemBasedMoverChecksPositive, 255 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.9s, 0 MoverChecksTotal, 86146 CheckedPairsTotal, 112 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L805] FCALL, FORK 0 pthread_create(&t2037, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L732] 1 z$r_buff1_thd0 = z$r_buff0_thd0 [L733] 1 z$r_buff1_thd1 = z$r_buff0_thd1 [L734] 1 z$r_buff1_thd2 = z$r_buff0_thd2 [L735] 1 z$r_buff1_thd3 = z$r_buff0_thd3 [L736] 1 z$r_buff0_thd1 = (_Bool)1 [L739] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L742] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L807] FCALL, FORK 0 pthread_create(&t2038, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L742] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L743] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L744] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L809] FCALL, FORK 0 pthread_create(&t2039, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L756] 2 x = 2 [L759] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L762] EXPR 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L776] 3 __unbuffered_p2_EAX = y [L779] 3 z = 1 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z)=2, z$w_buff1=0, z$w_buff1_used=0, z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z=2] [L782] 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z)=2, z$w_buff1=0, z$w_buff1_used=0, z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z=2] [L783] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L784] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L785] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L762] 2 z = z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) [L763] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L764] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L765] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L815] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L815] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L816] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L817] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L818] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 [L819] 0 z$r_buff1_thd0 = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 [L822] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L823] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L824] 0 z$flush_delayed = weak$$choice2 [L825] 0 z$mem_tmp = z VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L826] EXPR 0 !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L826] 0 z = !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) [L827] EXPR 0 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L827] 0 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) [L828] EXPR 0 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L828] 0 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) [L829] EXPR 0 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L829] 0 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used)) [L830] EXPR 0 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L830] 0 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L832] EXPR 0 weak$$choice2 ? z$r_buff1_thd0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$r_buff1_thd0 : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L832] 0 z$r_buff1_thd0 = weak$$choice2 ? z$r_buff1_thd0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$r_buff1_thd0 : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L833] 0 main$tmp_guard1 = !(x == 2 && z == 2 && __unbuffered_p2_EAX == 1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 165 locations, 2 error locations. Result: UNSAFE, OverallTime: 51.0s, OverallIterations: 17, TraceHistogramMax: 1, AutomataDifference: 8.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 2522 SDtfs, 2250 SDslu, 6108 SDs, 0 SdLazy, 4235 SolverSat, 199 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 147 GetRequests, 22 SyntacticMatches, 11 SemanticMatches, 114 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1020 ImplicationChecksByTransitivity, 1.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=178183occurred in iteration=3, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 25.5s AutomataMinimizationTime, 16 MinimizatonAttempts, 72601 StatesRemovedByMinimization, 14 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.0s InterpolantComputationTime, 755 NumberOfCodeBlocks, 755 NumberOfCodeBlocksAsserted, 17 NumberOfCheckSat, 671 ConstructedInterpolants, 0 QuantifiedInterpolants, 204501 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 16 InterpolantComputations, 16 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...