./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe013_power.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_ea5d28c3-9a90-4f44-927f-6cfc9b0929b5/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_ea5d28c3-9a90-4f44-927f-6cfc9b0929b5/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_ea5d28c3-9a90-4f44-927f-6cfc9b0929b5/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_ea5d28c3-9a90-4f44-927f-6cfc9b0929b5/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe013_power.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_ea5d28c3-9a90-4f44-927f-6cfc9b0929b5/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_ea5d28c3-9a90-4f44-927f-6cfc9b0929b5/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 615be391e601ddc66bb9e1155ffa2f81c07adb51 ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 14:57:19,915 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 14:57:19,917 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 14:57:19,925 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 14:57:19,925 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 14:57:19,926 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 14:57:19,927 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 14:57:19,928 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 14:57:19,930 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 14:57:19,931 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 14:57:19,932 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 14:57:19,933 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 14:57:19,933 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 14:57:19,933 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 14:57:19,934 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 14:57:19,935 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 14:57:19,935 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 14:57:19,936 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 14:57:19,937 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 14:57:19,939 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 14:57:19,940 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 14:57:19,940 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 14:57:19,941 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 14:57:19,942 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 14:57:19,943 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 14:57:19,943 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 14:57:19,944 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 14:57:19,944 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 14:57:19,944 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 14:57:19,945 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 14:57:19,945 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 14:57:19,946 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 14:57:19,946 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 14:57:19,946 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 14:57:19,947 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 14:57:19,947 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 14:57:19,947 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 14:57:19,948 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 14:57:19,948 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 14:57:19,948 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 14:57:19,949 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 14:57:19,949 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_ea5d28c3-9a90-4f44-927f-6cfc9b0929b5/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 14:57:19,958 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 14:57:19,959 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 14:57:19,959 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 14:57:19,959 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 14:57:19,960 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 14:57:19,960 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 14:57:19,960 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 14:57:19,960 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 14:57:19,960 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 14:57:19,960 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 14:57:19,960 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 14:57:19,961 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 14:57:19,961 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 14:57:19,961 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 14:57:19,961 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 14:57:19,961 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 14:57:19,961 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 14:57:19,961 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 14:57:19,961 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 14:57:19,962 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 14:57:19,962 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 14:57:19,962 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 14:57:19,962 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 14:57:19,962 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 14:57:19,962 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 14:57:19,962 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 14:57:19,962 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 14:57:19,963 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 14:57:19,963 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 14:57:19,963 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_ea5d28c3-9a90-4f44-927f-6cfc9b0929b5/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 615be391e601ddc66bb9e1155ffa2f81c07adb51 [2019-12-07 14:57:20,062 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 14:57:20,072 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 14:57:20,075 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 14:57:20,076 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 14:57:20,077 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 14:57:20,077 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_ea5d28c3-9a90-4f44-927f-6cfc9b0929b5/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe013_power.oepc.i [2019-12-07 14:57:20,114 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_ea5d28c3-9a90-4f44-927f-6cfc9b0929b5/bin/uautomizer/data/7cce6e900/a31b4d2eae104b20a8948d3e4981a61f/FLAG9bfd5b194 [2019-12-07 14:57:20,612 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 14:57:20,613 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_ea5d28c3-9a90-4f44-927f-6cfc9b0929b5/sv-benchmarks/c/pthread-wmm/safe013_power.oepc.i [2019-12-07 14:57:20,625 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_ea5d28c3-9a90-4f44-927f-6cfc9b0929b5/bin/uautomizer/data/7cce6e900/a31b4d2eae104b20a8948d3e4981a61f/FLAG9bfd5b194 [2019-12-07 14:57:20,637 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_ea5d28c3-9a90-4f44-927f-6cfc9b0929b5/bin/uautomizer/data/7cce6e900/a31b4d2eae104b20a8948d3e4981a61f [2019-12-07 14:57:20,639 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 14:57:20,640 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 14:57:20,641 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 14:57:20,642 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 14:57:20,644 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 14:57:20,645 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 02:57:20" (1/1) ... [2019-12-07 14:57:20,647 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3f8fae9c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:57:20, skipping insertion in model container [2019-12-07 14:57:20,647 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 02:57:20" (1/1) ... [2019-12-07 14:57:20,652 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 14:57:20,682 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 14:57:20,944 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 14:57:20,951 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 14:57:20,993 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 14:57:21,037 INFO L208 MainTranslator]: Completed translation [2019-12-07 14:57:21,038 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:57:21 WrapperNode [2019-12-07 14:57:21,038 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 14:57:21,038 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 14:57:21,038 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 14:57:21,038 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 14:57:21,044 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:57:21" (1/1) ... [2019-12-07 14:57:21,056 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:57:21" (1/1) ... [2019-12-07 14:57:21,075 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 14:57:21,075 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 14:57:21,075 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 14:57:21,075 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 14:57:21,081 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:57:21" (1/1) ... [2019-12-07 14:57:21,082 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:57:21" (1/1) ... [2019-12-07 14:57:21,085 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:57:21" (1/1) ... [2019-12-07 14:57:21,085 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:57:21" (1/1) ... [2019-12-07 14:57:21,092 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:57:21" (1/1) ... [2019-12-07 14:57:21,094 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:57:21" (1/1) ... [2019-12-07 14:57:21,097 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:57:21" (1/1) ... [2019-12-07 14:57:21,100 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 14:57:21,100 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 14:57:21,100 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 14:57:21,100 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 14:57:21,101 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:57:21" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_ea5d28c3-9a90-4f44-927f-6cfc9b0929b5/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 14:57:21,141 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 14:57:21,141 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 14:57:21,141 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 14:57:21,141 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 14:57:21,141 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 14:57:21,141 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 14:57:21,141 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 14:57:21,141 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 14:57:21,141 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 14:57:21,142 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 14:57:21,142 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 14:57:21,142 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 14:57:21,142 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 14:57:21,143 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 14:57:21,482 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 14:57:21,482 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 14:57:21,483 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:57:21 BoogieIcfgContainer [2019-12-07 14:57:21,483 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 14:57:21,484 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 14:57:21,484 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 14:57:21,486 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 14:57:21,486 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 02:57:20" (1/3) ... [2019-12-07 14:57:21,486 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5e144e13 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 02:57:21, skipping insertion in model container [2019-12-07 14:57:21,486 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:57:21" (2/3) ... [2019-12-07 14:57:21,487 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5e144e13 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 02:57:21, skipping insertion in model container [2019-12-07 14:57:21,487 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:57:21" (3/3) ... [2019-12-07 14:57:21,488 INFO L109 eAbstractionObserver]: Analyzing ICFG safe013_power.oepc.i [2019-12-07 14:57:21,494 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 14:57:21,494 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 14:57:21,499 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 14:57:21,499 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 14:57:21,523 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,523 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,523 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,523 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,523 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,524 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,524 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,524 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,524 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,524 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,524 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,525 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,525 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,525 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,525 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,525 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,525 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,525 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,526 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,526 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,526 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,526 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,526 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,526 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,526 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,526 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,527 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,527 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,527 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,527 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,527 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,527 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,528 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,528 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,528 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,528 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,528 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,528 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,528 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,528 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,529 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,529 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,529 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,529 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,529 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,529 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,529 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,529 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,530 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,530 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,530 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,530 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,530 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,530 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,530 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,530 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,531 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,531 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,531 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,531 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,531 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,531 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,531 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,532 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,532 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,532 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,532 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,532 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,532 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,532 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,532 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,532 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,533 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,533 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,533 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,533 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,533 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,533 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,533 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,533 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,534 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,534 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,534 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,534 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,534 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,534 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,534 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,534 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,535 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,535 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,535 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,535 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,535 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,535 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,536 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,536 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,536 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,536 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,536 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,536 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,536 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,537 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,537 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,537 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,537 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,537 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,537 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,538 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,538 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,538 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,538 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,538 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,538 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,538 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,538 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,539 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,539 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,539 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,539 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,539 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,539 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,539 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,539 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,540 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,540 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,540 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,540 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,540 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,540 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,540 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,540 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,541 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,541 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,541 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,541 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,541 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,541 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,541 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,541 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,542 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,542 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,542 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,542 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,542 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,542 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,542 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,543 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,543 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,543 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,543 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,543 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,543 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,543 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,543 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,543 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,544 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,544 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,544 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:57:21,555 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 14:57:21,567 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 14:57:21,567 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 14:57:21,567 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 14:57:21,567 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 14:57:21,567 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 14:57:21,568 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 14:57:21,568 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 14:57:21,568 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 14:57:21,578 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 163 places, 194 transitions [2019-12-07 14:57:21,580 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 163 places, 194 transitions [2019-12-07 14:57:21,631 INFO L134 PetriNetUnfolder]: 41/191 cut-off events. [2019-12-07 14:57:21,631 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 14:57:21,641 INFO L76 FinitePrefix]: Finished finitePrefix Result has 201 conditions, 191 events. 41/191 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 721 event pairs. 9/157 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 14:57:21,656 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 163 places, 194 transitions [2019-12-07 14:57:21,685 INFO L134 PetriNetUnfolder]: 41/191 cut-off events. [2019-12-07 14:57:21,685 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 14:57:21,691 INFO L76 FinitePrefix]: Finished finitePrefix Result has 201 conditions, 191 events. 41/191 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 721 event pairs. 9/157 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 14:57:21,706 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 16696 [2019-12-07 14:57:21,707 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 14:57:24,704 WARN L192 SmtUtils]: Spent 148.00 ms on a formula simplification. DAG size of input: 89 DAG size of output: 87 [2019-12-07 14:57:24,842 INFO L206 etLargeBlockEncoding]: Checked pairs total: 66094 [2019-12-07 14:57:24,842 INFO L214 etLargeBlockEncoding]: Total number of compositions: 112 [2019-12-07 14:57:24,844 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 83 places, 92 transitions [2019-12-07 14:57:34,259 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 86132 states. [2019-12-07 14:57:34,261 INFO L276 IsEmpty]: Start isEmpty. Operand 86132 states. [2019-12-07 14:57:34,265 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-07 14:57:34,265 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:57:34,266 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-07 14:57:34,266 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:57:34,270 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:57:34,270 INFO L82 PathProgramCache]: Analyzing trace with hash 794637732, now seen corresponding path program 1 times [2019-12-07 14:57:34,275 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:57:34,275 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [918822622] [2019-12-07 14:57:34,275 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:57:34,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:57:34,426 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:57:34,426 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [918822622] [2019-12-07 14:57:34,427 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:57:34,427 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 14:57:34,428 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [57944773] [2019-12-07 14:57:34,430 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:57:34,430 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:57:34,439 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:57:34,439 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:57:34,441 INFO L87 Difference]: Start difference. First operand 86132 states. Second operand 3 states. [2019-12-07 14:57:35,014 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:57:35,014 INFO L93 Difference]: Finished difference Result 85012 states and 367904 transitions. [2019-12-07 14:57:35,015 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:57:35,015 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-07 14:57:35,016 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:57:35,463 INFO L225 Difference]: With dead ends: 85012 [2019-12-07 14:57:35,463 INFO L226 Difference]: Without dead ends: 80140 [2019-12-07 14:57:35,464 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:57:38,237 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80140 states. [2019-12-07 14:57:39,324 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80140 to 80140. [2019-12-07 14:57:39,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80140 states. [2019-12-07 14:57:39,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80140 states to 80140 states and 346330 transitions. [2019-12-07 14:57:39,576 INFO L78 Accepts]: Start accepts. Automaton has 80140 states and 346330 transitions. Word has length 5 [2019-12-07 14:57:39,577 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:57:39,577 INFO L462 AbstractCegarLoop]: Abstraction has 80140 states and 346330 transitions. [2019-12-07 14:57:39,577 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:57:39,577 INFO L276 IsEmpty]: Start isEmpty. Operand 80140 states and 346330 transitions. [2019-12-07 14:57:39,583 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 14:57:39,583 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:57:39,583 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:57:39,583 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:57:39,583 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:57:39,584 INFO L82 PathProgramCache]: Analyzing trace with hash -1795694344, now seen corresponding path program 1 times [2019-12-07 14:57:39,584 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:57:39,584 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1843525161] [2019-12-07 14:57:39,584 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:57:39,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:57:39,640 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:57:39,641 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1843525161] [2019-12-07 14:57:39,641 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:57:39,641 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:57:39,641 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1208848316] [2019-12-07 14:57:39,642 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:57:39,642 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:57:39,642 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:57:39,642 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:57:39,642 INFO L87 Difference]: Start difference. First operand 80140 states and 346330 transitions. Second operand 4 states. [2019-12-07 14:57:42,042 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:57:42,042 INFO L93 Difference]: Finished difference Result 123388 states and 510822 transitions. [2019-12-07 14:57:42,042 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:57:42,043 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 14:57:42,043 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:57:42,347 INFO L225 Difference]: With dead ends: 123388 [2019-12-07 14:57:42,347 INFO L226 Difference]: Without dead ends: 123290 [2019-12-07 14:57:42,348 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:57:45,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123290 states. [2019-12-07 14:57:47,460 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123290 to 114218. [2019-12-07 14:57:47,461 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114218 states. [2019-12-07 14:57:47,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114218 states to 114218 states and 477794 transitions. [2019-12-07 14:57:47,792 INFO L78 Accepts]: Start accepts. Automaton has 114218 states and 477794 transitions. Word has length 13 [2019-12-07 14:57:47,793 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:57:47,793 INFO L462 AbstractCegarLoop]: Abstraction has 114218 states and 477794 transitions. [2019-12-07 14:57:47,793 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:57:47,793 INFO L276 IsEmpty]: Start isEmpty. Operand 114218 states and 477794 transitions. [2019-12-07 14:57:47,795 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 14:57:47,795 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:57:47,795 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:57:47,795 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:57:47,795 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:57:47,795 INFO L82 PathProgramCache]: Analyzing trace with hash -1307118492, now seen corresponding path program 1 times [2019-12-07 14:57:47,796 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:57:47,796 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [564540865] [2019-12-07 14:57:47,796 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:57:47,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:57:47,841 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:57:47,842 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [564540865] [2019-12-07 14:57:47,842 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:57:47,842 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:57:47,842 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1322391569] [2019-12-07 14:57:47,842 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:57:47,842 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:57:47,842 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:57:47,842 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:57:47,843 INFO L87 Difference]: Start difference. First operand 114218 states and 477794 transitions. Second operand 4 states. [2019-12-07 14:57:48,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:57:48,669 INFO L93 Difference]: Finished difference Result 159677 states and 652290 transitions. [2019-12-07 14:57:48,670 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:57:48,670 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 14:57:48,670 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:57:49,065 INFO L225 Difference]: With dead ends: 159677 [2019-12-07 14:57:49,066 INFO L226 Difference]: Without dead ends: 159565 [2019-12-07 14:57:49,066 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:57:53,145 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159565 states. [2019-12-07 14:57:56,591 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159565 to 136035. [2019-12-07 14:57:56,592 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136035 states. [2019-12-07 14:57:56,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136035 states to 136035 states and 564894 transitions. [2019-12-07 14:57:56,996 INFO L78 Accepts]: Start accepts. Automaton has 136035 states and 564894 transitions. Word has length 13 [2019-12-07 14:57:56,996 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:57:56,996 INFO L462 AbstractCegarLoop]: Abstraction has 136035 states and 564894 transitions. [2019-12-07 14:57:56,996 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:57:56,996 INFO L276 IsEmpty]: Start isEmpty. Operand 136035 states and 564894 transitions. [2019-12-07 14:57:56,999 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 14:57:56,999 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:57:56,999 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:57:56,999 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:57:56,999 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:57:56,999 INFO L82 PathProgramCache]: Analyzing trace with hash 2137171342, now seen corresponding path program 1 times [2019-12-07 14:57:56,999 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:57:57,000 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1968279371] [2019-12-07 14:57:57,000 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:57:57,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:57:57,032 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:57:57,032 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1968279371] [2019-12-07 14:57:57,032 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:57:57,032 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:57:57,032 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [625341021] [2019-12-07 14:57:57,032 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:57:57,033 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:57:57,033 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:57:57,033 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:57:57,033 INFO L87 Difference]: Start difference. First operand 136035 states and 564894 transitions. Second operand 3 states. [2019-12-07 14:57:58,068 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:57:58,068 INFO L93 Difference]: Finished difference Result 181618 states and 742473 transitions. [2019-12-07 14:57:58,069 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:57:58,069 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 14 [2019-12-07 14:57:58,069 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:57:58,534 INFO L225 Difference]: With dead ends: 181618 [2019-12-07 14:57:58,535 INFO L226 Difference]: Without dead ends: 181618 [2019-12-07 14:57:58,535 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:58:02,836 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181618 states. [2019-12-07 14:58:05,169 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181618 to 152081. [2019-12-07 14:58:05,169 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152081 states. [2019-12-07 14:58:05,621 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152081 states to 152081 states and 628919 transitions. [2019-12-07 14:58:05,622 INFO L78 Accepts]: Start accepts. Automaton has 152081 states and 628919 transitions. Word has length 14 [2019-12-07 14:58:05,622 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:58:05,622 INFO L462 AbstractCegarLoop]: Abstraction has 152081 states and 628919 transitions. [2019-12-07 14:58:05,622 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:58:05,622 INFO L276 IsEmpty]: Start isEmpty. Operand 152081 states and 628919 transitions. [2019-12-07 14:58:05,624 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 14:58:05,625 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:58:05,625 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:58:05,625 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:58:05,625 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:58:05,625 INFO L82 PathProgramCache]: Analyzing trace with hash 2137037670, now seen corresponding path program 1 times [2019-12-07 14:58:05,625 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:58:05,625 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1553102160] [2019-12-07 14:58:05,625 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:58:05,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:58:05,659 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:58:05,660 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1553102160] [2019-12-07 14:58:05,660 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:58:05,660 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:58:05,660 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [597516710] [2019-12-07 14:58:05,660 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:58:05,660 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:58:05,660 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:58:05,661 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:58:05,661 INFO L87 Difference]: Start difference. First operand 152081 states and 628919 transitions. Second operand 4 states. [2019-12-07 14:58:06,529 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:58:06,530 INFO L93 Difference]: Finished difference Result 179622 states and 732719 transitions. [2019-12-07 14:58:06,530 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:58:06,530 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-12-07 14:58:06,530 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:58:06,974 INFO L225 Difference]: With dead ends: 179622 [2019-12-07 14:58:06,974 INFO L226 Difference]: Without dead ends: 179542 [2019-12-07 14:58:06,974 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:58:12,849 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179542 states. [2019-12-07 14:58:15,110 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179542 to 157787. [2019-12-07 14:58:15,111 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157787 states. [2019-12-07 14:58:15,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157787 states to 157787 states and 651479 transitions. [2019-12-07 14:58:15,568 INFO L78 Accepts]: Start accepts. Automaton has 157787 states and 651479 transitions. Word has length 14 [2019-12-07 14:58:15,568 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:58:15,568 INFO L462 AbstractCegarLoop]: Abstraction has 157787 states and 651479 transitions. [2019-12-07 14:58:15,568 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:58:15,568 INFO L276 IsEmpty]: Start isEmpty. Operand 157787 states and 651479 transitions. [2019-12-07 14:58:15,572 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 14:58:15,572 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:58:15,572 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:58:15,572 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:58:15,573 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:58:15,573 INFO L82 PathProgramCache]: Analyzing trace with hash -1997758702, now seen corresponding path program 1 times [2019-12-07 14:58:15,573 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:58:15,573 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1204310458] [2019-12-07 14:58:15,573 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:58:15,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:58:15,613 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:58:15,613 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1204310458] [2019-12-07 14:58:15,613 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:58:15,614 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:58:15,614 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1901791162] [2019-12-07 14:58:15,614 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:58:15,614 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:58:15,614 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:58:15,615 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:58:15,615 INFO L87 Difference]: Start difference. First operand 157787 states and 651479 transitions. Second operand 4 states. [2019-12-07 14:58:16,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:58:16,515 INFO L93 Difference]: Finished difference Result 189091 states and 772001 transitions. [2019-12-07 14:58:16,516 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:58:16,516 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-12-07 14:58:16,516 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:58:16,980 INFO L225 Difference]: With dead ends: 189091 [2019-12-07 14:58:16,980 INFO L226 Difference]: Without dead ends: 188995 [2019-12-07 14:58:16,981 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:58:21,380 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188995 states. [2019-12-07 14:58:23,570 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188995 to 161868. [2019-12-07 14:58:23,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161868 states. [2019-12-07 14:58:24,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161868 states to 161868 states and 668265 transitions. [2019-12-07 14:58:24,555 INFO L78 Accepts]: Start accepts. Automaton has 161868 states and 668265 transitions. Word has length 14 [2019-12-07 14:58:24,555 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:58:24,555 INFO L462 AbstractCegarLoop]: Abstraction has 161868 states and 668265 transitions. [2019-12-07 14:58:24,555 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:58:24,555 INFO L276 IsEmpty]: Start isEmpty. Operand 161868 states and 668265 transitions. [2019-12-07 14:58:24,569 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 14:58:24,569 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:58:24,569 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:58:24,569 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:58:24,569 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:58:24,569 INFO L82 PathProgramCache]: Analyzing trace with hash -1754746770, now seen corresponding path program 1 times [2019-12-07 14:58:24,569 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:58:24,569 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1342319265] [2019-12-07 14:58:24,570 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:58:24,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:58:24,602 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:58:24,602 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1342319265] [2019-12-07 14:58:24,602 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:58:24,602 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 14:58:24,602 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1609604836] [2019-12-07 14:58:24,602 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:58:24,603 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:58:24,603 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:58:24,603 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:58:24,603 INFO L87 Difference]: Start difference. First operand 161868 states and 668265 transitions. Second operand 3 states. [2019-12-07 14:58:25,293 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:58:25,293 INFO L93 Difference]: Finished difference Result 160940 states and 664422 transitions. [2019-12-07 14:58:25,294 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:58:25,294 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 14:58:25,294 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:58:25,692 INFO L225 Difference]: With dead ends: 160940 [2019-12-07 14:58:25,692 INFO L226 Difference]: Without dead ends: 160940 [2019-12-07 14:58:25,693 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:58:29,580 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160940 states. [2019-12-07 14:58:33,636 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160940 to 160940. [2019-12-07 14:58:33,636 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160940 states. [2019-12-07 14:58:34,129 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160940 states to 160940 states and 664422 transitions. [2019-12-07 14:58:34,129 INFO L78 Accepts]: Start accepts. Automaton has 160940 states and 664422 transitions. Word has length 18 [2019-12-07 14:58:34,129 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:58:34,130 INFO L462 AbstractCegarLoop]: Abstraction has 160940 states and 664422 transitions. [2019-12-07 14:58:34,130 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:58:34,130 INFO L276 IsEmpty]: Start isEmpty. Operand 160940 states and 664422 transitions. [2019-12-07 14:58:34,144 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 14:58:34,145 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:58:34,145 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:58:34,145 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:58:34,145 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:58:34,145 INFO L82 PathProgramCache]: Analyzing trace with hash -1406595818, now seen corresponding path program 1 times [2019-12-07 14:58:34,145 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:58:34,145 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1762401391] [2019-12-07 14:58:34,145 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:58:34,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:58:34,186 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:58:34,186 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1762401391] [2019-12-07 14:58:34,187 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:58:34,187 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:58:34,187 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [300119508] [2019-12-07 14:58:34,187 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:58:34,187 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:58:34,188 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:58:34,188 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:58:34,188 INFO L87 Difference]: Start difference. First operand 160940 states and 664422 transitions. Second operand 4 states. [2019-12-07 14:58:35,775 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:58:35,775 INFO L93 Difference]: Finished difference Result 292713 states and 1211057 transitions. [2019-12-07 14:58:35,776 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:58:35,776 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2019-12-07 14:58:35,776 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:58:36,495 INFO L225 Difference]: With dead ends: 292713 [2019-12-07 14:58:36,495 INFO L226 Difference]: Without dead ends: 280929 [2019-12-07 14:58:36,495 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:58:42,186 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 280929 states. [2019-12-07 14:58:45,958 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 280929 to 279962. [2019-12-07 14:58:45,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 279962 states. [2019-12-07 14:58:47,225 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 279962 states to 279962 states and 1160431 transitions. [2019-12-07 14:58:47,225 INFO L78 Accepts]: Start accepts. Automaton has 279962 states and 1160431 transitions. Word has length 19 [2019-12-07 14:58:47,225 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:58:47,225 INFO L462 AbstractCegarLoop]: Abstraction has 279962 states and 1160431 transitions. [2019-12-07 14:58:47,226 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:58:47,226 INFO L276 IsEmpty]: Start isEmpty. Operand 279962 states and 1160431 transitions. [2019-12-07 14:58:47,249 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 14:58:47,250 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:58:47,250 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:58:47,250 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:58:47,250 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:58:47,250 INFO L82 PathProgramCache]: Analyzing trace with hash -2069277611, now seen corresponding path program 1 times [2019-12-07 14:58:47,250 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:58:47,250 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [846129849] [2019-12-07 14:58:47,250 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:58:47,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:58:47,290 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:58:47,290 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [846129849] [2019-12-07 14:58:47,291 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:58:47,291 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:58:47,291 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [203069304] [2019-12-07 14:58:47,291 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:58:47,291 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:58:47,292 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:58:47,292 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:58:47,292 INFO L87 Difference]: Start difference. First operand 279962 states and 1160431 transitions. Second operand 5 states. [2019-12-07 14:58:49,251 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:58:49,251 INFO L93 Difference]: Finished difference Result 392583 states and 1589063 transitions. [2019-12-07 14:58:49,251 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 14:58:49,251 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 14:58:49,252 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:58:54,125 INFO L225 Difference]: With dead ends: 392583 [2019-12-07 14:58:54,125 INFO L226 Difference]: Without dead ends: 392031 [2019-12-07 14:58:54,126 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:59:00,889 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 392031 states. [2019-12-07 14:59:05,617 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 392031 to 291560. [2019-12-07 14:59:05,617 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 291560 states. [2019-12-07 14:59:06,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 291560 states to 291560 states and 1205147 transitions. [2019-12-07 14:59:06,523 INFO L78 Accepts]: Start accepts. Automaton has 291560 states and 1205147 transitions. Word has length 19 [2019-12-07 14:59:06,524 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:59:06,524 INFO L462 AbstractCegarLoop]: Abstraction has 291560 states and 1205147 transitions. [2019-12-07 14:59:06,524 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:59:06,524 INFO L276 IsEmpty]: Start isEmpty. Operand 291560 states and 1205147 transitions. [2019-12-07 14:59:06,557 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 14:59:06,557 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:59:06,557 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:59:06,557 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:59:06,557 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:59:06,557 INFO L82 PathProgramCache]: Analyzing trace with hash 1805440842, now seen corresponding path program 1 times [2019-12-07 14:59:06,557 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:59:06,558 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1641333395] [2019-12-07 14:59:06,558 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:59:07,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:59:07,049 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:59:07,050 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1641333395] [2019-12-07 14:59:07,050 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:59:07,050 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:59:07,050 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1248803980] [2019-12-07 14:59:07,050 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:59:07,050 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:59:07,050 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:59:07,050 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:59:07,050 INFO L87 Difference]: Start difference. First operand 291560 states and 1205147 transitions. Second operand 3 states. [2019-12-07 14:59:08,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:59:08,245 INFO L93 Difference]: Finished difference Result 273700 states and 1118338 transitions. [2019-12-07 14:59:08,246 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:59:08,246 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2019-12-07 14:59:08,246 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:59:08,934 INFO L225 Difference]: With dead ends: 273700 [2019-12-07 14:59:08,934 INFO L226 Difference]: Without dead ends: 273700 [2019-12-07 14:59:08,934 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:59:14,387 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 273700 states. [2019-12-07 14:59:21,123 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 273700 to 267700. [2019-12-07 14:59:21,123 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 267700 states. [2019-12-07 14:59:22,256 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 267700 states to 267700 states and 1095458 transitions. [2019-12-07 14:59:22,256 INFO L78 Accepts]: Start accepts. Automaton has 267700 states and 1095458 transitions. Word has length 20 [2019-12-07 14:59:22,256 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:59:22,256 INFO L462 AbstractCegarLoop]: Abstraction has 267700 states and 1095458 transitions. [2019-12-07 14:59:22,257 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:59:22,257 INFO L276 IsEmpty]: Start isEmpty. Operand 267700 states and 1095458 transitions. [2019-12-07 14:59:22,284 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 14:59:22,284 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:59:22,284 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:59:22,284 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:59:22,284 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:59:22,284 INFO L82 PathProgramCache]: Analyzing trace with hash -582230699, now seen corresponding path program 1 times [2019-12-07 14:59:22,284 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:59:22,285 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1517635880] [2019-12-07 14:59:22,285 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:59:22,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:59:22,324 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:59:22,324 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1517635880] [2019-12-07 14:59:22,324 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:59:22,324 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:59:22,324 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [229351790] [2019-12-07 14:59:22,325 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:59:22,325 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:59:22,325 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:59:22,325 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:59:22,325 INFO L87 Difference]: Start difference. First operand 267700 states and 1095458 transitions. Second operand 4 states. [2019-12-07 14:59:22,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:59:22,594 INFO L93 Difference]: Finished difference Result 75767 states and 260794 transitions. [2019-12-07 14:59:22,595 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 14:59:22,595 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 20 [2019-12-07 14:59:22,595 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:59:22,693 INFO L225 Difference]: With dead ends: 75767 [2019-12-07 14:59:22,694 INFO L226 Difference]: Without dead ends: 58019 [2019-12-07 14:59:22,694 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:59:22,916 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58019 states. [2019-12-07 14:59:23,513 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58019 to 57567. [2019-12-07 14:59:23,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57567 states. [2019-12-07 14:59:23,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57567 states to 57567 states and 188081 transitions. [2019-12-07 14:59:23,626 INFO L78 Accepts]: Start accepts. Automaton has 57567 states and 188081 transitions. Word has length 20 [2019-12-07 14:59:23,626 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:59:23,626 INFO L462 AbstractCegarLoop]: Abstraction has 57567 states and 188081 transitions. [2019-12-07 14:59:23,626 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:59:23,626 INFO L276 IsEmpty]: Start isEmpty. Operand 57567 states and 188081 transitions. [2019-12-07 14:59:23,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 14:59:23,634 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:59:23,634 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:59:23,634 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:59:23,634 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:59:23,634 INFO L82 PathProgramCache]: Analyzing trace with hash -1918737222, now seen corresponding path program 1 times [2019-12-07 14:59:23,634 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:59:23,634 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1154903481] [2019-12-07 14:59:23,634 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:59:23,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:59:23,671 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:59:23,671 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1154903481] [2019-12-07 14:59:23,671 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:59:23,671 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:59:23,671 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2087600500] [2019-12-07 14:59:23,671 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:59:23,672 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:59:23,672 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:59:23,672 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:59:23,672 INFO L87 Difference]: Start difference. First operand 57567 states and 188081 transitions. Second operand 5 states. [2019-12-07 14:59:24,536 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:59:24,536 INFO L93 Difference]: Finished difference Result 74191 states and 238300 transitions. [2019-12-07 14:59:24,536 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 14:59:24,537 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 14:59:24,537 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:59:24,641 INFO L225 Difference]: With dead ends: 74191 [2019-12-07 14:59:24,641 INFO L226 Difference]: Without dead ends: 73930 [2019-12-07 14:59:24,641 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:59:24,898 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73930 states. [2019-12-07 14:59:25,540 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73930 to 57893. [2019-12-07 14:59:25,540 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57893 states. [2019-12-07 14:59:25,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57893 states to 57893 states and 188954 transitions. [2019-12-07 14:59:25,653 INFO L78 Accepts]: Start accepts. Automaton has 57893 states and 188954 transitions. Word has length 22 [2019-12-07 14:59:25,653 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:59:25,653 INFO L462 AbstractCegarLoop]: Abstraction has 57893 states and 188954 transitions. [2019-12-07 14:59:25,653 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:59:25,653 INFO L276 IsEmpty]: Start isEmpty. Operand 57893 states and 188954 transitions. [2019-12-07 14:59:25,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 14:59:25,660 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:59:25,660 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:59:25,660 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:59:25,660 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:59:25,660 INFO L82 PathProgramCache]: Analyzing trace with hash -1233781658, now seen corresponding path program 1 times [2019-12-07 14:59:25,661 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:59:25,661 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [776005835] [2019-12-07 14:59:25,661 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:59:25,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:59:25,694 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:59:25,695 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [776005835] [2019-12-07 14:59:25,695 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:59:25,695 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:59:25,695 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1053920749] [2019-12-07 14:59:25,695 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:59:25,695 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:59:25,695 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:59:25,695 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:59:25,695 INFO L87 Difference]: Start difference. First operand 57893 states and 188954 transitions. Second operand 5 states. [2019-12-07 14:59:26,145 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:59:26,145 INFO L93 Difference]: Finished difference Result 76910 states and 246593 transitions. [2019-12-07 14:59:26,146 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 14:59:26,146 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 14:59:26,146 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:59:26,259 INFO L225 Difference]: With dead ends: 76910 [2019-12-07 14:59:26,259 INFO L226 Difference]: Without dead ends: 76543 [2019-12-07 14:59:26,259 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:59:26,525 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76543 states. [2019-12-07 14:59:27,319 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76543 to 58409. [2019-12-07 14:59:27,320 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58409 states. [2019-12-07 14:59:27,432 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58409 states to 58409 states and 189974 transitions. [2019-12-07 14:59:27,432 INFO L78 Accepts]: Start accepts. Automaton has 58409 states and 189974 transitions. Word has length 22 [2019-12-07 14:59:27,432 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:59:27,432 INFO L462 AbstractCegarLoop]: Abstraction has 58409 states and 189974 transitions. [2019-12-07 14:59:27,432 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:59:27,432 INFO L276 IsEmpty]: Start isEmpty. Operand 58409 states and 189974 transitions. [2019-12-07 14:59:27,449 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 14:59:27,449 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:59:27,449 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:59:27,449 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:59:27,449 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:59:27,449 INFO L82 PathProgramCache]: Analyzing trace with hash -126544367, now seen corresponding path program 1 times [2019-12-07 14:59:27,450 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:59:27,450 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1734219338] [2019-12-07 14:59:27,450 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:59:27,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:59:27,482 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:59:27,482 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1734219338] [2019-12-07 14:59:27,482 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:59:27,482 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:59:27,482 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [929570839] [2019-12-07 14:59:27,483 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:59:27,483 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:59:27,483 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:59:27,483 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:59:27,483 INFO L87 Difference]: Start difference. First operand 58409 states and 189974 transitions. Second operand 5 states. [2019-12-07 14:59:27,819 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:59:27,819 INFO L93 Difference]: Finished difference Result 70855 states and 228374 transitions. [2019-12-07 14:59:27,820 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 14:59:27,820 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 14:59:27,820 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:59:27,919 INFO L225 Difference]: With dead ends: 70855 [2019-12-07 14:59:27,919 INFO L226 Difference]: Without dead ends: 70720 [2019-12-07 14:59:27,919 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:59:28,170 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70720 states. [2019-12-07 14:59:28,825 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70720 to 59856. [2019-12-07 14:59:28,825 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59856 states. [2019-12-07 14:59:28,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59856 states to 59856 states and 194602 transitions. [2019-12-07 14:59:28,941 INFO L78 Accepts]: Start accepts. Automaton has 59856 states and 194602 transitions. Word has length 28 [2019-12-07 14:59:28,941 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:59:28,941 INFO L462 AbstractCegarLoop]: Abstraction has 59856 states and 194602 transitions. [2019-12-07 14:59:28,941 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:59:28,941 INFO L276 IsEmpty]: Start isEmpty. Operand 59856 states and 194602 transitions. [2019-12-07 14:59:28,958 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 14:59:28,958 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:59:28,958 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:59:28,958 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:59:28,958 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:59:28,958 INFO L82 PathProgramCache]: Analyzing trace with hash 1319845053, now seen corresponding path program 1 times [2019-12-07 14:59:28,958 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:59:28,959 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [232586105] [2019-12-07 14:59:28,959 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:59:28,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:59:28,979 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:59:28,979 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [232586105] [2019-12-07 14:59:28,979 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:59:28,979 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:59:28,980 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1614452238] [2019-12-07 14:59:28,980 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:59:28,980 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:59:28,980 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:59:28,980 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:59:28,980 INFO L87 Difference]: Start difference. First operand 59856 states and 194602 transitions. Second operand 3 states. [2019-12-07 14:59:29,262 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:59:29,262 INFO L93 Difference]: Finished difference Result 71305 states and 228082 transitions. [2019-12-07 14:59:29,263 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:59:29,263 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 28 [2019-12-07 14:59:29,263 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:59:29,371 INFO L225 Difference]: With dead ends: 71305 [2019-12-07 14:59:29,371 INFO L226 Difference]: Without dead ends: 71305 [2019-12-07 14:59:29,371 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:59:29,625 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71305 states. [2019-12-07 14:59:30,273 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71305 to 63077. [2019-12-07 14:59:30,273 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63077 states. [2019-12-07 14:59:30,391 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63077 states to 63077 states and 200925 transitions. [2019-12-07 14:59:30,391 INFO L78 Accepts]: Start accepts. Automaton has 63077 states and 200925 transitions. Word has length 28 [2019-12-07 14:59:30,391 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:59:30,391 INFO L462 AbstractCegarLoop]: Abstraction has 63077 states and 200925 transitions. [2019-12-07 14:59:30,391 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:59:30,391 INFO L276 IsEmpty]: Start isEmpty. Operand 63077 states and 200925 transitions. [2019-12-07 14:59:30,411 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 14:59:30,411 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:59:30,412 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:59:30,412 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:59:30,412 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:59:30,412 INFO L82 PathProgramCache]: Analyzing trace with hash 234862090, now seen corresponding path program 1 times [2019-12-07 14:59:30,412 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:59:30,412 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [170708554] [2019-12-07 14:59:30,412 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:59:30,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:59:30,444 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:59:30,444 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [170708554] [2019-12-07 14:59:30,445 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:59:30,445 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:59:30,445 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1114396313] [2019-12-07 14:59:30,445 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:59:30,445 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:59:30,445 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:59:30,445 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:59:30,445 INFO L87 Difference]: Start difference. First operand 63077 states and 200925 transitions. Second operand 5 states. [2019-12-07 14:59:30,816 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:59:30,816 INFO L93 Difference]: Finished difference Result 77155 states and 243550 transitions. [2019-12-07 14:59:30,817 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 14:59:30,817 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2019-12-07 14:59:30,817 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:59:30,927 INFO L225 Difference]: With dead ends: 77155 [2019-12-07 14:59:30,927 INFO L226 Difference]: Without dead ends: 77019 [2019-12-07 14:59:30,928 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:59:31,197 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77019 states. [2019-12-07 14:59:31,949 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77019 to 63074. [2019-12-07 14:59:31,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63074 states. [2019-12-07 14:59:32,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63074 states to 63074 states and 200627 transitions. [2019-12-07 14:59:32,065 INFO L78 Accepts]: Start accepts. Automaton has 63074 states and 200627 transitions. Word has length 29 [2019-12-07 14:59:32,065 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:59:32,065 INFO L462 AbstractCegarLoop]: Abstraction has 63074 states and 200627 transitions. [2019-12-07 14:59:32,065 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:59:32,065 INFO L276 IsEmpty]: Start isEmpty. Operand 63074 states and 200627 transitions. [2019-12-07 14:59:32,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 14:59:32,095 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:59:32,095 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:59:32,096 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:59:32,096 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:59:32,096 INFO L82 PathProgramCache]: Analyzing trace with hash -1413309470, now seen corresponding path program 1 times [2019-12-07 14:59:32,096 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:59:32,096 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2141061806] [2019-12-07 14:59:32,096 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:59:32,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:59:32,136 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:59:32,136 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2141061806] [2019-12-07 14:59:32,136 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:59:32,136 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:59:32,137 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1337486043] [2019-12-07 14:59:32,137 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:59:32,137 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:59:32,137 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:59:32,137 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:59:32,137 INFO L87 Difference]: Start difference. First operand 63074 states and 200627 transitions. Second operand 5 states. [2019-12-07 14:59:32,242 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:59:32,242 INFO L93 Difference]: Finished difference Result 27465 states and 83450 transitions. [2019-12-07 14:59:32,242 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:59:32,243 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 31 [2019-12-07 14:59:32,243 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:59:32,268 INFO L225 Difference]: With dead ends: 27465 [2019-12-07 14:59:32,268 INFO L226 Difference]: Without dead ends: 23825 [2019-12-07 14:59:32,269 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:59:32,341 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23825 states. [2019-12-07 14:59:32,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23825 to 23209. [2019-12-07 14:59:32,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23209 states. [2019-12-07 14:59:32,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23209 states to 23209 states and 70217 transitions. [2019-12-07 14:59:32,591 INFO L78 Accepts]: Start accepts. Automaton has 23209 states and 70217 transitions. Word has length 31 [2019-12-07 14:59:32,591 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:59:32,591 INFO L462 AbstractCegarLoop]: Abstraction has 23209 states and 70217 transitions. [2019-12-07 14:59:32,591 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:59:32,591 INFO L276 IsEmpty]: Start isEmpty. Operand 23209 states and 70217 transitions. [2019-12-07 14:59:32,610 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 14:59:32,611 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:59:32,611 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:59:32,611 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:59:32,611 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:59:32,611 INFO L82 PathProgramCache]: Analyzing trace with hash 483024013, now seen corresponding path program 1 times [2019-12-07 14:59:32,611 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:59:32,611 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [16558516] [2019-12-07 14:59:32,611 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:59:32,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:59:32,660 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:59:32,660 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [16558516] [2019-12-07 14:59:32,660 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:59:32,660 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:59:32,660 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [123179374] [2019-12-07 14:59:32,661 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:59:32,661 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:59:32,661 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:59:32,661 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:59:32,661 INFO L87 Difference]: Start difference. First operand 23209 states and 70217 transitions. Second operand 6 states. [2019-12-07 14:59:33,250 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:59:33,250 INFO L93 Difference]: Finished difference Result 29176 states and 86308 transitions. [2019-12-07 14:59:33,251 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 14:59:33,251 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 40 [2019-12-07 14:59:33,251 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:59:33,288 INFO L225 Difference]: With dead ends: 29176 [2019-12-07 14:59:33,289 INFO L226 Difference]: Without dead ends: 29084 [2019-12-07 14:59:33,289 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=47, Invalid=109, Unknown=0, NotChecked=0, Total=156 [2019-12-07 14:59:33,372 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29084 states. [2019-12-07 14:59:33,615 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29084 to 23026. [2019-12-07 14:59:33,615 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23026 states. [2019-12-07 14:59:33,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23026 states to 23026 states and 69667 transitions. [2019-12-07 14:59:33,655 INFO L78 Accepts]: Start accepts. Automaton has 23026 states and 69667 transitions. Word has length 40 [2019-12-07 14:59:33,655 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:59:33,655 INFO L462 AbstractCegarLoop]: Abstraction has 23026 states and 69667 transitions. [2019-12-07 14:59:33,655 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:59:33,655 INFO L276 IsEmpty]: Start isEmpty. Operand 23026 states and 69667 transitions. [2019-12-07 14:59:33,675 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 14:59:33,676 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:59:33,676 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:59:33,676 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:59:33,676 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:59:33,676 INFO L82 PathProgramCache]: Analyzing trace with hash -1848652026, now seen corresponding path program 1 times [2019-12-07 14:59:33,676 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:59:33,676 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1166114908] [2019-12-07 14:59:33,676 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:59:33,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:59:33,719 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:59:33,719 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1166114908] [2019-12-07 14:59:33,719 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:59:33,719 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:59:33,719 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1644750257] [2019-12-07 14:59:33,720 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:59:33,720 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:59:33,720 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:59:33,720 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:59:33,720 INFO L87 Difference]: Start difference. First operand 23026 states and 69667 transitions. Second operand 6 states. [2019-12-07 14:59:34,133 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:59:34,134 INFO L93 Difference]: Finished difference Result 26927 states and 80043 transitions. [2019-12-07 14:59:34,134 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 14:59:34,134 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 41 [2019-12-07 14:59:34,134 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:59:34,161 INFO L225 Difference]: With dead ends: 26927 [2019-12-07 14:59:34,161 INFO L226 Difference]: Without dead ends: 26835 [2019-12-07 14:59:34,161 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=47, Invalid=109, Unknown=0, NotChecked=0, Total=156 [2019-12-07 14:59:34,237 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26835 states. [2019-12-07 14:59:34,446 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26835 to 20846. [2019-12-07 14:59:34,446 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20846 states. [2019-12-07 14:59:34,481 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20846 states to 20846 states and 63597 transitions. [2019-12-07 14:59:34,481 INFO L78 Accepts]: Start accepts. Automaton has 20846 states and 63597 transitions. Word has length 41 [2019-12-07 14:59:34,481 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:59:34,481 INFO L462 AbstractCegarLoop]: Abstraction has 20846 states and 63597 transitions. [2019-12-07 14:59:34,481 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:59:34,481 INFO L276 IsEmpty]: Start isEmpty. Operand 20846 states and 63597 transitions. [2019-12-07 14:59:34,499 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 14:59:34,500 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:59:34,500 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:59:34,500 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:59:34,500 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:59:34,500 INFO L82 PathProgramCache]: Analyzing trace with hash -1237610810, now seen corresponding path program 1 times [2019-12-07 14:59:34,500 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:59:34,500 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [643651780] [2019-12-07 14:59:34,500 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:59:34,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:59:34,549 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:59:34,549 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [643651780] [2019-12-07 14:59:34,549 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:59:34,549 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 14:59:34,549 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1056352966] [2019-12-07 14:59:34,550 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:59:34,550 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:59:34,550 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:59:34,550 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:59:34,550 INFO L87 Difference]: Start difference. First operand 20846 states and 63597 transitions. Second operand 5 states. [2019-12-07 14:59:34,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:59:34,937 INFO L93 Difference]: Finished difference Result 32121 states and 96604 transitions. [2019-12-07 14:59:34,937 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 14:59:34,937 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 14:59:34,937 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:59:34,975 INFO L225 Difference]: With dead ends: 32121 [2019-12-07 14:59:34,975 INFO L226 Difference]: Without dead ends: 32121 [2019-12-07 14:59:34,976 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:59:35,068 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32121 states. [2019-12-07 14:59:35,363 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32121 to 27934. [2019-12-07 14:59:35,363 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27934 states. [2019-12-07 14:59:35,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27934 states to 27934 states and 84791 transitions. [2019-12-07 14:59:35,411 INFO L78 Accepts]: Start accepts. Automaton has 27934 states and 84791 transitions. Word has length 41 [2019-12-07 14:59:35,411 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:59:35,411 INFO L462 AbstractCegarLoop]: Abstraction has 27934 states and 84791 transitions. [2019-12-07 14:59:35,412 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:59:35,412 INFO L276 IsEmpty]: Start isEmpty. Operand 27934 states and 84791 transitions. [2019-12-07 14:59:35,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 14:59:35,439 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:59:35,439 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:59:35,439 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:59:35,439 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:59:35,440 INFO L82 PathProgramCache]: Analyzing trace with hash 685009244, now seen corresponding path program 2 times [2019-12-07 14:59:35,440 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:59:35,440 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1413042160] [2019-12-07 14:59:35,440 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:59:35,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:59:35,472 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:59:35,472 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1413042160] [2019-12-07 14:59:35,472 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:59:35,472 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:59:35,473 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [704116508] [2019-12-07 14:59:35,473 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:59:35,473 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:59:35,473 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:59:35,473 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:59:35,473 INFO L87 Difference]: Start difference. First operand 27934 states and 84791 transitions. Second operand 3 states. [2019-12-07 14:59:35,550 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:59:35,550 INFO L93 Difference]: Finished difference Result 26545 states and 79312 transitions. [2019-12-07 14:59:35,551 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:59:35,551 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2019-12-07 14:59:35,551 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:59:35,582 INFO L225 Difference]: With dead ends: 26545 [2019-12-07 14:59:35,582 INFO L226 Difference]: Without dead ends: 26545 [2019-12-07 14:59:35,583 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:59:35,658 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26545 states. [2019-12-07 14:59:35,911 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26545 to 25566. [2019-12-07 14:59:35,911 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25566 states. [2019-12-07 14:59:35,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25566 states to 25566 states and 76580 transitions. [2019-12-07 14:59:35,953 INFO L78 Accepts]: Start accepts. Automaton has 25566 states and 76580 transitions. Word has length 41 [2019-12-07 14:59:35,954 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:59:35,954 INFO L462 AbstractCegarLoop]: Abstraction has 25566 states and 76580 transitions. [2019-12-07 14:59:35,954 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:59:35,954 INFO L276 IsEmpty]: Start isEmpty. Operand 25566 states and 76580 transitions. [2019-12-07 14:59:35,975 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 14:59:35,975 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:59:35,975 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:59:35,975 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:59:35,975 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:59:35,975 INFO L82 PathProgramCache]: Analyzing trace with hash 838446510, now seen corresponding path program 1 times [2019-12-07 14:59:35,975 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:59:35,976 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1863654705] [2019-12-07 14:59:35,976 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:59:35,990 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:59:36,032 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:59:36,032 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1863654705] [2019-12-07 14:59:36,033 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:59:36,033 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 14:59:36,033 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [55642444] [2019-12-07 14:59:36,033 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:59:36,033 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:59:36,033 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:59:36,033 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:59:36,033 INFO L87 Difference]: Start difference. First operand 25566 states and 76580 transitions. Second operand 6 states. [2019-12-07 14:59:36,132 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:59:36,132 INFO L93 Difference]: Finished difference Result 23684 states and 72232 transitions. [2019-12-07 14:59:36,132 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 14:59:36,132 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 42 [2019-12-07 14:59:36,132 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:59:36,157 INFO L225 Difference]: With dead ends: 23684 [2019-12-07 14:59:36,157 INFO L226 Difference]: Without dead ends: 23479 [2019-12-07 14:59:36,157 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:59:36,226 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23479 states. [2019-12-07 14:59:36,422 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23479 to 12933. [2019-12-07 14:59:36,422 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12933 states. [2019-12-07 14:59:36,440 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12933 states to 12933 states and 39638 transitions. [2019-12-07 14:59:36,441 INFO L78 Accepts]: Start accepts. Automaton has 12933 states and 39638 transitions. Word has length 42 [2019-12-07 14:59:36,441 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:59:36,441 INFO L462 AbstractCegarLoop]: Abstraction has 12933 states and 39638 transitions. [2019-12-07 14:59:36,441 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:59:36,441 INFO L276 IsEmpty]: Start isEmpty. Operand 12933 states and 39638 transitions. [2019-12-07 14:59:36,452 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 14:59:36,452 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:59:36,452 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:59:36,453 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:59:36,453 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:59:36,453 INFO L82 PathProgramCache]: Analyzing trace with hash -944534763, now seen corresponding path program 1 times [2019-12-07 14:59:36,453 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:59:36,453 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1573532126] [2019-12-07 14:59:36,453 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:59:36,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:59:36,494 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:59:36,495 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1573532126] [2019-12-07 14:59:36,495 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:59:36,495 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:59:36,495 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [420910681] [2019-12-07 14:59:36,495 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:59:36,495 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:59:36,495 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:59:36,495 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:59:36,495 INFO L87 Difference]: Start difference. First operand 12933 states and 39638 transitions. Second operand 3 states. [2019-12-07 14:59:36,553 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:59:36,553 INFO L93 Difference]: Finished difference Result 23381 states and 71654 transitions. [2019-12-07 14:59:36,554 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:59:36,554 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 56 [2019-12-07 14:59:36,554 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:59:36,565 INFO L225 Difference]: With dead ends: 23381 [2019-12-07 14:59:36,565 INFO L226 Difference]: Without dead ends: 10896 [2019-12-07 14:59:36,566 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:59:36,608 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10896 states. [2019-12-07 14:59:36,696 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10896 to 10896. [2019-12-07 14:59:36,696 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10896 states. [2019-12-07 14:59:36,712 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10896 states to 10896 states and 33225 transitions. [2019-12-07 14:59:36,712 INFO L78 Accepts]: Start accepts. Automaton has 10896 states and 33225 transitions. Word has length 56 [2019-12-07 14:59:36,712 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:59:36,712 INFO L462 AbstractCegarLoop]: Abstraction has 10896 states and 33225 transitions. [2019-12-07 14:59:36,712 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:59:36,713 INFO L276 IsEmpty]: Start isEmpty. Operand 10896 states and 33225 transitions. [2019-12-07 14:59:36,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 14:59:36,722 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:59:36,722 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:59:36,722 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:59:36,722 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:59:36,722 INFO L82 PathProgramCache]: Analyzing trace with hash 1033271685, now seen corresponding path program 2 times [2019-12-07 14:59:36,722 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:59:36,722 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [646825100] [2019-12-07 14:59:36,722 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:59:36,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:59:36,869 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:59:36,869 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [646825100] [2019-12-07 14:59:36,869 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:59:36,869 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 14:59:36,869 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [844330087] [2019-12-07 14:59:36,869 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 14:59:36,869 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:59:36,869 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 14:59:36,870 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 14:59:36,870 INFO L87 Difference]: Start difference. First operand 10896 states and 33225 transitions. Second operand 11 states. [2019-12-07 14:59:37,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:59:37,574 INFO L93 Difference]: Finished difference Result 30494 states and 92765 transitions. [2019-12-07 14:59:37,574 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2019-12-07 14:59:37,574 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 56 [2019-12-07 14:59:37,574 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:59:37,595 INFO L225 Difference]: With dead ends: 30494 [2019-12-07 14:59:37,595 INFO L226 Difference]: Without dead ends: 20428 [2019-12-07 14:59:37,596 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 382 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=284, Invalid=1198, Unknown=0, NotChecked=0, Total=1482 [2019-12-07 14:59:37,657 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20428 states. [2019-12-07 14:59:37,801 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20428 to 13201. [2019-12-07 14:59:37,801 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13201 states. [2019-12-07 14:59:37,822 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13201 states to 13201 states and 39668 transitions. [2019-12-07 14:59:37,823 INFO L78 Accepts]: Start accepts. Automaton has 13201 states and 39668 transitions. Word has length 56 [2019-12-07 14:59:37,823 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:59:37,823 INFO L462 AbstractCegarLoop]: Abstraction has 13201 states and 39668 transitions. [2019-12-07 14:59:37,823 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 14:59:37,823 INFO L276 IsEmpty]: Start isEmpty. Operand 13201 states and 39668 transitions. [2019-12-07 14:59:37,834 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 14:59:37,834 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:59:37,834 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:59:37,834 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:59:37,835 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:59:37,835 INFO L82 PathProgramCache]: Analyzing trace with hash -1822247207, now seen corresponding path program 3 times [2019-12-07 14:59:37,835 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:59:37,835 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1306102500] [2019-12-07 14:59:37,835 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:59:37,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:59:37,992 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:59:37,992 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1306102500] [2019-12-07 14:59:37,992 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:59:37,993 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 14:59:37,993 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [938452362] [2019-12-07 14:59:37,993 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 14:59:37,993 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:59:37,993 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 14:59:37,993 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2019-12-07 14:59:37,993 INFO L87 Difference]: Start difference. First operand 13201 states and 39668 transitions. Second operand 12 states. [2019-12-07 14:59:39,043 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:59:39,043 INFO L93 Difference]: Finished difference Result 17733 states and 52098 transitions. [2019-12-07 14:59:39,043 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2019-12-07 14:59:39,043 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 56 [2019-12-07 14:59:39,043 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:59:39,060 INFO L225 Difference]: With dead ends: 17733 [2019-12-07 14:59:39,060 INFO L226 Difference]: Without dead ends: 16307 [2019-12-07 14:59:39,061 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 153 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=178, Invalid=692, Unknown=0, NotChecked=0, Total=870 [2019-12-07 14:59:39,114 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16307 states. [2019-12-07 14:59:39,236 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16307 to 13133. [2019-12-07 14:59:39,236 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13133 states. [2019-12-07 14:59:39,254 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13133 states to 13133 states and 39482 transitions. [2019-12-07 14:59:39,255 INFO L78 Accepts]: Start accepts. Automaton has 13133 states and 39482 transitions. Word has length 56 [2019-12-07 14:59:39,255 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:59:39,255 INFO L462 AbstractCegarLoop]: Abstraction has 13133 states and 39482 transitions. [2019-12-07 14:59:39,255 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 14:59:39,255 INFO L276 IsEmpty]: Start isEmpty. Operand 13133 states and 39482 transitions. [2019-12-07 14:59:39,265 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 14:59:39,266 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:59:39,266 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:59:39,266 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:59:39,266 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:59:39,266 INFO L82 PathProgramCache]: Analyzing trace with hash -1734091201, now seen corresponding path program 4 times [2019-12-07 14:59:39,266 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:59:39,266 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1775026131] [2019-12-07 14:59:39,266 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:59:39,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 14:59:39,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 14:59:39,325 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 14:59:39,325 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 14:59:39,327 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [807] [807] ULTIMATE.startENTRY-->L818: Formula: (let ((.cse0 (store |v_#valid_66| 0 0))) (and (= 0 v_~__unbuffered_cnt~0_95) (< |v_#StackHeapBarrier_16| |v_ULTIMATE.start_main_~#t2073~0.base_30|) (= 0 v_~x~0_240) (= v_~x$r_buff1_thd0~0_309 0) (= v_~weak$$choice2~0_201 0) (= 0 v_~x$w_buff1_used~0_624) (= 0 v_~x$r_buff1_thd2~0_264) (= v_~y~0_226 0) (= v_~z~0_95 0) (< 0 |v_#StackHeapBarrier_16|) (= 0 v_~x$read_delayed_var~0.base_7) (= 0 v_~x$r_buff0_thd3~0_148) (= 0 v_~x$w_buff1~0_328) (= 0 v_~x$r_buff0_thd2~0_323) (= v_~x$flush_delayed~0_62 0) (= 0 v_~x$w_buff0_used~0_913) (= 0 |v_#NULL.base_4|) (= 0 v_~x$read_delayed~0_7) (= (select .cse0 |v_ULTIMATE.start_main_~#t2073~0.base_30|) 0) (= v_~x$r_buff0_thd1~0_362 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t2073~0.base_30| 4)) (= 0 v_~weak$$choice0~0_37) (= v_~main$tmp_guard1~0_53 0) (= v_~main$tmp_guard0~0_42 0) (= 0 v_~__unbuffered_p0_EAX~0_85) (= |v_#memory_int_23| (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t2073~0.base_30| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t2073~0.base_30|) |v_ULTIMATE.start_main_~#t2073~0.offset_22| 0))) (= 0 v_~__unbuffered_p2_EAX~0_68) (= |v_#NULL.offset_4| 0) (= 0 v_~x$read_delayed_var~0.offset_7) (= 0 v_~x$r_buff1_thd3~0_267) (= v_~x$mem_tmp~0_40 0) (= v_~x$r_buff1_thd1~0_428 0) (= 0 v_~x$w_buff0~0_403) (= v_~x$r_buff0_thd0~0_156 0) (= |v_ULTIMATE.start_main_~#t2073~0.offset_22| 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t2073~0.base_30| 1) |v_#valid_64|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_16|, #valid=|v_#valid_66|, #memory_int=|v_#memory_int_24|, #length=|v_#length_24|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_403, ~x$flush_delayed~0=v_~x$flush_delayed~0_62, ULTIMATE.start_main_~#t2075~0.base=|v_ULTIMATE.start_main_~#t2075~0.base_23|, #NULL.offset=|v_#NULL.offset_4|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_428, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_148, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_40|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_34|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_85, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_68, ULTIMATE.start_main_~#t2074~0.offset=|v_ULTIMATE.start_main_~#t2074~0.offset_22|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_156, ~x$w_buff1~0=v_~x$w_buff1~0_328, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_624, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_264, ULTIMATE.start_main_~#t2074~0.base=|v_ULTIMATE.start_main_~#t2074~0.base_31|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ULTIMATE.start_main_~#t2073~0.offset=|v_ULTIMATE.start_main_~#t2073~0.offset_22|, ~weak$$choice0~0=v_~weak$$choice0~0_37, #StackHeapBarrier=|v_#StackHeapBarrier_16|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_95, ~x~0=v_~x~0_240, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_362, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_114|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_267, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_53, ~x$mem_tmp~0=v_~x$mem_tmp~0_40, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_51|, ULTIMATE.start_main_~#t2075~0.offset=|v_ULTIMATE.start_main_~#t2075~0.offset_14|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_60|, ULTIMATE.start_main_~#t2073~0.base=|v_ULTIMATE.start_main_~#t2073~0.base_30|, ~y~0=v_~y~0_226, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_15|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_42, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_309, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_323, #NULL.base=|v_#NULL.base_4|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_913, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_62|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_23|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_8|, ~z~0=v_~z~0_95, ~weak$$choice2~0=v_~weak$$choice2~0_201, ~x$read_delayed~0=v_~x$read_delayed~0_7} AuxVars[] AssignedVars[~x$w_buff0~0, ~x$r_buff0_thd1~0, ~x$flush_delayed~0, ULTIMATE.start_main_~#t2075~0.base, #NULL.offset, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~x$r_buff1_thd1~0, ~main$tmp_guard1~0, ~x$r_buff0_thd3~0, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t2075~0.offset, ULTIMATE.start_main_#t~ite44, ~__unbuffered_p0_EAX~0, ULTIMATE.start_main_~#t2073~0.base, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t2074~0.offset, ~y~0, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~nondet40, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_~#t2074~0.base, ~x$read_delayed_var~0.base, #NULL.base, ULTIMATE.start_main_~#t2073~0.offset, ~x$w_buff0_used~0, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_#t~nondet38, #memory_int, ~__unbuffered_cnt~0, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ~x~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 14:59:39,328 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L818-1-->L820: Formula: (and (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2074~0.base_10| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2074~0.base_10|) |v_ULTIMATE.start_main_~#t2074~0.offset_9| 1)) |v_#memory_int_15|) (= |v_ULTIMATE.start_main_~#t2074~0.offset_9| 0) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2074~0.base_10|) (= (select |v_#valid_32| |v_ULTIMATE.start_main_~#t2074~0.base_10|) 0) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t2074~0.base_10| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t2074~0.base_10|)) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t2074~0.base_10| 4) |v_#length_15|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_4|, #length=|v_#length_15|, ULTIMATE.start_main_~#t2074~0.offset=|v_ULTIMATE.start_main_~#t2074~0.offset_9|, ULTIMATE.start_main_~#t2074~0.base=|v_ULTIMATE.start_main_~#t2074~0.base_10|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length, ULTIMATE.start_main_~#t2074~0.offset, ULTIMATE.start_main_~#t2074~0.base] because there is no mapped edge [2019-12-07 14:59:39,328 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [675] [675] P1ENTRY-->L5-3: Formula: (and (= v_~x$w_buff0~0_21 v_~x$w_buff1~0_19) (= v_P1Thread1of1ForFork0_~arg.base_4 |v_P1Thread1of1ForFork0_#in~arg.base_6|) (= v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_6 |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_4|) (not (= 0 v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_6)) (= v_~x$w_buff1_used~0_52 v_~x$w_buff0_used~0_98) (= |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_4| (ite (not (and (not (= 0 (mod v_~x$w_buff0_used~0_97 256))) (not (= 0 (mod v_~x$w_buff1_used~0_52 256))))) 1 0)) (= v_P1Thread1of1ForFork0_~arg.offset_4 |v_P1Thread1of1ForFork0_#in~arg.offset_6|) (= 1 v_~x$w_buff0_used~0_97) (= 1 v_~x$w_buff0~0_20)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_21, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_6|, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_6|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_98} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_20, P1Thread1of1ForFork0___VERIFIER_assert_~expression=v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_6, P1Thread1of1ForFork0_~arg.offset=v_P1Thread1of1ForFork0_~arg.offset_4, P1Thread1of1ForFork0_~arg.base=v_P1Thread1of1ForFork0_~arg.base_4, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_6|, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_4|, ~x$w_buff1~0=v_~x$w_buff1~0_19, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_6|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_52, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_97} AuxVars[] AssignedVars[~x$w_buff0~0, P1Thread1of1ForFork0___VERIFIER_assert_~expression, P1Thread1of1ForFork0_~arg.offset, P1Thread1of1ForFork0_~arg.base, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 14:59:39,329 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L820-1-->L822: Formula: (and (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2075~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2075~0.base_11|) |v_ULTIMATE.start_main_~#t2075~0.offset_10| 2)) |v_#memory_int_13|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t2075~0.base_11|) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t2075~0.base_11| 1)) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t2075~0.base_11|)) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t2075~0.base_11| 4) |v_#length_13|) (= |v_ULTIMATE.start_main_~#t2075~0.offset_10| 0) (not (= |v_ULTIMATE.start_main_~#t2075~0.base_11| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_14|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t2075~0.base=|v_ULTIMATE.start_main_~#t2075~0.base_11|, #length=|v_#length_13|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_4|, ULTIMATE.start_main_~#t2075~0.offset=|v_ULTIMATE.start_main_~#t2075~0.offset_10|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_~#t2075~0.base, #length, ULTIMATE.start_main_#t~nondet39, ULTIMATE.start_main_~#t2075~0.offset] because there is no mapped edge [2019-12-07 14:59:39,330 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [753] [753] L795-2-->L795-4: Formula: (let ((.cse0 (= (mod ~x$w_buff1_used~0_In1521275523 256) 0)) (.cse1 (= (mod ~x$r_buff1_thd3~0_In1521275523 256) 0))) (or (and (not .cse0) (not .cse1) (= ~x$w_buff1~0_In1521275523 |P2Thread1of1ForFork1_#t~ite32_Out1521275523|)) (and (or .cse0 .cse1) (= ~x~0_In1521275523 |P2Thread1of1ForFork1_#t~ite32_Out1521275523|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In1521275523, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1521275523, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1521275523, ~x~0=~x~0_In1521275523} OutVars{P2Thread1of1ForFork1_#t~ite32=|P2Thread1of1ForFork1_#t~ite32_Out1521275523|, ~x$w_buff1~0=~x$w_buff1~0_In1521275523, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1521275523, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1521275523, ~x~0=~x~0_In1521275523} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32] because there is no mapped edge [2019-12-07 14:59:39,330 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [677] [677] L795-4-->L796: Formula: (= v_~x~0_21 |v_P2Thread1of1ForFork1_#t~ite32_8|) InVars {P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_8|} OutVars{P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_7|, P2Thread1of1ForFork1_#t~ite33=|v_P2Thread1of1ForFork1_#t~ite33_11|, ~x~0=v_~x~0_21} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32, P2Thread1of1ForFork1_#t~ite33, ~x~0] because there is no mapped edge [2019-12-07 14:59:39,330 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] L796-->L796-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In432764255 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In432764255 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork1_#t~ite34_Out432764255| 0) (not .cse1)) (and (or .cse1 .cse0) (= ~x$w_buff0_used~0_In432764255 |P2Thread1of1ForFork1_#t~ite34_Out432764255|)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In432764255, ~x$w_buff0_used~0=~x$w_buff0_used~0_In432764255} OutVars{P2Thread1of1ForFork1_#t~ite34=|P2Thread1of1ForFork1_#t~ite34_Out432764255|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In432764255, ~x$w_buff0_used~0=~x$w_buff0_used~0_In432764255} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-12-07 14:59:39,331 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [746] [746] L776-->L776-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In1380279285 256) 0)) (.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In1380279285 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork0_#t~ite28_Out1380279285|)) (and (or .cse1 .cse0) (= ~x$w_buff0_used~0_In1380279285 |P1Thread1of1ForFork0_#t~ite28_Out1380279285|)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1380279285, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1380279285} OutVars{~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1380279285, P1Thread1of1ForFork0_#t~ite28=|P1Thread1of1ForFork0_#t~ite28_Out1380279285|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1380279285} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite28] because there is no mapped edge [2019-12-07 14:59:39,331 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [738] [738] L777-->L777-2: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff1_thd2~0_In-1141778247 256))) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In-1141778247 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In-1141778247 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In-1141778247 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork0_#t~ite29_Out-1141778247| ~x$w_buff1_used~0_In-1141778247) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |P1Thread1of1ForFork0_#t~ite29_Out-1141778247| 0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1141778247, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1141778247, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1141778247, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1141778247} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-1141778247, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1141778247, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1141778247, P1Thread1of1ForFork0_#t~ite29=|P1Thread1of1ForFork0_#t~ite29_Out-1141778247|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1141778247} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 14:59:39,332 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L778-->L779: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-490519094 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-490519094 256))) (.cse2 (= ~x$r_buff0_thd2~0_Out-490519094 ~x$r_buff0_thd2~0_In-490519094))) (or (and (not .cse0) (not .cse1) (= ~x$r_buff0_thd2~0_Out-490519094 0)) (and .cse0 .cse2) (and .cse1 .cse2))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-490519094, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-490519094} OutVars{P1Thread1of1ForFork0_#t~ite30=|P1Thread1of1ForFork0_#t~ite30_Out-490519094|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-490519094, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-490519094} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite30, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 14:59:39,332 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] L779-->L779-2: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In-1841090625 256))) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In-1841090625 256))) (.cse1 (= (mod ~x$w_buff1_used~0_In-1841090625 256) 0)) (.cse0 (= (mod ~x$r_buff1_thd2~0_In-1841090625 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork0_#t~ite31_Out-1841090625| 0)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= |P1Thread1of1ForFork0_#t~ite31_Out-1841090625| ~x$r_buff1_thd2~0_In-1841090625)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1841090625, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1841090625, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1841090625, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1841090625} OutVars{P1Thread1of1ForFork0_#t~ite31=|P1Thread1of1ForFork0_#t~ite31_Out-1841090625|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1841090625, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1841090625, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1841090625, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1841090625} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 14:59:39,332 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L779-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_52 1) v_~__unbuffered_cnt~0_51) (= v_~x$r_buff1_thd2~0_46 |v_P1Thread1of1ForFork0_#t~ite31_28|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|)) InVars {P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_52} OutVars{P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_27|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_46, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_51, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 14:59:39,332 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L740-->L740-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-419535407 256) 0))) (or (and (= |P0Thread1of1ForFork2_#t~ite8_In-419535407| |P0Thread1of1ForFork2_#t~ite8_Out-419535407|) (= ~x$w_buff0~0_In-419535407 |P0Thread1of1ForFork2_#t~ite9_Out-419535407|) (not .cse0)) (and (let ((.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In-419535407 256)))) (or (and (= 0 (mod ~x$r_buff1_thd1~0_In-419535407 256)) .cse1) (= (mod ~x$w_buff0_used~0_In-419535407 256) 0) (and .cse1 (= (mod ~x$w_buff1_used~0_In-419535407 256) 0)))) .cse0 (= |P0Thread1of1ForFork2_#t~ite9_Out-419535407| |P0Thread1of1ForFork2_#t~ite8_Out-419535407|) (= ~x$w_buff0~0_In-419535407 |P0Thread1of1ForFork2_#t~ite8_Out-419535407|)))) InVars {~x$w_buff0~0=~x$w_buff0~0_In-419535407, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-419535407, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_In-419535407|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-419535407, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-419535407, ~weak$$choice2~0=~weak$$choice2~0_In-419535407, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-419535407} OutVars{~x$w_buff0~0=~x$w_buff0~0_In-419535407, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-419535407, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_Out-419535407|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-419535407, P0Thread1of1ForFork2_#t~ite9=|P0Thread1of1ForFork2_#t~ite9_Out-419535407|, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-419535407, ~weak$$choice2~0=~weak$$choice2~0_In-419535407, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-419535407} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite8, P0Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 14:59:39,334 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L797-->L797-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd3~0_In262501188 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In262501188 256))) (.cse2 (= (mod ~x$w_buff0_used~0_In262501188 256) 0)) (.cse3 (= 0 (mod ~x$r_buff0_thd3~0_In262501188 256)))) (or (and (= ~x$w_buff1_used~0_In262501188 |P2Thread1of1ForFork1_#t~ite35_Out262501188|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork1_#t~ite35_Out262501188| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In262501188, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In262501188, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In262501188, ~x$w_buff0_used~0=~x$w_buff0_used~0_In262501188} OutVars{P2Thread1of1ForFork1_#t~ite35=|P2Thread1of1ForFork1_#t~ite35_Out262501188|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In262501188, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In262501188, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In262501188, ~x$w_buff0_used~0=~x$w_buff0_used~0_In262501188} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite35] because there is no mapped edge [2019-12-07 14:59:39,334 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [744] [744] L798-->L798-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd3~0_In-77900890 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-77900890 256)))) (or (and (or .cse0 .cse1) (= ~x$r_buff0_thd3~0_In-77900890 |P2Thread1of1ForFork1_#t~ite36_Out-77900890|)) (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork1_#t~ite36_Out-77900890|)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-77900890, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-77900890} OutVars{P2Thread1of1ForFork1_#t~ite36=|P2Thread1of1ForFork1_#t~ite36_Out-77900890|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-77900890, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-77900890} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-12-07 14:59:39,334 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [748] [748] L799-->L799-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In1931844491 256))) (.cse0 (= (mod ~x$r_buff0_thd3~0_In1931844491 256) 0)) (.cse3 (= 0 (mod ~x$r_buff1_thd3~0_In1931844491 256))) (.cse2 (= (mod ~x$w_buff1_used~0_In1931844491 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork1_#t~ite37_Out1931844491| 0)) (and (= |P2Thread1of1ForFork1_#t~ite37_Out1931844491| ~x$r_buff1_thd3~0_In1931844491) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1931844491, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1931844491, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1931844491, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1931844491} OutVars{P2Thread1of1ForFork1_#t~ite37=|P2Thread1of1ForFork1_#t~ite37_Out1931844491|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1931844491, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1931844491, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1931844491, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1931844491} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-12-07 14:59:39,334 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L799-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|) (= v_~x$r_buff1_thd3~0_48 |v_P2Thread1of1ForFork1_#t~ite37_28|) (= (+ v_~__unbuffered_cnt~0_64 1) v_~__unbuffered_cnt~0_63)) InVars {P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_64} OutVars{P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_27|, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_48, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37, P2Thread1of1ForFork1_#res.base, ~x$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 14:59:39,335 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L743-->L743-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-367902746 256) 0))) (or (and (not .cse0) (= ~x$w_buff1_used~0_In-367902746 |P0Thread1of1ForFork2_#t~ite18_Out-367902746|) (= |P0Thread1of1ForFork2_#t~ite17_In-367902746| |P0Thread1of1ForFork2_#t~ite17_Out-367902746|)) (and (= ~x$w_buff1_used~0_In-367902746 |P0Thread1of1ForFork2_#t~ite17_Out-367902746|) .cse0 (= |P0Thread1of1ForFork2_#t~ite17_Out-367902746| |P0Thread1of1ForFork2_#t~ite18_Out-367902746|) (let ((.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In-367902746 256)))) (or (= (mod ~x$w_buff0_used~0_In-367902746 256) 0) (and (= 0 (mod ~x$w_buff1_used~0_In-367902746 256)) .cse1) (and (= 0 (mod ~x$r_buff1_thd1~0_In-367902746 256)) .cse1)))))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-367902746, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_In-367902746|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-367902746, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-367902746, ~weak$$choice2~0=~weak$$choice2~0_In-367902746, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-367902746} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-367902746, P0Thread1of1ForFork2_#t~ite18=|P0Thread1of1ForFork2_#t~ite18_Out-367902746|, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_Out-367902746|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-367902746, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-367902746, ~weak$$choice2~0=~weak$$choice2~0_In-367902746, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-367902746} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite18, P0Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 14:59:39,335 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [730] [730] L744-->L745: Formula: (and (= v_~x$r_buff0_thd1~0_101 v_~x$r_buff0_thd1~0_100) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_101, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{P0Thread1of1ForFork2_#t~ite20=|v_P0Thread1of1ForFork2_#t~ite20_9|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_100, P0Thread1of1ForFork2_#t~ite19=|v_P0Thread1of1ForFork2_#t~ite19_6|, ~weak$$choice2~0=v_~weak$$choice2~0_39, P0Thread1of1ForFork2_#t~ite21=|v_P0Thread1of1ForFork2_#t~ite21_7|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite20, ~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite19, P0Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 14:59:39,336 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L745-->L745-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1049123528 256) 0))) (or (and (not .cse0) (= |P0Thread1of1ForFork2_#t~ite24_Out1049123528| ~x$r_buff1_thd1~0_In1049123528) (= |P0Thread1of1ForFork2_#t~ite23_In1049123528| |P0Thread1of1ForFork2_#t~ite23_Out1049123528|)) (and (= |P0Thread1of1ForFork2_#t~ite24_Out1049123528| |P0Thread1of1ForFork2_#t~ite23_Out1049123528|) (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In1049123528 256) 0))) (or (and (= (mod ~x$w_buff1_used~0_In1049123528 256) 0) .cse1) (= (mod ~x$w_buff0_used~0_In1049123528 256) 0) (and .cse1 (= (mod ~x$r_buff1_thd1~0_In1049123528 256) 0)))) (= ~x$r_buff1_thd1~0_In1049123528 |P0Thread1of1ForFork2_#t~ite23_Out1049123528|) .cse0))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1049123528, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1049123528, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1049123528, ~weak$$choice2~0=~weak$$choice2~0_In1049123528, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_In1049123528|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1049123528} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1049123528, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1049123528, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1049123528, P0Thread1of1ForFork2_#t~ite24=|P0Thread1of1ForFork2_#t~ite24_Out1049123528|, ~weak$$choice2~0=~weak$$choice2~0_In1049123528, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_Out1049123528|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1049123528} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite24, P0Thread1of1ForFork2_#t~ite23] because there is no mapped edge [2019-12-07 14:59:39,336 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [704] [704] L747-->L755: Formula: (and (= v_~x$flush_delayed~0_17 0) (not (= (mod v_~x$flush_delayed~0_18 256) 0)) (= v_~x~0_34 v_~x$mem_tmp~0_10) (= v_~__unbuffered_cnt~0_30 (+ v_~__unbuffered_cnt~0_31 1))) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_18, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_31, ~x$mem_tmp~0=v_~x$mem_tmp~0_10} OutVars{P0Thread1of1ForFork2_#t~ite25=|v_P0Thread1of1ForFork2_#t~ite25_13|, ~x$flush_delayed~0=v_~x$flush_delayed~0_17, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_30, ~x$mem_tmp~0=v_~x$mem_tmp~0_10, ~x~0=v_~x~0_34} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite25, ~x$flush_delayed~0, ~__unbuffered_cnt~0, ~x~0] because there is no mapped edge [2019-12-07 14:59:39,336 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [699] [699] L826-->L828-2: Formula: (and (or (= 0 (mod v_~x$w_buff0_used~0_158 256)) (= 0 (mod v_~x$r_buff0_thd0~0_26 256))) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_26, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_158} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_26, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_158} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 14:59:39,336 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L828-2-->L828-4: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In-1897769408 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In-1897769408 256)))) (or (and (not .cse0) (not .cse1) (= ~x$w_buff1~0_In-1897769408 |ULTIMATE.start_main_#t~ite41_Out-1897769408|)) (and (= ~x~0_In-1897769408 |ULTIMATE.start_main_#t~ite41_Out-1897769408|) (or .cse1 .cse0)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1897769408, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1897769408, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1897769408, ~x~0=~x~0_In-1897769408} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out-1897769408|, ~x$w_buff1~0=~x$w_buff1~0_In-1897769408, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1897769408, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1897769408, ~x~0=~x~0_In-1897769408} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41] because there is no mapped edge [2019-12-07 14:59:39,336 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L828-4-->L829: Formula: (= v_~x~0_24 |v_ULTIMATE.start_main_#t~ite41_11|) InVars {ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_11|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_10|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_6|, ~x~0=v_~x~0_24} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite42, ~x~0] because there is no mapped edge [2019-12-07 14:59:39,337 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [743] [743] L829-->L829-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1496839681 256))) (.cse0 (= (mod ~x$r_buff0_thd0~0_In-1496839681 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite43_Out-1496839681| 0)) (and (= ~x$w_buff0_used~0_In-1496839681 |ULTIMATE.start_main_#t~ite43_Out-1496839681|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1496839681, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1496839681} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1496839681, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out-1496839681|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1496839681} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-12-07 14:59:39,337 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [747] [747] L830-->L830-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff1_used~0_In642634852 256))) (.cse3 (= (mod ~x$r_buff1_thd0~0_In642634852 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In642634852 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In642634852 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite44_Out642634852|)) (and (= |ULTIMATE.start_main_#t~ite44_Out642634852| ~x$w_buff1_used~0_In642634852) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In642634852, ~x$w_buff1_used~0=~x$w_buff1_used~0_In642634852, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In642634852, ~x$w_buff0_used~0=~x$w_buff0_used~0_In642634852} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In642634852, ~x$w_buff1_used~0=~x$w_buff1_used~0_In642634852, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In642634852, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out642634852|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In642634852} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 14:59:39,337 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [750] [750] L831-->L831-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In1135533140 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In1135533140 256)))) (or (and (= |ULTIMATE.start_main_#t~ite45_Out1135533140| ~x$r_buff0_thd0~0_In1135533140) (or .cse0 .cse1)) (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite45_Out1135533140|) (not .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1135533140, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1135533140} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1135533140, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out1135533140|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1135533140} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 14:59:39,338 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L832-->L832-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1358875621 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In-1358875621 256))) (.cse3 (= (mod ~x$w_buff1_used~0_In-1358875621 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd0~0_In-1358875621 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite46_Out-1358875621| 0)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite46_Out-1358875621| ~x$r_buff1_thd0~0_In-1358875621) (or .cse3 .cse2)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1358875621, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1358875621, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1358875621, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1358875621} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1358875621, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out-1358875621|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1358875621, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1358875621, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1358875621} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 14:59:39,338 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L832-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_25 (ite (= (ite (not (and (= v_~z~0_60 2) (= 1 v_~__unbuffered_p2_EAX~0_35) (= 0 v_~__unbuffered_p0_EAX~0_54))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 0) (= v_~x$r_buff1_thd0~0_277 |v_ULTIMATE.start_main_#t~ite46_60|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15| (mod v_~main$tmp_guard1~0_25 256))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_54, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_60|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_35, ~z~0=v_~z~0_60} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_54, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_22, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_59|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_35, ~z~0=v_~z~0_60, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_277, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ~x$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 14:59:39,385 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 02:59:39 BasicIcfg [2019-12-07 14:59:39,385 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 14:59:39,385 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 14:59:39,385 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 14:59:39,385 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 14:59:39,386 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:57:21" (3/4) ... [2019-12-07 14:59:39,387 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 14:59:39,388 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [807] [807] ULTIMATE.startENTRY-->L818: Formula: (let ((.cse0 (store |v_#valid_66| 0 0))) (and (= 0 v_~__unbuffered_cnt~0_95) (< |v_#StackHeapBarrier_16| |v_ULTIMATE.start_main_~#t2073~0.base_30|) (= 0 v_~x~0_240) (= v_~x$r_buff1_thd0~0_309 0) (= v_~weak$$choice2~0_201 0) (= 0 v_~x$w_buff1_used~0_624) (= 0 v_~x$r_buff1_thd2~0_264) (= v_~y~0_226 0) (= v_~z~0_95 0) (< 0 |v_#StackHeapBarrier_16|) (= 0 v_~x$read_delayed_var~0.base_7) (= 0 v_~x$r_buff0_thd3~0_148) (= 0 v_~x$w_buff1~0_328) (= 0 v_~x$r_buff0_thd2~0_323) (= v_~x$flush_delayed~0_62 0) (= 0 v_~x$w_buff0_used~0_913) (= 0 |v_#NULL.base_4|) (= 0 v_~x$read_delayed~0_7) (= (select .cse0 |v_ULTIMATE.start_main_~#t2073~0.base_30|) 0) (= v_~x$r_buff0_thd1~0_362 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t2073~0.base_30| 4)) (= 0 v_~weak$$choice0~0_37) (= v_~main$tmp_guard1~0_53 0) (= v_~main$tmp_guard0~0_42 0) (= 0 v_~__unbuffered_p0_EAX~0_85) (= |v_#memory_int_23| (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t2073~0.base_30| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t2073~0.base_30|) |v_ULTIMATE.start_main_~#t2073~0.offset_22| 0))) (= 0 v_~__unbuffered_p2_EAX~0_68) (= |v_#NULL.offset_4| 0) (= 0 v_~x$read_delayed_var~0.offset_7) (= 0 v_~x$r_buff1_thd3~0_267) (= v_~x$mem_tmp~0_40 0) (= v_~x$r_buff1_thd1~0_428 0) (= 0 v_~x$w_buff0~0_403) (= v_~x$r_buff0_thd0~0_156 0) (= |v_ULTIMATE.start_main_~#t2073~0.offset_22| 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t2073~0.base_30| 1) |v_#valid_64|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_16|, #valid=|v_#valid_66|, #memory_int=|v_#memory_int_24|, #length=|v_#length_24|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_403, ~x$flush_delayed~0=v_~x$flush_delayed~0_62, ULTIMATE.start_main_~#t2075~0.base=|v_ULTIMATE.start_main_~#t2075~0.base_23|, #NULL.offset=|v_#NULL.offset_4|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_428, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_148, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_40|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_34|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_85, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_68, ULTIMATE.start_main_~#t2074~0.offset=|v_ULTIMATE.start_main_~#t2074~0.offset_22|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_156, ~x$w_buff1~0=v_~x$w_buff1~0_328, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_624, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_264, ULTIMATE.start_main_~#t2074~0.base=|v_ULTIMATE.start_main_~#t2074~0.base_31|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ULTIMATE.start_main_~#t2073~0.offset=|v_ULTIMATE.start_main_~#t2073~0.offset_22|, ~weak$$choice0~0=v_~weak$$choice0~0_37, #StackHeapBarrier=|v_#StackHeapBarrier_16|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_95, ~x~0=v_~x~0_240, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_362, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_114|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_267, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_53, ~x$mem_tmp~0=v_~x$mem_tmp~0_40, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_51|, ULTIMATE.start_main_~#t2075~0.offset=|v_ULTIMATE.start_main_~#t2075~0.offset_14|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_60|, ULTIMATE.start_main_~#t2073~0.base=|v_ULTIMATE.start_main_~#t2073~0.base_30|, ~y~0=v_~y~0_226, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_15|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_42, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_309, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_323, #NULL.base=|v_#NULL.base_4|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_913, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_62|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_23|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_8|, ~z~0=v_~z~0_95, ~weak$$choice2~0=v_~weak$$choice2~0_201, ~x$read_delayed~0=v_~x$read_delayed~0_7} AuxVars[] AssignedVars[~x$w_buff0~0, ~x$r_buff0_thd1~0, ~x$flush_delayed~0, ULTIMATE.start_main_~#t2075~0.base, #NULL.offset, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~x$r_buff1_thd1~0, ~main$tmp_guard1~0, ~x$r_buff0_thd3~0, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t2075~0.offset, ULTIMATE.start_main_#t~ite44, ~__unbuffered_p0_EAX~0, ULTIMATE.start_main_~#t2073~0.base, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t2074~0.offset, ~y~0, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~nondet40, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_~#t2074~0.base, ~x$read_delayed_var~0.base, #NULL.base, ULTIMATE.start_main_~#t2073~0.offset, ~x$w_buff0_used~0, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_#t~nondet38, #memory_int, ~__unbuffered_cnt~0, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ~x~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 14:59:39,388 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L818-1-->L820: Formula: (and (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2074~0.base_10| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2074~0.base_10|) |v_ULTIMATE.start_main_~#t2074~0.offset_9| 1)) |v_#memory_int_15|) (= |v_ULTIMATE.start_main_~#t2074~0.offset_9| 0) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2074~0.base_10|) (= (select |v_#valid_32| |v_ULTIMATE.start_main_~#t2074~0.base_10|) 0) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t2074~0.base_10| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t2074~0.base_10|)) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t2074~0.base_10| 4) |v_#length_15|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_4|, #length=|v_#length_15|, ULTIMATE.start_main_~#t2074~0.offset=|v_ULTIMATE.start_main_~#t2074~0.offset_9|, ULTIMATE.start_main_~#t2074~0.base=|v_ULTIMATE.start_main_~#t2074~0.base_10|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length, ULTIMATE.start_main_~#t2074~0.offset, ULTIMATE.start_main_~#t2074~0.base] because there is no mapped edge [2019-12-07 14:59:39,388 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [675] [675] P1ENTRY-->L5-3: Formula: (and (= v_~x$w_buff0~0_21 v_~x$w_buff1~0_19) (= v_P1Thread1of1ForFork0_~arg.base_4 |v_P1Thread1of1ForFork0_#in~arg.base_6|) (= v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_6 |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_4|) (not (= 0 v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_6)) (= v_~x$w_buff1_used~0_52 v_~x$w_buff0_used~0_98) (= |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_4| (ite (not (and (not (= 0 (mod v_~x$w_buff0_used~0_97 256))) (not (= 0 (mod v_~x$w_buff1_used~0_52 256))))) 1 0)) (= v_P1Thread1of1ForFork0_~arg.offset_4 |v_P1Thread1of1ForFork0_#in~arg.offset_6|) (= 1 v_~x$w_buff0_used~0_97) (= 1 v_~x$w_buff0~0_20)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_21, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_6|, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_6|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_98} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_20, P1Thread1of1ForFork0___VERIFIER_assert_~expression=v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_6, P1Thread1of1ForFork0_~arg.offset=v_P1Thread1of1ForFork0_~arg.offset_4, P1Thread1of1ForFork0_~arg.base=v_P1Thread1of1ForFork0_~arg.base_4, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_6|, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_4|, ~x$w_buff1~0=v_~x$w_buff1~0_19, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_6|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_52, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_97} AuxVars[] AssignedVars[~x$w_buff0~0, P1Thread1of1ForFork0___VERIFIER_assert_~expression, P1Thread1of1ForFork0_~arg.offset, P1Thread1of1ForFork0_~arg.base, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 14:59:39,389 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L820-1-->L822: Formula: (and (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2075~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2075~0.base_11|) |v_ULTIMATE.start_main_~#t2075~0.offset_10| 2)) |v_#memory_int_13|) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t2075~0.base_11|) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t2075~0.base_11| 1)) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t2075~0.base_11|)) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t2075~0.base_11| 4) |v_#length_13|) (= |v_ULTIMATE.start_main_~#t2075~0.offset_10| 0) (not (= |v_ULTIMATE.start_main_~#t2075~0.base_11| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_14|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t2075~0.base=|v_ULTIMATE.start_main_~#t2075~0.base_11|, #length=|v_#length_13|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_4|, ULTIMATE.start_main_~#t2075~0.offset=|v_ULTIMATE.start_main_~#t2075~0.offset_10|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_~#t2075~0.base, #length, ULTIMATE.start_main_#t~nondet39, ULTIMATE.start_main_~#t2075~0.offset] because there is no mapped edge [2019-12-07 14:59:39,390 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [753] [753] L795-2-->L795-4: Formula: (let ((.cse0 (= (mod ~x$w_buff1_used~0_In1521275523 256) 0)) (.cse1 (= (mod ~x$r_buff1_thd3~0_In1521275523 256) 0))) (or (and (not .cse0) (not .cse1) (= ~x$w_buff1~0_In1521275523 |P2Thread1of1ForFork1_#t~ite32_Out1521275523|)) (and (or .cse0 .cse1) (= ~x~0_In1521275523 |P2Thread1of1ForFork1_#t~ite32_Out1521275523|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In1521275523, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1521275523, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1521275523, ~x~0=~x~0_In1521275523} OutVars{P2Thread1of1ForFork1_#t~ite32=|P2Thread1of1ForFork1_#t~ite32_Out1521275523|, ~x$w_buff1~0=~x$w_buff1~0_In1521275523, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1521275523, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1521275523, ~x~0=~x~0_In1521275523} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32] because there is no mapped edge [2019-12-07 14:59:39,390 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [677] [677] L795-4-->L796: Formula: (= v_~x~0_21 |v_P2Thread1of1ForFork1_#t~ite32_8|) InVars {P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_8|} OutVars{P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_7|, P2Thread1of1ForFork1_#t~ite33=|v_P2Thread1of1ForFork1_#t~ite33_11|, ~x~0=v_~x~0_21} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32, P2Thread1of1ForFork1_#t~ite33, ~x~0] because there is no mapped edge [2019-12-07 14:59:39,390 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] L796-->L796-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In432764255 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In432764255 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork1_#t~ite34_Out432764255| 0) (not .cse1)) (and (or .cse1 .cse0) (= ~x$w_buff0_used~0_In432764255 |P2Thread1of1ForFork1_#t~ite34_Out432764255|)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In432764255, ~x$w_buff0_used~0=~x$w_buff0_used~0_In432764255} OutVars{P2Thread1of1ForFork1_#t~ite34=|P2Thread1of1ForFork1_#t~ite34_Out432764255|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In432764255, ~x$w_buff0_used~0=~x$w_buff0_used~0_In432764255} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-12-07 14:59:39,391 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [746] [746] L776-->L776-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In1380279285 256) 0)) (.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In1380279285 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork0_#t~ite28_Out1380279285|)) (and (or .cse1 .cse0) (= ~x$w_buff0_used~0_In1380279285 |P1Thread1of1ForFork0_#t~ite28_Out1380279285|)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1380279285, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1380279285} OutVars{~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1380279285, P1Thread1of1ForFork0_#t~ite28=|P1Thread1of1ForFork0_#t~ite28_Out1380279285|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1380279285} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite28] because there is no mapped edge [2019-12-07 14:59:39,391 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [738] [738] L777-->L777-2: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff1_thd2~0_In-1141778247 256))) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In-1141778247 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In-1141778247 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In-1141778247 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork0_#t~ite29_Out-1141778247| ~x$w_buff1_used~0_In-1141778247) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |P1Thread1of1ForFork0_#t~ite29_Out-1141778247| 0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1141778247, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1141778247, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1141778247, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1141778247} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-1141778247, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1141778247, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1141778247, P1Thread1of1ForFork0_#t~ite29=|P1Thread1of1ForFork0_#t~ite29_Out-1141778247|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1141778247} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 14:59:39,391 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L778-->L779: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-490519094 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-490519094 256))) (.cse2 (= ~x$r_buff0_thd2~0_Out-490519094 ~x$r_buff0_thd2~0_In-490519094))) (or (and (not .cse0) (not .cse1) (= ~x$r_buff0_thd2~0_Out-490519094 0)) (and .cse0 .cse2) (and .cse1 .cse2))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-490519094, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-490519094} OutVars{P1Thread1of1ForFork0_#t~ite30=|P1Thread1of1ForFork0_#t~ite30_Out-490519094|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-490519094, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-490519094} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite30, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 14:59:39,392 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] L779-->L779-2: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In-1841090625 256))) (.cse3 (= 0 (mod ~x$w_buff0_used~0_In-1841090625 256))) (.cse1 (= (mod ~x$w_buff1_used~0_In-1841090625 256) 0)) (.cse0 (= (mod ~x$r_buff1_thd2~0_In-1841090625 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork0_#t~ite31_Out-1841090625| 0)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= |P1Thread1of1ForFork0_#t~ite31_Out-1841090625| ~x$r_buff1_thd2~0_In-1841090625)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1841090625, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1841090625, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1841090625, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1841090625} OutVars{P1Thread1of1ForFork0_#t~ite31=|P1Thread1of1ForFork0_#t~ite31_Out-1841090625|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1841090625, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1841090625, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1841090625, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1841090625} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 14:59:39,392 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L779-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_52 1) v_~__unbuffered_cnt~0_51) (= v_~x$r_buff1_thd2~0_46 |v_P1Thread1of1ForFork0_#t~ite31_28|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|)) InVars {P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_52} OutVars{P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_27|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_46, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_51, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 14:59:39,392 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L740-->L740-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-419535407 256) 0))) (or (and (= |P0Thread1of1ForFork2_#t~ite8_In-419535407| |P0Thread1of1ForFork2_#t~ite8_Out-419535407|) (= ~x$w_buff0~0_In-419535407 |P0Thread1of1ForFork2_#t~ite9_Out-419535407|) (not .cse0)) (and (let ((.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In-419535407 256)))) (or (and (= 0 (mod ~x$r_buff1_thd1~0_In-419535407 256)) .cse1) (= (mod ~x$w_buff0_used~0_In-419535407 256) 0) (and .cse1 (= (mod ~x$w_buff1_used~0_In-419535407 256) 0)))) .cse0 (= |P0Thread1of1ForFork2_#t~ite9_Out-419535407| |P0Thread1of1ForFork2_#t~ite8_Out-419535407|) (= ~x$w_buff0~0_In-419535407 |P0Thread1of1ForFork2_#t~ite8_Out-419535407|)))) InVars {~x$w_buff0~0=~x$w_buff0~0_In-419535407, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-419535407, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_In-419535407|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-419535407, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-419535407, ~weak$$choice2~0=~weak$$choice2~0_In-419535407, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-419535407} OutVars{~x$w_buff0~0=~x$w_buff0~0_In-419535407, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-419535407, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_Out-419535407|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-419535407, P0Thread1of1ForFork2_#t~ite9=|P0Thread1of1ForFork2_#t~ite9_Out-419535407|, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-419535407, ~weak$$choice2~0=~weak$$choice2~0_In-419535407, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-419535407} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite8, P0Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 14:59:39,393 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L797-->L797-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd3~0_In262501188 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In262501188 256))) (.cse2 (= (mod ~x$w_buff0_used~0_In262501188 256) 0)) (.cse3 (= 0 (mod ~x$r_buff0_thd3~0_In262501188 256)))) (or (and (= ~x$w_buff1_used~0_In262501188 |P2Thread1of1ForFork1_#t~ite35_Out262501188|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork1_#t~ite35_Out262501188| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In262501188, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In262501188, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In262501188, ~x$w_buff0_used~0=~x$w_buff0_used~0_In262501188} OutVars{P2Thread1of1ForFork1_#t~ite35=|P2Thread1of1ForFork1_#t~ite35_Out262501188|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In262501188, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In262501188, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In262501188, ~x$w_buff0_used~0=~x$w_buff0_used~0_In262501188} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite35] because there is no mapped edge [2019-12-07 14:59:39,394 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [744] [744] L798-->L798-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd3~0_In-77900890 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-77900890 256)))) (or (and (or .cse0 .cse1) (= ~x$r_buff0_thd3~0_In-77900890 |P2Thread1of1ForFork1_#t~ite36_Out-77900890|)) (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork1_#t~ite36_Out-77900890|)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-77900890, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-77900890} OutVars{P2Thread1of1ForFork1_#t~ite36=|P2Thread1of1ForFork1_#t~ite36_Out-77900890|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-77900890, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-77900890} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-12-07 14:59:39,394 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [748] [748] L799-->L799-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In1931844491 256))) (.cse0 (= (mod ~x$r_buff0_thd3~0_In1931844491 256) 0)) (.cse3 (= 0 (mod ~x$r_buff1_thd3~0_In1931844491 256))) (.cse2 (= (mod ~x$w_buff1_used~0_In1931844491 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork1_#t~ite37_Out1931844491| 0)) (and (= |P2Thread1of1ForFork1_#t~ite37_Out1931844491| ~x$r_buff1_thd3~0_In1931844491) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1931844491, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1931844491, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1931844491, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1931844491} OutVars{P2Thread1of1ForFork1_#t~ite37=|P2Thread1of1ForFork1_#t~ite37_Out1931844491|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1931844491, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1931844491, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1931844491, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1931844491} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-12-07 14:59:39,394 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L799-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|) (= v_~x$r_buff1_thd3~0_48 |v_P2Thread1of1ForFork1_#t~ite37_28|) (= (+ v_~__unbuffered_cnt~0_64 1) v_~__unbuffered_cnt~0_63)) InVars {P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_64} OutVars{P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_27|, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_48, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37, P2Thread1of1ForFork1_#res.base, ~x$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 14:59:39,395 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L743-->L743-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-367902746 256) 0))) (or (and (not .cse0) (= ~x$w_buff1_used~0_In-367902746 |P0Thread1of1ForFork2_#t~ite18_Out-367902746|) (= |P0Thread1of1ForFork2_#t~ite17_In-367902746| |P0Thread1of1ForFork2_#t~ite17_Out-367902746|)) (and (= ~x$w_buff1_used~0_In-367902746 |P0Thread1of1ForFork2_#t~ite17_Out-367902746|) .cse0 (= |P0Thread1of1ForFork2_#t~ite17_Out-367902746| |P0Thread1of1ForFork2_#t~ite18_Out-367902746|) (let ((.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In-367902746 256)))) (or (= (mod ~x$w_buff0_used~0_In-367902746 256) 0) (and (= 0 (mod ~x$w_buff1_used~0_In-367902746 256)) .cse1) (and (= 0 (mod ~x$r_buff1_thd1~0_In-367902746 256)) .cse1)))))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-367902746, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_In-367902746|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-367902746, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-367902746, ~weak$$choice2~0=~weak$$choice2~0_In-367902746, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-367902746} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-367902746, P0Thread1of1ForFork2_#t~ite18=|P0Thread1of1ForFork2_#t~ite18_Out-367902746|, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_Out-367902746|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-367902746, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-367902746, ~weak$$choice2~0=~weak$$choice2~0_In-367902746, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-367902746} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite18, P0Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 14:59:39,395 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [730] [730] L744-->L745: Formula: (and (= v_~x$r_buff0_thd1~0_101 v_~x$r_buff0_thd1~0_100) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_101, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{P0Thread1of1ForFork2_#t~ite20=|v_P0Thread1of1ForFork2_#t~ite20_9|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_100, P0Thread1of1ForFork2_#t~ite19=|v_P0Thread1of1ForFork2_#t~ite19_6|, ~weak$$choice2~0=v_~weak$$choice2~0_39, P0Thread1of1ForFork2_#t~ite21=|v_P0Thread1of1ForFork2_#t~ite21_7|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite20, ~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite19, P0Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 14:59:39,395 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L745-->L745-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1049123528 256) 0))) (or (and (not .cse0) (= |P0Thread1of1ForFork2_#t~ite24_Out1049123528| ~x$r_buff1_thd1~0_In1049123528) (= |P0Thread1of1ForFork2_#t~ite23_In1049123528| |P0Thread1of1ForFork2_#t~ite23_Out1049123528|)) (and (= |P0Thread1of1ForFork2_#t~ite24_Out1049123528| |P0Thread1of1ForFork2_#t~ite23_Out1049123528|) (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In1049123528 256) 0))) (or (and (= (mod ~x$w_buff1_used~0_In1049123528 256) 0) .cse1) (= (mod ~x$w_buff0_used~0_In1049123528 256) 0) (and .cse1 (= (mod ~x$r_buff1_thd1~0_In1049123528 256) 0)))) (= ~x$r_buff1_thd1~0_In1049123528 |P0Thread1of1ForFork2_#t~ite23_Out1049123528|) .cse0))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1049123528, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1049123528, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1049123528, ~weak$$choice2~0=~weak$$choice2~0_In1049123528, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_In1049123528|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1049123528} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In1049123528, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1049123528, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In1049123528, P0Thread1of1ForFork2_#t~ite24=|P0Thread1of1ForFork2_#t~ite24_Out1049123528|, ~weak$$choice2~0=~weak$$choice2~0_In1049123528, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_Out1049123528|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1049123528} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite24, P0Thread1of1ForFork2_#t~ite23] because there is no mapped edge [2019-12-07 14:59:39,395 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [704] [704] L747-->L755: Formula: (and (= v_~x$flush_delayed~0_17 0) (not (= (mod v_~x$flush_delayed~0_18 256) 0)) (= v_~x~0_34 v_~x$mem_tmp~0_10) (= v_~__unbuffered_cnt~0_30 (+ v_~__unbuffered_cnt~0_31 1))) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_18, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_31, ~x$mem_tmp~0=v_~x$mem_tmp~0_10} OutVars{P0Thread1of1ForFork2_#t~ite25=|v_P0Thread1of1ForFork2_#t~ite25_13|, ~x$flush_delayed~0=v_~x$flush_delayed~0_17, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_30, ~x$mem_tmp~0=v_~x$mem_tmp~0_10, ~x~0=v_~x~0_34} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite25, ~x$flush_delayed~0, ~__unbuffered_cnt~0, ~x~0] because there is no mapped edge [2019-12-07 14:59:39,396 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [699] [699] L826-->L828-2: Formula: (and (or (= 0 (mod v_~x$w_buff0_used~0_158 256)) (= 0 (mod v_~x$r_buff0_thd0~0_26 256))) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_26, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_158} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_26, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_158} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 14:59:39,396 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L828-2-->L828-4: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In-1897769408 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In-1897769408 256)))) (or (and (not .cse0) (not .cse1) (= ~x$w_buff1~0_In-1897769408 |ULTIMATE.start_main_#t~ite41_Out-1897769408|)) (and (= ~x~0_In-1897769408 |ULTIMATE.start_main_#t~ite41_Out-1897769408|) (or .cse1 .cse0)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1897769408, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1897769408, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1897769408, ~x~0=~x~0_In-1897769408} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out-1897769408|, ~x$w_buff1~0=~x$w_buff1~0_In-1897769408, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1897769408, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1897769408, ~x~0=~x~0_In-1897769408} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41] because there is no mapped edge [2019-12-07 14:59:39,396 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L828-4-->L829: Formula: (= v_~x~0_24 |v_ULTIMATE.start_main_#t~ite41_11|) InVars {ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_11|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_10|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_6|, ~x~0=v_~x~0_24} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite42, ~x~0] because there is no mapped edge [2019-12-07 14:59:39,396 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [743] [743] L829-->L829-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1496839681 256))) (.cse0 (= (mod ~x$r_buff0_thd0~0_In-1496839681 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite43_Out-1496839681| 0)) (and (= ~x$w_buff0_used~0_In-1496839681 |ULTIMATE.start_main_#t~ite43_Out-1496839681|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1496839681, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1496839681} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1496839681, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out-1496839681|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1496839681} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-12-07 14:59:39,396 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [747] [747] L830-->L830-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff1_used~0_In642634852 256))) (.cse3 (= (mod ~x$r_buff1_thd0~0_In642634852 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In642634852 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In642634852 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite44_Out642634852|)) (and (= |ULTIMATE.start_main_#t~ite44_Out642634852| ~x$w_buff1_used~0_In642634852) (or .cse2 .cse3) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In642634852, ~x$w_buff1_used~0=~x$w_buff1_used~0_In642634852, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In642634852, ~x$w_buff0_used~0=~x$w_buff0_used~0_In642634852} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In642634852, ~x$w_buff1_used~0=~x$w_buff1_used~0_In642634852, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In642634852, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out642634852|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In642634852} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 14:59:39,397 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [750] [750] L831-->L831-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In1135533140 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In1135533140 256)))) (or (and (= |ULTIMATE.start_main_#t~ite45_Out1135533140| ~x$r_buff0_thd0~0_In1135533140) (or .cse0 .cse1)) (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite45_Out1135533140|) (not .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1135533140, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1135533140} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1135533140, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out1135533140|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1135533140} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 14:59:39,397 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L832-->L832-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1358875621 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In-1358875621 256))) (.cse3 (= (mod ~x$w_buff1_used~0_In-1358875621 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd0~0_In-1358875621 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite46_Out-1358875621| 0)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite46_Out-1358875621| ~x$r_buff1_thd0~0_In-1358875621) (or .cse3 .cse2)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1358875621, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1358875621, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1358875621, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1358875621} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1358875621, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out-1358875621|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1358875621, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1358875621, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1358875621} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 14:59:39,397 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L832-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_25 (ite (= (ite (not (and (= v_~z~0_60 2) (= 1 v_~__unbuffered_p2_EAX~0_35) (= 0 v_~__unbuffered_p0_EAX~0_54))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 0) (= v_~x$r_buff1_thd0~0_277 |v_ULTIMATE.start_main_#t~ite46_60|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15| (mod v_~main$tmp_guard1~0_25 256))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_54, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_60|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_35, ~z~0=v_~z~0_60} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_54, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_22, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_59|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_35, ~z~0=v_~z~0_60, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_277, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ~x$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 14:59:39,446 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_ea5d28c3-9a90-4f44-927f-6cfc9b0929b5/bin/uautomizer/witness.graphml [2019-12-07 14:59:39,447 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 14:59:39,448 INFO L168 Benchmark]: Toolchain (without parser) took 138807.52 ms. Allocated memory was 1.0 GB in the beginning and 8.6 GB in the end (delta: 7.6 GB). Free memory was 937.1 MB in the beginning and 4.0 GB in the end (delta: -3.1 GB). Peak memory consumption was 4.5 GB. Max. memory is 11.5 GB. [2019-12-07 14:59:39,448 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 14:59:39,448 INFO L168 Benchmark]: CACSL2BoogieTranslator took 396.71 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 103.3 MB). Free memory was 937.1 MB in the beginning and 1.1 GB in the end (delta: -133.9 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. [2019-12-07 14:59:39,448 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.58 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 14:59:39,449 INFO L168 Benchmark]: Boogie Preprocessor took 24.85 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 14:59:39,449 INFO L168 Benchmark]: RCFGBuilder took 383.08 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.3 MB). Peak memory consumption was 56.3 MB. Max. memory is 11.5 GB. [2019-12-07 14:59:39,449 INFO L168 Benchmark]: TraceAbstraction took 137901.04 ms. Allocated memory was 1.1 GB in the beginning and 8.6 GB in the end (delta: 7.5 GB). Free memory was 1.0 GB in the beginning and 4.0 GB in the end (delta: -3.0 GB). Peak memory consumption was 4.4 GB. Max. memory is 11.5 GB. [2019-12-07 14:59:39,449 INFO L168 Benchmark]: Witness Printer took 61.77 ms. Allocated memory is still 8.6 GB. Free memory was 4.0 GB in the beginning and 4.0 GB in the end (delta: 37.8 MB). Peak memory consumption was 37.8 MB. Max. memory is 11.5 GB. [2019-12-07 14:59:39,451 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 396.71 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 103.3 MB). Free memory was 937.1 MB in the beginning and 1.1 GB in the end (delta: -133.9 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.58 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 24.85 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 383.08 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.3 MB). Peak memory consumption was 56.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 137901.04 ms. Allocated memory was 1.1 GB in the beginning and 8.6 GB in the end (delta: 7.5 GB). Free memory was 1.0 GB in the beginning and 4.0 GB in the end (delta: -3.0 GB). Peak memory consumption was 4.4 GB. Max. memory is 11.5 GB. * Witness Printer took 61.77 ms. Allocated memory is still 8.6 GB. Free memory was 4.0 GB in the beginning and 4.0 GB in the end (delta: 37.8 MB). Peak memory consumption was 37.8 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.2s, 163 ProgramPointsBefore, 83 ProgramPointsAfterwards, 194 TransitionsBefore, 92 TransitionsAfterwards, 16696 CoEnabledTransitionPairs, 7 FixpointIterations, 32 TrivialSequentialCompositions, 45 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 35 ConcurrentYvCompositions, 26 ChoiceCompositions, 6709 VarBasedMoverChecksPositive, 292 VarBasedMoverChecksNegative, 116 SemBasedMoverChecksPositive, 259 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.9s, 0 MoverChecksTotal, 66094 CheckedPairsTotal, 112 TotalNumberOfCompositions - CounterExampleResult [Line: 5]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L818] FCALL, FORK 0 pthread_create(&t2073, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L820] FCALL, FORK 0 pthread_create(&t2074, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L765] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L766] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L767] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L768] 2 x$r_buff1_thd3 = x$r_buff0_thd3 [L769] 2 x$r_buff0_thd2 = (_Bool)1 [L772] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L775] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L822] FCALL, FORK 0 pthread_create(&t2075, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L789] 3 __unbuffered_p2_EAX = y [L792] 3 z = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L795] 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L775] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L730] 1 z = 2 [L735] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L736] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L737] 1 x$flush_delayed = weak$$choice2 [L738] 1 x$mem_tmp = x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L739] EXPR 1 !x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1) VAL [!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L776] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L777] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L739] 1 x = !x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1) [L740] 1 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff0)) [L741] EXPR 1 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1))=0, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L741] 1 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1)) [L796] 3 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used [L797] 3 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used [L798] 3 x$r_buff0_thd3 = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$r_buff0_thd3 [L742] EXPR 1 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used))=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L742] 1 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used)) [L743] 1 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L745] 1 x$r_buff1_thd1 = weak$$choice2 ? x$r_buff1_thd1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$r_buff1_thd1 : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L746] 1 __unbuffered_p0_EAX = x VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L824] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [\result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L829] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L830] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L831] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 154 locations, 2 error locations. Result: UNSAFE, OverallTime: 137.7s, OverallIterations: 26, TraceHistogramMax: 1, AutomataDifference: 28.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 4302 SDtfs, 4941 SDslu, 10077 SDs, 0 SdLazy, 5663 SolverSat, 205 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 3.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 202 GetRequests, 33 SyntacticMatches, 10 SemanticMatches, 159 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 586 ImplicationChecksByTransitivity, 0.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=291560occurred in iteration=9, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 94.5s AutomataMinimizationTime, 25 MinimizatonAttempts, 324895 StatesRemovedByMinimization, 22 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.6s SatisfiabilityAnalysisTime, 0.9s InterpolantComputationTime, 758 NumberOfCodeBlocks, 758 NumberOfCodeBlocksAsserted, 26 NumberOfCheckSat, 677 ConstructedInterpolants, 0 QuantifiedInterpolants, 75345 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 25 InterpolantComputations, 25 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...