./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe013_power.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_95986427-81d5-43f6-a7c9-7a82a57479b1/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_95986427-81d5-43f6-a7c9-7a82a57479b1/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_95986427-81d5-43f6-a7c9-7a82a57479b1/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_95986427-81d5-43f6-a7c9-7a82a57479b1/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe013_power.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_95986427-81d5-43f6-a7c9-7a82a57479b1/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_95986427-81d5-43f6-a7c9-7a82a57479b1/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 703baeb9da1d1d74a1e88b3837340f947c654ad0 ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 17:57:58,238 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 17:57:58,240 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 17:57:58,247 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 17:57:58,247 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 17:57:58,248 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 17:57:58,249 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 17:57:58,250 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 17:57:58,251 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 17:57:58,252 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 17:57:58,252 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 17:57:58,253 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 17:57:58,253 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 17:57:58,254 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 17:57:58,255 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 17:57:58,255 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 17:57:58,256 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 17:57:58,256 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 17:57:58,258 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 17:57:58,260 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 17:57:58,261 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 17:57:58,262 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 17:57:58,262 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 17:57:58,263 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 17:57:58,265 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 17:57:58,265 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 17:57:58,265 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 17:57:58,265 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 17:57:58,266 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 17:57:58,266 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 17:57:58,266 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 17:57:58,267 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 17:57:58,267 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 17:57:58,268 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 17:57:58,268 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 17:57:58,268 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 17:57:58,269 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 17:57:58,269 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 17:57:58,269 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 17:57:58,269 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 17:57:58,270 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 17:57:58,270 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_95986427-81d5-43f6-a7c9-7a82a57479b1/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 17:57:58,280 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 17:57:58,280 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 17:57:58,281 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 17:57:58,281 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 17:57:58,281 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 17:57:58,281 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 17:57:58,281 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 17:57:58,281 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 17:57:58,281 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 17:57:58,282 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 17:57:58,282 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 17:57:58,282 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 17:57:58,282 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 17:57:58,282 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 17:57:58,282 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 17:57:58,282 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 17:57:58,282 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 17:57:58,283 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 17:57:58,283 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 17:57:58,283 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 17:57:58,283 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 17:57:58,283 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:57:58,283 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 17:57:58,283 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 17:57:58,284 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 17:57:58,284 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 17:57:58,284 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 17:57:58,284 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 17:57:58,284 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 17:57:58,284 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_95986427-81d5-43f6-a7c9-7a82a57479b1/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 703baeb9da1d1d74a1e88b3837340f947c654ad0 [2019-12-07 17:57:58,383 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 17:57:58,394 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 17:57:58,397 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 17:57:58,398 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 17:57:58,398 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 17:57:58,399 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_95986427-81d5-43f6-a7c9-7a82a57479b1/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe013_power.opt.i [2019-12-07 17:57:58,441 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_95986427-81d5-43f6-a7c9-7a82a57479b1/bin/uautomizer/data/6133fb404/bc89ca379c9a412d892db4031ca13bc0/FLAGaec7b2dde [2019-12-07 17:57:58,803 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 17:57:58,804 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_95986427-81d5-43f6-a7c9-7a82a57479b1/sv-benchmarks/c/pthread-wmm/safe013_power.opt.i [2019-12-07 17:57:58,815 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_95986427-81d5-43f6-a7c9-7a82a57479b1/bin/uautomizer/data/6133fb404/bc89ca379c9a412d892db4031ca13bc0/FLAGaec7b2dde [2019-12-07 17:57:58,824 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_95986427-81d5-43f6-a7c9-7a82a57479b1/bin/uautomizer/data/6133fb404/bc89ca379c9a412d892db4031ca13bc0 [2019-12-07 17:57:58,826 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 17:57:58,826 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 17:57:58,827 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 17:57:58,827 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 17:57:58,830 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 17:57:58,830 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:57:58" (1/1) ... [2019-12-07 17:57:58,832 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@25138a46 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:57:58, skipping insertion in model container [2019-12-07 17:57:58,832 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:57:58" (1/1) ... [2019-12-07 17:57:58,837 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 17:57:58,865 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 17:57:59,127 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:57:59,135 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 17:57:59,175 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:57:59,220 INFO L208 MainTranslator]: Completed translation [2019-12-07 17:57:59,220 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:57:59 WrapperNode [2019-12-07 17:57:59,220 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 17:57:59,221 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 17:57:59,221 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 17:57:59,221 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 17:57:59,226 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:57:59" (1/1) ... [2019-12-07 17:57:59,239 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:57:59" (1/1) ... [2019-12-07 17:57:59,257 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 17:57:59,258 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 17:57:59,258 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 17:57:59,258 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 17:57:59,264 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:57:59" (1/1) ... [2019-12-07 17:57:59,264 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:57:59" (1/1) ... [2019-12-07 17:57:59,267 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:57:59" (1/1) ... [2019-12-07 17:57:59,268 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:57:59" (1/1) ... [2019-12-07 17:57:59,275 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:57:59" (1/1) ... [2019-12-07 17:57:59,278 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:57:59" (1/1) ... [2019-12-07 17:57:59,280 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:57:59" (1/1) ... [2019-12-07 17:57:59,283 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 17:57:59,283 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 17:57:59,283 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 17:57:59,283 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 17:57:59,284 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:57:59" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_95986427-81d5-43f6-a7c9-7a82a57479b1/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:57:59,323 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 17:57:59,323 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 17:57:59,323 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 17:57:59,324 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 17:57:59,324 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 17:57:59,324 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 17:57:59,324 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 17:57:59,324 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 17:57:59,324 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 17:57:59,324 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 17:57:59,324 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 17:57:59,324 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 17:57:59,324 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 17:57:59,325 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 17:57:59,675 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 17:57:59,675 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 17:57:59,676 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:57:59 BoogieIcfgContainer [2019-12-07 17:57:59,676 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 17:57:59,676 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 17:57:59,676 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 17:57:59,678 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 17:57:59,678 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 05:57:58" (1/3) ... [2019-12-07 17:57:59,679 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@29cc4f82 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:57:59, skipping insertion in model container [2019-12-07 17:57:59,679 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:57:59" (2/3) ... [2019-12-07 17:57:59,679 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@29cc4f82 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:57:59, skipping insertion in model container [2019-12-07 17:57:59,679 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:57:59" (3/3) ... [2019-12-07 17:57:59,680 INFO L109 eAbstractionObserver]: Analyzing ICFG safe013_power.opt.i [2019-12-07 17:57:59,687 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 17:57:59,687 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 17:57:59,692 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 17:57:59,692 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 17:57:59,716 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,716 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,716 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,716 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,716 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,717 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,717 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,717 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,717 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,717 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,717 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,717 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,718 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,718 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,718 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,718 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,718 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,718 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,718 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,718 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,718 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,719 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,719 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,719 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,719 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,719 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,719 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,719 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,719 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,720 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,720 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,720 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,720 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,720 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,720 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,720 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,720 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,721 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,721 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,721 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,721 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,721 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,721 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,721 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,721 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,721 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,724 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,724 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,724 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,724 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,724 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,724 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,724 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,724 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,724 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,725 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,725 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,725 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,725 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,725 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,725 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,725 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,725 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,725 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,725 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,726 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,726 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,726 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,726 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,726 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,726 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,726 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,726 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,726 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,727 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,727 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,727 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,727 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,727 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,727 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,728 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,728 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,728 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,728 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,728 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,728 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,728 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,728 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,729 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,729 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,729 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,729 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,729 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,729 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,729 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,729 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,729 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,729 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,730 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,730 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,730 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,730 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,730 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,730 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,730 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,730 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,730 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,731 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,731 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,731 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,731 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,731 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,731 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,731 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,731 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,732 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,732 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,732 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,732 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,732 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,732 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,732 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,732 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,732 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,732 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,733 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,733 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,733 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,733 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,733 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,733 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,733 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,733 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,733 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,733 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,734 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,734 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,734 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,734 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,734 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,734 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:57:59,745 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 17:57:59,757 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 17:57:59,758 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 17:57:59,758 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 17:57:59,758 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 17:57:59,758 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 17:57:59,758 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 17:57:59,758 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 17:57:59,758 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 17:57:59,769 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 163 places, 194 transitions [2019-12-07 17:57:59,770 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 163 places, 194 transitions [2019-12-07 17:57:59,822 INFO L134 PetriNetUnfolder]: 41/191 cut-off events. [2019-12-07 17:57:59,822 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:57:59,832 INFO L76 FinitePrefix]: Finished finitePrefix Result has 201 conditions, 191 events. 41/191 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 721 event pairs. 9/157 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 17:57:59,846 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 163 places, 194 transitions [2019-12-07 17:57:59,874 INFO L134 PetriNetUnfolder]: 41/191 cut-off events. [2019-12-07 17:57:59,875 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:57:59,880 INFO L76 FinitePrefix]: Finished finitePrefix Result has 201 conditions, 191 events. 41/191 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 721 event pairs. 9/157 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 17:57:59,895 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 16696 [2019-12-07 17:57:59,896 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 17:58:02,932 WARN L192 SmtUtils]: Spent 152.00 ms on a formula simplification. DAG size of input: 89 DAG size of output: 87 [2019-12-07 17:58:03,076 INFO L206 etLargeBlockEncoding]: Checked pairs total: 66094 [2019-12-07 17:58:03,076 INFO L214 etLargeBlockEncoding]: Total number of compositions: 112 [2019-12-07 17:58:03,078 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 83 places, 92 transitions [2019-12-07 17:58:12,741 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 86132 states. [2019-12-07 17:58:12,742 INFO L276 IsEmpty]: Start isEmpty. Operand 86132 states. [2019-12-07 17:58:12,746 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-07 17:58:12,746 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:58:12,747 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-07 17:58:12,747 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:58:12,750 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:58:12,751 INFO L82 PathProgramCache]: Analyzing trace with hash 794637732, now seen corresponding path program 1 times [2019-12-07 17:58:12,756 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:58:12,756 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1981557365] [2019-12-07 17:58:12,756 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:58:12,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:58:12,894 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:58:12,895 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1981557365] [2019-12-07 17:58:12,895 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:58:12,895 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:58:12,896 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [440360261] [2019-12-07 17:58:12,899 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:58:12,899 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:58:12,908 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:58:12,908 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:58:12,909 INFO L87 Difference]: Start difference. First operand 86132 states. Second operand 3 states. [2019-12-07 17:58:13,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:58:13,487 INFO L93 Difference]: Finished difference Result 85012 states and 367904 transitions. [2019-12-07 17:58:13,487 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:58:13,488 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-07 17:58:13,489 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:58:14,020 INFO L225 Difference]: With dead ends: 85012 [2019-12-07 17:58:14,020 INFO L226 Difference]: Without dead ends: 80140 [2019-12-07 17:58:14,021 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:58:16,934 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80140 states. [2019-12-07 17:58:18,020 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80140 to 80140. [2019-12-07 17:58:18,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80140 states. [2019-12-07 17:58:18,299 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80140 states to 80140 states and 346330 transitions. [2019-12-07 17:58:18,300 INFO L78 Accepts]: Start accepts. Automaton has 80140 states and 346330 transitions. Word has length 5 [2019-12-07 17:58:18,300 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:58:18,301 INFO L462 AbstractCegarLoop]: Abstraction has 80140 states and 346330 transitions. [2019-12-07 17:58:18,301 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:58:18,301 INFO L276 IsEmpty]: Start isEmpty. Operand 80140 states and 346330 transitions. [2019-12-07 17:58:18,308 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 17:58:18,308 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:58:18,308 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:58:18,308 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:58:18,308 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:58:18,308 INFO L82 PathProgramCache]: Analyzing trace with hash -1795694344, now seen corresponding path program 1 times [2019-12-07 17:58:18,309 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:58:18,309 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [501219311] [2019-12-07 17:58:18,309 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:58:18,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:58:18,379 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:58:18,379 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [501219311] [2019-12-07 17:58:18,380 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:58:18,380 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:58:18,380 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [851351775] [2019-12-07 17:58:18,381 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:58:18,381 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:58:18,381 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:58:18,381 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:58:18,381 INFO L87 Difference]: Start difference. First operand 80140 states and 346330 transitions. Second operand 4 states. [2019-12-07 17:58:20,424 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:58:20,425 INFO L93 Difference]: Finished difference Result 123388 states and 510822 transitions. [2019-12-07 17:58:20,425 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:58:20,425 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 17:58:20,425 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:58:20,772 INFO L225 Difference]: With dead ends: 123388 [2019-12-07 17:58:20,772 INFO L226 Difference]: Without dead ends: 123290 [2019-12-07 17:58:20,773 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:58:24,101 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123290 states. [2019-12-07 17:58:25,699 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123290 to 114218. [2019-12-07 17:58:25,700 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114218 states. [2019-12-07 17:58:26,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114218 states to 114218 states and 477794 transitions. [2019-12-07 17:58:26,011 INFO L78 Accepts]: Start accepts. Automaton has 114218 states and 477794 transitions. Word has length 13 [2019-12-07 17:58:26,012 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:58:26,012 INFO L462 AbstractCegarLoop]: Abstraction has 114218 states and 477794 transitions. [2019-12-07 17:58:26,012 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:58:26,012 INFO L276 IsEmpty]: Start isEmpty. Operand 114218 states and 477794 transitions. [2019-12-07 17:58:26,015 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 17:58:26,016 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:58:26,016 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:58:26,016 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:58:26,016 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:58:26,016 INFO L82 PathProgramCache]: Analyzing trace with hash -1307118492, now seen corresponding path program 1 times [2019-12-07 17:58:26,016 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:58:26,017 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1800040436] [2019-12-07 17:58:26,017 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:58:26,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:58:26,071 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:58:26,071 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1800040436] [2019-12-07 17:58:26,072 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:58:26,072 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:58:26,072 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [656376863] [2019-12-07 17:58:26,072 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:58:26,072 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:58:26,072 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:58:26,072 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:58:26,073 INFO L87 Difference]: Start difference. First operand 114218 states and 477794 transitions. Second operand 4 states. [2019-12-07 17:58:27,190 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:58:27,190 INFO L93 Difference]: Finished difference Result 159677 states and 652290 transitions. [2019-12-07 17:58:27,191 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:58:27,191 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 17:58:27,191 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:58:27,579 INFO L225 Difference]: With dead ends: 159677 [2019-12-07 17:58:27,579 INFO L226 Difference]: Without dead ends: 159565 [2019-12-07 17:58:27,580 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:58:33,077 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159565 states. [2019-12-07 17:58:34,931 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159565 to 136035. [2019-12-07 17:58:34,932 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136035 states. [2019-12-07 17:58:35,292 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136035 states to 136035 states and 564894 transitions. [2019-12-07 17:58:35,292 INFO L78 Accepts]: Start accepts. Automaton has 136035 states and 564894 transitions. Word has length 13 [2019-12-07 17:58:35,292 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:58:35,292 INFO L462 AbstractCegarLoop]: Abstraction has 136035 states and 564894 transitions. [2019-12-07 17:58:35,292 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:58:35,292 INFO L276 IsEmpty]: Start isEmpty. Operand 136035 states and 564894 transitions. [2019-12-07 17:58:35,295 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 17:58:35,295 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:58:35,295 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:58:35,295 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:58:35,295 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:58:35,295 INFO L82 PathProgramCache]: Analyzing trace with hash 2137171342, now seen corresponding path program 1 times [2019-12-07 17:58:35,295 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:58:35,296 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1115796636] [2019-12-07 17:58:35,296 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:58:35,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:58:35,319 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:58:35,319 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1115796636] [2019-12-07 17:58:35,320 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:58:35,320 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:58:35,320 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [528685778] [2019-12-07 17:58:35,320 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:58:35,320 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:58:35,320 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:58:35,320 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:58:35,320 INFO L87 Difference]: Start difference. First operand 136035 states and 564894 transitions. Second operand 3 states. [2019-12-07 17:58:36,056 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:58:36,056 INFO L93 Difference]: Finished difference Result 181618 states and 742473 transitions. [2019-12-07 17:58:36,057 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:58:36,057 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 14 [2019-12-07 17:58:36,057 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:58:36,516 INFO L225 Difference]: With dead ends: 181618 [2019-12-07 17:58:36,517 INFO L226 Difference]: Without dead ends: 181618 [2019-12-07 17:58:36,517 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:58:40,880 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181618 states. [2019-12-07 17:58:44,817 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181618 to 152081. [2019-12-07 17:58:44,818 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152081 states. [2019-12-07 17:58:45,248 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152081 states to 152081 states and 628919 transitions. [2019-12-07 17:58:45,248 INFO L78 Accepts]: Start accepts. Automaton has 152081 states and 628919 transitions. Word has length 14 [2019-12-07 17:58:45,248 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:58:45,249 INFO L462 AbstractCegarLoop]: Abstraction has 152081 states and 628919 transitions. [2019-12-07 17:58:45,249 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:58:45,249 INFO L276 IsEmpty]: Start isEmpty. Operand 152081 states and 628919 transitions. [2019-12-07 17:58:45,251 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 17:58:45,251 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:58:45,251 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:58:45,252 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:58:45,252 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:58:45,252 INFO L82 PathProgramCache]: Analyzing trace with hash 2137037670, now seen corresponding path program 1 times [2019-12-07 17:58:45,252 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:58:45,252 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1994948594] [2019-12-07 17:58:45,252 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:58:45,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:58:45,286 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:58:45,287 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1994948594] [2019-12-07 17:58:45,287 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:58:45,287 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:58:45,287 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1219003217] [2019-12-07 17:58:45,287 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:58:45,287 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:58:45,287 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:58:45,288 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:58:45,288 INFO L87 Difference]: Start difference. First operand 152081 states and 628919 transitions. Second operand 4 states. [2019-12-07 17:58:46,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:58:46,519 INFO L93 Difference]: Finished difference Result 179622 states and 732719 transitions. [2019-12-07 17:58:46,520 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:58:46,520 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-12-07 17:58:46,520 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:58:46,963 INFO L225 Difference]: With dead ends: 179622 [2019-12-07 17:58:46,963 INFO L226 Difference]: Without dead ends: 179542 [2019-12-07 17:58:46,963 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:58:50,989 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179542 states. [2019-12-07 17:58:53,441 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179542 to 157787. [2019-12-07 17:58:53,441 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157787 states. [2019-12-07 17:58:53,892 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157787 states to 157787 states and 651479 transitions. [2019-12-07 17:58:53,892 INFO L78 Accepts]: Start accepts. Automaton has 157787 states and 651479 transitions. Word has length 14 [2019-12-07 17:58:53,892 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:58:53,892 INFO L462 AbstractCegarLoop]: Abstraction has 157787 states and 651479 transitions. [2019-12-07 17:58:53,892 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:58:53,893 INFO L276 IsEmpty]: Start isEmpty. Operand 157787 states and 651479 transitions. [2019-12-07 17:58:53,896 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 17:58:53,897 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:58:53,897 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:58:53,897 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:58:53,897 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:58:53,897 INFO L82 PathProgramCache]: Analyzing trace with hash -1997758702, now seen corresponding path program 1 times [2019-12-07 17:58:53,897 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:58:53,898 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1515513626] [2019-12-07 17:58:53,898 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:58:53,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:58:53,937 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:58:53,937 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1515513626] [2019-12-07 17:58:53,937 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:58:53,938 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:58:53,938 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [17745420] [2019-12-07 17:58:53,938 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:58:53,938 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:58:53,938 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:58:53,939 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:58:53,939 INFO L87 Difference]: Start difference. First operand 157787 states and 651479 transitions. Second operand 4 states. [2019-12-07 17:58:54,846 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:58:54,846 INFO L93 Difference]: Finished difference Result 189091 states and 772001 transitions. [2019-12-07 17:58:54,847 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:58:54,847 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-12-07 17:58:54,848 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:58:55,768 INFO L225 Difference]: With dead ends: 189091 [2019-12-07 17:58:55,768 INFO L226 Difference]: Without dead ends: 188995 [2019-12-07 17:58:55,769 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:58:59,867 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188995 states. [2019-12-07 17:59:04,245 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188995 to 161868. [2019-12-07 17:59:04,246 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161868 states. [2019-12-07 17:59:04,704 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161868 states to 161868 states and 668265 transitions. [2019-12-07 17:59:04,704 INFO L78 Accepts]: Start accepts. Automaton has 161868 states and 668265 transitions. Word has length 14 [2019-12-07 17:59:04,705 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:59:04,705 INFO L462 AbstractCegarLoop]: Abstraction has 161868 states and 668265 transitions. [2019-12-07 17:59:04,705 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:59:04,705 INFO L276 IsEmpty]: Start isEmpty. Operand 161868 states and 668265 transitions. [2019-12-07 17:59:04,719 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 17:59:04,719 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:59:04,719 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:59:04,719 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:59:04,719 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:59:04,719 INFO L82 PathProgramCache]: Analyzing trace with hash -1754746770, now seen corresponding path program 1 times [2019-12-07 17:59:04,719 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:59:04,720 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [259382183] [2019-12-07 17:59:04,720 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:59:04,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:59:04,764 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:59:04,764 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [259382183] [2019-12-07 17:59:04,764 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:59:04,764 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:59:04,764 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [33971428] [2019-12-07 17:59:04,765 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:59:04,765 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:59:04,765 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:59:04,765 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:59:04,765 INFO L87 Difference]: Start difference. First operand 161868 states and 668265 transitions. Second operand 3 states. [2019-12-07 17:59:05,395 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:59:05,395 INFO L93 Difference]: Finished difference Result 152758 states and 623342 transitions. [2019-12-07 17:59:05,396 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:59:05,396 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 17:59:05,396 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:59:06,150 INFO L225 Difference]: With dead ends: 152758 [2019-12-07 17:59:06,150 INFO L226 Difference]: Without dead ends: 152758 [2019-12-07 17:59:06,151 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:59:09,589 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152758 states. [2019-12-07 17:59:11,728 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152758 to 148778. [2019-12-07 17:59:11,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148778 states. [2019-12-07 17:59:12,137 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148778 states to 148778 states and 608180 transitions. [2019-12-07 17:59:12,137 INFO L78 Accepts]: Start accepts. Automaton has 148778 states and 608180 transitions. Word has length 18 [2019-12-07 17:59:12,138 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:59:12,138 INFO L462 AbstractCegarLoop]: Abstraction has 148778 states and 608180 transitions. [2019-12-07 17:59:12,138 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:59:12,138 INFO L276 IsEmpty]: Start isEmpty. Operand 148778 states and 608180 transitions. [2019-12-07 17:59:12,147 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 17:59:12,147 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:59:12,147 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:59:12,147 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:59:12,148 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:59:12,148 INFO L82 PathProgramCache]: Analyzing trace with hash 250695921, now seen corresponding path program 1 times [2019-12-07 17:59:12,148 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:59:12,148 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2110478436] [2019-12-07 17:59:12,148 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:59:12,161 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:59:12,195 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:59:12,196 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2110478436] [2019-12-07 17:59:12,196 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:59:12,196 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:59:12,196 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [546075656] [2019-12-07 17:59:12,196 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:59:12,197 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:59:12,197 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:59:12,197 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:59:12,197 INFO L87 Difference]: Start difference. First operand 148778 states and 608180 transitions. Second operand 3 states. [2019-12-07 17:59:13,650 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:59:13,650 INFO L93 Difference]: Finished difference Result 277378 states and 1128575 transitions. [2019-12-07 17:59:13,651 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:59:13,651 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 17:59:13,651 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:59:14,341 INFO L225 Difference]: With dead ends: 277378 [2019-12-07 17:59:14,341 INFO L226 Difference]: Without dead ends: 268154 [2019-12-07 17:59:14,341 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:59:21,346 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 268154 states. [2019-12-07 17:59:25,249 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 268154 to 258617. [2019-12-07 17:59:25,249 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 258617 states. [2019-12-07 17:59:25,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 258617 states to 258617 states and 1060508 transitions. [2019-12-07 17:59:25,988 INFO L78 Accepts]: Start accepts. Automaton has 258617 states and 1060508 transitions. Word has length 18 [2019-12-07 17:59:25,988 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:59:25,988 INFO L462 AbstractCegarLoop]: Abstraction has 258617 states and 1060508 transitions. [2019-12-07 17:59:25,988 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:59:25,988 INFO L276 IsEmpty]: Start isEmpty. Operand 258617 states and 1060508 transitions. [2019-12-07 17:59:26,005 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 17:59:26,005 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:59:26,005 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:59:26,006 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:59:26,006 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:59:26,006 INFO L82 PathProgramCache]: Analyzing trace with hash 1369748393, now seen corresponding path program 1 times [2019-12-07 17:59:26,006 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:59:26,006 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [365508226] [2019-12-07 17:59:26,006 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:59:26,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:59:26,052 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:59:26,053 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [365508226] [2019-12-07 17:59:26,053 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:59:26,053 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:59:26,053 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [455303122] [2019-12-07 17:59:26,053 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:59:26,054 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:59:26,054 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:59:26,054 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:59:26,054 INFO L87 Difference]: Start difference. First operand 258617 states and 1060508 transitions. Second operand 4 states. [2019-12-07 17:59:27,552 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:59:27,552 INFO L93 Difference]: Finished difference Result 258630 states and 1059116 transitions. [2019-12-07 17:59:27,553 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:59:27,553 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2019-12-07 17:59:27,553 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:59:28,208 INFO L225 Difference]: With dead ends: 258630 [2019-12-07 17:59:28,209 INFO L226 Difference]: Without dead ends: 257550 [2019-12-07 17:59:28,209 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:59:33,306 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 257550 states. [2019-12-07 17:59:37,058 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 257550 to 256634. [2019-12-07 17:59:37,058 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 256634 states. [2019-12-07 17:59:37,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 256634 states to 256634 states and 1052948 transitions. [2019-12-07 17:59:37,758 INFO L78 Accepts]: Start accepts. Automaton has 256634 states and 1052948 transitions. Word has length 19 [2019-12-07 17:59:37,758 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:59:37,758 INFO L462 AbstractCegarLoop]: Abstraction has 256634 states and 1052948 transitions. [2019-12-07 17:59:37,758 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:59:37,758 INFO L276 IsEmpty]: Start isEmpty. Operand 256634 states and 1052948 transitions. [2019-12-07 17:59:37,777 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 17:59:37,777 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:59:37,778 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:59:37,778 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:59:37,778 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:59:37,778 INFO L82 PathProgramCache]: Analyzing trace with hash -2069277611, now seen corresponding path program 1 times [2019-12-07 17:59:37,778 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:59:37,778 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1828852392] [2019-12-07 17:59:37,778 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:59:37,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:59:37,824 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:59:37,825 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1828852392] [2019-12-07 17:59:37,825 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:59:37,825 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:59:37,825 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1404875618] [2019-12-07 17:59:37,825 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:59:37,826 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:59:37,826 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:59:37,826 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:59:37,826 INFO L87 Difference]: Start difference. First operand 256634 states and 1052948 transitions. Second operand 5 states. [2019-12-07 17:59:41,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:59:41,901 INFO L93 Difference]: Finished difference Result 368439 states and 1478344 transitions. [2019-12-07 17:59:41,901 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:59:41,901 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 17:59:41,901 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:59:42,812 INFO L225 Difference]: With dead ends: 368439 [2019-12-07 17:59:42,812 INFO L226 Difference]: Without dead ends: 367887 [2019-12-07 17:59:42,812 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:59:49,154 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 367887 states. [2019-12-07 17:59:53,472 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 367887 to 267700. [2019-12-07 17:59:53,472 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 267700 states. [2019-12-07 17:59:54,198 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 267700 states to 267700 states and 1095458 transitions. [2019-12-07 17:59:54,198 INFO L78 Accepts]: Start accepts. Automaton has 267700 states and 1095458 transitions. Word has length 19 [2019-12-07 17:59:54,199 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:59:54,199 INFO L462 AbstractCegarLoop]: Abstraction has 267700 states and 1095458 transitions. [2019-12-07 17:59:54,199 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:59:54,199 INFO L276 IsEmpty]: Start isEmpty. Operand 267700 states and 1095458 transitions. [2019-12-07 17:59:54,226 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 17:59:54,226 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:59:54,226 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:59:54,226 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:59:54,226 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:59:54,226 INFO L82 PathProgramCache]: Analyzing trace with hash -582230699, now seen corresponding path program 1 times [2019-12-07 17:59:54,227 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:59:54,227 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [292183870] [2019-12-07 17:59:54,227 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:59:54,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:59:54,272 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:59:54,273 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [292183870] [2019-12-07 17:59:54,273 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:59:54,273 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:59:54,273 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [175917041] [2019-12-07 17:59:54,273 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:59:54,274 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:59:54,274 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:59:54,274 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:59:54,274 INFO L87 Difference]: Start difference. First operand 267700 states and 1095458 transitions. Second operand 5 states. [2019-12-07 17:59:56,961 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:59:56,961 INFO L93 Difference]: Finished difference Result 430723 states and 1769792 transitions. [2019-12-07 17:59:56,962 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:59:56,962 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 20 [2019-12-07 17:59:56,962 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:59:57,473 INFO L225 Difference]: With dead ends: 430723 [2019-12-07 17:59:57,473 INFO L226 Difference]: Without dead ends: 201183 [2019-12-07 17:59:57,474 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:00:05,087 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 201183 states. [2019-12-07 18:00:07,449 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 201183 to 193165. [2019-12-07 18:00:07,449 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 193165 states. [2019-12-07 18:00:07,971 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193165 states to 193165 states and 788533 transitions. [2019-12-07 18:00:07,971 INFO L78 Accepts]: Start accepts. Automaton has 193165 states and 788533 transitions. Word has length 20 [2019-12-07 18:00:07,971 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:00:07,971 INFO L462 AbstractCegarLoop]: Abstraction has 193165 states and 788533 transitions. [2019-12-07 18:00:07,971 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:00:07,971 INFO L276 IsEmpty]: Start isEmpty. Operand 193165 states and 788533 transitions. [2019-12-07 18:00:07,999 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 18:00:07,999 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:00:07,999 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:00:07,999 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:00:08,000 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:00:08,000 INFO L82 PathProgramCache]: Analyzing trace with hash -1918737222, now seen corresponding path program 1 times [2019-12-07 18:00:08,000 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:00:08,000 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1694674853] [2019-12-07 18:00:08,000 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:00:08,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:00:08,029 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:00:08,030 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1694674853] [2019-12-07 18:00:08,030 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:00:08,030 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:00:08,030 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1110232630] [2019-12-07 18:00:08,030 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:00:08,030 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:00:08,030 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:00:08,030 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:00:08,030 INFO L87 Difference]: Start difference. First operand 193165 states and 788533 transitions. Second operand 5 states. [2019-12-07 18:00:09,407 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:00:09,407 INFO L93 Difference]: Finished difference Result 217402 states and 876117 transitions. [2019-12-07 18:00:09,408 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 18:00:09,408 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 18:00:09,408 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:00:09,949 INFO L225 Difference]: With dead ends: 217402 [2019-12-07 18:00:09,949 INFO L226 Difference]: Without dead ends: 216202 [2019-12-07 18:00:09,949 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:00:14,481 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216202 states. [2019-12-07 18:00:17,052 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216202 to 193554. [2019-12-07 18:00:17,052 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 193554 states. [2019-12-07 18:00:17,837 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193554 states to 193554 states and 789658 transitions. [2019-12-07 18:00:17,838 INFO L78 Accepts]: Start accepts. Automaton has 193554 states and 789658 transitions. Word has length 22 [2019-12-07 18:00:17,838 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:00:17,838 INFO L462 AbstractCegarLoop]: Abstraction has 193554 states and 789658 transitions. [2019-12-07 18:00:17,838 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:00:17,838 INFO L276 IsEmpty]: Start isEmpty. Operand 193554 states and 789658 transitions. [2019-12-07 18:00:17,860 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 18:00:17,860 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:00:17,860 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:00:17,860 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:00:17,860 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:00:17,860 INFO L82 PathProgramCache]: Analyzing trace with hash -1430161370, now seen corresponding path program 1 times [2019-12-07 18:00:17,860 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:00:17,861 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1634958912] [2019-12-07 18:00:17,861 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:00:17,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:00:17,897 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:00:17,897 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1634958912] [2019-12-07 18:00:17,897 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:00:17,897 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:00:17,897 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1919949075] [2019-12-07 18:00:17,898 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:00:17,898 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:00:17,898 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:00:17,898 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:00:17,898 INFO L87 Difference]: Start difference. First operand 193554 states and 789658 transitions. Second operand 5 states. [2019-12-07 18:00:19,090 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:00:19,091 INFO L93 Difference]: Finished difference Result 255988 states and 1020668 transitions. [2019-12-07 18:00:19,091 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:00:19,091 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 18:00:19,092 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:00:20,191 INFO L225 Difference]: With dead ends: 255988 [2019-12-07 18:00:20,191 INFO L226 Difference]: Without dead ends: 254716 [2019-12-07 18:00:20,192 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:00:24,981 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 254716 states. [2019-12-07 18:00:30,272 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 254716 to 196048. [2019-12-07 18:00:30,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 196048 states. [2019-12-07 18:00:30,810 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196048 states to 196048 states and 799273 transitions. [2019-12-07 18:00:30,810 INFO L78 Accepts]: Start accepts. Automaton has 196048 states and 799273 transitions. Word has length 22 [2019-12-07 18:00:30,810 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:00:30,810 INFO L462 AbstractCegarLoop]: Abstraction has 196048 states and 799273 transitions. [2019-12-07 18:00:30,810 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:00:30,810 INFO L276 IsEmpty]: Start isEmpty. Operand 196048 states and 799273 transitions. [2019-12-07 18:00:30,833 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 18:00:30,833 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:00:30,833 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:00:30,833 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:00:30,834 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:00:30,834 INFO L82 PathProgramCache]: Analyzing trace with hash -1233781658, now seen corresponding path program 1 times [2019-12-07 18:00:30,834 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:00:30,834 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1392293919] [2019-12-07 18:00:30,834 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:00:30,841 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:00:30,867 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:00:30,867 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1392293919] [2019-12-07 18:00:30,867 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:00:30,867 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:00:30,867 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [41839902] [2019-12-07 18:00:30,867 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:00:30,867 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:00:30,868 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:00:30,868 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:00:30,868 INFO L87 Difference]: Start difference. First operand 196048 states and 799273 transitions. Second operand 5 states. [2019-12-07 18:00:32,255 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:00:32,255 INFO L93 Difference]: Finished difference Result 224067 states and 902607 transitions. [2019-12-07 18:00:32,256 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 18:00:32,256 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 18:00:32,256 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:00:32,834 INFO L225 Difference]: With dead ends: 224067 [2019-12-07 18:00:32,834 INFO L226 Difference]: Without dead ends: 222169 [2019-12-07 18:00:32,834 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:00:37,498 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 222169 states. [2019-12-07 18:00:40,150 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 222169 to 193783. [2019-12-07 18:00:40,150 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 193783 states. [2019-12-07 18:00:40,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193783 states to 193783 states and 791137 transitions. [2019-12-07 18:00:40,930 INFO L78 Accepts]: Start accepts. Automaton has 193783 states and 791137 transitions. Word has length 22 [2019-12-07 18:00:40,930 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:00:40,930 INFO L462 AbstractCegarLoop]: Abstraction has 193783 states and 791137 transitions. [2019-12-07 18:00:40,930 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:00:40,930 INFO L276 IsEmpty]: Start isEmpty. Operand 193783 states and 791137 transitions. [2019-12-07 18:00:40,953 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 18:00:40,953 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:00:40,953 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:00:40,953 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:00:40,953 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:00:40,953 INFO L82 PathProgramCache]: Analyzing trace with hash -745205806, now seen corresponding path program 1 times [2019-12-07 18:00:40,953 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:00:40,954 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [138313575] [2019-12-07 18:00:40,954 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:00:40,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:00:40,986 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:00:40,986 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [138313575] [2019-12-07 18:00:40,986 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:00:40,986 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:00:40,987 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [828543565] [2019-12-07 18:00:40,987 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:00:40,987 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:00:40,987 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:00:40,987 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:00:40,987 INFO L87 Difference]: Start difference. First operand 193783 states and 791137 transitions. Second operand 5 states. [2019-12-07 18:00:42,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:00:42,244 INFO L93 Difference]: Finished difference Result 266869 states and 1066164 transitions. [2019-12-07 18:00:42,244 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:00:42,244 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 18:00:42,244 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:00:42,906 INFO L225 Difference]: With dead ends: 266869 [2019-12-07 18:00:42,906 INFO L226 Difference]: Without dead ends: 264991 [2019-12-07 18:00:42,907 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:00:48,180 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 264991 states. [2019-12-07 18:00:51,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 264991 to 211163. [2019-12-07 18:00:51,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 211163 states. [2019-12-07 18:00:52,052 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211163 states to 211163 states and 859480 transitions. [2019-12-07 18:00:52,052 INFO L78 Accepts]: Start accepts. Automaton has 211163 states and 859480 transitions. Word has length 22 [2019-12-07 18:00:52,052 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:00:52,052 INFO L462 AbstractCegarLoop]: Abstraction has 211163 states and 859480 transitions. [2019-12-07 18:00:52,052 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:00:52,052 INFO L276 IsEmpty]: Start isEmpty. Operand 211163 states and 859480 transitions. [2019-12-07 18:00:52,079 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 18:00:52,079 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:00:52,079 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:00:52,079 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:00:52,079 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:00:52,080 INFO L82 PathProgramCache]: Analyzing trace with hash -982690047, now seen corresponding path program 1 times [2019-12-07 18:00:52,080 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:00:52,080 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [498049831] [2019-12-07 18:00:52,080 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:00:52,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:00:52,113 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:00:52,113 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [498049831] [2019-12-07 18:00:52,113 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:00:52,113 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:00:52,113 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [773285546] [2019-12-07 18:00:52,113 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:00:52,114 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:00:52,114 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:00:52,114 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:00:52,114 INFO L87 Difference]: Start difference. First operand 211163 states and 859480 transitions. Second operand 4 states. [2019-12-07 18:00:52,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:00:52,261 INFO L93 Difference]: Finished difference Result 48674 states and 169289 transitions. [2019-12-07 18:00:52,261 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:00:52,261 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 22 [2019-12-07 18:00:52,262 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:00:52,320 INFO L225 Difference]: With dead ends: 48674 [2019-12-07 18:00:52,320 INFO L226 Difference]: Without dead ends: 37093 [2019-12-07 18:00:52,320 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:00:52,492 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37093 states. [2019-12-07 18:00:53,173 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37093 to 37093. [2019-12-07 18:00:53,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37093 states. [2019-12-07 18:00:53,230 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37093 states to 37093 states and 122492 transitions. [2019-12-07 18:00:53,230 INFO L78 Accepts]: Start accepts. Automaton has 37093 states and 122492 transitions. Word has length 22 [2019-12-07 18:00:53,231 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:00:53,231 INFO L462 AbstractCegarLoop]: Abstraction has 37093 states and 122492 transitions. [2019-12-07 18:00:53,231 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:00:53,231 INFO L276 IsEmpty]: Start isEmpty. Operand 37093 states and 122492 transitions. [2019-12-07 18:00:53,244 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 18:00:53,245 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:00:53,245 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:00:53,245 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:00:53,245 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:00:53,245 INFO L82 PathProgramCache]: Analyzing trace with hash -1413309470, now seen corresponding path program 1 times [2019-12-07 18:00:53,245 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:00:53,245 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1868876658] [2019-12-07 18:00:53,245 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:00:53,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:00:53,294 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:00:53,294 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1868876658] [2019-12-07 18:00:53,294 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:00:53,294 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:00:53,294 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [61837757] [2019-12-07 18:00:53,294 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:00:53,294 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:00:53,295 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:00:53,295 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:00:53,295 INFO L87 Difference]: Start difference. First operand 37093 states and 122492 transitions. Second operand 5 states. [2019-12-07 18:00:53,369 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:00:53,369 INFO L93 Difference]: Finished difference Result 16266 states and 51258 transitions. [2019-12-07 18:00:53,369 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:00:53,370 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 31 [2019-12-07 18:00:53,370 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:00:53,390 INFO L225 Difference]: With dead ends: 16266 [2019-12-07 18:00:53,390 INFO L226 Difference]: Without dead ends: 14140 [2019-12-07 18:00:53,390 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:00:53,440 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14140 states. [2019-12-07 18:00:53,557 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14140 to 13988. [2019-12-07 18:00:53,557 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13988 states. [2019-12-07 18:00:53,579 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13988 states to 13988 states and 43833 transitions. [2019-12-07 18:00:53,579 INFO L78 Accepts]: Start accepts. Automaton has 13988 states and 43833 transitions. Word has length 31 [2019-12-07 18:00:53,579 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:00:53,579 INFO L462 AbstractCegarLoop]: Abstraction has 13988 states and 43833 transitions. [2019-12-07 18:00:53,579 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:00:53,579 INFO L276 IsEmpty]: Start isEmpty. Operand 13988 states and 43833 transitions. [2019-12-07 18:00:53,591 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 18:00:53,591 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:00:53,591 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:00:53,591 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:00:53,591 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:00:53,591 INFO L82 PathProgramCache]: Analyzing trace with hash 483024013, now seen corresponding path program 1 times [2019-12-07 18:00:53,591 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:00:53,591 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1962204215] [2019-12-07 18:00:53,591 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:00:53,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:00:53,645 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:00:53,646 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1962204215] [2019-12-07 18:00:53,646 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:00:53,646 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:00:53,646 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [703594627] [2019-12-07 18:00:53,647 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:00:53,647 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:00:53,647 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:00:53,647 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:00:53,647 INFO L87 Difference]: Start difference. First operand 13988 states and 43833 transitions. Second operand 6 states. [2019-12-07 18:00:53,728 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:00:53,728 INFO L93 Difference]: Finished difference Result 12695 states and 40693 transitions. [2019-12-07 18:00:53,729 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:00:53,729 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 40 [2019-12-07 18:00:53,729 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:00:53,742 INFO L225 Difference]: With dead ends: 12695 [2019-12-07 18:00:53,743 INFO L226 Difference]: Without dead ends: 12249 [2019-12-07 18:00:53,743 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:00:53,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12249 states. [2019-12-07 18:00:53,870 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12249 to 7740. [2019-12-07 18:00:53,871 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7740 states. [2019-12-07 18:00:53,881 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7740 states to 7740 states and 24802 transitions. [2019-12-07 18:00:53,881 INFO L78 Accepts]: Start accepts. Automaton has 7740 states and 24802 transitions. Word has length 40 [2019-12-07 18:00:53,881 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:00:53,881 INFO L462 AbstractCegarLoop]: Abstraction has 7740 states and 24802 transitions. [2019-12-07 18:00:53,882 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:00:53,882 INFO L276 IsEmpty]: Start isEmpty. Operand 7740 states and 24802 transitions. [2019-12-07 18:00:53,887 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 18:00:53,888 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:00:53,888 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:00:53,888 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:00:53,888 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:00:53,888 INFO L82 PathProgramCache]: Analyzing trace with hash 2087853405, now seen corresponding path program 1 times [2019-12-07 18:00:53,888 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:00:53,888 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1713803640] [2019-12-07 18:00:53,888 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:00:53,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:00:53,935 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:00:53,935 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1713803640] [2019-12-07 18:00:53,936 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:00:53,936 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:00:53,936 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1035956395] [2019-12-07 18:00:53,936 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:00:53,936 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:00:53,936 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:00:53,937 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:00:53,937 INFO L87 Difference]: Start difference. First operand 7740 states and 24802 transitions. Second operand 5 states. [2019-12-07 18:00:54,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:00:54,206 INFO L93 Difference]: Finished difference Result 13252 states and 41373 transitions. [2019-12-07 18:00:54,206 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:00:54,207 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 55 [2019-12-07 18:00:54,207 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:00:54,221 INFO L225 Difference]: With dead ends: 13252 [2019-12-07 18:00:54,221 INFO L226 Difference]: Without dead ends: 13252 [2019-12-07 18:00:54,221 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:00:54,268 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13252 states. [2019-12-07 18:00:54,367 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13252 to 10679. [2019-12-07 18:00:54,367 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10679 states. [2019-12-07 18:00:54,383 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10679 states to 10679 states and 34014 transitions. [2019-12-07 18:00:54,383 INFO L78 Accepts]: Start accepts. Automaton has 10679 states and 34014 transitions. Word has length 55 [2019-12-07 18:00:54,383 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:00:54,383 INFO L462 AbstractCegarLoop]: Abstraction has 10679 states and 34014 transitions. [2019-12-07 18:00:54,383 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:00:54,383 INFO L276 IsEmpty]: Start isEmpty. Operand 10679 states and 34014 transitions. [2019-12-07 18:00:54,392 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 18:00:54,392 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:00:54,392 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:00:54,392 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:00:54,392 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:00:54,392 INFO L82 PathProgramCache]: Analyzing trace with hash 1066766813, now seen corresponding path program 2 times [2019-12-07 18:00:54,392 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:00:54,392 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [588132808] [2019-12-07 18:00:54,393 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:00:54,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:00:54,453 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:00:54,453 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [588132808] [2019-12-07 18:00:54,453 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:00:54,453 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 18:00:54,453 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1990510968] [2019-12-07 18:00:54,454 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 18:00:54,454 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:00:54,454 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 18:00:54,454 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:00:54,454 INFO L87 Difference]: Start difference. First operand 10679 states and 34014 transitions. Second operand 8 states. [2019-12-07 18:00:55,040 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:00:55,040 INFO L93 Difference]: Finished difference Result 35424 states and 111496 transitions. [2019-12-07 18:00:55,040 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 18:00:55,040 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 55 [2019-12-07 18:00:55,040 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:00:55,074 INFO L225 Difference]: With dead ends: 35424 [2019-12-07 18:00:55,074 INFO L226 Difference]: Without dead ends: 26712 [2019-12-07 18:00:55,074 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 6 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 119 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=145, Invalid=455, Unknown=0, NotChecked=0, Total=600 [2019-12-07 18:00:55,148 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26712 states. [2019-12-07 18:00:55,343 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26712 to 13854. [2019-12-07 18:00:55,344 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13854 states. [2019-12-07 18:00:55,367 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13854 states to 13854 states and 44581 transitions. [2019-12-07 18:00:55,367 INFO L78 Accepts]: Start accepts. Automaton has 13854 states and 44581 transitions. Word has length 55 [2019-12-07 18:00:55,367 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:00:55,367 INFO L462 AbstractCegarLoop]: Abstraction has 13854 states and 44581 transitions. [2019-12-07 18:00:55,367 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 18:00:55,367 INFO L276 IsEmpty]: Start isEmpty. Operand 13854 states and 44581 transitions. [2019-12-07 18:00:55,381 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 18:00:55,381 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:00:55,381 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:00:55,381 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:00:55,381 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:00:55,382 INFO L82 PathProgramCache]: Analyzing trace with hash 1783793399, now seen corresponding path program 3 times [2019-12-07 18:00:55,382 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:00:55,382 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1021835526] [2019-12-07 18:00:55,382 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:00:55,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:00:55,439 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:00:55,439 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1021835526] [2019-12-07 18:00:55,439 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:00:55,439 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:00:55,439 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [663278888] [2019-12-07 18:00:55,440 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:00:55,440 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:00:55,440 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:00:55,440 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:00:55,440 INFO L87 Difference]: Start difference. First operand 13854 states and 44581 transitions. Second operand 4 states. [2019-12-07 18:00:55,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:00:55,511 INFO L93 Difference]: Finished difference Result 22096 states and 71239 transitions. [2019-12-07 18:00:55,512 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:00:55,512 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 55 [2019-12-07 18:00:55,512 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:00:55,522 INFO L225 Difference]: With dead ends: 22096 [2019-12-07 18:00:55,522 INFO L226 Difference]: Without dead ends: 8574 [2019-12-07 18:00:55,523 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:00:55,562 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8574 states. [2019-12-07 18:00:56,291 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8574 to 8574. [2019-12-07 18:00:56,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8574 states. [2019-12-07 18:00:56,308 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8574 states to 8574 states and 27553 transitions. [2019-12-07 18:00:56,308 INFO L78 Accepts]: Start accepts. Automaton has 8574 states and 27553 transitions. Word has length 55 [2019-12-07 18:00:56,308 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:00:56,308 INFO L462 AbstractCegarLoop]: Abstraction has 8574 states and 27553 transitions. [2019-12-07 18:00:56,308 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:00:56,309 INFO L276 IsEmpty]: Start isEmpty. Operand 8574 states and 27553 transitions. [2019-12-07 18:00:56,316 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 18:00:56,316 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:00:56,316 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:00:56,316 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:00:56,316 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:00:56,316 INFO L82 PathProgramCache]: Analyzing trace with hash 62198309, now seen corresponding path program 4 times [2019-12-07 18:00:56,317 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:00:56,317 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [729717217] [2019-12-07 18:00:56,317 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:00:56,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:00:56,362 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:00:56,362 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [729717217] [2019-12-07 18:00:56,362 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:00:56,362 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:00:56,363 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [438313517] [2019-12-07 18:00:56,363 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:00:56,363 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:00:56,363 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:00:56,363 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:00:56,363 INFO L87 Difference]: Start difference. First operand 8574 states and 27553 transitions. Second operand 6 states. [2019-12-07 18:00:56,705 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:00:56,705 INFO L93 Difference]: Finished difference Result 10847 states and 33949 transitions. [2019-12-07 18:00:56,706 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 18:00:56,706 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 55 [2019-12-07 18:00:56,706 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:00:56,717 INFO L225 Difference]: With dead ends: 10847 [2019-12-07 18:00:56,717 INFO L226 Difference]: Without dead ends: 10847 [2019-12-07 18:00:56,718 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:00:56,759 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10847 states. [2019-12-07 18:00:56,840 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10847 to 8580. [2019-12-07 18:00:56,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8580 states. [2019-12-07 18:00:56,853 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8580 states to 8580 states and 27570 transitions. [2019-12-07 18:00:56,853 INFO L78 Accepts]: Start accepts. Automaton has 8580 states and 27570 transitions. Word has length 55 [2019-12-07 18:00:56,853 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:00:56,853 INFO L462 AbstractCegarLoop]: Abstraction has 8580 states and 27570 transitions. [2019-12-07 18:00:56,853 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:00:56,853 INFO L276 IsEmpty]: Start isEmpty. Operand 8580 states and 27570 transitions. [2019-12-07 18:00:56,860 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 18:00:56,860 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:00:56,860 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:00:56,861 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:00:56,861 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:00:56,861 INFO L82 PathProgramCache]: Analyzing trace with hash 1345212454, now seen corresponding path program 1 times [2019-12-07 18:00:56,861 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:00:56,861 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1071082522] [2019-12-07 18:00:56,861 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:00:56,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:00:56,884 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:00:56,884 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1071082522] [2019-12-07 18:00:56,885 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:00:56,885 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:00:56,885 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1331064332] [2019-12-07 18:00:56,885 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:00:56,885 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:00:56,885 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:00:56,885 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:00:56,885 INFO L87 Difference]: Start difference. First operand 8580 states and 27570 transitions. Second operand 3 states. [2019-12-07 18:00:56,927 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:00:56,927 INFO L93 Difference]: Finished difference Result 10048 states and 31424 transitions. [2019-12-07 18:00:56,928 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:00:56,928 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 55 [2019-12-07 18:00:56,928 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:00:56,938 INFO L225 Difference]: With dead ends: 10048 [2019-12-07 18:00:56,938 INFO L226 Difference]: Without dead ends: 10048 [2019-12-07 18:00:56,938 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:00:56,979 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10048 states. [2019-12-07 18:00:57,058 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10048 to 9192. [2019-12-07 18:00:57,058 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9192 states. [2019-12-07 18:00:57,070 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9192 states to 9192 states and 28945 transitions. [2019-12-07 18:00:57,071 INFO L78 Accepts]: Start accepts. Automaton has 9192 states and 28945 transitions. Word has length 55 [2019-12-07 18:00:57,071 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:00:57,071 INFO L462 AbstractCegarLoop]: Abstraction has 9192 states and 28945 transitions. [2019-12-07 18:00:57,071 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:00:57,071 INFO L276 IsEmpty]: Start isEmpty. Operand 9192 states and 28945 transitions. [2019-12-07 18:00:57,078 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 18:00:57,078 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:00:57,078 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:00:57,078 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:00:57,079 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:00:57,079 INFO L82 PathProgramCache]: Analyzing trace with hash -435713207, now seen corresponding path program 5 times [2019-12-07 18:00:57,079 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:00:57,079 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [497326386] [2019-12-07 18:00:57,079 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:00:57,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:00:57,287 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:00:57,288 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [497326386] [2019-12-07 18:00:57,288 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:00:57,288 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 18:00:57,288 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1986737059] [2019-12-07 18:00:57,288 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 18:00:57,288 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:00:57,288 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 18:00:57,289 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=147, Unknown=0, NotChecked=0, Total=182 [2019-12-07 18:00:57,289 INFO L87 Difference]: Start difference. First operand 9192 states and 28945 transitions. Second operand 14 states. [2019-12-07 18:00:58,701 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:00:58,701 INFO L93 Difference]: Finished difference Result 13656 states and 41819 transitions. [2019-12-07 18:00:58,702 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2019-12-07 18:00:58,702 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 55 [2019-12-07 18:00:58,702 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:00:58,723 INFO L225 Difference]: With dead ends: 13656 [2019-12-07 18:00:58,723 INFO L226 Difference]: Without dead ends: 11378 [2019-12-07 18:00:58,724 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 36 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 233 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=244, Invalid=946, Unknown=0, NotChecked=0, Total=1190 [2019-12-07 18:00:58,771 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11378 states. [2019-12-07 18:00:58,853 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11378 to 9323. [2019-12-07 18:00:58,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9323 states. [2019-12-07 18:00:58,867 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9323 states to 9323 states and 29292 transitions. [2019-12-07 18:00:58,867 INFO L78 Accepts]: Start accepts. Automaton has 9323 states and 29292 transitions. Word has length 55 [2019-12-07 18:00:58,867 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:00:58,867 INFO L462 AbstractCegarLoop]: Abstraction has 9323 states and 29292 transitions. [2019-12-07 18:00:58,867 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 18:00:58,867 INFO L276 IsEmpty]: Start isEmpty. Operand 9323 states and 29292 transitions. [2019-12-07 18:00:58,875 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 18:00:58,875 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:00:58,875 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:00:58,875 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:00:58,875 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:00:58,875 INFO L82 PathProgramCache]: Analyzing trace with hash 1776316093, now seen corresponding path program 6 times [2019-12-07 18:00:58,875 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:00:58,875 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [84632325] [2019-12-07 18:00:58,875 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:00:58,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:00:58,923 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:00:58,923 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [84632325] [2019-12-07 18:00:58,924 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:00:58,924 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:00:58,924 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1924302912] [2019-12-07 18:00:58,924 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:00:58,924 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:00:58,924 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:00:58,924 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:00:58,924 INFO L87 Difference]: Start difference. First operand 9323 states and 29292 transitions. Second operand 7 states. [2019-12-07 18:00:59,068 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:00:59,068 INFO L93 Difference]: Finished difference Result 15757 states and 48818 transitions. [2019-12-07 18:00:59,069 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 18:00:59,069 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 55 [2019-12-07 18:00:59,069 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:00:59,081 INFO L225 Difference]: With dead ends: 15757 [2019-12-07 18:00:59,081 INFO L226 Difference]: Without dead ends: 11656 [2019-12-07 18:00:59,081 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=34, Invalid=98, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:00:59,124 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11656 states. [2019-12-07 18:00:59,209 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11656 to 9561. [2019-12-07 18:00:59,209 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9561 states. [2019-12-07 18:00:59,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9561 states to 9561 states and 29989 transitions. [2019-12-07 18:00:59,223 INFO L78 Accepts]: Start accepts. Automaton has 9561 states and 29989 transitions. Word has length 55 [2019-12-07 18:00:59,223 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:00:59,223 INFO L462 AbstractCegarLoop]: Abstraction has 9561 states and 29989 transitions. [2019-12-07 18:00:59,223 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:00:59,223 INFO L276 IsEmpty]: Start isEmpty. Operand 9561 states and 29989 transitions. [2019-12-07 18:00:59,231 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 18:00:59,231 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:00:59,231 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:00:59,231 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:00:59,231 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:00:59,231 INFO L82 PathProgramCache]: Analyzing trace with hash 1276100617, now seen corresponding path program 7 times [2019-12-07 18:00:59,231 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:00:59,231 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [441880256] [2019-12-07 18:00:59,231 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:00:59,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:00:59,421 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:00:59,421 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [441880256] [2019-12-07 18:00:59,421 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:00:59,421 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 18:00:59,421 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [734937041] [2019-12-07 18:00:59,421 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 18:00:59,421 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:00:59,422 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 18:00:59,422 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=126, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:00:59,422 INFO L87 Difference]: Start difference. First operand 9561 states and 29989 transitions. Second operand 13 states. [2019-12-07 18:01:00,689 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:01:00,689 INFO L93 Difference]: Finished difference Result 17158 states and 52303 transitions. [2019-12-07 18:01:00,689 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-12-07 18:01:00,689 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 55 [2019-12-07 18:01:00,689 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:01:00,702 INFO L225 Difference]: With dead ends: 17158 [2019-12-07 18:01:00,702 INFO L226 Difference]: Without dead ends: 12006 [2019-12-07 18:01:00,702 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 264 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=242, Invalid=1018, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 18:01:00,746 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12006 states. [2019-12-07 18:01:00,854 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12006 to 10977. [2019-12-07 18:01:00,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10977 states. [2019-12-07 18:01:00,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10977 states to 10977 states and 34072 transitions. [2019-12-07 18:01:00,869 INFO L78 Accepts]: Start accepts. Automaton has 10977 states and 34072 transitions. Word has length 55 [2019-12-07 18:01:00,869 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:01:00,869 INFO L462 AbstractCegarLoop]: Abstraction has 10977 states and 34072 transitions. [2019-12-07 18:01:00,869 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 18:01:00,869 INFO L276 IsEmpty]: Start isEmpty. Operand 10977 states and 34072 transitions. [2019-12-07 18:01:00,878 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 18:01:00,878 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:01:00,878 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:01:00,878 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:01:00,878 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:01:00,878 INFO L82 PathProgramCache]: Analyzing trace with hash -806837379, now seen corresponding path program 8 times [2019-12-07 18:01:00,878 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:01:00,879 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2003081690] [2019-12-07 18:01:00,879 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:01:00,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:01:01,070 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:01:01,070 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2003081690] [2019-12-07 18:01:01,070 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:01:01,070 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 18:01:01,070 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [405468785] [2019-12-07 18:01:01,070 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 18:01:01,070 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:01:01,070 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 18:01:01,071 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=126, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:01:01,071 INFO L87 Difference]: Start difference. First operand 10977 states and 34072 transitions. Second operand 13 states. [2019-12-07 18:01:02,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:01:02,577 INFO L93 Difference]: Finished difference Result 17513 states and 53083 transitions. [2019-12-07 18:01:02,577 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2019-12-07 18:01:02,577 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 55 [2019-12-07 18:01:02,578 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:01:02,593 INFO L225 Difference]: With dead ends: 17513 [2019-12-07 18:01:02,593 INFO L226 Difference]: Without dead ends: 13127 [2019-12-07 18:01:02,593 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 418 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=324, Invalid=1398, Unknown=0, NotChecked=0, Total=1722 [2019-12-07 18:01:02,641 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13127 states. [2019-12-07 18:01:02,740 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13127 to 10919. [2019-12-07 18:01:02,740 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10919 states. [2019-12-07 18:01:02,755 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10919 states to 10919 states and 33905 transitions. [2019-12-07 18:01:02,755 INFO L78 Accepts]: Start accepts. Automaton has 10919 states and 33905 transitions. Word has length 55 [2019-12-07 18:01:02,755 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:01:02,755 INFO L462 AbstractCegarLoop]: Abstraction has 10919 states and 33905 transitions. [2019-12-07 18:01:02,755 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 18:01:02,755 INFO L276 IsEmpty]: Start isEmpty. Operand 10919 states and 33905 transitions. [2019-12-07 18:01:02,764 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 18:01:02,764 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:01:02,764 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:01:02,764 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:01:02,764 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:01:02,764 INFO L82 PathProgramCache]: Analyzing trace with hash -808118167, now seen corresponding path program 9 times [2019-12-07 18:01:02,765 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:01:02,765 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [596594830] [2019-12-07 18:01:02,765 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:01:02,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:01:02,794 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:01:02,794 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [596594830] [2019-12-07 18:01:02,794 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:01:02,794 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:01:02,794 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1415150435] [2019-12-07 18:01:02,794 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:01:02,794 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:01:02,794 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:01:02,795 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:01:02,795 INFO L87 Difference]: Start difference. First operand 10919 states and 33905 transitions. Second operand 3 states. [2019-12-07 18:01:02,819 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:01:02,819 INFO L93 Difference]: Finished difference Result 8508 states and 25925 transitions. [2019-12-07 18:01:02,819 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:01:02,819 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 55 [2019-12-07 18:01:02,819 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:01:02,828 INFO L225 Difference]: With dead ends: 8508 [2019-12-07 18:01:02,828 INFO L226 Difference]: Without dead ends: 8508 [2019-12-07 18:01:02,828 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:01:02,864 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8508 states. [2019-12-07 18:01:02,931 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8508 to 8343. [2019-12-07 18:01:02,931 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8343 states. [2019-12-07 18:01:02,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8343 states to 8343 states and 25464 transitions. [2019-12-07 18:01:02,942 INFO L78 Accepts]: Start accepts. Automaton has 8343 states and 25464 transitions. Word has length 55 [2019-12-07 18:01:02,942 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:01:02,942 INFO L462 AbstractCegarLoop]: Abstraction has 8343 states and 25464 transitions. [2019-12-07 18:01:02,942 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:01:02,942 INFO L276 IsEmpty]: Start isEmpty. Operand 8343 states and 25464 transitions. [2019-12-07 18:01:02,948 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 18:01:02,948 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:01:02,948 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:01:02,948 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:01:02,949 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:01:02,949 INFO L82 PathProgramCache]: Analyzing trace with hash 1033271685, now seen corresponding path program 1 times [2019-12-07 18:01:02,949 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:01:02,949 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [813523675] [2019-12-07 18:01:02,949 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:01:02,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:01:03,060 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:01:03,060 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [813523675] [2019-12-07 18:01:03,060 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:01:03,060 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:01:03,060 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [807735509] [2019-12-07 18:01:03,061 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:01:03,061 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:01:03,061 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:01:03,061 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:01:03,061 INFO L87 Difference]: Start difference. First operand 8343 states and 25464 transitions. Second operand 11 states. [2019-12-07 18:01:03,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:01:03,546 INFO L93 Difference]: Finished difference Result 14412 states and 43314 transitions. [2019-12-07 18:01:03,546 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2019-12-07 18:01:03,546 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 56 [2019-12-07 18:01:03,547 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:01:03,556 INFO L225 Difference]: With dead ends: 14412 [2019-12-07 18:01:03,556 INFO L226 Difference]: Without dead ends: 9547 [2019-12-07 18:01:03,556 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 198 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=183, Invalid=747, Unknown=0, NotChecked=0, Total=930 [2019-12-07 18:01:03,593 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9547 states. [2019-12-07 18:01:03,663 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9547 to 8653. [2019-12-07 18:01:03,663 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8653 states. [2019-12-07 18:01:03,674 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8653 states to 8653 states and 25849 transitions. [2019-12-07 18:01:03,674 INFO L78 Accepts]: Start accepts. Automaton has 8653 states and 25849 transitions. Word has length 56 [2019-12-07 18:01:03,674 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:01:03,674 INFO L462 AbstractCegarLoop]: Abstraction has 8653 states and 25849 transitions. [2019-12-07 18:01:03,674 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:01:03,674 INFO L276 IsEmpty]: Start isEmpty. Operand 8653 states and 25849 transitions. [2019-12-07 18:01:03,681 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 18:01:03,681 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:01:03,681 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:01:03,681 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:01:03,681 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:01:03,681 INFO L82 PathProgramCache]: Analyzing trace with hash -1822247207, now seen corresponding path program 2 times [2019-12-07 18:01:03,681 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:01:03,681 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [574821424] [2019-12-07 18:01:03,681 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:01:03,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:01:03,914 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:01:03,914 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [574821424] [2019-12-07 18:01:03,914 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:01:03,914 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 18:01:03,914 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1872869509] [2019-12-07 18:01:03,915 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 18:01:03,915 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:01:03,915 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 18:01:03,915 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=176, Unknown=0, NotChecked=0, Total=210 [2019-12-07 18:01:03,915 INFO L87 Difference]: Start difference. First operand 8653 states and 25849 transitions. Second operand 15 states. [2019-12-07 18:01:06,054 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:01:06,055 INFO L93 Difference]: Finished difference Result 10251 states and 30049 transitions. [2019-12-07 18:01:06,055 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2019-12-07 18:01:06,056 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 56 [2019-12-07 18:01:06,056 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:01:06,073 INFO L225 Difference]: With dead ends: 10251 [2019-12-07 18:01:06,073 INFO L226 Difference]: Without dead ends: 9947 [2019-12-07 18:01:06,076 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1482 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=713, Invalid=3979, Unknown=0, NotChecked=0, Total=4692 [2019-12-07 18:01:06,120 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9947 states. [2019-12-07 18:01:06,189 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9947 to 8665. [2019-12-07 18:01:06,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8665 states. [2019-12-07 18:01:06,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8665 states to 8665 states and 25877 transitions. [2019-12-07 18:01:06,201 INFO L78 Accepts]: Start accepts. Automaton has 8665 states and 25877 transitions. Word has length 56 [2019-12-07 18:01:06,201 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:01:06,201 INFO L462 AbstractCegarLoop]: Abstraction has 8665 states and 25877 transitions. [2019-12-07 18:01:06,201 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 18:01:06,201 INFO L276 IsEmpty]: Start isEmpty. Operand 8665 states and 25877 transitions. [2019-12-07 18:01:06,207 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 18:01:06,208 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:01:06,208 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:01:06,208 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:01:06,208 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:01:06,208 INFO L82 PathProgramCache]: Analyzing trace with hash -1500231249, now seen corresponding path program 3 times [2019-12-07 18:01:06,208 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:01:06,208 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2053643361] [2019-12-07 18:01:06,208 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:01:06,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:01:06,454 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:01:06,454 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2053643361] [2019-12-07 18:01:06,454 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:01:06,455 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 18:01:06,455 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [224119318] [2019-12-07 18:01:06,455 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 18:01:06,455 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:01:06,455 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 18:01:06,455 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2019-12-07 18:01:06,455 INFO L87 Difference]: Start difference. First operand 8665 states and 25877 transitions. Second operand 15 states. [2019-12-07 18:01:07,726 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:01:07,726 INFO L93 Difference]: Finished difference Result 9401 states and 27725 transitions. [2019-12-07 18:01:07,726 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2019-12-07 18:01:07,727 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 56 [2019-12-07 18:01:07,727 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:01:07,736 INFO L225 Difference]: With dead ends: 9401 [2019-12-07 18:01:07,736 INFO L226 Difference]: Without dead ends: 9281 [2019-12-07 18:01:07,736 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 42 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 306 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=219, Invalid=1263, Unknown=0, NotChecked=0, Total=1482 [2019-12-07 18:01:07,772 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9281 states. [2019-12-07 18:01:07,841 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9281 to 8915. [2019-12-07 18:01:07,841 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8915 states. [2019-12-07 18:01:07,852 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8915 states to 8915 states and 26561 transitions. [2019-12-07 18:01:07,852 INFO L78 Accepts]: Start accepts. Automaton has 8915 states and 26561 transitions. Word has length 56 [2019-12-07 18:01:07,852 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:01:07,853 INFO L462 AbstractCegarLoop]: Abstraction has 8915 states and 26561 transitions. [2019-12-07 18:01:07,853 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 18:01:07,853 INFO L276 IsEmpty]: Start isEmpty. Operand 8915 states and 26561 transitions. [2019-12-07 18:01:07,859 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 18:01:07,859 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:01:07,859 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:01:07,859 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:01:07,860 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:01:07,860 INFO L82 PathProgramCache]: Analyzing trace with hash 1613120125, now seen corresponding path program 4 times [2019-12-07 18:01:07,860 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:01:07,860 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2012987532] [2019-12-07 18:01:07,860 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:01:07,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:01:08,126 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:01:08,126 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2012987532] [2019-12-07 18:01:08,126 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:01:08,126 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 18:01:08,126 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1721383711] [2019-12-07 18:01:08,127 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 18:01:08,127 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:01:08,127 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 18:01:08,127 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=206, Unknown=0, NotChecked=0, Total=240 [2019-12-07 18:01:08,127 INFO L87 Difference]: Start difference. First operand 8915 states and 26561 transitions. Second operand 16 states. [2019-12-07 18:01:10,279 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:01:10,279 INFO L93 Difference]: Finished difference Result 9427 states and 27843 transitions. [2019-12-07 18:01:10,280 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2019-12-07 18:01:10,280 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 56 [2019-12-07 18:01:10,280 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:01:10,296 INFO L225 Difference]: With dead ends: 9427 [2019-12-07 18:01:10,296 INFO L226 Difference]: Without dead ends: 9357 [2019-12-07 18:01:10,297 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 367 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=239, Invalid=1483, Unknown=0, NotChecked=0, Total=1722 [2019-12-07 18:01:10,339 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9357 states. [2019-12-07 18:01:10,408 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9357 to 8923. [2019-12-07 18:01:10,408 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8923 states. [2019-12-07 18:01:10,420 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8923 states to 8923 states and 26583 transitions. [2019-12-07 18:01:10,420 INFO L78 Accepts]: Start accepts. Automaton has 8923 states and 26583 transitions. Word has length 56 [2019-12-07 18:01:10,420 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:01:10,420 INFO L462 AbstractCegarLoop]: Abstraction has 8923 states and 26583 transitions. [2019-12-07 18:01:10,421 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 18:01:10,421 INFO L276 IsEmpty]: Start isEmpty. Operand 8923 states and 26583 transitions. [2019-12-07 18:01:10,427 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 18:01:10,427 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:01:10,427 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:01:10,428 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:01:10,428 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:01:10,428 INFO L82 PathProgramCache]: Analyzing trace with hash -301947367, now seen corresponding path program 5 times [2019-12-07 18:01:10,428 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:01:10,428 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1314762922] [2019-12-07 18:01:10,428 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:01:10,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:01:10,537 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:01:10,537 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1314762922] [2019-12-07 18:01:10,537 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:01:10,537 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:01:10,538 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1216194530] [2019-12-07 18:01:10,538 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:01:10,538 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:01:10,538 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:01:10,538 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:01:10,538 INFO L87 Difference]: Start difference. First operand 8923 states and 26583 transitions. Second operand 11 states. [2019-12-07 18:01:11,002 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:01:11,003 INFO L93 Difference]: Finished difference Result 9921 states and 29008 transitions. [2019-12-07 18:01:11,003 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 18:01:11,003 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 56 [2019-12-07 18:01:11,003 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:01:11,012 INFO L225 Difference]: With dead ends: 9921 [2019-12-07 18:01:11,012 INFO L226 Difference]: Without dead ends: 9219 [2019-12-07 18:01:11,012 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=59, Invalid=247, Unknown=0, NotChecked=0, Total=306 [2019-12-07 18:01:11,048 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9219 states. [2019-12-07 18:01:11,124 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9219 to 8491. [2019-12-07 18:01:11,124 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8491 states. [2019-12-07 18:01:11,134 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8491 states to 8491 states and 25413 transitions. [2019-12-07 18:01:11,134 INFO L78 Accepts]: Start accepts. Automaton has 8491 states and 25413 transitions. Word has length 56 [2019-12-07 18:01:11,135 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:01:11,135 INFO L462 AbstractCegarLoop]: Abstraction has 8491 states and 25413 transitions. [2019-12-07 18:01:11,135 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:01:11,135 INFO L276 IsEmpty]: Start isEmpty. Operand 8491 states and 25413 transitions. [2019-12-07 18:01:11,141 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 18:01:11,141 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:01:11,141 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:01:11,141 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:01:11,141 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:01:11,141 INFO L82 PathProgramCache]: Analyzing trace with hash -1443591425, now seen corresponding path program 6 times [2019-12-07 18:01:11,142 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:01:11,142 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1762216252] [2019-12-07 18:01:11,142 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:01:11,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:01:11,233 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:01:11,233 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1762216252] [2019-12-07 18:01:11,233 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:01:11,233 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:01:11,233 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [787540427] [2019-12-07 18:01:11,233 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:01:11,233 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:01:11,233 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:01:11,234 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:01:11,234 INFO L87 Difference]: Start difference. First operand 8491 states and 25413 transitions. Second operand 11 states. [2019-12-07 18:01:12,378 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:01:12,378 INFO L93 Difference]: Finished difference Result 9551 states and 28102 transitions. [2019-12-07 18:01:12,379 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 18:01:12,379 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 56 [2019-12-07 18:01:12,380 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:01:12,395 INFO L225 Difference]: With dead ends: 9551 [2019-12-07 18:01:12,395 INFO L226 Difference]: Without dead ends: 9365 [2019-12-07 18:01:12,396 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=65, Invalid=277, Unknown=0, NotChecked=0, Total=342 [2019-12-07 18:01:12,440 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9365 states. [2019-12-07 18:01:12,508 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9365 to 8431. [2019-12-07 18:01:12,508 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8431 states. [2019-12-07 18:01:12,520 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8431 states to 8431 states and 25261 transitions. [2019-12-07 18:01:12,520 INFO L78 Accepts]: Start accepts. Automaton has 8431 states and 25261 transitions. Word has length 56 [2019-12-07 18:01:12,520 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:01:12,520 INFO L462 AbstractCegarLoop]: Abstraction has 8431 states and 25261 transitions. [2019-12-07 18:01:12,520 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:01:12,520 INFO L276 IsEmpty]: Start isEmpty. Operand 8431 states and 25261 transitions. [2019-12-07 18:01:12,526 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 18:01:12,527 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:01:12,527 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:01:12,527 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:01:12,527 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:01:12,527 INFO L82 PathProgramCache]: Analyzing trace with hash -1734091201, now seen corresponding path program 7 times [2019-12-07 18:01:12,527 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:01:12,527 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [931211525] [2019-12-07 18:01:12,527 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:01:12,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:01:12,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:01:12,585 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 18:01:12,585 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 18:01:12,587 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [807] [807] ULTIMATE.startENTRY-->L818: Formula: (let ((.cse0 (store |v_#valid_66| 0 0))) (and (= 0 v_~__unbuffered_cnt~0_95) (= 0 v_~x~0_240) (< |v_#StackHeapBarrier_16| |v_ULTIMATE.start_main_~#t2076~0.base_30|) (= v_~x$r_buff1_thd0~0_309 0) (= v_~weak$$choice2~0_201 0) (= 0 v_~x$w_buff1_used~0_624) (= 0 v_~x$r_buff1_thd2~0_264) (= v_~y~0_226 0) (= |v_#valid_64| (store .cse0 |v_ULTIMATE.start_main_~#t2076~0.base_30| 1)) (= v_~z~0_95 0) (< 0 |v_#StackHeapBarrier_16|) (= 0 v_~x$read_delayed_var~0.base_7) (= 0 v_~x$r_buff0_thd3~0_148) (= |v_ULTIMATE.start_main_~#t2076~0.offset_22| 0) (= 0 v_~x$w_buff1~0_328) (= 0 v_~x$r_buff0_thd2~0_323) (= v_~x$flush_delayed~0_62 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t2076~0.base_30|) 0) (= 0 v_~x$w_buff0_used~0_913) (= 0 |v_#NULL.base_4|) (= 0 v_~x$read_delayed~0_7) (= v_~x$r_buff0_thd1~0_362 0) (= 0 v_~weak$$choice0~0_37) (= v_~main$tmp_guard1~0_53 0) (= v_~main$tmp_guard0~0_42 0) (= 0 v_~__unbuffered_p0_EAX~0_85) (= 0 v_~__unbuffered_p2_EAX~0_68) (= |v_#NULL.offset_4| 0) (= 0 v_~x$read_delayed_var~0.offset_7) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t2076~0.base_30| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t2076~0.base_30|) |v_ULTIMATE.start_main_~#t2076~0.offset_22| 0)) |v_#memory_int_23|) (= 0 v_~x$r_buff1_thd3~0_267) (= v_~x$mem_tmp~0_40 0) (= v_~x$r_buff1_thd1~0_428 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t2076~0.base_30| 4)) (= 0 v_~x$w_buff0~0_403) (= v_~x$r_buff0_thd0~0_156 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_16|, #valid=|v_#valid_66|, #memory_int=|v_#memory_int_24|, #length=|v_#length_24|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_403, ~x$flush_delayed~0=v_~x$flush_delayed~0_62, #NULL.offset=|v_#NULL.offset_4|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_428, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_148, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_40|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_34|, ULTIMATE.start_main_~#t2078~0.base=|v_ULTIMATE.start_main_~#t2078~0.base_23|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_85, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_68, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_156, ~x$w_buff1~0=v_~x$w_buff1~0_328, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_624, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_264, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ~weak$$choice0~0=v_~weak$$choice0~0_37, #StackHeapBarrier=|v_#StackHeapBarrier_16|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_95, ~x~0=v_~x~0_240, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_362, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_114|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_267, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_53, ~x$mem_tmp~0=v_~x$mem_tmp~0_40, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_51|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_60|, ULTIMATE.start_main_~#t2078~0.offset=|v_ULTIMATE.start_main_~#t2078~0.offset_14|, ~y~0=v_~y~0_226, ULTIMATE.start_main_~#t2076~0.base=|v_ULTIMATE.start_main_~#t2076~0.base_30|, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_15|, ULTIMATE.start_main_~#t2077~0.base=|v_ULTIMATE.start_main_~#t2077~0.base_31|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_42, ULTIMATE.start_main_~#t2077~0.offset=|v_ULTIMATE.start_main_~#t2077~0.offset_22|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_309, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_323, #NULL.base=|v_#NULL.base_4|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_913, ULTIMATE.start_main_~#t2076~0.offset=|v_ULTIMATE.start_main_~#t2076~0.offset_22|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_62|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_23|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_8|, ~z~0=v_~z~0_95, ~weak$$choice2~0=v_~weak$$choice2~0_201, ~x$read_delayed~0=v_~x$read_delayed~0_7} AuxVars[] AssignedVars[~x$w_buff0~0, ~x$r_buff0_thd1~0, ~x$flush_delayed~0, #NULL.offset, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~x$r_buff1_thd1~0, ~main$tmp_guard1~0, ~x$r_buff0_thd3~0, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t2078~0.base, ULTIMATE.start_main_#t~ite44, ~__unbuffered_p0_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t2078~0.offset, ~y~0, ULTIMATE.start_main_~#t2076~0.base, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~nondet40, ~x$w_buff1~0, ULTIMATE.start_main_~#t2077~0.base, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t2077~0.offset, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ~x$read_delayed_var~0.base, #NULL.base, ~x$w_buff0_used~0, ~weak$$choice0~0, ULTIMATE.start_main_~#t2076~0.offset, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_#t~nondet38, #memory_int, ~__unbuffered_cnt~0, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ~x~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 18:01:12,588 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L818-1-->L820: Formula: (and (= |v_ULTIMATE.start_main_~#t2077~0.offset_9| 0) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t2077~0.base_10| 4) |v_#length_15|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2077~0.base_10| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2077~0.base_10|) |v_ULTIMATE.start_main_~#t2077~0.offset_9| 1)) |v_#memory_int_15|) (not (= 0 |v_ULTIMATE.start_main_~#t2077~0.base_10|)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2077~0.base_10|) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t2077~0.base_10| 1)) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t2077~0.base_10|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t2077~0.base=|v_ULTIMATE.start_main_~#t2077~0.base_10|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_4|, #length=|v_#length_15|, ULTIMATE.start_main_~#t2077~0.offset=|v_ULTIMATE.start_main_~#t2077~0.offset_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2077~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length, ULTIMATE.start_main_~#t2077~0.offset] because there is no mapped edge [2019-12-07 18:01:12,588 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [675] [675] P1ENTRY-->L5-3: Formula: (and (= v_~x$w_buff0~0_21 v_~x$w_buff1~0_19) (= v_P1Thread1of1ForFork0_~arg.base_4 |v_P1Thread1of1ForFork0_#in~arg.base_6|) (= v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_6 |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_4|) (not (= 0 v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_6)) (= v_~x$w_buff1_used~0_52 v_~x$w_buff0_used~0_98) (= |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_4| (ite (not (and (not (= 0 (mod v_~x$w_buff0_used~0_97 256))) (not (= 0 (mod v_~x$w_buff1_used~0_52 256))))) 1 0)) (= v_P1Thread1of1ForFork0_~arg.offset_4 |v_P1Thread1of1ForFork0_#in~arg.offset_6|) (= 1 v_~x$w_buff0_used~0_97) (= 1 v_~x$w_buff0~0_20)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_21, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_6|, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_6|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_98} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_20, P1Thread1of1ForFork0___VERIFIER_assert_~expression=v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_6, P1Thread1of1ForFork0_~arg.offset=v_P1Thread1of1ForFork0_~arg.offset_4, P1Thread1of1ForFork0_~arg.base=v_P1Thread1of1ForFork0_~arg.base_4, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_6|, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_4|, ~x$w_buff1~0=v_~x$w_buff1~0_19, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_6|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_52, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_97} AuxVars[] AssignedVars[~x$w_buff0~0, P1Thread1of1ForFork0___VERIFIER_assert_~expression, P1Thread1of1ForFork0_~arg.offset, P1Thread1of1ForFork0_~arg.base, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 18:01:12,589 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L820-1-->L822: Formula: (and (= |v_ULTIMATE.start_main_~#t2078~0.offset_10| 0) (not (= |v_ULTIMATE.start_main_~#t2078~0.base_11| 0)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t2078~0.base_11|) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t2078~0.base_11| 4)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2078~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2078~0.base_11|) |v_ULTIMATE.start_main_~#t2078~0.offset_10| 2)) |v_#memory_int_13|) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t2078~0.base_11|)) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t2078~0.base_11| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_14|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t2078~0.offset=|v_ULTIMATE.start_main_~#t2078~0.offset_10|, #length=|v_#length_13|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_4|, ULTIMATE.start_main_~#t2078~0.base=|v_ULTIMATE.start_main_~#t2078~0.base_11|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_~#t2078~0.offset, #length, ULTIMATE.start_main_#t~nondet39, ULTIMATE.start_main_~#t2078~0.base] because there is no mapped edge [2019-12-07 18:01:12,590 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [753] [753] L795-2-->L795-4: Formula: (let ((.cse0 (= (mod ~x$r_buff1_thd3~0_In-791148359 256) 0)) (.cse1 (= (mod ~x$w_buff1_used~0_In-791148359 256) 0))) (or (and (= ~x~0_In-791148359 |P2Thread1of1ForFork1_#t~ite32_Out-791148359|) (or .cse0 .cse1)) (and (= ~x$w_buff1~0_In-791148359 |P2Thread1of1ForFork1_#t~ite32_Out-791148359|) (not .cse0) (not .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-791148359, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-791148359, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-791148359, ~x~0=~x~0_In-791148359} OutVars{P2Thread1of1ForFork1_#t~ite32=|P2Thread1of1ForFork1_#t~ite32_Out-791148359|, ~x$w_buff1~0=~x$w_buff1~0_In-791148359, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-791148359, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-791148359, ~x~0=~x~0_In-791148359} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32] because there is no mapped edge [2019-12-07 18:01:12,590 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [677] [677] L795-4-->L796: Formula: (= v_~x~0_21 |v_P2Thread1of1ForFork1_#t~ite32_8|) InVars {P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_8|} OutVars{P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_7|, P2Thread1of1ForFork1_#t~ite33=|v_P2Thread1of1ForFork1_#t~ite33_11|, ~x~0=v_~x~0_21} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32, P2Thread1of1ForFork1_#t~ite33, ~x~0] because there is no mapped edge [2019-12-07 18:01:12,590 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] L796-->L796-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd3~0_In1858809408 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1858809408 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In1858809408 |P2Thread1of1ForFork1_#t~ite34_Out1858809408|)) (and (not .cse1) (= 0 |P2Thread1of1ForFork1_#t~ite34_Out1858809408|) (not .cse0)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1858809408, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1858809408} OutVars{P2Thread1of1ForFork1_#t~ite34=|P2Thread1of1ForFork1_#t~ite34_Out1858809408|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1858809408, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1858809408} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-12-07 18:01:12,591 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [746] [746] L776-->L776-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In-482675587 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In-482675587 256) 0))) (or (and (not .cse0) (= |P1Thread1of1ForFork0_#t~ite28_Out-482675587| 0) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork0_#t~ite28_Out-482675587| ~x$w_buff0_used~0_In-482675587)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-482675587, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-482675587} OutVars{~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-482675587, P1Thread1of1ForFork0_#t~ite28=|P1Thread1of1ForFork0_#t~ite28_Out-482675587|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-482675587} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite28] because there is no mapped edge [2019-12-07 18:01:12,592 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [738] [738] L777-->L777-2: Formula: (let ((.cse3 (= (mod ~x$r_buff1_thd2~0_In-841867374 256) 0)) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In-841867374 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In-841867374 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd2~0_In-841867374 256) 0))) (or (and (= |P1Thread1of1ForFork0_#t~ite29_Out-841867374| ~x$w_buff1_used~0_In-841867374) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork0_#t~ite29_Out-841867374| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-841867374, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-841867374, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-841867374, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-841867374} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-841867374, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-841867374, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-841867374, P1Thread1of1ForFork0_#t~ite29=|P1Thread1of1ForFork0_#t~ite29_Out-841867374|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-841867374} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 18:01:12,592 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L778-->L779: Formula: (let ((.cse1 (= ~x$r_buff0_thd2~0_Out763618595 ~x$r_buff0_thd2~0_In763618595)) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In763618595 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In763618595 256)))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (= ~x$r_buff0_thd2~0_Out763618595 0) (not .cse2) (not .cse0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In763618595, ~x$w_buff0_used~0=~x$w_buff0_used~0_In763618595} OutVars{P1Thread1of1ForFork0_#t~ite30=|P1Thread1of1ForFork0_#t~ite30_Out763618595|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out763618595, ~x$w_buff0_used~0=~x$w_buff0_used~0_In763618595} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite30, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 18:01:12,592 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] L779-->L779-2: Formula: (let ((.cse2 (= (mod ~x$w_buff0_used~0_In-513326958 256) 0)) (.cse3 (= 0 (mod ~x$r_buff0_thd2~0_In-513326958 256))) (.cse1 (= (mod ~x$r_buff1_thd2~0_In-513326958 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In-513326958 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork0_#t~ite31_Out-513326958|)) (and (or .cse2 .cse3) (= |P1Thread1of1ForFork0_#t~ite31_Out-513326958| ~x$r_buff1_thd2~0_In-513326958) (or .cse1 .cse0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-513326958, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-513326958, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-513326958, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-513326958} OutVars{P1Thread1of1ForFork0_#t~ite31=|P1Thread1of1ForFork0_#t~ite31_Out-513326958|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-513326958, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-513326958, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-513326958, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-513326958} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 18:01:12,592 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L779-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_52 1) v_~__unbuffered_cnt~0_51) (= v_~x$r_buff1_thd2~0_46 |v_P1Thread1of1ForFork0_#t~ite31_28|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|)) InVars {P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_52} OutVars{P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_27|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_46, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_51, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 18:01:12,593 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L740-->L740-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In108298849 256)))) (or (and (= |P0Thread1of1ForFork2_#t~ite8_In108298849| |P0Thread1of1ForFork2_#t~ite8_Out108298849|) (= ~x$w_buff0~0_In108298849 |P0Thread1of1ForFork2_#t~ite9_Out108298849|) (not .cse0)) (and (let ((.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In108298849 256)))) (or (= (mod ~x$w_buff0_used~0_In108298849 256) 0) (and (= 0 (mod ~x$r_buff1_thd1~0_In108298849 256)) .cse1) (and (= 0 (mod ~x$w_buff1_used~0_In108298849 256)) .cse1))) (= ~x$w_buff0~0_In108298849 |P0Thread1of1ForFork2_#t~ite8_Out108298849|) (= |P0Thread1of1ForFork2_#t~ite9_Out108298849| |P0Thread1of1ForFork2_#t~ite8_Out108298849|) .cse0))) InVars {~x$w_buff0~0=~x$w_buff0~0_In108298849, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In108298849, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_In108298849|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In108298849, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In108298849, ~weak$$choice2~0=~weak$$choice2~0_In108298849, ~x$w_buff0_used~0=~x$w_buff0_used~0_In108298849} OutVars{~x$w_buff0~0=~x$w_buff0~0_In108298849, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In108298849, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_Out108298849|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In108298849, P0Thread1of1ForFork2_#t~ite9=|P0Thread1of1ForFork2_#t~ite9_Out108298849|, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In108298849, ~weak$$choice2~0=~weak$$choice2~0_In108298849, ~x$w_buff0_used~0=~x$w_buff0_used~0_In108298849} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite8, P0Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 18:01:12,594 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L797-->L797-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff1_used~0_In-167468437 256))) (.cse3 (= 0 (mod ~x$r_buff1_thd3~0_In-167468437 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In-167468437 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In-167468437 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork1_#t~ite35_Out-167468437| 0)) (and (= ~x$w_buff1_used~0_In-167468437 |P2Thread1of1ForFork1_#t~ite35_Out-167468437|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-167468437, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-167468437, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-167468437, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-167468437} OutVars{P2Thread1of1ForFork1_#t~ite35=|P2Thread1of1ForFork1_#t~ite35_Out-167468437|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-167468437, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-167468437, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-167468437, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-167468437} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite35] because there is no mapped edge [2019-12-07 18:01:12,594 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [744] [744] L798-->L798-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In149080008 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In149080008 256)))) (or (and (= ~x$r_buff0_thd3~0_In149080008 |P2Thread1of1ForFork1_#t~ite36_Out149080008|) (or .cse0 .cse1)) (and (not .cse0) (= |P2Thread1of1ForFork1_#t~ite36_Out149080008| 0) (not .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In149080008, ~x$w_buff0_used~0=~x$w_buff0_used~0_In149080008} OutVars{P2Thread1of1ForFork1_#t~ite36=|P2Thread1of1ForFork1_#t~ite36_Out149080008|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In149080008, ~x$w_buff0_used~0=~x$w_buff0_used~0_In149080008} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-12-07 18:01:12,595 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [748] [748] L799-->L799-2: Formula: (let ((.cse2 (= (mod ~x$w_buff1_used~0_In369661034 256) 0)) (.cse3 (= (mod ~x$r_buff1_thd3~0_In369661034 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd3~0_In369661034 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In369661034 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork1_#t~ite37_Out369661034| 0)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= |P2Thread1of1ForFork1_#t~ite37_Out369661034| ~x$r_buff1_thd3~0_In369661034)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In369661034, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In369661034, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In369661034, ~x$w_buff0_used~0=~x$w_buff0_used~0_In369661034} OutVars{P2Thread1of1ForFork1_#t~ite37=|P2Thread1of1ForFork1_#t~ite37_Out369661034|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In369661034, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In369661034, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In369661034, ~x$w_buff0_used~0=~x$w_buff0_used~0_In369661034} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-12-07 18:01:12,595 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L799-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|) (= v_~x$r_buff1_thd3~0_48 |v_P2Thread1of1ForFork1_#t~ite37_28|) (= (+ v_~__unbuffered_cnt~0_64 1) v_~__unbuffered_cnt~0_63)) InVars {P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_64} OutVars{P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_27|, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_48, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37, P2Thread1of1ForFork1_#res.base, ~x$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 18:01:12,595 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L743-->L743-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In532205848 256)))) (or (and (= |P0Thread1of1ForFork2_#t~ite17_Out532205848| ~x$w_buff1_used~0_In532205848) .cse0 (let ((.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In532205848 256)))) (or (= 0 (mod ~x$w_buff0_used~0_In532205848 256)) (and (= (mod ~x$w_buff1_used~0_In532205848 256) 0) .cse1) (and (= (mod ~x$r_buff1_thd1~0_In532205848 256) 0) .cse1))) (= |P0Thread1of1ForFork2_#t~ite18_Out532205848| |P0Thread1of1ForFork2_#t~ite17_Out532205848|)) (and (= |P0Thread1of1ForFork2_#t~ite17_In532205848| |P0Thread1of1ForFork2_#t~ite17_Out532205848|) (not .cse0) (= |P0Thread1of1ForFork2_#t~ite18_Out532205848| ~x$w_buff1_used~0_In532205848)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In532205848, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_In532205848|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In532205848, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In532205848, ~weak$$choice2~0=~weak$$choice2~0_In532205848, ~x$w_buff0_used~0=~x$w_buff0_used~0_In532205848} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In532205848, P0Thread1of1ForFork2_#t~ite18=|P0Thread1of1ForFork2_#t~ite18_Out532205848|, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_Out532205848|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In532205848, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In532205848, ~weak$$choice2~0=~weak$$choice2~0_In532205848, ~x$w_buff0_used~0=~x$w_buff0_used~0_In532205848} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite18, P0Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 18:01:12,596 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [730] [730] L744-->L745: Formula: (and (= v_~x$r_buff0_thd1~0_101 v_~x$r_buff0_thd1~0_100) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_101, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{P0Thread1of1ForFork2_#t~ite20=|v_P0Thread1of1ForFork2_#t~ite20_9|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_100, P0Thread1of1ForFork2_#t~ite19=|v_P0Thread1of1ForFork2_#t~ite19_6|, ~weak$$choice2~0=v_~weak$$choice2~0_39, P0Thread1of1ForFork2_#t~ite21=|v_P0Thread1of1ForFork2_#t~ite21_7|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite20, ~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite19, P0Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 18:01:12,596 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L745-->L745-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-557718895 256)))) (or (and (= |P0Thread1of1ForFork2_#t~ite23_In-557718895| |P0Thread1of1ForFork2_#t~ite23_Out-557718895|) (= |P0Thread1of1ForFork2_#t~ite24_Out-557718895| ~x$r_buff1_thd1~0_In-557718895) (not .cse0)) (and (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In-557718895 256) 0))) (or (and (= (mod ~x$w_buff1_used~0_In-557718895 256) 0) .cse1) (and (= 0 (mod ~x$r_buff1_thd1~0_In-557718895 256)) .cse1) (= 0 (mod ~x$w_buff0_used~0_In-557718895 256)))) (= ~x$r_buff1_thd1~0_In-557718895 |P0Thread1of1ForFork2_#t~ite23_Out-557718895|) (= |P0Thread1of1ForFork2_#t~ite24_Out-557718895| |P0Thread1of1ForFork2_#t~ite23_Out-557718895|) .cse0))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-557718895, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-557718895, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-557718895, ~weak$$choice2~0=~weak$$choice2~0_In-557718895, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_In-557718895|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-557718895} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-557718895, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-557718895, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-557718895, P0Thread1of1ForFork2_#t~ite24=|P0Thread1of1ForFork2_#t~ite24_Out-557718895|, ~weak$$choice2~0=~weak$$choice2~0_In-557718895, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_Out-557718895|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-557718895} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite24, P0Thread1of1ForFork2_#t~ite23] because there is no mapped edge [2019-12-07 18:01:12,596 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [704] [704] L747-->L755: Formula: (and (= v_~x$flush_delayed~0_17 0) (not (= (mod v_~x$flush_delayed~0_18 256) 0)) (= v_~x~0_34 v_~x$mem_tmp~0_10) (= v_~__unbuffered_cnt~0_30 (+ v_~__unbuffered_cnt~0_31 1))) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_18, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_31, ~x$mem_tmp~0=v_~x$mem_tmp~0_10} OutVars{P0Thread1of1ForFork2_#t~ite25=|v_P0Thread1of1ForFork2_#t~ite25_13|, ~x$flush_delayed~0=v_~x$flush_delayed~0_17, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_30, ~x$mem_tmp~0=v_~x$mem_tmp~0_10, ~x~0=v_~x~0_34} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite25, ~x$flush_delayed~0, ~__unbuffered_cnt~0, ~x~0] because there is no mapped edge [2019-12-07 18:01:12,597 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [699] [699] L826-->L828-2: Formula: (and (or (= 0 (mod v_~x$w_buff0_used~0_158 256)) (= 0 (mod v_~x$r_buff0_thd0~0_26 256))) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_26, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_158} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_26, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_158} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 18:01:12,597 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L828-2-->L828-4: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd0~0_In542650917 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In542650917 256)))) (or (and (= |ULTIMATE.start_main_#t~ite41_Out542650917| ~x$w_buff1~0_In542650917) (not .cse0) (not .cse1)) (and (= ~x~0_In542650917 |ULTIMATE.start_main_#t~ite41_Out542650917|) (or .cse1 .cse0)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In542650917, ~x$w_buff1_used~0=~x$w_buff1_used~0_In542650917, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In542650917, ~x~0=~x~0_In542650917} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out542650917|, ~x$w_buff1~0=~x$w_buff1~0_In542650917, ~x$w_buff1_used~0=~x$w_buff1_used~0_In542650917, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In542650917, ~x~0=~x~0_In542650917} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41] because there is no mapped edge [2019-12-07 18:01:12,597 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L828-4-->L829: Formula: (= v_~x~0_24 |v_ULTIMATE.start_main_#t~ite41_11|) InVars {ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_11|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_10|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_6|, ~x~0=v_~x~0_24} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite42, ~x~0] because there is no mapped edge [2019-12-07 18:01:12,597 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [743] [743] L829-->L829-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd0~0_In-922534939 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-922534939 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite43_Out-922534939|) (not .cse1)) (and (= ~x$w_buff0_used~0_In-922534939 |ULTIMATE.start_main_#t~ite43_Out-922534939|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-922534939, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-922534939} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-922534939, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out-922534939|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-922534939} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-12-07 18:01:12,597 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [747] [747] L830-->L830-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In85697320 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In85697320 256) 0)) (.cse3 (= (mod ~x$w_buff1_used~0_In85697320 256) 0)) (.cse2 (= (mod ~x$r_buff1_thd0~0_In85697320 256) 0))) (or (and (or .cse0 .cse1) (= ~x$w_buff1_used~0_In85697320 |ULTIMATE.start_main_#t~ite44_Out85697320|) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite44_Out85697320| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In85697320, ~x$w_buff1_used~0=~x$w_buff1_used~0_In85697320, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In85697320, ~x$w_buff0_used~0=~x$w_buff0_used~0_In85697320} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In85697320, ~x$w_buff1_used~0=~x$w_buff1_used~0_In85697320, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In85697320, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out85697320|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In85697320} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 18:01:12,598 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [750] [750] L831-->L831-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In1375124403 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In1375124403 256)))) (or (and (= |ULTIMATE.start_main_#t~ite45_Out1375124403| ~x$r_buff0_thd0~0_In1375124403) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite45_Out1375124403| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1375124403, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1375124403} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1375124403, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out1375124403|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1375124403} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 18:01:12,598 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L832-->L832-2: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff1_thd0~0_In-244986419 256))) (.cse3 (= (mod ~x$w_buff1_used~0_In-244986419 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-244986419 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-244986419 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite46_Out-244986419| ~x$r_buff1_thd0~0_In-244986419) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= |ULTIMATE.start_main_#t~ite46_Out-244986419| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-244986419, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-244986419, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-244986419, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-244986419} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-244986419, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out-244986419|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-244986419, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-244986419, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-244986419} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 18:01:12,598 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L832-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_25 (ite (= (ite (not (and (= v_~z~0_60 2) (= 1 v_~__unbuffered_p2_EAX~0_35) (= 0 v_~__unbuffered_p0_EAX~0_54))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 0) (= v_~x$r_buff1_thd0~0_277 |v_ULTIMATE.start_main_#t~ite46_60|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15| (mod v_~main$tmp_guard1~0_25 256))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_54, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_60|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_35, ~z~0=v_~z~0_60} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_54, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_22, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_59|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_35, ~z~0=v_~z~0_60, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_277, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ~x$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:01:12,641 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 06:01:12 BasicIcfg [2019-12-07 18:01:12,642 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 18:01:12,642 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 18:01:12,642 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 18:01:12,642 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 18:01:12,642 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:57:59" (3/4) ... [2019-12-07 18:01:12,644 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 18:01:12,644 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [807] [807] ULTIMATE.startENTRY-->L818: Formula: (let ((.cse0 (store |v_#valid_66| 0 0))) (and (= 0 v_~__unbuffered_cnt~0_95) (= 0 v_~x~0_240) (< |v_#StackHeapBarrier_16| |v_ULTIMATE.start_main_~#t2076~0.base_30|) (= v_~x$r_buff1_thd0~0_309 0) (= v_~weak$$choice2~0_201 0) (= 0 v_~x$w_buff1_used~0_624) (= 0 v_~x$r_buff1_thd2~0_264) (= v_~y~0_226 0) (= |v_#valid_64| (store .cse0 |v_ULTIMATE.start_main_~#t2076~0.base_30| 1)) (= v_~z~0_95 0) (< 0 |v_#StackHeapBarrier_16|) (= 0 v_~x$read_delayed_var~0.base_7) (= 0 v_~x$r_buff0_thd3~0_148) (= |v_ULTIMATE.start_main_~#t2076~0.offset_22| 0) (= 0 v_~x$w_buff1~0_328) (= 0 v_~x$r_buff0_thd2~0_323) (= v_~x$flush_delayed~0_62 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t2076~0.base_30|) 0) (= 0 v_~x$w_buff0_used~0_913) (= 0 |v_#NULL.base_4|) (= 0 v_~x$read_delayed~0_7) (= v_~x$r_buff0_thd1~0_362 0) (= 0 v_~weak$$choice0~0_37) (= v_~main$tmp_guard1~0_53 0) (= v_~main$tmp_guard0~0_42 0) (= 0 v_~__unbuffered_p0_EAX~0_85) (= 0 v_~__unbuffered_p2_EAX~0_68) (= |v_#NULL.offset_4| 0) (= 0 v_~x$read_delayed_var~0.offset_7) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t2076~0.base_30| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t2076~0.base_30|) |v_ULTIMATE.start_main_~#t2076~0.offset_22| 0)) |v_#memory_int_23|) (= 0 v_~x$r_buff1_thd3~0_267) (= v_~x$mem_tmp~0_40 0) (= v_~x$r_buff1_thd1~0_428 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t2076~0.base_30| 4)) (= 0 v_~x$w_buff0~0_403) (= v_~x$r_buff0_thd0~0_156 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_16|, #valid=|v_#valid_66|, #memory_int=|v_#memory_int_24|, #length=|v_#length_24|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_403, ~x$flush_delayed~0=v_~x$flush_delayed~0_62, #NULL.offset=|v_#NULL.offset_4|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_428, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_148, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_40|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_34|, ULTIMATE.start_main_~#t2078~0.base=|v_ULTIMATE.start_main_~#t2078~0.base_23|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_85, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_68, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_156, ~x$w_buff1~0=v_~x$w_buff1~0_328, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_624, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_264, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ~weak$$choice0~0=v_~weak$$choice0~0_37, #StackHeapBarrier=|v_#StackHeapBarrier_16|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_95, ~x~0=v_~x~0_240, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_362, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_114|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_267, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_53, ~x$mem_tmp~0=v_~x$mem_tmp~0_40, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_51|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_60|, ULTIMATE.start_main_~#t2078~0.offset=|v_ULTIMATE.start_main_~#t2078~0.offset_14|, ~y~0=v_~y~0_226, ULTIMATE.start_main_~#t2076~0.base=|v_ULTIMATE.start_main_~#t2076~0.base_30|, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_15|, ULTIMATE.start_main_~#t2077~0.base=|v_ULTIMATE.start_main_~#t2077~0.base_31|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_42, ULTIMATE.start_main_~#t2077~0.offset=|v_ULTIMATE.start_main_~#t2077~0.offset_22|, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_309, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_323, #NULL.base=|v_#NULL.base_4|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_913, ULTIMATE.start_main_~#t2076~0.offset=|v_ULTIMATE.start_main_~#t2076~0.offset_22|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_62|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_23|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_8|, ~z~0=v_~z~0_95, ~weak$$choice2~0=v_~weak$$choice2~0_201, ~x$read_delayed~0=v_~x$read_delayed~0_7} AuxVars[] AssignedVars[~x$w_buff0~0, ~x$r_buff0_thd1~0, ~x$flush_delayed~0, #NULL.offset, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~x$r_buff1_thd1~0, ~main$tmp_guard1~0, ~x$r_buff0_thd3~0, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t2078~0.base, ULTIMATE.start_main_#t~ite44, ~__unbuffered_p0_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t2078~0.offset, ~y~0, ULTIMATE.start_main_~#t2076~0.base, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~nondet40, ~x$w_buff1~0, ULTIMATE.start_main_~#t2077~0.base, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t2077~0.offset, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ~x$read_delayed_var~0.base, #NULL.base, ~x$w_buff0_used~0, ~weak$$choice0~0, ULTIMATE.start_main_~#t2076~0.offset, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_#t~nondet38, #memory_int, ~__unbuffered_cnt~0, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ~x~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 18:01:12,645 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L818-1-->L820: Formula: (and (= |v_ULTIMATE.start_main_~#t2077~0.offset_9| 0) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t2077~0.base_10| 4) |v_#length_15|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2077~0.base_10| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2077~0.base_10|) |v_ULTIMATE.start_main_~#t2077~0.offset_9| 1)) |v_#memory_int_15|) (not (= 0 |v_ULTIMATE.start_main_~#t2077~0.base_10|)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2077~0.base_10|) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t2077~0.base_10| 1)) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t2077~0.base_10|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t2077~0.base=|v_ULTIMATE.start_main_~#t2077~0.base_10|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_4|, #length=|v_#length_15|, ULTIMATE.start_main_~#t2077~0.offset=|v_ULTIMATE.start_main_~#t2077~0.offset_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2077~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length, ULTIMATE.start_main_~#t2077~0.offset] because there is no mapped edge [2019-12-07 18:01:12,645 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [675] [675] P1ENTRY-->L5-3: Formula: (and (= v_~x$w_buff0~0_21 v_~x$w_buff1~0_19) (= v_P1Thread1of1ForFork0_~arg.base_4 |v_P1Thread1of1ForFork0_#in~arg.base_6|) (= v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_6 |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_4|) (not (= 0 v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_6)) (= v_~x$w_buff1_used~0_52 v_~x$w_buff0_used~0_98) (= |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_4| (ite (not (and (not (= 0 (mod v_~x$w_buff0_used~0_97 256))) (not (= 0 (mod v_~x$w_buff1_used~0_52 256))))) 1 0)) (= v_P1Thread1of1ForFork0_~arg.offset_4 |v_P1Thread1of1ForFork0_#in~arg.offset_6|) (= 1 v_~x$w_buff0_used~0_97) (= 1 v_~x$w_buff0~0_20)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_21, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_6|, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_6|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_98} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_20, P1Thread1of1ForFork0___VERIFIER_assert_~expression=v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_6, P1Thread1of1ForFork0_~arg.offset=v_P1Thread1of1ForFork0_~arg.offset_4, P1Thread1of1ForFork0_~arg.base=v_P1Thread1of1ForFork0_~arg.base_4, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_6|, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_4|, ~x$w_buff1~0=v_~x$w_buff1~0_19, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_6|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_52, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_97} AuxVars[] AssignedVars[~x$w_buff0~0, P1Thread1of1ForFork0___VERIFIER_assert_~expression, P1Thread1of1ForFork0_~arg.offset, P1Thread1of1ForFork0_~arg.base, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 18:01:12,646 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L820-1-->L822: Formula: (and (= |v_ULTIMATE.start_main_~#t2078~0.offset_10| 0) (not (= |v_ULTIMATE.start_main_~#t2078~0.base_11| 0)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t2078~0.base_11|) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t2078~0.base_11| 4)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2078~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2078~0.base_11|) |v_ULTIMATE.start_main_~#t2078~0.offset_10| 2)) |v_#memory_int_13|) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t2078~0.base_11|)) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t2078~0.base_11| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_14|, #length=|v_#length_14|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t2078~0.offset=|v_ULTIMATE.start_main_~#t2078~0.offset_10|, #length=|v_#length_13|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_4|, ULTIMATE.start_main_~#t2078~0.base=|v_ULTIMATE.start_main_~#t2078~0.base_11|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_~#t2078~0.offset, #length, ULTIMATE.start_main_#t~nondet39, ULTIMATE.start_main_~#t2078~0.base] because there is no mapped edge [2019-12-07 18:01:12,646 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [753] [753] L795-2-->L795-4: Formula: (let ((.cse0 (= (mod ~x$r_buff1_thd3~0_In-791148359 256) 0)) (.cse1 (= (mod ~x$w_buff1_used~0_In-791148359 256) 0))) (or (and (= ~x~0_In-791148359 |P2Thread1of1ForFork1_#t~ite32_Out-791148359|) (or .cse0 .cse1)) (and (= ~x$w_buff1~0_In-791148359 |P2Thread1of1ForFork1_#t~ite32_Out-791148359|) (not .cse0) (not .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-791148359, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-791148359, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-791148359, ~x~0=~x~0_In-791148359} OutVars{P2Thread1of1ForFork1_#t~ite32=|P2Thread1of1ForFork1_#t~ite32_Out-791148359|, ~x$w_buff1~0=~x$w_buff1~0_In-791148359, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-791148359, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-791148359, ~x~0=~x~0_In-791148359} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32] because there is no mapped edge [2019-12-07 18:01:12,647 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [677] [677] L795-4-->L796: Formula: (= v_~x~0_21 |v_P2Thread1of1ForFork1_#t~ite32_8|) InVars {P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_8|} OutVars{P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_7|, P2Thread1of1ForFork1_#t~ite33=|v_P2Thread1of1ForFork1_#t~ite33_11|, ~x~0=v_~x~0_21} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32, P2Thread1of1ForFork1_#t~ite33, ~x~0] because there is no mapped edge [2019-12-07 18:01:12,647 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] L796-->L796-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd3~0_In1858809408 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1858809408 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In1858809408 |P2Thread1of1ForFork1_#t~ite34_Out1858809408|)) (and (not .cse1) (= 0 |P2Thread1of1ForFork1_#t~ite34_Out1858809408|) (not .cse0)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1858809408, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1858809408} OutVars{P2Thread1of1ForFork1_#t~ite34=|P2Thread1of1ForFork1_#t~ite34_Out1858809408|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1858809408, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1858809408} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-12-07 18:01:12,648 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [746] [746] L776-->L776-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In-482675587 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In-482675587 256) 0))) (or (and (not .cse0) (= |P1Thread1of1ForFork0_#t~ite28_Out-482675587| 0) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork0_#t~ite28_Out-482675587| ~x$w_buff0_used~0_In-482675587)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-482675587, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-482675587} OutVars{~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-482675587, P1Thread1of1ForFork0_#t~ite28=|P1Thread1of1ForFork0_#t~ite28_Out-482675587|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-482675587} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite28] because there is no mapped edge [2019-12-07 18:01:12,648 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [738] [738] L777-->L777-2: Formula: (let ((.cse3 (= (mod ~x$r_buff1_thd2~0_In-841867374 256) 0)) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In-841867374 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In-841867374 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd2~0_In-841867374 256) 0))) (or (and (= |P1Thread1of1ForFork0_#t~ite29_Out-841867374| ~x$w_buff1_used~0_In-841867374) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork0_#t~ite29_Out-841867374| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-841867374, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-841867374, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-841867374, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-841867374} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-841867374, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-841867374, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-841867374, P1Thread1of1ForFork0_#t~ite29=|P1Thread1of1ForFork0_#t~ite29_Out-841867374|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-841867374} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 18:01:12,648 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L778-->L779: Formula: (let ((.cse1 (= ~x$r_buff0_thd2~0_Out763618595 ~x$r_buff0_thd2~0_In763618595)) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In763618595 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In763618595 256)))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (= ~x$r_buff0_thd2~0_Out763618595 0) (not .cse2) (not .cse0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In763618595, ~x$w_buff0_used~0=~x$w_buff0_used~0_In763618595} OutVars{P1Thread1of1ForFork0_#t~ite30=|P1Thread1of1ForFork0_#t~ite30_Out763618595|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out763618595, ~x$w_buff0_used~0=~x$w_buff0_used~0_In763618595} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite30, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 18:01:12,648 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] L779-->L779-2: Formula: (let ((.cse2 (= (mod ~x$w_buff0_used~0_In-513326958 256) 0)) (.cse3 (= 0 (mod ~x$r_buff0_thd2~0_In-513326958 256))) (.cse1 (= (mod ~x$r_buff1_thd2~0_In-513326958 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In-513326958 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork0_#t~ite31_Out-513326958|)) (and (or .cse2 .cse3) (= |P1Thread1of1ForFork0_#t~ite31_Out-513326958| ~x$r_buff1_thd2~0_In-513326958) (or .cse1 .cse0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-513326958, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-513326958, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-513326958, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-513326958} OutVars{P1Thread1of1ForFork0_#t~ite31=|P1Thread1of1ForFork0_#t~ite31_Out-513326958|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-513326958, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-513326958, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-513326958, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-513326958} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 18:01:12,648 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L779-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_52 1) v_~__unbuffered_cnt~0_51) (= v_~x$r_buff1_thd2~0_46 |v_P1Thread1of1ForFork0_#t~ite31_28|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|)) InVars {P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_52} OutVars{P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_27|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_46, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_51, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 18:01:12,649 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L740-->L740-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In108298849 256)))) (or (and (= |P0Thread1of1ForFork2_#t~ite8_In108298849| |P0Thread1of1ForFork2_#t~ite8_Out108298849|) (= ~x$w_buff0~0_In108298849 |P0Thread1of1ForFork2_#t~ite9_Out108298849|) (not .cse0)) (and (let ((.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In108298849 256)))) (or (= (mod ~x$w_buff0_used~0_In108298849 256) 0) (and (= 0 (mod ~x$r_buff1_thd1~0_In108298849 256)) .cse1) (and (= 0 (mod ~x$w_buff1_used~0_In108298849 256)) .cse1))) (= ~x$w_buff0~0_In108298849 |P0Thread1of1ForFork2_#t~ite8_Out108298849|) (= |P0Thread1of1ForFork2_#t~ite9_Out108298849| |P0Thread1of1ForFork2_#t~ite8_Out108298849|) .cse0))) InVars {~x$w_buff0~0=~x$w_buff0~0_In108298849, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In108298849, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_In108298849|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In108298849, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In108298849, ~weak$$choice2~0=~weak$$choice2~0_In108298849, ~x$w_buff0_used~0=~x$w_buff0_used~0_In108298849} OutVars{~x$w_buff0~0=~x$w_buff0~0_In108298849, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In108298849, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_Out108298849|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In108298849, P0Thread1of1ForFork2_#t~ite9=|P0Thread1of1ForFork2_#t~ite9_Out108298849|, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In108298849, ~weak$$choice2~0=~weak$$choice2~0_In108298849, ~x$w_buff0_used~0=~x$w_buff0_used~0_In108298849} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite8, P0Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 18:01:12,650 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L797-->L797-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff1_used~0_In-167468437 256))) (.cse3 (= 0 (mod ~x$r_buff1_thd3~0_In-167468437 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In-167468437 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In-167468437 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork1_#t~ite35_Out-167468437| 0)) (and (= ~x$w_buff1_used~0_In-167468437 |P2Thread1of1ForFork1_#t~ite35_Out-167468437|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-167468437, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-167468437, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-167468437, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-167468437} OutVars{P2Thread1of1ForFork1_#t~ite35=|P2Thread1of1ForFork1_#t~ite35_Out-167468437|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-167468437, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-167468437, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-167468437, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-167468437} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite35] because there is no mapped edge [2019-12-07 18:01:12,650 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [744] [744] L798-->L798-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In149080008 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In149080008 256)))) (or (and (= ~x$r_buff0_thd3~0_In149080008 |P2Thread1of1ForFork1_#t~ite36_Out149080008|) (or .cse0 .cse1)) (and (not .cse0) (= |P2Thread1of1ForFork1_#t~ite36_Out149080008| 0) (not .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In149080008, ~x$w_buff0_used~0=~x$w_buff0_used~0_In149080008} OutVars{P2Thread1of1ForFork1_#t~ite36=|P2Thread1of1ForFork1_#t~ite36_Out149080008|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In149080008, ~x$w_buff0_used~0=~x$w_buff0_used~0_In149080008} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-12-07 18:01:12,651 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [748] [748] L799-->L799-2: Formula: (let ((.cse2 (= (mod ~x$w_buff1_used~0_In369661034 256) 0)) (.cse3 (= (mod ~x$r_buff1_thd3~0_In369661034 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd3~0_In369661034 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In369661034 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork1_#t~ite37_Out369661034| 0)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= |P2Thread1of1ForFork1_#t~ite37_Out369661034| ~x$r_buff1_thd3~0_In369661034)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In369661034, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In369661034, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In369661034, ~x$w_buff0_used~0=~x$w_buff0_used~0_In369661034} OutVars{P2Thread1of1ForFork1_#t~ite37=|P2Thread1of1ForFork1_#t~ite37_Out369661034|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In369661034, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In369661034, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In369661034, ~x$w_buff0_used~0=~x$w_buff0_used~0_In369661034} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-12-07 18:01:12,651 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L799-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|) (= v_~x$r_buff1_thd3~0_48 |v_P2Thread1of1ForFork1_#t~ite37_28|) (= (+ v_~__unbuffered_cnt~0_64 1) v_~__unbuffered_cnt~0_63)) InVars {P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_64} OutVars{P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_27|, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_48, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37, P2Thread1of1ForFork1_#res.base, ~x$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 18:01:12,652 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L743-->L743-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In532205848 256)))) (or (and (= |P0Thread1of1ForFork2_#t~ite17_Out532205848| ~x$w_buff1_used~0_In532205848) .cse0 (let ((.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In532205848 256)))) (or (= 0 (mod ~x$w_buff0_used~0_In532205848 256)) (and (= (mod ~x$w_buff1_used~0_In532205848 256) 0) .cse1) (and (= (mod ~x$r_buff1_thd1~0_In532205848 256) 0) .cse1))) (= |P0Thread1of1ForFork2_#t~ite18_Out532205848| |P0Thread1of1ForFork2_#t~ite17_Out532205848|)) (and (= |P0Thread1of1ForFork2_#t~ite17_In532205848| |P0Thread1of1ForFork2_#t~ite17_Out532205848|) (not .cse0) (= |P0Thread1of1ForFork2_#t~ite18_Out532205848| ~x$w_buff1_used~0_In532205848)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In532205848, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_In532205848|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In532205848, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In532205848, ~weak$$choice2~0=~weak$$choice2~0_In532205848, ~x$w_buff0_used~0=~x$w_buff0_used~0_In532205848} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In532205848, P0Thread1of1ForFork2_#t~ite18=|P0Thread1of1ForFork2_#t~ite18_Out532205848|, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_Out532205848|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In532205848, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In532205848, ~weak$$choice2~0=~weak$$choice2~0_In532205848, ~x$w_buff0_used~0=~x$w_buff0_used~0_In532205848} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite18, P0Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 18:01:12,652 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [730] [730] L744-->L745: Formula: (and (= v_~x$r_buff0_thd1~0_101 v_~x$r_buff0_thd1~0_100) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_101, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{P0Thread1of1ForFork2_#t~ite20=|v_P0Thread1of1ForFork2_#t~ite20_9|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_100, P0Thread1of1ForFork2_#t~ite19=|v_P0Thread1of1ForFork2_#t~ite19_6|, ~weak$$choice2~0=v_~weak$$choice2~0_39, P0Thread1of1ForFork2_#t~ite21=|v_P0Thread1of1ForFork2_#t~ite21_7|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite20, ~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite19, P0Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 18:01:12,652 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L745-->L745-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-557718895 256)))) (or (and (= |P0Thread1of1ForFork2_#t~ite23_In-557718895| |P0Thread1of1ForFork2_#t~ite23_Out-557718895|) (= |P0Thread1of1ForFork2_#t~ite24_Out-557718895| ~x$r_buff1_thd1~0_In-557718895) (not .cse0)) (and (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In-557718895 256) 0))) (or (and (= (mod ~x$w_buff1_used~0_In-557718895 256) 0) .cse1) (and (= 0 (mod ~x$r_buff1_thd1~0_In-557718895 256)) .cse1) (= 0 (mod ~x$w_buff0_used~0_In-557718895 256)))) (= ~x$r_buff1_thd1~0_In-557718895 |P0Thread1of1ForFork2_#t~ite23_Out-557718895|) (= |P0Thread1of1ForFork2_#t~ite24_Out-557718895| |P0Thread1of1ForFork2_#t~ite23_Out-557718895|) .cse0))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-557718895, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-557718895, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-557718895, ~weak$$choice2~0=~weak$$choice2~0_In-557718895, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_In-557718895|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-557718895} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-557718895, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-557718895, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-557718895, P0Thread1of1ForFork2_#t~ite24=|P0Thread1of1ForFork2_#t~ite24_Out-557718895|, ~weak$$choice2~0=~weak$$choice2~0_In-557718895, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_Out-557718895|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-557718895} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite24, P0Thread1of1ForFork2_#t~ite23] because there is no mapped edge [2019-12-07 18:01:12,652 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [704] [704] L747-->L755: Formula: (and (= v_~x$flush_delayed~0_17 0) (not (= (mod v_~x$flush_delayed~0_18 256) 0)) (= v_~x~0_34 v_~x$mem_tmp~0_10) (= v_~__unbuffered_cnt~0_30 (+ v_~__unbuffered_cnt~0_31 1))) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_18, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_31, ~x$mem_tmp~0=v_~x$mem_tmp~0_10} OutVars{P0Thread1of1ForFork2_#t~ite25=|v_P0Thread1of1ForFork2_#t~ite25_13|, ~x$flush_delayed~0=v_~x$flush_delayed~0_17, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_30, ~x$mem_tmp~0=v_~x$mem_tmp~0_10, ~x~0=v_~x~0_34} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite25, ~x$flush_delayed~0, ~__unbuffered_cnt~0, ~x~0] because there is no mapped edge [2019-12-07 18:01:12,653 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [699] [699] L826-->L828-2: Formula: (and (or (= 0 (mod v_~x$w_buff0_used~0_158 256)) (= 0 (mod v_~x$r_buff0_thd0~0_26 256))) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_26, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_158} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_26, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_158} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 18:01:12,653 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L828-2-->L828-4: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd0~0_In542650917 256) 0)) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In542650917 256)))) (or (and (= |ULTIMATE.start_main_#t~ite41_Out542650917| ~x$w_buff1~0_In542650917) (not .cse0) (not .cse1)) (and (= ~x~0_In542650917 |ULTIMATE.start_main_#t~ite41_Out542650917|) (or .cse1 .cse0)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In542650917, ~x$w_buff1_used~0=~x$w_buff1_used~0_In542650917, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In542650917, ~x~0=~x~0_In542650917} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out542650917|, ~x$w_buff1~0=~x$w_buff1~0_In542650917, ~x$w_buff1_used~0=~x$w_buff1_used~0_In542650917, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In542650917, ~x~0=~x~0_In542650917} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41] because there is no mapped edge [2019-12-07 18:01:12,653 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L828-4-->L829: Formula: (= v_~x~0_24 |v_ULTIMATE.start_main_#t~ite41_11|) InVars {ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_11|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_10|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_6|, ~x~0=v_~x~0_24} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite42, ~x~0] because there is no mapped edge [2019-12-07 18:01:12,653 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [743] [743] L829-->L829-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd0~0_In-922534939 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-922534939 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite43_Out-922534939|) (not .cse1)) (and (= ~x$w_buff0_used~0_In-922534939 |ULTIMATE.start_main_#t~ite43_Out-922534939|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-922534939, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-922534939} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-922534939, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out-922534939|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-922534939} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-12-07 18:01:12,653 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [747] [747] L830-->L830-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In85697320 256) 0)) (.cse0 (= (mod ~x$w_buff0_used~0_In85697320 256) 0)) (.cse3 (= (mod ~x$w_buff1_used~0_In85697320 256) 0)) (.cse2 (= (mod ~x$r_buff1_thd0~0_In85697320 256) 0))) (or (and (or .cse0 .cse1) (= ~x$w_buff1_used~0_In85697320 |ULTIMATE.start_main_#t~ite44_Out85697320|) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite44_Out85697320| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In85697320, ~x$w_buff1_used~0=~x$w_buff1_used~0_In85697320, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In85697320, ~x$w_buff0_used~0=~x$w_buff0_used~0_In85697320} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In85697320, ~x$w_buff1_used~0=~x$w_buff1_used~0_In85697320, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In85697320, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out85697320|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In85697320} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 18:01:12,654 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [750] [750] L831-->L831-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In1375124403 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In1375124403 256)))) (or (and (= |ULTIMATE.start_main_#t~ite45_Out1375124403| ~x$r_buff0_thd0~0_In1375124403) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite45_Out1375124403| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1375124403, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1375124403} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1375124403, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out1375124403|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1375124403} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 18:01:12,654 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L832-->L832-2: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff1_thd0~0_In-244986419 256))) (.cse3 (= (mod ~x$w_buff1_used~0_In-244986419 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-244986419 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-244986419 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite46_Out-244986419| ~x$r_buff1_thd0~0_In-244986419) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= |ULTIMATE.start_main_#t~ite46_Out-244986419| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-244986419, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-244986419, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-244986419, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-244986419} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-244986419, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out-244986419|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-244986419, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-244986419, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-244986419} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 18:01:12,654 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L832-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_25 (ite (= (ite (not (and (= v_~z~0_60 2) (= 1 v_~__unbuffered_p2_EAX~0_35) (= 0 v_~__unbuffered_p0_EAX~0_54))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 0) (= v_~x$r_buff1_thd0~0_277 |v_ULTIMATE.start_main_#t~ite46_60|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15| (mod v_~main$tmp_guard1~0_25 256))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_54, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_60|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_35, ~z~0=v_~z~0_60} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_54, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_22, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_59|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_35, ~z~0=v_~z~0_60, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_277, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ~x$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:01:12,700 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_95986427-81d5-43f6-a7c9-7a82a57479b1/bin/uautomizer/witness.graphml [2019-12-07 18:01:12,700 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 18:01:12,701 INFO L168 Benchmark]: Toolchain (without parser) took 193874.60 ms. Allocated memory was 1.0 GB in the beginning and 7.5 GB in the end (delta: 6.5 GB). Free memory was 937.2 MB in the beginning and 6.7 GB in the end (delta: -5.8 GB). Peak memory consumption was 704.4 MB. Max. memory is 11.5 GB. [2019-12-07 18:01:12,701 INFO L168 Benchmark]: CDTParser took 0.22 ms. Allocated memory is still 1.0 GB. Free memory is still 958.7 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:01:12,701 INFO L168 Benchmark]: CACSL2BoogieTranslator took 393.39 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 107.0 MB). Free memory was 937.2 MB in the beginning and 1.1 GB in the end (delta: -136.3 MB). Peak memory consumption was 18.8 MB. Max. memory is 11.5 GB. [2019-12-07 18:01:12,702 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.85 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 18:01:12,702 INFO L168 Benchmark]: Boogie Preprocessor took 25.04 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:01:12,702 INFO L168 Benchmark]: RCFGBuilder took 392.80 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.4 MB). Peak memory consumption was 55.4 MB. Max. memory is 11.5 GB. [2019-12-07 18:01:12,702 INFO L168 Benchmark]: TraceAbstraction took 192965.33 ms. Allocated memory was 1.1 GB in the beginning and 7.5 GB in the end (delta: 6.4 GB). Free memory was 1.0 GB in the beginning and 6.8 GB in the end (delta: -5.8 GB). Peak memory consumption was 634.4 MB. Max. memory is 11.5 GB. [2019-12-07 18:01:12,703 INFO L168 Benchmark]: Witness Printer took 58.05 ms. Allocated memory is still 7.5 GB. Free memory was 6.8 GB in the beginning and 6.7 GB in the end (delta: 38.6 MB). Peak memory consumption was 38.6 MB. Max. memory is 11.5 GB. [2019-12-07 18:01:12,704 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.22 ms. Allocated memory is still 1.0 GB. Free memory is still 958.7 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 393.39 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 107.0 MB). Free memory was 937.2 MB in the beginning and 1.1 GB in the end (delta: -136.3 MB). Peak memory consumption was 18.8 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.85 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.04 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 392.80 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.4 MB). Peak memory consumption was 55.4 MB. Max. memory is 11.5 GB. * TraceAbstraction took 192965.33 ms. Allocated memory was 1.1 GB in the beginning and 7.5 GB in the end (delta: 6.4 GB). Free memory was 1.0 GB in the beginning and 6.8 GB in the end (delta: -5.8 GB). Peak memory consumption was 634.4 MB. Max. memory is 11.5 GB. * Witness Printer took 58.05 ms. Allocated memory is still 7.5 GB. Free memory was 6.8 GB in the beginning and 6.7 GB in the end (delta: 38.6 MB). Peak memory consumption was 38.6 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 163 ProgramPointsBefore, 83 ProgramPointsAfterwards, 194 TransitionsBefore, 92 TransitionsAfterwards, 16696 CoEnabledTransitionPairs, 7 FixpointIterations, 32 TrivialSequentialCompositions, 45 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 35 ConcurrentYvCompositions, 26 ChoiceCompositions, 6709 VarBasedMoverChecksPositive, 292 VarBasedMoverChecksNegative, 116 SemBasedMoverChecksPositive, 259 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 66094 CheckedPairsTotal, 112 TotalNumberOfCompositions - CounterExampleResult [Line: 5]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L818] FCALL, FORK 0 pthread_create(&t2076, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L820] FCALL, FORK 0 pthread_create(&t2077, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L765] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L766] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L767] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L768] 2 x$r_buff1_thd3 = x$r_buff0_thd3 [L769] 2 x$r_buff0_thd2 = (_Bool)1 [L772] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L775] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L822] FCALL, FORK 0 pthread_create(&t2078, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L789] 3 __unbuffered_p2_EAX = y [L792] 3 z = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L795] 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L775] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L730] 1 z = 2 [L735] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L736] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L737] 1 x$flush_delayed = weak$$choice2 [L738] 1 x$mem_tmp = x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L739] EXPR 1 !x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1) VAL [!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L776] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L777] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L739] 1 x = !x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1) [L740] 1 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff0)) [L741] EXPR 1 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1))=0, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L741] 1 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1)) [L796] 3 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used [L797] 3 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used [L798] 3 x$r_buff0_thd3 = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$r_buff0_thd3 [L742] EXPR 1 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used))=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L742] 1 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used)) [L743] 1 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L745] 1 x$r_buff1_thd1 = weak$$choice2 ? x$r_buff1_thd1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$r_buff1_thd1 : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L746] 1 __unbuffered_p0_EAX = x VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L824] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [\result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L829] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L830] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L831] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 154 locations, 2 error locations. Result: UNSAFE, OverallTime: 192.8s, OverallIterations: 35, TraceHistogramMax: 1, AutomataDifference: 45.6s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 5348 SDtfs, 8981 SDslu, 17859 SDs, 0 SdLazy, 15701 SolverSat, 539 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 12.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 500 GetRequests, 45 SyntacticMatches, 25 SemanticMatches, 430 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3471 ImplicationChecksByTransitivity, 4.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=267700occurred in iteration=10, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 130.8s AutomataMinimizationTime, 34 MinimizatonAttempts, 432594 StatesRemovedByMinimization, 31 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 2.3s InterpolantComputationTime, 1290 NumberOfCodeBlocks, 1290 NumberOfCodeBlocksAsserted, 35 NumberOfCheckSat, 1200 ConstructedInterpolants, 0 QuantifiedInterpolants, 286507 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 34 InterpolantComputations, 34 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...