./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe013_pso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_51699a68-6f37-48dd-9cf3-f9f1fb3a0790/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_51699a68-6f37-48dd-9cf3-f9f1fb3a0790/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_51699a68-6f37-48dd-9cf3-f9f1fb3a0790/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_51699a68-6f37-48dd-9cf3-f9f1fb3a0790/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe013_pso.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_51699a68-6f37-48dd-9cf3-f9f1fb3a0790/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_51699a68-6f37-48dd-9cf3-f9f1fb3a0790/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash c28891fb4dec89aa773bc7044696014c56706240 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 18:14:01,030 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 18:14:01,032 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 18:14:01,039 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 18:14:01,039 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 18:14:01,040 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 18:14:01,041 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 18:14:01,042 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 18:14:01,043 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 18:14:01,044 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 18:14:01,044 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 18:14:01,045 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 18:14:01,045 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 18:14:01,046 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 18:14:01,047 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 18:14:01,048 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 18:14:01,048 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 18:14:01,049 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 18:14:01,050 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 18:14:01,052 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 18:14:01,053 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 18:14:01,053 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 18:14:01,054 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 18:14:01,054 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 18:14:01,056 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 18:14:01,056 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 18:14:01,057 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 18:14:01,057 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 18:14:01,057 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 18:14:01,058 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 18:14:01,058 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 18:14:01,058 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 18:14:01,059 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 18:14:01,059 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 18:14:01,060 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 18:14:01,060 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 18:14:01,060 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 18:14:01,061 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 18:14:01,061 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 18:14:01,061 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 18:14:01,062 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 18:14:01,062 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_51699a68-6f37-48dd-9cf3-f9f1fb3a0790/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 18:14:01,072 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 18:14:01,072 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 18:14:01,072 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 18:14:01,073 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 18:14:01,073 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 18:14:01,073 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 18:14:01,073 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 18:14:01,073 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 18:14:01,073 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 18:14:01,073 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 18:14:01,073 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 18:14:01,074 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 18:14:01,074 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 18:14:01,074 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 18:14:01,074 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 18:14:01,074 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 18:14:01,074 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 18:14:01,074 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 18:14:01,075 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 18:14:01,075 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 18:14:01,075 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 18:14:01,075 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:14:01,075 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 18:14:01,075 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 18:14:01,075 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 18:14:01,075 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 18:14:01,076 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 18:14:01,076 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 18:14:01,076 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 18:14:01,076 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_51699a68-6f37-48dd-9cf3-f9f1fb3a0790/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> c28891fb4dec89aa773bc7044696014c56706240 [2019-12-07 18:14:01,174 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 18:14:01,181 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 18:14:01,184 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 18:14:01,185 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 18:14:01,185 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 18:14:01,185 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_51699a68-6f37-48dd-9cf3-f9f1fb3a0790/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe013_pso.opt.i [2019-12-07 18:14:01,222 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_51699a68-6f37-48dd-9cf3-f9f1fb3a0790/bin/uautomizer/data/187f7c03a/b0e7c2b46d7440c5899588f54803b9a3/FLAG999f2a3b5 [2019-12-07 18:14:01,596 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 18:14:01,597 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_51699a68-6f37-48dd-9cf3-f9f1fb3a0790/sv-benchmarks/c/pthread-wmm/safe013_pso.opt.i [2019-12-07 18:14:01,610 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_51699a68-6f37-48dd-9cf3-f9f1fb3a0790/bin/uautomizer/data/187f7c03a/b0e7c2b46d7440c5899588f54803b9a3/FLAG999f2a3b5 [2019-12-07 18:14:01,619 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_51699a68-6f37-48dd-9cf3-f9f1fb3a0790/bin/uautomizer/data/187f7c03a/b0e7c2b46d7440c5899588f54803b9a3 [2019-12-07 18:14:01,621 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 18:14:01,622 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 18:14:01,623 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 18:14:01,623 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 18:14:01,626 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 18:14:01,626 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:14:01" (1/1) ... [2019-12-07 18:14:01,628 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5bd1e142 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:14:01, skipping insertion in model container [2019-12-07 18:14:01,628 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:14:01" (1/1) ... [2019-12-07 18:14:01,633 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 18:14:01,668 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 18:14:01,947 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:14:01,955 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 18:14:01,993 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:14:02,037 INFO L208 MainTranslator]: Completed translation [2019-12-07 18:14:02,038 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:14:02 WrapperNode [2019-12-07 18:14:02,038 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 18:14:02,038 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 18:14:02,039 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 18:14:02,039 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 18:14:02,044 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:14:02" (1/1) ... [2019-12-07 18:14:02,056 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:14:02" (1/1) ... [2019-12-07 18:14:02,074 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 18:14:02,074 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 18:14:02,074 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 18:14:02,074 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 18:14:02,080 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:14:02" (1/1) ... [2019-12-07 18:14:02,081 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:14:02" (1/1) ... [2019-12-07 18:14:02,083 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:14:02" (1/1) ... [2019-12-07 18:14:02,084 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:14:02" (1/1) ... [2019-12-07 18:14:02,091 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:14:02" (1/1) ... [2019-12-07 18:14:02,093 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:14:02" (1/1) ... [2019-12-07 18:14:02,096 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:14:02" (1/1) ... [2019-12-07 18:14:02,099 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 18:14:02,099 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 18:14:02,099 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 18:14:02,099 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 18:14:02,100 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:14:02" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_51699a68-6f37-48dd-9cf3-f9f1fb3a0790/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:14:02,139 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 18:14:02,139 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 18:14:02,139 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 18:14:02,139 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 18:14:02,139 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 18:14:02,139 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 18:14:02,139 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 18:14:02,140 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 18:14:02,140 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 18:14:02,140 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 18:14:02,140 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 18:14:02,140 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 18:14:02,140 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 18:14:02,141 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 18:14:02,493 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 18:14:02,493 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 18:14:02,494 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:14:02 BoogieIcfgContainer [2019-12-07 18:14:02,494 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 18:14:02,495 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 18:14:02,495 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 18:14:02,497 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 18:14:02,497 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 06:14:01" (1/3) ... [2019-12-07 18:14:02,498 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4aa1d4a1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:14:02, skipping insertion in model container [2019-12-07 18:14:02,498 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:14:02" (2/3) ... [2019-12-07 18:14:02,498 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4aa1d4a1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:14:02, skipping insertion in model container [2019-12-07 18:14:02,498 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:14:02" (3/3) ... [2019-12-07 18:14:02,500 INFO L109 eAbstractionObserver]: Analyzing ICFG safe013_pso.opt.i [2019-12-07 18:14:02,507 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 18:14:02,507 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 18:14:02,512 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 18:14:02,513 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 18:14:02,539 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,539 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,540 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,540 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,540 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,540 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,540 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,540 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,540 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,541 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,541 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,541 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,541 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,541 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,541 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,541 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,542 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,542 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,542 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,542 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,542 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,542 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,543 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,543 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,543 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,543 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,543 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,544 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,544 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,544 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,544 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,544 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,545 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,545 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,545 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,545 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,545 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,545 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,546 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,546 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,546 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,546 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,546 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,546 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,547 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,547 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,547 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,547 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,547 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,548 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,548 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,548 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,548 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,548 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,548 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,549 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,549 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,549 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,549 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,549 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,549 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,549 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,549 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,550 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,550 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,550 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,550 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,550 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,550 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,550 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,550 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,551 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,551 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,551 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,551 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,551 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,551 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,551 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,551 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,551 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,552 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,552 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,552 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,552 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,552 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,552 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,552 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,553 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,553 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,553 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,553 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,553 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,553 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,553 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,554 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,554 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,554 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,554 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,555 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,555 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,555 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,555 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,555 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,556 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,556 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,556 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,556 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,556 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,556 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,557 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,557 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,557 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,557 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,557 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,557 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,557 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,558 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,558 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,558 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,558 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,558 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,558 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,558 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,558 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,558 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,558 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,559 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,559 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,559 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,559 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,559 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,559 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,559 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,559 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,560 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,560 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,560 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,560 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,560 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,560 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,560 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,560 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,560 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,560 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,561 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,561 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,561 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,561 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,561 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,561 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,561 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,561 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,562 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,562 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,562 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,562 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,562 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,562 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:14:02,576 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 18:14:02,590 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 18:14:02,590 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 18:14:02,590 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 18:14:02,590 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 18:14:02,590 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 18:14:02,590 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 18:14:02,591 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 18:14:02,591 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 18:14:02,601 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 163 places, 194 transitions [2019-12-07 18:14:02,602 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 163 places, 194 transitions [2019-12-07 18:14:02,663 INFO L134 PetriNetUnfolder]: 41/191 cut-off events. [2019-12-07 18:14:02,664 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:14:02,676 INFO L76 FinitePrefix]: Finished finitePrefix Result has 201 conditions, 191 events. 41/191 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 721 event pairs. 9/157 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 18:14:02,694 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 163 places, 194 transitions [2019-12-07 18:14:02,732 INFO L134 PetriNetUnfolder]: 41/191 cut-off events. [2019-12-07 18:14:02,732 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:14:02,739 INFO L76 FinitePrefix]: Finished finitePrefix Result has 201 conditions, 191 events. 41/191 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 721 event pairs. 9/157 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 18:14:02,756 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 16696 [2019-12-07 18:14:02,757 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 18:14:05,706 WARN L192 SmtUtils]: Spent 145.00 ms on a formula simplification. DAG size of input: 89 DAG size of output: 87 [2019-12-07 18:14:05,844 INFO L206 etLargeBlockEncoding]: Checked pairs total: 66094 [2019-12-07 18:14:05,845 INFO L214 etLargeBlockEncoding]: Total number of compositions: 112 [2019-12-07 18:14:05,847 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 83 places, 92 transitions [2019-12-07 18:14:15,277 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 86132 states. [2019-12-07 18:14:15,279 INFO L276 IsEmpty]: Start isEmpty. Operand 86132 states. [2019-12-07 18:14:15,283 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-07 18:14:15,283 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:14:15,284 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-07 18:14:15,284 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:14:15,288 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:14:15,288 INFO L82 PathProgramCache]: Analyzing trace with hash 794637732, now seen corresponding path program 1 times [2019-12-07 18:14:15,293 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:14:15,293 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1065170033] [2019-12-07 18:14:15,293 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:14:15,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:14:15,433 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:14:15,434 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1065170033] [2019-12-07 18:14:15,434 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:14:15,434 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:14:15,435 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [471096992] [2019-12-07 18:14:15,438 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:14:15,438 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:14:15,446 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:14:15,447 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:14:15,448 INFO L87 Difference]: Start difference. First operand 86132 states. Second operand 3 states. [2019-12-07 18:14:16,153 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:14:16,153 INFO L93 Difference]: Finished difference Result 85012 states and 367904 transitions. [2019-12-07 18:14:16,154 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:14:16,154 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-07 18:14:16,155 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:14:16,544 INFO L225 Difference]: With dead ends: 85012 [2019-12-07 18:14:16,544 INFO L226 Difference]: Without dead ends: 80140 [2019-12-07 18:14:16,545 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:14:19,450 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80140 states. [2019-12-07 18:14:20,637 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80140 to 80140. [2019-12-07 18:14:20,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80140 states. [2019-12-07 18:14:20,942 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80140 states to 80140 states and 346330 transitions. [2019-12-07 18:14:20,943 INFO L78 Accepts]: Start accepts. Automaton has 80140 states and 346330 transitions. Word has length 5 [2019-12-07 18:14:20,943 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:14:20,943 INFO L462 AbstractCegarLoop]: Abstraction has 80140 states and 346330 transitions. [2019-12-07 18:14:20,943 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:14:20,944 INFO L276 IsEmpty]: Start isEmpty. Operand 80140 states and 346330 transitions. [2019-12-07 18:14:20,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 18:14:20,953 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:14:20,953 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:14:20,953 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:14:20,953 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:14:20,954 INFO L82 PathProgramCache]: Analyzing trace with hash -1795694344, now seen corresponding path program 1 times [2019-12-07 18:14:20,954 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:14:20,954 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1901323655] [2019-12-07 18:14:20,954 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:14:20,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:14:21,024 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:14:21,024 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1901323655] [2019-12-07 18:14:21,024 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:14:21,024 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:14:21,025 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1749606635] [2019-12-07 18:14:21,026 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:14:21,026 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:14:21,026 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:14:21,026 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:14:21,027 INFO L87 Difference]: Start difference. First operand 80140 states and 346330 transitions. Second operand 4 states. [2019-12-07 18:14:22,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:14:22,964 INFO L93 Difference]: Finished difference Result 123388 states and 510822 transitions. [2019-12-07 18:14:22,965 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:14:22,965 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 18:14:22,965 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:14:23,313 INFO L225 Difference]: With dead ends: 123388 [2019-12-07 18:14:23,313 INFO L226 Difference]: Without dead ends: 123290 [2019-12-07 18:14:23,314 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:14:26,662 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123290 states. [2019-12-07 18:14:28,327 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123290 to 114218. [2019-12-07 18:14:28,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114218 states. [2019-12-07 18:14:28,647 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114218 states to 114218 states and 477794 transitions. [2019-12-07 18:14:28,647 INFO L78 Accepts]: Start accepts. Automaton has 114218 states and 477794 transitions. Word has length 13 [2019-12-07 18:14:28,648 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:14:28,648 INFO L462 AbstractCegarLoop]: Abstraction has 114218 states and 477794 transitions. [2019-12-07 18:14:28,648 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:14:28,648 INFO L276 IsEmpty]: Start isEmpty. Operand 114218 states and 477794 transitions. [2019-12-07 18:14:28,651 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 18:14:28,651 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:14:28,651 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:14:28,651 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:14:28,651 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:14:28,651 INFO L82 PathProgramCache]: Analyzing trace with hash -1307118492, now seen corresponding path program 1 times [2019-12-07 18:14:28,651 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:14:28,651 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [93750492] [2019-12-07 18:14:28,652 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:14:28,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:14:28,704 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:14:28,704 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [93750492] [2019-12-07 18:14:28,704 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:14:28,704 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:14:28,705 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [455642534] [2019-12-07 18:14:28,705 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:14:28,705 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:14:28,705 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:14:28,706 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:14:28,706 INFO L87 Difference]: Start difference. First operand 114218 states and 477794 transitions. Second operand 4 states. [2019-12-07 18:14:29,840 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:14:29,840 INFO L93 Difference]: Finished difference Result 159677 states and 652290 transitions. [2019-12-07 18:14:29,841 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:14:29,841 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 18:14:29,841 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:14:30,237 INFO L225 Difference]: With dead ends: 159677 [2019-12-07 18:14:30,237 INFO L226 Difference]: Without dead ends: 159565 [2019-12-07 18:14:30,237 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:14:35,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159565 states. [2019-12-07 18:14:37,689 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159565 to 136035. [2019-12-07 18:14:37,689 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136035 states. [2019-12-07 18:14:38,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136035 states to 136035 states and 564894 transitions. [2019-12-07 18:14:38,072 INFO L78 Accepts]: Start accepts. Automaton has 136035 states and 564894 transitions. Word has length 13 [2019-12-07 18:14:38,072 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:14:38,072 INFO L462 AbstractCegarLoop]: Abstraction has 136035 states and 564894 transitions. [2019-12-07 18:14:38,072 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:14:38,072 INFO L276 IsEmpty]: Start isEmpty. Operand 136035 states and 564894 transitions. [2019-12-07 18:14:38,075 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 18:14:38,075 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:14:38,075 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:14:38,075 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:14:38,075 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:14:38,076 INFO L82 PathProgramCache]: Analyzing trace with hash 2137171342, now seen corresponding path program 1 times [2019-12-07 18:14:38,076 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:14:38,076 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1368680829] [2019-12-07 18:14:38,076 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:14:38,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:14:38,105 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:14:38,105 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1368680829] [2019-12-07 18:14:38,105 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:14:38,105 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:14:38,106 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1302126856] [2019-12-07 18:14:38,106 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:14:38,106 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:14:38,106 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:14:38,106 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:14:38,106 INFO L87 Difference]: Start difference. First operand 136035 states and 564894 transitions. Second operand 3 states. [2019-12-07 18:14:38,886 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:14:38,886 INFO L93 Difference]: Finished difference Result 181618 states and 742473 transitions. [2019-12-07 18:14:38,887 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:14:38,887 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 14 [2019-12-07 18:14:38,887 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:14:39,355 INFO L225 Difference]: With dead ends: 181618 [2019-12-07 18:14:39,356 INFO L226 Difference]: Without dead ends: 181618 [2019-12-07 18:14:39,356 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:14:43,718 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181618 states. [2019-12-07 18:14:47,758 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181618 to 152081. [2019-12-07 18:14:47,759 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152081 states. [2019-12-07 18:14:48,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152081 states to 152081 states and 628919 transitions. [2019-12-07 18:14:48,202 INFO L78 Accepts]: Start accepts. Automaton has 152081 states and 628919 transitions. Word has length 14 [2019-12-07 18:14:48,202 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:14:48,202 INFO L462 AbstractCegarLoop]: Abstraction has 152081 states and 628919 transitions. [2019-12-07 18:14:48,203 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:14:48,203 INFO L276 IsEmpty]: Start isEmpty. Operand 152081 states and 628919 transitions. [2019-12-07 18:14:48,205 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 18:14:48,205 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:14:48,206 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:14:48,206 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:14:48,206 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:14:48,206 INFO L82 PathProgramCache]: Analyzing trace with hash 2137037670, now seen corresponding path program 1 times [2019-12-07 18:14:48,206 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:14:48,206 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [434667643] [2019-12-07 18:14:48,206 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:14:48,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:14:48,238 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:14:48,239 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [434667643] [2019-12-07 18:14:48,239 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:14:48,239 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:14:48,239 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [290895948] [2019-12-07 18:14:48,239 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:14:48,239 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:14:48,239 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:14:48,239 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:14:48,240 INFO L87 Difference]: Start difference. First operand 152081 states and 628919 transitions. Second operand 4 states. [2019-12-07 18:14:49,118 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:14:49,118 INFO L93 Difference]: Finished difference Result 179622 states and 732719 transitions. [2019-12-07 18:14:49,119 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:14:49,119 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-12-07 18:14:49,119 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:14:49,988 INFO L225 Difference]: With dead ends: 179622 [2019-12-07 18:14:49,989 INFO L226 Difference]: Without dead ends: 179542 [2019-12-07 18:14:49,989 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:14:53,998 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179542 states. [2019-12-07 18:14:56,482 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179542 to 157787. [2019-12-07 18:14:56,483 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157787 states. [2019-12-07 18:14:56,946 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157787 states to 157787 states and 651479 transitions. [2019-12-07 18:14:56,946 INFO L78 Accepts]: Start accepts. Automaton has 157787 states and 651479 transitions. Word has length 14 [2019-12-07 18:14:56,947 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:14:56,947 INFO L462 AbstractCegarLoop]: Abstraction has 157787 states and 651479 transitions. [2019-12-07 18:14:56,947 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:14:56,947 INFO L276 IsEmpty]: Start isEmpty. Operand 157787 states and 651479 transitions. [2019-12-07 18:14:56,950 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 18:14:56,950 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:14:56,950 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:14:56,950 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:14:56,950 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:14:56,950 INFO L82 PathProgramCache]: Analyzing trace with hash -1997758702, now seen corresponding path program 1 times [2019-12-07 18:14:56,950 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:14:56,950 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [217892871] [2019-12-07 18:14:56,951 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:14:56,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:14:56,981 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:14:56,982 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [217892871] [2019-12-07 18:14:56,982 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:14:56,982 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:14:56,982 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1944383039] [2019-12-07 18:14:56,982 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:14:56,982 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:14:56,983 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:14:56,983 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:14:56,983 INFO L87 Difference]: Start difference. First operand 157787 states and 651479 transitions. Second operand 4 states. [2019-12-07 18:14:57,887 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:14:57,887 INFO L93 Difference]: Finished difference Result 189091 states and 772001 transitions. [2019-12-07 18:14:57,888 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:14:57,888 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-12-07 18:14:57,888 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:14:58,370 INFO L225 Difference]: With dead ends: 189091 [2019-12-07 18:14:58,370 INFO L226 Difference]: Without dead ends: 188995 [2019-12-07 18:14:58,370 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:15:02,885 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188995 states. [2019-12-07 18:15:07,524 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188995 to 161868. [2019-12-07 18:15:07,524 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161868 states. [2019-12-07 18:15:07,996 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161868 states to 161868 states and 668265 transitions. [2019-12-07 18:15:07,996 INFO L78 Accepts]: Start accepts. Automaton has 161868 states and 668265 transitions. Word has length 14 [2019-12-07 18:15:07,996 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:15:07,996 INFO L462 AbstractCegarLoop]: Abstraction has 161868 states and 668265 transitions. [2019-12-07 18:15:07,996 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:15:07,996 INFO L276 IsEmpty]: Start isEmpty. Operand 161868 states and 668265 transitions. [2019-12-07 18:15:08,009 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 18:15:08,009 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:15:08,009 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:15:08,009 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:15:08,009 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:15:08,009 INFO L82 PathProgramCache]: Analyzing trace with hash -1754746770, now seen corresponding path program 1 times [2019-12-07 18:15:08,009 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:15:08,009 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1171416135] [2019-12-07 18:15:08,010 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:15:08,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:15:08,053 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:15:08,053 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1171416135] [2019-12-07 18:15:08,053 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:15:08,053 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:15:08,054 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1916096132] [2019-12-07 18:15:08,054 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:15:08,054 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:15:08,054 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:15:08,054 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:15:08,054 INFO L87 Difference]: Start difference. First operand 161868 states and 668265 transitions. Second operand 3 states. [2019-12-07 18:15:08,702 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:15:08,702 INFO L93 Difference]: Finished difference Result 152758 states and 623342 transitions. [2019-12-07 18:15:08,703 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:15:08,703 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 18:15:08,703 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:15:09,090 INFO L225 Difference]: With dead ends: 152758 [2019-12-07 18:15:09,090 INFO L226 Difference]: Without dead ends: 152758 [2019-12-07 18:15:09,091 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:15:12,762 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152758 states. [2019-12-07 18:15:15,095 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152758 to 148778. [2019-12-07 18:15:15,095 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148778 states. [2019-12-07 18:15:15,508 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148778 states to 148778 states and 608180 transitions. [2019-12-07 18:15:15,508 INFO L78 Accepts]: Start accepts. Automaton has 148778 states and 608180 transitions. Word has length 18 [2019-12-07 18:15:15,508 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:15:15,508 INFO L462 AbstractCegarLoop]: Abstraction has 148778 states and 608180 transitions. [2019-12-07 18:15:15,508 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:15:15,508 INFO L276 IsEmpty]: Start isEmpty. Operand 148778 states and 608180 transitions. [2019-12-07 18:15:15,518 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 18:15:15,518 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:15:15,518 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:15:15,518 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:15:15,518 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:15:15,519 INFO L82 PathProgramCache]: Analyzing trace with hash 250695921, now seen corresponding path program 1 times [2019-12-07 18:15:15,519 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:15:15,519 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1841417204] [2019-12-07 18:15:15,519 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:15:15,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:15:15,558 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:15:15,558 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1841417204] [2019-12-07 18:15:15,558 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:15:15,559 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:15:15,559 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1639529024] [2019-12-07 18:15:15,559 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:15:15,559 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:15:15,559 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:15:15,560 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:15:15,560 INFO L87 Difference]: Start difference. First operand 148778 states and 608180 transitions. Second operand 3 states. [2019-12-07 18:15:16,738 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:15:16,738 INFO L93 Difference]: Finished difference Result 277378 states and 1128575 transitions. [2019-12-07 18:15:16,739 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:15:16,739 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 18:15:16,739 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:15:17,871 INFO L225 Difference]: With dead ends: 277378 [2019-12-07 18:15:17,871 INFO L226 Difference]: Without dead ends: 268154 [2019-12-07 18:15:17,872 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:15:22,608 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 268154 states. [2019-12-07 18:15:29,123 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 268154 to 258617. [2019-12-07 18:15:29,124 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 258617 states. [2019-12-07 18:15:30,185 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 258617 states to 258617 states and 1060508 transitions. [2019-12-07 18:15:30,185 INFO L78 Accepts]: Start accepts. Automaton has 258617 states and 1060508 transitions. Word has length 18 [2019-12-07 18:15:30,185 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:15:30,185 INFO L462 AbstractCegarLoop]: Abstraction has 258617 states and 1060508 transitions. [2019-12-07 18:15:30,185 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:15:30,185 INFO L276 IsEmpty]: Start isEmpty. Operand 258617 states and 1060508 transitions. [2019-12-07 18:15:30,203 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 18:15:30,203 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:15:30,203 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:15:30,204 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:15:30,204 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:15:30,204 INFO L82 PathProgramCache]: Analyzing trace with hash 1369748393, now seen corresponding path program 1 times [2019-12-07 18:15:30,204 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:15:30,204 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1709077026] [2019-12-07 18:15:30,204 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:15:30,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:15:30,243 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:15:30,244 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1709077026] [2019-12-07 18:15:30,244 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:15:30,244 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:15:30,244 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [313556518] [2019-12-07 18:15:30,244 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:15:30,244 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:15:30,244 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:15:30,245 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:15:30,245 INFO L87 Difference]: Start difference. First operand 258617 states and 1060508 transitions. Second operand 4 states. [2019-12-07 18:15:31,316 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:15:31,316 INFO L93 Difference]: Finished difference Result 258630 states and 1059116 transitions. [2019-12-07 18:15:31,317 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:15:31,317 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2019-12-07 18:15:31,317 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:15:32,530 INFO L225 Difference]: With dead ends: 258630 [2019-12-07 18:15:32,530 INFO L226 Difference]: Without dead ends: 257550 [2019-12-07 18:15:32,531 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:15:37,663 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 257550 states. [2019-12-07 18:15:41,075 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 257550 to 256634. [2019-12-07 18:15:41,075 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 256634 states. [2019-12-07 18:15:42,129 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 256634 states to 256634 states and 1052948 transitions. [2019-12-07 18:15:42,130 INFO L78 Accepts]: Start accepts. Automaton has 256634 states and 1052948 transitions. Word has length 19 [2019-12-07 18:15:42,130 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:15:42,130 INFO L462 AbstractCegarLoop]: Abstraction has 256634 states and 1052948 transitions. [2019-12-07 18:15:42,130 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:15:42,130 INFO L276 IsEmpty]: Start isEmpty. Operand 256634 states and 1052948 transitions. [2019-12-07 18:15:42,151 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 18:15:42,151 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:15:42,151 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:15:42,151 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:15:42,151 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:15:42,151 INFO L82 PathProgramCache]: Analyzing trace with hash -2069277611, now seen corresponding path program 1 times [2019-12-07 18:15:42,152 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:15:42,152 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1357088503] [2019-12-07 18:15:42,152 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:15:42,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:15:42,198 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:15:42,198 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1357088503] [2019-12-07 18:15:42,199 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:15:42,199 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:15:42,199 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [798239363] [2019-12-07 18:15:42,199 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:15:42,199 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:15:42,199 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:15:42,200 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:15:42,200 INFO L87 Difference]: Start difference. First operand 256634 states and 1052948 transitions. Second operand 5 states. [2019-12-07 18:15:46,932 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:15:46,932 INFO L93 Difference]: Finished difference Result 368439 states and 1478344 transitions. [2019-12-07 18:15:46,933 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:15:46,933 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 18:15:46,933 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:15:47,959 INFO L225 Difference]: With dead ends: 368439 [2019-12-07 18:15:47,959 INFO L226 Difference]: Without dead ends: 367887 [2019-12-07 18:15:47,959 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:15:54,004 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 367887 states. [2019-12-07 18:15:58,635 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 367887 to 267700. [2019-12-07 18:15:58,635 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 267700 states. [2019-12-07 18:15:59,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 267700 states to 267700 states and 1095458 transitions. [2019-12-07 18:15:59,720 INFO L78 Accepts]: Start accepts. Automaton has 267700 states and 1095458 transitions. Word has length 19 [2019-12-07 18:15:59,720 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:15:59,721 INFO L462 AbstractCegarLoop]: Abstraction has 267700 states and 1095458 transitions. [2019-12-07 18:15:59,721 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:15:59,721 INFO L276 IsEmpty]: Start isEmpty. Operand 267700 states and 1095458 transitions. [2019-12-07 18:15:59,750 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 18:15:59,750 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:15:59,750 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:15:59,750 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:15:59,750 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:15:59,750 INFO L82 PathProgramCache]: Analyzing trace with hash -582230699, now seen corresponding path program 1 times [2019-12-07 18:15:59,751 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:15:59,751 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1771492212] [2019-12-07 18:15:59,751 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:15:59,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:15:59,796 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:15:59,796 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1771492212] [2019-12-07 18:15:59,796 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:15:59,797 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:15:59,797 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1977613044] [2019-12-07 18:15:59,797 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:15:59,797 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:15:59,797 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:15:59,797 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:15:59,797 INFO L87 Difference]: Start difference. First operand 267700 states and 1095458 transitions. Second operand 5 states. [2019-12-07 18:16:02,061 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:16:02,061 INFO L93 Difference]: Finished difference Result 430723 states and 1769792 transitions. [2019-12-07 18:16:02,062 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:16:02,062 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 20 [2019-12-07 18:16:02,063 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:16:02,600 INFO L225 Difference]: With dead ends: 430723 [2019-12-07 18:16:02,600 INFO L226 Difference]: Without dead ends: 201183 [2019-12-07 18:16:02,601 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:16:07,013 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 201183 states. [2019-12-07 18:16:09,668 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 201183 to 193165. [2019-12-07 18:16:09,668 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 193165 states. [2019-12-07 18:16:10,525 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193165 states to 193165 states and 788533 transitions. [2019-12-07 18:16:10,526 INFO L78 Accepts]: Start accepts. Automaton has 193165 states and 788533 transitions. Word has length 20 [2019-12-07 18:16:10,526 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:16:10,526 INFO L462 AbstractCegarLoop]: Abstraction has 193165 states and 788533 transitions. [2019-12-07 18:16:10,526 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:16:10,526 INFO L276 IsEmpty]: Start isEmpty. Operand 193165 states and 788533 transitions. [2019-12-07 18:16:10,555 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 18:16:10,555 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:16:10,555 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:16:10,556 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:16:10,556 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:16:10,556 INFO L82 PathProgramCache]: Analyzing trace with hash -1918737222, now seen corresponding path program 1 times [2019-12-07 18:16:10,556 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:16:10,556 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1979794387] [2019-12-07 18:16:10,556 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:16:10,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:16:10,591 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:16:10,591 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1979794387] [2019-12-07 18:16:10,591 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:16:10,591 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:16:10,592 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1519686304] [2019-12-07 18:16:10,592 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:16:10,592 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:16:10,592 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:16:10,592 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:16:10,592 INFO L87 Difference]: Start difference. First operand 193165 states and 788533 transitions. Second operand 5 states. [2019-12-07 18:16:11,723 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:16:11,723 INFO L93 Difference]: Finished difference Result 217402 states and 876117 transitions. [2019-12-07 18:16:11,724 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 18:16:11,724 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 18:16:11,724 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:16:12,294 INFO L225 Difference]: With dead ends: 217402 [2019-12-07 18:16:12,295 INFO L226 Difference]: Without dead ends: 216202 [2019-12-07 18:16:12,295 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:16:18,990 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216202 states. [2019-12-07 18:16:21,776 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216202 to 193554. [2019-12-07 18:16:21,776 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 193554 states. [2019-12-07 18:16:22,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193554 states to 193554 states and 789658 transitions. [2019-12-07 18:16:22,309 INFO L78 Accepts]: Start accepts. Automaton has 193554 states and 789658 transitions. Word has length 22 [2019-12-07 18:16:22,309 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:16:22,309 INFO L462 AbstractCegarLoop]: Abstraction has 193554 states and 789658 transitions. [2019-12-07 18:16:22,309 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:16:22,309 INFO L276 IsEmpty]: Start isEmpty. Operand 193554 states and 789658 transitions. [2019-12-07 18:16:22,331 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 18:16:22,331 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:16:22,331 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:16:22,331 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:16:22,332 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:16:22,332 INFO L82 PathProgramCache]: Analyzing trace with hash -1430161370, now seen corresponding path program 1 times [2019-12-07 18:16:22,332 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:16:22,332 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1793879064] [2019-12-07 18:16:22,332 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:16:22,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:16:22,362 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:16:22,363 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1793879064] [2019-12-07 18:16:22,363 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:16:22,363 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:16:22,363 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [730195108] [2019-12-07 18:16:22,363 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:16:22,363 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:16:22,363 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:16:22,364 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:16:22,364 INFO L87 Difference]: Start difference. First operand 193554 states and 789658 transitions. Second operand 5 states. [2019-12-07 18:16:23,580 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:16:23,580 INFO L93 Difference]: Finished difference Result 255988 states and 1020668 transitions. [2019-12-07 18:16:23,581 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 18:16:23,581 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 18:16:23,581 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:16:24,656 INFO L225 Difference]: With dead ends: 255988 [2019-12-07 18:16:24,656 INFO L226 Difference]: Without dead ends: 254716 [2019-12-07 18:16:24,656 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:16:29,746 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 254716 states. [2019-12-07 18:16:32,699 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 254716 to 196048. [2019-12-07 18:16:32,699 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 196048 states. [2019-12-07 18:16:33,265 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196048 states to 196048 states and 799273 transitions. [2019-12-07 18:16:33,265 INFO L78 Accepts]: Start accepts. Automaton has 196048 states and 799273 transitions. Word has length 22 [2019-12-07 18:16:33,266 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:16:33,266 INFO L462 AbstractCegarLoop]: Abstraction has 196048 states and 799273 transitions. [2019-12-07 18:16:33,266 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:16:33,266 INFO L276 IsEmpty]: Start isEmpty. Operand 196048 states and 799273 transitions. [2019-12-07 18:16:33,290 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 18:16:33,290 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:16:33,290 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:16:33,290 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:16:33,291 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:16:33,291 INFO L82 PathProgramCache]: Analyzing trace with hash -1233781658, now seen corresponding path program 1 times [2019-12-07 18:16:33,291 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:16:33,291 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1078060024] [2019-12-07 18:16:33,291 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:16:33,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:16:33,326 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:16:33,326 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1078060024] [2019-12-07 18:16:33,326 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:16:33,326 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:16:33,326 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1629605967] [2019-12-07 18:16:33,327 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:16:33,327 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:16:33,327 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:16:33,327 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:16:33,327 INFO L87 Difference]: Start difference. First operand 196048 states and 799273 transitions. Second operand 5 states. [2019-12-07 18:16:34,778 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:16:34,778 INFO L93 Difference]: Finished difference Result 224067 states and 902607 transitions. [2019-12-07 18:16:34,779 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 18:16:34,779 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 18:16:34,779 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:16:35,353 INFO L225 Difference]: With dead ends: 224067 [2019-12-07 18:16:35,353 INFO L226 Difference]: Without dead ends: 222169 [2019-12-07 18:16:35,353 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-12-07 18:16:40,055 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 222169 states. [2019-12-07 18:16:44,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 222169 to 193783. [2019-12-07 18:16:44,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 193783 states. [2019-12-07 18:16:45,665 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193783 states to 193783 states and 791137 transitions. [2019-12-07 18:16:45,666 INFO L78 Accepts]: Start accepts. Automaton has 193783 states and 791137 transitions. Word has length 22 [2019-12-07 18:16:45,666 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:16:45,666 INFO L462 AbstractCegarLoop]: Abstraction has 193783 states and 791137 transitions. [2019-12-07 18:16:45,666 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:16:45,666 INFO L276 IsEmpty]: Start isEmpty. Operand 193783 states and 791137 transitions. [2019-12-07 18:16:45,690 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 18:16:45,690 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:16:45,690 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:16:45,690 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:16:45,690 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:16:45,690 INFO L82 PathProgramCache]: Analyzing trace with hash -745205806, now seen corresponding path program 1 times [2019-12-07 18:16:45,690 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:16:45,691 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [895228726] [2019-12-07 18:16:45,691 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:16:45,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:16:45,724 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:16:45,725 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [895228726] [2019-12-07 18:16:45,725 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:16:45,725 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:16:45,725 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [813755042] [2019-12-07 18:16:45,725 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:16:45,725 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:16:45,725 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:16:45,725 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:16:45,726 INFO L87 Difference]: Start difference. First operand 193783 states and 791137 transitions. Second operand 4 states. [2019-12-07 18:16:45,879 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:16:45,880 INFO L93 Difference]: Finished difference Result 48122 states and 167204 transitions. [2019-12-07 18:16:45,880 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:16:45,880 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 22 [2019-12-07 18:16:45,881 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:16:45,943 INFO L225 Difference]: With dead ends: 48122 [2019-12-07 18:16:45,943 INFO L226 Difference]: Without dead ends: 36710 [2019-12-07 18:16:45,944 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:16:46,113 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36710 states. [2019-12-07 18:16:46,482 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36710 to 36709. [2019-12-07 18:16:46,482 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36709 states. [2019-12-07 18:16:46,546 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36709 states to 36709 states and 121139 transitions. [2019-12-07 18:16:46,546 INFO L78 Accepts]: Start accepts. Automaton has 36709 states and 121139 transitions. Word has length 22 [2019-12-07 18:16:46,546 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:16:46,546 INFO L462 AbstractCegarLoop]: Abstraction has 36709 states and 121139 transitions. [2019-12-07 18:16:46,547 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:16:46,547 INFO L276 IsEmpty]: Start isEmpty. Operand 36709 states and 121139 transitions. [2019-12-07 18:16:46,560 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 18:16:46,560 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:16:46,560 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:16:46,560 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:16:46,560 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:16:46,560 INFO L82 PathProgramCache]: Analyzing trace with hash 1319845053, now seen corresponding path program 1 times [2019-12-07 18:16:46,561 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:16:46,561 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1386029421] [2019-12-07 18:16:46,561 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:16:46,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:16:46,583 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:16:46,583 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1386029421] [2019-12-07 18:16:46,583 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:16:46,584 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:16:46,584 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [446028413] [2019-12-07 18:16:46,584 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:16:46,584 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:16:46,584 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:16:46,584 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:16:46,585 INFO L87 Difference]: Start difference. First operand 36709 states and 121139 transitions. Second operand 3 states. [2019-12-07 18:16:46,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:16:46,707 INFO L93 Difference]: Finished difference Result 44536 states and 145139 transitions. [2019-12-07 18:16:46,707 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:16:46,708 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 28 [2019-12-07 18:16:46,708 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:16:46,769 INFO L225 Difference]: With dead ends: 44536 [2019-12-07 18:16:46,769 INFO L226 Difference]: Without dead ends: 44536 [2019-12-07 18:16:46,770 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:16:46,957 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44536 states. [2019-12-07 18:16:47,354 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44536 to 38362. [2019-12-07 18:16:47,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38362 states. [2019-12-07 18:16:47,420 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38362 states to 38362 states and 124744 transitions. [2019-12-07 18:16:47,420 INFO L78 Accepts]: Start accepts. Automaton has 38362 states and 124744 transitions. Word has length 28 [2019-12-07 18:16:47,421 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:16:47,421 INFO L462 AbstractCegarLoop]: Abstraction has 38362 states and 124744 transitions. [2019-12-07 18:16:47,421 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:16:47,421 INFO L276 IsEmpty]: Start isEmpty. Operand 38362 states and 124744 transitions. [2019-12-07 18:16:47,433 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 18:16:47,433 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:16:47,434 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:16:47,434 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:16:47,434 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:16:47,434 INFO L82 PathProgramCache]: Analyzing trace with hash 234862090, now seen corresponding path program 1 times [2019-12-07 18:16:47,434 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:16:47,434 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1243552793] [2019-12-07 18:16:47,434 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:16:47,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:16:47,479 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:16:47,479 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1243552793] [2019-12-07 18:16:47,480 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:16:47,480 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:16:47,480 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1841693532] [2019-12-07 18:16:47,480 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:16:47,480 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:16:47,480 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:16:47,480 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:16:47,481 INFO L87 Difference]: Start difference. First operand 38362 states and 124744 transitions. Second operand 5 states. [2019-12-07 18:16:47,553 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:16:47,554 INFO L93 Difference]: Finished difference Result 16858 states and 52218 transitions. [2019-12-07 18:16:47,554 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:16:47,554 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2019-12-07 18:16:47,554 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:16:47,572 INFO L225 Difference]: With dead ends: 16858 [2019-12-07 18:16:47,572 INFO L226 Difference]: Without dead ends: 14649 [2019-12-07 18:16:47,572 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:16:47,625 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14649 states. [2019-12-07 18:16:47,748 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14649 to 14514. [2019-12-07 18:16:47,749 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14514 states. [2019-12-07 18:16:48,100 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14514 states to 14514 states and 44768 transitions. [2019-12-07 18:16:48,100 INFO L78 Accepts]: Start accepts. Automaton has 14514 states and 44768 transitions. Word has length 29 [2019-12-07 18:16:48,101 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:16:48,101 INFO L462 AbstractCegarLoop]: Abstraction has 14514 states and 44768 transitions. [2019-12-07 18:16:48,101 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:16:48,101 INFO L276 IsEmpty]: Start isEmpty. Operand 14514 states and 44768 transitions. [2019-12-07 18:16:48,116 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 18:16:48,116 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:16:48,117 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:16:48,117 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:16:48,117 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:16:48,117 INFO L82 PathProgramCache]: Analyzing trace with hash 483024013, now seen corresponding path program 1 times [2019-12-07 18:16:48,117 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:16:48,117 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [504444660] [2019-12-07 18:16:48,117 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:16:48,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:16:48,165 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:16:48,165 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [504444660] [2019-12-07 18:16:48,166 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:16:48,166 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:16:48,166 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1748915878] [2019-12-07 18:16:48,166 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:16:48,166 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:16:48,167 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:16:48,167 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:16:48,167 INFO L87 Difference]: Start difference. First operand 14514 states and 44768 transitions. Second operand 6 states. [2019-12-07 18:16:48,416 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:16:48,417 INFO L93 Difference]: Finished difference Result 16798 states and 50803 transitions. [2019-12-07 18:16:48,417 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 18:16:48,417 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 40 [2019-12-07 18:16:48,417 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:16:48,434 INFO L225 Difference]: With dead ends: 16798 [2019-12-07 18:16:48,435 INFO L226 Difference]: Without dead ends: 16611 [2019-12-07 18:16:48,435 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:16:48,490 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16611 states. [2019-12-07 18:16:48,627 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16611 to 14456. [2019-12-07 18:16:48,628 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14456 states. [2019-12-07 18:16:48,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14456 states to 14456 states and 44643 transitions. [2019-12-07 18:16:48,651 INFO L78 Accepts]: Start accepts. Automaton has 14456 states and 44643 transitions. Word has length 40 [2019-12-07 18:16:48,651 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:16:48,651 INFO L462 AbstractCegarLoop]: Abstraction has 14456 states and 44643 transitions. [2019-12-07 18:16:48,651 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:16:48,651 INFO L276 IsEmpty]: Start isEmpty. Operand 14456 states and 44643 transitions. [2019-12-07 18:16:48,664 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 18:16:48,664 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:16:48,664 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:16:48,664 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:16:48,664 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:16:48,664 INFO L82 PathProgramCache]: Analyzing trace with hash -1848652026, now seen corresponding path program 1 times [2019-12-07 18:16:48,665 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:16:48,665 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1202515195] [2019-12-07 18:16:48,665 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:16:48,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:16:48,716 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:16:48,716 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1202515195] [2019-12-07 18:16:48,716 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:16:48,716 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:16:48,717 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [554922931] [2019-12-07 18:16:48,717 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:16:48,717 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:16:48,717 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:16:48,717 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:16:48,717 INFO L87 Difference]: Start difference. First operand 14456 states and 44643 transitions. Second operand 6 states. [2019-12-07 18:16:48,989 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:16:48,989 INFO L93 Difference]: Finished difference Result 15933 states and 48492 transitions. [2019-12-07 18:16:48,989 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 18:16:48,989 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 41 [2019-12-07 18:16:48,989 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:16:49,005 INFO L225 Difference]: With dead ends: 15933 [2019-12-07 18:16:49,006 INFO L226 Difference]: Without dead ends: 15661 [2019-12-07 18:16:49,006 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=35, Invalid=75, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:16:49,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15661 states. [2019-12-07 18:16:49,185 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15661 to 13948. [2019-12-07 18:16:49,186 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13948 states. [2019-12-07 18:16:49,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13948 states to 13948 states and 43464 transitions. [2019-12-07 18:16:49,208 INFO L78 Accepts]: Start accepts. Automaton has 13948 states and 43464 transitions. Word has length 41 [2019-12-07 18:16:49,208 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:16:49,209 INFO L462 AbstractCegarLoop]: Abstraction has 13948 states and 43464 transitions. [2019-12-07 18:16:49,209 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:16:49,209 INFO L276 IsEmpty]: Start isEmpty. Operand 13948 states and 43464 transitions. [2019-12-07 18:16:49,221 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 18:16:49,221 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:16:49,221 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:16:49,222 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:16:49,222 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:16:49,222 INFO L82 PathProgramCache]: Analyzing trace with hash -1237610810, now seen corresponding path program 1 times [2019-12-07 18:16:49,222 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:16:49,222 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1561609853] [2019-12-07 18:16:49,222 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:16:49,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:16:49,271 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:16:49,271 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1561609853] [2019-12-07 18:16:49,271 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:16:49,272 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:16:49,272 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1713234689] [2019-12-07 18:16:49,272 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:16:49,272 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:16:49,272 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:16:49,272 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:16:49,272 INFO L87 Difference]: Start difference. First operand 13948 states and 43464 transitions. Second operand 5 states. [2019-12-07 18:16:49,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:16:49,609 INFO L93 Difference]: Finished difference Result 24370 states and 73928 transitions. [2019-12-07 18:16:49,609 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:16:49,609 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 18:16:49,609 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:16:49,635 INFO L225 Difference]: With dead ends: 24370 [2019-12-07 18:16:49,635 INFO L226 Difference]: Without dead ends: 24370 [2019-12-07 18:16:49,635 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:16:49,707 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24370 states. [2019-12-07 18:16:49,911 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24370 to 20384. [2019-12-07 18:16:49,911 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20384 states. [2019-12-07 18:16:49,943 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20384 states to 20384 states and 62680 transitions. [2019-12-07 18:16:49,943 INFO L78 Accepts]: Start accepts. Automaton has 20384 states and 62680 transitions. Word has length 41 [2019-12-07 18:16:49,943 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:16:49,943 INFO L462 AbstractCegarLoop]: Abstraction has 20384 states and 62680 transitions. [2019-12-07 18:16:49,943 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:16:49,943 INFO L276 IsEmpty]: Start isEmpty. Operand 20384 states and 62680 transitions. [2019-12-07 18:16:49,961 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 18:16:49,961 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:16:49,961 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:16:49,961 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:16:49,961 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:16:49,961 INFO L82 PathProgramCache]: Analyzing trace with hash 685009244, now seen corresponding path program 2 times [2019-12-07 18:16:49,962 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:16:49,962 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [625947576] [2019-12-07 18:16:49,962 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:16:49,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:16:49,991 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:16:49,991 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [625947576] [2019-12-07 18:16:49,991 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:16:49,992 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:16:49,992 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [79495469] [2019-12-07 18:16:49,992 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:16:49,992 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:16:49,992 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:16:49,992 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:16:49,993 INFO L87 Difference]: Start difference. First operand 20384 states and 62680 transitions. Second operand 3 states. [2019-12-07 18:16:50,050 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:16:50,050 INFO L93 Difference]: Finished difference Result 19164 states and 57822 transitions. [2019-12-07 18:16:50,051 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:16:50,051 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2019-12-07 18:16:50,051 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:16:50,073 INFO L225 Difference]: With dead ends: 19164 [2019-12-07 18:16:50,073 INFO L226 Difference]: Without dead ends: 19164 [2019-12-07 18:16:50,073 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:16:50,133 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19164 states. [2019-12-07 18:16:50,294 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19164 to 18265. [2019-12-07 18:16:50,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18265 states. [2019-12-07 18:16:50,323 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18265 states to 18265 states and 55322 transitions. [2019-12-07 18:16:50,323 INFO L78 Accepts]: Start accepts. Automaton has 18265 states and 55322 transitions. Word has length 41 [2019-12-07 18:16:50,323 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:16:50,323 INFO L462 AbstractCegarLoop]: Abstraction has 18265 states and 55322 transitions. [2019-12-07 18:16:50,323 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:16:50,323 INFO L276 IsEmpty]: Start isEmpty. Operand 18265 states and 55322 transitions. [2019-12-07 18:16:50,340 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 18:16:50,340 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:16:50,340 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:16:50,340 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:16:50,340 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:16:50,341 INFO L82 PathProgramCache]: Analyzing trace with hash 838446510, now seen corresponding path program 1 times [2019-12-07 18:16:50,341 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:16:50,341 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1943351973] [2019-12-07 18:16:50,341 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:16:50,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:16:50,396 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:16:50,396 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1943351973] [2019-12-07 18:16:50,396 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:16:50,396 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:16:50,396 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1931399713] [2019-12-07 18:16:50,397 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:16:50,397 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:16:50,397 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:16:50,397 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:16:50,397 INFO L87 Difference]: Start difference. First operand 18265 states and 55322 transitions. Second operand 6 states. [2019-12-07 18:16:50,478 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:16:50,479 INFO L93 Difference]: Finished difference Result 16856 states and 51988 transitions. [2019-12-07 18:16:50,479 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:16:50,479 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 42 [2019-12-07 18:16:50,479 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:16:50,497 INFO L225 Difference]: With dead ends: 16856 [2019-12-07 18:16:50,497 INFO L226 Difference]: Without dead ends: 16696 [2019-12-07 18:16:50,497 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:16:50,553 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16696 states. [2019-12-07 18:16:50,661 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16696 to 10028. [2019-12-07 18:16:50,661 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10028 states. [2019-12-07 18:16:50,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10028 states to 10028 states and 30910 transitions. [2019-12-07 18:16:50,676 INFO L78 Accepts]: Start accepts. Automaton has 10028 states and 30910 transitions. Word has length 42 [2019-12-07 18:16:50,677 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:16:50,677 INFO L462 AbstractCegarLoop]: Abstraction has 10028 states and 30910 transitions. [2019-12-07 18:16:50,677 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:16:50,677 INFO L276 IsEmpty]: Start isEmpty. Operand 10028 states and 30910 transitions. [2019-12-07 18:16:50,685 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 18:16:50,685 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:16:50,685 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:16:50,685 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:16:50,686 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:16:50,686 INFO L82 PathProgramCache]: Analyzing trace with hash -944534763, now seen corresponding path program 1 times [2019-12-07 18:16:50,686 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:16:50,686 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [275526438] [2019-12-07 18:16:50,686 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:16:50,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:16:50,800 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:16:50,801 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [275526438] [2019-12-07 18:16:50,801 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:16:50,801 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 18:16:50,801 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [73369695] [2019-12-07 18:16:50,801 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 18:16:50,801 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:16:50,801 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 18:16:50,801 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=106, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:16:50,802 INFO L87 Difference]: Start difference. First operand 10028 states and 30910 transitions. Second operand 12 states. [2019-12-07 18:16:52,211 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:16:52,211 INFO L93 Difference]: Finished difference Result 33910 states and 103445 transitions. [2019-12-07 18:16:52,211 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 56 states. [2019-12-07 18:16:52,211 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 56 [2019-12-07 18:16:52,211 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:16:52,234 INFO L225 Difference]: With dead ends: 33910 [2019-12-07 18:16:52,234 INFO L226 Difference]: Without dead ends: 22009 [2019-12-07 18:16:52,235 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1020 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=621, Invalid=2685, Unknown=0, NotChecked=0, Total=3306 [2019-12-07 18:16:52,297 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22009 states. [2019-12-07 18:16:52,440 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22009 to 11621. [2019-12-07 18:16:52,441 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11621 states. [2019-12-07 18:16:52,459 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11621 states to 11621 states and 35360 transitions. [2019-12-07 18:16:52,459 INFO L78 Accepts]: Start accepts. Automaton has 11621 states and 35360 transitions. Word has length 56 [2019-12-07 18:16:52,459 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:16:52,459 INFO L462 AbstractCegarLoop]: Abstraction has 11621 states and 35360 transitions. [2019-12-07 18:16:52,459 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 18:16:52,459 INFO L276 IsEmpty]: Start isEmpty. Operand 11621 states and 35360 transitions. [2019-12-07 18:16:52,469 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 18:16:52,470 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:16:52,470 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:16:52,470 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:16:52,470 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:16:52,470 INFO L82 PathProgramCache]: Analyzing trace with hash 1363835769, now seen corresponding path program 2 times [2019-12-07 18:16:52,470 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:16:52,470 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [8758292] [2019-12-07 18:16:52,470 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:16:52,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:16:52,522 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:16:52,523 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [8758292] [2019-12-07 18:16:52,523 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:16:52,523 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:16:52,523 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [850095868] [2019-12-07 18:16:52,523 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:16:52,524 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:16:52,524 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:16:52,524 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:16:52,524 INFO L87 Difference]: Start difference. First operand 11621 states and 35360 transitions. Second operand 4 states. [2019-12-07 18:16:52,575 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:16:52,575 INFO L93 Difference]: Finished difference Result 19379 states and 58878 transitions. [2019-12-07 18:16:52,576 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:16:52,576 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 56 [2019-12-07 18:16:52,576 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:16:52,587 INFO L225 Difference]: With dead ends: 19379 [2019-12-07 18:16:52,587 INFO L226 Difference]: Without dead ends: 8084 [2019-12-07 18:16:52,588 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:16:52,632 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8084 states. [2019-12-07 18:16:52,696 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8084 to 8084. [2019-12-07 18:16:52,696 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8084 states. [2019-12-07 18:16:52,707 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8084 states to 8084 states and 24381 transitions. [2019-12-07 18:16:52,707 INFO L78 Accepts]: Start accepts. Automaton has 8084 states and 24381 transitions. Word has length 56 [2019-12-07 18:16:52,708 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:16:52,708 INFO L462 AbstractCegarLoop]: Abstraction has 8084 states and 24381 transitions. [2019-12-07 18:16:52,708 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:16:52,708 INFO L276 IsEmpty]: Start isEmpty. Operand 8084 states and 24381 transitions. [2019-12-07 18:16:52,714 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 18:16:52,714 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:16:52,714 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:16:52,715 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:16:52,715 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:16:52,715 INFO L82 PathProgramCache]: Analyzing trace with hash 1033271685, now seen corresponding path program 3 times [2019-12-07 18:16:52,715 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:16:52,715 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [787475586] [2019-12-07 18:16:52,715 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:16:52,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:16:52,847 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:16:52,848 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [787475586] [2019-12-07 18:16:52,848 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:16:52,848 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:16:52,848 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2134021200] [2019-12-07 18:16:52,848 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:16:52,848 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:16:52,848 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:16:52,848 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:16:52,848 INFO L87 Difference]: Start difference. First operand 8084 states and 24381 transitions. Second operand 11 states. [2019-12-07 18:16:53,353 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:16:53,353 INFO L93 Difference]: Finished difference Result 14456 states and 42817 transitions. [2019-12-07 18:16:53,353 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 18:16:53,353 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 56 [2019-12-07 18:16:53,353 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:16:53,363 INFO L225 Difference]: With dead ends: 14456 [2019-12-07 18:16:53,363 INFO L226 Difference]: Without dead ends: 9600 [2019-12-07 18:16:53,363 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 241 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=200, Invalid=856, Unknown=0, NotChecked=0, Total=1056 [2019-12-07 18:16:53,401 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9600 states. [2019-12-07 18:16:53,472 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9600 to 8440. [2019-12-07 18:16:53,472 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8440 states. [2019-12-07 18:16:53,484 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8440 states to 8440 states and 25325 transitions. [2019-12-07 18:16:53,484 INFO L78 Accepts]: Start accepts. Automaton has 8440 states and 25325 transitions. Word has length 56 [2019-12-07 18:16:53,484 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:16:53,484 INFO L462 AbstractCegarLoop]: Abstraction has 8440 states and 25325 transitions. [2019-12-07 18:16:53,484 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:16:53,485 INFO L276 IsEmpty]: Start isEmpty. Operand 8440 states and 25325 transitions. [2019-12-07 18:16:53,491 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 18:16:53,491 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:16:53,491 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:16:53,491 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:16:53,492 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:16:53,492 INFO L82 PathProgramCache]: Analyzing trace with hash -1822247207, now seen corresponding path program 4 times [2019-12-07 18:16:53,492 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:16:53,492 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1789431328] [2019-12-07 18:16:53,492 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:16:53,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:16:53,609 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:16:53,609 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1789431328] [2019-12-07 18:16:53,610 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:16:53,610 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 18:16:53,610 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [581740121] [2019-12-07 18:16:53,610 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 18:16:53,610 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:16:53,610 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 18:16:53,610 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:16:53,611 INFO L87 Difference]: Start difference. First operand 8440 states and 25325 transitions. Second operand 12 states. [2019-12-07 18:16:54,150 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:16:54,150 INFO L93 Difference]: Finished difference Result 9755 states and 28550 transitions. [2019-12-07 18:16:54,150 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-12-07 18:16:54,150 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 56 [2019-12-07 18:16:54,150 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:16:54,160 INFO L225 Difference]: With dead ends: 9755 [2019-12-07 18:16:54,160 INFO L226 Difference]: Without dead ends: 8994 [2019-12-07 18:16:54,160 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 169 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=173, Invalid=697, Unknown=0, NotChecked=0, Total=870 [2019-12-07 18:16:54,197 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8994 states. [2019-12-07 18:16:54,267 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8994 to 8252. [2019-12-07 18:16:54,267 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8252 states. [2019-12-07 18:16:54,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8252 states to 8252 states and 24782 transitions. [2019-12-07 18:16:54,278 INFO L78 Accepts]: Start accepts. Automaton has 8252 states and 24782 transitions. Word has length 56 [2019-12-07 18:16:54,278 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:16:54,278 INFO L462 AbstractCegarLoop]: Abstraction has 8252 states and 24782 transitions. [2019-12-07 18:16:54,278 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 18:16:54,278 INFO L276 IsEmpty]: Start isEmpty. Operand 8252 states and 24782 transitions. [2019-12-07 18:16:54,284 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 18:16:54,284 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:16:54,284 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:16:54,285 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:16:54,285 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:16:54,285 INFO L82 PathProgramCache]: Analyzing trace with hash -1734091201, now seen corresponding path program 5 times [2019-12-07 18:16:54,285 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:16:54,285 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [599886998] [2019-12-07 18:16:54,285 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:16:54,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:16:54,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:16:54,343 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 18:16:54,343 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 18:16:54,345 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [807] [807] ULTIMATE.startENTRY-->L818: Formula: (let ((.cse0 (store |v_#valid_66| 0 0))) (and (= 0 v_~__unbuffered_cnt~0_95) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t2082~0.base_30| 4)) (= 0 v_~x~0_240) (= v_~x$r_buff1_thd0~0_309 0) (= v_~weak$$choice2~0_201 0) (= 0 v_~x$w_buff1_used~0_624) (= 0 v_~x$r_buff1_thd2~0_264) (= v_~y~0_226 0) (= v_~z~0_95 0) (< 0 |v_#StackHeapBarrier_16|) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t2082~0.base_30|)) (= |v_#valid_64| (store .cse0 |v_ULTIMATE.start_main_~#t2082~0.base_30| 1)) (= 0 v_~x$read_delayed_var~0.base_7) (= 0 v_~x$r_buff0_thd3~0_148) (= 0 v_~x$w_buff1~0_328) (= |v_ULTIMATE.start_main_~#t2082~0.offset_22| 0) (= 0 v_~x$r_buff0_thd2~0_323) (= v_~x$flush_delayed~0_62 0) (= 0 v_~x$w_buff0_used~0_913) (= 0 |v_#NULL.base_4|) (= 0 v_~x$read_delayed~0_7) (= v_~x$r_buff0_thd1~0_362 0) (= 0 v_~weak$$choice0~0_37) (= v_~main$tmp_guard1~0_53 0) (= v_~main$tmp_guard0~0_42 0) (= 0 v_~__unbuffered_p0_EAX~0_85) (= 0 v_~__unbuffered_p2_EAX~0_68) (= |v_#NULL.offset_4| 0) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t2082~0.base_30| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t2082~0.base_30|) |v_ULTIMATE.start_main_~#t2082~0.offset_22| 0)) |v_#memory_int_23|) (< |v_#StackHeapBarrier_16| |v_ULTIMATE.start_main_~#t2082~0.base_30|) (= 0 v_~x$read_delayed_var~0.offset_7) (= 0 v_~x$r_buff1_thd3~0_267) (= v_~x$mem_tmp~0_40 0) (= v_~x$r_buff1_thd1~0_428 0) (= 0 v_~x$w_buff0~0_403) (= v_~x$r_buff0_thd0~0_156 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_16|, #valid=|v_#valid_66|, #memory_int=|v_#memory_int_24|, #length=|v_#length_24|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_403, ULTIMATE.start_main_~#t2084~0.base=|v_ULTIMATE.start_main_~#t2084~0.base_23|, ~x$flush_delayed~0=v_~x$flush_delayed~0_62, #NULL.offset=|v_#NULL.offset_4|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_428, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_148, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_40|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_34|, ULTIMATE.start_main_~#t2084~0.offset=|v_ULTIMATE.start_main_~#t2084~0.offset_14|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_85, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_68, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_156, ~x$w_buff1~0=v_~x$w_buff1~0_328, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_624, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_264, ULTIMATE.start_main_~#t2083~0.offset=|v_ULTIMATE.start_main_~#t2083~0.offset_22|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ~weak$$choice0~0=v_~weak$$choice0~0_37, #StackHeapBarrier=|v_#StackHeapBarrier_16|, ULTIMATE.start_main_~#t2082~0.offset=|v_ULTIMATE.start_main_~#t2082~0.offset_22|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_95, ~x~0=v_~x~0_240, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_362, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_114|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_267, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_53, ~x$mem_tmp~0=v_~x$mem_tmp~0_40, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_51|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_60|, ULTIMATE.start_main_~#t2082~0.base=|v_ULTIMATE.start_main_~#t2082~0.base_30|, ~y~0=v_~y~0_226, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_15|, ULTIMATE.start_main_~#t2083~0.base=|v_ULTIMATE.start_main_~#t2083~0.base_31|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_42, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_309, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_323, #NULL.base=|v_#NULL.base_4|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_913, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_62|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_23|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_8|, ~z~0=v_~z~0_95, ~weak$$choice2~0=v_~weak$$choice2~0_201, ~x$read_delayed~0=v_~x$read_delayed~0_7} AuxVars[] AssignedVars[~x$w_buff0~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_~#t2084~0.base, ~x$flush_delayed~0, #NULL.offset, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~x$r_buff1_thd1~0, ~main$tmp_guard1~0, ~x$r_buff0_thd3~0, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_~#t2084~0.offset, ~__unbuffered_p0_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t2082~0.base, ~y~0, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~nondet40, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_~#t2083~0.offset, ULTIMATE.start_main_~#t2083~0.base, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ~x$read_delayed_var~0.base, #NULL.base, ~x$w_buff0_used~0, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_~#t2082~0.offset, ULTIMATE.start_main_#t~nondet38, #memory_int, ~__unbuffered_cnt~0, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ~x~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 18:16:54,346 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L818-1-->L820: Formula: (and (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t2083~0.base_10| 1)) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t2083~0.base_10|)) (not (= |v_ULTIMATE.start_main_~#t2083~0.base_10| 0)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t2083~0.base_10| 4)) (= |v_ULTIMATE.start_main_~#t2083~0.offset_9| 0) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2083~0.base_10| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2083~0.base_10|) |v_ULTIMATE.start_main_~#t2083~0.offset_9| 1)) |v_#memory_int_15|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2083~0.base_10|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_4|, #length=|v_#length_15|, ULTIMATE.start_main_~#t2083~0.base=|v_ULTIMATE.start_main_~#t2083~0.base_10|, ULTIMATE.start_main_~#t2083~0.offset=|v_ULTIMATE.start_main_~#t2083~0.offset_9|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length, ULTIMATE.start_main_~#t2083~0.base, ULTIMATE.start_main_~#t2083~0.offset] because there is no mapped edge [2019-12-07 18:16:54,346 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [675] [675] P1ENTRY-->L5-3: Formula: (and (= v_~x$w_buff0~0_21 v_~x$w_buff1~0_19) (= v_P1Thread1of1ForFork0_~arg.base_4 |v_P1Thread1of1ForFork0_#in~arg.base_6|) (= v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_6 |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_4|) (not (= 0 v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_6)) (= v_~x$w_buff1_used~0_52 v_~x$w_buff0_used~0_98) (= |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_4| (ite (not (and (not (= 0 (mod v_~x$w_buff0_used~0_97 256))) (not (= 0 (mod v_~x$w_buff1_used~0_52 256))))) 1 0)) (= v_P1Thread1of1ForFork0_~arg.offset_4 |v_P1Thread1of1ForFork0_#in~arg.offset_6|) (= 1 v_~x$w_buff0_used~0_97) (= 1 v_~x$w_buff0~0_20)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_21, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_6|, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_6|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_98} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_20, P1Thread1of1ForFork0___VERIFIER_assert_~expression=v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_6, P1Thread1of1ForFork0_~arg.offset=v_P1Thread1of1ForFork0_~arg.offset_4, P1Thread1of1ForFork0_~arg.base=v_P1Thread1of1ForFork0_~arg.base_4, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_6|, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_4|, ~x$w_buff1~0=v_~x$w_buff1~0_19, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_6|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_52, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_97} AuxVars[] AssignedVars[~x$w_buff0~0, P1Thread1of1ForFork0___VERIFIER_assert_~expression, P1Thread1of1ForFork0_~arg.offset, P1Thread1of1ForFork0_~arg.base, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 18:16:54,347 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L820-1-->L822: Formula: (and (= (select |v_#valid_28| |v_ULTIMATE.start_main_~#t2084~0.base_11|) 0) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t2084~0.base_11|) (= |v_ULTIMATE.start_main_~#t2084~0.offset_10| 0) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t2084~0.base_11| 4)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2084~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2084~0.base_11|) |v_ULTIMATE.start_main_~#t2084~0.offset_10| 2)) |v_#memory_int_13|) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t2084~0.base_11| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t2084~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_14|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t2084~0.offset=|v_ULTIMATE.start_main_~#t2084~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t2084~0.base=|v_ULTIMATE.start_main_~#t2084~0.base_11|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_13|, #length=|v_#length_13|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2084~0.offset, ULTIMATE.start_main_~#t2084~0.base, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet39] because there is no mapped edge [2019-12-07 18:16:54,348 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [753] [753] L795-2-->L795-4: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In-815069477 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd3~0_In-815069477 256)))) (or (and (= |P2Thread1of1ForFork1_#t~ite32_Out-815069477| ~x$w_buff1~0_In-815069477) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork1_#t~ite32_Out-815069477| ~x~0_In-815069477)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-815069477, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-815069477, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-815069477, ~x~0=~x~0_In-815069477} OutVars{P2Thread1of1ForFork1_#t~ite32=|P2Thread1of1ForFork1_#t~ite32_Out-815069477|, ~x$w_buff1~0=~x$w_buff1~0_In-815069477, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-815069477, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-815069477, ~x~0=~x~0_In-815069477} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32] because there is no mapped edge [2019-12-07 18:16:54,348 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [677] [677] L795-4-->L796: Formula: (= v_~x~0_21 |v_P2Thread1of1ForFork1_#t~ite32_8|) InVars {P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_8|} OutVars{P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_7|, P2Thread1of1ForFork1_#t~ite33=|v_P2Thread1of1ForFork1_#t~ite33_11|, ~x~0=v_~x~0_21} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32, P2Thread1of1ForFork1_#t~ite33, ~x~0] because there is no mapped edge [2019-12-07 18:16:54,348 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] L796-->L796-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1765574060 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In-1765574060 256)))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork1_#t~ite34_Out-1765574060|) (not .cse1)) (and (or .cse1 .cse0) (= ~x$w_buff0_used~0_In-1765574060 |P2Thread1of1ForFork1_#t~ite34_Out-1765574060|)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1765574060, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1765574060} OutVars{P2Thread1of1ForFork1_#t~ite34=|P2Thread1of1ForFork1_#t~ite34_Out-1765574060|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1765574060, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1765574060} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-12-07 18:16:54,349 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [746] [746] L776-->L776-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In-1817595042 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1817595042 256)))) (or (and (= |P1Thread1of1ForFork0_#t~ite28_Out-1817595042| 0) (not .cse0) (not .cse1)) (and (= |P1Thread1of1ForFork0_#t~ite28_Out-1817595042| ~x$w_buff0_used~0_In-1817595042) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1817595042, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1817595042} OutVars{~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1817595042, P1Thread1of1ForFork0_#t~ite28=|P1Thread1of1ForFork0_#t~ite28_Out-1817595042|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1817595042} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite28] because there is no mapped edge [2019-12-07 18:16:54,349 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [738] [738] L777-->L777-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-1431393980 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1431393980 256))) (.cse3 (= (mod ~x$w_buff1_used~0_In-1431393980 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd2~0_In-1431393980 256)))) (or (and (= |P1Thread1of1ForFork0_#t~ite29_Out-1431393980| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse3 .cse2) (= ~x$w_buff1_used~0_In-1431393980 |P1Thread1of1ForFork0_#t~ite29_Out-1431393980|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1431393980, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1431393980, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1431393980, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1431393980} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-1431393980, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1431393980, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1431393980, P1Thread1of1ForFork0_#t~ite29=|P1Thread1of1ForFork0_#t~ite29_Out-1431393980|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1431393980} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 18:16:54,350 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L778-->L779: Formula: (let ((.cse0 (= ~x$r_buff0_thd2~0_Out-429232852 ~x$r_buff0_thd2~0_In-429232852)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-429232852 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In-429232852 256)))) (or (and .cse0 .cse1) (and .cse0 .cse2) (and (not .cse1) (not .cse2) (= ~x$r_buff0_thd2~0_Out-429232852 0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-429232852, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-429232852} OutVars{P1Thread1of1ForFork0_#t~ite30=|P1Thread1of1ForFork0_#t~ite30_Out-429232852|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-429232852, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-429232852} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite30, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 18:16:54,350 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] L779-->L779-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd2~0_In-2023852744 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In-2023852744 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In-2023852744 256))) (.cse3 (= (mod ~x$w_buff0_used~0_In-2023852744 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork0_#t~ite31_Out-2023852744| ~x$r_buff1_thd2~0_In-2023852744) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork0_#t~ite31_Out-2023852744| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-2023852744, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-2023852744, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-2023852744, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2023852744} OutVars{P1Thread1of1ForFork0_#t~ite31=|P1Thread1of1ForFork0_#t~ite31_Out-2023852744|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2023852744, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-2023852744, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-2023852744, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2023852744} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 18:16:54,350 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L779-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_52 1) v_~__unbuffered_cnt~0_51) (= v_~x$r_buff1_thd2~0_46 |v_P1Thread1of1ForFork0_#t~ite31_28|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|)) InVars {P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_52} OutVars{P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_27|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_46, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_51, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 18:16:54,350 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L740-->L740-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In2106437361 256) 0))) (or (and (not .cse0) (= ~x$w_buff0~0_In2106437361 |P0Thread1of1ForFork2_#t~ite9_Out2106437361|) (= |P0Thread1of1ForFork2_#t~ite8_In2106437361| |P0Thread1of1ForFork2_#t~ite8_Out2106437361|)) (and (= ~x$w_buff0~0_In2106437361 |P0Thread1of1ForFork2_#t~ite8_Out2106437361|) .cse0 (= |P0Thread1of1ForFork2_#t~ite9_Out2106437361| |P0Thread1of1ForFork2_#t~ite8_Out2106437361|) (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In2106437361 256) 0))) (or (and (= (mod ~x$w_buff1_used~0_In2106437361 256) 0) .cse1) (and (= 0 (mod ~x$r_buff1_thd1~0_In2106437361 256)) .cse1) (= 0 (mod ~x$w_buff0_used~0_In2106437361 256))))))) InVars {~x$w_buff0~0=~x$w_buff0~0_In2106437361, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2106437361, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_In2106437361|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2106437361, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In2106437361, ~weak$$choice2~0=~weak$$choice2~0_In2106437361, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2106437361} OutVars{~x$w_buff0~0=~x$w_buff0~0_In2106437361, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2106437361, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_Out2106437361|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2106437361, P0Thread1of1ForFork2_#t~ite9=|P0Thread1of1ForFork2_#t~ite9_Out2106437361|, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In2106437361, ~weak$$choice2~0=~weak$$choice2~0_In2106437361, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2106437361} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite8, P0Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 18:16:54,351 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L797-->L797-2: Formula: (let ((.cse2 (= (mod ~x$w_buff1_used~0_In653127804 256) 0)) (.cse3 (= (mod ~x$r_buff1_thd3~0_In653127804 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In653127804 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In653127804 256) 0))) (or (and (= 0 |P2Thread1of1ForFork1_#t~ite35_Out653127804|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~x$w_buff1_used~0_In653127804 |P2Thread1of1ForFork1_#t~ite35_Out653127804|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In653127804, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In653127804, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In653127804, ~x$w_buff0_used~0=~x$w_buff0_used~0_In653127804} OutVars{P2Thread1of1ForFork1_#t~ite35=|P2Thread1of1ForFork1_#t~ite35_Out653127804|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In653127804, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In653127804, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In653127804, ~x$w_buff0_used~0=~x$w_buff0_used~0_In653127804} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite35] because there is no mapped edge [2019-12-07 18:16:54,352 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [744] [744] L798-->L798-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In1408993447 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In1408993447 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork1_#t~ite36_Out1408993447| ~x$r_buff0_thd3~0_In1408993447)) (and (not .cse0) (= |P2Thread1of1ForFork1_#t~ite36_Out1408993447| 0) (not .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1408993447, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1408993447} OutVars{P2Thread1of1ForFork1_#t~ite36=|P2Thread1of1ForFork1_#t~ite36_Out1408993447|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1408993447, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1408993447} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-12-07 18:16:54,352 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [748] [748] L799-->L799-2: Formula: (let ((.cse3 (= (mod ~x$w_buff1_used~0_In1203047304 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd3~0_In1203047304 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1203047304 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In1203047304 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork1_#t~ite37_Out1203047304| ~x$r_buff1_thd3~0_In1203047304)) (and (= |P2Thread1of1ForFork1_#t~ite37_Out1203047304| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1203047304, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1203047304, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1203047304, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1203047304} OutVars{P2Thread1of1ForFork1_#t~ite37=|P2Thread1of1ForFork1_#t~ite37_Out1203047304|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1203047304, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1203047304, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1203047304, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1203047304} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-12-07 18:16:54,352 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L799-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|) (= v_~x$r_buff1_thd3~0_48 |v_P2Thread1of1ForFork1_#t~ite37_28|) (= (+ v_~__unbuffered_cnt~0_64 1) v_~__unbuffered_cnt~0_63)) InVars {P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_64} OutVars{P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_27|, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_48, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37, P2Thread1of1ForFork1_#res.base, ~x$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 18:16:54,353 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L743-->L743-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In456595102 256)))) (or (and (let ((.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In456595102 256)))) (or (= 0 (mod ~x$w_buff0_used~0_In456595102 256)) (and .cse0 (= 0 (mod ~x$r_buff1_thd1~0_In456595102 256))) (and .cse0 (= (mod ~x$w_buff1_used~0_In456595102 256) 0)))) .cse1 (= |P0Thread1of1ForFork2_#t~ite17_Out456595102| ~x$w_buff1_used~0_In456595102) (= |P0Thread1of1ForFork2_#t~ite18_Out456595102| |P0Thread1of1ForFork2_#t~ite17_Out456595102|)) (and (= |P0Thread1of1ForFork2_#t~ite17_In456595102| |P0Thread1of1ForFork2_#t~ite17_Out456595102|) (= |P0Thread1of1ForFork2_#t~ite18_Out456595102| ~x$w_buff1_used~0_In456595102) (not .cse1)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In456595102, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_In456595102|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In456595102, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In456595102, ~weak$$choice2~0=~weak$$choice2~0_In456595102, ~x$w_buff0_used~0=~x$w_buff0_used~0_In456595102} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In456595102, P0Thread1of1ForFork2_#t~ite18=|P0Thread1of1ForFork2_#t~ite18_Out456595102|, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_Out456595102|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In456595102, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In456595102, ~weak$$choice2~0=~weak$$choice2~0_In456595102, ~x$w_buff0_used~0=~x$w_buff0_used~0_In456595102} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite18, P0Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 18:16:54,353 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [730] [730] L744-->L745: Formula: (and (= v_~x$r_buff0_thd1~0_101 v_~x$r_buff0_thd1~0_100) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_101, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{P0Thread1of1ForFork2_#t~ite20=|v_P0Thread1of1ForFork2_#t~ite20_9|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_100, P0Thread1of1ForFork2_#t~ite19=|v_P0Thread1of1ForFork2_#t~ite19_6|, ~weak$$choice2~0=v_~weak$$choice2~0_39, P0Thread1of1ForFork2_#t~ite21=|v_P0Thread1of1ForFork2_#t~ite21_7|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite20, ~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite19, P0Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 18:16:54,353 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L745-->L745-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-724272542 256) 0))) (or (and (let ((.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In-724272542 256)))) (or (and (= (mod ~x$r_buff1_thd1~0_In-724272542 256) 0) .cse0) (and (= (mod ~x$w_buff1_used~0_In-724272542 256) 0) .cse0) (= (mod ~x$w_buff0_used~0_In-724272542 256) 0))) (= |P0Thread1of1ForFork2_#t~ite23_Out-724272542| ~x$r_buff1_thd1~0_In-724272542) (= |P0Thread1of1ForFork2_#t~ite23_Out-724272542| |P0Thread1of1ForFork2_#t~ite24_Out-724272542|) .cse1) (and (not .cse1) (= |P0Thread1of1ForFork2_#t~ite24_Out-724272542| ~x$r_buff1_thd1~0_In-724272542) (= |P0Thread1of1ForFork2_#t~ite23_In-724272542| |P0Thread1of1ForFork2_#t~ite23_Out-724272542|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-724272542, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-724272542, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-724272542, ~weak$$choice2~0=~weak$$choice2~0_In-724272542, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_In-724272542|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-724272542} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-724272542, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-724272542, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-724272542, P0Thread1of1ForFork2_#t~ite24=|P0Thread1of1ForFork2_#t~ite24_Out-724272542|, ~weak$$choice2~0=~weak$$choice2~0_In-724272542, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_Out-724272542|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-724272542} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite24, P0Thread1of1ForFork2_#t~ite23] because there is no mapped edge [2019-12-07 18:16:54,354 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [704] [704] L747-->L755: Formula: (and (= v_~x$flush_delayed~0_17 0) (not (= (mod v_~x$flush_delayed~0_18 256) 0)) (= v_~x~0_34 v_~x$mem_tmp~0_10) (= v_~__unbuffered_cnt~0_30 (+ v_~__unbuffered_cnt~0_31 1))) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_18, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_31, ~x$mem_tmp~0=v_~x$mem_tmp~0_10} OutVars{P0Thread1of1ForFork2_#t~ite25=|v_P0Thread1of1ForFork2_#t~ite25_13|, ~x$flush_delayed~0=v_~x$flush_delayed~0_17, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_30, ~x$mem_tmp~0=v_~x$mem_tmp~0_10, ~x~0=v_~x~0_34} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite25, ~x$flush_delayed~0, ~__unbuffered_cnt~0, ~x~0] because there is no mapped edge [2019-12-07 18:16:54,354 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [699] [699] L826-->L828-2: Formula: (and (or (= 0 (mod v_~x$w_buff0_used~0_158 256)) (= 0 (mod v_~x$r_buff0_thd0~0_26 256))) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_26, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_158} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_26, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_158} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 18:16:54,354 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L828-2-->L828-4: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In-2127838219 256))) (.cse1 (= (mod ~x$r_buff1_thd0~0_In-2127838219 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite41_Out-2127838219| ~x$w_buff1~0_In-2127838219)) (and (= |ULTIMATE.start_main_#t~ite41_Out-2127838219| ~x~0_In-2127838219) (or .cse0 .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-2127838219, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2127838219, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-2127838219, ~x~0=~x~0_In-2127838219} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out-2127838219|, ~x$w_buff1~0=~x$w_buff1~0_In-2127838219, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2127838219, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-2127838219, ~x~0=~x~0_In-2127838219} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41] because there is no mapped edge [2019-12-07 18:16:54,354 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L828-4-->L829: Formula: (= v_~x~0_24 |v_ULTIMATE.start_main_#t~ite41_11|) InVars {ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_11|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_10|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_6|, ~x~0=v_~x~0_24} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite42, ~x~0] because there is no mapped edge [2019-12-07 18:16:54,354 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [743] [743] L829-->L829-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In669139396 256))) (.cse1 (= (mod ~x$r_buff0_thd0~0_In669139396 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite43_Out669139396| 0) (not .cse0) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite43_Out669139396| ~x$w_buff0_used~0_In669139396) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In669139396, ~x$w_buff0_used~0=~x$w_buff0_used~0_In669139396} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In669139396, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out669139396|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In669139396} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-12-07 18:16:54,355 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [747] [747] L830-->L830-2: Formula: (let ((.cse3 (= 0 (mod ~x$w_buff0_used~0_In855127817 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd0~0_In855127817 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd0~0_In855127817 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In855127817 256)))) (or (and (= |ULTIMATE.start_main_#t~ite44_Out855127817| ~x$w_buff1_used~0_In855127817) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= 0 |ULTIMATE.start_main_#t~ite44_Out855127817|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In855127817, ~x$w_buff1_used~0=~x$w_buff1_used~0_In855127817, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In855127817, ~x$w_buff0_used~0=~x$w_buff0_used~0_In855127817} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In855127817, ~x$w_buff1_used~0=~x$w_buff1_used~0_In855127817, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In855127817, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out855127817|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In855127817} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 18:16:54,355 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [750] [750] L831-->L831-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-1830178565 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1830178565 256)))) (or (and (or .cse0 .cse1) (= ~x$r_buff0_thd0~0_In-1830178565 |ULTIMATE.start_main_#t~ite45_Out-1830178565|)) (and (= 0 |ULTIMATE.start_main_#t~ite45_Out-1830178565|) (not .cse1) (not .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1830178565, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1830178565} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1830178565, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-1830178565|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1830178565} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 18:16:54,355 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L832-->L832-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In813073823 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In813073823 256))) (.cse3 (= 0 (mod ~x$r_buff0_thd0~0_In813073823 256))) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In813073823 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite46_Out813073823|)) (and (or .cse0 .cse1) (or .cse3 .cse2) (= ~x$r_buff1_thd0~0_In813073823 |ULTIMATE.start_main_#t~ite46_Out813073823|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In813073823, ~x$w_buff1_used~0=~x$w_buff1_used~0_In813073823, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In813073823, ~x$w_buff0_used~0=~x$w_buff0_used~0_In813073823} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In813073823, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out813073823|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In813073823, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In813073823, ~x$w_buff0_used~0=~x$w_buff0_used~0_In813073823} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 18:16:54,356 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L832-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_25 (ite (= (ite (not (and (= v_~z~0_60 2) (= 1 v_~__unbuffered_p2_EAX~0_35) (= 0 v_~__unbuffered_p0_EAX~0_54))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 0) (= v_~x$r_buff1_thd0~0_277 |v_ULTIMATE.start_main_#t~ite46_60|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15| (mod v_~main$tmp_guard1~0_25 256))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_54, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_60|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_35, ~z~0=v_~z~0_60} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_54, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_22, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_59|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_35, ~z~0=v_~z~0_60, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_277, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ~x$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:16:54,404 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 06:16:54 BasicIcfg [2019-12-07 18:16:54,404 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 18:16:54,404 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 18:16:54,404 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 18:16:54,404 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 18:16:54,405 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:14:02" (3/4) ... [2019-12-07 18:16:54,407 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 18:16:54,407 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [807] [807] ULTIMATE.startENTRY-->L818: Formula: (let ((.cse0 (store |v_#valid_66| 0 0))) (and (= 0 v_~__unbuffered_cnt~0_95) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t2082~0.base_30| 4)) (= 0 v_~x~0_240) (= v_~x$r_buff1_thd0~0_309 0) (= v_~weak$$choice2~0_201 0) (= 0 v_~x$w_buff1_used~0_624) (= 0 v_~x$r_buff1_thd2~0_264) (= v_~y~0_226 0) (= v_~z~0_95 0) (< 0 |v_#StackHeapBarrier_16|) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t2082~0.base_30|)) (= |v_#valid_64| (store .cse0 |v_ULTIMATE.start_main_~#t2082~0.base_30| 1)) (= 0 v_~x$read_delayed_var~0.base_7) (= 0 v_~x$r_buff0_thd3~0_148) (= 0 v_~x$w_buff1~0_328) (= |v_ULTIMATE.start_main_~#t2082~0.offset_22| 0) (= 0 v_~x$r_buff0_thd2~0_323) (= v_~x$flush_delayed~0_62 0) (= 0 v_~x$w_buff0_used~0_913) (= 0 |v_#NULL.base_4|) (= 0 v_~x$read_delayed~0_7) (= v_~x$r_buff0_thd1~0_362 0) (= 0 v_~weak$$choice0~0_37) (= v_~main$tmp_guard1~0_53 0) (= v_~main$tmp_guard0~0_42 0) (= 0 v_~__unbuffered_p0_EAX~0_85) (= 0 v_~__unbuffered_p2_EAX~0_68) (= |v_#NULL.offset_4| 0) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t2082~0.base_30| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t2082~0.base_30|) |v_ULTIMATE.start_main_~#t2082~0.offset_22| 0)) |v_#memory_int_23|) (< |v_#StackHeapBarrier_16| |v_ULTIMATE.start_main_~#t2082~0.base_30|) (= 0 v_~x$read_delayed_var~0.offset_7) (= 0 v_~x$r_buff1_thd3~0_267) (= v_~x$mem_tmp~0_40 0) (= v_~x$r_buff1_thd1~0_428 0) (= 0 v_~x$w_buff0~0_403) (= v_~x$r_buff0_thd0~0_156 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_16|, #valid=|v_#valid_66|, #memory_int=|v_#memory_int_24|, #length=|v_#length_24|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_403, ULTIMATE.start_main_~#t2084~0.base=|v_ULTIMATE.start_main_~#t2084~0.base_23|, ~x$flush_delayed~0=v_~x$flush_delayed~0_62, #NULL.offset=|v_#NULL.offset_4|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_428, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_148, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_40|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_34|, ULTIMATE.start_main_~#t2084~0.offset=|v_ULTIMATE.start_main_~#t2084~0.offset_14|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_85, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_68, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_156, ~x$w_buff1~0=v_~x$w_buff1~0_328, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_624, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_264, ULTIMATE.start_main_~#t2083~0.offset=|v_ULTIMATE.start_main_~#t2083~0.offset_22|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ~weak$$choice0~0=v_~weak$$choice0~0_37, #StackHeapBarrier=|v_#StackHeapBarrier_16|, ULTIMATE.start_main_~#t2082~0.offset=|v_ULTIMATE.start_main_~#t2082~0.offset_22|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_95, ~x~0=v_~x~0_240, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_362, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_114|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_267, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_53, ~x$mem_tmp~0=v_~x$mem_tmp~0_40, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_51|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_60|, ULTIMATE.start_main_~#t2082~0.base=|v_ULTIMATE.start_main_~#t2082~0.base_30|, ~y~0=v_~y~0_226, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_15|, ULTIMATE.start_main_~#t2083~0.base=|v_ULTIMATE.start_main_~#t2083~0.base_31|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_42, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_309, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_323, #NULL.base=|v_#NULL.base_4|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_913, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_62|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_23|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_8|, ~z~0=v_~z~0_95, ~weak$$choice2~0=v_~weak$$choice2~0_201, ~x$read_delayed~0=v_~x$read_delayed~0_7} AuxVars[] AssignedVars[~x$w_buff0~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_~#t2084~0.base, ~x$flush_delayed~0, #NULL.offset, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~x$r_buff1_thd1~0, ~main$tmp_guard1~0, ~x$r_buff0_thd3~0, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_~#t2084~0.offset, ~__unbuffered_p0_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t2082~0.base, ~y~0, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~nondet40, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_~#t2083~0.offset, ULTIMATE.start_main_~#t2083~0.base, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ~x$read_delayed_var~0.base, #NULL.base, ~x$w_buff0_used~0, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_~#t2082~0.offset, ULTIMATE.start_main_#t~nondet38, #memory_int, ~__unbuffered_cnt~0, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ~x~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 18:16:54,407 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L818-1-->L820: Formula: (and (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t2083~0.base_10| 1)) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t2083~0.base_10|)) (not (= |v_ULTIMATE.start_main_~#t2083~0.base_10| 0)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t2083~0.base_10| 4)) (= |v_ULTIMATE.start_main_~#t2083~0.offset_9| 0) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2083~0.base_10| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2083~0.base_10|) |v_ULTIMATE.start_main_~#t2083~0.offset_9| 1)) |v_#memory_int_15|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2083~0.base_10|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_4|, #length=|v_#length_15|, ULTIMATE.start_main_~#t2083~0.base=|v_ULTIMATE.start_main_~#t2083~0.base_10|, ULTIMATE.start_main_~#t2083~0.offset=|v_ULTIMATE.start_main_~#t2083~0.offset_9|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length, ULTIMATE.start_main_~#t2083~0.base, ULTIMATE.start_main_~#t2083~0.offset] because there is no mapped edge [2019-12-07 18:16:54,408 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [675] [675] P1ENTRY-->L5-3: Formula: (and (= v_~x$w_buff0~0_21 v_~x$w_buff1~0_19) (= v_P1Thread1of1ForFork0_~arg.base_4 |v_P1Thread1of1ForFork0_#in~arg.base_6|) (= v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_6 |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_4|) (not (= 0 v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_6)) (= v_~x$w_buff1_used~0_52 v_~x$w_buff0_used~0_98) (= |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_4| (ite (not (and (not (= 0 (mod v_~x$w_buff0_used~0_97 256))) (not (= 0 (mod v_~x$w_buff1_used~0_52 256))))) 1 0)) (= v_P1Thread1of1ForFork0_~arg.offset_4 |v_P1Thread1of1ForFork0_#in~arg.offset_6|) (= 1 v_~x$w_buff0_used~0_97) (= 1 v_~x$w_buff0~0_20)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_21, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_6|, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_6|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_98} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_20, P1Thread1of1ForFork0___VERIFIER_assert_~expression=v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_6, P1Thread1of1ForFork0_~arg.offset=v_P1Thread1of1ForFork0_~arg.offset_4, P1Thread1of1ForFork0_~arg.base=v_P1Thread1of1ForFork0_~arg.base_4, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_6|, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_4|, ~x$w_buff1~0=v_~x$w_buff1~0_19, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_6|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_52, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_97} AuxVars[] AssignedVars[~x$w_buff0~0, P1Thread1of1ForFork0___VERIFIER_assert_~expression, P1Thread1of1ForFork0_~arg.offset, P1Thread1of1ForFork0_~arg.base, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 18:16:54,408 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L820-1-->L822: Formula: (and (= (select |v_#valid_28| |v_ULTIMATE.start_main_~#t2084~0.base_11|) 0) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t2084~0.base_11|) (= |v_ULTIMATE.start_main_~#t2084~0.offset_10| 0) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t2084~0.base_11| 4)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2084~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2084~0.base_11|) |v_ULTIMATE.start_main_~#t2084~0.offset_10| 2)) |v_#memory_int_13|) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t2084~0.base_11| 1)) (not (= 0 |v_ULTIMATE.start_main_~#t2084~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_14|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t2084~0.offset=|v_ULTIMATE.start_main_~#t2084~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t2084~0.base=|v_ULTIMATE.start_main_~#t2084~0.base_11|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_13|, #length=|v_#length_13|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2084~0.offset, ULTIMATE.start_main_~#t2084~0.base, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet39] because there is no mapped edge [2019-12-07 18:16:54,409 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [753] [753] L795-2-->L795-4: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff1_used~0_In-815069477 256))) (.cse0 (= 0 (mod ~x$r_buff1_thd3~0_In-815069477 256)))) (or (and (= |P2Thread1of1ForFork1_#t~ite32_Out-815069477| ~x$w_buff1~0_In-815069477) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork1_#t~ite32_Out-815069477| ~x~0_In-815069477)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-815069477, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-815069477, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-815069477, ~x~0=~x~0_In-815069477} OutVars{P2Thread1of1ForFork1_#t~ite32=|P2Thread1of1ForFork1_#t~ite32_Out-815069477|, ~x$w_buff1~0=~x$w_buff1~0_In-815069477, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-815069477, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-815069477, ~x~0=~x~0_In-815069477} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32] because there is no mapped edge [2019-12-07 18:16:54,409 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [677] [677] L795-4-->L796: Formula: (= v_~x~0_21 |v_P2Thread1of1ForFork1_#t~ite32_8|) InVars {P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_8|} OutVars{P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_7|, P2Thread1of1ForFork1_#t~ite33=|v_P2Thread1of1ForFork1_#t~ite33_11|, ~x~0=v_~x~0_21} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32, P2Thread1of1ForFork1_#t~ite33, ~x~0] because there is no mapped edge [2019-12-07 18:16:54,409 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] L796-->L796-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1765574060 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd3~0_In-1765574060 256)))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork1_#t~ite34_Out-1765574060|) (not .cse1)) (and (or .cse1 .cse0) (= ~x$w_buff0_used~0_In-1765574060 |P2Thread1of1ForFork1_#t~ite34_Out-1765574060|)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1765574060, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1765574060} OutVars{P2Thread1of1ForFork1_#t~ite34=|P2Thread1of1ForFork1_#t~ite34_Out-1765574060|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1765574060, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1765574060} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-12-07 18:16:54,410 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [746] [746] L776-->L776-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd2~0_In-1817595042 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1817595042 256)))) (or (and (= |P1Thread1of1ForFork0_#t~ite28_Out-1817595042| 0) (not .cse0) (not .cse1)) (and (= |P1Thread1of1ForFork0_#t~ite28_Out-1817595042| ~x$w_buff0_used~0_In-1817595042) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1817595042, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1817595042} OutVars{~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1817595042, P1Thread1of1ForFork0_#t~ite28=|P1Thread1of1ForFork0_#t~ite28_Out-1817595042|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1817595042} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite28] because there is no mapped edge [2019-12-07 18:16:54,410 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [738] [738] L777-->L777-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-1431393980 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1431393980 256))) (.cse3 (= (mod ~x$w_buff1_used~0_In-1431393980 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd2~0_In-1431393980 256)))) (or (and (= |P1Thread1of1ForFork0_#t~ite29_Out-1431393980| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse3 .cse2) (= ~x$w_buff1_used~0_In-1431393980 |P1Thread1of1ForFork0_#t~ite29_Out-1431393980|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-1431393980, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1431393980, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1431393980, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1431393980} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-1431393980, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-1431393980, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1431393980, P1Thread1of1ForFork0_#t~ite29=|P1Thread1of1ForFork0_#t~ite29_Out-1431393980|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1431393980} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 18:16:54,411 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L778-->L779: Formula: (let ((.cse0 (= ~x$r_buff0_thd2~0_Out-429232852 ~x$r_buff0_thd2~0_In-429232852)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-429232852 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In-429232852 256)))) (or (and .cse0 .cse1) (and .cse0 .cse2) (and (not .cse1) (not .cse2) (= ~x$r_buff0_thd2~0_Out-429232852 0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-429232852, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-429232852} OutVars{P1Thread1of1ForFork0_#t~ite30=|P1Thread1of1ForFork0_#t~ite30_Out-429232852|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-429232852, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-429232852} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite30, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 18:16:54,411 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] L779-->L779-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd2~0_In-2023852744 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In-2023852744 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In-2023852744 256))) (.cse3 (= (mod ~x$w_buff0_used~0_In-2023852744 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork0_#t~ite31_Out-2023852744| ~x$r_buff1_thd2~0_In-2023852744) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork0_#t~ite31_Out-2023852744| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-2023852744, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-2023852744, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-2023852744, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2023852744} OutVars{P1Thread1of1ForFork0_#t~ite31=|P1Thread1of1ForFork0_#t~ite31_Out-2023852744|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2023852744, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-2023852744, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-2023852744, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2023852744} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 18:16:54,411 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L779-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_52 1) v_~__unbuffered_cnt~0_51) (= v_~x$r_buff1_thd2~0_46 |v_P1Thread1of1ForFork0_#t~ite31_28|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|)) InVars {P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_52} OutVars{P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_27|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_46, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_51, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 18:16:54,411 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L740-->L740-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In2106437361 256) 0))) (or (and (not .cse0) (= ~x$w_buff0~0_In2106437361 |P0Thread1of1ForFork2_#t~ite9_Out2106437361|) (= |P0Thread1of1ForFork2_#t~ite8_In2106437361| |P0Thread1of1ForFork2_#t~ite8_Out2106437361|)) (and (= ~x$w_buff0~0_In2106437361 |P0Thread1of1ForFork2_#t~ite8_Out2106437361|) .cse0 (= |P0Thread1of1ForFork2_#t~ite9_Out2106437361| |P0Thread1of1ForFork2_#t~ite8_Out2106437361|) (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In2106437361 256) 0))) (or (and (= (mod ~x$w_buff1_used~0_In2106437361 256) 0) .cse1) (and (= 0 (mod ~x$r_buff1_thd1~0_In2106437361 256)) .cse1) (= 0 (mod ~x$w_buff0_used~0_In2106437361 256))))))) InVars {~x$w_buff0~0=~x$w_buff0~0_In2106437361, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2106437361, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_In2106437361|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2106437361, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In2106437361, ~weak$$choice2~0=~weak$$choice2~0_In2106437361, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2106437361} OutVars{~x$w_buff0~0=~x$w_buff0~0_In2106437361, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In2106437361, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_Out2106437361|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In2106437361, P0Thread1of1ForFork2_#t~ite9=|P0Thread1of1ForFork2_#t~ite9_Out2106437361|, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In2106437361, ~weak$$choice2~0=~weak$$choice2~0_In2106437361, ~x$w_buff0_used~0=~x$w_buff0_used~0_In2106437361} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite8, P0Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 18:16:54,412 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L797-->L797-2: Formula: (let ((.cse2 (= (mod ~x$w_buff1_used~0_In653127804 256) 0)) (.cse3 (= (mod ~x$r_buff1_thd3~0_In653127804 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In653127804 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In653127804 256) 0))) (or (and (= 0 |P2Thread1of1ForFork1_#t~ite35_Out653127804|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~x$w_buff1_used~0_In653127804 |P2Thread1of1ForFork1_#t~ite35_Out653127804|)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In653127804, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In653127804, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In653127804, ~x$w_buff0_used~0=~x$w_buff0_used~0_In653127804} OutVars{P2Thread1of1ForFork1_#t~ite35=|P2Thread1of1ForFork1_#t~ite35_Out653127804|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In653127804, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In653127804, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In653127804, ~x$w_buff0_used~0=~x$w_buff0_used~0_In653127804} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite35] because there is no mapped edge [2019-12-07 18:16:54,413 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [744] [744] L798-->L798-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In1408993447 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In1408993447 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork1_#t~ite36_Out1408993447| ~x$r_buff0_thd3~0_In1408993447)) (and (not .cse0) (= |P2Thread1of1ForFork1_#t~ite36_Out1408993447| 0) (not .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1408993447, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1408993447} OutVars{P2Thread1of1ForFork1_#t~ite36=|P2Thread1of1ForFork1_#t~ite36_Out1408993447|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1408993447, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1408993447} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-12-07 18:16:54,413 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [748] [748] L799-->L799-2: Formula: (let ((.cse3 (= (mod ~x$w_buff1_used~0_In1203047304 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd3~0_In1203047304 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1203047304 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In1203047304 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork1_#t~ite37_Out1203047304| ~x$r_buff1_thd3~0_In1203047304)) (and (= |P2Thread1of1ForFork1_#t~ite37_Out1203047304| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1203047304, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1203047304, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1203047304, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1203047304} OutVars{P2Thread1of1ForFork1_#t~ite37=|P2Thread1of1ForFork1_#t~ite37_Out1203047304|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1203047304, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1203047304, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1203047304, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1203047304} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-12-07 18:16:54,413 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L799-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|) (= v_~x$r_buff1_thd3~0_48 |v_P2Thread1of1ForFork1_#t~ite37_28|) (= (+ v_~__unbuffered_cnt~0_64 1) v_~__unbuffered_cnt~0_63)) InVars {P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_64} OutVars{P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_27|, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_48, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37, P2Thread1of1ForFork1_#res.base, ~x$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 18:16:54,414 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L743-->L743-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In456595102 256)))) (or (and (let ((.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In456595102 256)))) (or (= 0 (mod ~x$w_buff0_used~0_In456595102 256)) (and .cse0 (= 0 (mod ~x$r_buff1_thd1~0_In456595102 256))) (and .cse0 (= (mod ~x$w_buff1_used~0_In456595102 256) 0)))) .cse1 (= |P0Thread1of1ForFork2_#t~ite17_Out456595102| ~x$w_buff1_used~0_In456595102) (= |P0Thread1of1ForFork2_#t~ite18_Out456595102| |P0Thread1of1ForFork2_#t~ite17_Out456595102|)) (and (= |P0Thread1of1ForFork2_#t~ite17_In456595102| |P0Thread1of1ForFork2_#t~ite17_Out456595102|) (= |P0Thread1of1ForFork2_#t~ite18_Out456595102| ~x$w_buff1_used~0_In456595102) (not .cse1)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In456595102, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_In456595102|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In456595102, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In456595102, ~weak$$choice2~0=~weak$$choice2~0_In456595102, ~x$w_buff0_used~0=~x$w_buff0_used~0_In456595102} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In456595102, P0Thread1of1ForFork2_#t~ite18=|P0Thread1of1ForFork2_#t~ite18_Out456595102|, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_Out456595102|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In456595102, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In456595102, ~weak$$choice2~0=~weak$$choice2~0_In456595102, ~x$w_buff0_used~0=~x$w_buff0_used~0_In456595102} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite18, P0Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 18:16:54,414 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [730] [730] L744-->L745: Formula: (and (= v_~x$r_buff0_thd1~0_101 v_~x$r_buff0_thd1~0_100) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_101, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{P0Thread1of1ForFork2_#t~ite20=|v_P0Thread1of1ForFork2_#t~ite20_9|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_100, P0Thread1of1ForFork2_#t~ite19=|v_P0Thread1of1ForFork2_#t~ite19_6|, ~weak$$choice2~0=v_~weak$$choice2~0_39, P0Thread1of1ForFork2_#t~ite21=|v_P0Thread1of1ForFork2_#t~ite21_7|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite20, ~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite19, P0Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 18:16:54,414 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L745-->L745-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-724272542 256) 0))) (or (and (let ((.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In-724272542 256)))) (or (and (= (mod ~x$r_buff1_thd1~0_In-724272542 256) 0) .cse0) (and (= (mod ~x$w_buff1_used~0_In-724272542 256) 0) .cse0) (= (mod ~x$w_buff0_used~0_In-724272542 256) 0))) (= |P0Thread1of1ForFork2_#t~ite23_Out-724272542| ~x$r_buff1_thd1~0_In-724272542) (= |P0Thread1of1ForFork2_#t~ite23_Out-724272542| |P0Thread1of1ForFork2_#t~ite24_Out-724272542|) .cse1) (and (not .cse1) (= |P0Thread1of1ForFork2_#t~ite24_Out-724272542| ~x$r_buff1_thd1~0_In-724272542) (= |P0Thread1of1ForFork2_#t~ite23_In-724272542| |P0Thread1of1ForFork2_#t~ite23_Out-724272542|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-724272542, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-724272542, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-724272542, ~weak$$choice2~0=~weak$$choice2~0_In-724272542, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_In-724272542|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-724272542} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-724272542, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-724272542, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-724272542, P0Thread1of1ForFork2_#t~ite24=|P0Thread1of1ForFork2_#t~ite24_Out-724272542|, ~weak$$choice2~0=~weak$$choice2~0_In-724272542, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_Out-724272542|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-724272542} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite24, P0Thread1of1ForFork2_#t~ite23] because there is no mapped edge [2019-12-07 18:16:54,415 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [704] [704] L747-->L755: Formula: (and (= v_~x$flush_delayed~0_17 0) (not (= (mod v_~x$flush_delayed~0_18 256) 0)) (= v_~x~0_34 v_~x$mem_tmp~0_10) (= v_~__unbuffered_cnt~0_30 (+ v_~__unbuffered_cnt~0_31 1))) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_18, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_31, ~x$mem_tmp~0=v_~x$mem_tmp~0_10} OutVars{P0Thread1of1ForFork2_#t~ite25=|v_P0Thread1of1ForFork2_#t~ite25_13|, ~x$flush_delayed~0=v_~x$flush_delayed~0_17, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_30, ~x$mem_tmp~0=v_~x$mem_tmp~0_10, ~x~0=v_~x~0_34} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite25, ~x$flush_delayed~0, ~__unbuffered_cnt~0, ~x~0] because there is no mapped edge [2019-12-07 18:16:54,415 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [699] [699] L826-->L828-2: Formula: (and (or (= 0 (mod v_~x$w_buff0_used~0_158 256)) (= 0 (mod v_~x$r_buff0_thd0~0_26 256))) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_26, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_158} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_26, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_158} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 18:16:54,415 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L828-2-->L828-4: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In-2127838219 256))) (.cse1 (= (mod ~x$r_buff1_thd0~0_In-2127838219 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite41_Out-2127838219| ~x$w_buff1~0_In-2127838219)) (and (= |ULTIMATE.start_main_#t~ite41_Out-2127838219| ~x~0_In-2127838219) (or .cse0 .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-2127838219, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2127838219, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-2127838219, ~x~0=~x~0_In-2127838219} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out-2127838219|, ~x$w_buff1~0=~x$w_buff1~0_In-2127838219, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2127838219, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-2127838219, ~x~0=~x~0_In-2127838219} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41] because there is no mapped edge [2019-12-07 18:16:54,415 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L828-4-->L829: Formula: (= v_~x~0_24 |v_ULTIMATE.start_main_#t~ite41_11|) InVars {ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_11|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_10|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_6|, ~x~0=v_~x~0_24} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite42, ~x~0] because there is no mapped edge [2019-12-07 18:16:54,415 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [743] [743] L829-->L829-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In669139396 256))) (.cse1 (= (mod ~x$r_buff0_thd0~0_In669139396 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite43_Out669139396| 0) (not .cse0) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite43_Out669139396| ~x$w_buff0_used~0_In669139396) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In669139396, ~x$w_buff0_used~0=~x$w_buff0_used~0_In669139396} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In669139396, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out669139396|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In669139396} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-12-07 18:16:54,416 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [747] [747] L830-->L830-2: Formula: (let ((.cse3 (= 0 (mod ~x$w_buff0_used~0_In855127817 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd0~0_In855127817 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd0~0_In855127817 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In855127817 256)))) (or (and (= |ULTIMATE.start_main_#t~ite44_Out855127817| ~x$w_buff1_used~0_In855127817) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= 0 |ULTIMATE.start_main_#t~ite44_Out855127817|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In855127817, ~x$w_buff1_used~0=~x$w_buff1_used~0_In855127817, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In855127817, ~x$w_buff0_used~0=~x$w_buff0_used~0_In855127817} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In855127817, ~x$w_buff1_used~0=~x$w_buff1_used~0_In855127817, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In855127817, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out855127817|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In855127817} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 18:16:54,416 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [750] [750] L831-->L831-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-1830178565 256))) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1830178565 256)))) (or (and (or .cse0 .cse1) (= ~x$r_buff0_thd0~0_In-1830178565 |ULTIMATE.start_main_#t~ite45_Out-1830178565|)) (and (= 0 |ULTIMATE.start_main_#t~ite45_Out-1830178565|) (not .cse1) (not .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1830178565, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1830178565} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1830178565, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-1830178565|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1830178565} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 18:16:54,416 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L832-->L832-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In813073823 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In813073823 256))) (.cse3 (= 0 (mod ~x$r_buff0_thd0~0_In813073823 256))) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In813073823 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite46_Out813073823|)) (and (or .cse0 .cse1) (or .cse3 .cse2) (= ~x$r_buff1_thd0~0_In813073823 |ULTIMATE.start_main_#t~ite46_Out813073823|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In813073823, ~x$w_buff1_used~0=~x$w_buff1_used~0_In813073823, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In813073823, ~x$w_buff0_used~0=~x$w_buff0_used~0_In813073823} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In813073823, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out813073823|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In813073823, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In813073823, ~x$w_buff0_used~0=~x$w_buff0_used~0_In813073823} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 18:16:54,416 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L832-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_25 (ite (= (ite (not (and (= v_~z~0_60 2) (= 1 v_~__unbuffered_p2_EAX~0_35) (= 0 v_~__unbuffered_p0_EAX~0_54))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 0) (= v_~x$r_buff1_thd0~0_277 |v_ULTIMATE.start_main_#t~ite46_60|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15| (mod v_~main$tmp_guard1~0_25 256))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_54, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_60|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_35, ~z~0=v_~z~0_60} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_54, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_22, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_59|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_35, ~z~0=v_~z~0_60, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_277, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ~x$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:16:54,468 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_51699a68-6f37-48dd-9cf3-f9f1fb3a0790/bin/uautomizer/witness.graphml [2019-12-07 18:16:54,468 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 18:16:54,469 INFO L168 Benchmark]: Toolchain (without parser) took 172847.47 ms. Allocated memory was 1.0 GB in the beginning and 8.6 GB in the end (delta: 7.6 GB). Free memory was 935.5 MB in the beginning and 5.0 GB in the end (delta: -4.0 GB). Peak memory consumption was 3.6 GB. Max. memory is 11.5 GB. [2019-12-07 18:16:54,470 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 955.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:16:54,470 INFO L168 Benchmark]: CACSL2BoogieTranslator took 415.12 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 118.5 MB). Free memory was 935.5 MB in the beginning and 1.1 GB in the end (delta: -150.7 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. [2019-12-07 18:16:54,470 INFO L168 Benchmark]: Boogie Procedure Inliner took 35.55 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 18:16:54,470 INFO L168 Benchmark]: Boogie Preprocessor took 24.89 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:16:54,471 INFO L168 Benchmark]: RCFGBuilder took 395.21 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.4 MB). Peak memory consumption was 55.4 MB. Max. memory is 11.5 GB. [2019-12-07 18:16:54,471 INFO L168 Benchmark]: TraceAbstraction took 171908.75 ms. Allocated memory was 1.1 GB in the beginning and 8.6 GB in the end (delta: 7.5 GB). Free memory was 1.0 GB in the beginning and 5.0 GB in the end (delta: -4.0 GB). Peak memory consumption was 3.5 GB. Max. memory is 11.5 GB. [2019-12-07 18:16:54,471 INFO L168 Benchmark]: Witness Printer took 64.43 ms. Allocated memory is still 8.6 GB. Free memory was 5.0 GB in the beginning and 5.0 GB in the end (delta: 42.9 MB). Peak memory consumption was 42.9 MB. Max. memory is 11.5 GB. [2019-12-07 18:16:54,472 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 955.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 415.12 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 118.5 MB). Free memory was 935.5 MB in the beginning and 1.1 GB in the end (delta: -150.7 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 35.55 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 24.89 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 395.21 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.4 MB). Peak memory consumption was 55.4 MB. Max. memory is 11.5 GB. * TraceAbstraction took 171908.75 ms. Allocated memory was 1.1 GB in the beginning and 8.6 GB in the end (delta: 7.5 GB). Free memory was 1.0 GB in the beginning and 5.0 GB in the end (delta: -4.0 GB). Peak memory consumption was 3.5 GB. Max. memory is 11.5 GB. * Witness Printer took 64.43 ms. Allocated memory is still 8.6 GB. Free memory was 5.0 GB in the beginning and 5.0 GB in the end (delta: 42.9 MB). Peak memory consumption was 42.9 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.2s, 163 ProgramPointsBefore, 83 ProgramPointsAfterwards, 194 TransitionsBefore, 92 TransitionsAfterwards, 16696 CoEnabledTransitionPairs, 7 FixpointIterations, 32 TrivialSequentialCompositions, 45 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 35 ConcurrentYvCompositions, 26 ChoiceCompositions, 6709 VarBasedMoverChecksPositive, 292 VarBasedMoverChecksNegative, 116 SemBasedMoverChecksPositive, 259 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 66094 CheckedPairsTotal, 112 TotalNumberOfCompositions - CounterExampleResult [Line: 5]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L818] FCALL, FORK 0 pthread_create(&t2082, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L820] FCALL, FORK 0 pthread_create(&t2083, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L765] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L766] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L767] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L768] 2 x$r_buff1_thd3 = x$r_buff0_thd3 [L769] 2 x$r_buff0_thd2 = (_Bool)1 [L772] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L775] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L822] FCALL, FORK 0 pthread_create(&t2084, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L789] 3 __unbuffered_p2_EAX = y [L792] 3 z = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L795] 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L775] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L730] 1 z = 2 [L735] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L736] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L737] 1 x$flush_delayed = weak$$choice2 [L738] 1 x$mem_tmp = x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L739] EXPR 1 !x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1) VAL [!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L776] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L777] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L739] 1 x = !x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1) [L740] 1 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff0)) [L741] EXPR 1 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1))=0, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L741] 1 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1)) [L796] 3 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used [L797] 3 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used [L798] 3 x$r_buff0_thd3 = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$r_buff0_thd3 [L742] EXPR 1 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used))=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L742] 1 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used)) [L743] 1 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L745] 1 x$r_buff1_thd1 = weak$$choice2 ? x$r_buff1_thd1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$r_buff1_thd1 : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L746] 1 __unbuffered_p0_EAX = x VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L824] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [\result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L829] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L830] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L831] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 154 locations, 2 error locations. Result: UNSAFE, OverallTime: 171.7s, OverallIterations: 27, TraceHistogramMax: 1, AutomataDifference: 33.6s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 3937 SDtfs, 6445 SDslu, 10335 SDs, 0 SdLazy, 5155 SolverSat, 258 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 3.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 244 GetRequests, 29 SyntacticMatches, 12 SemanticMatches, 203 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1457 ImplicationChecksByTransitivity, 1.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=267700occurred in iteration=10, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 123.4s AutomataMinimizationTime, 26 MinimizatonAttempts, 377382 StatesRemovedByMinimization, 24 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.0s InterpolantComputationTime, 797 NumberOfCodeBlocks, 797 NumberOfCodeBlocksAsserted, 27 NumberOfCheckSat, 715 ConstructedInterpolants, 0 QuantifiedInterpolants, 107357 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 26 InterpolantComputations, 26 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...