./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe013_rmo.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_99fce1cb-abf8-4c14-9f5b-f300c92df333/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_99fce1cb-abf8-4c14-9f5b-f300c92df333/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_99fce1cb-abf8-4c14-9f5b-f300c92df333/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_99fce1cb-abf8-4c14-9f5b-f300c92df333/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe013_rmo.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_99fce1cb-abf8-4c14-9f5b-f300c92df333/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_99fce1cb-abf8-4c14-9f5b-f300c92df333/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 6f67327e1b31bb016279bb11755270a574d107a8 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 11:36:35,482 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 11:36:35,483 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 11:36:35,491 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 11:36:35,491 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 11:36:35,492 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 11:36:35,493 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 11:36:35,494 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 11:36:35,495 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 11:36:35,496 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 11:36:35,496 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 11:36:35,497 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 11:36:35,497 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 11:36:35,498 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 11:36:35,499 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 11:36:35,499 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 11:36:35,500 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 11:36:35,501 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 11:36:35,502 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 11:36:35,503 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 11:36:35,504 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 11:36:35,505 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 11:36:35,506 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 11:36:35,506 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 11:36:35,508 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 11:36:35,508 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 11:36:35,508 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 11:36:35,509 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 11:36:35,509 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 11:36:35,509 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 11:36:35,510 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 11:36:35,510 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 11:36:35,510 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 11:36:35,511 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 11:36:35,511 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 11:36:35,512 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 11:36:35,512 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 11:36:35,512 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 11:36:35,512 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 11:36:35,513 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 11:36:35,513 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 11:36:35,514 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_99fce1cb-abf8-4c14-9f5b-f300c92df333/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 11:36:35,522 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 11:36:35,522 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 11:36:35,523 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 11:36:35,523 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 11:36:35,523 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 11:36:35,524 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 11:36:35,524 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 11:36:35,524 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 11:36:35,524 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 11:36:35,524 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 11:36:35,524 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 11:36:35,524 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 11:36:35,524 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 11:36:35,524 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 11:36:35,524 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 11:36:35,525 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 11:36:35,525 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 11:36:35,525 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 11:36:35,525 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 11:36:35,525 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 11:36:35,525 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 11:36:35,525 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 11:36:35,525 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 11:36:35,525 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 11:36:35,526 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 11:36:35,526 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 11:36:35,526 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 11:36:35,526 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 11:36:35,526 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 11:36:35,526 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_99fce1cb-abf8-4c14-9f5b-f300c92df333/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 6f67327e1b31bb016279bb11755270a574d107a8 [2019-12-07 11:36:35,627 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 11:36:35,636 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 11:36:35,639 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 11:36:35,640 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 11:36:35,640 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 11:36:35,640 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_99fce1cb-abf8-4c14-9f5b-f300c92df333/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe013_rmo.oepc.i [2019-12-07 11:36:35,680 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_99fce1cb-abf8-4c14-9f5b-f300c92df333/bin/uautomizer/data/f23e04ac0/b104f438d9ba427c80339948ef22035f/FLAGdf2e5a782 [2019-12-07 11:36:36,158 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 11:36:36,159 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_99fce1cb-abf8-4c14-9f5b-f300c92df333/sv-benchmarks/c/pthread-wmm/safe013_rmo.oepc.i [2019-12-07 11:36:36,169 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_99fce1cb-abf8-4c14-9f5b-f300c92df333/bin/uautomizer/data/f23e04ac0/b104f438d9ba427c80339948ef22035f/FLAGdf2e5a782 [2019-12-07 11:36:36,469 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_99fce1cb-abf8-4c14-9f5b-f300c92df333/bin/uautomizer/data/f23e04ac0/b104f438d9ba427c80339948ef22035f [2019-12-07 11:36:36,475 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 11:36:36,478 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 11:36:36,480 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 11:36:36,481 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 11:36:36,488 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 11:36:36,490 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 11:36:36" (1/1) ... [2019-12-07 11:36:36,496 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@46581b5e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:36:36, skipping insertion in model container [2019-12-07 11:36:36,497 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 11:36:36" (1/1) ... [2019-12-07 11:36:36,509 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 11:36:36,542 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 11:36:36,808 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 11:36:36,815 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 11:36:36,853 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 11:36:36,898 INFO L208 MainTranslator]: Completed translation [2019-12-07 11:36:36,898 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:36:36 WrapperNode [2019-12-07 11:36:36,899 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 11:36:36,899 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 11:36:36,899 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 11:36:36,899 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 11:36:36,905 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:36:36" (1/1) ... [2019-12-07 11:36:36,917 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:36:36" (1/1) ... [2019-12-07 11:36:36,936 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 11:36:36,936 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 11:36:36,936 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 11:36:36,936 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 11:36:36,943 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:36:36" (1/1) ... [2019-12-07 11:36:36,943 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:36:36" (1/1) ... [2019-12-07 11:36:36,946 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:36:36" (1/1) ... [2019-12-07 11:36:36,946 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:36:36" (1/1) ... [2019-12-07 11:36:36,952 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:36:36" (1/1) ... [2019-12-07 11:36:36,955 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:36:36" (1/1) ... [2019-12-07 11:36:36,957 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:36:36" (1/1) ... [2019-12-07 11:36:36,960 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 11:36:36,960 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 11:36:36,960 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 11:36:36,960 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 11:36:36,961 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:36:36" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_99fce1cb-abf8-4c14-9f5b-f300c92df333/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 11:36:37,000 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 11:36:37,000 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 11:36:37,000 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 11:36:37,000 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 11:36:37,001 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 11:36:37,001 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 11:36:37,001 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 11:36:37,001 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 11:36:37,001 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 11:36:37,001 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 11:36:37,001 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 11:36:37,001 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 11:36:37,001 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 11:36:37,002 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 11:36:37,354 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 11:36:37,354 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 11:36:37,355 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:36:37 BoogieIcfgContainer [2019-12-07 11:36:37,355 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 11:36:37,356 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 11:36:37,356 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 11:36:37,358 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 11:36:37,358 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 11:36:36" (1/3) ... [2019-12-07 11:36:37,359 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@48b6fcea and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 11:36:37, skipping insertion in model container [2019-12-07 11:36:37,359 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:36:36" (2/3) ... [2019-12-07 11:36:37,359 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@48b6fcea and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 11:36:37, skipping insertion in model container [2019-12-07 11:36:37,359 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:36:37" (3/3) ... [2019-12-07 11:36:37,360 INFO L109 eAbstractionObserver]: Analyzing ICFG safe013_rmo.oepc.i [2019-12-07 11:36:37,366 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 11:36:37,366 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 11:36:37,371 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 11:36:37,371 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 11:36:37,395 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,395 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,395 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,396 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,396 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,396 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,396 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,396 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,396 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,397 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,397 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,397 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,397 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,397 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,398 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,398 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,398 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,398 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,398 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,398 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,399 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,399 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,399 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,399 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,399 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,400 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,400 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,400 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,400 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,400 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,400 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,401 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,401 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,401 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,401 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,401 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,402 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,402 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,402 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,402 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,402 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,403 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,403 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,403 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,403 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,403 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,403 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,404 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,404 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,404 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,404 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,404 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,404 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,405 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,405 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,405 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,405 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,405 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,406 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,406 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,406 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,406 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,406 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,406 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,407 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,407 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,407 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,407 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,407 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,407 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,408 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,408 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,408 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,408 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,408 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,408 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,409 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,409 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,409 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,409 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,409 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,409 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,410 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,410 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,410 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,410 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,410 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,410 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,411 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,411 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,411 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,411 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,411 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,411 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,412 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,412 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,412 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,413 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,413 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,413 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,413 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,413 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,414 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,414 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,414 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,414 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,414 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,414 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,415 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,415 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,415 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,415 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,415 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,415 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,415 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,416 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,416 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,416 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,416 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,416 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,416 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,417 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,417 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,417 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,417 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,417 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,417 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,418 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,418 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,418 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,418 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,418 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,419 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,419 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,419 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,419 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,419 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,419 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,420 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,421 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,421 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,421 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,421 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,421 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,421 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,422 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,422 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,422 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,422 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,422 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,422 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,423 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:36:37,437 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 11:36:37,454 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 11:36:37,454 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 11:36:37,454 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 11:36:37,454 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 11:36:37,454 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 11:36:37,454 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 11:36:37,454 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 11:36:37,454 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 11:36:37,465 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 163 places, 194 transitions [2019-12-07 11:36:37,466 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 163 places, 194 transitions [2019-12-07 11:36:37,518 INFO L134 PetriNetUnfolder]: 41/191 cut-off events. [2019-12-07 11:36:37,518 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 11:36:37,528 INFO L76 FinitePrefix]: Finished finitePrefix Result has 201 conditions, 191 events. 41/191 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 721 event pairs. 9/157 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 11:36:37,541 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 163 places, 194 transitions [2019-12-07 11:36:37,569 INFO L134 PetriNetUnfolder]: 41/191 cut-off events. [2019-12-07 11:36:37,569 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 11:36:37,574 INFO L76 FinitePrefix]: Finished finitePrefix Result has 201 conditions, 191 events. 41/191 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 14. Compared 721 event pairs. 9/157 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 11:36:37,588 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 16696 [2019-12-07 11:36:37,589 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 11:36:40,565 WARN L192 SmtUtils]: Spent 152.00 ms on a formula simplification. DAG size of input: 89 DAG size of output: 87 [2019-12-07 11:36:40,704 INFO L206 etLargeBlockEncoding]: Checked pairs total: 66094 [2019-12-07 11:36:40,705 INFO L214 etLargeBlockEncoding]: Total number of compositions: 112 [2019-12-07 11:36:40,707 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 83 places, 92 transitions [2019-12-07 11:36:50,314 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 86132 states. [2019-12-07 11:36:50,315 INFO L276 IsEmpty]: Start isEmpty. Operand 86132 states. [2019-12-07 11:36:50,319 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-07 11:36:50,320 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:36:50,320 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-07 11:36:50,320 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:36:50,324 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:36:50,324 INFO L82 PathProgramCache]: Analyzing trace with hash 794637732, now seen corresponding path program 1 times [2019-12-07 11:36:50,329 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:36:50,329 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [27641473] [2019-12-07 11:36:50,330 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:36:50,409 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:36:50,466 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:36:50,466 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [27641473] [2019-12-07 11:36:50,467 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:36:50,467 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 11:36:50,467 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [461095262] [2019-12-07 11:36:50,470 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:36:50,470 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:36:50,479 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:36:50,480 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:36:50,481 INFO L87 Difference]: Start difference. First operand 86132 states. Second operand 3 states. [2019-12-07 11:36:51,133 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:36:51,133 INFO L93 Difference]: Finished difference Result 85012 states and 367904 transitions. [2019-12-07 11:36:51,134 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:36:51,135 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-07 11:36:51,135 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:36:51,482 INFO L225 Difference]: With dead ends: 85012 [2019-12-07 11:36:51,482 INFO L226 Difference]: Without dead ends: 80140 [2019-12-07 11:36:51,483 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:36:54,132 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80140 states. [2019-12-07 11:36:55,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80140 to 80140. [2019-12-07 11:36:55,317 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80140 states. [2019-12-07 11:36:55,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80140 states to 80140 states and 346330 transitions. [2019-12-07 11:36:55,766 INFO L78 Accepts]: Start accepts. Automaton has 80140 states and 346330 transitions. Word has length 5 [2019-12-07 11:36:55,766 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:36:55,766 INFO L462 AbstractCegarLoop]: Abstraction has 80140 states and 346330 transitions. [2019-12-07 11:36:55,766 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:36:55,767 INFO L276 IsEmpty]: Start isEmpty. Operand 80140 states and 346330 transitions. [2019-12-07 11:36:55,774 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 11:36:55,774 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:36:55,774 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:36:55,774 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:36:55,775 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:36:55,775 INFO L82 PathProgramCache]: Analyzing trace with hash -1795694344, now seen corresponding path program 1 times [2019-12-07 11:36:55,775 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:36:55,775 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [812888839] [2019-12-07 11:36:55,775 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:36:55,795 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:36:55,834 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:36:55,834 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [812888839] [2019-12-07 11:36:55,834 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:36:55,834 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:36:55,835 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1610607920] [2019-12-07 11:36:55,836 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:36:55,836 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:36:55,836 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:36:55,836 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:36:55,836 INFO L87 Difference]: Start difference. First operand 80140 states and 346330 transitions. Second operand 4 states. [2019-12-07 11:36:56,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:36:56,570 INFO L93 Difference]: Finished difference Result 123388 states and 510822 transitions. [2019-12-07 11:36:56,571 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:36:56,571 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 11:36:56,571 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:36:56,910 INFO L225 Difference]: With dead ends: 123388 [2019-12-07 11:36:56,910 INFO L226 Difference]: Without dead ends: 123290 [2019-12-07 11:36:56,911 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:37:01,911 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123290 states. [2019-12-07 11:37:03,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123290 to 114218. [2019-12-07 11:37:03,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114218 states. [2019-12-07 11:37:03,876 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114218 states to 114218 states and 477794 transitions. [2019-12-07 11:37:03,876 INFO L78 Accepts]: Start accepts. Automaton has 114218 states and 477794 transitions. Word has length 13 [2019-12-07 11:37:03,877 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:37:03,877 INFO L462 AbstractCegarLoop]: Abstraction has 114218 states and 477794 transitions. [2019-12-07 11:37:03,877 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:37:03,877 INFO L276 IsEmpty]: Start isEmpty. Operand 114218 states and 477794 transitions. [2019-12-07 11:37:03,880 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 11:37:03,880 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:37:03,880 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:37:03,881 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:37:03,881 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:37:03,881 INFO L82 PathProgramCache]: Analyzing trace with hash -1307118492, now seen corresponding path program 1 times [2019-12-07 11:37:03,881 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:37:03,881 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1271972503] [2019-12-07 11:37:03,881 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:37:03,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:37:03,929 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:37:03,929 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1271972503] [2019-12-07 11:37:03,929 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:37:03,929 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:37:03,929 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1463535872] [2019-12-07 11:37:03,930 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:37:03,930 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:37:03,930 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:37:03,930 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:37:03,930 INFO L87 Difference]: Start difference. First operand 114218 states and 477794 transitions. Second operand 4 states. [2019-12-07 11:37:05,100 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:37:05,100 INFO L93 Difference]: Finished difference Result 159677 states and 652290 transitions. [2019-12-07 11:37:05,101 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:37:05,101 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 11:37:05,101 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:37:05,508 INFO L225 Difference]: With dead ends: 159677 [2019-12-07 11:37:05,508 INFO L226 Difference]: Without dead ends: 159565 [2019-12-07 11:37:05,508 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:37:11,097 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159565 states. [2019-12-07 11:37:12,993 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159565 to 136035. [2019-12-07 11:37:12,993 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136035 states. [2019-12-07 11:37:13,391 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136035 states to 136035 states and 564894 transitions. [2019-12-07 11:37:13,391 INFO L78 Accepts]: Start accepts. Automaton has 136035 states and 564894 transitions. Word has length 13 [2019-12-07 11:37:13,391 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:37:13,391 INFO L462 AbstractCegarLoop]: Abstraction has 136035 states and 564894 transitions. [2019-12-07 11:37:13,391 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:37:13,391 INFO L276 IsEmpty]: Start isEmpty. Operand 136035 states and 564894 transitions. [2019-12-07 11:37:13,394 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 11:37:13,394 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:37:13,394 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:37:13,394 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:37:13,395 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:37:13,395 INFO L82 PathProgramCache]: Analyzing trace with hash 2137171342, now seen corresponding path program 1 times [2019-12-07 11:37:13,395 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:37:13,395 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1836604829] [2019-12-07 11:37:13,395 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:37:13,406 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:37:13,423 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:37:13,423 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1836604829] [2019-12-07 11:37:13,423 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:37:13,423 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:37:13,423 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1617515458] [2019-12-07 11:37:13,424 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:37:13,424 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:37:13,424 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:37:13,424 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:37:13,424 INFO L87 Difference]: Start difference. First operand 136035 states and 564894 transitions. Second operand 3 states. [2019-12-07 11:37:14,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:37:14,492 INFO L93 Difference]: Finished difference Result 181618 states and 742473 transitions. [2019-12-07 11:37:14,493 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:37:14,493 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 14 [2019-12-07 11:37:14,493 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:37:14,961 INFO L225 Difference]: With dead ends: 181618 [2019-12-07 11:37:14,961 INFO L226 Difference]: Without dead ends: 181618 [2019-12-07 11:37:14,962 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:37:19,384 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181618 states. [2019-12-07 11:37:21,550 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181618 to 152081. [2019-12-07 11:37:21,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152081 states. [2019-12-07 11:37:22,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152081 states to 152081 states and 628919 transitions. [2019-12-07 11:37:22,003 INFO L78 Accepts]: Start accepts. Automaton has 152081 states and 628919 transitions. Word has length 14 [2019-12-07 11:37:22,003 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:37:22,003 INFO L462 AbstractCegarLoop]: Abstraction has 152081 states and 628919 transitions. [2019-12-07 11:37:22,004 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:37:22,004 INFO L276 IsEmpty]: Start isEmpty. Operand 152081 states and 628919 transitions. [2019-12-07 11:37:22,007 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 11:37:22,007 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:37:22,007 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:37:22,007 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:37:22,007 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:37:22,007 INFO L82 PathProgramCache]: Analyzing trace with hash 2137037670, now seen corresponding path program 1 times [2019-12-07 11:37:22,007 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:37:22,007 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1019659299] [2019-12-07 11:37:22,007 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:37:22,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:37:22,043 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:37:22,043 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1019659299] [2019-12-07 11:37:22,043 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:37:22,043 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:37:22,043 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [235374052] [2019-12-07 11:37:22,043 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:37:22,044 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:37:22,044 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:37:22,044 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:37:22,044 INFO L87 Difference]: Start difference. First operand 152081 states and 628919 transitions. Second operand 4 states. [2019-12-07 11:37:24,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:37:24,577 INFO L93 Difference]: Finished difference Result 179622 states and 732719 transitions. [2019-12-07 11:37:24,578 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:37:24,578 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-12-07 11:37:24,578 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:37:25,030 INFO L225 Difference]: With dead ends: 179622 [2019-12-07 11:37:25,030 INFO L226 Difference]: Without dead ends: 179542 [2019-12-07 11:37:25,030 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:37:29,019 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179542 states. [2019-12-07 11:37:31,425 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179542 to 157787. [2019-12-07 11:37:31,426 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157787 states. [2019-12-07 11:37:31,896 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157787 states to 157787 states and 651479 transitions. [2019-12-07 11:37:31,896 INFO L78 Accepts]: Start accepts. Automaton has 157787 states and 651479 transitions. Word has length 14 [2019-12-07 11:37:31,896 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:37:31,896 INFO L462 AbstractCegarLoop]: Abstraction has 157787 states and 651479 transitions. [2019-12-07 11:37:31,896 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:37:31,896 INFO L276 IsEmpty]: Start isEmpty. Operand 157787 states and 651479 transitions. [2019-12-07 11:37:31,901 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-12-07 11:37:31,901 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:37:31,901 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:37:31,901 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:37:31,902 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:37:31,902 INFO L82 PathProgramCache]: Analyzing trace with hash -1997758702, now seen corresponding path program 1 times [2019-12-07 11:37:31,902 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:37:31,902 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1756535920] [2019-12-07 11:37:31,902 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:37:31,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:37:31,939 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:37:31,939 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1756535920] [2019-12-07 11:37:31,939 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:37:31,939 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:37:31,939 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1914982286] [2019-12-07 11:37:31,940 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:37:31,940 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:37:31,940 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:37:31,940 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:37:31,940 INFO L87 Difference]: Start difference. First operand 157787 states and 651479 transitions. Second operand 4 states. [2019-12-07 11:37:32,854 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:37:32,854 INFO L93 Difference]: Finished difference Result 189091 states and 772001 transitions. [2019-12-07 11:37:32,855 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:37:32,855 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-12-07 11:37:32,855 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:37:33,856 INFO L225 Difference]: With dead ends: 189091 [2019-12-07 11:37:33,856 INFO L226 Difference]: Without dead ends: 188995 [2019-12-07 11:37:33,856 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:37:37,936 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188995 states. [2019-12-07 11:37:42,549 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188995 to 161868. [2019-12-07 11:37:42,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161868 states. [2019-12-07 11:37:43,032 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161868 states to 161868 states and 668265 transitions. [2019-12-07 11:37:43,032 INFO L78 Accepts]: Start accepts. Automaton has 161868 states and 668265 transitions. Word has length 14 [2019-12-07 11:37:43,032 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:37:43,032 INFO L462 AbstractCegarLoop]: Abstraction has 161868 states and 668265 transitions. [2019-12-07 11:37:43,033 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:37:43,033 INFO L276 IsEmpty]: Start isEmpty. Operand 161868 states and 668265 transitions. [2019-12-07 11:37:43,046 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 11:37:43,046 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:37:43,046 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:37:43,046 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:37:43,046 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:37:43,046 INFO L82 PathProgramCache]: Analyzing trace with hash -1754746770, now seen corresponding path program 1 times [2019-12-07 11:37:43,047 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:37:43,047 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1094058098] [2019-12-07 11:37:43,047 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:37:43,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:37:43,094 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:37:43,095 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1094058098] [2019-12-07 11:37:43,095 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:37:43,095 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:37:43,095 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1717302942] [2019-12-07 11:37:43,096 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:37:43,096 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:37:43,096 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:37:43,096 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:37:43,096 INFO L87 Difference]: Start difference. First operand 161868 states and 668265 transitions. Second operand 3 states. [2019-12-07 11:37:43,763 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:37:43,763 INFO L93 Difference]: Finished difference Result 152758 states and 623342 transitions. [2019-12-07 11:37:43,764 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:37:43,764 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 11:37:43,764 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:37:44,147 INFO L225 Difference]: With dead ends: 152758 [2019-12-07 11:37:44,147 INFO L226 Difference]: Without dead ends: 152758 [2019-12-07 11:37:44,147 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:37:47,949 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152758 states. [2019-12-07 11:37:50,214 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152758 to 148778. [2019-12-07 11:37:50,214 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148778 states. [2019-12-07 11:37:50,647 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148778 states to 148778 states and 608180 transitions. [2019-12-07 11:37:50,647 INFO L78 Accepts]: Start accepts. Automaton has 148778 states and 608180 transitions. Word has length 18 [2019-12-07 11:37:50,647 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:37:50,647 INFO L462 AbstractCegarLoop]: Abstraction has 148778 states and 608180 transitions. [2019-12-07 11:37:50,647 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:37:50,647 INFO L276 IsEmpty]: Start isEmpty. Operand 148778 states and 608180 transitions. [2019-12-07 11:37:50,658 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 11:37:50,658 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:37:50,658 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:37:50,658 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:37:50,658 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:37:50,658 INFO L82 PathProgramCache]: Analyzing trace with hash 250695921, now seen corresponding path program 1 times [2019-12-07 11:37:50,658 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:37:50,659 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1309034934] [2019-12-07 11:37:50,659 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:37:50,669 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:37:50,700 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:37:50,700 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1309034934] [2019-12-07 11:37:50,700 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:37:50,700 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 11:37:50,701 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1887341303] [2019-12-07 11:37:50,701 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:37:50,701 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:37:50,701 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:37:50,701 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:37:50,701 INFO L87 Difference]: Start difference. First operand 148778 states and 608180 transitions. Second operand 3 states. [2019-12-07 11:37:52,249 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:37:52,249 INFO L93 Difference]: Finished difference Result 277378 states and 1128575 transitions. [2019-12-07 11:37:52,249 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:37:52,249 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 11:37:52,250 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:37:52,933 INFO L225 Difference]: With dead ends: 277378 [2019-12-07 11:37:52,933 INFO L226 Difference]: Without dead ends: 268154 [2019-12-07 11:37:52,934 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:38:00,024 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 268154 states. [2019-12-07 11:38:04,173 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 268154 to 258617. [2019-12-07 11:38:04,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 258617 states. [2019-12-07 11:38:04,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 258617 states to 258617 states and 1060508 transitions. [2019-12-07 11:38:04,941 INFO L78 Accepts]: Start accepts. Automaton has 258617 states and 1060508 transitions. Word has length 18 [2019-12-07 11:38:04,942 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:38:04,942 INFO L462 AbstractCegarLoop]: Abstraction has 258617 states and 1060508 transitions. [2019-12-07 11:38:04,942 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:38:04,942 INFO L276 IsEmpty]: Start isEmpty. Operand 258617 states and 1060508 transitions. [2019-12-07 11:38:04,960 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 11:38:04,961 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:38:04,961 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:38:04,961 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:38:04,961 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:38:04,961 INFO L82 PathProgramCache]: Analyzing trace with hash 1369748393, now seen corresponding path program 1 times [2019-12-07 11:38:04,961 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:38:04,961 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [401844894] [2019-12-07 11:38:04,961 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:38:04,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:38:05,000 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:38:05,000 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [401844894] [2019-12-07 11:38:05,000 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:38:05,000 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:38:05,001 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [50629948] [2019-12-07 11:38:05,001 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:38:05,001 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:38:05,001 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:38:05,001 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:38:05,001 INFO L87 Difference]: Start difference. First operand 258617 states and 1060508 transitions. Second operand 4 states. [2019-12-07 11:38:06,558 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:38:06,558 INFO L93 Difference]: Finished difference Result 258630 states and 1059116 transitions. [2019-12-07 11:38:06,559 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 11:38:06,559 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2019-12-07 11:38:06,559 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:38:07,222 INFO L225 Difference]: With dead ends: 258630 [2019-12-07 11:38:07,223 INFO L226 Difference]: Without dead ends: 257550 [2019-12-07 11:38:07,223 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:38:12,310 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 257550 states. [2019-12-07 11:38:18,894 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 257550 to 256634. [2019-12-07 11:38:18,894 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 256634 states. [2019-12-07 11:38:19,628 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 256634 states to 256634 states and 1052948 transitions. [2019-12-07 11:38:19,628 INFO L78 Accepts]: Start accepts. Automaton has 256634 states and 1052948 transitions. Word has length 19 [2019-12-07 11:38:19,629 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:38:19,629 INFO L462 AbstractCegarLoop]: Abstraction has 256634 states and 1052948 transitions. [2019-12-07 11:38:19,629 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:38:19,629 INFO L276 IsEmpty]: Start isEmpty. Operand 256634 states and 1052948 transitions. [2019-12-07 11:38:19,649 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 11:38:19,649 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:38:19,650 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:38:19,650 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:38:19,650 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:38:19,650 INFO L82 PathProgramCache]: Analyzing trace with hash -2069277611, now seen corresponding path program 1 times [2019-12-07 11:38:19,650 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:38:19,650 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [672035551] [2019-12-07 11:38:19,650 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:38:19,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:38:19,697 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:38:19,698 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [672035551] [2019-12-07 11:38:19,698 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:38:19,698 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:38:19,698 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1389580248] [2019-12-07 11:38:19,698 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:38:19,698 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:38:19,698 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:38:19,699 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:38:19,699 INFO L87 Difference]: Start difference. First operand 256634 states and 1052948 transitions. Second operand 5 states. [2019-12-07 11:38:22,020 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:38:22,020 INFO L93 Difference]: Finished difference Result 368439 states and 1478344 transitions. [2019-12-07 11:38:22,021 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 11:38:22,021 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 11:38:22,021 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:38:22,959 INFO L225 Difference]: With dead ends: 368439 [2019-12-07 11:38:22,959 INFO L226 Difference]: Without dead ends: 367887 [2019-12-07 11:38:22,959 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:38:29,618 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 367887 states. [2019-12-07 11:38:34,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 367887 to 267700. [2019-12-07 11:38:34,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 267700 states. [2019-12-07 11:38:34,973 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 267700 states to 267700 states and 1095458 transitions. [2019-12-07 11:38:34,973 INFO L78 Accepts]: Start accepts. Automaton has 267700 states and 1095458 transitions. Word has length 19 [2019-12-07 11:38:34,973 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:38:34,973 INFO L462 AbstractCegarLoop]: Abstraction has 267700 states and 1095458 transitions. [2019-12-07 11:38:34,973 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:38:34,973 INFO L276 IsEmpty]: Start isEmpty. Operand 267700 states and 1095458 transitions. [2019-12-07 11:38:35,002 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 11:38:35,002 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:38:35,002 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:38:35,002 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:38:35,003 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:38:35,003 INFO L82 PathProgramCache]: Analyzing trace with hash -582230699, now seen corresponding path program 1 times [2019-12-07 11:38:35,003 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:38:35,003 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2134047859] [2019-12-07 11:38:35,003 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:38:35,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:38:35,030 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:38:35,030 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2134047859] [2019-12-07 11:38:35,030 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:38:35,030 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:38:35,030 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [336288561] [2019-12-07 11:38:35,031 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:38:35,031 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:38:35,031 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:38:35,031 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:38:35,031 INFO L87 Difference]: Start difference. First operand 267700 states and 1095458 transitions. Second operand 4 states. [2019-12-07 11:38:37,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:38:37,244 INFO L93 Difference]: Finished difference Result 430723 states and 1769792 transitions. [2019-12-07 11:38:37,244 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 11:38:37,244 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 20 [2019-12-07 11:38:37,245 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:38:41,406 INFO L225 Difference]: With dead ends: 430723 [2019-12-07 11:38:41,406 INFO L226 Difference]: Without dead ends: 201183 [2019-12-07 11:38:41,407 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:38:45,552 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 201183 states. [2019-12-07 11:38:48,251 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 201183 to 193165. [2019-12-07 11:38:48,251 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 193165 states. [2019-12-07 11:38:48,809 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193165 states to 193165 states and 788533 transitions. [2019-12-07 11:38:48,809 INFO L78 Accepts]: Start accepts. Automaton has 193165 states and 788533 transitions. Word has length 20 [2019-12-07 11:38:48,809 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:38:48,810 INFO L462 AbstractCegarLoop]: Abstraction has 193165 states and 788533 transitions. [2019-12-07 11:38:48,810 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:38:48,810 INFO L276 IsEmpty]: Start isEmpty. Operand 193165 states and 788533 transitions. [2019-12-07 11:38:48,839 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 11:38:48,839 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:38:48,839 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:38:48,839 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:38:48,839 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:38:48,839 INFO L82 PathProgramCache]: Analyzing trace with hash -1918737222, now seen corresponding path program 1 times [2019-12-07 11:38:48,839 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:38:48,840 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2096164920] [2019-12-07 11:38:48,840 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:38:48,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:38:48,870 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:38:48,870 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2096164920] [2019-12-07 11:38:48,870 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:38:48,870 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:38:48,870 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [21565237] [2019-12-07 11:38:48,870 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:38:48,870 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:38:48,871 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:38:48,871 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:38:48,871 INFO L87 Difference]: Start difference. First operand 193165 states and 788533 transitions. Second operand 5 states. [2019-12-07 11:38:50,350 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:38:50,350 INFO L93 Difference]: Finished difference Result 217402 states and 876117 transitions. [2019-12-07 11:38:50,351 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 11:38:50,351 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 11:38:50,351 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:38:50,895 INFO L225 Difference]: With dead ends: 217402 [2019-12-07 11:38:50,896 INFO L226 Difference]: Without dead ends: 216202 [2019-12-07 11:38:50,896 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-12-07 11:38:55,440 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216202 states. [2019-12-07 11:38:58,136 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216202 to 193554. [2019-12-07 11:38:58,137 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 193554 states. [2019-12-07 11:38:59,045 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193554 states to 193554 states and 789658 transitions. [2019-12-07 11:38:59,045 INFO L78 Accepts]: Start accepts. Automaton has 193554 states and 789658 transitions. Word has length 22 [2019-12-07 11:38:59,045 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:38:59,045 INFO L462 AbstractCegarLoop]: Abstraction has 193554 states and 789658 transitions. [2019-12-07 11:38:59,045 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:38:59,045 INFO L276 IsEmpty]: Start isEmpty. Operand 193554 states and 789658 transitions. [2019-12-07 11:38:59,069 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 11:38:59,069 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:38:59,069 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:38:59,069 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:38:59,069 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:38:59,069 INFO L82 PathProgramCache]: Analyzing trace with hash -1430161370, now seen corresponding path program 1 times [2019-12-07 11:38:59,070 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:38:59,070 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [768500982] [2019-12-07 11:38:59,070 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:38:59,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:38:59,101 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:38:59,101 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [768500982] [2019-12-07 11:38:59,101 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:38:59,101 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:38:59,102 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1513794809] [2019-12-07 11:38:59,102 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:38:59,102 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:38:59,102 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:38:59,102 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:38:59,102 INFO L87 Difference]: Start difference. First operand 193554 states and 789658 transitions. Second operand 5 states. [2019-12-07 11:39:00,366 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:00,366 INFO L93 Difference]: Finished difference Result 255988 states and 1020668 transitions. [2019-12-07 11:39:00,367 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 11:39:00,367 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 11:39:00,367 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:01,008 INFO L225 Difference]: With dead ends: 255988 [2019-12-07 11:39:01,008 INFO L226 Difference]: Without dead ends: 254716 [2019-12-07 11:39:01,008 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:39:06,142 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 254716 states. [2019-12-07 11:39:11,572 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 254716 to 196048. [2019-12-07 11:39:11,572 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 196048 states. [2019-12-07 11:39:12,134 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196048 states to 196048 states and 799273 transitions. [2019-12-07 11:39:12,135 INFO L78 Accepts]: Start accepts. Automaton has 196048 states and 799273 transitions. Word has length 22 [2019-12-07 11:39:12,135 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:12,135 INFO L462 AbstractCegarLoop]: Abstraction has 196048 states and 799273 transitions. [2019-12-07 11:39:12,135 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:39:12,135 INFO L276 IsEmpty]: Start isEmpty. Operand 196048 states and 799273 transitions. [2019-12-07 11:39:12,158 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 11:39:12,158 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:12,158 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:12,159 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:12,159 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:12,159 INFO L82 PathProgramCache]: Analyzing trace with hash -1233781658, now seen corresponding path program 1 times [2019-12-07 11:39:12,159 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:39:12,159 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1186562442] [2019-12-07 11:39:12,159 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:12,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:39:12,192 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:39:12,193 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1186562442] [2019-12-07 11:39:12,193 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:39:12,193 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:39:12,193 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1840094751] [2019-12-07 11:39:12,193 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:39:12,193 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:39:12,194 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:39:12,194 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:39:12,194 INFO L87 Difference]: Start difference. First operand 196048 states and 799273 transitions. Second operand 5 states. [2019-12-07 11:39:13,673 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:13,673 INFO L93 Difference]: Finished difference Result 224067 states and 902607 transitions. [2019-12-07 11:39:13,674 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 11:39:13,674 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 11:39:13,674 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:14,242 INFO L225 Difference]: With dead ends: 224067 [2019-12-07 11:39:14,242 INFO L226 Difference]: Without dead ends: 222169 [2019-12-07 11:39:14,243 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-12-07 11:39:18,916 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 222169 states. [2019-12-07 11:39:21,696 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 222169 to 193783. [2019-12-07 11:39:21,696 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 193783 states. [2019-12-07 11:39:22,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193783 states to 193783 states and 791137 transitions. [2019-12-07 11:39:22,570 INFO L78 Accepts]: Start accepts. Automaton has 193783 states and 791137 transitions. Word has length 22 [2019-12-07 11:39:22,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:22,570 INFO L462 AbstractCegarLoop]: Abstraction has 193783 states and 791137 transitions. [2019-12-07 11:39:22,570 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:39:22,570 INFO L276 IsEmpty]: Start isEmpty. Operand 193783 states and 791137 transitions. [2019-12-07 11:39:22,594 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 11:39:22,594 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:22,594 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:22,594 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:22,594 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:22,594 INFO L82 PathProgramCache]: Analyzing trace with hash -745205806, now seen corresponding path program 1 times [2019-12-07 11:39:22,595 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:39:22,595 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [694789406] [2019-12-07 11:39:22,595 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:22,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:39:22,628 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:39:22,628 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [694789406] [2019-12-07 11:39:22,628 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:39:22,628 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:39:22,628 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1052939370] [2019-12-07 11:39:22,629 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:39:22,629 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:39:22,629 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:39:22,629 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:39:22,629 INFO L87 Difference]: Start difference. First operand 193783 states and 791137 transitions. Second operand 5 states. [2019-12-07 11:39:23,930 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:23,930 INFO L93 Difference]: Finished difference Result 266869 states and 1066164 transitions. [2019-12-07 11:39:23,931 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 11:39:23,931 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 11:39:23,931 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:24,597 INFO L225 Difference]: With dead ends: 266869 [2019-12-07 11:39:24,597 INFO L226 Difference]: Without dead ends: 264991 [2019-12-07 11:39:24,597 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:39:29,881 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 264991 states. [2019-12-07 11:39:35,520 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 264991 to 211163. [2019-12-07 11:39:35,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 211163 states. [2019-12-07 11:39:36,134 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 211163 states to 211163 states and 859480 transitions. [2019-12-07 11:39:36,134 INFO L78 Accepts]: Start accepts. Automaton has 211163 states and 859480 transitions. Word has length 22 [2019-12-07 11:39:36,134 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:36,134 INFO L462 AbstractCegarLoop]: Abstraction has 211163 states and 859480 transitions. [2019-12-07 11:39:36,134 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:39:36,134 INFO L276 IsEmpty]: Start isEmpty. Operand 211163 states and 859480 transitions. [2019-12-07 11:39:36,164 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 11:39:36,164 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:36,164 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:36,164 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:36,164 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:36,164 INFO L82 PathProgramCache]: Analyzing trace with hash -982690047, now seen corresponding path program 1 times [2019-12-07 11:39:36,165 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:39:36,165 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1065081818] [2019-12-07 11:39:36,165 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:36,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:39:36,198 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:39:36,199 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1065081818] [2019-12-07 11:39:36,199 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:39:36,199 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:39:36,199 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1036784854] [2019-12-07 11:39:36,199 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:39:36,199 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:39:36,199 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:39:36,199 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:39:36,200 INFO L87 Difference]: Start difference. First operand 211163 states and 859480 transitions. Second operand 4 states. [2019-12-07 11:39:36,736 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:36,736 INFO L93 Difference]: Finished difference Result 48674 states and 169289 transitions. [2019-12-07 11:39:36,737 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 11:39:36,737 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 22 [2019-12-07 11:39:36,737 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:36,793 INFO L225 Difference]: With dead ends: 48674 [2019-12-07 11:39:36,793 INFO L226 Difference]: Without dead ends: 37093 [2019-12-07 11:39:36,794 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:39:36,962 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37093 states. [2019-12-07 11:39:37,321 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37093 to 37093. [2019-12-07 11:39:37,322 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37093 states. [2019-12-07 11:39:37,388 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37093 states to 37093 states and 122492 transitions. [2019-12-07 11:39:37,388 INFO L78 Accepts]: Start accepts. Automaton has 37093 states and 122492 transitions. Word has length 22 [2019-12-07 11:39:37,388 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:37,388 INFO L462 AbstractCegarLoop]: Abstraction has 37093 states and 122492 transitions. [2019-12-07 11:39:37,388 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:39:37,388 INFO L276 IsEmpty]: Start isEmpty. Operand 37093 states and 122492 transitions. [2019-12-07 11:39:37,404 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 11:39:37,404 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:37,404 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:37,404 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:37,404 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:37,404 INFO L82 PathProgramCache]: Analyzing trace with hash -1413309470, now seen corresponding path program 1 times [2019-12-07 11:39:37,404 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:39:37,405 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1359294406] [2019-12-07 11:39:37,405 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:37,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:39:37,447 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:39:37,448 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1359294406] [2019-12-07 11:39:37,448 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:39:37,448 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:39:37,448 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1590836138] [2019-12-07 11:39:37,448 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:39:37,448 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:39:37,448 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:39:37,449 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:39:37,449 INFO L87 Difference]: Start difference. First operand 37093 states and 122492 transitions. Second operand 5 states. [2019-12-07 11:39:37,516 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:37,517 INFO L93 Difference]: Finished difference Result 16266 states and 51258 transitions. [2019-12-07 11:39:37,517 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:39:37,517 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 31 [2019-12-07 11:39:37,517 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:37,534 INFO L225 Difference]: With dead ends: 16266 [2019-12-07 11:39:37,534 INFO L226 Difference]: Without dead ends: 14140 [2019-12-07 11:39:37,534 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:39:37,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14140 states. [2019-12-07 11:39:37,706 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14140 to 13988. [2019-12-07 11:39:37,706 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13988 states. [2019-12-07 11:39:37,729 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13988 states to 13988 states and 43833 transitions. [2019-12-07 11:39:37,729 INFO L78 Accepts]: Start accepts. Automaton has 13988 states and 43833 transitions. Word has length 31 [2019-12-07 11:39:37,729 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:37,729 INFO L462 AbstractCegarLoop]: Abstraction has 13988 states and 43833 transitions. [2019-12-07 11:39:37,729 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:39:37,729 INFO L276 IsEmpty]: Start isEmpty. Operand 13988 states and 43833 transitions. [2019-12-07 11:39:37,742 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 11:39:37,742 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:37,742 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:37,742 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:37,743 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:37,743 INFO L82 PathProgramCache]: Analyzing trace with hash 483024013, now seen corresponding path program 1 times [2019-12-07 11:39:37,743 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:39:37,743 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [479242964] [2019-12-07 11:39:37,743 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:37,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:39:37,798 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:39:37,798 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [479242964] [2019-12-07 11:39:37,798 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:39:37,798 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:39:37,799 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2060422641] [2019-12-07 11:39:37,799 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:39:37,799 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:39:37,799 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:39:37,799 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:39:37,800 INFO L87 Difference]: Start difference. First operand 13988 states and 43833 transitions. Second operand 6 states. [2019-12-07 11:39:38,042 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:38,042 INFO L93 Difference]: Finished difference Result 16475 states and 50413 transitions. [2019-12-07 11:39:38,043 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 11:39:38,043 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 40 [2019-12-07 11:39:38,043 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:38,060 INFO L225 Difference]: With dead ends: 16475 [2019-12-07 11:39:38,060 INFO L226 Difference]: Without dead ends: 16288 [2019-12-07 11:39:38,061 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2019-12-07 11:39:38,114 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16288 states. [2019-12-07 11:39:38,246 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16288 to 13954. [2019-12-07 11:39:38,246 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13954 states. [2019-12-07 11:39:38,269 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13954 states to 13954 states and 43765 transitions. [2019-12-07 11:39:38,270 INFO L78 Accepts]: Start accepts. Automaton has 13954 states and 43765 transitions. Word has length 40 [2019-12-07 11:39:38,270 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:38,270 INFO L462 AbstractCegarLoop]: Abstraction has 13954 states and 43765 transitions. [2019-12-07 11:39:38,270 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:39:38,270 INFO L276 IsEmpty]: Start isEmpty. Operand 13954 states and 43765 transitions. [2019-12-07 11:39:38,283 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 11:39:38,283 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:38,283 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:38,283 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:38,283 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:38,283 INFO L82 PathProgramCache]: Analyzing trace with hash -2063605447, now seen corresponding path program 1 times [2019-12-07 11:39:38,284 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:39:38,284 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [969680791] [2019-12-07 11:39:38,284 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:38,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:39:38,303 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:39:38,303 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [969680791] [2019-12-07 11:39:38,303 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:39:38,303 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:39:38,303 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1216072231] [2019-12-07 11:39:38,304 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:39:38,304 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:39:38,304 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:39:38,304 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:39:38,304 INFO L87 Difference]: Start difference. First operand 13954 states and 43765 transitions. Second operand 3 states. [2019-12-07 11:39:38,356 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:38,356 INFO L93 Difference]: Finished difference Result 16334 states and 49818 transitions. [2019-12-07 11:39:38,357 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:39:38,357 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2019-12-07 11:39:38,357 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:38,377 INFO L225 Difference]: With dead ends: 16334 [2019-12-07 11:39:38,377 INFO L226 Difference]: Without dead ends: 16334 [2019-12-07 11:39:38,377 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:39:38,433 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16334 states. [2019-12-07 11:39:38,575 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16334 to 14620. [2019-12-07 11:39:38,575 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14620 states. [2019-12-07 11:39:38,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14620 states to 14620 states and 45091 transitions. [2019-12-07 11:39:38,600 INFO L78 Accepts]: Start accepts. Automaton has 14620 states and 45091 transitions. Word has length 40 [2019-12-07 11:39:38,600 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:38,600 INFO L462 AbstractCegarLoop]: Abstraction has 14620 states and 45091 transitions. [2019-12-07 11:39:38,600 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:39:38,600 INFO L276 IsEmpty]: Start isEmpty. Operand 14620 states and 45091 transitions. [2019-12-07 11:39:38,614 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 11:39:38,614 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:38,614 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:38,614 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:38,614 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:38,614 INFO L82 PathProgramCache]: Analyzing trace with hash -1848652026, now seen corresponding path program 1 times [2019-12-07 11:39:38,614 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:39:38,615 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1564523887] [2019-12-07 11:39:38,615 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:38,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:39:38,670 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:39:38,671 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1564523887] [2019-12-07 11:39:38,671 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:39:38,671 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:39:38,671 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [70485586] [2019-12-07 11:39:38,671 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:39:38,671 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:39:38,672 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:39:38,672 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:39:38,672 INFO L87 Difference]: Start difference. First operand 14620 states and 45091 transitions. Second operand 6 states. [2019-12-07 11:39:38,947 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:38,947 INFO L93 Difference]: Finished difference Result 16261 states and 49369 transitions. [2019-12-07 11:39:38,947 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 11:39:38,947 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 41 [2019-12-07 11:39:38,948 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:38,964 INFO L225 Difference]: With dead ends: 16261 [2019-12-07 11:39:38,964 INFO L226 Difference]: Without dead ends: 15990 [2019-12-07 11:39:38,965 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2019-12-07 11:39:39,017 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15990 states. [2019-12-07 11:39:39,478 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15990 to 13948. [2019-12-07 11:39:39,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13948 states. [2019-12-07 11:39:39,499 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13948 states to 13948 states and 43464 transitions. [2019-12-07 11:39:39,500 INFO L78 Accepts]: Start accepts. Automaton has 13948 states and 43464 transitions. Word has length 41 [2019-12-07 11:39:39,500 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:39,500 INFO L462 AbstractCegarLoop]: Abstraction has 13948 states and 43464 transitions. [2019-12-07 11:39:39,500 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:39:39,500 INFO L276 IsEmpty]: Start isEmpty. Operand 13948 states and 43464 transitions. [2019-12-07 11:39:39,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 11:39:39,513 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:39,513 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:39,513 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:39,513 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:39,513 INFO L82 PathProgramCache]: Analyzing trace with hash -1237610810, now seen corresponding path program 1 times [2019-12-07 11:39:39,513 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:39:39,513 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1941602077] [2019-12-07 11:39:39,513 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:39,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:39:39,552 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:39:39,552 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1941602077] [2019-12-07 11:39:39,552 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:39:39,552 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 11:39:39,552 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [122093511] [2019-12-07 11:39:39,552 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:39:39,552 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:39:39,553 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:39:39,553 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:39:39,553 INFO L87 Difference]: Start difference. First operand 13948 states and 43464 transitions. Second operand 5 states. [2019-12-07 11:39:39,878 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:39,878 INFO L93 Difference]: Finished difference Result 24370 states and 73928 transitions. [2019-12-07 11:39:39,878 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 11:39:39,878 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 11:39:39,878 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:39,904 INFO L225 Difference]: With dead ends: 24370 [2019-12-07 11:39:39,905 INFO L226 Difference]: Without dead ends: 24370 [2019-12-07 11:39:39,905 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:39:39,977 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24370 states. [2019-12-07 11:39:40,189 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24370 to 20384. [2019-12-07 11:39:40,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20384 states. [2019-12-07 11:39:40,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20384 states to 20384 states and 62680 transitions. [2019-12-07 11:39:40,223 INFO L78 Accepts]: Start accepts. Automaton has 20384 states and 62680 transitions. Word has length 41 [2019-12-07 11:39:40,223 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:40,223 INFO L462 AbstractCegarLoop]: Abstraction has 20384 states and 62680 transitions. [2019-12-07 11:39:40,223 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:39:40,223 INFO L276 IsEmpty]: Start isEmpty. Operand 20384 states and 62680 transitions. [2019-12-07 11:39:40,242 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 11:39:40,242 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:40,243 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:40,243 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:40,243 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:40,243 INFO L82 PathProgramCache]: Analyzing trace with hash 685009244, now seen corresponding path program 2 times [2019-12-07 11:39:40,243 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:39:40,243 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [726250813] [2019-12-07 11:39:40,243 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:40,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:39:40,305 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:39:40,305 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [726250813] [2019-12-07 11:39:40,306 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:39:40,306 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 11:39:40,306 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1275813660] [2019-12-07 11:39:40,306 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:39:40,306 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:39:40,306 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:39:40,307 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:39:40,307 INFO L87 Difference]: Start difference. First operand 20384 states and 62680 transitions. Second operand 6 states. [2019-12-07 11:39:40,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:40,392 INFO L93 Difference]: Finished difference Result 18923 states and 59192 transitions. [2019-12-07 11:39:40,392 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 11:39:40,393 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 41 [2019-12-07 11:39:40,393 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:40,413 INFO L225 Difference]: With dead ends: 18923 [2019-12-07 11:39:40,414 INFO L226 Difference]: Without dead ends: 18757 [2019-12-07 11:39:40,414 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:39:40,475 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18757 states. [2019-12-07 11:39:40,601 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18757 to 11325. [2019-12-07 11:39:40,601 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11325 states. [2019-12-07 11:39:40,618 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11325 states to 11325 states and 35312 transitions. [2019-12-07 11:39:40,618 INFO L78 Accepts]: Start accepts. Automaton has 11325 states and 35312 transitions. Word has length 41 [2019-12-07 11:39:40,618 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:40,619 INFO L462 AbstractCegarLoop]: Abstraction has 11325 states and 35312 transitions. [2019-12-07 11:39:40,619 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:39:40,619 INFO L276 IsEmpty]: Start isEmpty. Operand 11325 states and 35312 transitions. [2019-12-07 11:39:40,628 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 11:39:40,628 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:40,628 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:40,628 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:40,629 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:40,629 INFO L82 PathProgramCache]: Analyzing trace with hash 1066766813, now seen corresponding path program 1 times [2019-12-07 11:39:40,629 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:39:40,629 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [201851938] [2019-12-07 11:39:40,629 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:40,644 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:39:40,674 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:39:40,674 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [201851938] [2019-12-07 11:39:40,675 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:39:40,675 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:39:40,675 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [208216987] [2019-12-07 11:39:40,675 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:39:40,675 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:39:40,675 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:39:40,676 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:39:40,676 INFO L87 Difference]: Start difference. First operand 11325 states and 35312 transitions. Second operand 3 states. [2019-12-07 11:39:40,716 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:40,717 INFO L93 Difference]: Finished difference Result 10656 states and 32665 transitions. [2019-12-07 11:39:40,717 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:39:40,717 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 55 [2019-12-07 11:39:40,717 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:40,732 INFO L225 Difference]: With dead ends: 10656 [2019-12-07 11:39:40,732 INFO L226 Difference]: Without dead ends: 10656 [2019-12-07 11:39:40,732 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:39:40,773 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10656 states. [2019-12-07 11:39:40,865 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10656 to 10028. [2019-12-07 11:39:40,865 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10028 states. [2019-12-07 11:39:40,881 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10028 states to 10028 states and 30910 transitions. [2019-12-07 11:39:40,881 INFO L78 Accepts]: Start accepts. Automaton has 10028 states and 30910 transitions. Word has length 55 [2019-12-07 11:39:40,881 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:40,881 INFO L462 AbstractCegarLoop]: Abstraction has 10028 states and 30910 transitions. [2019-12-07 11:39:40,881 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:39:40,881 INFO L276 IsEmpty]: Start isEmpty. Operand 10028 states and 30910 transitions. [2019-12-07 11:39:40,890 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 11:39:40,890 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:40,890 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:40,890 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:40,890 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:40,891 INFO L82 PathProgramCache]: Analyzing trace with hash -944534763, now seen corresponding path program 1 times [2019-12-07 11:39:40,891 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:39:40,891 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [35992202] [2019-12-07 11:39:40,891 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:40,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:39:40,926 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:39:40,926 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [35992202] [2019-12-07 11:39:40,926 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:39:40,926 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:39:40,926 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [921487458] [2019-12-07 11:39:40,927 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:39:40,927 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:39:40,927 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:39:40,927 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:39:40,927 INFO L87 Difference]: Start difference. First operand 10028 states and 30910 transitions. Second operand 3 states. [2019-12-07 11:39:40,966 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:40,966 INFO L93 Difference]: Finished difference Result 16860 states and 52159 transitions. [2019-12-07 11:39:40,967 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:39:40,967 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 56 [2019-12-07 11:39:40,967 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:40,974 INFO L225 Difference]: With dead ends: 16860 [2019-12-07 11:39:40,974 INFO L226 Difference]: Without dead ends: 7144 [2019-12-07 11:39:40,974 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:39:41,006 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7144 states. [2019-12-07 11:39:41,062 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7144 to 7144. [2019-12-07 11:39:41,062 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7144 states. [2019-12-07 11:39:41,072 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7144 states to 7144 states and 22071 transitions. [2019-12-07 11:39:41,073 INFO L78 Accepts]: Start accepts. Automaton has 7144 states and 22071 transitions. Word has length 56 [2019-12-07 11:39:41,073 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:41,073 INFO L462 AbstractCegarLoop]: Abstraction has 7144 states and 22071 transitions. [2019-12-07 11:39:41,073 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:39:41,073 INFO L276 IsEmpty]: Start isEmpty. Operand 7144 states and 22071 transitions. [2019-12-07 11:39:41,078 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 11:39:41,079 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:41,079 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:41,079 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:41,079 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:41,079 INFO L82 PathProgramCache]: Analyzing trace with hash 1033271685, now seen corresponding path program 2 times [2019-12-07 11:39:41,079 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:39:41,079 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1857669656] [2019-12-07 11:39:41,079 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:41,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:39:41,202 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:39:41,202 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1857669656] [2019-12-07 11:39:41,202 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:39:41,202 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 11:39:41,202 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [556507869] [2019-12-07 11:39:41,202 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 11:39:41,202 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:39:41,203 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 11:39:41,203 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 11:39:41,203 INFO L87 Difference]: Start difference. First operand 7144 states and 22071 transitions. Second operand 11 states. [2019-12-07 11:39:41,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:41,784 INFO L93 Difference]: Finished difference Result 13908 states and 42067 transitions. [2019-12-07 11:39:41,784 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2019-12-07 11:39:41,784 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 56 [2019-12-07 11:39:41,784 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:41,793 INFO L225 Difference]: With dead ends: 13908 [2019-12-07 11:39:41,793 INFO L226 Difference]: Without dead ends: 9326 [2019-12-07 11:39:41,794 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 41 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 438 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=301, Invalid=1339, Unknown=0, NotChecked=0, Total=1640 [2019-12-07 11:39:41,829 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9326 states. [2019-12-07 11:39:41,901 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9326 to 8440. [2019-12-07 11:39:41,901 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8440 states. [2019-12-07 11:39:41,913 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8440 states to 8440 states and 25325 transitions. [2019-12-07 11:39:41,914 INFO L78 Accepts]: Start accepts. Automaton has 8440 states and 25325 transitions. Word has length 56 [2019-12-07 11:39:41,914 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:41,914 INFO L462 AbstractCegarLoop]: Abstraction has 8440 states and 25325 transitions. [2019-12-07 11:39:41,914 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 11:39:41,914 INFO L276 IsEmpty]: Start isEmpty. Operand 8440 states and 25325 transitions. [2019-12-07 11:39:41,921 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 11:39:41,921 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:41,921 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:41,921 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:41,921 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:41,921 INFO L82 PathProgramCache]: Analyzing trace with hash -1822247207, now seen corresponding path program 3 times [2019-12-07 11:39:41,921 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:39:41,921 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1160163688] [2019-12-07 11:39:41,921 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:41,935 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:39:42,040 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:39:42,040 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1160163688] [2019-12-07 11:39:42,040 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:39:42,041 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 11:39:42,041 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [19465786] [2019-12-07 11:39:42,041 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 11:39:42,041 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:39:42,041 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 11:39:42,041 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 11:39:42,041 INFO L87 Difference]: Start difference. First operand 8440 states and 25325 transitions. Second operand 12 states. [2019-12-07 11:39:42,488 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:42,488 INFO L93 Difference]: Finished difference Result 9755 states and 28550 transitions. [2019-12-07 11:39:42,488 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-12-07 11:39:42,488 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 56 [2019-12-07 11:39:42,488 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:42,497 INFO L225 Difference]: With dead ends: 9755 [2019-12-07 11:39:42,497 INFO L226 Difference]: Without dead ends: 8994 [2019-12-07 11:39:42,497 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 169 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=173, Invalid=697, Unknown=0, NotChecked=0, Total=870 [2019-12-07 11:39:42,532 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8994 states. [2019-12-07 11:39:42,601 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8994 to 8252. [2019-12-07 11:39:42,601 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8252 states. [2019-12-07 11:39:42,612 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8252 states to 8252 states and 24782 transitions. [2019-12-07 11:39:42,613 INFO L78 Accepts]: Start accepts. Automaton has 8252 states and 24782 transitions. Word has length 56 [2019-12-07 11:39:42,613 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:42,613 INFO L462 AbstractCegarLoop]: Abstraction has 8252 states and 24782 transitions. [2019-12-07 11:39:42,613 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 11:39:42,613 INFO L276 IsEmpty]: Start isEmpty. Operand 8252 states and 24782 transitions. [2019-12-07 11:39:42,619 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 11:39:42,619 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:42,620 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:42,620 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:42,620 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:42,620 INFO L82 PathProgramCache]: Analyzing trace with hash -1734091201, now seen corresponding path program 4 times [2019-12-07 11:39:42,620 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:39:42,620 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [715748958] [2019-12-07 11:39:42,620 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:42,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 11:39:42,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 11:39:42,692 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 11:39:42,692 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 11:39:42,694 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [807] [807] ULTIMATE.startENTRY-->L818: Formula: (let ((.cse0 (store |v_#valid_66| 0 0))) (and (= 0 v_~__unbuffered_cnt~0_95) (< |v_#StackHeapBarrier_16| |v_ULTIMATE.start_main_~#t2085~0.base_30|) (= 0 v_~x~0_240) (= v_~x$r_buff1_thd0~0_309 0) (= v_~weak$$choice2~0_201 0) (= 0 v_~x$w_buff1_used~0_624) (= |v_ULTIMATE.start_main_~#t2085~0.offset_22| 0) (= 0 v_~x$r_buff1_thd2~0_264) (= v_~y~0_226 0) (= v_~z~0_95 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t2085~0.base_30|) 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t2085~0.base_30| 4)) (< 0 |v_#StackHeapBarrier_16|) (= 0 v_~x$read_delayed_var~0.base_7) (= 0 v_~x$r_buff0_thd3~0_148) (= 0 v_~x$w_buff1~0_328) (= 0 v_~x$r_buff0_thd2~0_323) (= v_~x$flush_delayed~0_62 0) (= 0 v_~x$w_buff0_used~0_913) (= 0 |v_#NULL.base_4|) (= 0 v_~x$read_delayed~0_7) (= v_~x$r_buff0_thd1~0_362 0) (= 0 v_~weak$$choice0~0_37) (= v_~main$tmp_guard1~0_53 0) (= v_~main$tmp_guard0~0_42 0) (= 0 v_~__unbuffered_p0_EAX~0_85) (= 0 v_~__unbuffered_p2_EAX~0_68) (= |v_#NULL.offset_4| 0) (= 0 v_~x$read_delayed_var~0.offset_7) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t2085~0.base_30| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t2085~0.base_30|) |v_ULTIMATE.start_main_~#t2085~0.offset_22| 0)) |v_#memory_int_23|) (= 0 v_~x$r_buff1_thd3~0_267) (= v_~x$mem_tmp~0_40 0) (= |v_#valid_64| (store .cse0 |v_ULTIMATE.start_main_~#t2085~0.base_30| 1)) (= v_~x$r_buff1_thd1~0_428 0) (= 0 v_~x$w_buff0~0_403) (= v_~x$r_buff0_thd0~0_156 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_16|, #valid=|v_#valid_66|, #memory_int=|v_#memory_int_24|, #length=|v_#length_24|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_403, ULTIMATE.start_main_~#t2087~0.base=|v_ULTIMATE.start_main_~#t2087~0.base_23|, ~x$flush_delayed~0=v_~x$flush_delayed~0_62, #NULL.offset=|v_#NULL.offset_4|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_428, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_148, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_40|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_34|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_85, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_68, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_156, ~x$w_buff1~0=v_~x$w_buff1~0_328, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_624, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_264, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ~weak$$choice0~0=v_~weak$$choice0~0_37, #StackHeapBarrier=|v_#StackHeapBarrier_16|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_8|, ULTIMATE.start_main_~#t2086~0.base=|v_ULTIMATE.start_main_~#t2086~0.base_31|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_95, ~x~0=v_~x~0_240, ULTIMATE.start_main_~#t2085~0.offset=|v_ULTIMATE.start_main_~#t2085~0.offset_22|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_362, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_114|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_267, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_53, ~x$mem_tmp~0=v_~x$mem_tmp~0_40, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_51|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_60|, ULTIMATE.start_main_~#t2085~0.base=|v_ULTIMATE.start_main_~#t2085~0.base_30|, ~y~0=v_~y~0_226, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_15|, ULTIMATE.start_main_~#t2087~0.offset=|v_ULTIMATE.start_main_~#t2087~0.offset_14|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_42, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_309, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_323, #NULL.base=|v_#NULL.base_4|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_913, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_62|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_~#t2086~0.offset=|v_ULTIMATE.start_main_~#t2086~0.offset_22|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_23|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_8|, ~z~0=v_~z~0_95, ~weak$$choice2~0=v_~weak$$choice2~0_201, ~x$read_delayed~0=v_~x$read_delayed~0_7} AuxVars[] AssignedVars[~x$w_buff0~0, ULTIMATE.start_main_~#t2085~0.offset, ULTIMATE.start_main_~#t2087~0.base, ~x$r_buff0_thd1~0, ~x$flush_delayed~0, #NULL.offset, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~x$r_buff1_thd1~0, ~main$tmp_guard1~0, ~x$r_buff0_thd3~0, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44, ~__unbuffered_p0_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t2085~0.base, ~y~0, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~nondet40, ULTIMATE.start_main_~#t2087~0.offset, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ~x$read_delayed_var~0.base, #NULL.base, ~x$w_buff0_used~0, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_~#t2086~0.offset, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_#t~nondet38, #memory_int, ULTIMATE.start_main_~#t2086~0.base, ~__unbuffered_cnt~0, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ~x~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 11:39:42,695 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L818-1-->L820: Formula: (and (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2086~0.base_10|) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t2086~0.base_10| 4) |v_#length_15|) (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t2086~0.base_10| 1) |v_#valid_31|) (= |v_ULTIMATE.start_main_~#t2086~0.offset_9| 0) (not (= 0 |v_ULTIMATE.start_main_~#t2086~0.base_10|)) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t2086~0.base_10|)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2086~0.base_10| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2086~0.base_10|) |v_ULTIMATE.start_main_~#t2086~0.offset_9| 1)) |v_#memory_int_15|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t2086~0.offset=|v_ULTIMATE.start_main_~#t2086~0.offset_9|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_4|, ULTIMATE.start_main_~#t2086~0.base=|v_ULTIMATE.start_main_~#t2086~0.base_10|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2086~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, ULTIMATE.start_main_~#t2086~0.base, #length] because there is no mapped edge [2019-12-07 11:39:42,695 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [675] [675] P1ENTRY-->L5-3: Formula: (and (= v_~x$w_buff0~0_21 v_~x$w_buff1~0_19) (= v_P1Thread1of1ForFork0_~arg.base_4 |v_P1Thread1of1ForFork0_#in~arg.base_6|) (= v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_6 |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_4|) (not (= 0 v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_6)) (= v_~x$w_buff1_used~0_52 v_~x$w_buff0_used~0_98) (= |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_4| (ite (not (and (not (= 0 (mod v_~x$w_buff0_used~0_97 256))) (not (= 0 (mod v_~x$w_buff1_used~0_52 256))))) 1 0)) (= v_P1Thread1of1ForFork0_~arg.offset_4 |v_P1Thread1of1ForFork0_#in~arg.offset_6|) (= 1 v_~x$w_buff0_used~0_97) (= 1 v_~x$w_buff0~0_20)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_21, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_6|, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_6|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_98} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_20, P1Thread1of1ForFork0___VERIFIER_assert_~expression=v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_6, P1Thread1of1ForFork0_~arg.offset=v_P1Thread1of1ForFork0_~arg.offset_4, P1Thread1of1ForFork0_~arg.base=v_P1Thread1of1ForFork0_~arg.base_4, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_6|, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_4|, ~x$w_buff1~0=v_~x$w_buff1~0_19, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_6|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_52, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_97} AuxVars[] AssignedVars[~x$w_buff0~0, P1Thread1of1ForFork0___VERIFIER_assert_~expression, P1Thread1of1ForFork0_~arg.offset, P1Thread1of1ForFork0_~arg.base, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 11:39:42,696 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L820-1-->L822: Formula: (and (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2087~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2087~0.base_11|) |v_ULTIMATE.start_main_~#t2087~0.offset_10| 2)) |v_#memory_int_13|) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t2087~0.base_11| 4)) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t2087~0.base_11|)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t2087~0.base_11|) (not (= 0 |v_ULTIMATE.start_main_~#t2087~0.base_11|)) (= |v_ULTIMATE.start_main_~#t2087~0.offset_10| 0) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t2087~0.base_11| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_14|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t2087~0.base=|v_ULTIMATE.start_main_~#t2087~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t2087~0.offset=|v_ULTIMATE.start_main_~#t2087~0.offset_10|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_13|, #length=|v_#length_13|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2087~0.base, ULTIMATE.start_main_~#t2087~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet39] because there is no mapped edge [2019-12-07 11:39:42,697 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [753] [753] L795-2-->L795-4: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In-2069088854 256))) (.cse0 (= (mod ~x$w_buff1_used~0_In-2069088854 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork1_#t~ite32_Out-2069088854| ~x~0_In-2069088854)) (and (not .cse1) (not .cse0) (= ~x$w_buff1~0_In-2069088854 |P2Thread1of1ForFork1_#t~ite32_Out-2069088854|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-2069088854, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2069088854, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-2069088854, ~x~0=~x~0_In-2069088854} OutVars{P2Thread1of1ForFork1_#t~ite32=|P2Thread1of1ForFork1_#t~ite32_Out-2069088854|, ~x$w_buff1~0=~x$w_buff1~0_In-2069088854, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2069088854, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-2069088854, ~x~0=~x~0_In-2069088854} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32] because there is no mapped edge [2019-12-07 11:39:42,697 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [677] [677] L795-4-->L796: Formula: (= v_~x~0_21 |v_P2Thread1of1ForFork1_#t~ite32_8|) InVars {P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_8|} OutVars{P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_7|, P2Thread1of1ForFork1_#t~ite33=|v_P2Thread1of1ForFork1_#t~ite33_11|, ~x~0=v_~x~0_21} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32, P2Thread1of1ForFork1_#t~ite33, ~x~0] because there is no mapped edge [2019-12-07 11:39:42,697 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] L796-->L796-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd3~0_In96309287 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In96309287 256)))) (or (and (= ~x$w_buff0_used~0_In96309287 |P2Thread1of1ForFork1_#t~ite34_Out96309287|) (or .cse0 .cse1)) (and (not .cse0) (= 0 |P2Thread1of1ForFork1_#t~ite34_Out96309287|) (not .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In96309287, ~x$w_buff0_used~0=~x$w_buff0_used~0_In96309287} OutVars{P2Thread1of1ForFork1_#t~ite34=|P2Thread1of1ForFork1_#t~ite34_Out96309287|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In96309287, ~x$w_buff0_used~0=~x$w_buff0_used~0_In96309287} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-12-07 11:39:42,698 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [746] [746] L776-->L776-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd2~0_In-56748426 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In-56748426 256) 0))) (or (and (= |P1Thread1of1ForFork0_#t~ite28_Out-56748426| 0) (not .cse0) (not .cse1)) (and (= |P1Thread1of1ForFork0_#t~ite28_Out-56748426| ~x$w_buff0_used~0_In-56748426) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-56748426, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-56748426} OutVars{~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-56748426, P1Thread1of1ForFork0_#t~ite28=|P1Thread1of1ForFork0_#t~ite28_Out-56748426|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-56748426} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite28] because there is no mapped edge [2019-12-07 11:39:42,698 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [738] [738] L777-->L777-2: Formula: (let ((.cse0 (= (mod ~x$w_buff1_used~0_In-490519094 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd2~0_In-490519094 256))) (.cse3 (= 0 (mod ~x$r_buff0_thd2~0_In-490519094 256))) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In-490519094 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork0_#t~ite29_Out-490519094| ~x$w_buff1_used~0_In-490519094) (or .cse2 .cse3)) (and (= 0 |P1Thread1of1ForFork0_#t~ite29_Out-490519094|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-490519094, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-490519094, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-490519094, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-490519094} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-490519094, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-490519094, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-490519094, P1Thread1of1ForFork0_#t~ite29=|P1Thread1of1ForFork0_#t~ite29_Out-490519094|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-490519094} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 11:39:42,698 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L778-->L779: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-1121392408 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In-1121392408 256) 0)) (.cse2 (= ~x$r_buff0_thd2~0_Out-1121392408 ~x$r_buff0_thd2~0_In-1121392408))) (or (and (= ~x$r_buff0_thd2~0_Out-1121392408 0) (not .cse0) (not .cse1)) (and .cse2 .cse0) (and .cse1 .cse2))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1121392408, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1121392408} OutVars{P1Thread1of1ForFork0_#t~ite30=|P1Thread1of1ForFork0_#t~ite30_Out-1121392408|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-1121392408, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1121392408} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite30, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 11:39:42,699 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] L779-->L779-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff1_thd2~0_In-486463264 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-486463264 256))) (.cse3 (= (mod ~x$w_buff0_used~0_In-486463264 256) 0)) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In-486463264 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork0_#t~ite31_Out-486463264| ~x$r_buff1_thd2~0_In-486463264) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |P1Thread1of1ForFork0_#t~ite31_Out-486463264| 0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-486463264, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-486463264, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-486463264, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-486463264} OutVars{P1Thread1of1ForFork0_#t~ite31=|P1Thread1of1ForFork0_#t~ite31_Out-486463264|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-486463264, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-486463264, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-486463264, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-486463264} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 11:39:42,699 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L779-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_52 1) v_~__unbuffered_cnt~0_51) (= v_~x$r_buff1_thd2~0_46 |v_P1Thread1of1ForFork0_#t~ite31_28|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|)) InVars {P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_52} OutVars{P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_27|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_46, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_51, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 11:39:42,699 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L740-->L740-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-854036548 256) 0))) (or (and (not .cse0) (= |P0Thread1of1ForFork2_#t~ite9_Out-854036548| ~x$w_buff0~0_In-854036548) (= |P0Thread1of1ForFork2_#t~ite8_In-854036548| |P0Thread1of1ForFork2_#t~ite8_Out-854036548|)) (and (= |P0Thread1of1ForFork2_#t~ite9_Out-854036548| |P0Thread1of1ForFork2_#t~ite8_Out-854036548|) (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In-854036548 256) 0))) (or (and (= (mod ~x$r_buff1_thd1~0_In-854036548 256) 0) .cse1) (= 0 (mod ~x$w_buff0_used~0_In-854036548 256)) (and (= (mod ~x$w_buff1_used~0_In-854036548 256) 0) .cse1))) (= |P0Thread1of1ForFork2_#t~ite8_Out-854036548| ~x$w_buff0~0_In-854036548) .cse0))) InVars {~x$w_buff0~0=~x$w_buff0~0_In-854036548, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-854036548, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_In-854036548|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-854036548, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-854036548, ~weak$$choice2~0=~weak$$choice2~0_In-854036548, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-854036548} OutVars{~x$w_buff0~0=~x$w_buff0~0_In-854036548, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-854036548, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_Out-854036548|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-854036548, P0Thread1of1ForFork2_#t~ite9=|P0Thread1of1ForFork2_#t~ite9_Out-854036548|, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-854036548, ~weak$$choice2~0=~weak$$choice2~0_In-854036548, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-854036548} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite8, P0Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 11:39:42,700 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L797-->L797-2: Formula: (let ((.cse2 (= (mod ~x$r_buff0_thd3~0_In1325027743 256) 0)) (.cse3 (= (mod ~x$w_buff0_used~0_In1325027743 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd3~0_In1325027743 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In1325027743 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork1_#t~ite35_Out1325027743| 0)) (and (or .cse2 .cse3) (= ~x$w_buff1_used~0_In1325027743 |P2Thread1of1ForFork1_#t~ite35_Out1325027743|) (or .cse0 .cse1)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1325027743, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1325027743, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1325027743, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1325027743} OutVars{P2Thread1of1ForFork1_#t~ite35=|P2Thread1of1ForFork1_#t~ite35_Out1325027743|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1325027743, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1325027743, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1325027743, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1325027743} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite35] because there is no mapped edge [2019-12-07 11:39:42,701 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [744] [744] L798-->L798-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In262501188 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In262501188 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork1_#t~ite36_Out262501188| 0) (not .cse1)) (and (= |P2Thread1of1ForFork1_#t~ite36_Out262501188| ~x$r_buff0_thd3~0_In262501188) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In262501188, ~x$w_buff0_used~0=~x$w_buff0_used~0_In262501188} OutVars{P2Thread1of1ForFork1_#t~ite36=|P2Thread1of1ForFork1_#t~ite36_Out262501188|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In262501188, ~x$w_buff0_used~0=~x$w_buff0_used~0_In262501188} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-12-07 11:39:42,701 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [748] [748] L799-->L799-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In-367902746 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-367902746 256))) (.cse3 (= (mod ~x$r_buff0_thd3~0_In-367902746 256) 0)) (.cse2 (= (mod ~x$w_buff0_used~0_In-367902746 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork1_#t~ite37_Out-367902746| ~x$r_buff1_thd3~0_In-367902746) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork1_#t~ite37_Out-367902746| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-367902746, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-367902746, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-367902746, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-367902746} OutVars{P2Thread1of1ForFork1_#t~ite37=|P2Thread1of1ForFork1_#t~ite37_Out-367902746|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-367902746, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-367902746, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-367902746, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-367902746} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-12-07 11:39:42,701 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L799-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|) (= v_~x$r_buff1_thd3~0_48 |v_P2Thread1of1ForFork1_#t~ite37_28|) (= (+ v_~__unbuffered_cnt~0_64 1) v_~__unbuffered_cnt~0_63)) InVars {P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_64} OutVars{P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_27|, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_48, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37, P2Thread1of1ForFork1_#res.base, ~x$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 11:39:42,702 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L743-->L743-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-167876085 256) 0))) (or (and (let ((.cse0 (= (mod ~x$r_buff0_thd1~0_In-167876085 256) 0))) (or (and .cse0 (= (mod ~x$r_buff1_thd1~0_In-167876085 256) 0)) (= (mod ~x$w_buff0_used~0_In-167876085 256) 0) (and (= (mod ~x$w_buff1_used~0_In-167876085 256) 0) .cse0))) .cse1 (= |P0Thread1of1ForFork2_#t~ite17_Out-167876085| |P0Thread1of1ForFork2_#t~ite18_Out-167876085|) (= ~x$w_buff1_used~0_In-167876085 |P0Thread1of1ForFork2_#t~ite17_Out-167876085|)) (and (= |P0Thread1of1ForFork2_#t~ite17_In-167876085| |P0Thread1of1ForFork2_#t~ite17_Out-167876085|) (= ~x$w_buff1_used~0_In-167876085 |P0Thread1of1ForFork2_#t~ite18_Out-167876085|) (not .cse1)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-167876085, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_In-167876085|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-167876085, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-167876085, ~weak$$choice2~0=~weak$$choice2~0_In-167876085, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-167876085} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-167876085, P0Thread1of1ForFork2_#t~ite18=|P0Thread1of1ForFork2_#t~ite18_Out-167876085|, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_Out-167876085|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-167876085, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-167876085, ~weak$$choice2~0=~weak$$choice2~0_In-167876085, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-167876085} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite18, P0Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 11:39:42,702 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [730] [730] L744-->L745: Formula: (and (= v_~x$r_buff0_thd1~0_101 v_~x$r_buff0_thd1~0_100) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_101, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{P0Thread1of1ForFork2_#t~ite20=|v_P0Thread1of1ForFork2_#t~ite20_9|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_100, P0Thread1of1ForFork2_#t~ite19=|v_P0Thread1of1ForFork2_#t~ite19_6|, ~weak$$choice2~0=v_~weak$$choice2~0_39, P0Thread1of1ForFork2_#t~ite21=|v_P0Thread1of1ForFork2_#t~ite21_7|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite20, ~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite19, P0Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 11:39:42,702 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L745-->L745-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-1354893089 256) 0))) (or (and (= |P0Thread1of1ForFork2_#t~ite24_Out-1354893089| |P0Thread1of1ForFork2_#t~ite23_Out-1354893089|) (= |P0Thread1of1ForFork2_#t~ite23_Out-1354893089| ~x$r_buff1_thd1~0_In-1354893089) (let ((.cse0 (= (mod ~x$r_buff0_thd1~0_In-1354893089 256) 0))) (or (= 0 (mod ~x$w_buff0_used~0_In-1354893089 256)) (and (= 0 (mod ~x$w_buff1_used~0_In-1354893089 256)) .cse0) (and (= 0 (mod ~x$r_buff1_thd1~0_In-1354893089 256)) .cse0))) .cse1) (and (not .cse1) (= |P0Thread1of1ForFork2_#t~ite23_In-1354893089| |P0Thread1of1ForFork2_#t~ite23_Out-1354893089|) (= |P0Thread1of1ForFork2_#t~ite24_Out-1354893089| ~x$r_buff1_thd1~0_In-1354893089)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1354893089, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1354893089, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1354893089, ~weak$$choice2~0=~weak$$choice2~0_In-1354893089, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_In-1354893089|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1354893089} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1354893089, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1354893089, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1354893089, P0Thread1of1ForFork2_#t~ite24=|P0Thread1of1ForFork2_#t~ite24_Out-1354893089|, ~weak$$choice2~0=~weak$$choice2~0_In-1354893089, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_Out-1354893089|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1354893089} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite24, P0Thread1of1ForFork2_#t~ite23] because there is no mapped edge [2019-12-07 11:39:42,702 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [704] [704] L747-->L755: Formula: (and (= v_~x$flush_delayed~0_17 0) (not (= (mod v_~x$flush_delayed~0_18 256) 0)) (= v_~x~0_34 v_~x$mem_tmp~0_10) (= v_~__unbuffered_cnt~0_30 (+ v_~__unbuffered_cnt~0_31 1))) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_18, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_31, ~x$mem_tmp~0=v_~x$mem_tmp~0_10} OutVars{P0Thread1of1ForFork2_#t~ite25=|v_P0Thread1of1ForFork2_#t~ite25_13|, ~x$flush_delayed~0=v_~x$flush_delayed~0_17, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_30, ~x$mem_tmp~0=v_~x$mem_tmp~0_10, ~x~0=v_~x~0_34} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite25, ~x$flush_delayed~0, ~__unbuffered_cnt~0, ~x~0] because there is no mapped edge [2019-12-07 11:39:42,703 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [699] [699] L826-->L828-2: Formula: (and (or (= 0 (mod v_~x$w_buff0_used~0_158 256)) (= 0 (mod v_~x$r_buff0_thd0~0_26 256))) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_26, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_158} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_26, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_158} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 11:39:42,703 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L828-2-->L828-4: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In1049123528 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In1049123528 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite41_Out1049123528| ~x~0_In1049123528)) (and (= ~x$w_buff1~0_In1049123528 |ULTIMATE.start_main_#t~ite41_Out1049123528|) (not .cse1) (not .cse0)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In1049123528, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1049123528, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1049123528, ~x~0=~x~0_In1049123528} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out1049123528|, ~x$w_buff1~0=~x$w_buff1~0_In1049123528, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1049123528, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1049123528, ~x~0=~x~0_In1049123528} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41] because there is no mapped edge [2019-12-07 11:39:42,703 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L828-4-->L829: Formula: (= v_~x~0_24 |v_ULTIMATE.start_main_#t~ite41_11|) InVars {ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_11|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_10|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_6|, ~x~0=v_~x~0_24} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite42, ~x~0] because there is no mapped edge [2019-12-07 11:39:42,703 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [743] [743] L829-->L829-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1841090625 256))) (.cse1 (= (mod ~x$r_buff0_thd0~0_In-1841090625 256) 0))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In-1841090625 |ULTIMATE.start_main_#t~ite43_Out-1841090625|)) (and (= |ULTIMATE.start_main_#t~ite43_Out-1841090625| 0) (not .cse0) (not .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1841090625, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1841090625} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1841090625, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out-1841090625|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1841090625} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-12-07 11:39:42,703 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [747] [747] L830-->L830-2: Formula: (let ((.cse2 (= (mod ~x$w_buff1_used~0_In-419535407 256) 0)) (.cse3 (= 0 (mod ~x$r_buff1_thd0~0_In-419535407 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In-419535407 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd0~0_In-419535407 256) 0))) (or (and (= ~x$w_buff1_used~0_In-419535407 |ULTIMATE.start_main_#t~ite44_Out-419535407|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |ULTIMATE.start_main_#t~ite44_Out-419535407| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-419535407, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-419535407, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-419535407, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-419535407} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-419535407, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-419535407, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-419535407, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-419535407|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-419535407} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 11:39:42,704 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [750] [750] L831-->L831-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In246690306 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In246690306 256)))) (or (and (= |ULTIMATE.start_main_#t~ite45_Out246690306| ~x$r_buff0_thd0~0_In246690306) (or .cse0 .cse1)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite45_Out246690306| 0) (not .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In246690306, ~x$w_buff0_used~0=~x$w_buff0_used~0_In246690306} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In246690306, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out246690306|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In246690306} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 11:39:42,704 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L832-->L832-2: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff0_thd0~0_In1521275523 256))) (.cse3 (= (mod ~x$w_buff0_used~0_In1521275523 256) 0)) (.cse1 (= (mod ~x$w_buff1_used~0_In1521275523 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In1521275523 256)))) (or (and (= |ULTIMATE.start_main_#t~ite46_Out1521275523| ~x$r_buff1_thd0~0_In1521275523) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= |ULTIMATE.start_main_#t~ite46_Out1521275523| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1521275523, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1521275523, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1521275523, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1521275523} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1521275523, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out1521275523|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1521275523, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1521275523, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1521275523} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 11:39:42,704 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L832-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_25 (ite (= (ite (not (and (= v_~z~0_60 2) (= 1 v_~__unbuffered_p2_EAX~0_35) (= 0 v_~__unbuffered_p0_EAX~0_54))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 0) (= v_~x$r_buff1_thd0~0_277 |v_ULTIMATE.start_main_#t~ite46_60|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15| (mod v_~main$tmp_guard1~0_25 256))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_54, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_60|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_35, ~z~0=v_~z~0_60} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_54, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_22, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_59|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_35, ~z~0=v_~z~0_60, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_277, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ~x$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 11:39:42,752 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 11:39:42 BasicIcfg [2019-12-07 11:39:42,752 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 11:39:42,752 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 11:39:42,752 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 11:39:42,752 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 11:39:42,753 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:36:37" (3/4) ... [2019-12-07 11:39:42,754 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 11:39:42,754 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [807] [807] ULTIMATE.startENTRY-->L818: Formula: (let ((.cse0 (store |v_#valid_66| 0 0))) (and (= 0 v_~__unbuffered_cnt~0_95) (< |v_#StackHeapBarrier_16| |v_ULTIMATE.start_main_~#t2085~0.base_30|) (= 0 v_~x~0_240) (= v_~x$r_buff1_thd0~0_309 0) (= v_~weak$$choice2~0_201 0) (= 0 v_~x$w_buff1_used~0_624) (= |v_ULTIMATE.start_main_~#t2085~0.offset_22| 0) (= 0 v_~x$r_buff1_thd2~0_264) (= v_~y~0_226 0) (= v_~z~0_95 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t2085~0.base_30|) 0) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t2085~0.base_30| 4)) (< 0 |v_#StackHeapBarrier_16|) (= 0 v_~x$read_delayed_var~0.base_7) (= 0 v_~x$r_buff0_thd3~0_148) (= 0 v_~x$w_buff1~0_328) (= 0 v_~x$r_buff0_thd2~0_323) (= v_~x$flush_delayed~0_62 0) (= 0 v_~x$w_buff0_used~0_913) (= 0 |v_#NULL.base_4|) (= 0 v_~x$read_delayed~0_7) (= v_~x$r_buff0_thd1~0_362 0) (= 0 v_~weak$$choice0~0_37) (= v_~main$tmp_guard1~0_53 0) (= v_~main$tmp_guard0~0_42 0) (= 0 v_~__unbuffered_p0_EAX~0_85) (= 0 v_~__unbuffered_p2_EAX~0_68) (= |v_#NULL.offset_4| 0) (= 0 v_~x$read_delayed_var~0.offset_7) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t2085~0.base_30| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t2085~0.base_30|) |v_ULTIMATE.start_main_~#t2085~0.offset_22| 0)) |v_#memory_int_23|) (= 0 v_~x$r_buff1_thd3~0_267) (= v_~x$mem_tmp~0_40 0) (= |v_#valid_64| (store .cse0 |v_ULTIMATE.start_main_~#t2085~0.base_30| 1)) (= v_~x$r_buff1_thd1~0_428 0) (= 0 v_~x$w_buff0~0_403) (= v_~x$r_buff0_thd0~0_156 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_16|, #valid=|v_#valid_66|, #memory_int=|v_#memory_int_24|, #length=|v_#length_24|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_403, ULTIMATE.start_main_~#t2087~0.base=|v_ULTIMATE.start_main_~#t2087~0.base_23|, ~x$flush_delayed~0=v_~x$flush_delayed~0_62, #NULL.offset=|v_#NULL.offset_4|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_428, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_148, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_40|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_34|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_85, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_68, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_156, ~x$w_buff1~0=v_~x$w_buff1~0_328, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_624, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_264, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ~weak$$choice0~0=v_~weak$$choice0~0_37, #StackHeapBarrier=|v_#StackHeapBarrier_16|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_8|, ULTIMATE.start_main_~#t2086~0.base=|v_ULTIMATE.start_main_~#t2086~0.base_31|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_95, ~x~0=v_~x~0_240, ULTIMATE.start_main_~#t2085~0.offset=|v_ULTIMATE.start_main_~#t2085~0.offset_22|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_362, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_114|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_267, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_53, ~x$mem_tmp~0=v_~x$mem_tmp~0_40, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_51|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_60|, ULTIMATE.start_main_~#t2085~0.base=|v_ULTIMATE.start_main_~#t2085~0.base_30|, ~y~0=v_~y~0_226, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_15|, ULTIMATE.start_main_~#t2087~0.offset=|v_ULTIMATE.start_main_~#t2087~0.offset_14|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_42, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_309, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_323, #NULL.base=|v_#NULL.base_4|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_913, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_62|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_~#t2086~0.offset=|v_ULTIMATE.start_main_~#t2086~0.offset_22|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_22|, #valid=|v_#valid_64|, #memory_int=|v_#memory_int_23|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_8|, ~z~0=v_~z~0_95, ~weak$$choice2~0=v_~weak$$choice2~0_201, ~x$read_delayed~0=v_~x$read_delayed~0_7} AuxVars[] AssignedVars[~x$w_buff0~0, ULTIMATE.start_main_~#t2085~0.offset, ULTIMATE.start_main_~#t2087~0.base, ~x$r_buff0_thd1~0, ~x$flush_delayed~0, #NULL.offset, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~x$r_buff1_thd1~0, ~main$tmp_guard1~0, ~x$r_buff0_thd3~0, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44, ~__unbuffered_p0_EAX~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t2085~0.base, ~y~0, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~nondet40, ULTIMATE.start_main_~#t2087~0.offset, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ~x$read_delayed_var~0.base, #NULL.base, ~x$w_buff0_used~0, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_~#t2086~0.offset, ULTIMATE.start_main_#res, #valid, ULTIMATE.start_main_#t~nondet38, #memory_int, ULTIMATE.start_main_~#t2086~0.base, ~__unbuffered_cnt~0, ULTIMATE.start_main_#t~nondet39, ~z~0, ~weak$$choice2~0, ~x~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 11:39:42,755 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L818-1-->L820: Formula: (and (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2086~0.base_10|) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t2086~0.base_10| 4) |v_#length_15|) (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t2086~0.base_10| 1) |v_#valid_31|) (= |v_ULTIMATE.start_main_~#t2086~0.offset_9| 0) (not (= 0 |v_ULTIMATE.start_main_~#t2086~0.base_10|)) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t2086~0.base_10|)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2086~0.base_10| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2086~0.base_10|) |v_ULTIMATE.start_main_~#t2086~0.offset_9| 1)) |v_#memory_int_15|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t2086~0.offset=|v_ULTIMATE.start_main_~#t2086~0.offset_9|, #valid=|v_#valid_31|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_4|, ULTIMATE.start_main_~#t2086~0.base=|v_ULTIMATE.start_main_~#t2086~0.base_10|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2086~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, ULTIMATE.start_main_~#t2086~0.base, #length] because there is no mapped edge [2019-12-07 11:39:42,755 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [675] [675] P1ENTRY-->L5-3: Formula: (and (= v_~x$w_buff0~0_21 v_~x$w_buff1~0_19) (= v_P1Thread1of1ForFork0_~arg.base_4 |v_P1Thread1of1ForFork0_#in~arg.base_6|) (= v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_6 |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_4|) (not (= 0 v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_6)) (= v_~x$w_buff1_used~0_52 v_~x$w_buff0_used~0_98) (= |v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_4| (ite (not (and (not (= 0 (mod v_~x$w_buff0_used~0_97 256))) (not (= 0 (mod v_~x$w_buff1_used~0_52 256))))) 1 0)) (= v_P1Thread1of1ForFork0_~arg.offset_4 |v_P1Thread1of1ForFork0_#in~arg.offset_6|) (= 1 v_~x$w_buff0_used~0_97) (= 1 v_~x$w_buff0~0_20)) InVars {~x$w_buff0~0=v_~x$w_buff0~0_21, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_6|, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_6|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_98} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_20, P1Thread1of1ForFork0___VERIFIER_assert_~expression=v_P1Thread1of1ForFork0___VERIFIER_assert_~expression_6, P1Thread1of1ForFork0_~arg.offset=v_P1Thread1of1ForFork0_~arg.offset_4, P1Thread1of1ForFork0_~arg.base=v_P1Thread1of1ForFork0_~arg.base_4, P1Thread1of1ForFork0_#in~arg.base=|v_P1Thread1of1ForFork0_#in~arg.base_6|, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P1Thread1of1ForFork0___VERIFIER_assert_#in~expression_4|, ~x$w_buff1~0=v_~x$w_buff1~0_19, P1Thread1of1ForFork0_#in~arg.offset=|v_P1Thread1of1ForFork0_#in~arg.offset_6|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_52, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_97} AuxVars[] AssignedVars[~x$w_buff0~0, P1Thread1of1ForFork0___VERIFIER_assert_~expression, P1Thread1of1ForFork0_~arg.offset, P1Thread1of1ForFork0_~arg.base, P1Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 11:39:42,756 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L820-1-->L822: Formula: (and (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2087~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2087~0.base_11|) |v_ULTIMATE.start_main_~#t2087~0.offset_10| 2)) |v_#memory_int_13|) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t2087~0.base_11| 4)) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t2087~0.base_11|)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t2087~0.base_11|) (not (= 0 |v_ULTIMATE.start_main_~#t2087~0.base_11|)) (= |v_ULTIMATE.start_main_~#t2087~0.offset_10| 0) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t2087~0.base_11| 1))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_14|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t2087~0.base=|v_ULTIMATE.start_main_~#t2087~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, ULTIMATE.start_main_~#t2087~0.offset=|v_ULTIMATE.start_main_~#t2087~0.offset_10|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_13|, #length=|v_#length_13|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2087~0.base, ULTIMATE.start_main_~#t2087~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet39] because there is no mapped edge [2019-12-07 11:39:42,756 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [753] [753] L795-2-->L795-4: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In-2069088854 256))) (.cse0 (= (mod ~x$w_buff1_used~0_In-2069088854 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork1_#t~ite32_Out-2069088854| ~x~0_In-2069088854)) (and (not .cse1) (not .cse0) (= ~x$w_buff1~0_In-2069088854 |P2Thread1of1ForFork1_#t~ite32_Out-2069088854|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-2069088854, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2069088854, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-2069088854, ~x~0=~x~0_In-2069088854} OutVars{P2Thread1of1ForFork1_#t~ite32=|P2Thread1of1ForFork1_#t~ite32_Out-2069088854|, ~x$w_buff1~0=~x$w_buff1~0_In-2069088854, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-2069088854, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-2069088854, ~x~0=~x~0_In-2069088854} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32] because there is no mapped edge [2019-12-07 11:39:42,757 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [677] [677] L795-4-->L796: Formula: (= v_~x~0_21 |v_P2Thread1of1ForFork1_#t~ite32_8|) InVars {P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_8|} OutVars{P2Thread1of1ForFork1_#t~ite32=|v_P2Thread1of1ForFork1_#t~ite32_7|, P2Thread1of1ForFork1_#t~ite33=|v_P2Thread1of1ForFork1_#t~ite33_11|, ~x~0=v_~x~0_21} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite32, P2Thread1of1ForFork1_#t~ite33, ~x~0] because there is no mapped edge [2019-12-07 11:39:42,757 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] L796-->L796-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd3~0_In96309287 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In96309287 256)))) (or (and (= ~x$w_buff0_used~0_In96309287 |P2Thread1of1ForFork1_#t~ite34_Out96309287|) (or .cse0 .cse1)) (and (not .cse0) (= 0 |P2Thread1of1ForFork1_#t~ite34_Out96309287|) (not .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In96309287, ~x$w_buff0_used~0=~x$w_buff0_used~0_In96309287} OutVars{P2Thread1of1ForFork1_#t~ite34=|P2Thread1of1ForFork1_#t~ite34_Out96309287|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In96309287, ~x$w_buff0_used~0=~x$w_buff0_used~0_In96309287} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite34] because there is no mapped edge [2019-12-07 11:39:42,757 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [746] [746] L776-->L776-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd2~0_In-56748426 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In-56748426 256) 0))) (or (and (= |P1Thread1of1ForFork0_#t~ite28_Out-56748426| 0) (not .cse0) (not .cse1)) (and (= |P1Thread1of1ForFork0_#t~ite28_Out-56748426| ~x$w_buff0_used~0_In-56748426) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-56748426, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-56748426} OutVars{~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-56748426, P1Thread1of1ForFork0_#t~ite28=|P1Thread1of1ForFork0_#t~ite28_Out-56748426|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-56748426} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite28] because there is no mapped edge [2019-12-07 11:39:42,758 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [738] [738] L777-->L777-2: Formula: (let ((.cse0 (= (mod ~x$w_buff1_used~0_In-490519094 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd2~0_In-490519094 256))) (.cse3 (= 0 (mod ~x$r_buff0_thd2~0_In-490519094 256))) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In-490519094 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork0_#t~ite29_Out-490519094| ~x$w_buff1_used~0_In-490519094) (or .cse2 .cse3)) (and (= 0 |P1Thread1of1ForFork0_#t~ite29_Out-490519094|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-490519094, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-490519094, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-490519094, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-490519094} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-490519094, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-490519094, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-490519094, P1Thread1of1ForFork0_#t~ite29=|P1Thread1of1ForFork0_#t~ite29_Out-490519094|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-490519094} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 11:39:42,758 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L778-->L779: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd2~0_In-1121392408 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In-1121392408 256) 0)) (.cse2 (= ~x$r_buff0_thd2~0_Out-1121392408 ~x$r_buff0_thd2~0_In-1121392408))) (or (and (= ~x$r_buff0_thd2~0_Out-1121392408 0) (not .cse0) (not .cse1)) (and .cse2 .cse0) (and .cse1 .cse2))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-1121392408, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1121392408} OutVars{P1Thread1of1ForFork0_#t~ite30=|P1Thread1of1ForFork0_#t~ite30_Out-1121392408|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-1121392408, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1121392408} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite30, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 11:39:42,758 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] L779-->L779-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff1_thd2~0_In-486463264 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-486463264 256))) (.cse3 (= (mod ~x$w_buff0_used~0_In-486463264 256) 0)) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In-486463264 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork0_#t~ite31_Out-486463264| ~x$r_buff1_thd2~0_In-486463264) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |P1Thread1of1ForFork0_#t~ite31_Out-486463264| 0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-486463264, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-486463264, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-486463264, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-486463264} OutVars{P1Thread1of1ForFork0_#t~ite31=|P1Thread1of1ForFork0_#t~ite31_Out-486463264|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-486463264, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-486463264, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-486463264, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-486463264} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 11:39:42,758 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L779-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork0_#res.offset_3|) (= (+ v_~__unbuffered_cnt~0_52 1) v_~__unbuffered_cnt~0_51) (= v_~x$r_buff1_thd2~0_46 |v_P1Thread1of1ForFork0_#t~ite31_28|) (= 0 |v_P1Thread1of1ForFork0_#res.base_3|)) InVars {P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_52} OutVars{P1Thread1of1ForFork0_#t~ite31=|v_P1Thread1of1ForFork0_#t~ite31_27|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_46, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_51, P1Thread1of1ForFork0_#res.offset=|v_P1Thread1of1ForFork0_#res.offset_3|, P1Thread1of1ForFork0_#res.base=|v_P1Thread1of1ForFork0_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork0_#t~ite31, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork0_#res.offset, P1Thread1of1ForFork0_#res.base] because there is no mapped edge [2019-12-07 11:39:42,759 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L740-->L740-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-854036548 256) 0))) (or (and (not .cse0) (= |P0Thread1of1ForFork2_#t~ite9_Out-854036548| ~x$w_buff0~0_In-854036548) (= |P0Thread1of1ForFork2_#t~ite8_In-854036548| |P0Thread1of1ForFork2_#t~ite8_Out-854036548|)) (and (= |P0Thread1of1ForFork2_#t~ite9_Out-854036548| |P0Thread1of1ForFork2_#t~ite8_Out-854036548|) (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In-854036548 256) 0))) (or (and (= (mod ~x$r_buff1_thd1~0_In-854036548 256) 0) .cse1) (= 0 (mod ~x$w_buff0_used~0_In-854036548 256)) (and (= (mod ~x$w_buff1_used~0_In-854036548 256) 0) .cse1))) (= |P0Thread1of1ForFork2_#t~ite8_Out-854036548| ~x$w_buff0~0_In-854036548) .cse0))) InVars {~x$w_buff0~0=~x$w_buff0~0_In-854036548, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-854036548, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_In-854036548|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-854036548, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-854036548, ~weak$$choice2~0=~weak$$choice2~0_In-854036548, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-854036548} OutVars{~x$w_buff0~0=~x$w_buff0~0_In-854036548, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-854036548, P0Thread1of1ForFork2_#t~ite8=|P0Thread1of1ForFork2_#t~ite8_Out-854036548|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-854036548, P0Thread1of1ForFork2_#t~ite9=|P0Thread1of1ForFork2_#t~ite9_Out-854036548|, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-854036548, ~weak$$choice2~0=~weak$$choice2~0_In-854036548, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-854036548} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite8, P0Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 11:39:42,760 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L797-->L797-2: Formula: (let ((.cse2 (= (mod ~x$r_buff0_thd3~0_In1325027743 256) 0)) (.cse3 (= (mod ~x$w_buff0_used~0_In1325027743 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd3~0_In1325027743 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In1325027743 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork1_#t~ite35_Out1325027743| 0)) (and (or .cse2 .cse3) (= ~x$w_buff1_used~0_In1325027743 |P2Thread1of1ForFork1_#t~ite35_Out1325027743|) (or .cse0 .cse1)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1325027743, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1325027743, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1325027743, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1325027743} OutVars{P2Thread1of1ForFork1_#t~ite35=|P2Thread1of1ForFork1_#t~ite35_Out1325027743|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1325027743, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1325027743, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1325027743, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1325027743} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite35] because there is no mapped edge [2019-12-07 11:39:42,760 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [744] [744] L798-->L798-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In262501188 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In262501188 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork1_#t~ite36_Out262501188| 0) (not .cse1)) (and (= |P2Thread1of1ForFork1_#t~ite36_Out262501188| ~x$r_buff0_thd3~0_In262501188) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In262501188, ~x$w_buff0_used~0=~x$w_buff0_used~0_In262501188} OutVars{P2Thread1of1ForFork1_#t~ite36=|P2Thread1of1ForFork1_#t~ite36_Out262501188|, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In262501188, ~x$w_buff0_used~0=~x$w_buff0_used~0_In262501188} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite36] because there is no mapped edge [2019-12-07 11:39:42,760 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [748] [748] L799-->L799-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff1_thd3~0_In-367902746 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In-367902746 256))) (.cse3 (= (mod ~x$r_buff0_thd3~0_In-367902746 256) 0)) (.cse2 (= (mod ~x$w_buff0_used~0_In-367902746 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork1_#t~ite37_Out-367902746| ~x$r_buff1_thd3~0_In-367902746) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork1_#t~ite37_Out-367902746| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-367902746, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-367902746, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-367902746, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-367902746} OutVars{P2Thread1of1ForFork1_#t~ite37=|P2Thread1of1ForFork1_#t~ite37_Out-367902746|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-367902746, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-367902746, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-367902746, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-367902746} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37] because there is no mapped edge [2019-12-07 11:39:42,761 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L799-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork1_#res.offset_3|) (= 0 |v_P2Thread1of1ForFork1_#res.base_3|) (= v_~x$r_buff1_thd3~0_48 |v_P2Thread1of1ForFork1_#t~ite37_28|) (= (+ v_~__unbuffered_cnt~0_64 1) v_~__unbuffered_cnt~0_63)) InVars {P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_64} OutVars{P2Thread1of1ForFork1_#t~ite37=|v_P2Thread1of1ForFork1_#t~ite37_27|, P2Thread1of1ForFork1_#res.base=|v_P2Thread1of1ForFork1_#res.base_3|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_48, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63, P2Thread1of1ForFork1_#res.offset=|v_P2Thread1of1ForFork1_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork1_#t~ite37, P2Thread1of1ForFork1_#res.base, ~x$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork1_#res.offset] because there is no mapped edge [2019-12-07 11:39:42,761 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [790] [790] L743-->L743-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-167876085 256) 0))) (or (and (let ((.cse0 (= (mod ~x$r_buff0_thd1~0_In-167876085 256) 0))) (or (and .cse0 (= (mod ~x$r_buff1_thd1~0_In-167876085 256) 0)) (= (mod ~x$w_buff0_used~0_In-167876085 256) 0) (and (= (mod ~x$w_buff1_used~0_In-167876085 256) 0) .cse0))) .cse1 (= |P0Thread1of1ForFork2_#t~ite17_Out-167876085| |P0Thread1of1ForFork2_#t~ite18_Out-167876085|) (= ~x$w_buff1_used~0_In-167876085 |P0Thread1of1ForFork2_#t~ite17_Out-167876085|)) (and (= |P0Thread1of1ForFork2_#t~ite17_In-167876085| |P0Thread1of1ForFork2_#t~ite17_Out-167876085|) (= ~x$w_buff1_used~0_In-167876085 |P0Thread1of1ForFork2_#t~ite18_Out-167876085|) (not .cse1)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-167876085, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_In-167876085|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-167876085, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-167876085, ~weak$$choice2~0=~weak$$choice2~0_In-167876085, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-167876085} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-167876085, P0Thread1of1ForFork2_#t~ite18=|P0Thread1of1ForFork2_#t~ite18_Out-167876085|, P0Thread1of1ForFork2_#t~ite17=|P0Thread1of1ForFork2_#t~ite17_Out-167876085|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-167876085, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-167876085, ~weak$$choice2~0=~weak$$choice2~0_In-167876085, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-167876085} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite18, P0Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 11:39:42,762 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [730] [730] L744-->L745: Formula: (and (= v_~x$r_buff0_thd1~0_101 v_~x$r_buff0_thd1~0_100) (not (= (mod v_~weak$$choice2~0_39 256) 0))) InVars {~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_101, ~weak$$choice2~0=v_~weak$$choice2~0_39} OutVars{P0Thread1of1ForFork2_#t~ite20=|v_P0Thread1of1ForFork2_#t~ite20_9|, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_100, P0Thread1of1ForFork2_#t~ite19=|v_P0Thread1of1ForFork2_#t~ite19_6|, ~weak$$choice2~0=v_~weak$$choice2~0_39, P0Thread1of1ForFork2_#t~ite21=|v_P0Thread1of1ForFork2_#t~ite21_7|} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite20, ~x$r_buff0_thd1~0, P0Thread1of1ForFork2_#t~ite19, P0Thread1of1ForFork2_#t~ite21] because there is no mapped edge [2019-12-07 11:39:42,762 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L745-->L745-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-1354893089 256) 0))) (or (and (= |P0Thread1of1ForFork2_#t~ite24_Out-1354893089| |P0Thread1of1ForFork2_#t~ite23_Out-1354893089|) (= |P0Thread1of1ForFork2_#t~ite23_Out-1354893089| ~x$r_buff1_thd1~0_In-1354893089) (let ((.cse0 (= (mod ~x$r_buff0_thd1~0_In-1354893089 256) 0))) (or (= 0 (mod ~x$w_buff0_used~0_In-1354893089 256)) (and (= 0 (mod ~x$w_buff1_used~0_In-1354893089 256)) .cse0) (and (= 0 (mod ~x$r_buff1_thd1~0_In-1354893089 256)) .cse0))) .cse1) (and (not .cse1) (= |P0Thread1of1ForFork2_#t~ite23_In-1354893089| |P0Thread1of1ForFork2_#t~ite23_Out-1354893089|) (= |P0Thread1of1ForFork2_#t~ite24_Out-1354893089| ~x$r_buff1_thd1~0_In-1354893089)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1354893089, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1354893089, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1354893089, ~weak$$choice2~0=~weak$$choice2~0_In-1354893089, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_In-1354893089|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1354893089} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1354893089, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1354893089, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1354893089, P0Thread1of1ForFork2_#t~ite24=|P0Thread1of1ForFork2_#t~ite24_Out-1354893089|, ~weak$$choice2~0=~weak$$choice2~0_In-1354893089, P0Thread1of1ForFork2_#t~ite23=|P0Thread1of1ForFork2_#t~ite23_Out-1354893089|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1354893089} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite24, P0Thread1of1ForFork2_#t~ite23] because there is no mapped edge [2019-12-07 11:39:42,762 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [704] [704] L747-->L755: Formula: (and (= v_~x$flush_delayed~0_17 0) (not (= (mod v_~x$flush_delayed~0_18 256) 0)) (= v_~x~0_34 v_~x$mem_tmp~0_10) (= v_~__unbuffered_cnt~0_30 (+ v_~__unbuffered_cnt~0_31 1))) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_18, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_31, ~x$mem_tmp~0=v_~x$mem_tmp~0_10} OutVars{P0Thread1of1ForFork2_#t~ite25=|v_P0Thread1of1ForFork2_#t~ite25_13|, ~x$flush_delayed~0=v_~x$flush_delayed~0_17, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_30, ~x$mem_tmp~0=v_~x$mem_tmp~0_10, ~x~0=v_~x~0_34} AuxVars[] AssignedVars[P0Thread1of1ForFork2_#t~ite25, ~x$flush_delayed~0, ~__unbuffered_cnt~0, ~x~0] because there is no mapped edge [2019-12-07 11:39:42,762 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [699] [699] L826-->L828-2: Formula: (and (or (= 0 (mod v_~x$w_buff0_used~0_158 256)) (= 0 (mod v_~x$r_buff0_thd0~0_26 256))) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_26, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_158} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_26, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_158} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 11:39:42,762 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [749] [749] L828-2-->L828-4: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In1049123528 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In1049123528 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite41_Out1049123528| ~x~0_In1049123528)) (and (= ~x$w_buff1~0_In1049123528 |ULTIMATE.start_main_#t~ite41_Out1049123528|) (not .cse1) (not .cse0)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In1049123528, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1049123528, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1049123528, ~x~0=~x~0_In1049123528} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out1049123528|, ~x$w_buff1~0=~x$w_buff1~0_In1049123528, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1049123528, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1049123528, ~x~0=~x~0_In1049123528} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41] because there is no mapped edge [2019-12-07 11:39:42,762 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L828-4-->L829: Formula: (= v_~x~0_24 |v_ULTIMATE.start_main_#t~ite41_11|) InVars {ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_11|} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_10|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_6|, ~x~0=v_~x~0_24} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite42, ~x~0] because there is no mapped edge [2019-12-07 11:39:42,763 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [743] [743] L829-->L829-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1841090625 256))) (.cse1 (= (mod ~x$r_buff0_thd0~0_In-1841090625 256) 0))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In-1841090625 |ULTIMATE.start_main_#t~ite43_Out-1841090625|)) (and (= |ULTIMATE.start_main_#t~ite43_Out-1841090625| 0) (not .cse0) (not .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1841090625, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1841090625} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1841090625, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out-1841090625|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1841090625} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43] because there is no mapped edge [2019-12-07 11:39:42,763 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [747] [747] L830-->L830-2: Formula: (let ((.cse2 (= (mod ~x$w_buff1_used~0_In-419535407 256) 0)) (.cse3 (= 0 (mod ~x$r_buff1_thd0~0_In-419535407 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In-419535407 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd0~0_In-419535407 256) 0))) (or (and (= ~x$w_buff1_used~0_In-419535407 |ULTIMATE.start_main_#t~ite44_Out-419535407|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |ULTIMATE.start_main_#t~ite44_Out-419535407| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-419535407, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-419535407, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-419535407, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-419535407} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-419535407, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-419535407, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-419535407, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out-419535407|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-419535407} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 11:39:42,763 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [750] [750] L831-->L831-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In246690306 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In246690306 256)))) (or (and (= |ULTIMATE.start_main_#t~ite45_Out246690306| ~x$r_buff0_thd0~0_In246690306) (or .cse0 .cse1)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite45_Out246690306| 0) (not .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In246690306, ~x$w_buff0_used~0=~x$w_buff0_used~0_In246690306} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In246690306, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out246690306|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In246690306} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 11:39:42,764 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [739] [739] L832-->L832-2: Formula: (let ((.cse2 (= 0 (mod ~x$r_buff0_thd0~0_In1521275523 256))) (.cse3 (= (mod ~x$w_buff0_used~0_In1521275523 256) 0)) (.cse1 (= (mod ~x$w_buff1_used~0_In1521275523 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In1521275523 256)))) (or (and (= |ULTIMATE.start_main_#t~ite46_Out1521275523| ~x$r_buff1_thd0~0_In1521275523) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= |ULTIMATE.start_main_#t~ite46_Out1521275523| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1521275523, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1521275523, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1521275523, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1521275523} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1521275523, ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out1521275523|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1521275523, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1521275523, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1521275523} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46] because there is no mapped edge [2019-12-07 11:39:42,764 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L832-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_~main$tmp_guard1~0_25 (ite (= (ite (not (and (= v_~z~0_60 2) (= 1 v_~__unbuffered_p2_EAX~0_35) (= 0 v_~__unbuffered_p0_EAX~0_54))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_22 0) (= v_~x$r_buff1_thd0~0_277 |v_ULTIMATE.start_main_#t~ite46_60|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_15| (mod v_~main$tmp_guard1~0_25 256))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_54, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_60|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_35, ~z~0=v_~z~0_60} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_54, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_22, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_59|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_25, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_35, ~z~0=v_~z~0_60, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_277, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_15|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ~x$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 11:39:42,812 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_99fce1cb-abf8-4c14-9f5b-f300c92df333/bin/uautomizer/witness.graphml [2019-12-07 11:39:42,812 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 11:39:42,813 INFO L168 Benchmark]: Toolchain (without parser) took 186337.00 ms. Allocated memory was 1.0 GB in the beginning and 8.7 GB in the end (delta: 7.7 GB). Free memory was 939.3 MB in the beginning and 5.9 GB in the end (delta: -4.9 GB). Peak memory consumption was 2.8 GB. Max. memory is 11.5 GB. [2019-12-07 11:39:42,814 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 11:39:42,814 INFO L168 Benchmark]: CACSL2BoogieTranslator took 418.43 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 98.0 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -125.1 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. [2019-12-07 11:39:42,814 INFO L168 Benchmark]: Boogie Procedure Inliner took 37.10 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 11:39:42,814 INFO L168 Benchmark]: Boogie Preprocessor took 23.60 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 11:39:42,815 INFO L168 Benchmark]: RCFGBuilder took 395.19 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.0 MB). Peak memory consumption was 56.0 MB. Max. memory is 11.5 GB. [2019-12-07 11:39:42,815 INFO L168 Benchmark]: TraceAbstraction took 185395.59 ms. Allocated memory was 1.1 GB in the beginning and 8.7 GB in the end (delta: 7.6 GB). Free memory was 1.0 GB in the beginning and 5.9 GB in the end (delta: -4.9 GB). Peak memory consumption was 2.7 GB. Max. memory is 11.5 GB. [2019-12-07 11:39:42,815 INFO L168 Benchmark]: Witness Printer took 60.38 ms. Allocated memory is still 8.7 GB. Free memory was 5.9 GB in the beginning and 5.9 GB in the end (delta: 38.0 MB). Peak memory consumption was 38.0 MB. Max. memory is 11.5 GB. [2019-12-07 11:39:42,816 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 418.43 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 98.0 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -125.1 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 37.10 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 23.60 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 395.19 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.0 MB). Peak memory consumption was 56.0 MB. Max. memory is 11.5 GB. * TraceAbstraction took 185395.59 ms. Allocated memory was 1.1 GB in the beginning and 8.7 GB in the end (delta: 7.6 GB). Free memory was 1.0 GB in the beginning and 5.9 GB in the end (delta: -4.9 GB). Peak memory consumption was 2.7 GB. Max. memory is 11.5 GB. * Witness Printer took 60.38 ms. Allocated memory is still 8.7 GB. Free memory was 5.9 GB in the beginning and 5.9 GB in the end (delta: 38.0 MB). Peak memory consumption was 38.0 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.2s, 163 ProgramPointsBefore, 83 ProgramPointsAfterwards, 194 TransitionsBefore, 92 TransitionsAfterwards, 16696 CoEnabledTransitionPairs, 7 FixpointIterations, 32 TrivialSequentialCompositions, 45 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 35 ConcurrentYvCompositions, 26 ChoiceCompositions, 6709 VarBasedMoverChecksPositive, 292 VarBasedMoverChecksNegative, 116 SemBasedMoverChecksPositive, 259 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 66094 CheckedPairsTotal, 112 TotalNumberOfCompositions - CounterExampleResult [Line: 5]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L818] FCALL, FORK 0 pthread_create(&t2085, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L820] FCALL, FORK 0 pthread_create(&t2086, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L765] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L766] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L767] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L768] 2 x$r_buff1_thd3 = x$r_buff0_thd3 [L769] 2 x$r_buff0_thd2 = (_Bool)1 [L772] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L775] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L822] FCALL, FORK 0 pthread_create(&t2087, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L789] 3 __unbuffered_p2_EAX = y [L792] 3 z = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L795] 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L775] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L730] 1 z = 2 [L735] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L736] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L737] 1 x$flush_delayed = weak$$choice2 [L738] 1 x$mem_tmp = x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L739] EXPR 1 !x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1) VAL [!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L776] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L777] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L739] 1 x = !x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff1) [L740] 1 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : x$w_buff0)) [L741] EXPR 1 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1))=0, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=0, x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L741] 1 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff1 : x$w_buff1)) [L796] 3 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used [L797] 3 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used [L798] 3 x$r_buff0_thd3 = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$r_buff0_thd3 [L742] EXPR 1 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used))=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L742] 1 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used)) [L743] 1 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L745] 1 x$r_buff1_thd1 = weak$$choice2 ? x$r_buff1_thd1 : (!x$w_buff0_used || !x$r_buff0_thd1 && !x$w_buff1_used || !x$r_buff0_thd1 && !x$r_buff1_thd1 ? x$r_buff1_thd1 : (x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L746] 1 __unbuffered_p0_EAX = x VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=1, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L824] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [\result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p2_EAX=1, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=1, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=2] [L829] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L830] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L831] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 154 locations, 2 error locations. Result: UNSAFE, OverallTime: 185.2s, OverallIterations: 27, TraceHistogramMax: 1, AutomataDifference: 36.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 3796 SDtfs, 5284 SDslu, 8500 SDs, 0 SdLazy, 4127 SolverSat, 214 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 200 GetRequests, 30 SyntacticMatches, 11 SemanticMatches, 159 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 636 ImplicationChecksByTransitivity, 0.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=267700occurred in iteration=10, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 134.4s AutomataMinimizationTime, 26 MinimizatonAttempts, 417105 StatesRemovedByMinimization, 23 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.9s InterpolantComputationTime, 790 NumberOfCodeBlocks, 790 NumberOfCodeBlocksAsserted, 27 NumberOfCheckSat, 708 ConstructedInterpolants, 0 QuantifiedInterpolants, 91964 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 26 InterpolantComputations, 26 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...