./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe017_power.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_fe231d1c-0540-4b05-ba16-4c912cee4126/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_fe231d1c-0540-4b05-ba16-4c912cee4126/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_fe231d1c-0540-4b05-ba16-4c912cee4126/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_fe231d1c-0540-4b05-ba16-4c912cee4126/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe017_power.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_fe231d1c-0540-4b05-ba16-4c912cee4126/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_fe231d1c-0540-4b05-ba16-4c912cee4126/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash fef4d4afe622a61f21c6e19cc48745c29ec2c7f0 ....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 18:19:10,338 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 18:19:10,340 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 18:19:10,347 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 18:19:10,347 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 18:19:10,348 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 18:19:10,349 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 18:19:10,350 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 18:19:10,351 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 18:19:10,352 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 18:19:10,353 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 18:19:10,353 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 18:19:10,354 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 18:19:10,354 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 18:19:10,355 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 18:19:10,356 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 18:19:10,356 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 18:19:10,357 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 18:19:10,358 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 18:19:10,360 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 18:19:10,361 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 18:19:10,362 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 18:19:10,362 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 18:19:10,363 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 18:19:10,364 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 18:19:10,365 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 18:19:10,365 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 18:19:10,365 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 18:19:10,365 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 18:19:10,366 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 18:19:10,366 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 18:19:10,367 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 18:19:10,367 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 18:19:10,367 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 18:19:10,368 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 18:19:10,368 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 18:19:10,368 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 18:19:10,369 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 18:19:10,369 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 18:19:10,369 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 18:19:10,370 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 18:19:10,370 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_fe231d1c-0540-4b05-ba16-4c912cee4126/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 18:19:10,379 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 18:19:10,380 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 18:19:10,380 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 18:19:10,381 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 18:19:10,381 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 18:19:10,381 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 18:19:10,381 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 18:19:10,381 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 18:19:10,381 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 18:19:10,381 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 18:19:10,381 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 18:19:10,382 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 18:19:10,382 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 18:19:10,382 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 18:19:10,382 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 18:19:10,382 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 18:19:10,382 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 18:19:10,382 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 18:19:10,382 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 18:19:10,383 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 18:19:10,383 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 18:19:10,383 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:19:10,383 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 18:19:10,383 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 18:19:10,383 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 18:19:10,383 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 18:19:10,383 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 18:19:10,384 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 18:19:10,384 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 18:19:10,384 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_fe231d1c-0540-4b05-ba16-4c912cee4126/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> fef4d4afe622a61f21c6e19cc48745c29ec2c7f0 [2019-12-07 18:19:10,484 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 18:19:10,492 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 18:19:10,494 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 18:19:10,495 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 18:19:10,495 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 18:19:10,496 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_fe231d1c-0540-4b05-ba16-4c912cee4126/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe017_power.oepc.i [2019-12-07 18:19:10,532 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_fe231d1c-0540-4b05-ba16-4c912cee4126/bin/uautomizer/data/ef3d4b956/836348e0b7ef4d9898001a845b914c6e/FLAG3b5a57865 [2019-12-07 18:19:10,998 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 18:19:10,998 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_fe231d1c-0540-4b05-ba16-4c912cee4126/sv-benchmarks/c/pthread-wmm/safe017_power.oepc.i [2019-12-07 18:19:11,009 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_fe231d1c-0540-4b05-ba16-4c912cee4126/bin/uautomizer/data/ef3d4b956/836348e0b7ef4d9898001a845b914c6e/FLAG3b5a57865 [2019-12-07 18:19:11,514 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_fe231d1c-0540-4b05-ba16-4c912cee4126/bin/uautomizer/data/ef3d4b956/836348e0b7ef4d9898001a845b914c6e [2019-12-07 18:19:11,516 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 18:19:11,517 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 18:19:11,518 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 18:19:11,518 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 18:19:11,520 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 18:19:11,520 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:19:11" (1/1) ... [2019-12-07 18:19:11,522 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@27a7eda1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:19:11, skipping insertion in model container [2019-12-07 18:19:11,522 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:19:11" (1/1) ... [2019-12-07 18:19:11,527 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 18:19:11,556 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 18:19:11,791 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:19:11,799 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 18:19:11,840 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:19:11,885 INFO L208 MainTranslator]: Completed translation [2019-12-07 18:19:11,885 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:19:11 WrapperNode [2019-12-07 18:19:11,885 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 18:19:11,886 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 18:19:11,886 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 18:19:11,886 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 18:19:11,892 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:19:11" (1/1) ... [2019-12-07 18:19:11,905 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:19:11" (1/1) ... [2019-12-07 18:19:11,926 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 18:19:11,926 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 18:19:11,926 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 18:19:11,926 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 18:19:11,933 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:19:11" (1/1) ... [2019-12-07 18:19:11,933 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:19:11" (1/1) ... [2019-12-07 18:19:11,936 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:19:11" (1/1) ... [2019-12-07 18:19:11,937 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:19:11" (1/1) ... [2019-12-07 18:19:11,943 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:19:11" (1/1) ... [2019-12-07 18:19:11,946 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:19:11" (1/1) ... [2019-12-07 18:19:11,949 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:19:11" (1/1) ... [2019-12-07 18:19:11,952 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 18:19:11,953 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 18:19:11,953 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 18:19:11,953 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 18:19:11,953 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:19:11" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_fe231d1c-0540-4b05-ba16-4c912cee4126/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:19:11,994 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 18:19:11,994 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 18:19:11,994 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 18:19:11,994 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 18:19:11,994 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 18:19:11,994 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 18:19:11,994 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 18:19:11,995 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 18:19:11,995 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 18:19:11,995 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 18:19:11,995 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 18:19:11,995 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 18:19:11,995 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 18:19:11,996 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 18:19:12,346 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 18:19:12,347 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 18:19:12,348 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:19:12 BoogieIcfgContainer [2019-12-07 18:19:12,348 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 18:19:12,348 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 18:19:12,348 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 18:19:12,350 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 18:19:12,350 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 06:19:11" (1/3) ... [2019-12-07 18:19:12,351 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3b006460 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:19:12, skipping insertion in model container [2019-12-07 18:19:12,351 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:19:11" (2/3) ... [2019-12-07 18:19:12,351 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3b006460 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:19:12, skipping insertion in model container [2019-12-07 18:19:12,351 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:19:12" (3/3) ... [2019-12-07 18:19:12,352 INFO L109 eAbstractionObserver]: Analyzing ICFG safe017_power.oepc.i [2019-12-07 18:19:12,359 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 18:19:12,359 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 18:19:12,364 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 18:19:12,364 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 18:19:12,387 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,387 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,387 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,388 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,388 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,388 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,388 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,388 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,388 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,389 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,389 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,389 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,389 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,389 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,389 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,389 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,389 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,389 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,390 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,390 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,390 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,390 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,390 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,390 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,390 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,390 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,390 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,391 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,391 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,391 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,391 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,391 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,391 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,391 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,392 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,392 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,392 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,392 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,392 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,392 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,392 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,392 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,392 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,393 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,393 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,393 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,393 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,393 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,393 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,393 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,393 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,394 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,394 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,394 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,394 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,394 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,394 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,394 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,394 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,395 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,395 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,395 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,395 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,395 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,395 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,395 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,396 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,396 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,396 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,396 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,396 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,396 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,396 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,396 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,396 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,397 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,397 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,397 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,397 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,397 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,397 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,397 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,397 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,397 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,397 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,398 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,398 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,398 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,398 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,398 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,398 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,398 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,398 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,398 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:19:12,409 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 18:19:12,421 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 18:19:12,422 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 18:19:12,422 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 18:19:12,422 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 18:19:12,422 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 18:19:12,422 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 18:19:12,422 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 18:19:12,422 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 18:19:12,433 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 173 places, 210 transitions [2019-12-07 18:19:12,435 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 173 places, 210 transitions [2019-12-07 18:19:12,489 INFO L134 PetriNetUnfolder]: 47/207 cut-off events. [2019-12-07 18:19:12,490 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:19:12,500 INFO L76 FinitePrefix]: Finished finitePrefix Result has 217 conditions, 207 events. 47/207 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 585 event pairs. 9/167 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 18:19:12,513 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 173 places, 210 transitions [2019-12-07 18:19:12,542 INFO L134 PetriNetUnfolder]: 47/207 cut-off events. [2019-12-07 18:19:12,542 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:19:12,547 INFO L76 FinitePrefix]: Finished finitePrefix Result has 217 conditions, 207 events. 47/207 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 585 event pairs. 9/167 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 18:19:12,562 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 17114 [2019-12-07 18:19:12,563 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 18:19:15,423 WARN L192 SmtUtils]: Spent 127.00 ms on a formula simplification. DAG size of input: 85 DAG size of output: 83 [2019-12-07 18:19:15,503 INFO L206 etLargeBlockEncoding]: Checked pairs total: 78185 [2019-12-07 18:19:15,503 INFO L214 etLargeBlockEncoding]: Total number of compositions: 113 [2019-12-07 18:19:15,506 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 94 places, 104 transitions [2019-12-07 18:19:28,355 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 112926 states. [2019-12-07 18:19:28,357 INFO L276 IsEmpty]: Start isEmpty. Operand 112926 states. [2019-12-07 18:19:28,360 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 18:19:28,361 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:19:28,361 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 18:19:28,361 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:19:28,365 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:19:28,365 INFO L82 PathProgramCache]: Analyzing trace with hash 844394, now seen corresponding path program 1 times [2019-12-07 18:19:28,371 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:19:28,371 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [888735817] [2019-12-07 18:19:28,371 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:19:28,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:19:28,505 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:19:28,506 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [888735817] [2019-12-07 18:19:28,506 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:19:28,506 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:19:28,507 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1327285644] [2019-12-07 18:19:28,511 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:19:28,511 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:19:28,523 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:19:28,524 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:19:28,526 INFO L87 Difference]: Start difference. First operand 112926 states. Second operand 3 states. [2019-12-07 18:19:29,272 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:19:29,273 INFO L93 Difference]: Finished difference Result 112536 states and 479624 transitions. [2019-12-07 18:19:29,274 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:19:29,274 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 18:19:29,275 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:19:29,851 INFO L225 Difference]: With dead ends: 112536 [2019-12-07 18:19:29,851 INFO L226 Difference]: Without dead ends: 110184 [2019-12-07 18:19:29,852 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:19:34,712 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110184 states. [2019-12-07 18:19:36,137 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110184 to 110184. [2019-12-07 18:19:36,138 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 110184 states. [2019-12-07 18:19:36,677 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110184 states to 110184 states and 470020 transitions. [2019-12-07 18:19:36,678 INFO L78 Accepts]: Start accepts. Automaton has 110184 states and 470020 transitions. Word has length 3 [2019-12-07 18:19:36,678 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:19:36,678 INFO L462 AbstractCegarLoop]: Abstraction has 110184 states and 470020 transitions. [2019-12-07 18:19:36,678 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:19:36,679 INFO L276 IsEmpty]: Start isEmpty. Operand 110184 states and 470020 transitions. [2019-12-07 18:19:36,682 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 18:19:36,682 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:19:36,682 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:19:36,683 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:19:36,683 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:19:36,683 INFO L82 PathProgramCache]: Analyzing trace with hash -418531443, now seen corresponding path program 1 times [2019-12-07 18:19:36,683 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:19:36,683 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1975491091] [2019-12-07 18:19:36,684 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:19:36,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:19:36,761 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:19:36,762 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1975491091] [2019-12-07 18:19:36,762 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:19:36,762 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:19:36,762 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2134409019] [2019-12-07 18:19:36,763 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:19:36,763 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:19:36,763 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:19:36,763 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:19:36,763 INFO L87 Difference]: Start difference. First operand 110184 states and 470020 transitions. Second operand 4 states. [2019-12-07 18:19:37,612 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:19:37,612 INFO L93 Difference]: Finished difference Result 172298 states and 706272 transitions. [2019-12-07 18:19:37,613 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:19:37,613 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 18:19:37,613 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:19:38,022 INFO L225 Difference]: With dead ends: 172298 [2019-12-07 18:19:38,023 INFO L226 Difference]: Without dead ends: 172249 [2019-12-07 18:19:38,023 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:19:42,459 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172249 states. [2019-12-07 18:19:46,170 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172249 to 156321. [2019-12-07 18:19:46,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156321 states. [2019-12-07 18:19:46,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156321 states to 156321 states and 647667 transitions. [2019-12-07 18:19:46,574 INFO L78 Accepts]: Start accepts. Automaton has 156321 states and 647667 transitions. Word has length 11 [2019-12-07 18:19:46,574 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:19:46,574 INFO L462 AbstractCegarLoop]: Abstraction has 156321 states and 647667 transitions. [2019-12-07 18:19:46,574 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:19:46,574 INFO L276 IsEmpty]: Start isEmpty. Operand 156321 states and 647667 transitions. [2019-12-07 18:19:46,578 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 18:19:46,578 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:19:46,578 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:19:46,579 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:19:46,579 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:19:46,579 INFO L82 PathProgramCache]: Analyzing trace with hash -986312255, now seen corresponding path program 1 times [2019-12-07 18:19:46,579 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:19:46,579 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [733221795] [2019-12-07 18:19:46,579 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:19:46,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:19:46,616 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:19:46,616 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [733221795] [2019-12-07 18:19:46,616 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:19:46,616 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:19:46,616 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [420100906] [2019-12-07 18:19:46,617 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:19:46,617 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:19:46,617 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:19:46,617 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:19:46,617 INFO L87 Difference]: Start difference. First operand 156321 states and 647667 transitions. Second operand 3 states. [2019-12-07 18:19:46,703 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:19:46,703 INFO L93 Difference]: Finished difference Result 32129 states and 104196 transitions. [2019-12-07 18:19:46,990 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:19:46,990 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 13 [2019-12-07 18:19:46,990 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:19:47,033 INFO L225 Difference]: With dead ends: 32129 [2019-12-07 18:19:47,034 INFO L226 Difference]: Without dead ends: 32129 [2019-12-07 18:19:47,034 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:19:47,189 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32129 states. [2019-12-07 18:19:47,463 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32129 to 32129. [2019-12-07 18:19:47,463 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32129 states. [2019-12-07 18:19:47,512 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32129 states to 32129 states and 104196 transitions. [2019-12-07 18:19:47,512 INFO L78 Accepts]: Start accepts. Automaton has 32129 states and 104196 transitions. Word has length 13 [2019-12-07 18:19:47,513 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:19:47,513 INFO L462 AbstractCegarLoop]: Abstraction has 32129 states and 104196 transitions. [2019-12-07 18:19:47,513 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:19:47,513 INFO L276 IsEmpty]: Start isEmpty. Operand 32129 states and 104196 transitions. [2019-12-07 18:19:47,514 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 18:19:47,514 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:19:47,514 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:19:47,514 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:19:47,514 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:19:47,514 INFO L82 PathProgramCache]: Analyzing trace with hash -1176456771, now seen corresponding path program 1 times [2019-12-07 18:19:47,514 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:19:47,515 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1836503649] [2019-12-07 18:19:47,515 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:19:47,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:19:47,576 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:19:47,577 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1836503649] [2019-12-07 18:19:47,577 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:19:47,577 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:19:47,577 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [939145018] [2019-12-07 18:19:47,577 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:19:47,578 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:19:47,578 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:19:47,578 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:19:47,578 INFO L87 Difference]: Start difference. First operand 32129 states and 104196 transitions. Second operand 4 states. [2019-12-07 18:19:47,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:19:47,845 INFO L93 Difference]: Finished difference Result 43159 states and 136814 transitions. [2019-12-07 18:19:47,845 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:19:47,845 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 18:19:47,845 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:19:47,899 INFO L225 Difference]: With dead ends: 43159 [2019-12-07 18:19:47,900 INFO L226 Difference]: Without dead ends: 43152 [2019-12-07 18:19:47,900 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:19:48,082 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43152 states. [2019-12-07 18:19:48,449 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43152 to 37631. [2019-12-07 18:19:48,449 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37631 states. [2019-12-07 18:19:48,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37631 states to 37631 states and 121166 transitions. [2019-12-07 18:19:48,508 INFO L78 Accepts]: Start accepts. Automaton has 37631 states and 121166 transitions. Word has length 13 [2019-12-07 18:19:48,508 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:19:48,508 INFO L462 AbstractCegarLoop]: Abstraction has 37631 states and 121166 transitions. [2019-12-07 18:19:48,508 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:19:48,508 INFO L276 IsEmpty]: Start isEmpty. Operand 37631 states and 121166 transitions. [2019-12-07 18:19:48,511 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 18:19:48,511 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:19:48,511 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:19:48,511 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:19:48,511 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:19:48,511 INFO L82 PathProgramCache]: Analyzing trace with hash -2012510844, now seen corresponding path program 1 times [2019-12-07 18:19:48,512 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:19:48,512 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [137563480] [2019-12-07 18:19:48,512 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:19:48,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:19:48,573 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:19:48,574 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [137563480] [2019-12-07 18:19:48,574 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:19:48,574 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:19:48,574 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [906265251] [2019-12-07 18:19:48,574 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:19:48,574 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:19:48,574 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:19:48,575 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:19:48,575 INFO L87 Difference]: Start difference. First operand 37631 states and 121166 transitions. Second operand 6 states. [2019-12-07 18:19:49,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:19:49,135 INFO L93 Difference]: Finished difference Result 51798 states and 162133 transitions. [2019-12-07 18:19:49,136 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 18:19:49,136 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 19 [2019-12-07 18:19:49,136 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:19:49,215 INFO L225 Difference]: With dead ends: 51798 [2019-12-07 18:19:49,215 INFO L226 Difference]: Without dead ends: 51791 [2019-12-07 18:19:49,215 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=71, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:19:49,421 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51791 states. [2019-12-07 18:19:49,833 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51791 to 37959. [2019-12-07 18:19:49,833 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37959 states. [2019-12-07 18:19:49,898 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37959 states to 37959 states and 122122 transitions. [2019-12-07 18:19:49,898 INFO L78 Accepts]: Start accepts. Automaton has 37959 states and 122122 transitions. Word has length 19 [2019-12-07 18:19:49,898 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:19:49,899 INFO L462 AbstractCegarLoop]: Abstraction has 37959 states and 122122 transitions. [2019-12-07 18:19:49,899 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:19:49,899 INFO L276 IsEmpty]: Start isEmpty. Operand 37959 states and 122122 transitions. [2019-12-07 18:19:49,902 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 18:19:49,903 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:19:49,903 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:19:49,903 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:19:49,903 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:19:49,903 INFO L82 PathProgramCache]: Analyzing trace with hash 1849670276, now seen corresponding path program 2 times [2019-12-07 18:19:49,903 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:19:49,903 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [485963500] [2019-12-07 18:19:49,903 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:19:49,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:19:50,021 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:19:50,021 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [485963500] [2019-12-07 18:19:50,022 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:19:50,022 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:19:50,022 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [772955461] [2019-12-07 18:19:50,022 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:19:50,022 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:19:50,023 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:19:50,023 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:19:50,023 INFO L87 Difference]: Start difference. First operand 37959 states and 122122 transitions. Second operand 7 states. [2019-12-07 18:19:51,045 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:19:51,045 INFO L93 Difference]: Finished difference Result 51819 states and 162488 transitions. [2019-12-07 18:19:51,046 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 18:19:51,046 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2019-12-07 18:19:51,046 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:19:51,119 INFO L225 Difference]: With dead ends: 51819 [2019-12-07 18:19:51,119 INFO L226 Difference]: Without dead ends: 51812 [2019-12-07 18:19:51,120 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:19:51,324 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51812 states. [2019-12-07 18:19:51,710 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51812 to 37668. [2019-12-07 18:19:51,710 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37668 states. [2019-12-07 18:19:51,767 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37668 states to 37668 states and 121155 transitions. [2019-12-07 18:19:51,767 INFO L78 Accepts]: Start accepts. Automaton has 37668 states and 121155 transitions. Word has length 19 [2019-12-07 18:19:51,767 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:19:51,767 INFO L462 AbstractCegarLoop]: Abstraction has 37668 states and 121155 transitions. [2019-12-07 18:19:51,768 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:19:51,768 INFO L276 IsEmpty]: Start isEmpty. Operand 37668 states and 121155 transitions. [2019-12-07 18:19:51,774 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 18:19:51,774 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:19:51,774 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:19:51,774 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:19:51,774 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:19:51,774 INFO L82 PathProgramCache]: Analyzing trace with hash -394195806, now seen corresponding path program 1 times [2019-12-07 18:19:51,774 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:19:51,774 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1704291258] [2019-12-07 18:19:51,774 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:19:51,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:19:51,905 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:19:51,905 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1704291258] [2019-12-07 18:19:51,905 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:19:51,905 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:19:51,905 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1011447173] [2019-12-07 18:19:51,905 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:19:51,906 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:19:51,906 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:19:51,906 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:19:51,906 INFO L87 Difference]: Start difference. First operand 37668 states and 121155 transitions. Second operand 7 states. [2019-12-07 18:19:52,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:19:52,346 INFO L93 Difference]: Finished difference Result 51019 states and 160458 transitions. [2019-12-07 18:19:52,346 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 18:19:52,347 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 25 [2019-12-07 18:19:52,347 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:19:52,422 INFO L225 Difference]: With dead ends: 51019 [2019-12-07 18:19:52,422 INFO L226 Difference]: Without dead ends: 51019 [2019-12-07 18:19:52,423 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:19:52,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51019 states. [2019-12-07 18:19:53,045 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51019 to 41398. [2019-12-07 18:19:53,045 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41398 states. [2019-12-07 18:19:53,114 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41398 states to 41398 states and 132249 transitions. [2019-12-07 18:19:53,114 INFO L78 Accepts]: Start accepts. Automaton has 41398 states and 132249 transitions. Word has length 25 [2019-12-07 18:19:53,115 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:19:53,115 INFO L462 AbstractCegarLoop]: Abstraction has 41398 states and 132249 transitions. [2019-12-07 18:19:53,115 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:19:53,115 INFO L276 IsEmpty]: Start isEmpty. Operand 41398 states and 132249 transitions. [2019-12-07 18:19:53,121 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 18:19:53,121 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:19:53,121 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:19:53,121 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:19:53,121 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:19:53,121 INFO L82 PathProgramCache]: Analyzing trace with hash -376699641, now seen corresponding path program 1 times [2019-12-07 18:19:53,122 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:19:53,122 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1447586776] [2019-12-07 18:19:53,122 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:19:53,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:19:53,148 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:19:53,148 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1447586776] [2019-12-07 18:19:53,148 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:19:53,148 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:19:53,148 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1137410088] [2019-12-07 18:19:53,149 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:19:53,149 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:19:53,149 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:19:53,149 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:19:53,149 INFO L87 Difference]: Start difference. First operand 41398 states and 132249 transitions. Second operand 4 states. [2019-12-07 18:19:53,176 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:19:53,176 INFO L93 Difference]: Finished difference Result 8518 states and 22937 transitions. [2019-12-07 18:19:53,176 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:19:53,176 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2019-12-07 18:19:53,176 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:19:53,184 INFO L225 Difference]: With dead ends: 8518 [2019-12-07 18:19:53,184 INFO L226 Difference]: Without dead ends: 8518 [2019-12-07 18:19:53,184 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:19:53,208 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8518 states. [2019-12-07 18:19:53,264 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8518 to 8378. [2019-12-07 18:19:53,265 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8378 states. [2019-12-07 18:19:53,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8378 states to 8378 states and 22537 transitions. [2019-12-07 18:19:53,274 INFO L78 Accepts]: Start accepts. Automaton has 8378 states and 22537 transitions. Word has length 25 [2019-12-07 18:19:53,274 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:19:53,274 INFO L462 AbstractCegarLoop]: Abstraction has 8378 states and 22537 transitions. [2019-12-07 18:19:53,274 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:19:53,274 INFO L276 IsEmpty]: Start isEmpty. Operand 8378 states and 22537 transitions. [2019-12-07 18:19:53,281 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-12-07 18:19:53,281 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:19:53,282 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:19:53,282 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:19:53,282 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:19:53,282 INFO L82 PathProgramCache]: Analyzing trace with hash 56145512, now seen corresponding path program 1 times [2019-12-07 18:19:53,282 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:19:53,282 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [625295253] [2019-12-07 18:19:53,282 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:19:53,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:19:53,450 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:19:53,450 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [625295253] [2019-12-07 18:19:53,451 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:19:53,451 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 18:19:53,451 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [13328063] [2019-12-07 18:19:53,451 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 18:19:53,451 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:19:53,452 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 18:19:53,452 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:19:53,452 INFO L87 Difference]: Start difference. First operand 8378 states and 22537 transitions. Second operand 9 states. [2019-12-07 18:19:54,048 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:19:54,049 INFO L93 Difference]: Finished difference Result 10220 states and 26558 transitions. [2019-12-07 18:19:54,049 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 18:19:54,049 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 37 [2019-12-07 18:19:54,049 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:19:54,057 INFO L225 Difference]: With dead ends: 10220 [2019-12-07 18:19:54,057 INFO L226 Difference]: Without dead ends: 10220 [2019-12-07 18:19:54,057 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 40 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=83, Invalid=223, Unknown=0, NotChecked=0, Total=306 [2019-12-07 18:19:54,083 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10220 states. [2019-12-07 18:19:54,142 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10220 to 8009. [2019-12-07 18:19:54,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8009 states. [2019-12-07 18:19:54,151 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8009 states to 8009 states and 21427 transitions. [2019-12-07 18:19:54,151 INFO L78 Accepts]: Start accepts. Automaton has 8009 states and 21427 transitions. Word has length 37 [2019-12-07 18:19:54,151 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:19:54,151 INFO L462 AbstractCegarLoop]: Abstraction has 8009 states and 21427 transitions. [2019-12-07 18:19:54,151 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 18:19:54,151 INFO L276 IsEmpty]: Start isEmpty. Operand 8009 states and 21427 transitions. [2019-12-07 18:19:54,157 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-12-07 18:19:54,158 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:19:54,158 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:19:54,158 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:19:54,158 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:19:54,158 INFO L82 PathProgramCache]: Analyzing trace with hash 415068334, now seen corresponding path program 2 times [2019-12-07 18:19:54,158 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:19:54,158 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [627614879] [2019-12-07 18:19:54,158 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:19:54,170 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:19:54,336 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:19:54,336 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [627614879] [2019-12-07 18:19:54,336 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:19:54,336 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 18:19:54,336 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [990143726] [2019-12-07 18:19:54,337 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 18:19:54,337 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:19:54,337 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 18:19:54,337 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:19:54,337 INFO L87 Difference]: Start difference. First operand 8009 states and 21427 transitions. Second operand 9 states. [2019-12-07 18:19:55,087 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:19:55,087 INFO L93 Difference]: Finished difference Result 10494 states and 27350 transitions. [2019-12-07 18:19:55,087 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 18:19:55,087 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 37 [2019-12-07 18:19:55,087 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:19:55,094 INFO L225 Difference]: With dead ends: 10494 [2019-12-07 18:19:55,094 INFO L226 Difference]: Without dead ends: 10494 [2019-12-07 18:19:55,094 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=83, Invalid=223, Unknown=0, NotChecked=0, Total=306 [2019-12-07 18:19:55,120 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10494 states. [2019-12-07 18:19:55,175 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10494 to 7511. [2019-12-07 18:19:55,175 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7511 states. [2019-12-07 18:19:55,183 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7511 states to 7511 states and 20157 transitions. [2019-12-07 18:19:55,184 INFO L78 Accepts]: Start accepts. Automaton has 7511 states and 20157 transitions. Word has length 37 [2019-12-07 18:19:55,184 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:19:55,184 INFO L462 AbstractCegarLoop]: Abstraction has 7511 states and 20157 transitions. [2019-12-07 18:19:55,184 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 18:19:55,184 INFO L276 IsEmpty]: Start isEmpty. Operand 7511 states and 20157 transitions. [2019-12-07 18:19:55,191 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-12-07 18:19:55,191 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:19:55,192 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:19:55,192 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:19:55,192 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:19:55,192 INFO L82 PathProgramCache]: Analyzing trace with hash -2110715921, now seen corresponding path program 1 times [2019-12-07 18:19:55,192 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:19:55,192 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2123519679] [2019-12-07 18:19:55,192 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:19:55,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:19:55,357 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:19:55,357 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2123519679] [2019-12-07 18:19:55,357 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:19:55,357 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 18:19:55,357 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2064001716] [2019-12-07 18:19:55,358 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 18:19:55,358 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:19:55,358 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 18:19:55,358 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:19:55,358 INFO L87 Difference]: Start difference. First operand 7511 states and 20157 transitions. Second operand 10 states. [2019-12-07 18:19:56,900 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:19:56,900 INFO L93 Difference]: Finished difference Result 8737 states and 22781 transitions. [2019-12-07 18:19:56,900 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2019-12-07 18:19:56,900 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 51 [2019-12-07 18:19:56,900 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:19:56,907 INFO L225 Difference]: With dead ends: 8737 [2019-12-07 18:19:56,907 INFO L226 Difference]: Without dead ends: 8735 [2019-12-07 18:19:56,907 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 165 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=157, Invalid=655, Unknown=0, NotChecked=0, Total=812 [2019-12-07 18:19:56,930 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8735 states. [2019-12-07 18:19:56,986 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8735 to 8000. [2019-12-07 18:19:56,986 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8000 states. [2019-12-07 18:19:56,995 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8000 states to 8000 states and 21175 transitions. [2019-12-07 18:19:56,995 INFO L78 Accepts]: Start accepts. Automaton has 8000 states and 21175 transitions. Word has length 51 [2019-12-07 18:19:56,995 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:19:56,995 INFO L462 AbstractCegarLoop]: Abstraction has 8000 states and 21175 transitions. [2019-12-07 18:19:56,995 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 18:19:56,995 INFO L276 IsEmpty]: Start isEmpty. Operand 8000 states and 21175 transitions. [2019-12-07 18:19:57,003 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 18:19:57,003 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:19:57,003 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:19:57,004 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:19:57,004 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:19:57,004 INFO L82 PathProgramCache]: Analyzing trace with hash -1899406467, now seen corresponding path program 1 times [2019-12-07 18:19:57,004 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:19:57,004 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1661848536] [2019-12-07 18:19:57,004 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:19:57,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:19:57,032 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:19:57,032 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1661848536] [2019-12-07 18:19:57,032 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:19:57,032 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:19:57,033 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [326791538] [2019-12-07 18:19:57,033 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:19:57,033 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:19:57,033 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:19:57,033 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:19:57,033 INFO L87 Difference]: Start difference. First operand 8000 states and 21175 transitions. Second operand 3 states. [2019-12-07 18:19:57,072 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:19:57,072 INFO L93 Difference]: Finished difference Result 8558 states and 22468 transitions. [2019-12-07 18:19:57,072 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:19:57,073 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 54 [2019-12-07 18:19:57,073 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:19:57,079 INFO L225 Difference]: With dead ends: 8558 [2019-12-07 18:19:57,079 INFO L226 Difference]: Without dead ends: 8558 [2019-12-07 18:19:57,079 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:19:57,102 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8558 states. [2019-12-07 18:19:57,156 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8558 to 8190. [2019-12-07 18:19:57,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8190 states. [2019-12-07 18:19:57,165 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8190 states to 8190 states and 21734 transitions. [2019-12-07 18:19:57,165 INFO L78 Accepts]: Start accepts. Automaton has 8190 states and 21734 transitions. Word has length 54 [2019-12-07 18:19:57,166 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:19:57,166 INFO L462 AbstractCegarLoop]: Abstraction has 8190 states and 21734 transitions. [2019-12-07 18:19:57,166 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:19:57,166 INFO L276 IsEmpty]: Start isEmpty. Operand 8190 states and 21734 transitions. [2019-12-07 18:19:57,174 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 18:19:57,174 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:19:57,174 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:19:57,174 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:19:57,174 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:19:57,174 INFO L82 PathProgramCache]: Analyzing trace with hash -1441289202, now seen corresponding path program 1 times [2019-12-07 18:19:57,174 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:19:57,175 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1991331913] [2019-12-07 18:19:57,175 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:19:57,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:19:57,215 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:19:57,216 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1991331913] [2019-12-07 18:19:57,216 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:19:57,216 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:19:57,216 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1451184750] [2019-12-07 18:19:57,216 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:19:57,216 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:19:57,216 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:19:57,217 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:19:57,217 INFO L87 Difference]: Start difference. First operand 8190 states and 21734 transitions. Second operand 3 states. [2019-12-07 18:19:57,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:19:57,245 INFO L93 Difference]: Finished difference Result 7952 states and 20812 transitions. [2019-12-07 18:19:57,245 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:19:57,245 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 54 [2019-12-07 18:19:57,245 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:19:57,254 INFO L225 Difference]: With dead ends: 7952 [2019-12-07 18:19:57,254 INFO L226 Difference]: Without dead ends: 7952 [2019-12-07 18:19:57,254 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:19:57,277 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7952 states. [2019-12-07 18:19:57,331 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7952 to 7934. [2019-12-07 18:19:57,331 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7934 states. [2019-12-07 18:19:57,339 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7934 states to 7934 states and 20774 transitions. [2019-12-07 18:19:57,339 INFO L78 Accepts]: Start accepts. Automaton has 7934 states and 20774 transitions. Word has length 54 [2019-12-07 18:19:57,339 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:19:57,340 INFO L462 AbstractCegarLoop]: Abstraction has 7934 states and 20774 transitions. [2019-12-07 18:19:57,340 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:19:57,340 INFO L276 IsEmpty]: Start isEmpty. Operand 7934 states and 20774 transitions. [2019-12-07 18:19:57,347 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 18:19:57,347 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:19:57,347 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:19:57,347 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:19:57,348 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:19:57,348 INFO L82 PathProgramCache]: Analyzing trace with hash -487091256, now seen corresponding path program 1 times [2019-12-07 18:19:57,348 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:19:57,348 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1068345485] [2019-12-07 18:19:57,348 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:19:57,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:19:57,384 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:19:57,384 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1068345485] [2019-12-07 18:19:57,384 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:19:57,384 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:19:57,385 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2094621608] [2019-12-07 18:19:57,385 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:19:57,385 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:19:57,385 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:19:57,385 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:19:57,385 INFO L87 Difference]: Start difference. First operand 7934 states and 20774 transitions. Second operand 5 states. [2019-12-07 18:19:57,416 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:19:57,416 INFO L93 Difference]: Finished difference Result 4963 states and 13978 transitions. [2019-12-07 18:19:57,416 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:19:57,416 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 54 [2019-12-07 18:19:57,417 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:19:57,421 INFO L225 Difference]: With dead ends: 4963 [2019-12-07 18:19:57,421 INFO L226 Difference]: Without dead ends: 4963 [2019-12-07 18:19:57,421 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:19:57,439 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4963 states. [2019-12-07 18:19:57,474 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4963 to 4599. [2019-12-07 18:19:57,474 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4599 states. [2019-12-07 18:19:57,479 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4599 states to 4599 states and 12994 transitions. [2019-12-07 18:19:57,479 INFO L78 Accepts]: Start accepts. Automaton has 4599 states and 12994 transitions. Word has length 54 [2019-12-07 18:19:57,479 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:19:57,479 INFO L462 AbstractCegarLoop]: Abstraction has 4599 states and 12994 transitions. [2019-12-07 18:19:57,479 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:19:57,480 INFO L276 IsEmpty]: Start isEmpty. Operand 4599 states and 12994 transitions. [2019-12-07 18:19:57,484 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:19:57,484 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:19:57,485 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:19:57,485 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:19:57,485 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:19:57,485 INFO L82 PathProgramCache]: Analyzing trace with hash -707320023, now seen corresponding path program 1 times [2019-12-07 18:19:57,485 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:19:57,485 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [286614924] [2019-12-07 18:19:57,485 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:19:57,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:19:57,523 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:19:57,523 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [286614924] [2019-12-07 18:19:57,524 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:19:57,524 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:19:57,524 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1377039322] [2019-12-07 18:19:57,524 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:19:57,524 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:19:57,524 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:19:57,525 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:19:57,525 INFO L87 Difference]: Start difference. First operand 4599 states and 12994 transitions. Second operand 3 states. [2019-12-07 18:19:57,540 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:19:57,540 INFO L93 Difference]: Finished difference Result 4443 states and 12382 transitions. [2019-12-07 18:19:57,541 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:19:57,541 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 18:19:57,541 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:19:57,544 INFO L225 Difference]: With dead ends: 4443 [2019-12-07 18:19:57,544 INFO L226 Difference]: Without dead ends: 4443 [2019-12-07 18:19:57,545 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:19:57,561 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4443 states. [2019-12-07 18:19:57,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4443 to 4443. [2019-12-07 18:19:57,593 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4443 states. [2019-12-07 18:19:57,598 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4443 states to 4443 states and 12382 transitions. [2019-12-07 18:19:57,599 INFO L78 Accepts]: Start accepts. Automaton has 4443 states and 12382 transitions. Word has length 66 [2019-12-07 18:19:57,599 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:19:57,599 INFO L462 AbstractCegarLoop]: Abstraction has 4443 states and 12382 transitions. [2019-12-07 18:19:57,599 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:19:57,599 INFO L276 IsEmpty]: Start isEmpty. Operand 4443 states and 12382 transitions. [2019-12-07 18:19:57,604 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:19:57,604 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:19:57,604 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:19:57,604 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:19:57,604 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:19:57,605 INFO L82 PathProgramCache]: Analyzing trace with hash 1165915357, now seen corresponding path program 1 times [2019-12-07 18:19:57,605 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:19:57,605 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [709946723] [2019-12-07 18:19:57,605 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:19:57,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:19:57,644 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:19:57,645 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [709946723] [2019-12-07 18:19:57,645 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:19:57,645 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:19:57,645 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2019282135] [2019-12-07 18:19:57,645 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:19:57,645 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:19:57,645 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:19:57,646 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:19:57,646 INFO L87 Difference]: Start difference. First operand 4443 states and 12382 transitions. Second operand 3 states. [2019-12-07 18:19:57,682 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:19:57,682 INFO L93 Difference]: Finished difference Result 4443 states and 12381 transitions. [2019-12-07 18:19:57,682 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:19:57,682 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-12-07 18:19:57,682 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:19:57,686 INFO L225 Difference]: With dead ends: 4443 [2019-12-07 18:19:57,686 INFO L226 Difference]: Without dead ends: 4443 [2019-12-07 18:19:57,686 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:19:57,702 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4443 states. [2019-12-07 18:19:57,729 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4443 to 4443. [2019-12-07 18:19:57,730 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4443 states. [2019-12-07 18:19:57,734 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4443 states to 4443 states and 12381 transitions. [2019-12-07 18:19:57,735 INFO L78 Accepts]: Start accepts. Automaton has 4443 states and 12381 transitions. Word has length 67 [2019-12-07 18:19:57,735 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:19:57,735 INFO L462 AbstractCegarLoop]: Abstraction has 4443 states and 12381 transitions. [2019-12-07 18:19:57,735 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:19:57,735 INFO L276 IsEmpty]: Start isEmpty. Operand 4443 states and 12381 transitions. [2019-12-07 18:19:57,738 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 18:19:57,738 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:19:57,738 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:19:57,738 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:19:57,738 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:19:57,738 INFO L82 PathProgramCache]: Analyzing trace with hash -1149441136, now seen corresponding path program 1 times [2019-12-07 18:19:57,738 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:19:57,738 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2040346161] [2019-12-07 18:19:57,738 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:19:57,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:19:57,854 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:19:57,854 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2040346161] [2019-12-07 18:19:57,854 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:19:57,854 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 18:19:57,855 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [270897293] [2019-12-07 18:19:57,855 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 18:19:57,855 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:19:57,855 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 18:19:57,855 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=105, Unknown=0, NotChecked=0, Total=132 [2019-12-07 18:19:57,855 INFO L87 Difference]: Start difference. First operand 4443 states and 12381 transitions. Second operand 12 states. [2019-12-07 18:19:58,094 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:19:58,094 INFO L93 Difference]: Finished difference Result 7604 states and 21072 transitions. [2019-12-07 18:19:58,095 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 18:19:58,095 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 68 [2019-12-07 18:19:58,095 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:19:58,101 INFO L225 Difference]: With dead ends: 7604 [2019-12-07 18:19:58,101 INFO L226 Difference]: Without dead ends: 6828 [2019-12-07 18:19:58,102 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 70 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=93, Invalid=369, Unknown=0, NotChecked=0, Total=462 [2019-12-07 18:19:58,121 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6828 states. [2019-12-07 18:19:58,169 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6828 to 5644. [2019-12-07 18:19:58,169 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5644 states. [2019-12-07 18:19:58,176 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5644 states to 5644 states and 15636 transitions. [2019-12-07 18:19:58,176 INFO L78 Accepts]: Start accepts. Automaton has 5644 states and 15636 transitions. Word has length 68 [2019-12-07 18:19:58,176 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:19:58,176 INFO L462 AbstractCegarLoop]: Abstraction has 5644 states and 15636 transitions. [2019-12-07 18:19:58,176 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 18:19:58,176 INFO L276 IsEmpty]: Start isEmpty. Operand 5644 states and 15636 transitions. [2019-12-07 18:19:58,182 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 18:19:58,182 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:19:58,182 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:19:58,182 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:19:58,182 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:19:58,182 INFO L82 PathProgramCache]: Analyzing trace with hash 15770806, now seen corresponding path program 2 times [2019-12-07 18:19:58,182 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:19:58,183 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1163496842] [2019-12-07 18:19:58,183 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:19:58,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:19:58,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:19:58,276 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 18:19:58,276 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 18:19:58,278 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] ULTIMATE.startENTRY-->L800: Formula: (let ((.cse0 (store |v_#valid_65| 0 0))) (and (= v_~y$mem_tmp~0_39 0) (= 0 v_~y$read_delayed_var~0.offset_7) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t2177~0.base_27|)) (= 0 v_~y$r_buff0_thd3~0_110) (= v_~main$tmp_guard0~0_18 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t2177~0.base_27|) (= v_~weak$$choice2~0_126 0) (= 0 v_~x~0_147) (= v_~y$r_buff0_thd0~0_348 0) (= v_~y$read_delayed~0_7 0) (= v_~y$w_buff1~0_200 0) (= 0 v_~y$w_buff0~0_179) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t2177~0.base_27| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t2177~0.base_27|) |v_ULTIMATE.start_main_~#t2177~0.offset_20| 0)) |v_#memory_int_21|) (= v_~y~0_170 0) (< 0 |v_#StackHeapBarrier_17|) (= v_~y$r_buff1_thd0~0_299 0) (= 0 v_~y$r_buff1_thd2~0_193) (= v_~y$r_buff0_thd1~0_223 0) (= 0 |v_ULTIMATE.start_main_~#t2177~0.offset_20|) (= 0 v_~__unbuffered_p2_EAX~0_33) (= 0 v_~y$read_delayed_var~0.base_7) (= 0 v_~y$flush_delayed~0_56) (= |v_#NULL.offset_5| 0) (= v_~y$w_buff1_used~0_482 0) (= 0 v_~y$r_buff1_thd3~0_211) (= (store .cse0 |v_ULTIMATE.start_main_~#t2177~0.base_27| 1) |v_#valid_63|) (= (store |v_#length_26| |v_ULTIMATE.start_main_~#t2177~0.base_27| 4) |v_#length_25|) (= 0 v_~y$r_buff0_thd2~0_114) (= v_~__unbuffered_cnt~0_132 0) (= v_~y$w_buff0_used~0_741 0) (= 0 v_~weak$$choice0~0_34) (= 0 |v_#NULL.base_5|) (= v_~y$r_buff1_thd1~0_185 0) (= v_~main$tmp_guard1~0_22 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_61|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_27|, ULTIMATE.start_main_~#t2179~0.base=|v_ULTIMATE.start_main_~#t2179~0.base_19|, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_27|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_45|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_141|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_41|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_76|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_62|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_45|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_36|, ~y$mem_tmp~0=v_~y$mem_tmp~0_39, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_211, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_223, ~y$flush_delayed~0=v_~y$flush_delayed~0_56, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_33, ULTIMATE.start_main_~#t2178~0.offset=|v_ULTIMATE.start_main_~#t2178~0.offset_18|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_9|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_82|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_54|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_64|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_31|, ~weak$$choice0~0=v_~weak$$choice0~0_34, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_46|, ~y$w_buff1~0=v_~y$w_buff1~0_200, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_114, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_132, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_299, ~x~0=v_~x~0_147, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_61|, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_741, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_73|, ULTIMATE.start_main_~#t2179~0.offset=|v_ULTIMATE.start_main_~#t2179~0.offset_16|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_31|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_27|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_22, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_161|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_30|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_51|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_76|, ULTIMATE.start_main_~#t2177~0.base=|v_ULTIMATE.start_main_~#t2177~0.base_27|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_185, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_31|, ~y$w_buff0~0=v_~y$w_buff0~0_179, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_110, ~y~0=v_~y~0_170, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_10|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_21|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_43|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_70|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_18, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_25|, ULTIMATE.start_main_~#t2177~0.offset=|v_ULTIMATE.start_main_~#t2177~0.offset_20|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_50|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_193, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_75|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_348, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_21|, ~weak$$choice2~0=v_~weak$$choice2~0_126, ULTIMATE.start_main_~#t2178~0.base=|v_ULTIMATE.start_main_~#t2178~0.base_23|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_482} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t2179~0.base, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ~y$read_delayed~0, ULTIMATE.start_main_#t~ite52, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t2178~0.offset, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ULTIMATE.start_main_#t~nondet31, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_~#t2179~0.offset, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_~#t2177~0.base, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite51, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_~#t2177~0.offset, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ~weak$$choice2~0, ULTIMATE.start_main_~#t2178~0.base, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 18:19:58,279 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] P0ENTRY-->L4-3: Formula: (and (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_8 0)) (= v_~y$w_buff0_used~0_135 1) (= 2 v_~y$w_buff0~0_28) (= v_~y$w_buff0~0_29 v_~y$w_buff1~0_20) (= v_P0Thread1of1ForFork0_~arg.offset_6 |v_P0Thread1of1ForFork0_#in~arg.offset_8|) (= v_~y$w_buff1_used~0_63 v_~y$w_buff0_used~0_136) (= (ite (not (and (not (= (mod v_~y$w_buff1_used~0_63 256) 0)) (not (= (mod v_~y$w_buff0_used~0_135 256) 0)))) 1 0) |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_8 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|) (= v_P0Thread1of1ForFork0_~arg.base_6 |v_P0Thread1of1ForFork0_#in~arg.base_8|)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_8|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_136, ~y$w_buff0~0=v_~y$w_buff0~0_29, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_8|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_8|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_135, ~y$w_buff1~0=v_~y$w_buff1~0_20, ~y$w_buff0~0=v_~y$w_buff0~0_28, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_8, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_8|, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_6, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_6, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_63} AuxVars[] AssignedVars[~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 18:19:58,279 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L800-1-->L802: Formula: (and (= |v_ULTIMATE.start_main_~#t2178~0.offset_10| 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t2178~0.base_11| 4)) (not (= |v_ULTIMATE.start_main_~#t2178~0.base_11| 0)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2178~0.base_11| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2178~0.base_11|) |v_ULTIMATE.start_main_~#t2178~0.offset_10| 1)) |v_#memory_int_11|) (= 0 (select |v_#valid_38| |v_ULTIMATE.start_main_~#t2178~0.base_11|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t2178~0.base_11|) (= (store |v_#valid_38| |v_ULTIMATE.start_main_~#t2178~0.base_11| 1) |v_#valid_37|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_6|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t2178~0.base=|v_ULTIMATE.start_main_~#t2178~0.base_11|, ULTIMATE.start_main_~#t2178~0.offset=|v_ULTIMATE.start_main_~#t2178~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet21, #valid, #memory_int, #length, ULTIMATE.start_main_~#t2178~0.base, ULTIMATE.start_main_~#t2178~0.offset] because there is no mapped edge [2019-12-07 18:19:58,280 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [804] [804] L802-1-->L804: Formula: (and (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2179~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2179~0.base_13|) |v_ULTIMATE.start_main_~#t2179~0.offset_11| 2)) |v_#memory_int_13|) (not (= 0 |v_ULTIMATE.start_main_~#t2179~0.base_13|)) (= (store |v_#valid_40| |v_ULTIMATE.start_main_~#t2179~0.base_13| 1) |v_#valid_39|) (= (select |v_#valid_40| |v_ULTIMATE.start_main_~#t2179~0.base_13|) 0) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2179~0.base_13|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t2179~0.base_13| 4)) (= |v_ULTIMATE.start_main_~#t2179~0.offset_11| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t2179~0.base=|v_ULTIMATE.start_main_~#t2179~0.base_13|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t2179~0.offset=|v_ULTIMATE.start_main_~#t2179~0.offset_11|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2179~0.base, ULTIMATE.start_main_#t~nondet22, #valid, #memory_int, ULTIMATE.start_main_~#t2179~0.offset, #length] because there is no mapped edge [2019-12-07 18:19:58,280 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [754] [754] L741-->L741-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In-553868662 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd1~0_In-553868662 256) 0))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork0_#t~ite5_Out-553868662| ~y$w_buff0_used~0_In-553868662)) (and (= |P0Thread1of1ForFork0_#t~ite5_Out-553868662| 0) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-553868662, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-553868662} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-553868662|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-553868662, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-553868662} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 18:19:58,281 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L757-2-->L757-4: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In1310052735 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd2~0_In1310052735 256)))) (or (and (= ~y$w_buff1~0_In1310052735 |P1Thread1of1ForFork1_#t~ite9_Out1310052735|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~y~0_In1310052735 |P1Thread1of1ForFork1_#t~ite9_Out1310052735|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1310052735, ~y$w_buff1~0=~y$w_buff1~0_In1310052735, ~y~0=~y~0_In1310052735, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1310052735} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1310052735, ~y$w_buff1~0=~y$w_buff1~0_In1310052735, P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out1310052735|, ~y~0=~y~0_In1310052735, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1310052735} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9] because there is no mapped edge [2019-12-07 18:19:58,281 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L742-->L742-2: Formula: (let ((.cse3 (= 0 (mod ~y$w_buff1_used~0_In1334352248 256))) (.cse2 (= (mod ~y$r_buff1_thd1~0_In1334352248 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1334352248 256))) (.cse0 (= (mod ~y$r_buff0_thd1~0_In1334352248 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out1334352248|)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= ~y$w_buff1_used~0_In1334352248 |P0Thread1of1ForFork0_#t~ite6_Out1334352248|)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1334352248, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1334352248, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1334352248, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1334352248} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out1334352248|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1334352248, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1334352248, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1334352248, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1334352248} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 18:19:58,281 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L743-->L744: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-137281314 256))) (.cse2 (= ~y$r_buff0_thd1~0_Out-137281314 ~y$r_buff0_thd1~0_In-137281314)) (.cse1 (= (mod ~y$r_buff0_thd1~0_In-137281314 256) 0))) (or (and (not .cse0) (not .cse1) (= ~y$r_buff0_thd1~0_Out-137281314 0)) (and .cse2 .cse0) (and .cse2 .cse1))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-137281314, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-137281314} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-137281314, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-137281314|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_Out-137281314} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~y$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:19:58,282 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L744-->L744-2: Formula: (let ((.cse3 (= (mod ~y$w_buff0_used~0_In1705258669 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd1~0_In1705258669 256))) (.cse0 (= (mod ~y$w_buff1_used~0_In1705258669 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd1~0_In1705258669 256) 0))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite8_Out1705258669|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~y$r_buff1_thd1~0_In1705258669 |P0Thread1of1ForFork0_#t~ite8_Out1705258669|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1705258669, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1705258669, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1705258669, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1705258669} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1705258669, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1705258669, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out1705258669|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1705258669, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1705258669} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 18:19:58,282 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L744-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~y$r_buff1_thd1~0_50 |v_P0Thread1of1ForFork0_#t~ite8_26|) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_50, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_25|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 18:19:58,282 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L777-2-->L777-4: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff1_thd3~0_In-239374245 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-239374245 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite15_Out-239374245| ~y~0_In-239374245)) (and (= |P2Thread1of1ForFork2_#t~ite15_Out-239374245| ~y$w_buff1~0_In-239374245) (not .cse0) (not .cse1)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-239374245, ~y$w_buff1~0=~y$w_buff1~0_In-239374245, ~y~0=~y~0_In-239374245, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-239374245} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-239374245, P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out-239374245|, ~y$w_buff1~0=~y$w_buff1~0_In-239374245, ~y~0=~y~0_In-239374245, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-239374245} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 18:19:58,282 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L777-4-->L778: Formula: (= |v_P2Thread1of1ForFork2_#t~ite15_6| v_~y~0_34) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_6|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_5|, ~y~0=v_~y~0_34, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_5|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, ~y~0, P2Thread1of1ForFork2_#t~ite16] because there is no mapped edge [2019-12-07 18:19:58,282 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [714] [714] L757-4-->L758: Formula: (= |v_P1Thread1of1ForFork1_#t~ite9_6| v_~y~0_38) InVars {P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_6|} OutVars{P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_5|, P1Thread1of1ForFork1_#t~ite10=|v_P1Thread1of1ForFork1_#t~ite10_5|, ~y~0=v_~y~0_38} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10, ~y~0] because there is no mapped edge [2019-12-07 18:19:58,282 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L758-->L758-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-239946226 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-239946226 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite11_Out-239946226| 0) (not .cse0) (not .cse1)) (and (= ~y$w_buff0_used~0_In-239946226 |P1Thread1of1ForFork1_#t~ite11_Out-239946226|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-239946226, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-239946226} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-239946226, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-239946226, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-239946226|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 18:19:58,283 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L759-->L759-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In1220960402 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd2~0_In1220960402 256))) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In1220960402 256))) (.cse3 (= 0 (mod ~y$r_buff0_thd2~0_In1220960402 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite12_Out1220960402| 0)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite12_Out1220960402| ~y$w_buff1_used~0_In1220960402) (or .cse2 .cse3)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1220960402, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1220960402, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1220960402, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1220960402} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1220960402, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1220960402, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1220960402, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out1220960402|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1220960402} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 18:19:58,283 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L760-->L760-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In2088414629 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In2088414629 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite13_Out2088414629| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite13_Out2088414629| ~y$r_buff0_thd2~0_In2088414629)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In2088414629, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2088414629} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In2088414629, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2088414629, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out2088414629|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 18:19:58,283 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L761-->L761-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In-1770696724 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd2~0_In-1770696724 256))) (.cse3 (= 0 (mod ~y$r_buff0_thd2~0_In-1770696724 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In-1770696724 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite14_Out-1770696724| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~y$r_buff1_thd2~0_In-1770696724 |P1Thread1of1ForFork1_#t~ite14_Out-1770696724|) (or .cse3 .cse2)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1770696724, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1770696724, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1770696724, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1770696724} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1770696724, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1770696724, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1770696724, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-1770696724|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1770696724} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 18:19:58,284 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L778-->L778-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd3~0_In1965485591 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1965485591 256)))) (or (and (= ~y$w_buff0_used~0_In1965485591 |P2Thread1of1ForFork2_#t~ite17_Out1965485591|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite17_Out1965485591| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1965485591, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1965485591} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1965485591, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1965485591, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out1965485591|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 18:19:58,284 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L779-->L779-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd3~0_In-2030967916 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In-2030967916 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In-2030967916 256) 0)) (.cse2 (= 0 (mod ~y$r_buff1_thd3~0_In-2030967916 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork2_#t~ite18_Out-2030967916|)) (and (= ~y$w_buff1_used~0_In-2030967916 |P2Thread1of1ForFork2_#t~ite18_Out-2030967916|) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-2030967916, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2030967916, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-2030967916, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2030967916} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-2030967916, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2030967916, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-2030967916, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out-2030967916|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2030967916} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 18:19:58,284 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] L761-2-->P1EXIT: Formula: (and (= v_~__unbuffered_cnt~0_71 (+ v_~__unbuffered_cnt~0_72 1)) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~y$r_buff1_thd2~0_135 |v_P1Thread1of1ForFork1_#t~ite14_40|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_72, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_40|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_135, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_39|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 18:19:58,284 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L780-->L780-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In913916894 256))) (.cse1 (= (mod ~y$r_buff0_thd3~0_In913916894 256) 0))) (or (and (or .cse0 .cse1) (= ~y$r_buff0_thd3~0_In913916894 |P2Thread1of1ForFork2_#t~ite19_Out913916894|)) (and (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite19_Out913916894|) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In913916894, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In913916894} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In913916894, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In913916894, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out913916894|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 18:19:58,285 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L781-->L781-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff1_thd3~0_In-1543698328 256))) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In-1543698328 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd3~0_In-1543698328 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1543698328 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite20_Out-1543698328| ~y$r_buff1_thd3~0_In-1543698328) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |P2Thread1of1ForFork2_#t~ite20_Out-1543698328|)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1543698328, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1543698328, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1543698328, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1543698328} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1543698328, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1543698328, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out-1543698328|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1543698328, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1543698328} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 18:19:58,285 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [793] [793] L781-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_66 1) v_~__unbuffered_cnt~0_65) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= |v_P2Thread1of1ForFork2_#t~ite20_34| v_~y$r_buff1_thd3~0_132)) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_132, P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_33|, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_65, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~y$r_buff1_thd3~0, P2Thread1of1ForFork2_#t~ite20, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 18:19:58,285 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L804-1-->L810: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_18) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_18} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_18, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:19:58,285 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L810-2-->L810-5: Formula: (let ((.cse2 (= |ULTIMATE.start_main_#t~ite25_Out-1495082679| |ULTIMATE.start_main_#t~ite24_Out-1495082679|)) (.cse0 (= (mod ~y$w_buff1_used~0_In-1495082679 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd0~0_In-1495082679 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite24_Out-1495082679| ~y~0_In-1495082679) .cse2) (and .cse2 (not .cse0) (= |ULTIMATE.start_main_#t~ite24_Out-1495082679| ~y$w_buff1~0_In-1495082679) (not .cse1)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1495082679, ~y~0=~y~0_In-1495082679, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1495082679, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1495082679} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-1495082679, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out-1495082679|, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out-1495082679|, ~y~0=~y~0_In-1495082679, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1495082679, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1495082679} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 18:19:58,285 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L811-->L811-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-1893325563 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1893325563 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-1893325563 |ULTIMATE.start_main_#t~ite26_Out-1893325563|)) (and (= 0 |ULTIMATE.start_main_#t~ite26_Out-1893325563|) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1893325563, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1893325563} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1893325563, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1893325563, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out-1893325563|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 18:19:58,286 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L812-->L812-2: Formula: (let ((.cse3 (= (mod ~y$r_buff0_thd0~0_In-1649310069 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-1649310069 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-1649310069 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-1649310069 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In-1649310069 |ULTIMATE.start_main_#t~ite27_Out-1649310069|) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |ULTIMATE.start_main_#t~ite27_Out-1649310069|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1649310069, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1649310069, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1649310069, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1649310069} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1649310069, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1649310069, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out-1649310069|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1649310069, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1649310069} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 18:19:58,286 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] L813-->L813-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In1955240067 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In1955240067 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite28_Out1955240067| 0)) (and (= ~y$r_buff0_thd0~0_In1955240067 |ULTIMATE.start_main_#t~ite28_Out1955240067|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1955240067, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1955240067} OutVars{ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out1955240067|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1955240067, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1955240067} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 18:19:58,286 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [751] [751] L814-->L814-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In-12807802 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-12807802 256))) (.cse3 (= (mod ~y$r_buff0_thd0~0_In-12807802 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-12807802 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite29_Out-12807802|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~y$r_buff1_thd0~0_In-12807802 |ULTIMATE.start_main_#t~ite29_Out-12807802|) (or .cse3 .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-12807802, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-12807802, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-12807802, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-12807802} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-12807802, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out-12807802|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-12807802, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-12807802, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-12807802} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 18:19:58,288 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L823-->L823-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-1749269369 256) 0))) (or (and .cse0 (= ~y$w_buff1~0_In-1749269369 |ULTIMATE.start_main_#t~ite38_Out-1749269369|) (= |ULTIMATE.start_main_#t~ite39_Out-1749269369| |ULTIMATE.start_main_#t~ite38_Out-1749269369|) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-1749269369 256)))) (or (= 0 (mod ~y$w_buff0_used~0_In-1749269369 256)) (and (= (mod ~y$r_buff1_thd0~0_In-1749269369 256) 0) .cse1) (and (= (mod ~y$w_buff1_used~0_In-1749269369 256) 0) .cse1)))) (and (= ~y$w_buff1~0_In-1749269369 |ULTIMATE.start_main_#t~ite39_Out-1749269369|) (not .cse0) (= |ULTIMATE.start_main_#t~ite38_In-1749269369| |ULTIMATE.start_main_#t~ite38_Out-1749269369|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1749269369, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1749269369, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1749269369, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In-1749269369|, ~weak$$choice2~0=~weak$$choice2~0_In-1749269369, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1749269369, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1749269369} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-1749269369, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1749269369, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out-1749269369|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1749269369, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out-1749269369|, ~weak$$choice2~0=~weak$$choice2~0_In-1749269369, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1749269369, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1749269369} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-12-07 18:19:58,288 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [809] [809] L824-->L824-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-241338113 256) 0))) (or (and .cse0 (= |ULTIMATE.start_main_#t~ite42_Out-241338113| |ULTIMATE.start_main_#t~ite41_Out-241338113|) (= |ULTIMATE.start_main_#t~ite41_Out-241338113| ~y$w_buff0_used~0_In-241338113) (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-241338113 256) 0))) (or (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In-241338113 256))) (and .cse1 (= (mod ~y$r_buff1_thd0~0_In-241338113 256) 0)) (= 0 (mod ~y$w_buff0_used~0_In-241338113 256))))) (and (= |ULTIMATE.start_main_#t~ite42_Out-241338113| ~y$w_buff0_used~0_In-241338113) (not .cse0) (= |ULTIMATE.start_main_#t~ite41_In-241338113| |ULTIMATE.start_main_#t~ite41_Out-241338113|)))) InVars {ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_In-241338113|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-241338113, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-241338113, ~weak$$choice2~0=~weak$$choice2~0_In-241338113, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-241338113, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-241338113} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out-241338113|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-241338113, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-241338113, ~weak$$choice2~0=~weak$$choice2~0_In-241338113, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out-241338113|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-241338113, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-241338113} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 18:19:58,289 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [736] [736] L826-->L827: Formula: (and (= v_~y$r_buff0_thd0~0_133 v_~y$r_buff0_thd0~0_132) (not (= 0 (mod v_~weak$$choice2~0_33 256)))) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_133, ~weak$$choice2~0=v_~weak$$choice2~0_33} OutVars{~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_132, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_22|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_13|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_8|, ~weak$$choice2~0=v_~weak$$choice2~0_33} AuxVars[] AssignedVars[~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 18:19:58,289 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] L829-->L832-1: Formula: (and (not (= (mod v_~y$flush_delayed~0_45 256) 0)) (= 0 v_~y$flush_delayed~0_44) (= v_~y~0_135 v_~y$mem_tmp~0_33) (= (mod v_~main$tmp_guard1~0_13 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_33, ~y$flush_delayed~0=v_~y$flush_delayed~0_45, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_13} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_22|, ~y$mem_tmp~0=v_~y$mem_tmp~0_33, ~y$flush_delayed~0=v_~y$flush_delayed~0_44, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_13, ~y~0=v_~y~0_135, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ~y$flush_delayed~0, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:19:58,289 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L832-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 18:19:58,342 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 06:19:58 BasicIcfg [2019-12-07 18:19:58,342 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 18:19:58,343 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 18:19:58,343 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 18:19:58,343 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 18:19:58,343 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:19:12" (3/4) ... [2019-12-07 18:19:58,345 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 18:19:58,345 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] ULTIMATE.startENTRY-->L800: Formula: (let ((.cse0 (store |v_#valid_65| 0 0))) (and (= v_~y$mem_tmp~0_39 0) (= 0 v_~y$read_delayed_var~0.offset_7) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t2177~0.base_27|)) (= 0 v_~y$r_buff0_thd3~0_110) (= v_~main$tmp_guard0~0_18 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t2177~0.base_27|) (= v_~weak$$choice2~0_126 0) (= 0 v_~x~0_147) (= v_~y$r_buff0_thd0~0_348 0) (= v_~y$read_delayed~0_7 0) (= v_~y$w_buff1~0_200 0) (= 0 v_~y$w_buff0~0_179) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t2177~0.base_27| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t2177~0.base_27|) |v_ULTIMATE.start_main_~#t2177~0.offset_20| 0)) |v_#memory_int_21|) (= v_~y~0_170 0) (< 0 |v_#StackHeapBarrier_17|) (= v_~y$r_buff1_thd0~0_299 0) (= 0 v_~y$r_buff1_thd2~0_193) (= v_~y$r_buff0_thd1~0_223 0) (= 0 |v_ULTIMATE.start_main_~#t2177~0.offset_20|) (= 0 v_~__unbuffered_p2_EAX~0_33) (= 0 v_~y$read_delayed_var~0.base_7) (= 0 v_~y$flush_delayed~0_56) (= |v_#NULL.offset_5| 0) (= v_~y$w_buff1_used~0_482 0) (= 0 v_~y$r_buff1_thd3~0_211) (= (store .cse0 |v_ULTIMATE.start_main_~#t2177~0.base_27| 1) |v_#valid_63|) (= (store |v_#length_26| |v_ULTIMATE.start_main_~#t2177~0.base_27| 4) |v_#length_25|) (= 0 v_~y$r_buff0_thd2~0_114) (= v_~__unbuffered_cnt~0_132 0) (= v_~y$w_buff0_used~0_741 0) (= 0 v_~weak$$choice0~0_34) (= 0 |v_#NULL.base_5|) (= v_~y$r_buff1_thd1~0_185 0) (= v_~main$tmp_guard1~0_22 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_61|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_27|, ULTIMATE.start_main_~#t2179~0.base=|v_ULTIMATE.start_main_~#t2179~0.base_19|, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_27|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_45|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_141|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_41|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_76|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_62|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_45|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_36|, ~y$mem_tmp~0=v_~y$mem_tmp~0_39, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_211, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_223, ~y$flush_delayed~0=v_~y$flush_delayed~0_56, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_33, ULTIMATE.start_main_~#t2178~0.offset=|v_ULTIMATE.start_main_~#t2178~0.offset_18|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_9|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_82|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_54|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_64|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_31|, ~weak$$choice0~0=v_~weak$$choice0~0_34, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_46|, ~y$w_buff1~0=v_~y$w_buff1~0_200, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_114, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_132, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_299, ~x~0=v_~x~0_147, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_61|, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_741, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_73|, ULTIMATE.start_main_~#t2179~0.offset=|v_ULTIMATE.start_main_~#t2179~0.offset_16|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_31|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_27|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_22, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_161|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_30|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_51|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_76|, ULTIMATE.start_main_~#t2177~0.base=|v_ULTIMATE.start_main_~#t2177~0.base_27|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_185, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_31|, ~y$w_buff0~0=v_~y$w_buff0~0_179, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_110, ~y~0=v_~y~0_170, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_10|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_21|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_43|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_70|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_18, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_25|, ULTIMATE.start_main_~#t2177~0.offset=|v_ULTIMATE.start_main_~#t2177~0.offset_20|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_50|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_193, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_75|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_348, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_21|, ~weak$$choice2~0=v_~weak$$choice2~0_126, ULTIMATE.start_main_~#t2178~0.base=|v_ULTIMATE.start_main_~#t2178~0.base_23|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_482} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t2179~0.base, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ~y$read_delayed~0, ULTIMATE.start_main_#t~ite52, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t2178~0.offset, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ULTIMATE.start_main_#t~nondet31, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_~#t2179~0.offset, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_~#t2177~0.base, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite51, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, ULTIMATE.start_main_~#t2177~0.offset, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ~weak$$choice2~0, ULTIMATE.start_main_~#t2178~0.base, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 18:19:58,345 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] P0ENTRY-->L4-3: Formula: (and (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_8 0)) (= v_~y$w_buff0_used~0_135 1) (= 2 v_~y$w_buff0~0_28) (= v_~y$w_buff0~0_29 v_~y$w_buff1~0_20) (= v_P0Thread1of1ForFork0_~arg.offset_6 |v_P0Thread1of1ForFork0_#in~arg.offset_8|) (= v_~y$w_buff1_used~0_63 v_~y$w_buff0_used~0_136) (= (ite (not (and (not (= (mod v_~y$w_buff1_used~0_63 256) 0)) (not (= (mod v_~y$w_buff0_used~0_135 256) 0)))) 1 0) |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_8 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|) (= v_P0Thread1of1ForFork0_~arg.base_6 |v_P0Thread1of1ForFork0_#in~arg.base_8|)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_8|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_136, ~y$w_buff0~0=v_~y$w_buff0~0_29, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_8|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_8|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_135, ~y$w_buff1~0=v_~y$w_buff1~0_20, ~y$w_buff0~0=v_~y$w_buff0~0_28, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_8, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_8|, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_6, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_6, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_63} AuxVars[] AssignedVars[~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 18:19:58,345 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L800-1-->L802: Formula: (and (= |v_ULTIMATE.start_main_~#t2178~0.offset_10| 0) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t2178~0.base_11| 4)) (not (= |v_ULTIMATE.start_main_~#t2178~0.base_11| 0)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2178~0.base_11| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2178~0.base_11|) |v_ULTIMATE.start_main_~#t2178~0.offset_10| 1)) |v_#memory_int_11|) (= 0 (select |v_#valid_38| |v_ULTIMATE.start_main_~#t2178~0.base_11|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t2178~0.base_11|) (= (store |v_#valid_38| |v_ULTIMATE.start_main_~#t2178~0.base_11| 1) |v_#valid_37|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_6|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t2178~0.base=|v_ULTIMATE.start_main_~#t2178~0.base_11|, ULTIMATE.start_main_~#t2178~0.offset=|v_ULTIMATE.start_main_~#t2178~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet21, #valid, #memory_int, #length, ULTIMATE.start_main_~#t2178~0.base, ULTIMATE.start_main_~#t2178~0.offset] because there is no mapped edge [2019-12-07 18:19:58,346 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [804] [804] L802-1-->L804: Formula: (and (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2179~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2179~0.base_13|) |v_ULTIMATE.start_main_~#t2179~0.offset_11| 2)) |v_#memory_int_13|) (not (= 0 |v_ULTIMATE.start_main_~#t2179~0.base_13|)) (= (store |v_#valid_40| |v_ULTIMATE.start_main_~#t2179~0.base_13| 1) |v_#valid_39|) (= (select |v_#valid_40| |v_ULTIMATE.start_main_~#t2179~0.base_13|) 0) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2179~0.base_13|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t2179~0.base_13| 4)) (= |v_ULTIMATE.start_main_~#t2179~0.offset_11| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t2179~0.base=|v_ULTIMATE.start_main_~#t2179~0.base_13|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t2179~0.offset=|v_ULTIMATE.start_main_~#t2179~0.offset_11|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2179~0.base, ULTIMATE.start_main_#t~nondet22, #valid, #memory_int, ULTIMATE.start_main_~#t2179~0.offset, #length] because there is no mapped edge [2019-12-07 18:19:58,346 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [754] [754] L741-->L741-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In-553868662 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd1~0_In-553868662 256) 0))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork0_#t~ite5_Out-553868662| ~y$w_buff0_used~0_In-553868662)) (and (= |P0Thread1of1ForFork0_#t~ite5_Out-553868662| 0) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-553868662, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-553868662} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-553868662|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-553868662, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-553868662} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 18:19:58,347 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L757-2-->L757-4: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In1310052735 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd2~0_In1310052735 256)))) (or (and (= ~y$w_buff1~0_In1310052735 |P1Thread1of1ForFork1_#t~ite9_Out1310052735|) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= ~y~0_In1310052735 |P1Thread1of1ForFork1_#t~ite9_Out1310052735|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1310052735, ~y$w_buff1~0=~y$w_buff1~0_In1310052735, ~y~0=~y~0_In1310052735, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1310052735} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1310052735, ~y$w_buff1~0=~y$w_buff1~0_In1310052735, P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out1310052735|, ~y~0=~y~0_In1310052735, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1310052735} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9] because there is no mapped edge [2019-12-07 18:19:58,347 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L742-->L742-2: Formula: (let ((.cse3 (= 0 (mod ~y$w_buff1_used~0_In1334352248 256))) (.cse2 (= (mod ~y$r_buff1_thd1~0_In1334352248 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1334352248 256))) (.cse0 (= (mod ~y$r_buff0_thd1~0_In1334352248 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out1334352248|)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= ~y$w_buff1_used~0_In1334352248 |P0Thread1of1ForFork0_#t~ite6_Out1334352248|)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1334352248, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1334352248, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1334352248, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1334352248} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out1334352248|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1334352248, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1334352248, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1334352248, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1334352248} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 18:19:58,347 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L743-->L744: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-137281314 256))) (.cse2 (= ~y$r_buff0_thd1~0_Out-137281314 ~y$r_buff0_thd1~0_In-137281314)) (.cse1 (= (mod ~y$r_buff0_thd1~0_In-137281314 256) 0))) (or (and (not .cse0) (not .cse1) (= ~y$r_buff0_thd1~0_Out-137281314 0)) (and .cse2 .cse0) (and .cse2 .cse1))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-137281314, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-137281314} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-137281314, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-137281314|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_Out-137281314} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~y$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:19:58,348 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L744-->L744-2: Formula: (let ((.cse3 (= (mod ~y$w_buff0_used~0_In1705258669 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd1~0_In1705258669 256))) (.cse0 (= (mod ~y$w_buff1_used~0_In1705258669 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd1~0_In1705258669 256) 0))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite8_Out1705258669|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~y$r_buff1_thd1~0_In1705258669 |P0Thread1of1ForFork0_#t~ite8_Out1705258669|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1705258669, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1705258669, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1705258669, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1705258669} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1705258669, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1705258669, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out1705258669|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1705258669, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1705258669} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 18:19:58,348 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L744-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~y$r_buff1_thd1~0_50 |v_P0Thread1of1ForFork0_#t~ite8_26|) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_50, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_25|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 18:19:58,348 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L777-2-->L777-4: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff1_thd3~0_In-239374245 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-239374245 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite15_Out-239374245| ~y~0_In-239374245)) (and (= |P2Thread1of1ForFork2_#t~ite15_Out-239374245| ~y$w_buff1~0_In-239374245) (not .cse0) (not .cse1)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-239374245, ~y$w_buff1~0=~y$w_buff1~0_In-239374245, ~y~0=~y~0_In-239374245, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-239374245} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-239374245, P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out-239374245|, ~y$w_buff1~0=~y$w_buff1~0_In-239374245, ~y~0=~y~0_In-239374245, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-239374245} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 18:19:58,348 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L777-4-->L778: Formula: (= |v_P2Thread1of1ForFork2_#t~ite15_6| v_~y~0_34) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_6|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_5|, ~y~0=v_~y~0_34, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_5|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, ~y~0, P2Thread1of1ForFork2_#t~ite16] because there is no mapped edge [2019-12-07 18:19:58,348 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [714] [714] L757-4-->L758: Formula: (= |v_P1Thread1of1ForFork1_#t~ite9_6| v_~y~0_38) InVars {P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_6|} OutVars{P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_5|, P1Thread1of1ForFork1_#t~ite10=|v_P1Thread1of1ForFork1_#t~ite10_5|, ~y~0=v_~y~0_38} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10, ~y~0] because there is no mapped edge [2019-12-07 18:19:58,348 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L758-->L758-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-239946226 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-239946226 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite11_Out-239946226| 0) (not .cse0) (not .cse1)) (and (= ~y$w_buff0_used~0_In-239946226 |P1Thread1of1ForFork1_#t~ite11_Out-239946226|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-239946226, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-239946226} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-239946226, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-239946226, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-239946226|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 18:19:58,349 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L759-->L759-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In1220960402 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd2~0_In1220960402 256))) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In1220960402 256))) (.cse3 (= 0 (mod ~y$r_buff0_thd2~0_In1220960402 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite12_Out1220960402| 0)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite12_Out1220960402| ~y$w_buff1_used~0_In1220960402) (or .cse2 .cse3)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1220960402, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1220960402, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1220960402, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1220960402} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1220960402, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1220960402, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1220960402, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out1220960402|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1220960402} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 18:19:58,349 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L760-->L760-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In2088414629 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In2088414629 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite13_Out2088414629| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite13_Out2088414629| ~y$r_buff0_thd2~0_In2088414629)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In2088414629, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2088414629} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In2088414629, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2088414629, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out2088414629|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 18:19:58,349 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L761-->L761-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In-1770696724 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd2~0_In-1770696724 256))) (.cse3 (= 0 (mod ~y$r_buff0_thd2~0_In-1770696724 256))) (.cse2 (= (mod ~y$w_buff0_used~0_In-1770696724 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite14_Out-1770696724| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~y$r_buff1_thd2~0_In-1770696724 |P1Thread1of1ForFork1_#t~ite14_Out-1770696724|) (or .cse3 .cse2)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1770696724, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1770696724, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1770696724, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1770696724} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1770696724, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1770696724, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1770696724, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-1770696724|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1770696724} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 18:19:58,349 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L778-->L778-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd3~0_In1965485591 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In1965485591 256)))) (or (and (= ~y$w_buff0_used~0_In1965485591 |P2Thread1of1ForFork2_#t~ite17_Out1965485591|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite17_Out1965485591| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1965485591, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1965485591} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1965485591, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1965485591, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out1965485591|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 18:19:58,350 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L779-->L779-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd3~0_In-2030967916 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In-2030967916 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In-2030967916 256) 0)) (.cse2 (= 0 (mod ~y$r_buff1_thd3~0_In-2030967916 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork2_#t~ite18_Out-2030967916|)) (and (= ~y$w_buff1_used~0_In-2030967916 |P2Thread1of1ForFork2_#t~ite18_Out-2030967916|) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-2030967916, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2030967916, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-2030967916, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2030967916} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-2030967916, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2030967916, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-2030967916, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out-2030967916|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2030967916} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 18:19:58,350 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] L761-2-->P1EXIT: Formula: (and (= v_~__unbuffered_cnt~0_71 (+ v_~__unbuffered_cnt~0_72 1)) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~y$r_buff1_thd2~0_135 |v_P1Thread1of1ForFork1_#t~ite14_40|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_72, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_40|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_135, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_39|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 18:19:58,350 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L780-->L780-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In913916894 256))) (.cse1 (= (mod ~y$r_buff0_thd3~0_In913916894 256) 0))) (or (and (or .cse0 .cse1) (= ~y$r_buff0_thd3~0_In913916894 |P2Thread1of1ForFork2_#t~ite19_Out913916894|)) (and (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite19_Out913916894|) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In913916894, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In913916894} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In913916894, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In913916894, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out913916894|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 18:19:58,350 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L781-->L781-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff1_thd3~0_In-1543698328 256))) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In-1543698328 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd3~0_In-1543698328 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1543698328 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite20_Out-1543698328| ~y$r_buff1_thd3~0_In-1543698328) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |P2Thread1of1ForFork2_#t~ite20_Out-1543698328|)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1543698328, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1543698328, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1543698328, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1543698328} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1543698328, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1543698328, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out-1543698328|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1543698328, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1543698328} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 18:19:58,350 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [793] [793] L781-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_66 1) v_~__unbuffered_cnt~0_65) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= |v_P2Thread1of1ForFork2_#t~ite20_34| v_~y$r_buff1_thd3~0_132)) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_132, P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_33|, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_65, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~y$r_buff1_thd3~0, P2Thread1of1ForFork2_#t~ite20, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 18:19:58,351 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L804-1-->L810: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_18) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_18} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_18, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 18:19:58,351 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L810-2-->L810-5: Formula: (let ((.cse2 (= |ULTIMATE.start_main_#t~ite25_Out-1495082679| |ULTIMATE.start_main_#t~ite24_Out-1495082679|)) (.cse0 (= (mod ~y$w_buff1_used~0_In-1495082679 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd0~0_In-1495082679 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite24_Out-1495082679| ~y~0_In-1495082679) .cse2) (and .cse2 (not .cse0) (= |ULTIMATE.start_main_#t~ite24_Out-1495082679| ~y$w_buff1~0_In-1495082679) (not .cse1)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1495082679, ~y~0=~y~0_In-1495082679, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1495082679, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1495082679} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-1495082679, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out-1495082679|, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out-1495082679|, ~y~0=~y~0_In-1495082679, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1495082679, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1495082679} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 18:19:58,351 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L811-->L811-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-1893325563 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1893325563 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-1893325563 |ULTIMATE.start_main_#t~ite26_Out-1893325563|)) (and (= 0 |ULTIMATE.start_main_#t~ite26_Out-1893325563|) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1893325563, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1893325563} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1893325563, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1893325563, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out-1893325563|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 18:19:58,351 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L812-->L812-2: Formula: (let ((.cse3 (= (mod ~y$r_buff0_thd0~0_In-1649310069 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-1649310069 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-1649310069 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-1649310069 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In-1649310069 |ULTIMATE.start_main_#t~ite27_Out-1649310069|) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |ULTIMATE.start_main_#t~ite27_Out-1649310069|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1649310069, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1649310069, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1649310069, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1649310069} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1649310069, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1649310069, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out-1649310069|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1649310069, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1649310069} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 18:19:58,352 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] L813-->L813-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In1955240067 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In1955240067 256) 0))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite28_Out1955240067| 0)) (and (= ~y$r_buff0_thd0~0_In1955240067 |ULTIMATE.start_main_#t~ite28_Out1955240067|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1955240067, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1955240067} OutVars{ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out1955240067|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1955240067, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1955240067} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 18:19:58,352 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [751] [751] L814-->L814-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In-12807802 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-12807802 256))) (.cse3 (= (mod ~y$r_buff0_thd0~0_In-12807802 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-12807802 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite29_Out-12807802|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~y$r_buff1_thd0~0_In-12807802 |ULTIMATE.start_main_#t~ite29_Out-12807802|) (or .cse3 .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-12807802, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-12807802, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-12807802, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-12807802} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-12807802, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out-12807802|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-12807802, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-12807802, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-12807802} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 18:19:58,353 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L823-->L823-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-1749269369 256) 0))) (or (and .cse0 (= ~y$w_buff1~0_In-1749269369 |ULTIMATE.start_main_#t~ite38_Out-1749269369|) (= |ULTIMATE.start_main_#t~ite39_Out-1749269369| |ULTIMATE.start_main_#t~ite38_Out-1749269369|) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-1749269369 256)))) (or (= 0 (mod ~y$w_buff0_used~0_In-1749269369 256)) (and (= (mod ~y$r_buff1_thd0~0_In-1749269369 256) 0) .cse1) (and (= (mod ~y$w_buff1_used~0_In-1749269369 256) 0) .cse1)))) (and (= ~y$w_buff1~0_In-1749269369 |ULTIMATE.start_main_#t~ite39_Out-1749269369|) (not .cse0) (= |ULTIMATE.start_main_#t~ite38_In-1749269369| |ULTIMATE.start_main_#t~ite38_Out-1749269369|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1749269369, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1749269369, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1749269369, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In-1749269369|, ~weak$$choice2~0=~weak$$choice2~0_In-1749269369, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1749269369, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1749269369} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-1749269369, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1749269369, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out-1749269369|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1749269369, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out-1749269369|, ~weak$$choice2~0=~weak$$choice2~0_In-1749269369, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1749269369, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1749269369} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-12-07 18:19:58,354 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [809] [809] L824-->L824-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-241338113 256) 0))) (or (and .cse0 (= |ULTIMATE.start_main_#t~ite42_Out-241338113| |ULTIMATE.start_main_#t~ite41_Out-241338113|) (= |ULTIMATE.start_main_#t~ite41_Out-241338113| ~y$w_buff0_used~0_In-241338113) (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-241338113 256) 0))) (or (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In-241338113 256))) (and .cse1 (= (mod ~y$r_buff1_thd0~0_In-241338113 256) 0)) (= 0 (mod ~y$w_buff0_used~0_In-241338113 256))))) (and (= |ULTIMATE.start_main_#t~ite42_Out-241338113| ~y$w_buff0_used~0_In-241338113) (not .cse0) (= |ULTIMATE.start_main_#t~ite41_In-241338113| |ULTIMATE.start_main_#t~ite41_Out-241338113|)))) InVars {ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_In-241338113|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-241338113, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-241338113, ~weak$$choice2~0=~weak$$choice2~0_In-241338113, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-241338113, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-241338113} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out-241338113|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-241338113, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-241338113, ~weak$$choice2~0=~weak$$choice2~0_In-241338113, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out-241338113|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-241338113, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-241338113} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 18:19:58,354 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [736] [736] L826-->L827: Formula: (and (= v_~y$r_buff0_thd0~0_133 v_~y$r_buff0_thd0~0_132) (not (= 0 (mod v_~weak$$choice2~0_33 256)))) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_133, ~weak$$choice2~0=v_~weak$$choice2~0_33} OutVars{~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_132, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_22|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_13|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_8|, ~weak$$choice2~0=v_~weak$$choice2~0_33} AuxVars[] AssignedVars[~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 18:19:58,355 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] L829-->L832-1: Formula: (and (not (= (mod v_~y$flush_delayed~0_45 256) 0)) (= 0 v_~y$flush_delayed~0_44) (= v_~y~0_135 v_~y$mem_tmp~0_33) (= (mod v_~main$tmp_guard1~0_13 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_33, ~y$flush_delayed~0=v_~y$flush_delayed~0_45, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_13} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_22|, ~y$mem_tmp~0=v_~y$mem_tmp~0_33, ~y$flush_delayed~0=v_~y$flush_delayed~0_44, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_13, ~y~0=v_~y~0_135, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ~y$flush_delayed~0, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:19:58,355 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L832-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 18:19:58,414 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_fe231d1c-0540-4b05-ba16-4c912cee4126/bin/uautomizer/witness.graphml [2019-12-07 18:19:58,414 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 18:19:58,416 INFO L168 Benchmark]: Toolchain (without parser) took 46898.57 ms. Allocated memory was 1.0 GB in the beginning and 5.8 GB in the end (delta: 4.8 GB). Free memory was 938.2 MB in the beginning and 2.6 GB in the end (delta: -1.7 GB). Peak memory consumption was 3.1 GB. Max. memory is 11.5 GB. [2019-12-07 18:19:58,416 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:19:58,417 INFO L168 Benchmark]: CACSL2BoogieTranslator took 368.10 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 95.9 MB). Free memory was 938.2 MB in the beginning and 1.1 GB in the end (delta: -127.1 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. [2019-12-07 18:19:58,417 INFO L168 Benchmark]: Boogie Procedure Inliner took 40.20 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 18:19:58,417 INFO L168 Benchmark]: Boogie Preprocessor took 26.21 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:19:58,417 INFO L168 Benchmark]: RCFGBuilder took 395.01 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. [2019-12-07 18:19:58,418 INFO L168 Benchmark]: TraceAbstraction took 45994.10 ms. Allocated memory was 1.1 GB in the beginning and 5.8 GB in the end (delta: 4.7 GB). Free memory was 1.0 GB in the beginning and 2.7 GB in the end (delta: -1.7 GB). Peak memory consumption was 3.1 GB. Max. memory is 11.5 GB. [2019-12-07 18:19:58,418 INFO L168 Benchmark]: Witness Printer took 71.88 ms. Allocated memory is still 5.8 GB. Free memory was 2.7 GB in the beginning and 2.6 GB in the end (delta: 14.6 MB). Peak memory consumption was 14.6 MB. Max. memory is 11.5 GB. [2019-12-07 18:19:58,420 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 368.10 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 95.9 MB). Free memory was 938.2 MB in the beginning and 1.1 GB in the end (delta: -127.1 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 40.20 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.21 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 395.01 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 45994.10 ms. Allocated memory was 1.1 GB in the beginning and 5.8 GB in the end (delta: 4.7 GB). Free memory was 1.0 GB in the beginning and 2.7 GB in the end (delta: -1.7 GB). Peak memory consumption was 3.1 GB. Max. memory is 11.5 GB. * Witness Printer took 71.88 ms. Allocated memory is still 5.8 GB. Free memory was 2.7 GB in the beginning and 2.6 GB in the end (delta: 14.6 MB). Peak memory consumption was 14.6 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.0s, 173 ProgramPointsBefore, 94 ProgramPointsAfterwards, 210 TransitionsBefore, 104 TransitionsAfterwards, 17114 CoEnabledTransitionPairs, 7 FixpointIterations, 30 TrivialSequentialCompositions, 44 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 39 ConcurrentYvCompositions, 31 ChoiceCompositions, 5882 VarBasedMoverChecksPositive, 246 VarBasedMoverChecksNegative, 66 SemBasedMoverChecksPositive, 253 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 78185 CheckedPairsTotal, 113 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L800] FCALL, FORK 0 pthread_create(&t2177, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L730] 1 y$r_buff1_thd0 = y$r_buff0_thd0 [L731] 1 y$r_buff1_thd1 = y$r_buff0_thd1 [L732] 1 y$r_buff1_thd2 = y$r_buff0_thd2 [L733] 1 y$r_buff1_thd3 = y$r_buff0_thd3 [L734] 1 y$r_buff0_thd1 = (_Bool)1 [L737] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L740] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L802] FCALL, FORK 0 pthread_create(&t2178, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L740] 1 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L804] FCALL, FORK 0 pthread_create(&t2179, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L754] 2 x = 2 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L757] 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L741] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L742] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L771] 3 __unbuffered_p2_EAX = x [L774] 3 y = 1 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2] [L777] 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2] [L758] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L759] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L760] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L778] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L779] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L780] 3 y$r_buff0_thd3 = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 [L810] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L810] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L811] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L812] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L813] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L814] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L817] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L818] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L819] 0 y$flush_delayed = weak$$choice2 [L820] 0 y$mem_tmp = y VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=7, x=2, y=2, y$flush_delayed=7, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L821] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=7, x=2, y=2, y$flush_delayed=7, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L821] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L822] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=7, x=2, y=2, y$flush_delayed=7, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L822] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L823] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L824] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L825] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=7, x=2, y=2, y$flush_delayed=7, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L825] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L827] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=7, x=2, y=2, y$flush_delayed=7, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L827] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L828] 0 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p2_EAX == 2) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=7, x=2, y=2, y$flush_delayed=7, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 164 locations, 2 error locations. Result: UNSAFE, OverallTime: 45.8s, OverallIterations: 18, TraceHistogramMax: 1, AutomataDifference: 8.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 3440 SDtfs, 3342 SDslu, 8450 SDs, 0 SdLazy, 5175 SolverSat, 218 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 3.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 157 GetRequests, 18 SyntacticMatches, 16 SemanticMatches, 123 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 343 ImplicationChecksByTransitivity, 1.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=156321occurred in iteration=2, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 19.2s AutomataMinimizationTime, 17 MinimizatonAttempts, 67049 StatesRemovedByMinimization, 13 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.1s InterpolantComputationTime, 684 NumberOfCodeBlocks, 684 NumberOfCodeBlocksAsserted, 18 NumberOfCheckSat, 599 ConstructedInterpolants, 0 QuantifiedInterpolants, 138796 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 17 InterpolantComputations, 17 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...