./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe017_pso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_4b1a9b72-d6ac-4917-9887-2b01f778d1b6/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_4b1a9b72-d6ac-4917-9887-2b01f778d1b6/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_4b1a9b72-d6ac-4917-9887-2b01f778d1b6/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_4b1a9b72-d6ac-4917-9887-2b01f778d1b6/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe017_pso.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_4b1a9b72-d6ac-4917-9887-2b01f778d1b6/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_4b1a9b72-d6ac-4917-9887-2b01f778d1b6/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 0885e64468ef53ddb31131d4fa176c00edab8093 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................ Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 14:46:10,842 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 14:46:10,843 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 14:46:10,850 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 14:46:10,850 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 14:46:10,851 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 14:46:10,852 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 14:46:10,853 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 14:46:10,855 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 14:46:10,855 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 14:46:10,856 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 14:46:10,857 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 14:46:10,857 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 14:46:10,857 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 14:46:10,858 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 14:46:10,859 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 14:46:10,859 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 14:46:10,860 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 14:46:10,861 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 14:46:10,863 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 14:46:10,864 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 14:46:10,865 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 14:46:10,865 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 14:46:10,866 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 14:46:10,867 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 14:46:10,868 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 14:46:10,868 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 14:46:10,868 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 14:46:10,868 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 14:46:10,869 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 14:46:10,869 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 14:46:10,869 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 14:46:10,870 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 14:46:10,870 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 14:46:10,871 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 14:46:10,871 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 14:46:10,871 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 14:46:10,872 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 14:46:10,872 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 14:46:10,872 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 14:46:10,872 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 14:46:10,873 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_4b1a9b72-d6ac-4917-9887-2b01f778d1b6/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 14:46:10,882 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 14:46:10,882 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 14:46:10,883 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 14:46:10,883 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 14:46:10,883 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 14:46:10,883 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 14:46:10,883 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 14:46:10,883 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 14:46:10,883 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 14:46:10,883 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 14:46:10,883 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 14:46:10,884 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 14:46:10,884 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 14:46:10,884 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 14:46:10,884 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 14:46:10,884 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 14:46:10,884 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 14:46:10,884 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 14:46:10,884 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 14:46:10,884 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 14:46:10,884 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 14:46:10,885 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 14:46:10,885 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 14:46:10,885 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 14:46:10,885 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 14:46:10,885 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 14:46:10,885 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 14:46:10,885 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 14:46:10,885 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 14:46:10,885 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_4b1a9b72-d6ac-4917-9887-2b01f778d1b6/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 0885e64468ef53ddb31131d4fa176c00edab8093 [2019-12-07 14:46:10,983 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 14:46:10,991 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 14:46:10,994 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 14:46:10,995 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 14:46:10,995 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 14:46:10,996 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_4b1a9b72-d6ac-4917-9887-2b01f778d1b6/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe017_pso.opt.i [2019-12-07 14:46:11,039 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_4b1a9b72-d6ac-4917-9887-2b01f778d1b6/bin/uautomizer/data/b73798603/42b0e753cc05420a97170236d40192c5/FLAG1468b4e68 [2019-12-07 14:46:11,449 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 14:46:11,449 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_4b1a9b72-d6ac-4917-9887-2b01f778d1b6/sv-benchmarks/c/pthread-wmm/safe017_pso.opt.i [2019-12-07 14:46:11,460 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_4b1a9b72-d6ac-4917-9887-2b01f778d1b6/bin/uautomizer/data/b73798603/42b0e753cc05420a97170236d40192c5/FLAG1468b4e68 [2019-12-07 14:46:11,826 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_4b1a9b72-d6ac-4917-9887-2b01f778d1b6/bin/uautomizer/data/b73798603/42b0e753cc05420a97170236d40192c5 [2019-12-07 14:46:11,831 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 14:46:11,833 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 14:46:11,835 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 14:46:11,835 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 14:46:11,839 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 14:46:11,839 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 02:46:11" (1/1) ... [2019-12-07 14:46:11,841 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@375546ab and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:46:11, skipping insertion in model container [2019-12-07 14:46:11,841 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 02:46:11" (1/1) ... [2019-12-07 14:46:11,846 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 14:46:11,874 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 14:46:12,108 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 14:46:12,116 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 14:46:12,158 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 14:46:12,202 INFO L208 MainTranslator]: Completed translation [2019-12-07 14:46:12,203 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:46:12 WrapperNode [2019-12-07 14:46:12,203 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 14:46:12,203 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 14:46:12,203 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 14:46:12,203 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 14:46:12,209 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:46:12" (1/1) ... [2019-12-07 14:46:12,223 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:46:12" (1/1) ... [2019-12-07 14:46:12,244 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 14:46:12,244 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 14:46:12,244 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 14:46:12,244 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 14:46:12,251 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:46:12" (1/1) ... [2019-12-07 14:46:12,251 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:46:12" (1/1) ... [2019-12-07 14:46:12,254 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:46:12" (1/1) ... [2019-12-07 14:46:12,255 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:46:12" (1/1) ... [2019-12-07 14:46:12,261 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:46:12" (1/1) ... [2019-12-07 14:46:12,264 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:46:12" (1/1) ... [2019-12-07 14:46:12,267 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:46:12" (1/1) ... [2019-12-07 14:46:12,270 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 14:46:12,270 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 14:46:12,270 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 14:46:12,270 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 14:46:12,271 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:46:12" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_4b1a9b72-d6ac-4917-9887-2b01f778d1b6/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 14:46:12,311 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 14:46:12,312 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 14:46:12,312 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 14:46:12,312 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 14:46:12,312 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 14:46:12,312 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 14:46:12,312 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 14:46:12,312 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 14:46:12,312 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 14:46:12,312 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 14:46:12,313 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 14:46:12,313 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 14:46:12,313 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 14:46:12,314 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 14:46:12,679 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 14:46:12,679 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 14:46:12,680 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:46:12 BoogieIcfgContainer [2019-12-07 14:46:12,680 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 14:46:12,680 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 14:46:12,680 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 14:46:12,682 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 14:46:12,682 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 02:46:11" (1/3) ... [2019-12-07 14:46:12,683 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@10eea6da and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 02:46:12, skipping insertion in model container [2019-12-07 14:46:12,683 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:46:12" (2/3) ... [2019-12-07 14:46:12,683 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@10eea6da and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 02:46:12, skipping insertion in model container [2019-12-07 14:46:12,683 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:46:12" (3/3) ... [2019-12-07 14:46:12,684 INFO L109 eAbstractionObserver]: Analyzing ICFG safe017_pso.opt.i [2019-12-07 14:46:12,691 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 14:46:12,691 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 14:46:12,696 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 14:46:12,696 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 14:46:12,720 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,720 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,720 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,720 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,720 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,720 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,721 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,721 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,721 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,721 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,721 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,724 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,724 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,724 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,724 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,724 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,724 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,725 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,725 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,725 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,725 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,725 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,725 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,725 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,725 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,725 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,726 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,726 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,726 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,726 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,726 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,726 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,726 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,726 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,726 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,727 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,727 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,727 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,727 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,727 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,727 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,727 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,727 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,727 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,728 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,728 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,728 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,728 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,728 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,728 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,728 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,729 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,729 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,729 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,729 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,729 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,729 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,729 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,729 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,729 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,730 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,730 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,730 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,730 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,730 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,730 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,730 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,730 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,730 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,730 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,731 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,731 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,731 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,731 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,731 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,731 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:46:12,742 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 14:46:12,755 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 14:46:12,755 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 14:46:12,755 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 14:46:12,755 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 14:46:12,755 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 14:46:12,755 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 14:46:12,755 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 14:46:12,755 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 14:46:12,766 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 173 places, 210 transitions [2019-12-07 14:46:12,767 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 173 places, 210 transitions [2019-12-07 14:46:12,821 INFO L134 PetriNetUnfolder]: 47/207 cut-off events. [2019-12-07 14:46:12,821 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 14:46:12,832 INFO L76 FinitePrefix]: Finished finitePrefix Result has 217 conditions, 207 events. 47/207 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 585 event pairs. 9/167 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 14:46:12,846 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 173 places, 210 transitions [2019-12-07 14:46:12,876 INFO L134 PetriNetUnfolder]: 47/207 cut-off events. [2019-12-07 14:46:12,876 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 14:46:12,882 INFO L76 FinitePrefix]: Finished finitePrefix Result has 217 conditions, 207 events. 47/207 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 585 event pairs. 9/167 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 14:46:12,897 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 17114 [2019-12-07 14:46:12,897 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 14:46:15,753 WARN L192 SmtUtils]: Spent 122.00 ms on a formula simplification. DAG size of input: 85 DAG size of output: 83 [2019-12-07 14:46:15,833 INFO L206 etLargeBlockEncoding]: Checked pairs total: 78185 [2019-12-07 14:46:15,834 INFO L214 etLargeBlockEncoding]: Total number of compositions: 113 [2019-12-07 14:46:15,836 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 94 places, 104 transitions [2019-12-07 14:46:28,675 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 112926 states. [2019-12-07 14:46:28,677 INFO L276 IsEmpty]: Start isEmpty. Operand 112926 states. [2019-12-07 14:46:28,681 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 14:46:28,681 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:46:28,682 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 14:46:28,682 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:46:28,686 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:46:28,686 INFO L82 PathProgramCache]: Analyzing trace with hash 844394, now seen corresponding path program 1 times [2019-12-07 14:46:28,691 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:46:28,691 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1287408913] [2019-12-07 14:46:28,692 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:46:28,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:46:28,836 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:46:28,836 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1287408913] [2019-12-07 14:46:28,837 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:46:28,837 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 14:46:28,838 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1443853403] [2019-12-07 14:46:28,842 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:46:28,842 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:46:28,851 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:46:28,851 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:46:28,852 INFO L87 Difference]: Start difference. First operand 112926 states. Second operand 3 states. [2019-12-07 14:46:29,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:46:29,758 INFO L93 Difference]: Finished difference Result 112536 states and 479624 transitions. [2019-12-07 14:46:29,759 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:46:29,760 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 14:46:29,760 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:46:30,265 INFO L225 Difference]: With dead ends: 112536 [2019-12-07 14:46:30,266 INFO L226 Difference]: Without dead ends: 110184 [2019-12-07 14:46:30,267 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:46:33,759 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110184 states. [2019-12-07 14:46:35,245 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110184 to 110184. [2019-12-07 14:46:35,247 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 110184 states. [2019-12-07 14:46:35,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110184 states to 110184 states and 470020 transitions. [2019-12-07 14:46:35,585 INFO L78 Accepts]: Start accepts. Automaton has 110184 states and 470020 transitions. Word has length 3 [2019-12-07 14:46:35,585 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:46:35,585 INFO L462 AbstractCegarLoop]: Abstraction has 110184 states and 470020 transitions. [2019-12-07 14:46:35,585 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:46:35,585 INFO L276 IsEmpty]: Start isEmpty. Operand 110184 states and 470020 transitions. [2019-12-07 14:46:35,589 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 14:46:35,589 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:46:35,589 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:46:35,589 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:46:35,589 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:46:35,589 INFO L82 PathProgramCache]: Analyzing trace with hash -418531443, now seen corresponding path program 1 times [2019-12-07 14:46:35,589 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:46:35,590 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [500744859] [2019-12-07 14:46:35,590 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:46:35,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:46:35,664 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:46:35,665 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [500744859] [2019-12-07 14:46:35,665 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:46:35,665 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:46:35,665 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [379083002] [2019-12-07 14:46:35,666 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:46:35,666 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:46:35,666 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:46:35,666 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:46:35,666 INFO L87 Difference]: Start difference. First operand 110184 states and 470020 transitions. Second operand 4 states. [2019-12-07 14:46:38,514 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:46:38,514 INFO L93 Difference]: Finished difference Result 172298 states and 706272 transitions. [2019-12-07 14:46:38,515 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:46:38,515 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 14:46:38,515 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:46:38,948 INFO L225 Difference]: With dead ends: 172298 [2019-12-07 14:46:38,948 INFO L226 Difference]: Without dead ends: 172249 [2019-12-07 14:46:38,949 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:46:43,175 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172249 states. [2019-12-07 14:46:45,287 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172249 to 156321. [2019-12-07 14:46:45,287 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156321 states. [2019-12-07 14:46:45,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156321 states to 156321 states and 647667 transitions. [2019-12-07 14:46:45,706 INFO L78 Accepts]: Start accepts. Automaton has 156321 states and 647667 transitions. Word has length 11 [2019-12-07 14:46:45,706 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:46:45,706 INFO L462 AbstractCegarLoop]: Abstraction has 156321 states and 647667 transitions. [2019-12-07 14:46:45,706 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:46:45,706 INFO L276 IsEmpty]: Start isEmpty. Operand 156321 states and 647667 transitions. [2019-12-07 14:46:45,711 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 14:46:45,711 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:46:45,711 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:46:45,711 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:46:45,711 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:46:45,711 INFO L82 PathProgramCache]: Analyzing trace with hash -986312255, now seen corresponding path program 1 times [2019-12-07 14:46:45,711 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:46:45,712 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [881120969] [2019-12-07 14:46:45,712 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:46:45,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:46:45,752 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:46:45,753 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [881120969] [2019-12-07 14:46:45,753 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:46:45,753 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:46:45,753 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1014888677] [2019-12-07 14:46:45,754 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:46:45,754 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:46:45,754 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:46:45,754 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:46:45,754 INFO L87 Difference]: Start difference. First operand 156321 states and 647667 transitions. Second operand 3 states. [2019-12-07 14:46:45,846 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:46:45,846 INFO L93 Difference]: Finished difference Result 32129 states and 104196 transitions. [2019-12-07 14:46:45,846 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:46:45,847 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 13 [2019-12-07 14:46:45,847 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:46:45,896 INFO L225 Difference]: With dead ends: 32129 [2019-12-07 14:46:45,896 INFO L226 Difference]: Without dead ends: 32129 [2019-12-07 14:46:45,897 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:46:46,052 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32129 states. [2019-12-07 14:46:46,350 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32129 to 32129. [2019-12-07 14:46:46,350 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32129 states. [2019-12-07 14:46:46,403 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32129 states to 32129 states and 104196 transitions. [2019-12-07 14:46:46,403 INFO L78 Accepts]: Start accepts. Automaton has 32129 states and 104196 transitions. Word has length 13 [2019-12-07 14:46:46,403 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:46:46,404 INFO L462 AbstractCegarLoop]: Abstraction has 32129 states and 104196 transitions. [2019-12-07 14:46:46,404 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:46:46,404 INFO L276 IsEmpty]: Start isEmpty. Operand 32129 states and 104196 transitions. [2019-12-07 14:46:46,405 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 14:46:46,405 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:46:46,405 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:46:46,405 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:46:46,405 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:46:46,405 INFO L82 PathProgramCache]: Analyzing trace with hash -1176456771, now seen corresponding path program 1 times [2019-12-07 14:46:46,405 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:46:46,406 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1783818662] [2019-12-07 14:46:46,406 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:46:46,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:46:46,456 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:46:46,456 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1783818662] [2019-12-07 14:46:46,456 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:46:46,456 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:46:46,456 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [404618605] [2019-12-07 14:46:46,456 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:46:46,456 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:46:46,457 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:46:46,457 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:46:46,457 INFO L87 Difference]: Start difference. First operand 32129 states and 104196 transitions. Second operand 4 states. [2019-12-07 14:46:46,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:46:46,718 INFO L93 Difference]: Finished difference Result 43159 states and 136814 transitions. [2019-12-07 14:46:46,718 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:46:46,718 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 14:46:46,718 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:46:46,775 INFO L225 Difference]: With dead ends: 43159 [2019-12-07 14:46:46,775 INFO L226 Difference]: Without dead ends: 43152 [2019-12-07 14:46:46,775 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:46:46,984 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43152 states. [2019-12-07 14:46:47,705 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43152 to 37631. [2019-12-07 14:46:47,705 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37631 states. [2019-12-07 14:46:47,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37631 states to 37631 states and 121166 transitions. [2019-12-07 14:46:47,765 INFO L78 Accepts]: Start accepts. Automaton has 37631 states and 121166 transitions. Word has length 13 [2019-12-07 14:46:47,765 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:46:47,765 INFO L462 AbstractCegarLoop]: Abstraction has 37631 states and 121166 transitions. [2019-12-07 14:46:47,765 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:46:47,765 INFO L276 IsEmpty]: Start isEmpty. Operand 37631 states and 121166 transitions. [2019-12-07 14:46:47,768 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 14:46:47,768 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:46:47,769 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:46:47,769 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:46:47,769 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:46:47,769 INFO L82 PathProgramCache]: Analyzing trace with hash -2012510844, now seen corresponding path program 1 times [2019-12-07 14:46:47,769 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:46:47,769 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [981153572] [2019-12-07 14:46:47,769 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:46:47,789 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:46:47,841 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:46:47,841 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [981153572] [2019-12-07 14:46:47,842 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:46:47,842 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:46:47,842 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2076437211] [2019-12-07 14:46:47,842 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:46:47,842 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:46:47,842 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:46:47,842 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:46:47,843 INFO L87 Difference]: Start difference. First operand 37631 states and 121166 transitions. Second operand 5 states. [2019-12-07 14:46:48,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:46:48,347 INFO L93 Difference]: Finished difference Result 50788 states and 160280 transitions. [2019-12-07 14:46:48,347 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 14:46:48,347 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 14:46:48,347 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:46:48,421 INFO L225 Difference]: With dead ends: 50788 [2019-12-07 14:46:48,421 INFO L226 Difference]: Without dead ends: 50775 [2019-12-07 14:46:48,422 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:46:48,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50775 states. [2019-12-07 14:46:49,048 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50775 to 38059. [2019-12-07 14:46:49,049 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38059 states. [2019-12-07 14:46:49,111 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38059 states to 38059 states and 122380 transitions. [2019-12-07 14:46:49,112 INFO L78 Accepts]: Start accepts. Automaton has 38059 states and 122380 transitions. Word has length 19 [2019-12-07 14:46:49,112 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:46:49,112 INFO L462 AbstractCegarLoop]: Abstraction has 38059 states and 122380 transitions. [2019-12-07 14:46:49,112 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:46:49,112 INFO L276 IsEmpty]: Start isEmpty. Operand 38059 states and 122380 transitions. [2019-12-07 14:46:49,123 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 14:46:49,123 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:46:49,123 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:46:49,123 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:46:49,123 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:46:49,124 INFO L82 PathProgramCache]: Analyzing trace with hash -394195806, now seen corresponding path program 1 times [2019-12-07 14:46:49,124 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:46:49,124 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [28746080] [2019-12-07 14:46:49,124 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:46:49,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:46:49,246 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:46:49,246 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [28746080] [2019-12-07 14:46:49,246 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:46:49,247 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:46:49,247 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1572308365] [2019-12-07 14:46:49,247 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:46:49,247 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:46:49,247 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:46:49,248 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:46:49,248 INFO L87 Difference]: Start difference. First operand 38059 states and 122380 transitions. Second operand 6 states. [2019-12-07 14:46:49,691 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:46:49,692 INFO L93 Difference]: Finished difference Result 52490 states and 164935 transitions. [2019-12-07 14:46:49,692 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 14:46:49,693 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 25 [2019-12-07 14:46:49,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:46:49,768 INFO L225 Difference]: With dead ends: 52490 [2019-12-07 14:46:49,769 INFO L226 Difference]: Without dead ends: 52490 [2019-12-07 14:46:49,769 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 0 SyntacticMatches, 4 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:46:49,975 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52490 states. [2019-12-07 14:46:50,404 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52490 to 41789. [2019-12-07 14:46:50,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41789 states. [2019-12-07 14:46:50,471 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41789 states to 41789 states and 133474 transitions. [2019-12-07 14:46:50,471 INFO L78 Accepts]: Start accepts. Automaton has 41789 states and 133474 transitions. Word has length 25 [2019-12-07 14:46:50,471 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:46:50,471 INFO L462 AbstractCegarLoop]: Abstraction has 41789 states and 133474 transitions. [2019-12-07 14:46:50,471 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:46:50,471 INFO L276 IsEmpty]: Start isEmpty. Operand 41789 states and 133474 transitions. [2019-12-07 14:46:50,478 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 14:46:50,478 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:46:50,479 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:46:50,479 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:46:50,479 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:46:50,479 INFO L82 PathProgramCache]: Analyzing trace with hash -376699641, now seen corresponding path program 1 times [2019-12-07 14:46:50,479 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:46:50,479 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [968396656] [2019-12-07 14:46:50,479 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:46:50,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:46:50,518 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:46:50,518 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [968396656] [2019-12-07 14:46:50,518 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:46:50,518 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:46:50,519 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [403309728] [2019-12-07 14:46:50,519 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:46:50,519 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:46:50,519 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:46:50,519 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:46:50,520 INFO L87 Difference]: Start difference. First operand 41789 states and 133474 transitions. Second operand 4 states. [2019-12-07 14:46:50,555 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:46:50,555 INFO L93 Difference]: Finished difference Result 8619 states and 23229 transitions. [2019-12-07 14:46:50,556 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 14:46:50,556 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2019-12-07 14:46:50,556 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:46:50,565 INFO L225 Difference]: With dead ends: 8619 [2019-12-07 14:46:50,565 INFO L226 Difference]: Without dead ends: 8619 [2019-12-07 14:46:50,566 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:46:50,595 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8619 states. [2019-12-07 14:46:51,239 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8619 to 8479. [2019-12-07 14:46:51,240 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8479 states. [2019-12-07 14:46:51,249 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8479 states to 8479 states and 22829 transitions. [2019-12-07 14:46:51,249 INFO L78 Accepts]: Start accepts. Automaton has 8479 states and 22829 transitions. Word has length 25 [2019-12-07 14:46:51,249 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:46:51,249 INFO L462 AbstractCegarLoop]: Abstraction has 8479 states and 22829 transitions. [2019-12-07 14:46:51,249 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:46:51,249 INFO L276 IsEmpty]: Start isEmpty. Operand 8479 states and 22829 transitions. [2019-12-07 14:46:51,257 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-12-07 14:46:51,257 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:46:51,257 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:46:51,257 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:46:51,257 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:46:51,257 INFO L82 PathProgramCache]: Analyzing trace with hash 56145512, now seen corresponding path program 1 times [2019-12-07 14:46:51,257 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:46:51,257 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2005581585] [2019-12-07 14:46:51,258 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:46:51,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:46:51,323 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:46:51,324 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2005581585] [2019-12-07 14:46:51,324 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:46:51,324 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:46:51,324 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1808209612] [2019-12-07 14:46:51,324 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:46:51,325 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:46:51,325 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:46:51,325 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:46:51,325 INFO L87 Difference]: Start difference. First operand 8479 states and 22829 transitions. Second operand 6 states. [2019-12-07 14:46:51,720 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:46:51,720 INFO L93 Difference]: Finished difference Result 9492 states and 25012 transitions. [2019-12-07 14:46:51,720 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 14:46:51,720 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 37 [2019-12-07 14:46:51,721 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:46:51,728 INFO L225 Difference]: With dead ends: 9492 [2019-12-07 14:46:51,729 INFO L226 Difference]: Without dead ends: 9492 [2019-12-07 14:46:51,729 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=47, Invalid=109, Unknown=0, NotChecked=0, Total=156 [2019-12-07 14:46:51,755 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9492 states. [2019-12-07 14:46:51,820 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9492 to 7743. [2019-12-07 14:46:51,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7743 states. [2019-12-07 14:46:51,830 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7743 states to 7743 states and 20803 transitions. [2019-12-07 14:46:51,830 INFO L78 Accepts]: Start accepts. Automaton has 7743 states and 20803 transitions. Word has length 37 [2019-12-07 14:46:51,830 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:46:51,830 INFO L462 AbstractCegarLoop]: Abstraction has 7743 states and 20803 transitions. [2019-12-07 14:46:51,830 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:46:51,830 INFO L276 IsEmpty]: Start isEmpty. Operand 7743 states and 20803 transitions. [2019-12-07 14:46:51,839 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-12-07 14:46:51,839 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:46:51,839 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:46:51,840 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:46:51,840 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:46:51,840 INFO L82 PathProgramCache]: Analyzing trace with hash -2110715921, now seen corresponding path program 1 times [2019-12-07 14:46:51,840 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:46:51,840 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [497617367] [2019-12-07 14:46:51,840 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:46:51,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:46:51,967 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:46:51,968 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [497617367] [2019-12-07 14:46:51,968 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:46:51,968 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 14:46:51,968 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [949234295] [2019-12-07 14:46:51,968 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 14:46:51,969 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:46:51,969 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 14:46:51,969 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-12-07 14:46:51,969 INFO L87 Difference]: Start difference. First operand 7743 states and 20803 transitions. Second operand 8 states. [2019-12-07 14:46:52,706 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:46:52,706 INFO L93 Difference]: Finished difference Result 9015 states and 23525 transitions. [2019-12-07 14:46:52,707 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 14:46:52,707 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 51 [2019-12-07 14:46:52,707 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:46:52,714 INFO L225 Difference]: With dead ends: 9015 [2019-12-07 14:46:52,714 INFO L226 Difference]: Without dead ends: 9013 [2019-12-07 14:46:52,715 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 0 SyntacticMatches, 4 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 110 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=119, Invalid=433, Unknown=0, NotChecked=0, Total=552 [2019-12-07 14:46:52,737 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9013 states. [2019-12-07 14:46:52,795 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9013 to 8256. [2019-12-07 14:46:52,795 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8256 states. [2019-12-07 14:46:52,804 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8256 states to 8256 states and 21873 transitions. [2019-12-07 14:46:52,804 INFO L78 Accepts]: Start accepts. Automaton has 8256 states and 21873 transitions. Word has length 51 [2019-12-07 14:46:52,805 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:46:52,805 INFO L462 AbstractCegarLoop]: Abstraction has 8256 states and 21873 transitions. [2019-12-07 14:46:52,805 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 14:46:52,805 INFO L276 IsEmpty]: Start isEmpty. Operand 8256 states and 21873 transitions. [2019-12-07 14:46:52,813 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 14:46:52,813 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:46:52,813 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:46:52,813 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:46:52,813 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:46:52,813 INFO L82 PathProgramCache]: Analyzing trace with hash -1899406467, now seen corresponding path program 1 times [2019-12-07 14:46:52,814 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:46:52,814 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1304744481] [2019-12-07 14:46:52,814 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:46:52,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:46:52,857 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:46:52,858 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1304744481] [2019-12-07 14:46:52,858 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:46:52,858 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:46:52,858 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [649843418] [2019-12-07 14:46:52,858 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:46:52,859 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:46:52,859 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:46:52,859 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:46:52,859 INFO L87 Difference]: Start difference. First operand 8256 states and 21873 transitions. Second operand 3 states. [2019-12-07 14:46:52,908 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:46:52,908 INFO L93 Difference]: Finished difference Result 8814 states and 23166 transitions. [2019-12-07 14:46:52,909 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:46:52,909 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 54 [2019-12-07 14:46:52,909 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:46:52,916 INFO L225 Difference]: With dead ends: 8814 [2019-12-07 14:46:52,916 INFO L226 Difference]: Without dead ends: 8814 [2019-12-07 14:46:52,916 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:46:52,938 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8814 states. [2019-12-07 14:46:52,996 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8814 to 8442. [2019-12-07 14:46:52,997 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8442 states. [2019-12-07 14:46:53,006 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8442 states to 8442 states and 22424 transitions. [2019-12-07 14:46:53,006 INFO L78 Accepts]: Start accepts. Automaton has 8442 states and 22424 transitions. Word has length 54 [2019-12-07 14:46:53,007 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:46:53,007 INFO L462 AbstractCegarLoop]: Abstraction has 8442 states and 22424 transitions. [2019-12-07 14:46:53,007 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:46:53,007 INFO L276 IsEmpty]: Start isEmpty. Operand 8442 states and 22424 transitions. [2019-12-07 14:46:53,015 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 14:46:53,015 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:46:53,016 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:46:53,016 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:46:53,016 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:46:53,016 INFO L82 PathProgramCache]: Analyzing trace with hash -1441289202, now seen corresponding path program 1 times [2019-12-07 14:46:53,016 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:46:53,016 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1144827313] [2019-12-07 14:46:53,016 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:46:53,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:46:53,072 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:46:53,072 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1144827313] [2019-12-07 14:46:53,072 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:46:53,072 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 14:46:53,072 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1380198119] [2019-12-07 14:46:53,072 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:46:53,073 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:46:53,073 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:46:53,073 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:46:53,073 INFO L87 Difference]: Start difference. First operand 8442 states and 22424 transitions. Second operand 5 states. [2019-12-07 14:46:53,443 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:46:53,443 INFO L93 Difference]: Finished difference Result 11734 states and 31207 transitions. [2019-12-07 14:46:53,444 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 14:46:53,444 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 54 [2019-12-07 14:46:53,444 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:46:53,453 INFO L225 Difference]: With dead ends: 11734 [2019-12-07 14:46:53,453 INFO L226 Difference]: Without dead ends: 11734 [2019-12-07 14:46:53,453 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:46:53,482 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11734 states. [2019-12-07 14:46:53,566 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11734 to 11005. [2019-12-07 14:46:53,566 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11005 states. [2019-12-07 14:46:53,579 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11005 states to 11005 states and 29403 transitions. [2019-12-07 14:46:53,579 INFO L78 Accepts]: Start accepts. Automaton has 11005 states and 29403 transitions. Word has length 54 [2019-12-07 14:46:53,579 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:46:53,579 INFO L462 AbstractCegarLoop]: Abstraction has 11005 states and 29403 transitions. [2019-12-07 14:46:53,579 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:46:53,580 INFO L276 IsEmpty]: Start isEmpty. Operand 11005 states and 29403 transitions. [2019-12-07 14:46:53,591 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 14:46:53,591 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:46:53,592 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:46:53,592 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:46:53,592 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:46:53,592 INFO L82 PathProgramCache]: Analyzing trace with hash 1169985536, now seen corresponding path program 2 times [2019-12-07 14:46:53,592 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:46:53,592 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1368699237] [2019-12-07 14:46:53,592 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:46:53,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:46:53,657 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:46:53,657 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1368699237] [2019-12-07 14:46:53,657 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:46:53,657 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 14:46:53,657 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [243775308] [2019-12-07 14:46:53,657 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:46:53,658 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:46:53,658 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:46:53,658 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:46:53,658 INFO L87 Difference]: Start difference. First operand 11005 states and 29403 transitions. Second operand 6 states. [2019-12-07 14:46:54,212 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:46:54,212 INFO L93 Difference]: Finished difference Result 18250 states and 48577 transitions. [2019-12-07 14:46:54,212 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 14:46:54,212 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 54 [2019-12-07 14:46:54,213 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:46:54,228 INFO L225 Difference]: With dead ends: 18250 [2019-12-07 14:46:54,228 INFO L226 Difference]: Without dead ends: 18250 [2019-12-07 14:46:54,229 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:46:54,266 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18250 states. [2019-12-07 14:46:54,391 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18250 to 12652. [2019-12-07 14:46:54,391 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12652 states. [2019-12-07 14:46:54,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12652 states to 12652 states and 33959 transitions. [2019-12-07 14:46:54,409 INFO L78 Accepts]: Start accepts. Automaton has 12652 states and 33959 transitions. Word has length 54 [2019-12-07 14:46:54,409 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:46:54,409 INFO L462 AbstractCegarLoop]: Abstraction has 12652 states and 33959 transitions. [2019-12-07 14:46:54,409 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:46:54,409 INFO L276 IsEmpty]: Start isEmpty. Operand 12652 states and 33959 transitions. [2019-12-07 14:46:54,424 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 14:46:54,424 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:46:54,424 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:46:54,424 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:46:54,424 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:46:54,424 INFO L82 PathProgramCache]: Analyzing trace with hash 1890509034, now seen corresponding path program 3 times [2019-12-07 14:46:54,424 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:46:54,425 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1938991727] [2019-12-07 14:46:54,425 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:46:54,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:46:54,468 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:46:54,468 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1938991727] [2019-12-07 14:46:54,469 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:46:54,469 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:46:54,469 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [811547552] [2019-12-07 14:46:54,469 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:46:54,469 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:46:54,470 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:46:54,470 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:46:54,470 INFO L87 Difference]: Start difference. First operand 12652 states and 33959 transitions. Second operand 3 states. [2019-12-07 14:46:54,527 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:46:54,527 INFO L93 Difference]: Finished difference Result 12652 states and 33913 transitions. [2019-12-07 14:46:54,528 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:46:54,528 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 54 [2019-12-07 14:46:54,528 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:46:54,539 INFO L225 Difference]: With dead ends: 12652 [2019-12-07 14:46:54,539 INFO L226 Difference]: Without dead ends: 12652 [2019-12-07 14:46:54,539 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:46:54,570 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12652 states. [2019-12-07 14:46:54,658 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12652 to 11531. [2019-12-07 14:46:54,658 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11531 states. [2019-12-07 14:46:54,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11531 states to 11531 states and 30923 transitions. [2019-12-07 14:46:54,673 INFO L78 Accepts]: Start accepts. Automaton has 11531 states and 30923 transitions. Word has length 54 [2019-12-07 14:46:54,673 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:46:54,673 INFO L462 AbstractCegarLoop]: Abstraction has 11531 states and 30923 transitions. [2019-12-07 14:46:54,673 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:46:54,673 INFO L276 IsEmpty]: Start isEmpty. Operand 11531 states and 30923 transitions. [2019-12-07 14:46:54,681 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 14:46:54,681 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:46:54,681 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:46:54,682 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:46:54,682 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:46:54,682 INFO L82 PathProgramCache]: Analyzing trace with hash -368403841, now seen corresponding path program 1 times [2019-12-07 14:46:54,682 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:46:54,682 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1459440980] [2019-12-07 14:46:54,682 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:46:54,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:46:54,757 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:46:54,757 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1459440980] [2019-12-07 14:46:54,757 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:46:54,757 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:46:54,757 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [833545799] [2019-12-07 14:46:54,758 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:46:54,758 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:46:54,758 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:46:54,758 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:46:54,758 INFO L87 Difference]: Start difference. First operand 11531 states and 30923 transitions. Second operand 6 states. [2019-12-07 14:46:54,880 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:46:54,880 INFO L93 Difference]: Finished difference Result 14769 states and 40396 transitions. [2019-12-07 14:46:54,880 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 14:46:54,881 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 55 [2019-12-07 14:46:54,881 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:46:54,894 INFO L225 Difference]: With dead ends: 14769 [2019-12-07 14:46:54,894 INFO L226 Difference]: Without dead ends: 14683 [2019-12-07 14:46:54,894 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=41, Invalid=69, Unknown=0, NotChecked=0, Total=110 [2019-12-07 14:46:54,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14683 states. [2019-12-07 14:46:55,022 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14683 to 11853. [2019-12-07 14:46:55,022 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11853 states. [2019-12-07 14:46:55,036 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11853 states to 11853 states and 31724 transitions. [2019-12-07 14:46:55,036 INFO L78 Accepts]: Start accepts. Automaton has 11853 states and 31724 transitions. Word has length 55 [2019-12-07 14:46:55,037 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:46:55,037 INFO L462 AbstractCegarLoop]: Abstraction has 11853 states and 31724 transitions. [2019-12-07 14:46:55,037 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:46:55,037 INFO L276 IsEmpty]: Start isEmpty. Operand 11853 states and 31724 transitions. [2019-12-07 14:46:55,045 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 14:46:55,045 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:46:55,045 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:46:55,045 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:46:55,045 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:46:55,045 INFO L82 PathProgramCache]: Analyzing trace with hash -270455985, now seen corresponding path program 1 times [2019-12-07 14:46:55,046 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:46:55,046 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [532564707] [2019-12-07 14:46:55,046 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:46:55,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:46:55,093 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:46:55,093 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [532564707] [2019-12-07 14:46:55,093 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:46:55,093 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:46:55,093 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1571025129] [2019-12-07 14:46:55,093 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:46:55,093 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:46:55,094 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:46:55,094 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:46:55,094 INFO L87 Difference]: Start difference. First operand 11853 states and 31724 transitions. Second operand 3 states. [2019-12-07 14:46:55,120 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:46:55,120 INFO L93 Difference]: Finished difference Result 11371 states and 30042 transitions. [2019-12-07 14:46:55,121 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:46:55,121 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 55 [2019-12-07 14:46:55,121 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:46:55,129 INFO L225 Difference]: With dead ends: 11371 [2019-12-07 14:46:55,129 INFO L226 Difference]: Without dead ends: 11371 [2019-12-07 14:46:55,130 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:46:55,156 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11371 states. [2019-12-07 14:46:55,232 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11371 to 10866. [2019-12-07 14:46:55,232 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10866 states. [2019-12-07 14:46:55,245 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10866 states to 10866 states and 28655 transitions. [2019-12-07 14:46:55,245 INFO L78 Accepts]: Start accepts. Automaton has 10866 states and 28655 transitions. Word has length 55 [2019-12-07 14:46:55,245 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:46:55,245 INFO L462 AbstractCegarLoop]: Abstraction has 10866 states and 28655 transitions. [2019-12-07 14:46:55,245 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:46:55,246 INFO L276 IsEmpty]: Start isEmpty. Operand 10866 states and 28655 transitions. [2019-12-07 14:46:55,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 14:46:55,253 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:46:55,253 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:46:55,253 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:46:55,254 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:46:55,254 INFO L82 PathProgramCache]: Analyzing trace with hash 663393734, now seen corresponding path program 1 times [2019-12-07 14:46:55,254 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:46:55,254 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [771470404] [2019-12-07 14:46:55,254 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:46:55,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:46:55,286 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:46:55,286 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [771470404] [2019-12-07 14:46:55,286 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:46:55,286 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:46:55,287 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1024930082] [2019-12-07 14:46:55,287 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:46:55,287 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:46:55,287 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:46:55,287 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:46:55,287 INFO L87 Difference]: Start difference. First operand 10866 states and 28655 transitions. Second operand 5 states. [2019-12-07 14:46:55,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:46:55,315 INFO L93 Difference]: Finished difference Result 7044 states and 19990 transitions. [2019-12-07 14:46:55,315 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:46:55,316 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 56 [2019-12-07 14:46:55,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:46:55,322 INFO L225 Difference]: With dead ends: 7044 [2019-12-07 14:46:55,322 INFO L226 Difference]: Without dead ends: 7044 [2019-12-07 14:46:55,322 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:46:55,343 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7044 states. [2019-12-07 14:46:55,388 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7044 to 5229. [2019-12-07 14:46:55,388 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5229 states. [2019-12-07 14:46:55,394 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5229 states to 5229 states and 14893 transitions. [2019-12-07 14:46:55,394 INFO L78 Accepts]: Start accepts. Automaton has 5229 states and 14893 transitions. Word has length 56 [2019-12-07 14:46:55,394 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:46:55,394 INFO L462 AbstractCegarLoop]: Abstraction has 5229 states and 14893 transitions. [2019-12-07 14:46:55,394 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:46:55,394 INFO L276 IsEmpty]: Start isEmpty. Operand 5229 states and 14893 transitions. [2019-12-07 14:46:55,398 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:46:55,398 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:46:55,398 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:46:55,398 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:46:55,398 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:46:55,398 INFO L82 PathProgramCache]: Analyzing trace with hash 1474263877, now seen corresponding path program 1 times [2019-12-07 14:46:55,398 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:46:55,398 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1164099123] [2019-12-07 14:46:55,399 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:46:55,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:46:55,562 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:46:55,562 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1164099123] [2019-12-07 14:46:55,562 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:46:55,562 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 14:46:55,562 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1880275940] [2019-12-07 14:46:55,562 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 14:46:55,562 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:46:55,563 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 14:46:55,563 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=106, Unknown=0, NotChecked=0, Total=132 [2019-12-07 14:46:55,563 INFO L87 Difference]: Start difference. First operand 5229 states and 14893 transitions. Second operand 12 states. [2019-12-07 14:46:55,853 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:46:55,853 INFO L93 Difference]: Finished difference Result 9494 states and 26900 transitions. [2019-12-07 14:46:55,853 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-07 14:46:55,853 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 14:46:55,853 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:46:55,860 INFO L225 Difference]: With dead ends: 9494 [2019-12-07 14:46:55,861 INFO L226 Difference]: Without dead ends: 8718 [2019-12-07 14:46:55,861 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 53 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=72, Invalid=308, Unknown=0, NotChecked=0, Total=380 [2019-12-07 14:46:55,884 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8718 states. [2019-12-07 14:46:55,937 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8718 to 6556. [2019-12-07 14:46:55,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6556 states. [2019-12-07 14:46:55,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6556 states to 6556 states and 18547 transitions. [2019-12-07 14:46:55,945 INFO L78 Accepts]: Start accepts. Automaton has 6556 states and 18547 transitions. Word has length 67 [2019-12-07 14:46:55,946 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:46:55,946 INFO L462 AbstractCegarLoop]: Abstraction has 6556 states and 18547 transitions. [2019-12-07 14:46:55,946 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 14:46:55,946 INFO L276 IsEmpty]: Start isEmpty. Operand 6556 states and 18547 transitions. [2019-12-07 14:46:55,950 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:46:55,951 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:46:55,951 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:46:55,951 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:46:55,951 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:46:55,951 INFO L82 PathProgramCache]: Analyzing trace with hash 1772687019, now seen corresponding path program 2 times [2019-12-07 14:46:55,951 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:46:55,951 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1911335340] [2019-12-07 14:46:55,951 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:46:55,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:46:55,994 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:46:55,994 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1911335340] [2019-12-07 14:46:55,995 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:46:55,995 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:46:55,995 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [14843539] [2019-12-07 14:46:55,995 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:46:55,995 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:46:55,995 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:46:55,996 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:46:55,996 INFO L87 Difference]: Start difference. First operand 6556 states and 18547 transitions. Second operand 3 states. [2019-12-07 14:46:56,014 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:46:56,015 INFO L93 Difference]: Finished difference Result 6012 states and 16662 transitions. [2019-12-07 14:46:56,015 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:46:56,015 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-12-07 14:46:56,015 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:46:56,019 INFO L225 Difference]: With dead ends: 6012 [2019-12-07 14:46:56,020 INFO L226 Difference]: Without dead ends: 6012 [2019-12-07 14:46:56,020 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:46:56,038 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6012 states. [2019-12-07 14:46:56,078 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6012 to 5644. [2019-12-07 14:46:56,079 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5644 states. [2019-12-07 14:46:56,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5644 states to 5644 states and 15636 transitions. [2019-12-07 14:46:56,085 INFO L78 Accepts]: Start accepts. Automaton has 5644 states and 15636 transitions. Word has length 67 [2019-12-07 14:46:56,085 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:46:56,085 INFO L462 AbstractCegarLoop]: Abstraction has 5644 states and 15636 transitions. [2019-12-07 14:46:56,085 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:46:56,085 INFO L276 IsEmpty]: Start isEmpty. Operand 5644 states and 15636 transitions. [2019-12-07 14:46:56,089 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 14:46:56,090 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:46:56,090 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:46:56,090 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:46:56,090 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:46:56,090 INFO L82 PathProgramCache]: Analyzing trace with hash 15770806, now seen corresponding path program 1 times [2019-12-07 14:46:56,090 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:46:56,090 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1369773474] [2019-12-07 14:46:56,090 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:46:56,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 14:46:56,140 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 14:46:56,178 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 14:46:56,178 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 14:46:56,181 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] ULTIMATE.startENTRY-->L800: Formula: (let ((.cse0 (store |v_#valid_65| 0 0))) (and (= v_~y$mem_tmp~0_39 0) (= 0 v_~y$read_delayed_var~0.offset_7) (= 0 v_~y$r_buff0_thd3~0_110) (= v_~main$tmp_guard0~0_18 0) (= v_~weak$$choice2~0_126 0) (= 0 v_~x~0_147) (= v_~y$r_buff0_thd0~0_348 0) (= v_~y$read_delayed~0_7 0) (= v_~y$w_buff1~0_200 0) (= 0 v_~y$w_buff0~0_179) (= v_~y~0_170 0) (< 0 |v_#StackHeapBarrier_17|) (= v_~y$r_buff1_thd0~0_299 0) (= 0 |v_ULTIMATE.start_main_~#t2186~0.offset_20|) (= 0 v_~y$r_buff1_thd2~0_193) (= v_~y$r_buff0_thd1~0_223 0) (= 0 v_~__unbuffered_p2_EAX~0_33) (= |v_#valid_63| (store .cse0 |v_ULTIMATE.start_main_~#t2186~0.base_27| 1)) (= 0 v_~y$read_delayed_var~0.base_7) (= 0 v_~y$flush_delayed~0_56) (= (select .cse0 |v_ULTIMATE.start_main_~#t2186~0.base_27|) 0) (= (store |v_#length_26| |v_ULTIMATE.start_main_~#t2186~0.base_27| 4) |v_#length_25|) (= |v_#NULL.offset_5| 0) (= v_~y$w_buff1_used~0_482 0) (= 0 v_~y$r_buff1_thd3~0_211) (= 0 v_~y$r_buff0_thd2~0_114) (= |v_#memory_int_21| (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t2186~0.base_27| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t2186~0.base_27|) |v_ULTIMATE.start_main_~#t2186~0.offset_20| 0))) (= v_~__unbuffered_cnt~0_132 0) (= v_~y$w_buff0_used~0_741 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t2186~0.base_27|) (= 0 v_~weak$$choice0~0_34) (= 0 |v_#NULL.base_5|) (= v_~y$r_buff1_thd1~0_185 0) (= v_~main$tmp_guard1~0_22 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_61|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_27|, ULTIMATE.start_main_~#t2188~0.base=|v_ULTIMATE.start_main_~#t2188~0.base_19|, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_27|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_45|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_141|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_41|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_76|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_62|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_45|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_36|, ~y$mem_tmp~0=v_~y$mem_tmp~0_39, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_211, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_223, ~y$flush_delayed~0=v_~y$flush_delayed~0_56, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_33, ULTIMATE.start_main_~#t2188~0.offset=|v_ULTIMATE.start_main_~#t2188~0.offset_16|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_9|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_82|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_54|, ULTIMATE.start_main_~#t2186~0.base=|v_ULTIMATE.start_main_~#t2186~0.base_27|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_64|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_31|, ~weak$$choice0~0=v_~weak$$choice0~0_34, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_46|, ~y$w_buff1~0=v_~y$w_buff1~0_200, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_114, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_132, ULTIMATE.start_main_~#t2187~0.base=|v_ULTIMATE.start_main_~#t2187~0.base_23|, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_299, ~x~0=v_~x~0_147, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_61|, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_741, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_73|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_31|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_27|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_22, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_161|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_30|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_51|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_76|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_185, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_31|, ~y$w_buff0~0=v_~y$w_buff0~0_179, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_110, ~y~0=v_~y~0_170, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_10|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_21|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_43|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_70|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_18, ULTIMATE.start_main_~#t2187~0.offset=|v_ULTIMATE.start_main_~#t2187~0.offset_18|, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_25|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_50|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_193, ULTIMATE.start_main_~#t2186~0.offset=|v_ULTIMATE.start_main_~#t2186~0.offset_20|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_75|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_348, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_21|, ~weak$$choice2~0=v_~weak$$choice2~0_126, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_482} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t2188~0.base, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ~y$read_delayed~0, ULTIMATE.start_main_#t~ite52, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t2188~0.offset, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_~#t2186~0.base, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t2187~0.base, ~y$r_buff1_thd0~0, ~x~0, ULTIMATE.start_main_#t~nondet31, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite51, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t2187~0.offset, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_~#t2186~0.offset, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 14:46:56,182 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] P0ENTRY-->L4-3: Formula: (and (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_8 0)) (= v_~y$w_buff0_used~0_135 1) (= 2 v_~y$w_buff0~0_28) (= v_~y$w_buff0~0_29 v_~y$w_buff1~0_20) (= v_P0Thread1of1ForFork0_~arg.offset_6 |v_P0Thread1of1ForFork0_#in~arg.offset_8|) (= v_~y$w_buff1_used~0_63 v_~y$w_buff0_used~0_136) (= (ite (not (and (not (= (mod v_~y$w_buff1_used~0_63 256) 0)) (not (= (mod v_~y$w_buff0_used~0_135 256) 0)))) 1 0) |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_8 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|) (= v_P0Thread1of1ForFork0_~arg.base_6 |v_P0Thread1of1ForFork0_#in~arg.base_8|)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_8|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_136, ~y$w_buff0~0=v_~y$w_buff0~0_29, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_8|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_8|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_135, ~y$w_buff1~0=v_~y$w_buff1~0_20, ~y$w_buff0~0=v_~y$w_buff0~0_28, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_8, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_8|, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_6, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_6, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_63} AuxVars[] AssignedVars[~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 14:46:56,182 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L800-1-->L802: Formula: (and (= |v_#valid_37| (store |v_#valid_38| |v_ULTIMATE.start_main_~#t2187~0.base_11| 1)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2187~0.base_11| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2187~0.base_11|) |v_ULTIMATE.start_main_~#t2187~0.offset_10| 1)) |v_#memory_int_11|) (= |v_ULTIMATE.start_main_~#t2187~0.offset_10| 0) (not (= 0 |v_ULTIMATE.start_main_~#t2187~0.base_11|)) (= (select |v_#valid_38| |v_ULTIMATE.start_main_~#t2187~0.base_11|) 0) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t2187~0.base_11|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t2187~0.base_11| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_6|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t2187~0.offset=|v_ULTIMATE.start_main_~#t2187~0.offset_10|, ULTIMATE.start_main_~#t2187~0.base=|v_ULTIMATE.start_main_~#t2187~0.base_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet21, #valid, #memory_int, #length, ULTIMATE.start_main_~#t2187~0.offset, ULTIMATE.start_main_~#t2187~0.base] because there is no mapped edge [2019-12-07 14:46:56,182 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [804] [804] L802-1-->L804: Formula: (and (not (= |v_ULTIMATE.start_main_~#t2188~0.base_13| 0)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2188~0.base_13|) (= 0 (select |v_#valid_40| |v_ULTIMATE.start_main_~#t2188~0.base_13|)) (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t2188~0.base_13| 1)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2188~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2188~0.base_13|) |v_ULTIMATE.start_main_~#t2188~0.offset_11| 2)) |v_#memory_int_13|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t2188~0.base_13| 4)) (= |v_ULTIMATE.start_main_~#t2188~0.offset_11| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, ULTIMATE.start_main_~#t2188~0.base=|v_ULTIMATE.start_main_~#t2188~0.base_13|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|, ULTIMATE.start_main_~#t2188~0.offset=|v_ULTIMATE.start_main_~#t2188~0.offset_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_~#t2188~0.base, #valid, #memory_int, #length, ULTIMATE.start_main_~#t2188~0.offset] because there is no mapped edge [2019-12-07 14:46:56,183 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [754] [754] L741-->L741-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1196238773 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd1~0_In-1196238773 256)))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite5_Out-1196238773|) (not .cse0) (not .cse1)) (and (= ~y$w_buff0_used~0_In-1196238773 |P0Thread1of1ForFork0_#t~ite5_Out-1196238773|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1196238773, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1196238773} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-1196238773|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1196238773, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1196238773} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 14:46:56,184 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L757-2-->L757-4: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff1_thd2~0_In678672418 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In678672418 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite9_Out678672418| ~y$w_buff1~0_In678672418) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite9_Out678672418| ~y~0_In678672418)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In678672418, ~y$w_buff1~0=~y$w_buff1~0_In678672418, ~y~0=~y~0_In678672418, ~y$w_buff1_used~0=~y$w_buff1_used~0_In678672418} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In678672418, ~y$w_buff1~0=~y$w_buff1~0_In678672418, P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out678672418|, ~y~0=~y~0_In678672418, ~y$w_buff1_used~0=~y$w_buff1_used~0_In678672418} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9] because there is no mapped edge [2019-12-07 14:46:56,184 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L742-->L742-2: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In-1087341678 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd1~0_In-1087341678 256) 0)) (.cse2 (= (mod ~y$w_buff0_used~0_In-1087341678 256) 0)) (.cse3 (= 0 (mod ~y$r_buff0_thd1~0_In-1087341678 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$w_buff1_used~0_In-1087341678 |P0Thread1of1ForFork0_#t~ite6_Out-1087341678|)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out-1087341678|)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-1087341678, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1087341678, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1087341678, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1087341678} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-1087341678|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-1087341678, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1087341678, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1087341678, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1087341678} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 14:46:56,185 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L743-->L744: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-467917332 256))) (.cse2 (= (mod ~y$r_buff0_thd1~0_In-467917332 256) 0)) (.cse0 (= ~y$r_buff0_thd1~0_Out-467917332 ~y$r_buff0_thd1~0_In-467917332))) (or (and .cse0 .cse1) (and (not .cse2) (= ~y$r_buff0_thd1~0_Out-467917332 0) (not .cse1)) (and .cse2 .cse0))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-467917332, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-467917332} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-467917332, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-467917332|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_Out-467917332} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~y$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 14:46:56,185 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L744-->L744-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff1_thd1~0_In633828208 256))) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In633828208 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In633828208 256))) (.cse0 (= (mod ~y$r_buff0_thd1~0_In633828208 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite8_Out633828208|)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~y$r_buff1_thd1~0_In633828208 |P0Thread1of1ForFork0_#t~ite8_Out633828208|)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In633828208, ~y$w_buff0_used~0=~y$w_buff0_used~0_In633828208, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In633828208, ~y$w_buff1_used~0=~y$w_buff1_used~0_In633828208} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In633828208, ~y$w_buff0_used~0=~y$w_buff0_used~0_In633828208, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out633828208|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In633828208, ~y$w_buff1_used~0=~y$w_buff1_used~0_In633828208} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 14:46:56,185 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L744-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~y$r_buff1_thd1~0_50 |v_P0Thread1of1ForFork0_#t~ite8_26|) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_50, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_25|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 14:46:56,185 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L777-2-->L777-4: Formula: (let ((.cse1 (= (mod ~y$r_buff1_thd3~0_In2130400158 256) 0)) (.cse0 (= (mod ~y$w_buff1_used~0_In2130400158 256) 0))) (or (and (or .cse0 .cse1) (= ~y~0_In2130400158 |P2Thread1of1ForFork2_#t~ite15_Out2130400158|)) (and (not .cse1) (not .cse0) (= |P2Thread1of1ForFork2_#t~ite15_Out2130400158| ~y$w_buff1~0_In2130400158)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In2130400158, ~y$w_buff1~0=~y$w_buff1~0_In2130400158, ~y~0=~y~0_In2130400158, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2130400158} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In2130400158, P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out2130400158|, ~y$w_buff1~0=~y$w_buff1~0_In2130400158, ~y~0=~y~0_In2130400158, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2130400158} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 14:46:56,185 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L777-4-->L778: Formula: (= |v_P2Thread1of1ForFork2_#t~ite15_6| v_~y~0_34) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_6|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_5|, ~y~0=v_~y~0_34, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_5|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, ~y~0, P2Thread1of1ForFork2_#t~ite16] because there is no mapped edge [2019-12-07 14:46:56,186 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [714] [714] L757-4-->L758: Formula: (= |v_P1Thread1of1ForFork1_#t~ite9_6| v_~y~0_38) InVars {P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_6|} OutVars{P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_5|, P1Thread1of1ForFork1_#t~ite10=|v_P1Thread1of1ForFork1_#t~ite10_5|, ~y~0=v_~y~0_38} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10, ~y~0] because there is no mapped edge [2019-12-07 14:46:56,186 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L758-->L758-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In818850432 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In818850432 256) 0))) (or (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite11_Out818850432| 0) (not .cse1)) (and (= |P1Thread1of1ForFork1_#t~ite11_Out818850432| ~y$w_buff0_used~0_In818850432) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In818850432, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In818850432} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In818850432, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In818850432, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out818850432|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 14:46:56,186 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L759-->L759-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In-1935311656 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In-1935311656 256) 0)) (.cse2 (= 0 (mod ~y$r_buff1_thd2~0_In-1935311656 256))) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In-1935311656 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite12_Out-1935311656| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite12_Out-1935311656| ~y$w_buff1_used~0_In-1935311656) (or .cse2 .cse3)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1935311656, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1935311656, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1935311656, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1935311656} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1935311656, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1935311656, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1935311656, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-1935311656|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1935311656} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 14:46:56,186 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L760-->L760-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In1017998441 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In1017998441 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite13_Out1017998441| ~y$r_buff0_thd2~0_In1017998441) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork1_#t~ite13_Out1017998441| 0) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1017998441, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1017998441} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1017998441, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1017998441, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out1017998441|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 14:46:56,186 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L761-->L761-2: Formula: (let ((.cse3 (= (mod ~y$w_buff0_used~0_In1827735566 256) 0)) (.cse2 (= (mod ~y$r_buff0_thd2~0_In1827735566 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In1827735566 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd2~0_In1827735566 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork1_#t~ite14_Out1827735566| ~y$r_buff1_thd2~0_In1827735566)) (and (= 0 |P1Thread1of1ForFork1_#t~ite14_Out1827735566|) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1827735566, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1827735566, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1827735566, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1827735566} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1827735566, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1827735566, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1827735566, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out1827735566|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1827735566} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 14:46:56,187 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L778-->L778-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In317555308 256))) (.cse1 (= (mod ~y$r_buff0_thd3~0_In317555308 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite17_Out317555308| 0)) (and (= |P2Thread1of1ForFork2_#t~ite17_Out317555308| ~y$w_buff0_used~0_In317555308) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In317555308, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In317555308} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In317555308, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In317555308, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out317555308|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 14:46:56,187 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L779-->L779-2: Formula: (let ((.cse3 (= 0 (mod ~y$w_buff1_used~0_In-26158417 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd3~0_In-26158417 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In-26158417 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd3~0_In-26158417 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork2_#t~ite18_Out-26158417|)) (and (or .cse3 .cse2) (= ~y$w_buff1_used~0_In-26158417 |P2Thread1of1ForFork2_#t~ite18_Out-26158417|) (or .cse1 .cse0)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-26158417, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-26158417, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-26158417, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-26158417} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-26158417, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-26158417, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-26158417, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out-26158417|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-26158417} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 14:46:56,187 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] L761-2-->P1EXIT: Formula: (and (= v_~__unbuffered_cnt~0_71 (+ v_~__unbuffered_cnt~0_72 1)) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~y$r_buff1_thd2~0_135 |v_P1Thread1of1ForFork1_#t~ite14_40|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_72, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_40|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_135, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_39|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 14:46:56,187 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L780-->L780-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In1849167119 256))) (.cse1 (= (mod ~y$r_buff0_thd3~0_In1849167119 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite19_Out1849167119| ~y$r_buff0_thd3~0_In1849167119) (or .cse0 .cse1)) (and (= 0 |P2Thread1of1ForFork2_#t~ite19_Out1849167119|) (not .cse0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1849167119, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1849167119} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1849167119, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1849167119, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out1849167119|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 14:46:56,187 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L781-->L781-2: Formula: (let ((.cse3 (= (mod ~y$r_buff1_thd3~0_In-1516791296 256) 0)) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In-1516791296 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-1516791296 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1516791296 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite20_Out-1516791296| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse1 .cse0) (= |P2Thread1of1ForFork2_#t~ite20_Out-1516791296| ~y$r_buff1_thd3~0_In-1516791296)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1516791296, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1516791296, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1516791296, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1516791296} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1516791296, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1516791296, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out-1516791296|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1516791296, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1516791296} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 14:46:56,188 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [793] [793] L781-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_66 1) v_~__unbuffered_cnt~0_65) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= |v_P2Thread1of1ForFork2_#t~ite20_34| v_~y$r_buff1_thd3~0_132)) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_132, P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_33|, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_65, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~y$r_buff1_thd3~0, P2Thread1of1ForFork2_#t~ite20, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 14:46:56,188 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L804-1-->L810: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_18) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_18} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_18, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 14:46:56,188 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L810-2-->L810-5: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd0~0_In380518494 256) 0)) (.cse1 (= (mod ~y$w_buff1_used~0_In380518494 256) 0)) (.cse2 (= |ULTIMATE.start_main_#t~ite25_Out380518494| |ULTIMATE.start_main_#t~ite24_Out380518494|))) (or (and (or .cse0 .cse1) .cse2 (= |ULTIMATE.start_main_#t~ite24_Out380518494| ~y~0_In380518494)) (and (= |ULTIMATE.start_main_#t~ite24_Out380518494| ~y$w_buff1~0_In380518494) (not .cse0) (not .cse1) .cse2))) InVars {~y$w_buff1~0=~y$w_buff1~0_In380518494, ~y~0=~y~0_In380518494, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In380518494, ~y$w_buff1_used~0=~y$w_buff1_used~0_In380518494} OutVars{~y$w_buff1~0=~y$w_buff1~0_In380518494, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out380518494|, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out380518494|, ~y~0=~y~0_In380518494, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In380518494, ~y$w_buff1_used~0=~y$w_buff1_used~0_In380518494} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 14:46:56,188 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L811-->L811-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In-2049357052 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-2049357052 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-2049357052 |ULTIMATE.start_main_#t~ite26_Out-2049357052|)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite26_Out-2049357052| 0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-2049357052, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2049357052} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-2049357052, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2049357052, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out-2049357052|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 14:46:56,189 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L812-->L812-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In1085758617 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In1085758617 256) 0)) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In1085758617 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd0~0_In1085758617 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite27_Out1085758617| ~y$w_buff1_used~0_In1085758617) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |ULTIMATE.start_main_#t~ite27_Out1085758617| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1085758617, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1085758617, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1085758617, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1085758617} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1085758617, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1085758617, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out1085758617|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1085758617, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1085758617} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 14:46:56,189 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] L813-->L813-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1752548247 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-1752548247 256)))) (or (and (= |ULTIMATE.start_main_#t~ite28_Out-1752548247| 0) (not .cse0) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite28_Out-1752548247| ~y$r_buff0_thd0~0_In-1752548247) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1752548247, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1752548247} OutVars{ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out-1752548247|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1752548247, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1752548247} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 14:46:56,189 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [751] [751] L814-->L814-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In1135190977 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In1135190977 256) 0)) (.cse3 (= (mod ~y$w_buff0_used~0_In1135190977 256) 0)) (.cse2 (= (mod ~y$r_buff0_thd0~0_In1135190977 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite29_Out1135190977| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite29_Out1135190977| ~y$r_buff1_thd0~0_In1135190977) (or .cse3 .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1135190977, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1135190977, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1135190977, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1135190977} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1135190977, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out1135190977|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1135190977, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1135190977, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1135190977} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 14:46:56,190 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L823-->L823-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1426245972 256)))) (or (and (= |ULTIMATE.start_main_#t~ite39_Out-1426245972| ~y$w_buff1~0_In-1426245972) (not .cse0) (= |ULTIMATE.start_main_#t~ite38_In-1426245972| |ULTIMATE.start_main_#t~ite38_Out-1426245972|)) (and (= |ULTIMATE.start_main_#t~ite39_Out-1426245972| |ULTIMATE.start_main_#t~ite38_Out-1426245972|) (= |ULTIMATE.start_main_#t~ite38_Out-1426245972| ~y$w_buff1~0_In-1426245972) .cse0 (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-1426245972 256)))) (or (= (mod ~y$w_buff0_used~0_In-1426245972 256) 0) (and .cse1 (= (mod ~y$w_buff1_used~0_In-1426245972 256) 0)) (and (= (mod ~y$r_buff1_thd0~0_In-1426245972 256) 0) .cse1)))))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1426245972, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1426245972, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1426245972, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In-1426245972|, ~weak$$choice2~0=~weak$$choice2~0_In-1426245972, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1426245972, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1426245972} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-1426245972, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1426245972, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out-1426245972|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1426245972, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out-1426245972|, ~weak$$choice2~0=~weak$$choice2~0_In-1426245972, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1426245972, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1426245972} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-12-07 14:46:56,191 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [809] [809] L824-->L824-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In2043449778 256) 0))) (or (and .cse0 (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In2043449778 256) 0))) (or (and .cse1 (= 0 (mod ~y$r_buff1_thd0~0_In2043449778 256))) (= (mod ~y$w_buff0_used~0_In2043449778 256) 0) (and (= (mod ~y$w_buff1_used~0_In2043449778 256) 0) .cse1))) (= |ULTIMATE.start_main_#t~ite42_Out2043449778| |ULTIMATE.start_main_#t~ite41_Out2043449778|) (= |ULTIMATE.start_main_#t~ite41_Out2043449778| ~y$w_buff0_used~0_In2043449778)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite42_Out2043449778| ~y$w_buff0_used~0_In2043449778) (= |ULTIMATE.start_main_#t~ite41_In2043449778| |ULTIMATE.start_main_#t~ite41_Out2043449778|)))) InVars {ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_In2043449778|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2043449778, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2043449778, ~weak$$choice2~0=~weak$$choice2~0_In2043449778, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2043449778, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2043449778} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out2043449778|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2043449778, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2043449778, ~weak$$choice2~0=~weak$$choice2~0_In2043449778, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out2043449778|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2043449778, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2043449778} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 14:46:56,191 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [736] [736] L826-->L827: Formula: (and (= v_~y$r_buff0_thd0~0_133 v_~y$r_buff0_thd0~0_132) (not (= 0 (mod v_~weak$$choice2~0_33 256)))) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_133, ~weak$$choice2~0=v_~weak$$choice2~0_33} OutVars{~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_132, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_22|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_13|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_8|, ~weak$$choice2~0=v_~weak$$choice2~0_33} AuxVars[] AssignedVars[~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 14:46:56,192 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] L829-->L832-1: Formula: (and (not (= (mod v_~y$flush_delayed~0_45 256) 0)) (= 0 v_~y$flush_delayed~0_44) (= v_~y~0_135 v_~y$mem_tmp~0_33) (= (mod v_~main$tmp_guard1~0_13 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_33, ~y$flush_delayed~0=v_~y$flush_delayed~0_45, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_13} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_22|, ~y$mem_tmp~0=v_~y$mem_tmp~0_33, ~y$flush_delayed~0=v_~y$flush_delayed~0_44, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_13, ~y~0=v_~y~0_135, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ~y$flush_delayed~0, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 14:46:56,192 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L832-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 14:46:56,251 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 02:46:56 BasicIcfg [2019-12-07 14:46:56,252 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 14:46:56,252 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 14:46:56,252 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 14:46:56,252 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 14:46:56,252 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:46:12" (3/4) ... [2019-12-07 14:46:56,254 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 14:46:56,254 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] ULTIMATE.startENTRY-->L800: Formula: (let ((.cse0 (store |v_#valid_65| 0 0))) (and (= v_~y$mem_tmp~0_39 0) (= 0 v_~y$read_delayed_var~0.offset_7) (= 0 v_~y$r_buff0_thd3~0_110) (= v_~main$tmp_guard0~0_18 0) (= v_~weak$$choice2~0_126 0) (= 0 v_~x~0_147) (= v_~y$r_buff0_thd0~0_348 0) (= v_~y$read_delayed~0_7 0) (= v_~y$w_buff1~0_200 0) (= 0 v_~y$w_buff0~0_179) (= v_~y~0_170 0) (< 0 |v_#StackHeapBarrier_17|) (= v_~y$r_buff1_thd0~0_299 0) (= 0 |v_ULTIMATE.start_main_~#t2186~0.offset_20|) (= 0 v_~y$r_buff1_thd2~0_193) (= v_~y$r_buff0_thd1~0_223 0) (= 0 v_~__unbuffered_p2_EAX~0_33) (= |v_#valid_63| (store .cse0 |v_ULTIMATE.start_main_~#t2186~0.base_27| 1)) (= 0 v_~y$read_delayed_var~0.base_7) (= 0 v_~y$flush_delayed~0_56) (= (select .cse0 |v_ULTIMATE.start_main_~#t2186~0.base_27|) 0) (= (store |v_#length_26| |v_ULTIMATE.start_main_~#t2186~0.base_27| 4) |v_#length_25|) (= |v_#NULL.offset_5| 0) (= v_~y$w_buff1_used~0_482 0) (= 0 v_~y$r_buff1_thd3~0_211) (= 0 v_~y$r_buff0_thd2~0_114) (= |v_#memory_int_21| (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t2186~0.base_27| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t2186~0.base_27|) |v_ULTIMATE.start_main_~#t2186~0.offset_20| 0))) (= v_~__unbuffered_cnt~0_132 0) (= v_~y$w_buff0_used~0_741 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t2186~0.base_27|) (= 0 v_~weak$$choice0~0_34) (= 0 |v_#NULL.base_5|) (= v_~y$r_buff1_thd1~0_185 0) (= v_~main$tmp_guard1~0_22 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_61|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_27|, ULTIMATE.start_main_~#t2188~0.base=|v_ULTIMATE.start_main_~#t2188~0.base_19|, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_27|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_45|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_141|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_41|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_76|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_62|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_45|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_36|, ~y$mem_tmp~0=v_~y$mem_tmp~0_39, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_211, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_223, ~y$flush_delayed~0=v_~y$flush_delayed~0_56, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_33, ULTIMATE.start_main_~#t2188~0.offset=|v_ULTIMATE.start_main_~#t2188~0.offset_16|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_9|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_82|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_54|, ULTIMATE.start_main_~#t2186~0.base=|v_ULTIMATE.start_main_~#t2186~0.base_27|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_64|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_31|, ~weak$$choice0~0=v_~weak$$choice0~0_34, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_46|, ~y$w_buff1~0=v_~y$w_buff1~0_200, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_114, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_132, ULTIMATE.start_main_~#t2187~0.base=|v_ULTIMATE.start_main_~#t2187~0.base_23|, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_299, ~x~0=v_~x~0_147, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_61|, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_741, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_73|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_31|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_27|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_22, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_161|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_30|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_51|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_76|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_185, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_31|, ~y$w_buff0~0=v_~y$w_buff0~0_179, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_110, ~y~0=v_~y~0_170, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_10|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_21|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_43|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_70|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_18, ULTIMATE.start_main_~#t2187~0.offset=|v_ULTIMATE.start_main_~#t2187~0.offset_18|, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_25|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_50|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_193, ULTIMATE.start_main_~#t2186~0.offset=|v_ULTIMATE.start_main_~#t2186~0.offset_20|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_75|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_348, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_21|, ~weak$$choice2~0=v_~weak$$choice2~0_126, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_482} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t2188~0.base, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ~y$read_delayed~0, ULTIMATE.start_main_#t~ite52, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t2188~0.offset, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_~#t2186~0.base, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t2187~0.base, ~y$r_buff1_thd0~0, ~x~0, ULTIMATE.start_main_#t~nondet31, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite51, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t2187~0.offset, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_~#t2186~0.offset, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 14:46:56,254 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] P0ENTRY-->L4-3: Formula: (and (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_8 0)) (= v_~y$w_buff0_used~0_135 1) (= 2 v_~y$w_buff0~0_28) (= v_~y$w_buff0~0_29 v_~y$w_buff1~0_20) (= v_P0Thread1of1ForFork0_~arg.offset_6 |v_P0Thread1of1ForFork0_#in~arg.offset_8|) (= v_~y$w_buff1_used~0_63 v_~y$w_buff0_used~0_136) (= (ite (not (and (not (= (mod v_~y$w_buff1_used~0_63 256) 0)) (not (= (mod v_~y$w_buff0_used~0_135 256) 0)))) 1 0) |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_8 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|) (= v_P0Thread1of1ForFork0_~arg.base_6 |v_P0Thread1of1ForFork0_#in~arg.base_8|)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_8|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_136, ~y$w_buff0~0=v_~y$w_buff0~0_29, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_8|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_8|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_135, ~y$w_buff1~0=v_~y$w_buff1~0_20, ~y$w_buff0~0=v_~y$w_buff0~0_28, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_8, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_8|, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_6, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_6, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_63} AuxVars[] AssignedVars[~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 14:46:56,255 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L800-1-->L802: Formula: (and (= |v_#valid_37| (store |v_#valid_38| |v_ULTIMATE.start_main_~#t2187~0.base_11| 1)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2187~0.base_11| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2187~0.base_11|) |v_ULTIMATE.start_main_~#t2187~0.offset_10| 1)) |v_#memory_int_11|) (= |v_ULTIMATE.start_main_~#t2187~0.offset_10| 0) (not (= 0 |v_ULTIMATE.start_main_~#t2187~0.base_11|)) (= (select |v_#valid_38| |v_ULTIMATE.start_main_~#t2187~0.base_11|) 0) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t2187~0.base_11|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t2187~0.base_11| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_6|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t2187~0.offset=|v_ULTIMATE.start_main_~#t2187~0.offset_10|, ULTIMATE.start_main_~#t2187~0.base=|v_ULTIMATE.start_main_~#t2187~0.base_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet21, #valid, #memory_int, #length, ULTIMATE.start_main_~#t2187~0.offset, ULTIMATE.start_main_~#t2187~0.base] because there is no mapped edge [2019-12-07 14:46:56,255 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [804] [804] L802-1-->L804: Formula: (and (not (= |v_ULTIMATE.start_main_~#t2188~0.base_13| 0)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2188~0.base_13|) (= 0 (select |v_#valid_40| |v_ULTIMATE.start_main_~#t2188~0.base_13|)) (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t2188~0.base_13| 1)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2188~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2188~0.base_13|) |v_ULTIMATE.start_main_~#t2188~0.offset_11| 2)) |v_#memory_int_13|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t2188~0.base_13| 4)) (= |v_ULTIMATE.start_main_~#t2188~0.offset_11| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, ULTIMATE.start_main_~#t2188~0.base=|v_ULTIMATE.start_main_~#t2188~0.base_13|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_13|, #length=|v_#length_17|, ULTIMATE.start_main_~#t2188~0.offset=|v_ULTIMATE.start_main_~#t2188~0.offset_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_~#t2188~0.base, #valid, #memory_int, #length, ULTIMATE.start_main_~#t2188~0.offset] because there is no mapped edge [2019-12-07 14:46:56,255 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [754] [754] L741-->L741-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1196238773 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd1~0_In-1196238773 256)))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite5_Out-1196238773|) (not .cse0) (not .cse1)) (and (= ~y$w_buff0_used~0_In-1196238773 |P0Thread1of1ForFork0_#t~ite5_Out-1196238773|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1196238773, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1196238773} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-1196238773|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1196238773, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1196238773} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 14:46:56,256 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L757-2-->L757-4: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff1_thd2~0_In678672418 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In678672418 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite9_Out678672418| ~y$w_buff1~0_In678672418) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite9_Out678672418| ~y~0_In678672418)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In678672418, ~y$w_buff1~0=~y$w_buff1~0_In678672418, ~y~0=~y~0_In678672418, ~y$w_buff1_used~0=~y$w_buff1_used~0_In678672418} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In678672418, ~y$w_buff1~0=~y$w_buff1~0_In678672418, P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out678672418|, ~y~0=~y~0_In678672418, ~y$w_buff1_used~0=~y$w_buff1_used~0_In678672418} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9] because there is no mapped edge [2019-12-07 14:46:56,256 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L742-->L742-2: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In-1087341678 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd1~0_In-1087341678 256) 0)) (.cse2 (= (mod ~y$w_buff0_used~0_In-1087341678 256) 0)) (.cse3 (= 0 (mod ~y$r_buff0_thd1~0_In-1087341678 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$w_buff1_used~0_In-1087341678 |P0Thread1of1ForFork0_#t~ite6_Out-1087341678|)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out-1087341678|)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-1087341678, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1087341678, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1087341678, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1087341678} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-1087341678|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-1087341678, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1087341678, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1087341678, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1087341678} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 14:46:56,256 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L743-->L744: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-467917332 256))) (.cse2 (= (mod ~y$r_buff0_thd1~0_In-467917332 256) 0)) (.cse0 (= ~y$r_buff0_thd1~0_Out-467917332 ~y$r_buff0_thd1~0_In-467917332))) (or (and .cse0 .cse1) (and (not .cse2) (= ~y$r_buff0_thd1~0_Out-467917332 0) (not .cse1)) (and .cse2 .cse0))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-467917332, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-467917332} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-467917332, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-467917332|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_Out-467917332} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~y$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 14:46:56,257 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L744-->L744-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff1_thd1~0_In633828208 256))) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In633828208 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In633828208 256))) (.cse0 (= (mod ~y$r_buff0_thd1~0_In633828208 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite8_Out633828208|)) (and (or .cse2 .cse3) (or .cse1 .cse0) (= ~y$r_buff1_thd1~0_In633828208 |P0Thread1of1ForFork0_#t~ite8_Out633828208|)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In633828208, ~y$w_buff0_used~0=~y$w_buff0_used~0_In633828208, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In633828208, ~y$w_buff1_used~0=~y$w_buff1_used~0_In633828208} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In633828208, ~y$w_buff0_used~0=~y$w_buff0_used~0_In633828208, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out633828208|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In633828208, ~y$w_buff1_used~0=~y$w_buff1_used~0_In633828208} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 14:46:56,257 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L744-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~y$r_buff1_thd1~0_50 |v_P0Thread1of1ForFork0_#t~ite8_26|) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_50, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_25|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 14:46:56,257 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L777-2-->L777-4: Formula: (let ((.cse1 (= (mod ~y$r_buff1_thd3~0_In2130400158 256) 0)) (.cse0 (= (mod ~y$w_buff1_used~0_In2130400158 256) 0))) (or (and (or .cse0 .cse1) (= ~y~0_In2130400158 |P2Thread1of1ForFork2_#t~ite15_Out2130400158|)) (and (not .cse1) (not .cse0) (= |P2Thread1of1ForFork2_#t~ite15_Out2130400158| ~y$w_buff1~0_In2130400158)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In2130400158, ~y$w_buff1~0=~y$w_buff1~0_In2130400158, ~y~0=~y~0_In2130400158, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2130400158} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In2130400158, P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out2130400158|, ~y$w_buff1~0=~y$w_buff1~0_In2130400158, ~y~0=~y~0_In2130400158, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2130400158} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 14:46:56,257 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L777-4-->L778: Formula: (= |v_P2Thread1of1ForFork2_#t~ite15_6| v_~y~0_34) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_6|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_5|, ~y~0=v_~y~0_34, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_5|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, ~y~0, P2Thread1of1ForFork2_#t~ite16] because there is no mapped edge [2019-12-07 14:46:56,257 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [714] [714] L757-4-->L758: Formula: (= |v_P1Thread1of1ForFork1_#t~ite9_6| v_~y~0_38) InVars {P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_6|} OutVars{P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_5|, P1Thread1of1ForFork1_#t~ite10=|v_P1Thread1of1ForFork1_#t~ite10_5|, ~y~0=v_~y~0_38} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10, ~y~0] because there is no mapped edge [2019-12-07 14:46:56,257 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L758-->L758-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In818850432 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In818850432 256) 0))) (or (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite11_Out818850432| 0) (not .cse1)) (and (= |P1Thread1of1ForFork1_#t~ite11_Out818850432| ~y$w_buff0_used~0_In818850432) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In818850432, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In818850432} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In818850432, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In818850432, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out818850432|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 14:46:56,258 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L759-->L759-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In-1935311656 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In-1935311656 256) 0)) (.cse2 (= 0 (mod ~y$r_buff1_thd2~0_In-1935311656 256))) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In-1935311656 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite12_Out-1935311656| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite12_Out-1935311656| ~y$w_buff1_used~0_In-1935311656) (or .cse2 .cse3)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1935311656, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1935311656, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1935311656, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1935311656} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1935311656, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1935311656, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1935311656, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-1935311656|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1935311656} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 14:46:56,258 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L760-->L760-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In1017998441 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In1017998441 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite13_Out1017998441| ~y$r_buff0_thd2~0_In1017998441) (or .cse0 .cse1)) (and (= |P1Thread1of1ForFork1_#t~ite13_Out1017998441| 0) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1017998441, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1017998441} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1017998441, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1017998441, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out1017998441|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 14:46:56,258 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L761-->L761-2: Formula: (let ((.cse3 (= (mod ~y$w_buff0_used~0_In1827735566 256) 0)) (.cse2 (= (mod ~y$r_buff0_thd2~0_In1827735566 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In1827735566 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd2~0_In1827735566 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork1_#t~ite14_Out1827735566| ~y$r_buff1_thd2~0_In1827735566)) (and (= 0 |P1Thread1of1ForFork1_#t~ite14_Out1827735566|) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1827735566, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1827735566, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1827735566, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1827735566} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1827735566, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1827735566, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1827735566, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out1827735566|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1827735566} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 14:46:56,258 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L778-->L778-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In317555308 256))) (.cse1 (= (mod ~y$r_buff0_thd3~0_In317555308 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite17_Out317555308| 0)) (and (= |P2Thread1of1ForFork2_#t~ite17_Out317555308| ~y$w_buff0_used~0_In317555308) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In317555308, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In317555308} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In317555308, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In317555308, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out317555308|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 14:46:56,258 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L779-->L779-2: Formula: (let ((.cse3 (= 0 (mod ~y$w_buff1_used~0_In-26158417 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd3~0_In-26158417 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In-26158417 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd3~0_In-26158417 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork2_#t~ite18_Out-26158417|)) (and (or .cse3 .cse2) (= ~y$w_buff1_used~0_In-26158417 |P2Thread1of1ForFork2_#t~ite18_Out-26158417|) (or .cse1 .cse0)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-26158417, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-26158417, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-26158417, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-26158417} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-26158417, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-26158417, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-26158417, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out-26158417|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-26158417} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 14:46:56,259 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] L761-2-->P1EXIT: Formula: (and (= v_~__unbuffered_cnt~0_71 (+ v_~__unbuffered_cnt~0_72 1)) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~y$r_buff1_thd2~0_135 |v_P1Thread1of1ForFork1_#t~ite14_40|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_72, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_40|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_135, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_39|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 14:46:56,259 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L780-->L780-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In1849167119 256))) (.cse1 (= (mod ~y$r_buff0_thd3~0_In1849167119 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite19_Out1849167119| ~y$r_buff0_thd3~0_In1849167119) (or .cse0 .cse1)) (and (= 0 |P2Thread1of1ForFork2_#t~ite19_Out1849167119|) (not .cse0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1849167119, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1849167119} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1849167119, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1849167119, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out1849167119|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 14:46:56,259 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L781-->L781-2: Formula: (let ((.cse3 (= (mod ~y$r_buff1_thd3~0_In-1516791296 256) 0)) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In-1516791296 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-1516791296 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1516791296 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite20_Out-1516791296| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse1 .cse0) (= |P2Thread1of1ForFork2_#t~ite20_Out-1516791296| ~y$r_buff1_thd3~0_In-1516791296)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1516791296, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1516791296, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1516791296, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1516791296} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1516791296, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1516791296, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out-1516791296|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1516791296, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1516791296} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 14:46:56,259 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [793] [793] L781-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_66 1) v_~__unbuffered_cnt~0_65) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= |v_P2Thread1of1ForFork2_#t~ite20_34| v_~y$r_buff1_thd3~0_132)) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_132, P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_33|, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_65, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~y$r_buff1_thd3~0, P2Thread1of1ForFork2_#t~ite20, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 14:46:56,259 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L804-1-->L810: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_18) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_18} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_18, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 14:46:56,259 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L810-2-->L810-5: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd0~0_In380518494 256) 0)) (.cse1 (= (mod ~y$w_buff1_used~0_In380518494 256) 0)) (.cse2 (= |ULTIMATE.start_main_#t~ite25_Out380518494| |ULTIMATE.start_main_#t~ite24_Out380518494|))) (or (and (or .cse0 .cse1) .cse2 (= |ULTIMATE.start_main_#t~ite24_Out380518494| ~y~0_In380518494)) (and (= |ULTIMATE.start_main_#t~ite24_Out380518494| ~y$w_buff1~0_In380518494) (not .cse0) (not .cse1) .cse2))) InVars {~y$w_buff1~0=~y$w_buff1~0_In380518494, ~y~0=~y~0_In380518494, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In380518494, ~y$w_buff1_used~0=~y$w_buff1_used~0_In380518494} OutVars{~y$w_buff1~0=~y$w_buff1~0_In380518494, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out380518494|, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out380518494|, ~y~0=~y~0_In380518494, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In380518494, ~y$w_buff1_used~0=~y$w_buff1_used~0_In380518494} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 14:46:56,260 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L811-->L811-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In-2049357052 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-2049357052 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-2049357052 |ULTIMATE.start_main_#t~ite26_Out-2049357052|)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite26_Out-2049357052| 0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-2049357052, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2049357052} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-2049357052, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-2049357052, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out-2049357052|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 14:46:56,260 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L812-->L812-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In1085758617 256) 0)) (.cse0 (= (mod ~y$w_buff0_used~0_In1085758617 256) 0)) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In1085758617 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd0~0_In1085758617 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite27_Out1085758617| ~y$w_buff1_used~0_In1085758617) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |ULTIMATE.start_main_#t~ite27_Out1085758617| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1085758617, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1085758617, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1085758617, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1085758617} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1085758617, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1085758617, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out1085758617|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1085758617, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1085758617} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 14:46:56,260 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] L813-->L813-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1752548247 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-1752548247 256)))) (or (and (= |ULTIMATE.start_main_#t~ite28_Out-1752548247| 0) (not .cse0) (not .cse1)) (and (= |ULTIMATE.start_main_#t~ite28_Out-1752548247| ~y$r_buff0_thd0~0_In-1752548247) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1752548247, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1752548247} OutVars{ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out-1752548247|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1752548247, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1752548247} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 14:46:56,261 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [751] [751] L814-->L814-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In1135190977 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In1135190977 256) 0)) (.cse3 (= (mod ~y$w_buff0_used~0_In1135190977 256) 0)) (.cse2 (= (mod ~y$r_buff0_thd0~0_In1135190977 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite29_Out1135190977| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite29_Out1135190977| ~y$r_buff1_thd0~0_In1135190977) (or .cse3 .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1135190977, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1135190977, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1135190977, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1135190977} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1135190977, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out1135190977|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1135190977, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1135190977, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1135190977} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 14:46:56,262 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L823-->L823-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1426245972 256)))) (or (and (= |ULTIMATE.start_main_#t~ite39_Out-1426245972| ~y$w_buff1~0_In-1426245972) (not .cse0) (= |ULTIMATE.start_main_#t~ite38_In-1426245972| |ULTIMATE.start_main_#t~ite38_Out-1426245972|)) (and (= |ULTIMATE.start_main_#t~ite39_Out-1426245972| |ULTIMATE.start_main_#t~ite38_Out-1426245972|) (= |ULTIMATE.start_main_#t~ite38_Out-1426245972| ~y$w_buff1~0_In-1426245972) .cse0 (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-1426245972 256)))) (or (= (mod ~y$w_buff0_used~0_In-1426245972 256) 0) (and .cse1 (= (mod ~y$w_buff1_used~0_In-1426245972 256) 0)) (and (= (mod ~y$r_buff1_thd0~0_In-1426245972 256) 0) .cse1)))))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-1426245972, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1426245972, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1426245972, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In-1426245972|, ~weak$$choice2~0=~weak$$choice2~0_In-1426245972, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1426245972, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1426245972} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-1426245972, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1426245972, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out-1426245972|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1426245972, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out-1426245972|, ~weak$$choice2~0=~weak$$choice2~0_In-1426245972, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1426245972, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1426245972} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-12-07 14:46:56,262 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [809] [809] L824-->L824-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In2043449778 256) 0))) (or (and .cse0 (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In2043449778 256) 0))) (or (and .cse1 (= 0 (mod ~y$r_buff1_thd0~0_In2043449778 256))) (= (mod ~y$w_buff0_used~0_In2043449778 256) 0) (and (= (mod ~y$w_buff1_used~0_In2043449778 256) 0) .cse1))) (= |ULTIMATE.start_main_#t~ite42_Out2043449778| |ULTIMATE.start_main_#t~ite41_Out2043449778|) (= |ULTIMATE.start_main_#t~ite41_Out2043449778| ~y$w_buff0_used~0_In2043449778)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite42_Out2043449778| ~y$w_buff0_used~0_In2043449778) (= |ULTIMATE.start_main_#t~ite41_In2043449778| |ULTIMATE.start_main_#t~ite41_Out2043449778|)))) InVars {ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_In2043449778|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2043449778, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2043449778, ~weak$$choice2~0=~weak$$choice2~0_In2043449778, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2043449778, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2043449778} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out2043449778|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2043449778, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2043449778, ~weak$$choice2~0=~weak$$choice2~0_In2043449778, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out2043449778|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2043449778, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2043449778} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 14:46:56,263 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [736] [736] L826-->L827: Formula: (and (= v_~y$r_buff0_thd0~0_133 v_~y$r_buff0_thd0~0_132) (not (= 0 (mod v_~weak$$choice2~0_33 256)))) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_133, ~weak$$choice2~0=v_~weak$$choice2~0_33} OutVars{~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_132, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_22|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_13|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_8|, ~weak$$choice2~0=v_~weak$$choice2~0_33} AuxVars[] AssignedVars[~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 14:46:56,263 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] L829-->L832-1: Formula: (and (not (= (mod v_~y$flush_delayed~0_45 256) 0)) (= 0 v_~y$flush_delayed~0_44) (= v_~y~0_135 v_~y$mem_tmp~0_33) (= (mod v_~main$tmp_guard1~0_13 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_33, ~y$flush_delayed~0=v_~y$flush_delayed~0_45, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_13} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_22|, ~y$mem_tmp~0=v_~y$mem_tmp~0_33, ~y$flush_delayed~0=v_~y$flush_delayed~0_44, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_13, ~y~0=v_~y~0_135, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ~y$flush_delayed~0, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 14:46:56,263 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L832-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 14:46:56,314 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_4b1a9b72-d6ac-4917-9887-2b01f778d1b6/bin/uautomizer/witness.graphml [2019-12-07 14:46:56,314 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 14:46:56,316 INFO L168 Benchmark]: Toolchain (without parser) took 44483.35 ms. Allocated memory was 1.0 GB in the beginning and 5.0 GB in the end (delta: 4.0 GB). Free memory was 935.5 MB in the beginning and 2.3 GB in the end (delta: -1.3 GB). Peak memory consumption was 2.6 GB. Max. memory is 11.5 GB. [2019-12-07 14:46:56,316 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 955.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 14:46:56,316 INFO L168 Benchmark]: CACSL2BoogieTranslator took 368.34 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 102.2 MB). Free memory was 935.5 MB in the beginning and 1.1 GB in the end (delta: -133.5 MB). Peak memory consumption was 18.1 MB. Max. memory is 11.5 GB. [2019-12-07 14:46:56,316 INFO L168 Benchmark]: Boogie Procedure Inliner took 40.89 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 14:46:56,316 INFO L168 Benchmark]: Boogie Preprocessor took 25.80 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 14:46:56,317 INFO L168 Benchmark]: RCFGBuilder took 409.50 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.2 MB). Peak memory consumption was 55.2 MB. Max. memory is 11.5 GB. [2019-12-07 14:46:56,317 INFO L168 Benchmark]: TraceAbstraction took 43571.30 ms. Allocated memory was 1.1 GB in the beginning and 5.0 GB in the end (delta: 3.9 GB). Free memory was 1.0 GB in the beginning and 2.3 GB in the end (delta: -1.3 GB). Peak memory consumption was 2.6 GB. Max. memory is 11.5 GB. [2019-12-07 14:46:56,317 INFO L168 Benchmark]: Witness Printer took 62.77 ms. Allocated memory is still 5.0 GB. Free memory was 2.3 GB in the beginning and 2.3 GB in the end (delta: 15.0 MB). Peak memory consumption was 15.0 MB. Max. memory is 11.5 GB. [2019-12-07 14:46:56,319 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 955.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 368.34 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 102.2 MB). Free memory was 935.5 MB in the beginning and 1.1 GB in the end (delta: -133.5 MB). Peak memory consumption was 18.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 40.89 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.80 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 409.50 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.2 MB). Peak memory consumption was 55.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 43571.30 ms. Allocated memory was 1.1 GB in the beginning and 5.0 GB in the end (delta: 3.9 GB). Free memory was 1.0 GB in the beginning and 2.3 GB in the end (delta: -1.3 GB). Peak memory consumption was 2.6 GB. Max. memory is 11.5 GB. * Witness Printer took 62.77 ms. Allocated memory is still 5.0 GB. Free memory was 2.3 GB in the beginning and 2.3 GB in the end (delta: 15.0 MB). Peak memory consumption was 15.0 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.0s, 173 ProgramPointsBefore, 94 ProgramPointsAfterwards, 210 TransitionsBefore, 104 TransitionsAfterwards, 17114 CoEnabledTransitionPairs, 7 FixpointIterations, 30 TrivialSequentialCompositions, 44 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 39 ConcurrentYvCompositions, 31 ChoiceCompositions, 5882 VarBasedMoverChecksPositive, 246 VarBasedMoverChecksNegative, 66 SemBasedMoverChecksPositive, 253 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.7s, 0 MoverChecksTotal, 78185 CheckedPairsTotal, 113 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L800] FCALL, FORK 0 pthread_create(&t2186, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L730] 1 y$r_buff1_thd0 = y$r_buff0_thd0 [L731] 1 y$r_buff1_thd1 = y$r_buff0_thd1 [L732] 1 y$r_buff1_thd2 = y$r_buff0_thd2 [L733] 1 y$r_buff1_thd3 = y$r_buff0_thd3 [L734] 1 y$r_buff0_thd1 = (_Bool)1 [L737] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L740] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L802] FCALL, FORK 0 pthread_create(&t2187, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L740] 1 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L804] FCALL, FORK 0 pthread_create(&t2188, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L754] 2 x = 2 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L757] 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L741] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L742] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L771] 3 __unbuffered_p2_EAX = x [L774] 3 y = 1 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2] [L777] 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2] [L758] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L759] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L760] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L778] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L779] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L780] 3 y$r_buff0_thd3 = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 [L810] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L810] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L811] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L812] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L813] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L814] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L817] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L818] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L819] 0 y$flush_delayed = weak$$choice2 [L820] 0 y$mem_tmp = y VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L821] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L821] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L822] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L822] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L823] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L824] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L825] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L825] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L827] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L827] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L828] 0 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p2_EAX == 2) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 164 locations, 2 error locations. Result: UNSAFE, OverallTime: 43.4s, OverallIterations: 19, TraceHistogramMax: 1, AutomataDifference: 9.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 3541 SDtfs, 3351 SDslu, 7404 SDs, 0 SdLazy, 4297 SolverSat, 172 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 146 GetRequests, 19 SyntacticMatches, 25 SemanticMatches, 102 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 203 ImplicationChecksByTransitivity, 0.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=156321occurred in iteration=2, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 16.8s AutomataMinimizationTime, 18 MinimizatonAttempts, 63012 StatesRemovedByMinimization, 16 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.8s InterpolantComputationTime, 781 NumberOfCodeBlocks, 781 NumberOfCodeBlocksAsserted, 19 NumberOfCheckSat, 695 ConstructedInterpolants, 0 QuantifiedInterpolants, 127058 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 18 InterpolantComputations, 18 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...