./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe017_rmo.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_e59791a4-5d50-485b-b4de-55f5f94caf92/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_e59791a4-5d50-485b-b4de-55f5f94caf92/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_e59791a4-5d50-485b-b4de-55f5f94caf92/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_e59791a4-5d50-485b-b4de-55f5f94caf92/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe017_rmo.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_e59791a4-5d50-485b-b4de-55f5f94caf92/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_e59791a4-5d50-485b-b4de-55f5f94caf92/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash f97541c9c79f18734581380cdf6b78b15351b29d ....................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 14:04:19,237 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 14:04:19,238 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 14:04:19,245 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 14:04:19,245 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 14:04:19,246 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 14:04:19,247 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 14:04:19,248 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 14:04:19,250 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 14:04:19,251 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 14:04:19,251 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 14:04:19,252 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 14:04:19,252 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 14:04:19,253 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 14:04:19,254 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 14:04:19,255 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 14:04:19,255 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 14:04:19,256 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 14:04:19,257 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 14:04:19,258 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 14:04:19,259 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 14:04:19,260 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 14:04:19,261 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 14:04:19,261 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 14:04:19,263 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 14:04:19,263 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 14:04:19,263 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 14:04:19,263 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 14:04:19,264 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 14:04:19,264 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 14:04:19,264 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 14:04:19,265 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 14:04:19,265 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 14:04:19,265 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 14:04:19,266 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 14:04:19,266 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 14:04:19,267 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 14:04:19,267 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 14:04:19,267 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 14:04:19,267 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 14:04:19,268 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 14:04:19,268 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_e59791a4-5d50-485b-b4de-55f5f94caf92/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 14:04:19,278 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 14:04:19,278 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 14:04:19,279 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 14:04:19,279 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 14:04:19,279 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 14:04:19,279 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 14:04:19,279 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 14:04:19,279 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 14:04:19,280 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 14:04:19,280 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 14:04:19,280 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 14:04:19,280 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 14:04:19,280 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 14:04:19,280 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 14:04:19,280 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 14:04:19,280 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 14:04:19,280 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 14:04:19,281 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 14:04:19,281 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 14:04:19,281 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 14:04:19,281 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 14:04:19,281 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 14:04:19,281 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 14:04:19,281 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 14:04:19,282 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 14:04:19,282 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 14:04:19,282 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 14:04:19,282 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 14:04:19,282 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 14:04:19,282 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_e59791a4-5d50-485b-b4de-55f5f94caf92/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> f97541c9c79f18734581380cdf6b78b15351b29d [2019-12-07 14:04:19,383 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 14:04:19,393 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 14:04:19,396 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 14:04:19,397 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 14:04:19,398 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 14:04:19,398 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_e59791a4-5d50-485b-b4de-55f5f94caf92/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe017_rmo.oepc.i [2019-12-07 14:04:19,443 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_e59791a4-5d50-485b-b4de-55f5f94caf92/bin/uautomizer/data/0a0346bba/3fe7be036ad647979d1bfee29c10776f/FLAG8daf3e918 [2019-12-07 14:04:19,919 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 14:04:19,919 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_e59791a4-5d50-485b-b4de-55f5f94caf92/sv-benchmarks/c/pthread-wmm/safe017_rmo.oepc.i [2019-12-07 14:04:19,928 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_e59791a4-5d50-485b-b4de-55f5f94caf92/bin/uautomizer/data/0a0346bba/3fe7be036ad647979d1bfee29c10776f/FLAG8daf3e918 [2019-12-07 14:04:20,420 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_e59791a4-5d50-485b-b4de-55f5f94caf92/bin/uautomizer/data/0a0346bba/3fe7be036ad647979d1bfee29c10776f [2019-12-07 14:04:20,422 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 14:04:20,423 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 14:04:20,424 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 14:04:20,424 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 14:04:20,426 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 14:04:20,426 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 02:04:20" (1/1) ... [2019-12-07 14:04:20,428 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4a374d02 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:04:20, skipping insertion in model container [2019-12-07 14:04:20,428 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 02:04:20" (1/1) ... [2019-12-07 14:04:20,433 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 14:04:20,460 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 14:04:20,699 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 14:04:20,707 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 14:04:20,751 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 14:04:20,797 INFO L208 MainTranslator]: Completed translation [2019-12-07 14:04:20,797 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:04:20 WrapperNode [2019-12-07 14:04:20,798 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 14:04:20,798 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 14:04:20,798 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 14:04:20,798 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 14:04:20,804 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:04:20" (1/1) ... [2019-12-07 14:04:20,818 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:04:20" (1/1) ... [2019-12-07 14:04:20,840 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 14:04:20,841 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 14:04:20,841 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 14:04:20,841 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 14:04:20,847 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:04:20" (1/1) ... [2019-12-07 14:04:20,848 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:04:20" (1/1) ... [2019-12-07 14:04:20,851 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:04:20" (1/1) ... [2019-12-07 14:04:20,851 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:04:20" (1/1) ... [2019-12-07 14:04:20,858 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:04:20" (1/1) ... [2019-12-07 14:04:20,861 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:04:20" (1/1) ... [2019-12-07 14:04:20,864 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:04:20" (1/1) ... [2019-12-07 14:04:20,867 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 14:04:20,868 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 14:04:20,868 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 14:04:20,868 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 14:04:20,868 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:04:20" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_e59791a4-5d50-485b-b4de-55f5f94caf92/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 14:04:20,911 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 14:04:20,911 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 14:04:20,912 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 14:04:20,912 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 14:04:20,912 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 14:04:20,912 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 14:04:20,912 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 14:04:20,912 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 14:04:20,912 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 14:04:20,912 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 14:04:20,912 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 14:04:20,912 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 14:04:20,912 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 14:04:20,914 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 14:04:21,282 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 14:04:21,282 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 14:04:21,283 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:04:21 BoogieIcfgContainer [2019-12-07 14:04:21,283 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 14:04:21,284 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 14:04:21,284 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 14:04:21,286 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 14:04:21,287 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 02:04:20" (1/3) ... [2019-12-07 14:04:21,287 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6fda16a6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 02:04:21, skipping insertion in model container [2019-12-07 14:04:21,288 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:04:20" (2/3) ... [2019-12-07 14:04:21,288 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6fda16a6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 02:04:21, skipping insertion in model container [2019-12-07 14:04:21,288 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:04:21" (3/3) ... [2019-12-07 14:04:21,289 INFO L109 eAbstractionObserver]: Analyzing ICFG safe017_rmo.oepc.i [2019-12-07 14:04:21,298 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 14:04:21,298 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 14:04:21,305 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 14:04:21,305 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 14:04:21,328 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,329 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,329 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,329 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,329 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,329 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,329 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,329 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,330 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,330 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,330 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,330 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,330 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,330 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,330 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,331 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,331 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,331 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,331 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,331 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,331 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,331 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,331 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,331 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,332 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,332 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,332 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,332 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,332 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,332 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,332 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,332 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,332 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,333 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,333 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,333 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,333 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,333 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,333 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,333 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,334 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,334 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,334 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,334 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,334 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,334 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,334 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,334 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,334 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,335 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,335 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,335 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,335 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,335 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,335 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,335 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,335 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,335 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,336 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,336 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,336 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,336 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,336 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,336 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,336 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,337 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,337 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,337 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,337 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,337 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,337 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,337 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,337 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,337 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,338 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,338 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,338 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,338 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,338 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,338 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,338 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,338 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,338 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,338 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,339 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,339 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,339 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,339 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,339 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,339 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,339 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,339 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,339 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,340 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:04:21,350 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 14:04:21,363 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 14:04:21,363 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 14:04:21,363 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 14:04:21,364 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 14:04:21,364 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 14:04:21,364 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 14:04:21,364 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 14:04:21,364 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 14:04:21,375 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 173 places, 210 transitions [2019-12-07 14:04:21,376 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 173 places, 210 transitions [2019-12-07 14:04:21,429 INFO L134 PetriNetUnfolder]: 47/207 cut-off events. [2019-12-07 14:04:21,429 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 14:04:21,440 INFO L76 FinitePrefix]: Finished finitePrefix Result has 217 conditions, 207 events. 47/207 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 585 event pairs. 9/167 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 14:04:21,454 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 173 places, 210 transitions [2019-12-07 14:04:21,483 INFO L134 PetriNetUnfolder]: 47/207 cut-off events. [2019-12-07 14:04:21,483 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 14:04:21,488 INFO L76 FinitePrefix]: Finished finitePrefix Result has 217 conditions, 207 events. 47/207 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 585 event pairs. 9/167 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 14:04:21,503 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 17114 [2019-12-07 14:04:21,504 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 14:04:24,336 WARN L192 SmtUtils]: Spent 125.00 ms on a formula simplification. DAG size of input: 85 DAG size of output: 83 [2019-12-07 14:04:24,417 INFO L206 etLargeBlockEncoding]: Checked pairs total: 78185 [2019-12-07 14:04:24,417 INFO L214 etLargeBlockEncoding]: Total number of compositions: 113 [2019-12-07 14:04:24,419 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 94 places, 104 transitions [2019-12-07 14:04:37,643 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 112926 states. [2019-12-07 14:04:37,645 INFO L276 IsEmpty]: Start isEmpty. Operand 112926 states. [2019-12-07 14:04:37,648 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 14:04:37,648 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:04:37,649 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 14:04:37,649 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:04:37,653 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:04:37,653 INFO L82 PathProgramCache]: Analyzing trace with hash 844394, now seen corresponding path program 1 times [2019-12-07 14:04:37,658 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:04:37,658 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [519730595] [2019-12-07 14:04:37,658 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:04:37,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:04:37,801 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:04:37,801 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [519730595] [2019-12-07 14:04:37,802 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:04:37,802 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 14:04:37,803 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1048507318] [2019-12-07 14:04:37,806 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:04:37,806 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:04:37,815 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:04:37,815 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:04:37,816 INFO L87 Difference]: Start difference. First operand 112926 states. Second operand 3 states. [2019-12-07 14:04:38,514 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:04:38,515 INFO L93 Difference]: Finished difference Result 112536 states and 479624 transitions. [2019-12-07 14:04:38,516 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:04:38,517 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 14:04:38,517 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:04:39,058 INFO L225 Difference]: With dead ends: 112536 [2019-12-07 14:04:39,058 INFO L226 Difference]: Without dead ends: 110184 [2019-12-07 14:04:39,059 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:04:43,973 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110184 states. [2019-12-07 14:04:45,443 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110184 to 110184. [2019-12-07 14:04:45,444 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 110184 states. [2019-12-07 14:04:45,925 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110184 states to 110184 states and 470020 transitions. [2019-12-07 14:04:45,926 INFO L78 Accepts]: Start accepts. Automaton has 110184 states and 470020 transitions. Word has length 3 [2019-12-07 14:04:45,926 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:04:45,926 INFO L462 AbstractCegarLoop]: Abstraction has 110184 states and 470020 transitions. [2019-12-07 14:04:45,926 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:04:45,926 INFO L276 IsEmpty]: Start isEmpty. Operand 110184 states and 470020 transitions. [2019-12-07 14:04:45,930 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 14:04:45,930 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:04:45,931 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:04:45,931 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:04:45,931 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:04:45,931 INFO L82 PathProgramCache]: Analyzing trace with hash -418531443, now seen corresponding path program 1 times [2019-12-07 14:04:45,931 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:04:45,932 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1757001563] [2019-12-07 14:04:45,932 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:04:45,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:04:46,016 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:04:46,017 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1757001563] [2019-12-07 14:04:46,017 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:04:46,017 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:04:46,017 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1625219720] [2019-12-07 14:04:46,018 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:04:46,018 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:04:46,019 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:04:46,019 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:04:46,019 INFO L87 Difference]: Start difference. First operand 110184 states and 470020 transitions. Second operand 4 states. [2019-12-07 14:04:46,904 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:04:46,904 INFO L93 Difference]: Finished difference Result 172298 states and 706272 transitions. [2019-12-07 14:04:46,904 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:04:46,904 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 14:04:46,904 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:04:47,355 INFO L225 Difference]: With dead ends: 172298 [2019-12-07 14:04:47,355 INFO L226 Difference]: Without dead ends: 172249 [2019-12-07 14:04:47,356 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:04:51,920 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172249 states. [2019-12-07 14:04:55,807 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172249 to 156321. [2019-12-07 14:04:55,807 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156321 states. [2019-12-07 14:04:56,436 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156321 states to 156321 states and 647667 transitions. [2019-12-07 14:04:56,437 INFO L78 Accepts]: Start accepts. Automaton has 156321 states and 647667 transitions. Word has length 11 [2019-12-07 14:04:56,437 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:04:56,437 INFO L462 AbstractCegarLoop]: Abstraction has 156321 states and 647667 transitions. [2019-12-07 14:04:56,437 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:04:56,437 INFO L276 IsEmpty]: Start isEmpty. Operand 156321 states and 647667 transitions. [2019-12-07 14:04:56,440 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 14:04:56,440 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:04:56,440 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:04:56,441 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:04:56,441 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:04:56,441 INFO L82 PathProgramCache]: Analyzing trace with hash -986312255, now seen corresponding path program 1 times [2019-12-07 14:04:56,441 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:04:56,441 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [117985811] [2019-12-07 14:04:56,441 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:04:56,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:04:56,498 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:04:56,498 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [117985811] [2019-12-07 14:04:56,498 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:04:56,498 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:04:56,498 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [974319791] [2019-12-07 14:04:56,499 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:04:56,499 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:04:56,499 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:04:56,499 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:04:56,499 INFO L87 Difference]: Start difference. First operand 156321 states and 647667 transitions. Second operand 4 states. [2019-12-07 14:04:57,441 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:04:57,441 INFO L93 Difference]: Finished difference Result 198223 states and 807102 transitions. [2019-12-07 14:04:57,442 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:04:57,442 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 14:04:57,442 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:04:57,955 INFO L225 Difference]: With dead ends: 198223 [2019-12-07 14:04:57,955 INFO L226 Difference]: Without dead ends: 198223 [2019-12-07 14:04:57,955 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:05:02,797 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 198223 states. [2019-12-07 14:05:07,269 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 198223 to 177721. [2019-12-07 14:05:07,270 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177721 states. [2019-12-07 14:05:07,788 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177721 states to 177721 states and 730453 transitions. [2019-12-07 14:05:07,788 INFO L78 Accepts]: Start accepts. Automaton has 177721 states and 730453 transitions. Word has length 13 [2019-12-07 14:05:07,789 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:07,789 INFO L462 AbstractCegarLoop]: Abstraction has 177721 states and 730453 transitions. [2019-12-07 14:05:07,789 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:05:07,789 INFO L276 IsEmpty]: Start isEmpty. Operand 177721 states and 730453 transitions. [2019-12-07 14:05:07,791 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 14:05:07,791 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:07,791 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:07,791 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:07,792 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:07,792 INFO L82 PathProgramCache]: Analyzing trace with hash -1176456771, now seen corresponding path program 1 times [2019-12-07 14:05:07,792 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:07,792 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [728078576] [2019-12-07 14:05:07,792 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:07,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:07,846 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:07,846 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [728078576] [2019-12-07 14:05:07,846 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:07,847 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:05:07,847 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1141522197] [2019-12-07 14:05:07,847 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:05:07,847 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:07,847 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:05:07,847 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:05:07,848 INFO L87 Difference]: Start difference. First operand 177721 states and 730453 transitions. Second operand 4 states. [2019-12-07 14:05:09,520 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:09,521 INFO L93 Difference]: Finished difference Result 245470 states and 990922 transitions. [2019-12-07 14:05:09,521 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:05:09,521 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 14:05:09,522 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:10,146 INFO L225 Difference]: With dead ends: 245470 [2019-12-07 14:05:10,146 INFO L226 Difference]: Without dead ends: 245407 [2019-12-07 14:05:10,146 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:05:15,272 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 245407 states. [2019-12-07 14:05:18,574 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 245407 to 199120. [2019-12-07 14:05:18,574 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 199120 states. [2019-12-07 14:05:19,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 199120 states to 199120 states and 817885 transitions. [2019-12-07 14:05:19,396 INFO L78 Accepts]: Start accepts. Automaton has 199120 states and 817885 transitions. Word has length 13 [2019-12-07 14:05:19,396 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:19,396 INFO L462 AbstractCegarLoop]: Abstraction has 199120 states and 817885 transitions. [2019-12-07 14:05:19,396 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:05:19,396 INFO L276 IsEmpty]: Start isEmpty. Operand 199120 states and 817885 transitions. [2019-12-07 14:05:19,412 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 14:05:19,412 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:19,412 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:19,413 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:19,413 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:19,413 INFO L82 PathProgramCache]: Analyzing trace with hash -1822366328, now seen corresponding path program 1 times [2019-12-07 14:05:19,413 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:19,413 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1701439860] [2019-12-07 14:05:19,413 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:19,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:19,446 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:19,446 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1701439860] [2019-12-07 14:05:19,446 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:19,446 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:05:19,447 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1709808213] [2019-12-07 14:05:19,447 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:05:19,447 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:19,447 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:05:19,447 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:05:19,447 INFO L87 Difference]: Start difference. First operand 199120 states and 817885 transitions. Second operand 3 states. [2019-12-07 14:05:19,553 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:19,553 INFO L93 Difference]: Finished difference Result 37631 states and 121166 transitions. [2019-12-07 14:05:19,554 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:05:19,554 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 14:05:19,554 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:19,606 INFO L225 Difference]: With dead ends: 37631 [2019-12-07 14:05:19,606 INFO L226 Difference]: Without dead ends: 37631 [2019-12-07 14:05:19,606 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:05:19,779 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37631 states. [2019-12-07 14:05:20,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37631 to 37631. [2019-12-07 14:05:20,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37631 states. [2019-12-07 14:05:20,209 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37631 states to 37631 states and 121166 transitions. [2019-12-07 14:05:20,209 INFO L78 Accepts]: Start accepts. Automaton has 37631 states and 121166 transitions. Word has length 19 [2019-12-07 14:05:20,210 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:20,210 INFO L462 AbstractCegarLoop]: Abstraction has 37631 states and 121166 transitions. [2019-12-07 14:05:20,210 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:05:20,210 INFO L276 IsEmpty]: Start isEmpty. Operand 37631 states and 121166 transitions. [2019-12-07 14:05:20,213 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 14:05:20,213 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:20,213 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:20,213 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:20,213 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:20,213 INFO L82 PathProgramCache]: Analyzing trace with hash -2012510844, now seen corresponding path program 1 times [2019-12-07 14:05:20,213 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:20,213 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2113319625] [2019-12-07 14:05:20,213 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:20,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:20,267 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:20,267 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2113319625] [2019-12-07 14:05:20,267 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:20,268 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:05:20,268 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1491516482] [2019-12-07 14:05:20,268 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:05:20,268 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:20,268 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:05:20,268 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:05:20,268 INFO L87 Difference]: Start difference. First operand 37631 states and 121166 transitions. Second operand 5 states. [2019-12-07 14:05:20,777 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:20,777 INFO L93 Difference]: Finished difference Result 50788 states and 160280 transitions. [2019-12-07 14:05:20,778 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 14:05:20,778 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 14:05:20,778 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:20,857 INFO L225 Difference]: With dead ends: 50788 [2019-12-07 14:05:20,857 INFO L226 Difference]: Without dead ends: 50775 [2019-12-07 14:05:20,858 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:05:21,063 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50775 states. [2019-12-07 14:05:21,490 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50775 to 38059. [2019-12-07 14:05:21,491 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38059 states. [2019-12-07 14:05:21,553 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38059 states to 38059 states and 122380 transitions. [2019-12-07 14:05:21,554 INFO L78 Accepts]: Start accepts. Automaton has 38059 states and 122380 transitions. Word has length 19 [2019-12-07 14:05:21,554 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:21,554 INFO L462 AbstractCegarLoop]: Abstraction has 38059 states and 122380 transitions. [2019-12-07 14:05:21,554 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:05:21,554 INFO L276 IsEmpty]: Start isEmpty. Operand 38059 states and 122380 transitions. [2019-12-07 14:05:21,560 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 14:05:21,560 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:21,560 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:21,560 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:21,560 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:21,560 INFO L82 PathProgramCache]: Analyzing trace with hash -394195806, now seen corresponding path program 1 times [2019-12-07 14:05:21,560 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:21,561 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [532797612] [2019-12-07 14:05:21,561 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:21,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:21,604 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:21,604 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [532797612] [2019-12-07 14:05:21,605 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:21,605 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:05:21,605 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [256303055] [2019-12-07 14:05:21,605 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:05:21,605 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:21,605 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:05:21,606 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:05:21,606 INFO L87 Difference]: Start difference. First operand 38059 states and 122380 transitions. Second operand 4 states. [2019-12-07 14:05:21,637 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:21,638 INFO L93 Difference]: Finished difference Result 7382 states and 20162 transitions. [2019-12-07 14:05:21,638 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 14:05:21,638 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2019-12-07 14:05:21,638 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:21,645 INFO L225 Difference]: With dead ends: 7382 [2019-12-07 14:05:21,645 INFO L226 Difference]: Without dead ends: 7382 [2019-12-07 14:05:21,646 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:05:21,669 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7382 states. [2019-12-07 14:05:21,721 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7382 to 7270. [2019-12-07 14:05:21,721 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7270 states. [2019-12-07 14:05:21,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7270 states to 7270 states and 19842 transitions. [2019-12-07 14:05:21,730 INFO L78 Accepts]: Start accepts. Automaton has 7270 states and 19842 transitions. Word has length 25 [2019-12-07 14:05:21,730 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:21,730 INFO L462 AbstractCegarLoop]: Abstraction has 7270 states and 19842 transitions. [2019-12-07 14:05:21,730 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:05:21,730 INFO L276 IsEmpty]: Start isEmpty. Operand 7270 states and 19842 transitions. [2019-12-07 14:05:21,737 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-12-07 14:05:21,737 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:21,737 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:21,737 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:21,737 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:21,737 INFO L82 PathProgramCache]: Analyzing trace with hash 56145512, now seen corresponding path program 1 times [2019-12-07 14:05:21,737 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:21,737 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1477804212] [2019-12-07 14:05:21,737 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:21,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:22,073 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:22,074 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1477804212] [2019-12-07 14:05:22,074 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:22,074 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 14:05:22,074 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1502314481] [2019-12-07 14:05:22,074 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 14:05:22,074 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:22,074 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 14:05:22,075 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2019-12-07 14:05:22,075 INFO L87 Difference]: Start difference. First operand 7270 states and 19842 transitions. Second operand 8 states. [2019-12-07 14:05:22,589 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:22,589 INFO L93 Difference]: Finished difference Result 8364 states and 22172 transitions. [2019-12-07 14:05:22,589 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 14:05:22,589 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 37 [2019-12-07 14:05:22,590 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:22,597 INFO L225 Difference]: With dead ends: 8364 [2019-12-07 14:05:22,597 INFO L226 Difference]: Without dead ends: 8364 [2019-12-07 14:05:22,598 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 37 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=72, Invalid=200, Unknown=0, NotChecked=0, Total=272 [2019-12-07 14:05:22,623 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8364 states. [2019-12-07 14:05:22,678 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8364 to 7743. [2019-12-07 14:05:22,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7743 states. [2019-12-07 14:05:22,687 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7743 states to 7743 states and 20803 transitions. [2019-12-07 14:05:22,687 INFO L78 Accepts]: Start accepts. Automaton has 7743 states and 20803 transitions. Word has length 37 [2019-12-07 14:05:22,687 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:22,687 INFO L462 AbstractCegarLoop]: Abstraction has 7743 states and 20803 transitions. [2019-12-07 14:05:22,687 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 14:05:22,687 INFO L276 IsEmpty]: Start isEmpty. Operand 7743 states and 20803 transitions. [2019-12-07 14:05:22,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-12-07 14:05:22,696 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:22,696 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:22,696 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:22,696 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:22,696 INFO L82 PathProgramCache]: Analyzing trace with hash -2110715921, now seen corresponding path program 1 times [2019-12-07 14:05:22,696 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:22,696 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1873379456] [2019-12-07 14:05:22,696 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:22,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:22,747 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:22,748 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1873379456] [2019-12-07 14:05:22,748 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:22,748 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:05:22,748 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1901647206] [2019-12-07 14:05:22,748 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:05:22,748 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:22,748 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:05:22,749 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:05:22,749 INFO L87 Difference]: Start difference. First operand 7743 states and 20803 transitions. Second operand 5 states. [2019-12-07 14:05:22,775 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:22,776 INFO L93 Difference]: Finished difference Result 5329 states and 15284 transitions. [2019-12-07 14:05:22,776 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:05:22,776 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 51 [2019-12-07 14:05:22,776 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:22,783 INFO L225 Difference]: With dead ends: 5329 [2019-12-07 14:05:22,783 INFO L226 Difference]: Without dead ends: 5329 [2019-12-07 14:05:22,783 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:05:22,810 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5329 states. [2019-12-07 14:05:22,853 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5329 to 4965. [2019-12-07 14:05:22,853 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4965 states. [2019-12-07 14:05:22,859 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4965 states to 4965 states and 14300 transitions. [2019-12-07 14:05:22,859 INFO L78 Accepts]: Start accepts. Automaton has 4965 states and 14300 transitions. Word has length 51 [2019-12-07 14:05:22,860 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:22,860 INFO L462 AbstractCegarLoop]: Abstraction has 4965 states and 14300 transitions. [2019-12-07 14:05:22,860 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:05:22,860 INFO L276 IsEmpty]: Start isEmpty. Operand 4965 states and 14300 transitions. [2019-12-07 14:05:22,866 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 14:05:22,866 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:22,866 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:22,866 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:22,866 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:22,866 INFO L82 PathProgramCache]: Analyzing trace with hash 1380306829, now seen corresponding path program 1 times [2019-12-07 14:05:22,866 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:22,866 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [514974116] [2019-12-07 14:05:22,866 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:22,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:22,902 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:22,903 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [514974116] [2019-12-07 14:05:22,903 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:22,903 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:05:22,903 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1934470430] [2019-12-07 14:05:22,903 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:05:22,903 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:22,903 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:05:22,904 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:05:22,904 INFO L87 Difference]: Start difference. First operand 4965 states and 14300 transitions. Second operand 3 states. [2019-12-07 14:05:22,943 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:22,943 INFO L93 Difference]: Finished difference Result 4979 states and 14318 transitions. [2019-12-07 14:05:22,943 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:05:22,943 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 14:05:22,943 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:22,948 INFO L225 Difference]: With dead ends: 4979 [2019-12-07 14:05:22,948 INFO L226 Difference]: Without dead ends: 4979 [2019-12-07 14:05:22,948 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:05:22,966 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4979 states. [2019-12-07 14:05:22,999 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4979 to 4975. [2019-12-07 14:05:22,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4975 states. [2019-12-07 14:05:23,005 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4975 states to 4975 states and 14314 transitions. [2019-12-07 14:05:23,005 INFO L78 Accepts]: Start accepts. Automaton has 4975 states and 14314 transitions. Word has length 65 [2019-12-07 14:05:23,006 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:23,006 INFO L462 AbstractCegarLoop]: Abstraction has 4975 states and 14314 transitions. [2019-12-07 14:05:23,006 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:05:23,006 INFO L276 IsEmpty]: Start isEmpty. Operand 4975 states and 14314 transitions. [2019-12-07 14:05:23,011 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 14:05:23,011 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:23,011 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:23,011 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:23,011 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:23,012 INFO L82 PathProgramCache]: Analyzing trace with hash 1838424094, now seen corresponding path program 1 times [2019-12-07 14:05:23,012 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:23,012 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1282970286] [2019-12-07 14:05:23,012 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:23,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:23,071 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:23,072 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1282970286] [2019-12-07 14:05:23,072 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:23,072 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:05:23,072 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1727388204] [2019-12-07 14:05:23,072 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:05:23,072 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:23,072 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:05:23,073 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:05:23,073 INFO L87 Difference]: Start difference. First operand 4975 states and 14314 transitions. Second operand 3 states. [2019-12-07 14:05:23,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:23,090 INFO L93 Difference]: Finished difference Result 4687 states and 13265 transitions. [2019-12-07 14:05:23,090 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:05:23,090 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 14:05:23,090 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:23,094 INFO L225 Difference]: With dead ends: 4687 [2019-12-07 14:05:23,094 INFO L226 Difference]: Without dead ends: 4687 [2019-12-07 14:05:23,094 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:05:23,111 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4687 states. [2019-12-07 14:05:23,142 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4687 to 4687. [2019-12-07 14:05:23,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4687 states. [2019-12-07 14:05:23,147 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4687 states to 4687 states and 13265 transitions. [2019-12-07 14:05:23,148 INFO L78 Accepts]: Start accepts. Automaton has 4687 states and 13265 transitions. Word has length 65 [2019-12-07 14:05:23,148 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:23,148 INFO L462 AbstractCegarLoop]: Abstraction has 4687 states and 13265 transitions. [2019-12-07 14:05:23,148 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:05:23,148 INFO L276 IsEmpty]: Start isEmpty. Operand 4687 states and 13265 transitions. [2019-12-07 14:05:23,153 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 14:05:23,153 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:23,153 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:23,153 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:23,153 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:23,153 INFO L82 PathProgramCache]: Analyzing trace with hash -707320023, now seen corresponding path program 1 times [2019-12-07 14:05:23,153 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:23,153 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1979972076] [2019-12-07 14:05:23,153 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:23,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:23,208 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:23,208 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1979972076] [2019-12-07 14:05:23,209 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:23,209 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 14:05:23,209 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [478516680] [2019-12-07 14:05:23,209 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:05:23,209 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:23,209 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:05:23,209 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:05:23,209 INFO L87 Difference]: Start difference. First operand 4687 states and 13265 transitions. Second operand 5 states. [2019-12-07 14:05:23,380 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:23,380 INFO L93 Difference]: Finished difference Result 7111 states and 19996 transitions. [2019-12-07 14:05:23,380 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 14:05:23,380 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 66 [2019-12-07 14:05:23,380 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:23,386 INFO L225 Difference]: With dead ends: 7111 [2019-12-07 14:05:23,386 INFO L226 Difference]: Without dead ends: 7111 [2019-12-07 14:05:23,386 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:05:23,407 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7111 states. [2019-12-07 14:05:23,455 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7111 to 6141. [2019-12-07 14:05:23,455 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6141 states. [2019-12-07 14:05:23,462 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6141 states to 6141 states and 17329 transitions. [2019-12-07 14:05:23,462 INFO L78 Accepts]: Start accepts. Automaton has 6141 states and 17329 transitions. Word has length 66 [2019-12-07 14:05:23,462 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:23,462 INFO L462 AbstractCegarLoop]: Abstraction has 6141 states and 17329 transitions. [2019-12-07 14:05:23,463 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:05:23,463 INFO L276 IsEmpty]: Start isEmpty. Operand 6141 states and 17329 transitions. [2019-12-07 14:05:23,469 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 14:05:23,469 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:23,469 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:23,469 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:23,470 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:23,470 INFO L82 PathProgramCache]: Analyzing trace with hash 429063715, now seen corresponding path program 2 times [2019-12-07 14:05:23,470 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:23,470 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [408840046] [2019-12-07 14:05:23,470 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:23,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:23,521 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:23,522 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [408840046] [2019-12-07 14:05:23,522 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:23,522 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 14:05:23,522 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [425977705] [2019-12-07 14:05:23,522 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:05:23,522 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:23,522 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:05:23,523 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:05:23,523 INFO L87 Difference]: Start difference. First operand 6141 states and 17329 transitions. Second operand 5 states. [2019-12-07 14:05:23,732 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:23,733 INFO L93 Difference]: Finished difference Result 8720 states and 24408 transitions. [2019-12-07 14:05:23,733 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 14:05:23,733 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 66 [2019-12-07 14:05:23,733 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:23,740 INFO L225 Difference]: With dead ends: 8720 [2019-12-07 14:05:23,741 INFO L226 Difference]: Without dead ends: 8720 [2019-12-07 14:05:23,741 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:05:23,765 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8720 states. [2019-12-07 14:05:23,827 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8720 to 6792. [2019-12-07 14:05:23,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6792 states. [2019-12-07 14:05:23,835 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6792 states to 6792 states and 19218 transitions. [2019-12-07 14:05:23,835 INFO L78 Accepts]: Start accepts. Automaton has 6792 states and 19218 transitions. Word has length 66 [2019-12-07 14:05:23,835 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:23,835 INFO L462 AbstractCegarLoop]: Abstraction has 6792 states and 19218 transitions. [2019-12-07 14:05:23,835 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:05:23,835 INFO L276 IsEmpty]: Start isEmpty. Operand 6792 states and 19218 transitions. [2019-12-07 14:05:23,843 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 14:05:23,843 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:23,843 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:23,843 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:23,843 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:23,843 INFO L82 PathProgramCache]: Analyzing trace with hash -2071652769, now seen corresponding path program 3 times [2019-12-07 14:05:23,843 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:23,844 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [66210951] [2019-12-07 14:05:23,844 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:23,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:23,915 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:23,915 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [66210951] [2019-12-07 14:05:23,915 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:23,915 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 14:05:23,915 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [421540141] [2019-12-07 14:05:23,916 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:05:23,916 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:23,916 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:05:23,916 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:05:23,916 INFO L87 Difference]: Start difference. First operand 6792 states and 19218 transitions. Second operand 6 states. [2019-12-07 14:05:24,232 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:24,233 INFO L93 Difference]: Finished difference Result 9694 states and 27022 transitions. [2019-12-07 14:05:24,233 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 14:05:24,233 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 66 [2019-12-07 14:05:24,233 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:24,241 INFO L225 Difference]: With dead ends: 9694 [2019-12-07 14:05:24,241 INFO L226 Difference]: Without dead ends: 9694 [2019-12-07 14:05:24,241 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-07 14:05:24,266 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9694 states. [2019-12-07 14:05:24,333 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9694 to 7219. [2019-12-07 14:05:24,333 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7219 states. [2019-12-07 14:05:24,342 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7219 states to 7219 states and 20408 transitions. [2019-12-07 14:05:24,342 INFO L78 Accepts]: Start accepts. Automaton has 7219 states and 20408 transitions. Word has length 66 [2019-12-07 14:05:24,342 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:24,342 INFO L462 AbstractCegarLoop]: Abstraction has 7219 states and 20408 transitions. [2019-12-07 14:05:24,342 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:05:24,342 INFO L276 IsEmpty]: Start isEmpty. Operand 7219 states and 20408 transitions. [2019-12-07 14:05:24,350 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 14:05:24,350 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:24,350 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:24,350 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:24,350 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:24,350 INFO L82 PathProgramCache]: Analyzing trace with hash 1231010579, now seen corresponding path program 4 times [2019-12-07 14:05:24,350 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:24,351 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [823761999] [2019-12-07 14:05:24,351 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:24,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:24,384 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:24,384 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [823761999] [2019-12-07 14:05:24,384 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:24,384 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:05:24,384 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1123419123] [2019-12-07 14:05:24,384 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:05:24,384 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:24,385 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:05:24,385 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:05:24,385 INFO L87 Difference]: Start difference. First operand 7219 states and 20408 transitions. Second operand 3 states. [2019-12-07 14:05:24,404 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:24,404 INFO L93 Difference]: Finished difference Result 6407 states and 17825 transitions. [2019-12-07 14:05:24,404 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:05:24,404 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 14:05:24,404 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:24,410 INFO L225 Difference]: With dead ends: 6407 [2019-12-07 14:05:24,410 INFO L226 Difference]: Without dead ends: 6407 [2019-12-07 14:05:24,410 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:05:24,429 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6407 states. [2019-12-07 14:05:24,479 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6407 to 6407. [2019-12-07 14:05:24,480 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6407 states. [2019-12-07 14:05:24,487 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6407 states to 6407 states and 17825 transitions. [2019-12-07 14:05:24,487 INFO L78 Accepts]: Start accepts. Automaton has 6407 states and 17825 transitions. Word has length 66 [2019-12-07 14:05:24,487 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:24,487 INFO L462 AbstractCegarLoop]: Abstraction has 6407 states and 17825 transitions. [2019-12-07 14:05:24,487 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:05:24,487 INFO L276 IsEmpty]: Start isEmpty. Operand 6407 states and 17825 transitions. [2019-12-07 14:05:24,492 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:05:24,492 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:24,492 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:24,493 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:24,493 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:24,493 INFO L82 PathProgramCache]: Analyzing trace with hash 1336907617, now seen corresponding path program 1 times [2019-12-07 14:05:24,493 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:24,493 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1338520917] [2019-12-07 14:05:24,493 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:24,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:24,526 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:24,526 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1338520917] [2019-12-07 14:05:24,526 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:24,527 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:05:24,527 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [290841510] [2019-12-07 14:05:24,527 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:05:24,527 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:24,527 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:05:24,528 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:05:24,528 INFO L87 Difference]: Start difference. First operand 6407 states and 17825 transitions. Second operand 3 states. [2019-12-07 14:05:24,565 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:24,565 INFO L93 Difference]: Finished difference Result 6407 states and 17824 transitions. [2019-12-07 14:05:24,565 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:05:24,565 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-12-07 14:05:24,566 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:24,571 INFO L225 Difference]: With dead ends: 6407 [2019-12-07 14:05:24,571 INFO L226 Difference]: Without dead ends: 6407 [2019-12-07 14:05:24,571 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:05:24,590 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6407 states. [2019-12-07 14:05:24,628 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6407 to 4435. [2019-12-07 14:05:24,628 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4435 states. [2019-12-07 14:05:24,633 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4435 states to 4435 states and 12371 transitions. [2019-12-07 14:05:24,633 INFO L78 Accepts]: Start accepts. Automaton has 4435 states and 12371 transitions. Word has length 67 [2019-12-07 14:05:24,634 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:24,634 INFO L462 AbstractCegarLoop]: Abstraction has 4435 states and 12371 transitions. [2019-12-07 14:05:24,634 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:05:24,634 INFO L276 IsEmpty]: Start isEmpty. Operand 4435 states and 12371 transitions. [2019-12-07 14:05:24,637 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 14:05:24,637 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:24,637 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:24,637 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:24,637 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:24,637 INFO L82 PathProgramCache]: Analyzing trace with hash -1149441136, now seen corresponding path program 1 times [2019-12-07 14:05:24,637 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:24,638 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [594187253] [2019-12-07 14:05:24,638 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:24,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:05:24,809 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:05:24,809 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [594187253] [2019-12-07 14:05:24,810 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:05:24,810 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 14:05:24,810 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1361816062] [2019-12-07 14:05:24,810 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 14:05:24,810 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 14:05:24,811 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 14:05:24,811 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2019-12-07 14:05:24,811 INFO L87 Difference]: Start difference. First operand 4435 states and 12371 transitions. Second operand 13 states. [2019-12-07 14:05:25,172 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:05:25,173 INFO L93 Difference]: Finished difference Result 8910 states and 25000 transitions. [2019-12-07 14:05:25,173 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 14:05:25,173 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 68 [2019-12-07 14:05:25,173 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:05:25,180 INFO L225 Difference]: With dead ends: 8910 [2019-12-07 14:05:25,180 INFO L226 Difference]: Without dead ends: 8142 [2019-12-07 14:05:25,180 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=109, Invalid=443, Unknown=0, NotChecked=0, Total=552 [2019-12-07 14:05:25,201 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8142 states. [2019-12-07 14:05:25,248 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8142 to 5636. [2019-12-07 14:05:25,249 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5636 states. [2019-12-07 14:05:25,255 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5636 states to 5636 states and 15626 transitions. [2019-12-07 14:05:25,255 INFO L78 Accepts]: Start accepts. Automaton has 5636 states and 15626 transitions. Word has length 68 [2019-12-07 14:05:25,255 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:05:25,255 INFO L462 AbstractCegarLoop]: Abstraction has 5636 states and 15626 transitions. [2019-12-07 14:05:25,255 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 14:05:25,255 INFO L276 IsEmpty]: Start isEmpty. Operand 5636 states and 15626 transitions. [2019-12-07 14:05:25,258 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 14:05:25,258 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:05:25,259 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:05:25,259 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:05:25,259 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:05:25,259 INFO L82 PathProgramCache]: Analyzing trace with hash 15770806, now seen corresponding path program 2 times [2019-12-07 14:05:25,259 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 14:05:25,259 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [530759100] [2019-12-07 14:05:25,259 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:05:25,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 14:05:25,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 14:05:25,343 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 14:05:25,343 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 14:05:25,345 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] ULTIMATE.startENTRY-->L800: Formula: (let ((.cse0 (store |v_#valid_65| 0 0))) (and (= v_~y$mem_tmp~0_39 0) (= 0 v_~y$read_delayed_var~0.offset_7) (= 0 v_~y$r_buff0_thd3~0_110) (= v_~main$tmp_guard0~0_18 0) (= (store |v_#length_26| |v_ULTIMATE.start_main_~#t2189~0.base_27| 4) |v_#length_25|) (= v_~weak$$choice2~0_126 0) (= 0 v_~x~0_147) (= v_~y$r_buff0_thd0~0_348 0) (= v_~y$read_delayed~0_7 0) (= v_~y$w_buff1~0_200 0) (= |v_#valid_63| (store .cse0 |v_ULTIMATE.start_main_~#t2189~0.base_27| 1)) (= 0 v_~y$w_buff0~0_179) (= v_~y~0_170 0) (< 0 |v_#StackHeapBarrier_17|) (= v_~y$r_buff1_thd0~0_299 0) (= 0 v_~y$r_buff1_thd2~0_193) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t2189~0.base_27| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t2189~0.base_27|) |v_ULTIMATE.start_main_~#t2189~0.offset_20| 0)) |v_#memory_int_21|) (= v_~y$r_buff0_thd1~0_223 0) (= 0 v_~__unbuffered_p2_EAX~0_33) (= 0 v_~y$read_delayed_var~0.base_7) (= 0 v_~y$flush_delayed~0_56) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t2189~0.base_27|)) (= |v_#NULL.offset_5| 0) (= v_~y$w_buff1_used~0_482 0) (= 0 v_~y$r_buff1_thd3~0_211) (= 0 v_~y$r_buff0_thd2~0_114) (= |v_ULTIMATE.start_main_~#t2189~0.offset_20| 0) (= v_~__unbuffered_cnt~0_132 0) (= v_~y$w_buff0_used~0_741 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t2189~0.base_27|) (= 0 v_~weak$$choice0~0_34) (= 0 |v_#NULL.base_5|) (= v_~y$r_buff1_thd1~0_185 0) (= v_~main$tmp_guard1~0_22 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_61|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_27|, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_27|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_45|, ULTIMATE.start_main_~#t2191~0.base=|v_ULTIMATE.start_main_~#t2191~0.base_19|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_141|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_41|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_76|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_62|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_45|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_36|, ~y$mem_tmp~0=v_~y$mem_tmp~0_39, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_211, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_223, ~y$flush_delayed~0=v_~y$flush_delayed~0_56, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_33, ULTIMATE.start_main_~#t2190~0.offset=|v_ULTIMATE.start_main_~#t2190~0.offset_18|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_9|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_82|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_54|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_64|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_31|, ~weak$$choice0~0=v_~weak$$choice0~0_34, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_46|, ~y$w_buff1~0=v_~y$w_buff1~0_200, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_114, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_132, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_299, ~x~0=v_~x~0_147, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_61|, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_741, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_73|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_31|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_27|, ULTIMATE.start_main_~#t2189~0.offset=|v_ULTIMATE.start_main_~#t2189~0.offset_20|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_22, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_161|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_30|, ULTIMATE.start_main_~#t2191~0.offset=|v_ULTIMATE.start_main_~#t2191~0.offset_16|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_51|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_76|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_185, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_31|, ~y$w_buff0~0=v_~y$w_buff0~0_179, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_110, ~y~0=v_~y~0_170, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_10|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_21|, ULTIMATE.start_main_~#t2189~0.base=|v_ULTIMATE.start_main_~#t2189~0.base_27|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_43|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_70|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_18, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_25|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_50|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_193, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_75|, ULTIMATE.start_main_~#t2190~0.base=|v_ULTIMATE.start_main_~#t2190~0.base_23|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_348, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_21|, ~weak$$choice2~0=v_~weak$$choice2~0_126, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_482} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_~#t2191~0.base, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ~y$read_delayed~0, ULTIMATE.start_main_#t~ite52, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t2190~0.offset, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ULTIMATE.start_main_#t~nondet31, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_~#t2189~0.offset, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_~#t2191~0.offset, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite51, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_~#t2189~0.base, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_~#t2190~0.base, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 14:05:25,346 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] P0ENTRY-->L4-3: Formula: (and (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_8 0)) (= v_~y$w_buff0_used~0_135 1) (= 2 v_~y$w_buff0~0_28) (= v_~y$w_buff0~0_29 v_~y$w_buff1~0_20) (= v_P0Thread1of1ForFork0_~arg.offset_6 |v_P0Thread1of1ForFork0_#in~arg.offset_8|) (= v_~y$w_buff1_used~0_63 v_~y$w_buff0_used~0_136) (= (ite (not (and (not (= (mod v_~y$w_buff1_used~0_63 256) 0)) (not (= (mod v_~y$w_buff0_used~0_135 256) 0)))) 1 0) |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_8 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|) (= v_P0Thread1of1ForFork0_~arg.base_6 |v_P0Thread1of1ForFork0_#in~arg.base_8|)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_8|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_136, ~y$w_buff0~0=v_~y$w_buff0~0_29, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_8|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_8|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_135, ~y$w_buff1~0=v_~y$w_buff1~0_20, ~y$w_buff0~0=v_~y$w_buff0~0_28, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_8, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_8|, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_6, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_6, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_63} AuxVars[] AssignedVars[~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 14:05:25,346 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L800-1-->L802: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t2190~0.offset_10|) (= |v_#memory_int_11| (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2190~0.base_11| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2190~0.base_11|) |v_ULTIMATE.start_main_~#t2190~0.offset_10| 1))) (= (store |v_#valid_38| |v_ULTIMATE.start_main_~#t2190~0.base_11| 1) |v_#valid_37|) (= 0 (select |v_#valid_38| |v_ULTIMATE.start_main_~#t2190~0.base_11|)) (not (= |v_ULTIMATE.start_main_~#t2190~0.base_11| 0)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t2190~0.base_11| 4)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t2190~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_6|, ULTIMATE.start_main_~#t2190~0.base=|v_ULTIMATE.start_main_~#t2190~0.base_11|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t2190~0.offset=|v_ULTIMATE.start_main_~#t2190~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_~#t2190~0.base, #valid, #memory_int, #length, ULTIMATE.start_main_~#t2190~0.offset] because there is no mapped edge [2019-12-07 14:05:25,346 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [804] [804] L802-1-->L804: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t2191~0.offset_11|) (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t2191~0.base_13| 1)) (= |v_#memory_int_13| (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2191~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2191~0.base_13|) |v_ULTIMATE.start_main_~#t2191~0.offset_11| 2))) (= (select |v_#valid_40| |v_ULTIMATE.start_main_~#t2191~0.base_13|) 0) (not (= |v_ULTIMATE.start_main_~#t2191~0.base_13| 0)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2191~0.base_13|) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t2191~0.base_13| 4) |v_#length_17|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t2191~0.base=|v_ULTIMATE.start_main_~#t2191~0.base_13|, #length=|v_#length_17|, ULTIMATE.start_main_~#t2191~0.offset=|v_ULTIMATE.start_main_~#t2191~0.offset_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet22, #valid, #memory_int, ULTIMATE.start_main_~#t2191~0.base, #length, ULTIMATE.start_main_~#t2191~0.offset] because there is no mapped edge [2019-12-07 14:05:25,347 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [754] [754] L741-->L741-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In137097309 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd1~0_In137097309 256) 0))) (or (and (not .cse0) (= |P0Thread1of1ForFork0_#t~ite5_Out137097309| 0) (not .cse1)) (and (= |P0Thread1of1ForFork0_#t~ite5_Out137097309| ~y$w_buff0_used~0_In137097309) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In137097309, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In137097309} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out137097309|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In137097309, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In137097309} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 14:05:25,347 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L757-2-->L757-4: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In-1196238773 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd2~0_In-1196238773 256)))) (or (and (not .cse0) (= ~y$w_buff1~0_In-1196238773 |P1Thread1of1ForFork1_#t~ite9_Out-1196238773|) (not .cse1)) (and (= |P1Thread1of1ForFork1_#t~ite9_Out-1196238773| ~y~0_In-1196238773) (or .cse1 .cse0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1196238773, ~y$w_buff1~0=~y$w_buff1~0_In-1196238773, ~y~0=~y~0_In-1196238773, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1196238773} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1196238773, ~y$w_buff1~0=~y$w_buff1~0_In-1196238773, P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out-1196238773|, ~y~0=~y~0_In-1196238773, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1196238773} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9] because there is no mapped edge [2019-12-07 14:05:25,348 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L742-->L742-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In-987693277 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd1~0_In-987693277 256))) (.cse3 (= (mod ~y$w_buff1_used~0_In-987693277 256) 0)) (.cse2 (= (mod ~y$r_buff1_thd1~0_In-987693277 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$w_buff1_used~0_In-987693277 |P0Thread1of1ForFork0_#t~ite6_Out-987693277|)) (and (= 0 |P0Thread1of1ForFork0_#t~ite6_Out-987693277|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-987693277, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-987693277, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-987693277, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-987693277} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-987693277|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-987693277, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-987693277, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-987693277, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-987693277} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 14:05:25,348 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L743-->L744: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In1853790557 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd1~0_In1853790557 256))) (.cse2 (= ~y$r_buff0_thd1~0_Out1853790557 ~y$r_buff0_thd1~0_In1853790557))) (or (and (= ~y$r_buff0_thd1~0_Out1853790557 0) (not .cse0) (not .cse1)) (and .cse2 .cse1) (and .cse0 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1853790557, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1853790557} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1853790557, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out1853790557|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_Out1853790557} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~y$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 14:05:25,348 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L744-->L744-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In-1792136054 256))) (.cse0 (= (mod ~y$r_buff1_thd1~0_In-1792136054 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-1792136054 256))) (.cse3 (= 0 (mod ~y$r_buff0_thd1~0_In-1792136054 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite8_Out-1792136054| ~y$r_buff1_thd1~0_In-1792136054) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite8_Out-1792136054| 0)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-1792136054, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1792136054, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1792136054, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1792136054} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-1792136054, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1792136054, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-1792136054|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1792136054, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1792136054} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 14:05:25,348 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L744-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~y$r_buff1_thd1~0_50 |v_P0Thread1of1ForFork0_#t~ite8_26|) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_50, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_25|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 14:05:25,349 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L777-2-->L777-4: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In-207845279 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd3~0_In-207845279 256)))) (or (and (= ~y~0_In-207845279 |P2Thread1of1ForFork2_#t~ite15_Out-207845279|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= ~y$w_buff1~0_In-207845279 |P2Thread1of1ForFork2_#t~ite15_Out-207845279|)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-207845279, ~y$w_buff1~0=~y$w_buff1~0_In-207845279, ~y~0=~y~0_In-207845279, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-207845279} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-207845279, P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out-207845279|, ~y$w_buff1~0=~y$w_buff1~0_In-207845279, ~y~0=~y~0_In-207845279, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-207845279} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 14:05:25,349 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L777-4-->L778: Formula: (= |v_P2Thread1of1ForFork2_#t~ite15_6| v_~y~0_34) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_6|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_5|, ~y~0=v_~y~0_34, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_5|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, ~y~0, P2Thread1of1ForFork2_#t~ite16] because there is no mapped edge [2019-12-07 14:05:25,349 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [714] [714] L757-4-->L758: Formula: (= |v_P1Thread1of1ForFork1_#t~ite9_6| v_~y~0_38) InVars {P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_6|} OutVars{P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_5|, P1Thread1of1ForFork1_#t~ite10=|v_P1Thread1of1ForFork1_#t~ite10_5|, ~y~0=v_~y~0_38} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10, ~y~0] because there is no mapped edge [2019-12-07 14:05:25,349 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L758-->L758-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In1351121773 256))) (.cse1 (= (mod ~y$r_buff0_thd2~0_In1351121773 256) 0))) (or (and (= ~y$w_buff0_used~0_In1351121773 |P1Thread1of1ForFork1_#t~ite11_Out1351121773|) (or .cse0 .cse1)) (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out1351121773|) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1351121773, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1351121773} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1351121773, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1351121773, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out1351121773|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 14:05:25,349 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L759-->L759-2: Formula: (let ((.cse3 (= (mod ~y$r_buff1_thd2~0_In1237468354 256) 0)) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In1237468354 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In1237468354 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd2~0_In1237468354 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In1237468354 |P1Thread1of1ForFork1_#t~ite12_Out1237468354|) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= 0 |P1Thread1of1ForFork1_#t~ite12_Out1237468354|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1237468354, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1237468354, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1237468354, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1237468354} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1237468354, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1237468354, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1237468354, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out1237468354|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1237468354} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 14:05:25,350 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L760-->L760-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In1726493892 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd2~0_In1726493892 256) 0))) (or (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite13_Out1726493892| 0) (not .cse1)) (and (= |P1Thread1of1ForFork1_#t~ite13_Out1726493892| ~y$r_buff0_thd2~0_In1726493892) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1726493892, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1726493892} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1726493892, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1726493892, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out1726493892|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 14:05:25,350 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L761-->L761-2: Formula: (let ((.cse2 (= (mod ~y$r_buff1_thd2~0_In818850432 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In818850432 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In818850432 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In818850432 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$r_buff1_thd2~0_In818850432 |P1Thread1of1ForFork1_#t~ite14_Out818850432|)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |P1Thread1of1ForFork1_#t~ite14_Out818850432|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In818850432, ~y$w_buff0_used~0=~y$w_buff0_used~0_In818850432, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In818850432, ~y$w_buff1_used~0=~y$w_buff1_used~0_In818850432} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In818850432, ~y$w_buff0_used~0=~y$w_buff0_used~0_In818850432, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In818850432, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out818850432|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In818850432} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 14:05:25,350 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L778-->L778-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-181126912 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-181126912 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-181126912 |P2Thread1of1ForFork2_#t~ite17_Out-181126912|)) (and (not .cse1) (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite17_Out-181126912|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-181126912, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-181126912} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-181126912, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-181126912, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out-181126912|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 14:05:25,350 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L779-->L779-2: Formula: (let ((.cse3 (= 0 (mod ~y$w_buff0_used~0_In-1516791296 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd3~0_In-1516791296 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-1516791296 256))) (.cse0 (= (mod ~y$r_buff1_thd3~0_In-1516791296 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In-1516791296 |P2Thread1of1ForFork2_#t~ite18_Out-1516791296|) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork2_#t~ite18_Out-1516791296| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1516791296, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1516791296, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1516791296, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1516791296} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1516791296, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1516791296, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1516791296, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out-1516791296|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1516791296} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 14:05:25,351 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] L761-2-->P1EXIT: Formula: (and (= v_~__unbuffered_cnt~0_71 (+ v_~__unbuffered_cnt~0_72 1)) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~y$r_buff1_thd2~0_135 |v_P1Thread1of1ForFork1_#t~ite14_40|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_72, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_40|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_135, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_39|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 14:05:25,351 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L780-->L780-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-56483411 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-56483411 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite19_Out-56483411| 0) (not .cse0) (not .cse1)) (and (= |P2Thread1of1ForFork2_#t~ite19_Out-56483411| ~y$r_buff0_thd3~0_In-56483411) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-56483411, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-56483411} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-56483411, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-56483411, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out-56483411|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 14:05:25,351 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L781-->L781-2: Formula: (let ((.cse2 (= 0 (mod ~y$w_buff1_used~0_In-223018318 256))) (.cse3 (= (mod ~y$r_buff1_thd3~0_In-223018318 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-223018318 256))) (.cse0 (= (mod ~y$r_buff0_thd3~0_In-223018318 256) 0))) (or (and (= ~y$r_buff1_thd3~0_In-223018318 |P2Thread1of1ForFork2_#t~ite20_Out-223018318|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork2_#t~ite20_Out-223018318|) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-223018318, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-223018318, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-223018318, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-223018318} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-223018318, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-223018318, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out-223018318|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-223018318, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-223018318} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 14:05:25,351 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [793] [793] L781-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_66 1) v_~__unbuffered_cnt~0_65) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= |v_P2Thread1of1ForFork2_#t~ite20_34| v_~y$r_buff1_thd3~0_132)) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_132, P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_33|, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_65, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~y$r_buff1_thd3~0, P2Thread1of1ForFork2_#t~ite20, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 14:05:25,351 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L804-1-->L810: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_18) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_18} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_18, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 14:05:25,351 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L810-2-->L810-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite25_Out1039960847| |ULTIMATE.start_main_#t~ite24_Out1039960847|)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In1039960847 256))) (.cse2 (= (mod ~y$r_buff1_thd0~0_In1039960847 256) 0))) (or (and .cse0 (not .cse1) (= ~y$w_buff1~0_In1039960847 |ULTIMATE.start_main_#t~ite24_Out1039960847|) (not .cse2)) (and (= ~y~0_In1039960847 |ULTIMATE.start_main_#t~ite24_Out1039960847|) .cse0 (or .cse1 .cse2)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In1039960847, ~y~0=~y~0_In1039960847, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1039960847, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1039960847} OutVars{~y$w_buff1~0=~y$w_buff1~0_In1039960847, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out1039960847|, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out1039960847|, ~y~0=~y~0_In1039960847, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1039960847, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1039960847} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 14:05:25,352 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L811-->L811-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In1135190977 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd0~0_In1135190977 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite26_Out1135190977| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite26_Out1135190977| ~y$w_buff0_used~0_In1135190977)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1135190977, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1135190977} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1135190977, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1135190977, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out1135190977|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 14:05:25,352 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L812-->L812-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In-1962117108 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In-1962117108 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In-1962117108 256))) (.cse2 (= (mod ~y$r_buff0_thd0~0_In-1962117108 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In-1962117108 |ULTIMATE.start_main_#t~ite27_Out-1962117108|) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite27_Out-1962117108|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1962117108, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1962117108, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1962117108, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1962117108} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1962117108, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1962117108, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out-1962117108|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1962117108, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1962117108} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 14:05:25,352 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] L813-->L813-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-882371189 256))) (.cse1 (= (mod ~y$r_buff0_thd0~0_In-882371189 256) 0))) (or (and (or .cse0 .cse1) (= ~y$r_buff0_thd0~0_In-882371189 |ULTIMATE.start_main_#t~ite28_Out-882371189|)) (and (= 0 |ULTIMATE.start_main_#t~ite28_Out-882371189|) (not .cse0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-882371189, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-882371189} OutVars{ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out-882371189|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-882371189, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-882371189} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 14:05:25,353 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [751] [751] L814-->L814-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In670244215 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In670244215 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In670244215 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In670244215 256)))) (or (and (or .cse0 .cse1) (= ~y$r_buff1_thd0~0_In670244215 |ULTIMATE.start_main_#t~ite29_Out670244215|) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite29_Out670244215| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In670244215, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In670244215, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In670244215, ~y$w_buff1_used~0=~y$w_buff1_used~0_In670244215} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In670244215, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out670244215|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In670244215, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In670244215, ~y$w_buff1_used~0=~y$w_buff1_used~0_In670244215} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 14:05:25,354 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L823-->L823-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In678672418 256) 0))) (or (and .cse0 (= |ULTIMATE.start_main_#t~ite39_Out678672418| |ULTIMATE.start_main_#t~ite38_Out678672418|) (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In678672418 256) 0))) (or (and (= (mod ~y$r_buff1_thd0~0_In678672418 256) 0) .cse1) (and (= 0 (mod ~y$w_buff1_used~0_In678672418 256)) .cse1) (= (mod ~y$w_buff0_used~0_In678672418 256) 0))) (= |ULTIMATE.start_main_#t~ite38_Out678672418| ~y$w_buff1~0_In678672418)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite38_In678672418| |ULTIMATE.start_main_#t~ite38_Out678672418|) (= |ULTIMATE.start_main_#t~ite39_Out678672418| ~y$w_buff1~0_In678672418)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In678672418, ~y$w_buff0_used~0=~y$w_buff0_used~0_In678672418, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In678672418, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In678672418|, ~weak$$choice2~0=~weak$$choice2~0_In678672418, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In678672418, ~y$w_buff1_used~0=~y$w_buff1_used~0_In678672418} OutVars{~y$w_buff1~0=~y$w_buff1~0_In678672418, ~y$w_buff0_used~0=~y$w_buff0_used~0_In678672418, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out678672418|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In678672418, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out678672418|, ~weak$$choice2~0=~weak$$choice2~0_In678672418, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In678672418, ~y$w_buff1_used~0=~y$w_buff1_used~0_In678672418} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-12-07 14:05:25,354 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [809] [809] L824-->L824-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In2130400158 256) 0))) (or (and (= ~y$w_buff0_used~0_In2130400158 |ULTIMATE.start_main_#t~ite42_Out2130400158|) (not .cse0) (= |ULTIMATE.start_main_#t~ite41_In2130400158| |ULTIMATE.start_main_#t~ite41_Out2130400158|)) (and (= |ULTIMATE.start_main_#t~ite41_Out2130400158| |ULTIMATE.start_main_#t~ite42_Out2130400158|) (= |ULTIMATE.start_main_#t~ite41_Out2130400158| ~y$w_buff0_used~0_In2130400158) .cse0 (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In2130400158 256) 0))) (or (and .cse1 (= 0 (mod ~y$r_buff1_thd0~0_In2130400158 256))) (= (mod ~y$w_buff0_used~0_In2130400158 256) 0) (and (= (mod ~y$w_buff1_used~0_In2130400158 256) 0) .cse1)))))) InVars {ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_In2130400158|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2130400158, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2130400158, ~weak$$choice2~0=~weak$$choice2~0_In2130400158, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2130400158, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2130400158} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out2130400158|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2130400158, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2130400158, ~weak$$choice2~0=~weak$$choice2~0_In2130400158, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out2130400158|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2130400158, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2130400158} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 14:05:25,355 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [736] [736] L826-->L827: Formula: (and (= v_~y$r_buff0_thd0~0_133 v_~y$r_buff0_thd0~0_132) (not (= 0 (mod v_~weak$$choice2~0_33 256)))) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_133, ~weak$$choice2~0=v_~weak$$choice2~0_33} OutVars{~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_132, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_22|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_13|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_8|, ~weak$$choice2~0=v_~weak$$choice2~0_33} AuxVars[] AssignedVars[~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 14:05:25,355 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] L829-->L832-1: Formula: (and (not (= (mod v_~y$flush_delayed~0_45 256) 0)) (= 0 v_~y$flush_delayed~0_44) (= v_~y~0_135 v_~y$mem_tmp~0_33) (= (mod v_~main$tmp_guard1~0_13 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_33, ~y$flush_delayed~0=v_~y$flush_delayed~0_45, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_13} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_22|, ~y$mem_tmp~0=v_~y$mem_tmp~0_33, ~y$flush_delayed~0=v_~y$flush_delayed~0_44, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_13, ~y~0=v_~y~0_135, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ~y$flush_delayed~0, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 14:05:25,355 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L832-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 14:05:25,408 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 02:05:25 BasicIcfg [2019-12-07 14:05:25,408 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 14:05:25,408 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 14:05:25,408 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 14:05:25,409 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 14:05:25,409 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:04:21" (3/4) ... [2019-12-07 14:05:25,411 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 14:05:25,411 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] ULTIMATE.startENTRY-->L800: Formula: (let ((.cse0 (store |v_#valid_65| 0 0))) (and (= v_~y$mem_tmp~0_39 0) (= 0 v_~y$read_delayed_var~0.offset_7) (= 0 v_~y$r_buff0_thd3~0_110) (= v_~main$tmp_guard0~0_18 0) (= (store |v_#length_26| |v_ULTIMATE.start_main_~#t2189~0.base_27| 4) |v_#length_25|) (= v_~weak$$choice2~0_126 0) (= 0 v_~x~0_147) (= v_~y$r_buff0_thd0~0_348 0) (= v_~y$read_delayed~0_7 0) (= v_~y$w_buff1~0_200 0) (= |v_#valid_63| (store .cse0 |v_ULTIMATE.start_main_~#t2189~0.base_27| 1)) (= 0 v_~y$w_buff0~0_179) (= v_~y~0_170 0) (< 0 |v_#StackHeapBarrier_17|) (= v_~y$r_buff1_thd0~0_299 0) (= 0 v_~y$r_buff1_thd2~0_193) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t2189~0.base_27| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t2189~0.base_27|) |v_ULTIMATE.start_main_~#t2189~0.offset_20| 0)) |v_#memory_int_21|) (= v_~y$r_buff0_thd1~0_223 0) (= 0 v_~__unbuffered_p2_EAX~0_33) (= 0 v_~y$read_delayed_var~0.base_7) (= 0 v_~y$flush_delayed~0_56) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t2189~0.base_27|)) (= |v_#NULL.offset_5| 0) (= v_~y$w_buff1_used~0_482 0) (= 0 v_~y$r_buff1_thd3~0_211) (= 0 v_~y$r_buff0_thd2~0_114) (= |v_ULTIMATE.start_main_~#t2189~0.offset_20| 0) (= v_~__unbuffered_cnt~0_132 0) (= v_~y$w_buff0_used~0_741 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t2189~0.base_27|) (= 0 v_~weak$$choice0~0_34) (= 0 |v_#NULL.base_5|) (= v_~y$r_buff1_thd1~0_185 0) (= v_~main$tmp_guard1~0_22 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_61|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_27|, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_27|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_45|, ULTIMATE.start_main_~#t2191~0.base=|v_ULTIMATE.start_main_~#t2191~0.base_19|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_141|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_41|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_76|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_62|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_45|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_36|, ~y$mem_tmp~0=v_~y$mem_tmp~0_39, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_211, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_223, ~y$flush_delayed~0=v_~y$flush_delayed~0_56, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_33, ULTIMATE.start_main_~#t2190~0.offset=|v_ULTIMATE.start_main_~#t2190~0.offset_18|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_9|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_82|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_54|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_64|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_31|, ~weak$$choice0~0=v_~weak$$choice0~0_34, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_46|, ~y$w_buff1~0=v_~y$w_buff1~0_200, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_114, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_132, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_299, ~x~0=v_~x~0_147, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_61|, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_741, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_73|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_31|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_27|, ULTIMATE.start_main_~#t2189~0.offset=|v_ULTIMATE.start_main_~#t2189~0.offset_20|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_22, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_161|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_30|, ULTIMATE.start_main_~#t2191~0.offset=|v_ULTIMATE.start_main_~#t2191~0.offset_16|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_51|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_76|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_185, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_31|, ~y$w_buff0~0=v_~y$w_buff0~0_179, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_110, ~y~0=v_~y~0_170, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_10|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_21|, ULTIMATE.start_main_~#t2189~0.base=|v_ULTIMATE.start_main_~#t2189~0.base_27|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_43|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_70|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_18, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_25|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_50|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_193, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_75|, ULTIMATE.start_main_~#t2190~0.base=|v_ULTIMATE.start_main_~#t2190~0.base_23|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_348, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_21|, ~weak$$choice2~0=v_~weak$$choice2~0_126, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_482} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_~#t2191~0.base, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ~y$read_delayed~0, ULTIMATE.start_main_#t~ite52, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t2190~0.offset, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ULTIMATE.start_main_#t~nondet31, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_~#t2189~0.offset, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_~#t2191~0.offset, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite51, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_~#t2189~0.base, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_~#t2190~0.base, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 14:05:25,412 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] P0ENTRY-->L4-3: Formula: (and (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_8 0)) (= v_~y$w_buff0_used~0_135 1) (= 2 v_~y$w_buff0~0_28) (= v_~y$w_buff0~0_29 v_~y$w_buff1~0_20) (= v_P0Thread1of1ForFork0_~arg.offset_6 |v_P0Thread1of1ForFork0_#in~arg.offset_8|) (= v_~y$w_buff1_used~0_63 v_~y$w_buff0_used~0_136) (= (ite (not (and (not (= (mod v_~y$w_buff1_used~0_63 256) 0)) (not (= (mod v_~y$w_buff0_used~0_135 256) 0)))) 1 0) |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_8 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|) (= v_P0Thread1of1ForFork0_~arg.base_6 |v_P0Thread1of1ForFork0_#in~arg.base_8|)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_8|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_136, ~y$w_buff0~0=v_~y$w_buff0~0_29, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_8|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_8|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_135, ~y$w_buff1~0=v_~y$w_buff1~0_20, ~y$w_buff0~0=v_~y$w_buff0~0_28, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_8, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_8|, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_6, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_6, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_63} AuxVars[] AssignedVars[~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 14:05:25,412 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L800-1-->L802: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t2190~0.offset_10|) (= |v_#memory_int_11| (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2190~0.base_11| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2190~0.base_11|) |v_ULTIMATE.start_main_~#t2190~0.offset_10| 1))) (= (store |v_#valid_38| |v_ULTIMATE.start_main_~#t2190~0.base_11| 1) |v_#valid_37|) (= 0 (select |v_#valid_38| |v_ULTIMATE.start_main_~#t2190~0.base_11|)) (not (= |v_ULTIMATE.start_main_~#t2190~0.base_11| 0)) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t2190~0.base_11| 4)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t2190~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_6|, ULTIMATE.start_main_~#t2190~0.base=|v_ULTIMATE.start_main_~#t2190~0.base_11|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t2190~0.offset=|v_ULTIMATE.start_main_~#t2190~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_~#t2190~0.base, #valid, #memory_int, #length, ULTIMATE.start_main_~#t2190~0.offset] because there is no mapped edge [2019-12-07 14:05:25,412 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [804] [804] L802-1-->L804: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t2191~0.offset_11|) (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t2191~0.base_13| 1)) (= |v_#memory_int_13| (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2191~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2191~0.base_13|) |v_ULTIMATE.start_main_~#t2191~0.offset_11| 2))) (= (select |v_#valid_40| |v_ULTIMATE.start_main_~#t2191~0.base_13|) 0) (not (= |v_ULTIMATE.start_main_~#t2191~0.base_13| 0)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2191~0.base_13|) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t2191~0.base_13| 4) |v_#length_17|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t2191~0.base=|v_ULTIMATE.start_main_~#t2191~0.base_13|, #length=|v_#length_17|, ULTIMATE.start_main_~#t2191~0.offset=|v_ULTIMATE.start_main_~#t2191~0.offset_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet22, #valid, #memory_int, ULTIMATE.start_main_~#t2191~0.base, #length, ULTIMATE.start_main_~#t2191~0.offset] because there is no mapped edge [2019-12-07 14:05:25,413 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [754] [754] L741-->L741-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In137097309 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd1~0_In137097309 256) 0))) (or (and (not .cse0) (= |P0Thread1of1ForFork0_#t~ite5_Out137097309| 0) (not .cse1)) (and (= |P0Thread1of1ForFork0_#t~ite5_Out137097309| ~y$w_buff0_used~0_In137097309) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In137097309, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In137097309} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out137097309|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In137097309, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In137097309} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 14:05:25,413 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L757-2-->L757-4: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In-1196238773 256) 0)) (.cse0 (= 0 (mod ~y$r_buff1_thd2~0_In-1196238773 256)))) (or (and (not .cse0) (= ~y$w_buff1~0_In-1196238773 |P1Thread1of1ForFork1_#t~ite9_Out-1196238773|) (not .cse1)) (and (= |P1Thread1of1ForFork1_#t~ite9_Out-1196238773| ~y~0_In-1196238773) (or .cse1 .cse0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1196238773, ~y$w_buff1~0=~y$w_buff1~0_In-1196238773, ~y~0=~y~0_In-1196238773, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1196238773} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1196238773, ~y$w_buff1~0=~y$w_buff1~0_In-1196238773, P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out-1196238773|, ~y~0=~y~0_In-1196238773, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1196238773} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9] because there is no mapped edge [2019-12-07 14:05:25,413 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L742-->L742-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In-987693277 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd1~0_In-987693277 256))) (.cse3 (= (mod ~y$w_buff1_used~0_In-987693277 256) 0)) (.cse2 (= (mod ~y$r_buff1_thd1~0_In-987693277 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$w_buff1_used~0_In-987693277 |P0Thread1of1ForFork0_#t~ite6_Out-987693277|)) (and (= 0 |P0Thread1of1ForFork0_#t~ite6_Out-987693277|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-987693277, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-987693277, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-987693277, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-987693277} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-987693277|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-987693277, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-987693277, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-987693277, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-987693277} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 14:05:25,414 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L743-->L744: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In1853790557 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd1~0_In1853790557 256))) (.cse2 (= ~y$r_buff0_thd1~0_Out1853790557 ~y$r_buff0_thd1~0_In1853790557))) (or (and (= ~y$r_buff0_thd1~0_Out1853790557 0) (not .cse0) (not .cse1)) (and .cse2 .cse1) (and .cse0 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1853790557, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1853790557} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1853790557, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out1853790557|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_Out1853790557} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~y$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 14:05:25,414 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L744-->L744-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In-1792136054 256))) (.cse0 (= (mod ~y$r_buff1_thd1~0_In-1792136054 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-1792136054 256))) (.cse3 (= 0 (mod ~y$r_buff0_thd1~0_In-1792136054 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite8_Out-1792136054| ~y$r_buff1_thd1~0_In-1792136054) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite8_Out-1792136054| 0)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-1792136054, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1792136054, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1792136054, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1792136054} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-1792136054, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1792136054, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-1792136054|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1792136054, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1792136054} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 14:05:25,414 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L744-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~y$r_buff1_thd1~0_50 |v_P0Thread1of1ForFork0_#t~ite8_26|) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_50, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_25|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 14:05:25,414 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L777-2-->L777-4: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In-207845279 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd3~0_In-207845279 256)))) (or (and (= ~y~0_In-207845279 |P2Thread1of1ForFork2_#t~ite15_Out-207845279|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= ~y$w_buff1~0_In-207845279 |P2Thread1of1ForFork2_#t~ite15_Out-207845279|)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-207845279, ~y$w_buff1~0=~y$w_buff1~0_In-207845279, ~y~0=~y~0_In-207845279, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-207845279} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-207845279, P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out-207845279|, ~y$w_buff1~0=~y$w_buff1~0_In-207845279, ~y~0=~y~0_In-207845279, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-207845279} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 14:05:25,414 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L777-4-->L778: Formula: (= |v_P2Thread1of1ForFork2_#t~ite15_6| v_~y~0_34) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_6|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_5|, ~y~0=v_~y~0_34, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_5|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, ~y~0, P2Thread1of1ForFork2_#t~ite16] because there is no mapped edge [2019-12-07 14:05:25,414 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [714] [714] L757-4-->L758: Formula: (= |v_P1Thread1of1ForFork1_#t~ite9_6| v_~y~0_38) InVars {P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_6|} OutVars{P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_5|, P1Thread1of1ForFork1_#t~ite10=|v_P1Thread1of1ForFork1_#t~ite10_5|, ~y~0=v_~y~0_38} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10, ~y~0] because there is no mapped edge [2019-12-07 14:05:25,415 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L758-->L758-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In1351121773 256))) (.cse1 (= (mod ~y$r_buff0_thd2~0_In1351121773 256) 0))) (or (and (= ~y$w_buff0_used~0_In1351121773 |P1Thread1of1ForFork1_#t~ite11_Out1351121773|) (or .cse0 .cse1)) (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out1351121773|) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1351121773, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1351121773} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1351121773, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1351121773, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out1351121773|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 14:05:25,415 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L759-->L759-2: Formula: (let ((.cse3 (= (mod ~y$r_buff1_thd2~0_In1237468354 256) 0)) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In1237468354 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In1237468354 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd2~0_In1237468354 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In1237468354 |P1Thread1of1ForFork1_#t~ite12_Out1237468354|) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= 0 |P1Thread1of1ForFork1_#t~ite12_Out1237468354|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1237468354, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1237468354, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1237468354, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1237468354} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1237468354, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1237468354, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1237468354, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out1237468354|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1237468354} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 14:05:25,415 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L760-->L760-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In1726493892 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd2~0_In1726493892 256) 0))) (or (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite13_Out1726493892| 0) (not .cse1)) (and (= |P1Thread1of1ForFork1_#t~ite13_Out1726493892| ~y$r_buff0_thd2~0_In1726493892) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1726493892, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1726493892} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1726493892, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1726493892, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out1726493892|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 14:05:25,415 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L761-->L761-2: Formula: (let ((.cse2 (= (mod ~y$r_buff1_thd2~0_In818850432 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In818850432 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In818850432 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In818850432 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$r_buff1_thd2~0_In818850432 |P1Thread1of1ForFork1_#t~ite14_Out818850432|)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |P1Thread1of1ForFork1_#t~ite14_Out818850432|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In818850432, ~y$w_buff0_used~0=~y$w_buff0_used~0_In818850432, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In818850432, ~y$w_buff1_used~0=~y$w_buff1_used~0_In818850432} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In818850432, ~y$w_buff0_used~0=~y$w_buff0_used~0_In818850432, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In818850432, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out818850432|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In818850432} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 14:05:25,415 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L778-->L778-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-181126912 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-181126912 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-181126912 |P2Thread1of1ForFork2_#t~ite17_Out-181126912|)) (and (not .cse1) (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite17_Out-181126912|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-181126912, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-181126912} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-181126912, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-181126912, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out-181126912|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 14:05:25,416 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L779-->L779-2: Formula: (let ((.cse3 (= 0 (mod ~y$w_buff0_used~0_In-1516791296 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd3~0_In-1516791296 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-1516791296 256))) (.cse0 (= (mod ~y$r_buff1_thd3~0_In-1516791296 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In-1516791296 |P2Thread1of1ForFork2_#t~ite18_Out-1516791296|) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork2_#t~ite18_Out-1516791296| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1516791296, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1516791296, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1516791296, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1516791296} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1516791296, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1516791296, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1516791296, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out-1516791296|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1516791296} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 14:05:25,416 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] L761-2-->P1EXIT: Formula: (and (= v_~__unbuffered_cnt~0_71 (+ v_~__unbuffered_cnt~0_72 1)) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~y$r_buff1_thd2~0_135 |v_P1Thread1of1ForFork1_#t~ite14_40|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_72, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_40|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_135, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_39|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 14:05:25,416 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L780-->L780-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-56483411 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-56483411 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite19_Out-56483411| 0) (not .cse0) (not .cse1)) (and (= |P2Thread1of1ForFork2_#t~ite19_Out-56483411| ~y$r_buff0_thd3~0_In-56483411) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-56483411, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-56483411} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-56483411, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-56483411, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out-56483411|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 14:05:25,416 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L781-->L781-2: Formula: (let ((.cse2 (= 0 (mod ~y$w_buff1_used~0_In-223018318 256))) (.cse3 (= (mod ~y$r_buff1_thd3~0_In-223018318 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-223018318 256))) (.cse0 (= (mod ~y$r_buff0_thd3~0_In-223018318 256) 0))) (or (and (= ~y$r_buff1_thd3~0_In-223018318 |P2Thread1of1ForFork2_#t~ite20_Out-223018318|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork2_#t~ite20_Out-223018318|) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-223018318, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-223018318, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-223018318, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-223018318} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-223018318, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-223018318, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out-223018318|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-223018318, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-223018318} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 14:05:25,416 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [793] [793] L781-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_66 1) v_~__unbuffered_cnt~0_65) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= |v_P2Thread1of1ForFork2_#t~ite20_34| v_~y$r_buff1_thd3~0_132)) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_132, P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_33|, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_65, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~y$r_buff1_thd3~0, P2Thread1of1ForFork2_#t~ite20, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 14:05:25,417 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L804-1-->L810: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_18) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_18} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_18, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 14:05:25,417 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L810-2-->L810-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite25_Out1039960847| |ULTIMATE.start_main_#t~ite24_Out1039960847|)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In1039960847 256))) (.cse2 (= (mod ~y$r_buff1_thd0~0_In1039960847 256) 0))) (or (and .cse0 (not .cse1) (= ~y$w_buff1~0_In1039960847 |ULTIMATE.start_main_#t~ite24_Out1039960847|) (not .cse2)) (and (= ~y~0_In1039960847 |ULTIMATE.start_main_#t~ite24_Out1039960847|) .cse0 (or .cse1 .cse2)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In1039960847, ~y~0=~y~0_In1039960847, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1039960847, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1039960847} OutVars{~y$w_buff1~0=~y$w_buff1~0_In1039960847, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out1039960847|, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out1039960847|, ~y~0=~y~0_In1039960847, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1039960847, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1039960847} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 14:05:25,417 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L811-->L811-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In1135190977 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd0~0_In1135190977 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite26_Out1135190977| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite26_Out1135190977| ~y$w_buff0_used~0_In1135190977)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1135190977, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1135190977} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1135190977, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1135190977, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out1135190977|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 14:05:25,417 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L812-->L812-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In-1962117108 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In-1962117108 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In-1962117108 256))) (.cse2 (= (mod ~y$r_buff0_thd0~0_In-1962117108 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In-1962117108 |ULTIMATE.start_main_#t~ite27_Out-1962117108|) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite27_Out-1962117108|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1962117108, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1962117108, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1962117108, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1962117108} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1962117108, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1962117108, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out-1962117108|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1962117108, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1962117108} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 14:05:25,418 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] L813-->L813-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-882371189 256))) (.cse1 (= (mod ~y$r_buff0_thd0~0_In-882371189 256) 0))) (or (and (or .cse0 .cse1) (= ~y$r_buff0_thd0~0_In-882371189 |ULTIMATE.start_main_#t~ite28_Out-882371189|)) (and (= 0 |ULTIMATE.start_main_#t~ite28_Out-882371189|) (not .cse0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-882371189, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-882371189} OutVars{ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out-882371189|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-882371189, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-882371189} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 14:05:25,418 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [751] [751] L814-->L814-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In670244215 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In670244215 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In670244215 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In670244215 256)))) (or (and (or .cse0 .cse1) (= ~y$r_buff1_thd0~0_In670244215 |ULTIMATE.start_main_#t~ite29_Out670244215|) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite29_Out670244215| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In670244215, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In670244215, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In670244215, ~y$w_buff1_used~0=~y$w_buff1_used~0_In670244215} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In670244215, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out670244215|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In670244215, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In670244215, ~y$w_buff1_used~0=~y$w_buff1_used~0_In670244215} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 14:05:25,419 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L823-->L823-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In678672418 256) 0))) (or (and .cse0 (= |ULTIMATE.start_main_#t~ite39_Out678672418| |ULTIMATE.start_main_#t~ite38_Out678672418|) (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In678672418 256) 0))) (or (and (= (mod ~y$r_buff1_thd0~0_In678672418 256) 0) .cse1) (and (= 0 (mod ~y$w_buff1_used~0_In678672418 256)) .cse1) (= (mod ~y$w_buff0_used~0_In678672418 256) 0))) (= |ULTIMATE.start_main_#t~ite38_Out678672418| ~y$w_buff1~0_In678672418)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite38_In678672418| |ULTIMATE.start_main_#t~ite38_Out678672418|) (= |ULTIMATE.start_main_#t~ite39_Out678672418| ~y$w_buff1~0_In678672418)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In678672418, ~y$w_buff0_used~0=~y$w_buff0_used~0_In678672418, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In678672418, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In678672418|, ~weak$$choice2~0=~weak$$choice2~0_In678672418, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In678672418, ~y$w_buff1_used~0=~y$w_buff1_used~0_In678672418} OutVars{~y$w_buff1~0=~y$w_buff1~0_In678672418, ~y$w_buff0_used~0=~y$w_buff0_used~0_In678672418, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out678672418|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In678672418, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out678672418|, ~weak$$choice2~0=~weak$$choice2~0_In678672418, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In678672418, ~y$w_buff1_used~0=~y$w_buff1_used~0_In678672418} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-12-07 14:05:25,419 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [809] [809] L824-->L824-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In2130400158 256) 0))) (or (and (= ~y$w_buff0_used~0_In2130400158 |ULTIMATE.start_main_#t~ite42_Out2130400158|) (not .cse0) (= |ULTIMATE.start_main_#t~ite41_In2130400158| |ULTIMATE.start_main_#t~ite41_Out2130400158|)) (and (= |ULTIMATE.start_main_#t~ite41_Out2130400158| |ULTIMATE.start_main_#t~ite42_Out2130400158|) (= |ULTIMATE.start_main_#t~ite41_Out2130400158| ~y$w_buff0_used~0_In2130400158) .cse0 (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In2130400158 256) 0))) (or (and .cse1 (= 0 (mod ~y$r_buff1_thd0~0_In2130400158 256))) (= (mod ~y$w_buff0_used~0_In2130400158 256) 0) (and (= (mod ~y$w_buff1_used~0_In2130400158 256) 0) .cse1)))))) InVars {ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_In2130400158|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2130400158, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2130400158, ~weak$$choice2~0=~weak$$choice2~0_In2130400158, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2130400158, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2130400158} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out2130400158|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2130400158, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In2130400158, ~weak$$choice2~0=~weak$$choice2~0_In2130400158, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out2130400158|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2130400158, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2130400158} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 14:05:25,420 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [736] [736] L826-->L827: Formula: (and (= v_~y$r_buff0_thd0~0_133 v_~y$r_buff0_thd0~0_132) (not (= 0 (mod v_~weak$$choice2~0_33 256)))) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_133, ~weak$$choice2~0=v_~weak$$choice2~0_33} OutVars{~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_132, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_22|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_13|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_8|, ~weak$$choice2~0=v_~weak$$choice2~0_33} AuxVars[] AssignedVars[~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 14:05:25,421 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] L829-->L832-1: Formula: (and (not (= (mod v_~y$flush_delayed~0_45 256) 0)) (= 0 v_~y$flush_delayed~0_44) (= v_~y~0_135 v_~y$mem_tmp~0_33) (= (mod v_~main$tmp_guard1~0_13 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_33, ~y$flush_delayed~0=v_~y$flush_delayed~0_45, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_13} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_22|, ~y$mem_tmp~0=v_~y$mem_tmp~0_33, ~y$flush_delayed~0=v_~y$flush_delayed~0_44, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_13, ~y~0=v_~y~0_135, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ~y$flush_delayed~0, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 14:05:25,421 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L832-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 14:05:25,474 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_e59791a4-5d50-485b-b4de-55f5f94caf92/bin/uautomizer/witness.graphml [2019-12-07 14:05:25,475 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 14:05:25,476 INFO L168 Benchmark]: Toolchain (without parser) took 65052.86 ms. Allocated memory was 1.0 GB in the beginning and 6.9 GB in the end (delta: 5.9 GB). Free memory was 934.4 MB in the beginning and 2.5 GB in the end (delta: -1.6 GB). Peak memory consumption was 4.3 GB. Max. memory is 11.5 GB. [2019-12-07 14:05:25,476 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 955.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 14:05:25,476 INFO L168 Benchmark]: CACSL2BoogieTranslator took 374.28 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 109.6 MB). Free memory was 934.4 MB in the beginning and 1.1 GB in the end (delta: -144.4 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. [2019-12-07 14:05:25,476 INFO L168 Benchmark]: Boogie Procedure Inliner took 42.54 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 14:05:25,477 INFO L168 Benchmark]: Boogie Preprocessor took 26.69 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 14:05:25,477 INFO L168 Benchmark]: RCFGBuilder took 415.50 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. [2019-12-07 14:05:25,477 INFO L168 Benchmark]: TraceAbstraction took 64124.24 ms. Allocated memory was 1.1 GB in the beginning and 6.9 GB in the end (delta: 5.8 GB). Free memory was 1.0 GB in the beginning and 2.6 GB in the end (delta: -1.5 GB). Peak memory consumption was 4.3 GB. Max. memory is 11.5 GB. [2019-12-07 14:05:25,477 INFO L168 Benchmark]: Witness Printer took 66.22 ms. Allocated memory is still 6.9 GB. Free memory was 2.6 GB in the beginning and 2.5 GB in the end (delta: 52.0 MB). Peak memory consumption was 52.0 MB. Max. memory is 11.5 GB. [2019-12-07 14:05:25,479 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 955.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 374.28 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 109.6 MB). Free memory was 934.4 MB in the beginning and 1.1 GB in the end (delta: -144.4 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 42.54 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.69 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 415.50 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 64124.24 ms. Allocated memory was 1.1 GB in the beginning and 6.9 GB in the end (delta: 5.8 GB). Free memory was 1.0 GB in the beginning and 2.6 GB in the end (delta: -1.5 GB). Peak memory consumption was 4.3 GB. Max. memory is 11.5 GB. * Witness Printer took 66.22 ms. Allocated memory is still 6.9 GB. Free memory was 2.6 GB in the beginning and 2.5 GB in the end (delta: 52.0 MB). Peak memory consumption was 52.0 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.0s, 173 ProgramPointsBefore, 94 ProgramPointsAfterwards, 210 TransitionsBefore, 104 TransitionsAfterwards, 17114 CoEnabledTransitionPairs, 7 FixpointIterations, 30 TrivialSequentialCompositions, 44 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 39 ConcurrentYvCompositions, 31 ChoiceCompositions, 5882 VarBasedMoverChecksPositive, 246 VarBasedMoverChecksNegative, 66 SemBasedMoverChecksPositive, 253 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 78185 CheckedPairsTotal, 113 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L800] FCALL, FORK 0 pthread_create(&t2189, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L730] 1 y$r_buff1_thd0 = y$r_buff0_thd0 [L731] 1 y$r_buff1_thd1 = y$r_buff0_thd1 [L732] 1 y$r_buff1_thd2 = y$r_buff0_thd2 [L733] 1 y$r_buff1_thd3 = y$r_buff0_thd3 [L734] 1 y$r_buff0_thd1 = (_Bool)1 [L737] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L740] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L802] FCALL, FORK 0 pthread_create(&t2190, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L740] 1 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L804] FCALL, FORK 0 pthread_create(&t2191, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L754] 2 x = 2 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L757] 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L741] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L742] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L771] 3 __unbuffered_p2_EAX = x [L774] 3 y = 1 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2] [L777] 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2] [L758] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L759] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L760] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L778] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L779] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L780] 3 y$r_buff0_thd3 = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 [L810] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L810] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L811] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L812] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L813] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L814] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L817] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L818] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L819] 0 y$flush_delayed = weak$$choice2 [L820] 0 y$mem_tmp = y VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=7, x=2, y=2, y$flush_delayed=7, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L821] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=7, x=2, y=2, y$flush_delayed=7, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L821] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L822] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=7, x=2, y=2, y$flush_delayed=7, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L822] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L823] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L824] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L825] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=7, x=2, y=2, y$flush_delayed=7, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L825] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L827] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=7, x=2, y=2, y$flush_delayed=7, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L827] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L828] 0 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p2_EAX == 2) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=7, x=2, y=2, y$flush_delayed=7, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 164 locations, 2 error locations. Result: UNSAFE, OverallTime: 63.9s, OverallIterations: 18, TraceHistogramMax: 1, AutomataDifference: 8.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 2723 SDtfs, 2051 SDslu, 5157 SDs, 0 SdLazy, 2896 SolverSat, 122 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 124 GetRequests, 26 SyntacticMatches, 15 SemanticMatches, 83 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 140 ImplicationChecksByTransitivity, 0.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=199120occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 37.1s AutomataMinimizationTime, 17 MinimizatonAttempts, 106385 StatesRemovedByMinimization, 13 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.9s InterpolantComputationTime, 788 NumberOfCodeBlocks, 788 NumberOfCodeBlocksAsserted, 18 NumberOfCheckSat, 703 ConstructedInterpolants, 0 QuantifiedInterpolants, 133314 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 17 InterpolantComputations, 17 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...