./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe017_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_ba7f0560-10af-4f2f-97cf-e2b025bbd377/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_ba7f0560-10af-4f2f-97cf-e2b025bbd377/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_ba7f0560-10af-4f2f-97cf-e2b025bbd377/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_ba7f0560-10af-4f2f-97cf-e2b025bbd377/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe017_rmo.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_ba7f0560-10af-4f2f-97cf-e2b025bbd377/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_ba7f0560-10af-4f2f-97cf-e2b025bbd377/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 4ce70e3247eb8a40deba8ffa6681029bd0c966d5 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 16:24:36,224 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 16:24:36,225 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 16:24:36,232 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 16:24:36,233 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 16:24:36,233 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 16:24:36,234 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 16:24:36,235 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 16:24:36,237 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 16:24:36,237 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 16:24:36,238 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 16:24:36,239 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 16:24:36,239 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 16:24:36,240 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 16:24:36,240 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 16:24:36,241 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 16:24:36,241 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 16:24:36,242 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 16:24:36,243 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 16:24:36,245 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 16:24:36,246 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 16:24:36,246 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 16:24:36,247 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 16:24:36,247 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 16:24:36,249 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 16:24:36,249 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 16:24:36,249 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 16:24:36,250 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 16:24:36,250 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 16:24:36,251 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 16:24:36,251 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 16:24:36,251 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 16:24:36,252 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 16:24:36,252 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 16:24:36,253 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 16:24:36,253 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 16:24:36,253 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 16:24:36,253 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 16:24:36,253 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 16:24:36,254 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 16:24:36,254 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 16:24:36,255 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_ba7f0560-10af-4f2f-97cf-e2b025bbd377/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 16:24:36,264 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 16:24:36,264 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 16:24:36,265 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 16:24:36,265 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 16:24:36,265 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 16:24:36,265 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 16:24:36,265 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 16:24:36,266 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 16:24:36,266 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 16:24:36,266 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 16:24:36,266 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 16:24:36,266 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 16:24:36,266 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 16:24:36,266 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 16:24:36,266 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 16:24:36,267 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 16:24:36,267 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 16:24:36,267 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 16:24:36,267 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 16:24:36,267 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 16:24:36,267 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 16:24:36,267 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 16:24:36,268 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 16:24:36,268 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 16:24:36,268 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 16:24:36,268 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 16:24:36,268 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 16:24:36,268 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 16:24:36,268 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 16:24:36,268 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_ba7f0560-10af-4f2f-97cf-e2b025bbd377/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 4ce70e3247eb8a40deba8ffa6681029bd0c966d5 [2019-12-07 16:24:36,365 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 16:24:36,373 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 16:24:36,375 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 16:24:36,376 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 16:24:36,377 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 16:24:36,377 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_ba7f0560-10af-4f2f-97cf-e2b025bbd377/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe017_rmo.opt.i [2019-12-07 16:24:36,416 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_ba7f0560-10af-4f2f-97cf-e2b025bbd377/bin/uautomizer/data/62694f6bd/218397144aa241bb8c9cd63fd2a1ba01/FLAG32ad0bae5 [2019-12-07 16:24:36,765 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 16:24:36,766 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_ba7f0560-10af-4f2f-97cf-e2b025bbd377/sv-benchmarks/c/pthread-wmm/safe017_rmo.opt.i [2019-12-07 16:24:36,776 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_ba7f0560-10af-4f2f-97cf-e2b025bbd377/bin/uautomizer/data/62694f6bd/218397144aa241bb8c9cd63fd2a1ba01/FLAG32ad0bae5 [2019-12-07 16:24:36,784 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_ba7f0560-10af-4f2f-97cf-e2b025bbd377/bin/uautomizer/data/62694f6bd/218397144aa241bb8c9cd63fd2a1ba01 [2019-12-07 16:24:36,786 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 16:24:36,787 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 16:24:36,788 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 16:24:36,788 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 16:24:36,790 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 16:24:36,791 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 04:24:36" (1/1) ... [2019-12-07 16:24:36,793 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@25138a46 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:24:36, skipping insertion in model container [2019-12-07 16:24:36,793 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 04:24:36" (1/1) ... [2019-12-07 16:24:36,798 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 16:24:36,826 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 16:24:37,074 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 16:24:37,082 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 16:24:37,125 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 16:24:37,170 INFO L208 MainTranslator]: Completed translation [2019-12-07 16:24:37,171 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:24:37 WrapperNode [2019-12-07 16:24:37,171 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 16:24:37,171 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 16:24:37,172 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 16:24:37,172 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 16:24:37,178 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:24:37" (1/1) ... [2019-12-07 16:24:37,192 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:24:37" (1/1) ... [2019-12-07 16:24:37,213 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 16:24:37,214 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 16:24:37,214 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 16:24:37,214 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 16:24:37,221 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:24:37" (1/1) ... [2019-12-07 16:24:37,221 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:24:37" (1/1) ... [2019-12-07 16:24:37,224 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:24:37" (1/1) ... [2019-12-07 16:24:37,225 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:24:37" (1/1) ... [2019-12-07 16:24:37,231 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:24:37" (1/1) ... [2019-12-07 16:24:37,235 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:24:37" (1/1) ... [2019-12-07 16:24:37,237 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:24:37" (1/1) ... [2019-12-07 16:24:37,240 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 16:24:37,241 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 16:24:37,241 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 16:24:37,241 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 16:24:37,242 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:24:37" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_ba7f0560-10af-4f2f-97cf-e2b025bbd377/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 16:24:37,291 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 16:24:37,291 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 16:24:37,292 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 16:24:37,292 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 16:24:37,292 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 16:24:37,292 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 16:24:37,292 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 16:24:37,292 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 16:24:37,292 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 16:24:37,293 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 16:24:37,293 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 16:24:37,293 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 16:24:37,293 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 16:24:37,294 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 16:24:37,675 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 16:24:37,675 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 16:24:37,676 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 04:24:37 BoogieIcfgContainer [2019-12-07 16:24:37,676 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 16:24:37,676 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 16:24:37,676 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 16:24:37,678 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 16:24:37,678 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 04:24:36" (1/3) ... [2019-12-07 16:24:37,679 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6c5f0ac9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 04:24:37, skipping insertion in model container [2019-12-07 16:24:37,679 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:24:37" (2/3) ... [2019-12-07 16:24:37,679 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6c5f0ac9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 04:24:37, skipping insertion in model container [2019-12-07 16:24:37,679 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 04:24:37" (3/3) ... [2019-12-07 16:24:37,681 INFO L109 eAbstractionObserver]: Analyzing ICFG safe017_rmo.opt.i [2019-12-07 16:24:37,687 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 16:24:37,687 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 16:24:37,693 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 16:24:37,693 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 16:24:37,720 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,720 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,721 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,721 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,721 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,721 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,721 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,721 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,721 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,722 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,723 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,724 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,724 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,724 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,724 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,724 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,724 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,724 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,725 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,725 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,725 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,725 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,725 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,725 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,725 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,725 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,725 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,726 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,726 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,726 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,726 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,726 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,726 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,726 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,726 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,726 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,727 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,727 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,727 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,727 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,727 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,727 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,727 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,727 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,728 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,728 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,728 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,728 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,728 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,728 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,728 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,728 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,729 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,729 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,729 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,729 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,729 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,729 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,729 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,729 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,729 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,730 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,730 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,730 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,730 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,730 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,730 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,730 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,730 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,730 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,730 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,731 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,731 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,731 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,731 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,731 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,731 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,731 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:24:37,742 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 16:24:37,754 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 16:24:37,755 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 16:24:37,755 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 16:24:37,755 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 16:24:37,755 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 16:24:37,755 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 16:24:37,755 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 16:24:37,755 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 16:24:37,767 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 173 places, 210 transitions [2019-12-07 16:24:37,768 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 173 places, 210 transitions [2019-12-07 16:24:37,821 INFO L134 PetriNetUnfolder]: 47/207 cut-off events. [2019-12-07 16:24:37,821 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 16:24:37,832 INFO L76 FinitePrefix]: Finished finitePrefix Result has 217 conditions, 207 events. 47/207 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 585 event pairs. 9/167 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 16:24:37,846 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 173 places, 210 transitions [2019-12-07 16:24:37,873 INFO L134 PetriNetUnfolder]: 47/207 cut-off events. [2019-12-07 16:24:37,873 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 16:24:37,878 INFO L76 FinitePrefix]: Finished finitePrefix Result has 217 conditions, 207 events. 47/207 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 585 event pairs. 9/167 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 16:24:37,892 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 17114 [2019-12-07 16:24:37,892 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 16:24:40,740 WARN L192 SmtUtils]: Spent 128.00 ms on a formula simplification. DAG size of input: 85 DAG size of output: 83 [2019-12-07 16:24:40,825 INFO L206 etLargeBlockEncoding]: Checked pairs total: 78185 [2019-12-07 16:24:40,825 INFO L214 etLargeBlockEncoding]: Total number of compositions: 113 [2019-12-07 16:24:40,827 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 94 places, 104 transitions [2019-12-07 16:24:53,575 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 112926 states. [2019-12-07 16:24:53,576 INFO L276 IsEmpty]: Start isEmpty. Operand 112926 states. [2019-12-07 16:24:53,580 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 16:24:53,580 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:24:53,581 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 16:24:53,581 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:24:53,585 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:24:53,585 INFO L82 PathProgramCache]: Analyzing trace with hash 844394, now seen corresponding path program 1 times [2019-12-07 16:24:53,590 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:24:53,590 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [892607838] [2019-12-07 16:24:53,591 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:24:53,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:24:53,743 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:24:53,743 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [892607838] [2019-12-07 16:24:53,744 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:24:53,744 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 16:24:53,745 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1938862524] [2019-12-07 16:24:53,748 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:24:53,748 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:24:53,757 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:24:53,758 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:24:53,759 INFO L87 Difference]: Start difference. First operand 112926 states. Second operand 3 states. [2019-12-07 16:24:54,542 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:24:54,542 INFO L93 Difference]: Finished difference Result 112536 states and 479624 transitions. [2019-12-07 16:24:54,543 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:24:54,544 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 16:24:54,544 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:24:55,178 INFO L225 Difference]: With dead ends: 112536 [2019-12-07 16:24:55,178 INFO L226 Difference]: Without dead ends: 110184 [2019-12-07 16:24:55,179 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:24:58,848 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110184 states. [2019-12-07 16:25:00,285 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110184 to 110184. [2019-12-07 16:25:00,286 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 110184 states. [2019-12-07 16:25:00,630 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110184 states to 110184 states and 470020 transitions. [2019-12-07 16:25:00,631 INFO L78 Accepts]: Start accepts. Automaton has 110184 states and 470020 transitions. Word has length 3 [2019-12-07 16:25:00,631 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:25:00,631 INFO L462 AbstractCegarLoop]: Abstraction has 110184 states and 470020 transitions. [2019-12-07 16:25:00,632 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:25:00,632 INFO L276 IsEmpty]: Start isEmpty. Operand 110184 states and 470020 transitions. [2019-12-07 16:25:00,635 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 16:25:00,635 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:25:00,635 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:25:00,635 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:25:00,635 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:25:00,635 INFO L82 PathProgramCache]: Analyzing trace with hash -418531443, now seen corresponding path program 1 times [2019-12-07 16:25:00,635 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:25:00,636 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [47361817] [2019-12-07 16:25:00,636 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:25:00,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:25:00,708 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:25:00,708 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [47361817] [2019-12-07 16:25:00,709 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:25:00,709 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:25:00,709 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1714056619] [2019-12-07 16:25:00,710 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:25:00,710 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:25:00,710 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:25:00,710 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:25:00,710 INFO L87 Difference]: Start difference. First operand 110184 states and 470020 transitions. Second operand 4 states. [2019-12-07 16:25:03,612 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:25:03,612 INFO L93 Difference]: Finished difference Result 172298 states and 706272 transitions. [2019-12-07 16:25:03,613 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:25:03,613 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 16:25:03,614 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:25:04,055 INFO L225 Difference]: With dead ends: 172298 [2019-12-07 16:25:04,055 INFO L226 Difference]: Without dead ends: 172249 [2019-12-07 16:25:04,056 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:25:08,150 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172249 states. [2019-12-07 16:25:10,243 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172249 to 156321. [2019-12-07 16:25:10,244 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156321 states. [2019-12-07 16:25:10,656 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156321 states to 156321 states and 647667 transitions. [2019-12-07 16:25:10,657 INFO L78 Accepts]: Start accepts. Automaton has 156321 states and 647667 transitions. Word has length 11 [2019-12-07 16:25:10,657 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:25:10,657 INFO L462 AbstractCegarLoop]: Abstraction has 156321 states and 647667 transitions. [2019-12-07 16:25:10,657 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:25:10,657 INFO L276 IsEmpty]: Start isEmpty. Operand 156321 states and 647667 transitions. [2019-12-07 16:25:10,663 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 16:25:10,664 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:25:10,664 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:25:10,664 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:25:10,664 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:25:10,664 INFO L82 PathProgramCache]: Analyzing trace with hash -986312255, now seen corresponding path program 1 times [2019-12-07 16:25:10,665 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:25:10,665 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1445095255] [2019-12-07 16:25:10,665 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:25:10,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:25:10,739 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:25:10,740 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1445095255] [2019-12-07 16:25:10,740 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:25:10,740 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:25:10,740 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [177138326] [2019-12-07 16:25:10,740 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:25:10,740 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:25:10,740 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:25:10,741 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:25:10,741 INFO L87 Difference]: Start difference. First operand 156321 states and 647667 transitions. Second operand 4 states. [2019-12-07 16:25:11,950 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:25:11,950 INFO L93 Difference]: Finished difference Result 198223 states and 807102 transitions. [2019-12-07 16:25:11,951 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:25:11,951 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 16:25:11,951 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:25:12,447 INFO L225 Difference]: With dead ends: 198223 [2019-12-07 16:25:12,447 INFO L226 Difference]: Without dead ends: 198223 [2019-12-07 16:25:12,448 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:25:19,001 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 198223 states. [2019-12-07 16:25:21,187 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 198223 to 177721. [2019-12-07 16:25:21,187 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177721 states. [2019-12-07 16:25:21,703 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177721 states to 177721 states and 730453 transitions. [2019-12-07 16:25:21,703 INFO L78 Accepts]: Start accepts. Automaton has 177721 states and 730453 transitions. Word has length 13 [2019-12-07 16:25:21,704 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:25:21,704 INFO L462 AbstractCegarLoop]: Abstraction has 177721 states and 730453 transitions. [2019-12-07 16:25:21,704 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:25:21,704 INFO L276 IsEmpty]: Start isEmpty. Operand 177721 states and 730453 transitions. [2019-12-07 16:25:21,706 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 16:25:21,706 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:25:21,706 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:25:21,706 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:25:21,706 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:25:21,706 INFO L82 PathProgramCache]: Analyzing trace with hash -1176456771, now seen corresponding path program 1 times [2019-12-07 16:25:21,706 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:25:21,707 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [22225960] [2019-12-07 16:25:21,707 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:25:21,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:25:21,760 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:25:21,760 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [22225960] [2019-12-07 16:25:21,760 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:25:21,760 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:25:21,761 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2033684397] [2019-12-07 16:25:21,761 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:25:21,761 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:25:21,761 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:25:21,761 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:25:21,761 INFO L87 Difference]: Start difference. First operand 177721 states and 730453 transitions. Second operand 4 states. [2019-12-07 16:25:23,338 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:25:23,338 INFO L93 Difference]: Finished difference Result 245470 states and 990922 transitions. [2019-12-07 16:25:23,339 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:25:23,339 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 16:25:23,339 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:25:23,952 INFO L225 Difference]: With dead ends: 245470 [2019-12-07 16:25:23,952 INFO L226 Difference]: Without dead ends: 245407 [2019-12-07 16:25:23,952 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:25:31,494 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 245407 states. [2019-12-07 16:25:34,221 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 245407 to 199120. [2019-12-07 16:25:34,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 199120 states. [2019-12-07 16:25:34,968 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 199120 states to 199120 states and 817885 transitions. [2019-12-07 16:25:34,969 INFO L78 Accepts]: Start accepts. Automaton has 199120 states and 817885 transitions. Word has length 13 [2019-12-07 16:25:34,969 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:25:34,969 INFO L462 AbstractCegarLoop]: Abstraction has 199120 states and 817885 transitions. [2019-12-07 16:25:34,969 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:25:34,969 INFO L276 IsEmpty]: Start isEmpty. Operand 199120 states and 817885 transitions. [2019-12-07 16:25:34,993 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 16:25:34,993 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:25:34,993 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:25:34,993 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:25:34,993 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:25:34,993 INFO L82 PathProgramCache]: Analyzing trace with hash -1822366328, now seen corresponding path program 1 times [2019-12-07 16:25:34,994 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:25:34,994 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [769662128] [2019-12-07 16:25:34,994 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:25:35,011 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:25:35,031 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:25:35,031 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [769662128] [2019-12-07 16:25:35,031 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:25:35,032 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:25:35,032 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [861538901] [2019-12-07 16:25:35,032 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:25:35,032 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:25:35,032 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:25:35,032 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:25:35,032 INFO L87 Difference]: Start difference. First operand 199120 states and 817885 transitions. Second operand 3 states. [2019-12-07 16:25:35,128 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:25:35,128 INFO L93 Difference]: Finished difference Result 37631 states and 121166 transitions. [2019-12-07 16:25:35,128 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:25:35,128 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 16:25:35,129 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:25:35,179 INFO L225 Difference]: With dead ends: 37631 [2019-12-07 16:25:35,179 INFO L226 Difference]: Without dead ends: 37631 [2019-12-07 16:25:35,179 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:25:35,348 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37631 states. [2019-12-07 16:25:35,690 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37631 to 37631. [2019-12-07 16:25:35,690 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37631 states. [2019-12-07 16:25:35,748 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37631 states to 37631 states and 121166 transitions. [2019-12-07 16:25:35,748 INFO L78 Accepts]: Start accepts. Automaton has 37631 states and 121166 transitions. Word has length 19 [2019-12-07 16:25:35,749 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:25:35,749 INFO L462 AbstractCegarLoop]: Abstraction has 37631 states and 121166 transitions. [2019-12-07 16:25:35,749 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:25:35,749 INFO L276 IsEmpty]: Start isEmpty. Operand 37631 states and 121166 transitions. [2019-12-07 16:25:35,751 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 16:25:35,751 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:25:35,751 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:25:35,751 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:25:35,751 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:25:35,752 INFO L82 PathProgramCache]: Analyzing trace with hash -2012510844, now seen corresponding path program 1 times [2019-12-07 16:25:35,752 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:25:35,752 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1519903495] [2019-12-07 16:25:35,752 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:25:35,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:25:35,828 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:25:35,828 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1519903495] [2019-12-07 16:25:35,828 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:25:35,828 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:25:35,829 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [847673121] [2019-12-07 16:25:35,829 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:25:35,829 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:25:35,829 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:25:35,829 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:25:35,830 INFO L87 Difference]: Start difference. First operand 37631 states and 121166 transitions. Second operand 5 states. [2019-12-07 16:25:36,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:25:36,345 INFO L93 Difference]: Finished difference Result 50788 states and 160280 transitions. [2019-12-07 16:25:36,345 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 16:25:36,345 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 16:25:36,346 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:25:36,419 INFO L225 Difference]: With dead ends: 50788 [2019-12-07 16:25:36,419 INFO L226 Difference]: Without dead ends: 50775 [2019-12-07 16:25:36,419 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 16:25:36,621 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50775 states. [2019-12-07 16:25:37,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50775 to 38059. [2019-12-07 16:25:37,031 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38059 states. [2019-12-07 16:25:37,092 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38059 states to 38059 states and 122380 transitions. [2019-12-07 16:25:37,092 INFO L78 Accepts]: Start accepts. Automaton has 38059 states and 122380 transitions. Word has length 19 [2019-12-07 16:25:37,092 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:25:37,092 INFO L462 AbstractCegarLoop]: Abstraction has 38059 states and 122380 transitions. [2019-12-07 16:25:37,092 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:25:37,093 INFO L276 IsEmpty]: Start isEmpty. Operand 38059 states and 122380 transitions. [2019-12-07 16:25:37,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 16:25:37,098 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:25:37,098 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:25:37,098 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:25:37,098 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:25:37,099 INFO L82 PathProgramCache]: Analyzing trace with hash -394195806, now seen corresponding path program 1 times [2019-12-07 16:25:37,099 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:25:37,099 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2114661588] [2019-12-07 16:25:37,099 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:25:37,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:25:37,129 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:25:37,129 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2114661588] [2019-12-07 16:25:37,129 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:25:37,129 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:25:37,130 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1311516827] [2019-12-07 16:25:37,130 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:25:37,130 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:25:37,130 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:25:37,130 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:25:37,130 INFO L87 Difference]: Start difference. First operand 38059 states and 122380 transitions. Second operand 4 states. [2019-12-07 16:25:37,157 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:25:37,158 INFO L93 Difference]: Finished difference Result 7382 states and 20162 transitions. [2019-12-07 16:25:37,158 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 16:25:37,158 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2019-12-07 16:25:37,158 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:25:37,165 INFO L225 Difference]: With dead ends: 7382 [2019-12-07 16:25:37,165 INFO L226 Difference]: Without dead ends: 7382 [2019-12-07 16:25:37,165 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:25:37,187 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7382 states. [2019-12-07 16:25:37,239 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7382 to 7270. [2019-12-07 16:25:37,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7270 states. [2019-12-07 16:25:37,247 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7270 states to 7270 states and 19842 transitions. [2019-12-07 16:25:37,247 INFO L78 Accepts]: Start accepts. Automaton has 7270 states and 19842 transitions. Word has length 25 [2019-12-07 16:25:37,248 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:25:37,248 INFO L462 AbstractCegarLoop]: Abstraction has 7270 states and 19842 transitions. [2019-12-07 16:25:37,248 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:25:37,248 INFO L276 IsEmpty]: Start isEmpty. Operand 7270 states and 19842 transitions. [2019-12-07 16:25:37,254 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-12-07 16:25:37,254 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:25:37,254 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:25:37,254 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:25:37,255 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:25:37,255 INFO L82 PathProgramCache]: Analyzing trace with hash 56145512, now seen corresponding path program 1 times [2019-12-07 16:25:37,255 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:25:37,255 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [526791864] [2019-12-07 16:25:37,255 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:25:37,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:25:37,415 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:25:37,416 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [526791864] [2019-12-07 16:25:37,416 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:25:37,416 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 16:25:37,416 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [125737423] [2019-12-07 16:25:37,416 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 16:25:37,417 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:25:37,417 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 16:25:37,417 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2019-12-07 16:25:37,417 INFO L87 Difference]: Start difference. First operand 7270 states and 19842 transitions. Second operand 8 states. [2019-12-07 16:25:37,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:25:37,921 INFO L93 Difference]: Finished difference Result 8364 states and 22172 transitions. [2019-12-07 16:25:37,921 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 16:25:37,921 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 37 [2019-12-07 16:25:37,921 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:25:37,928 INFO L225 Difference]: With dead ends: 8364 [2019-12-07 16:25:37,928 INFO L226 Difference]: Without dead ends: 8364 [2019-12-07 16:25:37,928 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 37 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=72, Invalid=200, Unknown=0, NotChecked=0, Total=272 [2019-12-07 16:25:37,950 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8364 states. [2019-12-07 16:25:38,004 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8364 to 7743. [2019-12-07 16:25:38,004 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7743 states. [2019-12-07 16:25:38,013 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7743 states to 7743 states and 20803 transitions. [2019-12-07 16:25:38,013 INFO L78 Accepts]: Start accepts. Automaton has 7743 states and 20803 transitions. Word has length 37 [2019-12-07 16:25:38,013 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:25:38,013 INFO L462 AbstractCegarLoop]: Abstraction has 7743 states and 20803 transitions. [2019-12-07 16:25:38,013 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 16:25:38,013 INFO L276 IsEmpty]: Start isEmpty. Operand 7743 states and 20803 transitions. [2019-12-07 16:25:38,021 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-12-07 16:25:38,021 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:25:38,021 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:25:38,022 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:25:38,022 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:25:38,022 INFO L82 PathProgramCache]: Analyzing trace with hash -2110715921, now seen corresponding path program 1 times [2019-12-07 16:25:38,022 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:25:38,022 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [603646807] [2019-12-07 16:25:38,022 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:25:38,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:25:38,060 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:25:38,061 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [603646807] [2019-12-07 16:25:38,061 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:25:38,061 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 16:25:38,061 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1289142395] [2019-12-07 16:25:38,061 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:25:38,061 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:25:38,061 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:25:38,062 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:25:38,062 INFO L87 Difference]: Start difference. First operand 7743 states and 20803 transitions. Second operand 5 states. [2019-12-07 16:25:38,085 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:25:38,085 INFO L93 Difference]: Finished difference Result 5329 states and 15284 transitions. [2019-12-07 16:25:38,085 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:25:38,085 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 51 [2019-12-07 16:25:38,085 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:25:38,090 INFO L225 Difference]: With dead ends: 5329 [2019-12-07 16:25:38,090 INFO L226 Difference]: Without dead ends: 5329 [2019-12-07 16:25:38,091 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:25:38,110 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5329 states. [2019-12-07 16:25:38,152 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5329 to 4965. [2019-12-07 16:25:38,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4965 states. [2019-12-07 16:25:38,158 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4965 states to 4965 states and 14300 transitions. [2019-12-07 16:25:38,158 INFO L78 Accepts]: Start accepts. Automaton has 4965 states and 14300 transitions. Word has length 51 [2019-12-07 16:25:38,159 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:25:38,159 INFO L462 AbstractCegarLoop]: Abstraction has 4965 states and 14300 transitions. [2019-12-07 16:25:38,159 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:25:38,159 INFO L276 IsEmpty]: Start isEmpty. Operand 4965 states and 14300 transitions. [2019-12-07 16:25:38,165 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 16:25:38,165 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:25:38,165 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:25:38,165 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:25:38,165 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:25:38,165 INFO L82 PathProgramCache]: Analyzing trace with hash 1380306829, now seen corresponding path program 1 times [2019-12-07 16:25:38,166 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:25:38,166 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1305871031] [2019-12-07 16:25:38,166 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:25:38,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:25:38,202 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:25:38,202 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1305871031] [2019-12-07 16:25:38,202 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:25:38,203 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:25:38,203 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [959872600] [2019-12-07 16:25:38,203 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:25:38,203 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:25:38,203 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:25:38,203 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:25:38,204 INFO L87 Difference]: Start difference. First operand 4965 states and 14300 transitions. Second operand 3 states. [2019-12-07 16:25:38,236 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:25:38,236 INFO L93 Difference]: Finished difference Result 4979 states and 14318 transitions. [2019-12-07 16:25:38,237 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:25:38,237 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 16:25:38,237 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:25:38,241 INFO L225 Difference]: With dead ends: 4979 [2019-12-07 16:25:38,241 INFO L226 Difference]: Without dead ends: 4979 [2019-12-07 16:25:38,241 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:25:38,259 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4979 states. [2019-12-07 16:25:38,293 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4979 to 4975. [2019-12-07 16:25:38,293 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4975 states. [2019-12-07 16:25:38,299 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4975 states to 4975 states and 14314 transitions. [2019-12-07 16:25:38,299 INFO L78 Accepts]: Start accepts. Automaton has 4975 states and 14314 transitions. Word has length 65 [2019-12-07 16:25:38,300 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:25:38,300 INFO L462 AbstractCegarLoop]: Abstraction has 4975 states and 14314 transitions. [2019-12-07 16:25:38,300 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:25:38,300 INFO L276 IsEmpty]: Start isEmpty. Operand 4975 states and 14314 transitions. [2019-12-07 16:25:38,305 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 16:25:38,305 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:25:38,305 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:25:38,306 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:25:38,306 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:25:38,306 INFO L82 PathProgramCache]: Analyzing trace with hash 1838424094, now seen corresponding path program 1 times [2019-12-07 16:25:38,306 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:25:38,306 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1464929834] [2019-12-07 16:25:38,306 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:25:38,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:25:38,695 WARN L192 SmtUtils]: Spent 353.00 ms on a formula simplification. DAG size of input: 15 DAG size of output: 10 [2019-12-07 16:25:38,701 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:25:38,702 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1464929834] [2019-12-07 16:25:38,702 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:25:38,702 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:25:38,702 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1297257218] [2019-12-07 16:25:38,702 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:25:38,702 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:25:38,702 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:25:38,703 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:25:38,703 INFO L87 Difference]: Start difference. First operand 4975 states and 14314 transitions. Second operand 3 states. [2019-12-07 16:25:38,720 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:25:38,720 INFO L93 Difference]: Finished difference Result 4687 states and 13265 transitions. [2019-12-07 16:25:38,721 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:25:38,721 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 16:25:38,721 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:25:38,725 INFO L225 Difference]: With dead ends: 4687 [2019-12-07 16:25:38,725 INFO L226 Difference]: Without dead ends: 4687 [2019-12-07 16:25:38,725 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:25:38,743 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4687 states. [2019-12-07 16:25:38,775 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4687 to 4687. [2019-12-07 16:25:38,775 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4687 states. [2019-12-07 16:25:38,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4687 states to 4687 states and 13265 transitions. [2019-12-07 16:25:38,781 INFO L78 Accepts]: Start accepts. Automaton has 4687 states and 13265 transitions. Word has length 65 [2019-12-07 16:25:38,781 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:25:38,781 INFO L462 AbstractCegarLoop]: Abstraction has 4687 states and 13265 transitions. [2019-12-07 16:25:38,781 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:25:38,781 INFO L276 IsEmpty]: Start isEmpty. Operand 4687 states and 13265 transitions. [2019-12-07 16:25:38,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 16:25:38,787 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:25:38,787 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:25:38,787 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:25:38,787 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:25:38,787 INFO L82 PathProgramCache]: Analyzing trace with hash -707320023, now seen corresponding path program 1 times [2019-12-07 16:25:38,787 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:25:38,788 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [73176412] [2019-12-07 16:25:38,788 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:25:38,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:25:38,848 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:25:38,848 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [73176412] [2019-12-07 16:25:38,848 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:25:38,848 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 16:25:38,849 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [449272519] [2019-12-07 16:25:38,849 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:25:38,849 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:25:38,849 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:25:38,849 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:25:38,849 INFO L87 Difference]: Start difference. First operand 4687 states and 13265 transitions. Second operand 5 states. [2019-12-07 16:25:39,046 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:25:39,046 INFO L93 Difference]: Finished difference Result 7111 states and 19996 transitions. [2019-12-07 16:25:39,046 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 16:25:39,046 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 66 [2019-12-07 16:25:39,046 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:25:39,052 INFO L225 Difference]: With dead ends: 7111 [2019-12-07 16:25:39,052 INFO L226 Difference]: Without dead ends: 7111 [2019-12-07 16:25:39,052 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 16:25:39,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7111 states. [2019-12-07 16:25:39,119 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7111 to 6141. [2019-12-07 16:25:39,119 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6141 states. [2019-12-07 16:25:39,126 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6141 states to 6141 states and 17329 transitions. [2019-12-07 16:25:39,126 INFO L78 Accepts]: Start accepts. Automaton has 6141 states and 17329 transitions. Word has length 66 [2019-12-07 16:25:39,126 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:25:39,126 INFO L462 AbstractCegarLoop]: Abstraction has 6141 states and 17329 transitions. [2019-12-07 16:25:39,126 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:25:39,126 INFO L276 IsEmpty]: Start isEmpty. Operand 6141 states and 17329 transitions. [2019-12-07 16:25:39,133 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 16:25:39,133 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:25:39,133 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:25:39,134 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:25:39,134 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:25:39,134 INFO L82 PathProgramCache]: Analyzing trace with hash 429063715, now seen corresponding path program 2 times [2019-12-07 16:25:39,134 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:25:39,134 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2089932263] [2019-12-07 16:25:39,134 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:25:39,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:25:39,200 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:25:39,200 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2089932263] [2019-12-07 16:25:39,200 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:25:39,200 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 16:25:39,200 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1960323936] [2019-12-07 16:25:39,200 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:25:39,201 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:25:39,201 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:25:39,201 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:25:39,201 INFO L87 Difference]: Start difference. First operand 6141 states and 17329 transitions. Second operand 5 states. [2019-12-07 16:25:39,397 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:25:39,397 INFO L93 Difference]: Finished difference Result 8720 states and 24408 transitions. [2019-12-07 16:25:39,398 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 16:25:39,398 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 66 [2019-12-07 16:25:39,398 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:25:39,405 INFO L225 Difference]: With dead ends: 8720 [2019-12-07 16:25:39,406 INFO L226 Difference]: Without dead ends: 8720 [2019-12-07 16:25:39,406 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 16:25:39,430 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8720 states. [2019-12-07 16:25:39,491 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8720 to 6792. [2019-12-07 16:25:39,491 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6792 states. [2019-12-07 16:25:39,499 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6792 states to 6792 states and 19218 transitions. [2019-12-07 16:25:39,499 INFO L78 Accepts]: Start accepts. Automaton has 6792 states and 19218 transitions. Word has length 66 [2019-12-07 16:25:39,499 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:25:39,499 INFO L462 AbstractCegarLoop]: Abstraction has 6792 states and 19218 transitions. [2019-12-07 16:25:39,499 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:25:39,499 INFO L276 IsEmpty]: Start isEmpty. Operand 6792 states and 19218 transitions. [2019-12-07 16:25:39,506 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 16:25:39,506 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:25:39,507 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:25:39,507 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:25:39,507 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:25:39,507 INFO L82 PathProgramCache]: Analyzing trace with hash -2071652769, now seen corresponding path program 3 times [2019-12-07 16:25:39,507 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:25:39,507 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1948171911] [2019-12-07 16:25:39,507 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:25:39,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:25:39,569 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:25:39,569 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1948171911] [2019-12-07 16:25:39,569 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:25:39,569 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 16:25:39,569 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [575486597] [2019-12-07 16:25:39,570 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 16:25:39,570 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:25:39,570 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 16:25:39,570 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 16:25:39,570 INFO L87 Difference]: Start difference. First operand 6792 states and 19218 transitions. Second operand 6 states. [2019-12-07 16:25:39,883 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:25:39,883 INFO L93 Difference]: Finished difference Result 9694 states and 27022 transitions. [2019-12-07 16:25:39,883 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 16:25:39,883 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 66 [2019-12-07 16:25:39,883 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:25:39,891 INFO L225 Difference]: With dead ends: 9694 [2019-12-07 16:25:39,891 INFO L226 Difference]: Without dead ends: 9694 [2019-12-07 16:25:39,891 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-07 16:25:39,917 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9694 states. [2019-12-07 16:25:39,982 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9694 to 7219. [2019-12-07 16:25:39,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7219 states. [2019-12-07 16:25:39,991 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7219 states to 7219 states and 20408 transitions. [2019-12-07 16:25:39,991 INFO L78 Accepts]: Start accepts. Automaton has 7219 states and 20408 transitions. Word has length 66 [2019-12-07 16:25:39,991 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:25:39,991 INFO L462 AbstractCegarLoop]: Abstraction has 7219 states and 20408 transitions. [2019-12-07 16:25:39,991 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 16:25:39,991 INFO L276 IsEmpty]: Start isEmpty. Operand 7219 states and 20408 transitions. [2019-12-07 16:25:39,999 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 16:25:39,999 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:25:39,999 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:25:39,999 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:25:39,999 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:25:40,000 INFO L82 PathProgramCache]: Analyzing trace with hash 1231010579, now seen corresponding path program 4 times [2019-12-07 16:25:40,000 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:25:40,000 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1304367979] [2019-12-07 16:25:40,000 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:25:40,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:25:40,154 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:25:40,154 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1304367979] [2019-12-07 16:25:40,154 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:25:40,154 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 16:25:40,154 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [450549669] [2019-12-07 16:25:40,155 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 16:25:40,155 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:25:40,155 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 16:25:40,155 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2019-12-07 16:25:40,155 INFO L87 Difference]: Start difference. First operand 7219 states and 20408 transitions. Second operand 11 states. [2019-12-07 16:25:40,990 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:25:40,990 INFO L93 Difference]: Finished difference Result 14058 states and 40000 transitions. [2019-12-07 16:25:40,991 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 16:25:40,991 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2019-12-07 16:25:40,991 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:25:41,003 INFO L225 Difference]: With dead ends: 14058 [2019-12-07 16:25:41,003 INFO L226 Difference]: Without dead ends: 14058 [2019-12-07 16:25:41,003 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 56 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=100, Invalid=320, Unknown=0, NotChecked=0, Total=420 [2019-12-07 16:25:41,037 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14058 states. [2019-12-07 16:25:41,116 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14058 to 7483. [2019-12-07 16:25:41,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7483 states. [2019-12-07 16:25:41,125 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7483 states to 7483 states and 21258 transitions. [2019-12-07 16:25:41,125 INFO L78 Accepts]: Start accepts. Automaton has 7483 states and 21258 transitions. Word has length 66 [2019-12-07 16:25:41,125 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:25:41,125 INFO L462 AbstractCegarLoop]: Abstraction has 7483 states and 21258 transitions. [2019-12-07 16:25:41,125 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 16:25:41,126 INFO L276 IsEmpty]: Start isEmpty. Operand 7483 states and 21258 transitions. [2019-12-07 16:25:41,132 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 16:25:41,132 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:25:41,132 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:25:41,132 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:25:41,132 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:25:41,132 INFO L82 PathProgramCache]: Analyzing trace with hash -2078646397, now seen corresponding path program 5 times [2019-12-07 16:25:41,132 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:25:41,132 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [481759052] [2019-12-07 16:25:41,132 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:25:41,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:25:41,168 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:25:41,169 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [481759052] [2019-12-07 16:25:41,169 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:25:41,169 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:25:41,169 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1957900365] [2019-12-07 16:25:41,169 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:25:41,170 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:25:41,170 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:25:41,170 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:25:41,170 INFO L87 Difference]: Start difference. First operand 7483 states and 21258 transitions. Second operand 3 states. [2019-12-07 16:25:41,217 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:25:41,217 INFO L93 Difference]: Finished difference Result 7483 states and 21257 transitions. [2019-12-07 16:25:41,217 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:25:41,217 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 16:25:41,217 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:25:41,226 INFO L225 Difference]: With dead ends: 7483 [2019-12-07 16:25:41,226 INFO L226 Difference]: Without dead ends: 7483 [2019-12-07 16:25:41,226 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:25:41,258 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7483 states. [2019-12-07 16:25:41,310 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7483 to 5439. [2019-12-07 16:25:41,310 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5439 states. [2019-12-07 16:25:41,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5439 states to 5439 states and 15495 transitions. [2019-12-07 16:25:41,317 INFO L78 Accepts]: Start accepts. Automaton has 5439 states and 15495 transitions. Word has length 66 [2019-12-07 16:25:41,317 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:25:41,317 INFO L462 AbstractCegarLoop]: Abstraction has 5439 states and 15495 transitions. [2019-12-07 16:25:41,317 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:25:41,317 INFO L276 IsEmpty]: Start isEmpty. Operand 5439 states and 15495 transitions. [2019-12-07 16:25:41,321 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:25:41,322 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:25:41,322 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:25:41,322 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:25:41,322 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:25:41,322 INFO L82 PathProgramCache]: Analyzing trace with hash 1492386830, now seen corresponding path program 1 times [2019-12-07 16:25:41,322 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:25:41,322 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1116908783] [2019-12-07 16:25:41,322 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:25:41,338 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:25:41,358 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:25:41,358 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1116908783] [2019-12-07 16:25:41,358 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:25:41,358 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:25:41,358 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [403192141] [2019-12-07 16:25:41,358 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:25:41,359 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:25:41,359 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:25:41,359 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:25:41,359 INFO L87 Difference]: Start difference. First operand 5439 states and 15495 transitions. Second operand 3 states. [2019-12-07 16:25:41,375 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:25:41,375 INFO L93 Difference]: Finished difference Result 5017 states and 14017 transitions. [2019-12-07 16:25:41,376 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:25:41,376 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-12-07 16:25:41,376 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:25:41,380 INFO L225 Difference]: With dead ends: 5017 [2019-12-07 16:25:41,380 INFO L226 Difference]: Without dead ends: 5017 [2019-12-07 16:25:41,380 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:25:41,397 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5017 states. [2019-12-07 16:25:41,430 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5017 to 4435. [2019-12-07 16:25:41,430 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4435 states. [2019-12-07 16:25:41,435 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4435 states to 4435 states and 12371 transitions. [2019-12-07 16:25:41,435 INFO L78 Accepts]: Start accepts. Automaton has 4435 states and 12371 transitions. Word has length 67 [2019-12-07 16:25:41,435 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:25:41,435 INFO L462 AbstractCegarLoop]: Abstraction has 4435 states and 12371 transitions. [2019-12-07 16:25:41,435 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:25:41,436 INFO L276 IsEmpty]: Start isEmpty. Operand 4435 states and 12371 transitions. [2019-12-07 16:25:41,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 16:25:41,439 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:25:41,439 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:25:41,439 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:25:41,439 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:25:41,439 INFO L82 PathProgramCache]: Analyzing trace with hash -1149441136, now seen corresponding path program 1 times [2019-12-07 16:25:41,439 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:25:41,439 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1813123704] [2019-12-07 16:25:41,440 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:25:41,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:25:41,604 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:25:41,604 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1813123704] [2019-12-07 16:25:41,604 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:25:41,604 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 16:25:41,604 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1168686760] [2019-12-07 16:25:41,605 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 16:25:41,605 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:25:41,605 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 16:25:41,605 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=129, Unknown=0, NotChecked=0, Total=156 [2019-12-07 16:25:41,605 INFO L87 Difference]: Start difference. First operand 4435 states and 12371 transitions. Second operand 13 states. [2019-12-07 16:25:41,989 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:25:41,989 INFO L93 Difference]: Finished difference Result 7588 states and 21052 transitions. [2019-12-07 16:25:41,989 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 16:25:41,989 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 68 [2019-12-07 16:25:41,989 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:25:41,994 INFO L225 Difference]: With dead ends: 7588 [2019-12-07 16:25:41,994 INFO L226 Difference]: Without dead ends: 6820 [2019-12-07 16:25:41,995 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 117 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=155, Invalid=601, Unknown=0, NotChecked=0, Total=756 [2019-12-07 16:25:42,014 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6820 states. [2019-12-07 16:25:42,054 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6820 to 5636. [2019-12-07 16:25:42,054 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5636 states. [2019-12-07 16:25:42,061 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5636 states to 5636 states and 15626 transitions. [2019-12-07 16:25:42,061 INFO L78 Accepts]: Start accepts. Automaton has 5636 states and 15626 transitions. Word has length 68 [2019-12-07 16:25:42,061 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:25:42,061 INFO L462 AbstractCegarLoop]: Abstraction has 5636 states and 15626 transitions. [2019-12-07 16:25:42,061 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 16:25:42,061 INFO L276 IsEmpty]: Start isEmpty. Operand 5636 states and 15626 transitions. [2019-12-07 16:25:42,064 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 16:25:42,065 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:25:42,065 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:25:42,065 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:25:42,065 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:25:42,065 INFO L82 PathProgramCache]: Analyzing trace with hash 15770806, now seen corresponding path program 2 times [2019-12-07 16:25:42,065 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:25:42,065 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2092164429] [2019-12-07 16:25:42,065 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:25:42,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 16:25:42,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 16:25:42,149 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 16:25:42,149 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 16:25:42,152 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] ULTIMATE.startENTRY-->L800: Formula: (let ((.cse0 (store |v_#valid_65| 0 0))) (and (= v_~y$mem_tmp~0_39 0) (= 0 v_~y$read_delayed_var~0.offset_7) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t2192~0.base_27|)) (= 0 v_~y$r_buff0_thd3~0_110) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t2192~0.base_27| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t2192~0.base_27|) |v_ULTIMATE.start_main_~#t2192~0.offset_20| 0)) |v_#memory_int_21|) (= v_~main$tmp_guard0~0_18 0) (= v_~weak$$choice2~0_126 0) (= 0 v_~x~0_147) (= v_~y$r_buff0_thd0~0_348 0) (= v_~y$read_delayed~0_7 0) (= v_~y$w_buff1~0_200 0) (= 0 v_~y$w_buff0~0_179) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t2192~0.base_27| 4)) (= v_~y~0_170 0) (< 0 |v_#StackHeapBarrier_17|) (= v_~y$r_buff1_thd0~0_299 0) (= 0 v_~y$r_buff1_thd2~0_193) (= v_~y$r_buff0_thd1~0_223 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t2192~0.base_27|) (= 0 v_~__unbuffered_p2_EAX~0_33) (= 0 v_~y$read_delayed_var~0.base_7) (= 0 v_~y$flush_delayed~0_56) (= |v_#NULL.offset_5| 0) (= v_~y$w_buff1_used~0_482 0) (= 0 v_~y$r_buff1_thd3~0_211) (= |v_#valid_63| (store .cse0 |v_ULTIMATE.start_main_~#t2192~0.base_27| 1)) (= 0 v_~y$r_buff0_thd2~0_114) (= 0 |v_ULTIMATE.start_main_~#t2192~0.offset_20|) (= v_~__unbuffered_cnt~0_132 0) (= v_~y$w_buff0_used~0_741 0) (= 0 v_~weak$$choice0~0_34) (= 0 |v_#NULL.base_5|) (= v_~y$r_buff1_thd1~0_185 0) (= v_~main$tmp_guard1~0_22 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_61|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_27|, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_27|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_45|, ULTIMATE.start_main_~#t2194~0.base=|v_ULTIMATE.start_main_~#t2194~0.base_19|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_141|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_41|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_76|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_62|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_45|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_36|, ~y$mem_tmp~0=v_~y$mem_tmp~0_39, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_211, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_223, ~y$flush_delayed~0=v_~y$flush_delayed~0_56, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_33, ULTIMATE.start_main_~#t2193~0.offset=|v_ULTIMATE.start_main_~#t2193~0.offset_18|, ULTIMATE.start_main_~#t2192~0.base=|v_ULTIMATE.start_main_~#t2192~0.base_27|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_9|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_82|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_54|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_64|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_31|, ~weak$$choice0~0=v_~weak$$choice0~0_34, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_46|, ~y$w_buff1~0=v_~y$w_buff1~0_200, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_114, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_132, ULTIMATE.start_main_~#t2192~0.offset=|v_ULTIMATE.start_main_~#t2192~0.offset_20|, ULTIMATE.start_main_~#t2193~0.base=|v_ULTIMATE.start_main_~#t2193~0.base_23|, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_299, ~x~0=v_~x~0_147, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_61|, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_741, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_73|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_31|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_27|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_22, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_161|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_30|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_51|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_76|, ULTIMATE.start_main_~#t2194~0.offset=|v_ULTIMATE.start_main_~#t2194~0.offset_16|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_185, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_31|, ~y$w_buff0~0=v_~y$w_buff0~0_179, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_110, ~y~0=v_~y~0_170, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_10|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_21|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_43|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_70|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_18, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_25|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_50|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_193, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_75|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_348, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_21|, ~weak$$choice2~0=v_~weak$$choice2~0_126, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_482} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_~#t2194~0.base, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ~y$read_delayed~0, ULTIMATE.start_main_#t~ite52, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t2193~0.offset, ULTIMATE.start_main_~#t2192~0.base, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t2192~0.offset, ULTIMATE.start_main_~#t2193~0.base, ~y$r_buff1_thd0~0, ~x~0, ULTIMATE.start_main_#t~nondet31, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_~#t2194~0.offset, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite51, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 16:25:42,152 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] P0ENTRY-->L4-3: Formula: (and (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_8 0)) (= v_~y$w_buff0_used~0_135 1) (= 2 v_~y$w_buff0~0_28) (= v_~y$w_buff0~0_29 v_~y$w_buff1~0_20) (= v_P0Thread1of1ForFork0_~arg.offset_6 |v_P0Thread1of1ForFork0_#in~arg.offset_8|) (= v_~y$w_buff1_used~0_63 v_~y$w_buff0_used~0_136) (= (ite (not (and (not (= (mod v_~y$w_buff1_used~0_63 256) 0)) (not (= (mod v_~y$w_buff0_used~0_135 256) 0)))) 1 0) |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_8 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|) (= v_P0Thread1of1ForFork0_~arg.base_6 |v_P0Thread1of1ForFork0_#in~arg.base_8|)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_8|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_136, ~y$w_buff0~0=v_~y$w_buff0~0_29, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_8|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_8|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_135, ~y$w_buff1~0=v_~y$w_buff1~0_20, ~y$w_buff0~0=v_~y$w_buff0~0_28, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_8, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_8|, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_6, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_6, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_63} AuxVars[] AssignedVars[~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 16:25:42,153 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L800-1-->L802: Formula: (and (= 0 (select |v_#valid_38| |v_ULTIMATE.start_main_~#t2193~0.base_11|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t2193~0.base_11|) (= (store |v_#valid_38| |v_ULTIMATE.start_main_~#t2193~0.base_11| 1) |v_#valid_37|) (not (= |v_ULTIMATE.start_main_~#t2193~0.base_11| 0)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2193~0.base_11| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2193~0.base_11|) |v_ULTIMATE.start_main_~#t2193~0.offset_10| 1)) |v_#memory_int_11|) (= 0 |v_ULTIMATE.start_main_~#t2193~0.offset_10|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t2193~0.base_11| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_6|, ULTIMATE.start_main_~#t2193~0.offset=|v_ULTIMATE.start_main_~#t2193~0.offset_10|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t2193~0.base=|v_ULTIMATE.start_main_~#t2193~0.base_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_~#t2193~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_~#t2193~0.base] because there is no mapped edge [2019-12-07 16:25:42,153 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [804] [804] L802-1-->L804: Formula: (and (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t2194~0.base_13| 1)) (= 0 |v_ULTIMATE.start_main_~#t2194~0.offset_11|) (not (= 0 |v_ULTIMATE.start_main_~#t2194~0.base_13|)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2194~0.base_13|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2194~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2194~0.base_13|) |v_ULTIMATE.start_main_~#t2194~0.offset_11| 2)) |v_#memory_int_13|) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t2194~0.base_13| 4) |v_#length_17|) (= 0 (select |v_#valid_40| |v_ULTIMATE.start_main_~#t2194~0.base_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t2194~0.offset=|v_ULTIMATE.start_main_~#t2194~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t2194~0.base=|v_ULTIMATE.start_main_~#t2194~0.base_13|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2194~0.offset, ULTIMATE.start_main_#t~nondet22, #valid, #memory_int, ULTIMATE.start_main_~#t2194~0.base, #length] because there is no mapped edge [2019-12-07 16:25:42,154 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [754] [754] L741-->L741-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1691876651 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd1~0_In-1691876651 256)))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out-1691876651|) (not .cse1)) (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-1691876651 |P0Thread1of1ForFork0_#t~ite5_Out-1691876651|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1691876651, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1691876651} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-1691876651|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1691876651, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1691876651} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 16:25:42,154 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L757-2-->L757-4: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In871138327 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd2~0_In871138327 256) 0))) (or (and (= ~y$w_buff1~0_In871138327 |P1Thread1of1ForFork1_#t~ite9_Out871138327|) (not .cse0) (not .cse1)) (and (= ~y~0_In871138327 |P1Thread1of1ForFork1_#t~ite9_Out871138327|) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In871138327, ~y$w_buff1~0=~y$w_buff1~0_In871138327, ~y~0=~y~0_In871138327, ~y$w_buff1_used~0=~y$w_buff1_used~0_In871138327} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In871138327, ~y$w_buff1~0=~y$w_buff1~0_In871138327, P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out871138327|, ~y~0=~y~0_In871138327, ~y$w_buff1_used~0=~y$w_buff1_used~0_In871138327} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9] because there is no mapped edge [2019-12-07 16:25:42,155 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L742-->L742-2: Formula: (let ((.cse2 (= (mod ~y$r_buff1_thd1~0_In-769506329 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In-769506329 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In-769506329 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd1~0_In-769506329 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite6_Out-769506329| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= ~y$w_buff1_used~0_In-769506329 |P0Thread1of1ForFork0_#t~ite6_Out-769506329|) (or .cse1 .cse0)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-769506329, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-769506329, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-769506329, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-769506329} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-769506329|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-769506329, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-769506329, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-769506329, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-769506329} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 16:25:42,155 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L743-->L744: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In-179444638 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd1~0_In-179444638 256) 0)) (.cse2 (= ~y$r_buff0_thd1~0_Out-179444638 ~y$r_buff0_thd1~0_In-179444638))) (or (and (not .cse0) (= ~y$r_buff0_thd1~0_Out-179444638 0) (not .cse1)) (and .cse0 .cse2) (and .cse1 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-179444638, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-179444638} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-179444638, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-179444638|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_Out-179444638} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~y$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 16:25:42,155 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L744-->L744-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff1_thd1~0_In-963034131 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In-963034131 256) 0)) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In-963034131 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd1~0_In-963034131 256)))) (or (and (or .cse0 .cse1) (= ~y$r_buff1_thd1~0_In-963034131 |P0Thread1of1ForFork0_#t~ite8_Out-963034131|) (or .cse2 .cse3)) (and (= 0 |P0Thread1of1ForFork0_#t~ite8_Out-963034131|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-963034131, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-963034131, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-963034131, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-963034131} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-963034131, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-963034131, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-963034131|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-963034131, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-963034131} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 16:25:42,155 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L744-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~y$r_buff1_thd1~0_50 |v_P0Thread1of1ForFork0_#t~ite8_26|) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_50, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_25|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 16:25:42,156 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L777-2-->L777-4: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd3~0_In-613828143 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-613828143 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite15_Out-613828143| ~y$w_buff1~0_In-613828143) (not .cse0) (not .cse1)) (and (= ~y~0_In-613828143 |P2Thread1of1ForFork2_#t~ite15_Out-613828143|) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-613828143, ~y$w_buff1~0=~y$w_buff1~0_In-613828143, ~y~0=~y~0_In-613828143, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-613828143} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-613828143, P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out-613828143|, ~y$w_buff1~0=~y$w_buff1~0_In-613828143, ~y~0=~y~0_In-613828143, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-613828143} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 16:25:42,156 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L777-4-->L778: Formula: (= |v_P2Thread1of1ForFork2_#t~ite15_6| v_~y~0_34) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_6|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_5|, ~y~0=v_~y~0_34, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_5|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, ~y~0, P2Thread1of1ForFork2_#t~ite16] because there is no mapped edge [2019-12-07 16:25:42,156 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [714] [714] L757-4-->L758: Formula: (= |v_P1Thread1of1ForFork1_#t~ite9_6| v_~y~0_38) InVars {P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_6|} OutVars{P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_5|, P1Thread1of1ForFork1_#t~ite10=|v_P1Thread1of1ForFork1_#t~ite10_5|, ~y~0=v_~y~0_38} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10, ~y~0] because there is no mapped edge [2019-12-07 16:25:42,156 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L758-->L758-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In-67096877 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In-67096877 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-67096877 |P1Thread1of1ForFork1_#t~ite11_Out-67096877|)) (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out-67096877|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-67096877, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-67096877} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-67096877, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-67096877, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-67096877|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 16:25:42,156 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L759-->L759-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff1_thd2~0_In-1880639900 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-1880639900 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In-1880639900 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd2~0_In-1880639900 256)))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite12_Out-1880639900|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse3 .cse2) (= ~y$w_buff1_used~0_In-1880639900 |P1Thread1of1ForFork1_#t~ite12_Out-1880639900|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1880639900, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1880639900, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1880639900, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1880639900} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1880639900, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1880639900, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1880639900, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-1880639900|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1880639900} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 16:25:42,156 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L760-->L760-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In-1538250754 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1538250754 256)))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork1_#t~ite13_Out-1538250754| 0)) (and (= |P1Thread1of1ForFork1_#t~ite13_Out-1538250754| ~y$r_buff0_thd2~0_In-1538250754) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1538250754, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1538250754} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1538250754, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1538250754, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-1538250754|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 16:25:42,157 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L761-->L761-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In2141584225 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd2~0_In2141584225 256))) (.cse3 (= (mod ~y$r_buff0_thd2~0_In2141584225 256) 0)) (.cse2 (= (mod ~y$w_buff0_used~0_In2141584225 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite14_Out2141584225| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P1Thread1of1ForFork1_#t~ite14_Out2141584225| ~y$r_buff1_thd2~0_In2141584225) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In2141584225, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2141584225, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2141584225, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2141584225} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In2141584225, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2141584225, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2141584225, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out2141584225|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2141584225} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 16:25:42,157 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L778-->L778-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In-1817934577 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd3~0_In-1817934577 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite17_Out-1817934577| ~y$w_buff0_used~0_In-1817934577)) (and (not .cse1) (= |P2Thread1of1ForFork2_#t~ite17_Out-1817934577| 0) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1817934577, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1817934577} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1817934577, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1817934577, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out-1817934577|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 16:25:42,157 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L779-->L779-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd3~0_In-1753064438 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1753064438 256))) (.cse2 (= (mod ~y$w_buff1_used~0_In-1753064438 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd3~0_In-1753064438 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork2_#t~ite18_Out-1753064438| 0)) (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In-1753064438 |P2Thread1of1ForFork2_#t~ite18_Out-1753064438|) (or .cse2 .cse3)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1753064438, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1753064438, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1753064438, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1753064438} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1753064438, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1753064438, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1753064438, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out-1753064438|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1753064438} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 16:25:42,157 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] L761-2-->P1EXIT: Formula: (and (= v_~__unbuffered_cnt~0_71 (+ v_~__unbuffered_cnt~0_72 1)) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~y$r_buff1_thd2~0_135 |v_P1Thread1of1ForFork1_#t~ite14_40|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_72, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_40|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_135, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_39|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 16:25:42,157 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L780-->L780-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In2009746792 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In2009746792 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite19_Out2009746792| 0) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite19_Out2009746792| ~y$r_buff0_thd3~0_In2009746792)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In2009746792, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In2009746792} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In2009746792, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In2009746792, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out2009746792|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 16:25:42,158 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L781-->L781-2: Formula: (let ((.cse3 (= 0 (mod ~y$w_buff1_used~0_In521762229 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd3~0_In521762229 256))) (.cse1 (= (mod ~y$r_buff0_thd3~0_In521762229 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In521762229 256)))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite20_Out521762229|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse1 .cse0) (= ~y$r_buff1_thd3~0_In521762229 |P2Thread1of1ForFork2_#t~ite20_Out521762229|)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In521762229, ~y$w_buff0_used~0=~y$w_buff0_used~0_In521762229, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In521762229, ~y$w_buff1_used~0=~y$w_buff1_used~0_In521762229} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In521762229, ~y$w_buff0_used~0=~y$w_buff0_used~0_In521762229, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out521762229|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In521762229, ~y$w_buff1_used~0=~y$w_buff1_used~0_In521762229} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 16:25:42,158 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [793] [793] L781-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_66 1) v_~__unbuffered_cnt~0_65) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= |v_P2Thread1of1ForFork2_#t~ite20_34| v_~y$r_buff1_thd3~0_132)) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_132, P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_33|, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_65, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~y$r_buff1_thd3~0, P2Thread1of1ForFork2_#t~ite20, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 16:25:42,158 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L804-1-->L810: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_18) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_18} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_18, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 16:25:42,158 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L810-2-->L810-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite24_Out-121105057| |ULTIMATE.start_main_#t~ite25_Out-121105057|)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-121105057 256))) (.cse2 (= (mod ~y$r_buff1_thd0~0_In-121105057 256) 0))) (or (and .cse0 (= ~y~0_In-121105057 |ULTIMATE.start_main_#t~ite24_Out-121105057|) (or .cse1 .cse2)) (and .cse0 (= |ULTIMATE.start_main_#t~ite24_Out-121105057| ~y$w_buff1~0_In-121105057) (not .cse1) (not .cse2)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-121105057, ~y~0=~y~0_In-121105057, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-121105057, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-121105057} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-121105057, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out-121105057|, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out-121105057|, ~y~0=~y~0_In-121105057, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-121105057, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-121105057} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 16:25:42,158 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L811-->L811-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-800963181 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-800963181 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite26_Out-800963181| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite26_Out-800963181| ~y$w_buff0_used~0_In-800963181)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-800963181, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-800963181} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-800963181, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-800963181, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out-800963181|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 16:25:42,159 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L812-->L812-2: Formula: (let ((.cse3 (= (mod ~y$r_buff0_thd0~0_In246984584 256) 0)) (.cse2 (= (mod ~y$w_buff0_used~0_In246984584 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In246984584 256))) (.cse0 (= (mod ~y$w_buff1_used~0_In246984584 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite27_Out246984584| 0)) (and (or .cse3 .cse2) (= |ULTIMATE.start_main_#t~ite27_Out246984584| ~y$w_buff1_used~0_In246984584) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In246984584, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In246984584, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In246984584, ~y$w_buff1_used~0=~y$w_buff1_used~0_In246984584} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In246984584, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In246984584, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out246984584|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In246984584, ~y$w_buff1_used~0=~y$w_buff1_used~0_In246984584} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 16:25:42,159 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] L813-->L813-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1464606162 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-1464606162 256)))) (or (and (= |ULTIMATE.start_main_#t~ite28_Out-1464606162| ~y$r_buff0_thd0~0_In-1464606162) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite28_Out-1464606162| 0) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1464606162, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1464606162} OutVars{ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out-1464606162|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1464606162, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1464606162} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 16:25:42,159 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [751] [751] L814-->L814-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In117483022 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In117483022 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In117483022 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In117483022 256) 0))) (or (and (or .cse0 .cse1) (= ~y$r_buff1_thd0~0_In117483022 |ULTIMATE.start_main_#t~ite29_Out117483022|) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite29_Out117483022| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In117483022, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In117483022, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In117483022, ~y$w_buff1_used~0=~y$w_buff1_used~0_In117483022} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In117483022, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out117483022|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In117483022, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In117483022, ~y$w_buff1_used~0=~y$w_buff1_used~0_In117483022} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 16:25:42,160 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L823-->L823-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-822714208 256) 0))) (or (and .cse0 (= |ULTIMATE.start_main_#t~ite38_Out-822714208| ~y$w_buff1~0_In-822714208) (= |ULTIMATE.start_main_#t~ite38_Out-822714208| |ULTIMATE.start_main_#t~ite39_Out-822714208|) (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-822714208 256) 0))) (or (= (mod ~y$w_buff0_used~0_In-822714208 256) 0) (and (= 0 (mod ~y$r_buff1_thd0~0_In-822714208 256)) .cse1) (and .cse1 (= (mod ~y$w_buff1_used~0_In-822714208 256) 0))))) (and (not .cse0) (= ~y$w_buff1~0_In-822714208 |ULTIMATE.start_main_#t~ite39_Out-822714208|) (= |ULTIMATE.start_main_#t~ite38_In-822714208| |ULTIMATE.start_main_#t~ite38_Out-822714208|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-822714208, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-822714208, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-822714208, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In-822714208|, ~weak$$choice2~0=~weak$$choice2~0_In-822714208, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-822714208, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-822714208} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-822714208, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-822714208, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out-822714208|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-822714208, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out-822714208|, ~weak$$choice2~0=~weak$$choice2~0_In-822714208, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-822714208, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-822714208} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-12-07 16:25:42,161 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [809] [809] L824-->L824-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1401197284 256) 0))) (or (and (= ~y$w_buff0_used~0_In1401197284 |ULTIMATE.start_main_#t~ite42_Out1401197284|) (= |ULTIMATE.start_main_#t~ite41_In1401197284| |ULTIMATE.start_main_#t~ite41_Out1401197284|) (not .cse0)) (and (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In1401197284 256) 0))) (or (and .cse1 (= 0 (mod ~y$r_buff1_thd0~0_In1401197284 256))) (and .cse1 (= (mod ~y$w_buff1_used~0_In1401197284 256) 0)) (= 0 (mod ~y$w_buff0_used~0_In1401197284 256)))) .cse0 (= |ULTIMATE.start_main_#t~ite41_Out1401197284| |ULTIMATE.start_main_#t~ite42_Out1401197284|) (= |ULTIMATE.start_main_#t~ite41_Out1401197284| ~y$w_buff0_used~0_In1401197284)))) InVars {ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_In1401197284|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1401197284, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1401197284, ~weak$$choice2~0=~weak$$choice2~0_In1401197284, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1401197284, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1401197284} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out1401197284|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1401197284, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1401197284, ~weak$$choice2~0=~weak$$choice2~0_In1401197284, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out1401197284|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1401197284, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1401197284} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 16:25:42,161 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [736] [736] L826-->L827: Formula: (and (= v_~y$r_buff0_thd0~0_133 v_~y$r_buff0_thd0~0_132) (not (= 0 (mod v_~weak$$choice2~0_33 256)))) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_133, ~weak$$choice2~0=v_~weak$$choice2~0_33} OutVars{~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_132, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_22|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_13|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_8|, ~weak$$choice2~0=v_~weak$$choice2~0_33} AuxVars[] AssignedVars[~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 16:25:42,162 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] L829-->L832-1: Formula: (and (not (= (mod v_~y$flush_delayed~0_45 256) 0)) (= 0 v_~y$flush_delayed~0_44) (= v_~y~0_135 v_~y$mem_tmp~0_33) (= (mod v_~main$tmp_guard1~0_13 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_33, ~y$flush_delayed~0=v_~y$flush_delayed~0_45, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_13} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_22|, ~y$mem_tmp~0=v_~y$mem_tmp~0_33, ~y$flush_delayed~0=v_~y$flush_delayed~0_44, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_13, ~y~0=v_~y~0_135, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ~y$flush_delayed~0, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 16:25:42,162 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L832-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 16:25:42,216 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 04:25:42 BasicIcfg [2019-12-07 16:25:42,216 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 16:25:42,216 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 16:25:42,216 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 16:25:42,216 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 16:25:42,217 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 04:24:37" (3/4) ... [2019-12-07 16:25:42,218 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 16:25:42,219 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] ULTIMATE.startENTRY-->L800: Formula: (let ((.cse0 (store |v_#valid_65| 0 0))) (and (= v_~y$mem_tmp~0_39 0) (= 0 v_~y$read_delayed_var~0.offset_7) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t2192~0.base_27|)) (= 0 v_~y$r_buff0_thd3~0_110) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t2192~0.base_27| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t2192~0.base_27|) |v_ULTIMATE.start_main_~#t2192~0.offset_20| 0)) |v_#memory_int_21|) (= v_~main$tmp_guard0~0_18 0) (= v_~weak$$choice2~0_126 0) (= 0 v_~x~0_147) (= v_~y$r_buff0_thd0~0_348 0) (= v_~y$read_delayed~0_7 0) (= v_~y$w_buff1~0_200 0) (= 0 v_~y$w_buff0~0_179) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t2192~0.base_27| 4)) (= v_~y~0_170 0) (< 0 |v_#StackHeapBarrier_17|) (= v_~y$r_buff1_thd0~0_299 0) (= 0 v_~y$r_buff1_thd2~0_193) (= v_~y$r_buff0_thd1~0_223 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t2192~0.base_27|) (= 0 v_~__unbuffered_p2_EAX~0_33) (= 0 v_~y$read_delayed_var~0.base_7) (= 0 v_~y$flush_delayed~0_56) (= |v_#NULL.offset_5| 0) (= v_~y$w_buff1_used~0_482 0) (= 0 v_~y$r_buff1_thd3~0_211) (= |v_#valid_63| (store .cse0 |v_ULTIMATE.start_main_~#t2192~0.base_27| 1)) (= 0 v_~y$r_buff0_thd2~0_114) (= 0 |v_ULTIMATE.start_main_~#t2192~0.offset_20|) (= v_~__unbuffered_cnt~0_132 0) (= v_~y$w_buff0_used~0_741 0) (= 0 v_~weak$$choice0~0_34) (= 0 |v_#NULL.base_5|) (= v_~y$r_buff1_thd1~0_185 0) (= v_~main$tmp_guard1~0_22 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_22|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_61|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_27|, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_27|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_45|, ULTIMATE.start_main_~#t2194~0.base=|v_ULTIMATE.start_main_~#t2194~0.base_19|, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_141|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_41|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_76|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_62|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_45|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_36|, ~y$mem_tmp~0=v_~y$mem_tmp~0_39, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_211, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_223, ~y$flush_delayed~0=v_~y$flush_delayed~0_56, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_33, ULTIMATE.start_main_~#t2193~0.offset=|v_ULTIMATE.start_main_~#t2193~0.offset_18|, ULTIMATE.start_main_~#t2192~0.base=|v_ULTIMATE.start_main_~#t2192~0.base_27|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_9|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_82|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_54|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_64|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_31|, ~weak$$choice0~0=v_~weak$$choice0~0_34, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_46|, ~y$w_buff1~0=v_~y$w_buff1~0_200, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_114, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_132, ULTIMATE.start_main_~#t2192~0.offset=|v_ULTIMATE.start_main_~#t2192~0.offset_20|, ULTIMATE.start_main_~#t2193~0.base=|v_ULTIMATE.start_main_~#t2193~0.base_23|, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_299, ~x~0=v_~x~0_147, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_61|, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_741, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_73|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_31|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_27|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_22, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_161|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_30|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_51|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_76|, ULTIMATE.start_main_~#t2194~0.offset=|v_ULTIMATE.start_main_~#t2194~0.offset_16|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_185, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_31|, ~y$w_buff0~0=v_~y$w_buff0~0_179, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_110, ~y~0=v_~y~0_170, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_10|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_21|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_43|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_70|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_18, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_25|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_50|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_193, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_75|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_19|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_348, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_21|, ~weak$$choice2~0=v_~weak$$choice2~0_126, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_482} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_~#t2194~0.base, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ~y$read_delayed~0, ULTIMATE.start_main_#t~ite52, ~y$mem_tmp~0, ~y$r_buff1_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t2193~0.offset, ULTIMATE.start_main_~#t2192~0.base, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t2192~0.offset, ULTIMATE.start_main_~#t2193~0.base, ~y$r_buff1_thd0~0, ~x~0, ULTIMATE.start_main_#t~nondet31, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_~#t2194~0.offset, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite51, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y~0, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 16:25:42,219 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] P0ENTRY-->L4-3: Formula: (and (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_8 0)) (= v_~y$w_buff0_used~0_135 1) (= 2 v_~y$w_buff0~0_28) (= v_~y$w_buff0~0_29 v_~y$w_buff1~0_20) (= v_P0Thread1of1ForFork0_~arg.offset_6 |v_P0Thread1of1ForFork0_#in~arg.offset_8|) (= v_~y$w_buff1_used~0_63 v_~y$w_buff0_used~0_136) (= (ite (not (and (not (= (mod v_~y$w_buff1_used~0_63 256) 0)) (not (= (mod v_~y$w_buff0_used~0_135 256) 0)))) 1 0) |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_8 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|) (= v_P0Thread1of1ForFork0_~arg.base_6 |v_P0Thread1of1ForFork0_#in~arg.base_8|)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_8|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_136, ~y$w_buff0~0=v_~y$w_buff0~0_29, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_8|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_8|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_135, ~y$w_buff1~0=v_~y$w_buff1~0_20, ~y$w_buff0~0=v_~y$w_buff0~0_28, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_8, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_8|, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_6, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_6|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_6, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_63} AuxVars[] AssignedVars[~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 16:25:42,219 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L800-1-->L802: Formula: (and (= 0 (select |v_#valid_38| |v_ULTIMATE.start_main_~#t2193~0.base_11|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t2193~0.base_11|) (= (store |v_#valid_38| |v_ULTIMATE.start_main_~#t2193~0.base_11| 1) |v_#valid_37|) (not (= |v_ULTIMATE.start_main_~#t2193~0.base_11| 0)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2193~0.base_11| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2193~0.base_11|) |v_ULTIMATE.start_main_~#t2193~0.offset_10| 1)) |v_#memory_int_11|) (= 0 |v_ULTIMATE.start_main_~#t2193~0.offset_10|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t2193~0.base_11| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_12|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_6|, ULTIMATE.start_main_~#t2193~0.offset=|v_ULTIMATE.start_main_~#t2193~0.offset_10|, #valid=|v_#valid_37|, #memory_int=|v_#memory_int_11|, #length=|v_#length_15|, ULTIMATE.start_main_~#t2193~0.base=|v_ULTIMATE.start_main_~#t2193~0.base_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_~#t2193~0.offset, #valid, #memory_int, #length, ULTIMATE.start_main_~#t2193~0.base] because there is no mapped edge [2019-12-07 16:25:42,220 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [804] [804] L802-1-->L804: Formula: (and (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t2194~0.base_13| 1)) (= 0 |v_ULTIMATE.start_main_~#t2194~0.offset_11|) (not (= 0 |v_ULTIMATE.start_main_~#t2194~0.base_13|)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2194~0.base_13|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2194~0.base_13| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2194~0.base_13|) |v_ULTIMATE.start_main_~#t2194~0.offset_11| 2)) |v_#memory_int_13|) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t2194~0.base_13| 4) |v_#length_17|) (= 0 (select |v_#valid_40| |v_ULTIMATE.start_main_~#t2194~0.base_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_14|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t2194~0.offset=|v_ULTIMATE.start_main_~#t2194~0.offset_11|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t2194~0.base=|v_ULTIMATE.start_main_~#t2194~0.base_13|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2194~0.offset, ULTIMATE.start_main_#t~nondet22, #valid, #memory_int, ULTIMATE.start_main_~#t2194~0.base, #length] because there is no mapped edge [2019-12-07 16:25:42,220 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [754] [754] L741-->L741-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1691876651 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd1~0_In-1691876651 256)))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out-1691876651|) (not .cse1)) (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-1691876651 |P0Thread1of1ForFork0_#t~ite5_Out-1691876651|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1691876651, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1691876651} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-1691876651|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1691876651, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1691876651} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 16:25:42,220 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L757-2-->L757-4: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In871138327 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd2~0_In871138327 256) 0))) (or (and (= ~y$w_buff1~0_In871138327 |P1Thread1of1ForFork1_#t~ite9_Out871138327|) (not .cse0) (not .cse1)) (and (= ~y~0_In871138327 |P1Thread1of1ForFork1_#t~ite9_Out871138327|) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In871138327, ~y$w_buff1~0=~y$w_buff1~0_In871138327, ~y~0=~y~0_In871138327, ~y$w_buff1_used~0=~y$w_buff1_used~0_In871138327} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In871138327, ~y$w_buff1~0=~y$w_buff1~0_In871138327, P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out871138327|, ~y~0=~y~0_In871138327, ~y$w_buff1_used~0=~y$w_buff1_used~0_In871138327} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9] because there is no mapped edge [2019-12-07 16:25:42,221 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L742-->L742-2: Formula: (let ((.cse2 (= (mod ~y$r_buff1_thd1~0_In-769506329 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In-769506329 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In-769506329 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd1~0_In-769506329 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite6_Out-769506329| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (= ~y$w_buff1_used~0_In-769506329 |P0Thread1of1ForFork0_#t~ite6_Out-769506329|) (or .cse1 .cse0)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-769506329, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-769506329, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-769506329, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-769506329} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-769506329|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-769506329, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-769506329, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-769506329, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-769506329} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 16:25:42,221 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L743-->L744: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In-179444638 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd1~0_In-179444638 256) 0)) (.cse2 (= ~y$r_buff0_thd1~0_Out-179444638 ~y$r_buff0_thd1~0_In-179444638))) (or (and (not .cse0) (= ~y$r_buff0_thd1~0_Out-179444638 0) (not .cse1)) (and .cse0 .cse2) (and .cse1 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-179444638, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-179444638} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-179444638, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-179444638|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_Out-179444638} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~y$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 16:25:42,221 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L744-->L744-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff1_thd1~0_In-963034131 256))) (.cse1 (= (mod ~y$w_buff1_used~0_In-963034131 256) 0)) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In-963034131 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd1~0_In-963034131 256)))) (or (and (or .cse0 .cse1) (= ~y$r_buff1_thd1~0_In-963034131 |P0Thread1of1ForFork0_#t~ite8_Out-963034131|) (or .cse2 .cse3)) (and (= 0 |P0Thread1of1ForFork0_#t~ite8_Out-963034131|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-963034131, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-963034131, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-963034131, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-963034131} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-963034131, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-963034131, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-963034131|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-963034131, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-963034131} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 16:25:42,221 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L744-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~y$r_buff1_thd1~0_50 |v_P0Thread1of1ForFork0_#t~ite8_26|) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_50, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_25|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 16:25:42,222 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L777-2-->L777-4: Formula: (let ((.cse0 (= (mod ~y$r_buff1_thd3~0_In-613828143 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-613828143 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite15_Out-613828143| ~y$w_buff1~0_In-613828143) (not .cse0) (not .cse1)) (and (= ~y~0_In-613828143 |P2Thread1of1ForFork2_#t~ite15_Out-613828143|) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-613828143, ~y$w_buff1~0=~y$w_buff1~0_In-613828143, ~y~0=~y~0_In-613828143, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-613828143} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-613828143, P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out-613828143|, ~y$w_buff1~0=~y$w_buff1~0_In-613828143, ~y~0=~y~0_In-613828143, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-613828143} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 16:25:42,222 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L777-4-->L778: Formula: (= |v_P2Thread1of1ForFork2_#t~ite15_6| v_~y~0_34) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_6|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_5|, ~y~0=v_~y~0_34, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_5|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, ~y~0, P2Thread1of1ForFork2_#t~ite16] because there is no mapped edge [2019-12-07 16:25:42,222 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [714] [714] L757-4-->L758: Formula: (= |v_P1Thread1of1ForFork1_#t~ite9_6| v_~y~0_38) InVars {P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_6|} OutVars{P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_5|, P1Thread1of1ForFork1_#t~ite10=|v_P1Thread1of1ForFork1_#t~ite10_5|, ~y~0=v_~y~0_38} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10, ~y~0] because there is no mapped edge [2019-12-07 16:25:42,222 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L758-->L758-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In-67096877 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In-67096877 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-67096877 |P1Thread1of1ForFork1_#t~ite11_Out-67096877|)) (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out-67096877|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-67096877, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-67096877} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-67096877, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-67096877, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-67096877|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 16:25:42,222 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L759-->L759-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff1_thd2~0_In-1880639900 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-1880639900 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In-1880639900 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd2~0_In-1880639900 256)))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite12_Out-1880639900|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse3 .cse2) (= ~y$w_buff1_used~0_In-1880639900 |P1Thread1of1ForFork1_#t~ite12_Out-1880639900|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1880639900, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1880639900, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1880639900, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1880639900} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1880639900, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1880639900, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1880639900, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-1880639900|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1880639900} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 16:25:42,222 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L760-->L760-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In-1538250754 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1538250754 256)))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork1_#t~ite13_Out-1538250754| 0)) (and (= |P1Thread1of1ForFork1_#t~ite13_Out-1538250754| ~y$r_buff0_thd2~0_In-1538250754) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1538250754, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1538250754} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1538250754, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1538250754, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-1538250754|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 16:25:42,223 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L761-->L761-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In2141584225 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd2~0_In2141584225 256))) (.cse3 (= (mod ~y$r_buff0_thd2~0_In2141584225 256) 0)) (.cse2 (= (mod ~y$w_buff0_used~0_In2141584225 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite14_Out2141584225| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P1Thread1of1ForFork1_#t~ite14_Out2141584225| ~y$r_buff1_thd2~0_In2141584225) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In2141584225, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2141584225, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2141584225, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2141584225} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In2141584225, ~y$w_buff0_used~0=~y$w_buff0_used~0_In2141584225, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2141584225, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out2141584225|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2141584225} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 16:25:42,223 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L778-->L778-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In-1817934577 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd3~0_In-1817934577 256) 0))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite17_Out-1817934577| ~y$w_buff0_used~0_In-1817934577)) (and (not .cse1) (= |P2Thread1of1ForFork2_#t~ite17_Out-1817934577| 0) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1817934577, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1817934577} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1817934577, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1817934577, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out-1817934577|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 16:25:42,223 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L779-->L779-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd3~0_In-1753064438 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1753064438 256))) (.cse2 (= (mod ~y$w_buff1_used~0_In-1753064438 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd3~0_In-1753064438 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork2_#t~ite18_Out-1753064438| 0)) (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In-1753064438 |P2Thread1of1ForFork2_#t~ite18_Out-1753064438|) (or .cse2 .cse3)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1753064438, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1753064438, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1753064438, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1753064438} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1753064438, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1753064438, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1753064438, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out-1753064438|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1753064438} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 16:25:42,223 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [797] [797] L761-2-->P1EXIT: Formula: (and (= v_~__unbuffered_cnt~0_71 (+ v_~__unbuffered_cnt~0_72 1)) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~y$r_buff1_thd2~0_135 |v_P1Thread1of1ForFork1_#t~ite14_40|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_72, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_40|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_135, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_39|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 16:25:42,223 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L780-->L780-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In2009746792 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In2009746792 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite19_Out2009746792| 0) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite19_Out2009746792| ~y$r_buff0_thd3~0_In2009746792)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In2009746792, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In2009746792} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In2009746792, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In2009746792, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out2009746792|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 16:25:42,224 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L781-->L781-2: Formula: (let ((.cse3 (= 0 (mod ~y$w_buff1_used~0_In521762229 256))) (.cse2 (= 0 (mod ~y$r_buff1_thd3~0_In521762229 256))) (.cse1 (= (mod ~y$r_buff0_thd3~0_In521762229 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In521762229 256)))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite20_Out521762229|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse1 .cse0) (= ~y$r_buff1_thd3~0_In521762229 |P2Thread1of1ForFork2_#t~ite20_Out521762229|)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In521762229, ~y$w_buff0_used~0=~y$w_buff0_used~0_In521762229, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In521762229, ~y$w_buff1_used~0=~y$w_buff1_used~0_In521762229} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In521762229, ~y$w_buff0_used~0=~y$w_buff0_used~0_In521762229, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out521762229|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In521762229, ~y$w_buff1_used~0=~y$w_buff1_used~0_In521762229} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 16:25:42,224 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [793] [793] L781-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_66 1) v_~__unbuffered_cnt~0_65) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= |v_P2Thread1of1ForFork2_#t~ite20_34| v_~y$r_buff1_thd3~0_132)) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_132, P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_33|, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_65, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~y$r_buff1_thd3~0, P2Thread1of1ForFork2_#t~ite20, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 16:25:42,224 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [733] [733] L804-1-->L810: Formula: (and (not (= (mod v_~main$tmp_guard0~0_8 256) 0)) (= v_~main$tmp_guard0~0_8 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_18) 1 0) 0) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_18} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_18, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 16:25:42,224 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L810-2-->L810-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite24_Out-121105057| |ULTIMATE.start_main_#t~ite25_Out-121105057|)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-121105057 256))) (.cse2 (= (mod ~y$r_buff1_thd0~0_In-121105057 256) 0))) (or (and .cse0 (= ~y~0_In-121105057 |ULTIMATE.start_main_#t~ite24_Out-121105057|) (or .cse1 .cse2)) (and .cse0 (= |ULTIMATE.start_main_#t~ite24_Out-121105057| ~y$w_buff1~0_In-121105057) (not .cse1) (not .cse2)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-121105057, ~y~0=~y~0_In-121105057, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-121105057, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-121105057} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-121105057, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out-121105057|, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out-121105057|, ~y~0=~y~0_In-121105057, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-121105057, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-121105057} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 16:25:42,224 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L811-->L811-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-800963181 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-800963181 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite26_Out-800963181| 0) (not .cse0) (not .cse1)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite26_Out-800963181| ~y$w_buff0_used~0_In-800963181)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-800963181, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-800963181} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-800963181, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-800963181, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out-800963181|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 16:25:42,225 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L812-->L812-2: Formula: (let ((.cse3 (= (mod ~y$r_buff0_thd0~0_In246984584 256) 0)) (.cse2 (= (mod ~y$w_buff0_used~0_In246984584 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In246984584 256))) (.cse0 (= (mod ~y$w_buff1_used~0_In246984584 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite27_Out246984584| 0)) (and (or .cse3 .cse2) (= |ULTIMATE.start_main_#t~ite27_Out246984584| ~y$w_buff1_used~0_In246984584) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In246984584, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In246984584, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In246984584, ~y$w_buff1_used~0=~y$w_buff1_used~0_In246984584} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In246984584, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In246984584, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out246984584|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In246984584, ~y$w_buff1_used~0=~y$w_buff1_used~0_In246984584} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 16:25:42,225 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] L813-->L813-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1464606162 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-1464606162 256)))) (or (and (= |ULTIMATE.start_main_#t~ite28_Out-1464606162| ~y$r_buff0_thd0~0_In-1464606162) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite28_Out-1464606162| 0) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1464606162, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1464606162} OutVars{ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out-1464606162|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1464606162, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1464606162} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 16:25:42,225 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [751] [751] L814-->L814-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff1_used~0_In117483022 256))) (.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In117483022 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In117483022 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In117483022 256) 0))) (or (and (or .cse0 .cse1) (= ~y$r_buff1_thd0~0_In117483022 |ULTIMATE.start_main_#t~ite29_Out117483022|) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite29_Out117483022| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In117483022, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In117483022, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In117483022, ~y$w_buff1_used~0=~y$w_buff1_used~0_In117483022} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In117483022, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out117483022|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In117483022, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In117483022, ~y$w_buff1_used~0=~y$w_buff1_used~0_In117483022} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 16:25:42,226 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L823-->L823-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-822714208 256) 0))) (or (and .cse0 (= |ULTIMATE.start_main_#t~ite38_Out-822714208| ~y$w_buff1~0_In-822714208) (= |ULTIMATE.start_main_#t~ite38_Out-822714208| |ULTIMATE.start_main_#t~ite39_Out-822714208|) (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-822714208 256) 0))) (or (= (mod ~y$w_buff0_used~0_In-822714208 256) 0) (and (= 0 (mod ~y$r_buff1_thd0~0_In-822714208 256)) .cse1) (and .cse1 (= (mod ~y$w_buff1_used~0_In-822714208 256) 0))))) (and (not .cse0) (= ~y$w_buff1~0_In-822714208 |ULTIMATE.start_main_#t~ite39_Out-822714208|) (= |ULTIMATE.start_main_#t~ite38_In-822714208| |ULTIMATE.start_main_#t~ite38_Out-822714208|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-822714208, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-822714208, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-822714208, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In-822714208|, ~weak$$choice2~0=~weak$$choice2~0_In-822714208, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-822714208, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-822714208} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-822714208, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-822714208, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out-822714208|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-822714208, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out-822714208|, ~weak$$choice2~0=~weak$$choice2~0_In-822714208, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-822714208, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-822714208} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-12-07 16:25:42,227 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [809] [809] L824-->L824-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1401197284 256) 0))) (or (and (= ~y$w_buff0_used~0_In1401197284 |ULTIMATE.start_main_#t~ite42_Out1401197284|) (= |ULTIMATE.start_main_#t~ite41_In1401197284| |ULTIMATE.start_main_#t~ite41_Out1401197284|) (not .cse0)) (and (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In1401197284 256) 0))) (or (and .cse1 (= 0 (mod ~y$r_buff1_thd0~0_In1401197284 256))) (and .cse1 (= (mod ~y$w_buff1_used~0_In1401197284 256) 0)) (= 0 (mod ~y$w_buff0_used~0_In1401197284 256)))) .cse0 (= |ULTIMATE.start_main_#t~ite41_Out1401197284| |ULTIMATE.start_main_#t~ite42_Out1401197284|) (= |ULTIMATE.start_main_#t~ite41_Out1401197284| ~y$w_buff0_used~0_In1401197284)))) InVars {ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_In1401197284|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1401197284, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1401197284, ~weak$$choice2~0=~weak$$choice2~0_In1401197284, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1401197284, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1401197284} OutVars{ULTIMATE.start_main_#t~ite41=|ULTIMATE.start_main_#t~ite41_Out1401197284|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1401197284, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1401197284, ~weak$$choice2~0=~weak$$choice2~0_In1401197284, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out1401197284|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1401197284, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1401197284} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 16:25:42,227 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [736] [736] L826-->L827: Formula: (and (= v_~y$r_buff0_thd0~0_133 v_~y$r_buff0_thd0~0_132) (not (= 0 (mod v_~weak$$choice2~0_33 256)))) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_133, ~weak$$choice2~0=v_~weak$$choice2~0_33} OutVars{~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_132, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_22|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_13|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_8|, ~weak$$choice2~0=v_~weak$$choice2~0_33} AuxVars[] AssignedVars[~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 16:25:42,228 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] L829-->L832-1: Formula: (and (not (= (mod v_~y$flush_delayed~0_45 256) 0)) (= 0 v_~y$flush_delayed~0_44) (= v_~y~0_135 v_~y$mem_tmp~0_33) (= (mod v_~main$tmp_guard1~0_13 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_33, ~y$flush_delayed~0=v_~y$flush_delayed~0_45, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_13} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_22|, ~y$mem_tmp~0=v_~y$mem_tmp~0_33, ~y$flush_delayed~0=v_~y$flush_delayed~0_44, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_13, ~y~0=v_~y~0_135, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ~y$flush_delayed~0, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 16:25:42,228 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L832-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 16:25:42,281 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_ba7f0560-10af-4f2f-97cf-e2b025bbd377/bin/uautomizer/witness.graphml [2019-12-07 16:25:42,281 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 16:25:42,282 INFO L168 Benchmark]: Toolchain (without parser) took 65494.93 ms. Allocated memory was 1.0 GB in the beginning and 6.9 GB in the end (delta: 5.8 GB). Free memory was 939.4 MB in the beginning and 2.8 GB in the end (delta: -1.9 GB). Peak memory consumption was 3.9 GB. Max. memory is 11.5 GB. [2019-12-07 16:25:42,282 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 960.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 16:25:42,283 INFO L168 Benchmark]: CACSL2BoogieTranslator took 383.31 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 105.9 MB). Free memory was 939.4 MB in the beginning and 1.1 GB in the end (delta: -134.2 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. [2019-12-07 16:25:42,283 INFO L168 Benchmark]: Boogie Procedure Inliner took 42.16 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 16:25:42,283 INFO L168 Benchmark]: Boogie Preprocessor took 26.87 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 16:25:42,283 INFO L168 Benchmark]: RCFGBuilder took 435.00 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.0 MB). Peak memory consumption was 56.0 MB. Max. memory is 11.5 GB. [2019-12-07 16:25:42,283 INFO L168 Benchmark]: TraceAbstraction took 64539.60 ms. Allocated memory was 1.1 GB in the beginning and 6.9 GB in the end (delta: 5.7 GB). Free memory was 1.0 GB in the beginning and 2.9 GB in the end (delta: -1.9 GB). Peak memory consumption was 3.8 GB. Max. memory is 11.5 GB. [2019-12-07 16:25:42,284 INFO L168 Benchmark]: Witness Printer took 64.78 ms. Allocated memory is still 6.9 GB. Free memory was 2.9 GB in the beginning and 2.8 GB in the end (delta: 53.8 MB). Peak memory consumption was 53.8 MB. Max. memory is 11.5 GB. [2019-12-07 16:25:42,285 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 960.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 383.31 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 105.9 MB). Free memory was 939.4 MB in the beginning and 1.1 GB in the end (delta: -134.2 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 42.16 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.87 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 435.00 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.0 MB). Peak memory consumption was 56.0 MB. Max. memory is 11.5 GB. * TraceAbstraction took 64539.60 ms. Allocated memory was 1.1 GB in the beginning and 6.9 GB in the end (delta: 5.7 GB). Free memory was 1.0 GB in the beginning and 2.9 GB in the end (delta: -1.9 GB). Peak memory consumption was 3.8 GB. Max. memory is 11.5 GB. * Witness Printer took 64.78 ms. Allocated memory is still 6.9 GB. Free memory was 2.9 GB in the beginning and 2.8 GB in the end (delta: 53.8 MB). Peak memory consumption was 53.8 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.0s, 173 ProgramPointsBefore, 94 ProgramPointsAfterwards, 210 TransitionsBefore, 104 TransitionsAfterwards, 17114 CoEnabledTransitionPairs, 7 FixpointIterations, 30 TrivialSequentialCompositions, 44 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 39 ConcurrentYvCompositions, 31 ChoiceCompositions, 5882 VarBasedMoverChecksPositive, 246 VarBasedMoverChecksNegative, 66 SemBasedMoverChecksPositive, 253 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 78185 CheckedPairsTotal, 113 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L800] FCALL, FORK 0 pthread_create(&t2192, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L730] 1 y$r_buff1_thd0 = y$r_buff0_thd0 [L731] 1 y$r_buff1_thd1 = y$r_buff0_thd1 [L732] 1 y$r_buff1_thd2 = y$r_buff0_thd2 [L733] 1 y$r_buff1_thd3 = y$r_buff0_thd3 [L734] 1 y$r_buff0_thd1 = (_Bool)1 [L737] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L740] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L802] FCALL, FORK 0 pthread_create(&t2193, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L740] 1 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L804] FCALL, FORK 0 pthread_create(&t2194, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L754] 2 x = 2 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L757] 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L741] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L742] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L771] 3 __unbuffered_p2_EAX = x [L774] 3 y = 1 VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2] [L777] 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=1, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y=2] [L758] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L759] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L760] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L778] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L779] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L780] 3 y$r_buff0_thd3 = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 [L810] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L810] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L811] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L812] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L813] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L814] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L817] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L818] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L819] 0 y$flush_delayed = weak$$choice2 [L820] 0 y$mem_tmp = y VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=7, x=2, y=2, y$flush_delayed=7, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L821] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=7, x=2, y=2, y$flush_delayed=7, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L821] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L822] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=7, x=2, y=2, y$flush_delayed=7, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L822] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L823] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L824] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L825] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=7, x=2, y=2, y$flush_delayed=7, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L825] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L827] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=7, x=2, y=2, y$flush_delayed=7, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L827] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L828] 0 main$tmp_guard1 = !(x == 2 && y == 2 && __unbuffered_p2_EAX == 2) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=7, x=2, y=2, y$flush_delayed=7, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 164 locations, 2 error locations. Result: UNSAFE, OverallTime: 64.3s, OverallIterations: 19, TraceHistogramMax: 1, AutomataDifference: 12.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 2918 SDtfs, 2439 SDslu, 5959 SDs, 0 SdLazy, 4035 SolverSat, 149 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 155 GetRequests, 29 SyntacticMatches, 20 SemanticMatches, 106 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 228 ImplicationChecksByTransitivity, 1.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=199120occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 34.5s AutomataMinimizationTime, 18 MinimizatonAttempts, 112292 StatesRemovedByMinimization, 15 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.3s InterpolantComputationTime, 854 NumberOfCodeBlocks, 854 NumberOfCodeBlocksAsserted, 19 NumberOfCheckSat, 768 ConstructedInterpolants, 0 QuantifiedInterpolants, 163832 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 18 InterpolantComputations, 18 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...