./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe021_power.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_76a49e6b-28a9-46ef-a396-c339fdd5d234/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_76a49e6b-28a9-46ef-a396-c339fdd5d234/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_76a49e6b-28a9-46ef-a396-c339fdd5d234/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_76a49e6b-28a9-46ef-a396-c339fdd5d234/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe021_power.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_76a49e6b-28a9-46ef-a396-c339fdd5d234/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_76a49e6b-28a9-46ef-a396-c339fdd5d234/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 0a0477737bb0156e2d4eb4c0a78a7e6e338f6bf0 ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 11:38:40,070 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 11:38:40,072 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 11:38:40,079 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 11:38:40,079 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 11:38:40,080 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 11:38:40,081 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 11:38:40,082 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 11:38:40,083 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 11:38:40,084 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 11:38:40,085 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 11:38:40,085 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 11:38:40,086 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 11:38:40,086 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 11:38:40,087 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 11:38:40,088 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 11:38:40,088 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 11:38:40,089 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 11:38:40,090 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 11:38:40,091 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 11:38:40,092 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 11:38:40,093 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 11:38:40,094 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 11:38:40,094 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 11:38:40,096 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 11:38:40,096 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 11:38:40,096 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 11:38:40,097 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 11:38:40,097 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 11:38:40,097 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 11:38:40,098 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 11:38:40,098 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 11:38:40,098 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 11:38:40,099 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 11:38:40,099 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 11:38:40,099 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 11:38:40,100 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 11:38:40,100 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 11:38:40,100 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 11:38:40,101 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 11:38:40,101 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 11:38:40,101 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_76a49e6b-28a9-46ef-a396-c339fdd5d234/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 11:38:40,111 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 11:38:40,111 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 11:38:40,112 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 11:38:40,112 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 11:38:40,112 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 11:38:40,112 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 11:38:40,112 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 11:38:40,112 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 11:38:40,112 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 11:38:40,113 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 11:38:40,113 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 11:38:40,113 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 11:38:40,113 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 11:38:40,113 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 11:38:40,113 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 11:38:40,113 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 11:38:40,113 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 11:38:40,114 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 11:38:40,114 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 11:38:40,114 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 11:38:40,114 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 11:38:40,114 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 11:38:40,114 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 11:38:40,114 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 11:38:40,115 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 11:38:40,115 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 11:38:40,115 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 11:38:40,115 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 11:38:40,115 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 11:38:40,115 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_76a49e6b-28a9-46ef-a396-c339fdd5d234/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 0a0477737bb0156e2d4eb4c0a78a7e6e338f6bf0 [2019-12-07 11:38:40,212 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 11:38:40,220 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 11:38:40,222 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 11:38:40,223 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 11:38:40,224 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 11:38:40,224 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_76a49e6b-28a9-46ef-a396-c339fdd5d234/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe021_power.oepc.i [2019-12-07 11:38:40,261 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_76a49e6b-28a9-46ef-a396-c339fdd5d234/bin/uautomizer/data/44f2cab09/4b0abc473801451f986d0480f3a25308/FLAG1c6f8e265 [2019-12-07 11:38:40,715 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 11:38:40,716 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_76a49e6b-28a9-46ef-a396-c339fdd5d234/sv-benchmarks/c/pthread-wmm/safe021_power.oepc.i [2019-12-07 11:38:40,727 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_76a49e6b-28a9-46ef-a396-c339fdd5d234/bin/uautomizer/data/44f2cab09/4b0abc473801451f986d0480f3a25308/FLAG1c6f8e265 [2019-12-07 11:38:40,736 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_76a49e6b-28a9-46ef-a396-c339fdd5d234/bin/uautomizer/data/44f2cab09/4b0abc473801451f986d0480f3a25308 [2019-12-07 11:38:40,738 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 11:38:40,739 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 11:38:40,740 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 11:38:40,740 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 11:38:40,742 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 11:38:40,742 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 11:38:40" (1/1) ... [2019-12-07 11:38:40,744 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1c8002ab and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:38:40, skipping insertion in model container [2019-12-07 11:38:40,744 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 11:38:40" (1/1) ... [2019-12-07 11:38:40,749 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 11:38:40,780 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 11:38:41,024 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 11:38:41,032 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 11:38:41,088 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 11:38:41,154 INFO L208 MainTranslator]: Completed translation [2019-12-07 11:38:41,155 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:38:41 WrapperNode [2019-12-07 11:38:41,155 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 11:38:41,155 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 11:38:41,155 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 11:38:41,155 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 11:38:41,161 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:38:41" (1/1) ... [2019-12-07 11:38:41,176 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:38:41" (1/1) ... [2019-12-07 11:38:41,196 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 11:38:41,196 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 11:38:41,196 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 11:38:41,196 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 11:38:41,203 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:38:41" (1/1) ... [2019-12-07 11:38:41,203 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:38:41" (1/1) ... [2019-12-07 11:38:41,207 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:38:41" (1/1) ... [2019-12-07 11:38:41,207 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:38:41" (1/1) ... [2019-12-07 11:38:41,217 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:38:41" (1/1) ... [2019-12-07 11:38:41,221 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:38:41" (1/1) ... [2019-12-07 11:38:41,224 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:38:41" (1/1) ... [2019-12-07 11:38:41,229 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 11:38:41,230 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 11:38:41,230 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 11:38:41,230 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 11:38:41,231 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:38:41" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_76a49e6b-28a9-46ef-a396-c339fdd5d234/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 11:38:41,274 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 11:38:41,275 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 11:38:41,275 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 11:38:41,275 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 11:38:41,275 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 11:38:41,275 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 11:38:41,275 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 11:38:41,275 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 11:38:41,275 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 11:38:41,275 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 11:38:41,275 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 11:38:41,275 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 11:38:41,276 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 11:38:41,277 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 11:38:41,646 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 11:38:41,646 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 11:38:41,647 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:38:41 BoogieIcfgContainer [2019-12-07 11:38:41,648 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 11:38:41,648 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 11:38:41,649 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 11:38:41,651 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 11:38:41,651 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 11:38:40" (1/3) ... [2019-12-07 11:38:41,652 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@28afabb8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 11:38:41, skipping insertion in model container [2019-12-07 11:38:41,652 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:38:41" (2/3) ... [2019-12-07 11:38:41,652 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@28afabb8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 11:38:41, skipping insertion in model container [2019-12-07 11:38:41,653 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:38:41" (3/3) ... [2019-12-07 11:38:41,654 INFO L109 eAbstractionObserver]: Analyzing ICFG safe021_power.oepc.i [2019-12-07 11:38:41,662 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 11:38:41,663 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 11:38:41,668 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 11:38:41,669 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 11:38:41,694 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,694 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,694 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,694 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,694 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,695 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,695 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,695 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,695 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,695 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,695 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,696 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,696 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,696 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,696 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,696 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,696 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,696 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,696 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,696 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,697 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,697 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,697 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,697 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,697 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,697 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,697 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,697 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,698 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,698 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,698 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,698 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,698 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,698 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,698 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,698 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,699 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,699 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,699 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,699 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,699 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,699 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,699 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,699 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,700 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,700 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,700 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,700 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,700 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,700 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,700 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,700 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,700 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,701 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,701 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,701 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,701 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,701 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,701 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,701 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,701 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,701 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,702 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,702 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,702 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,702 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,703 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,703 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,703 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,703 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,703 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,703 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,703 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,703 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,703 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,704 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,704 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,704 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,704 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,704 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,704 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,704 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,704 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,704 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,704 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,705 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,705 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,705 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,705 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,705 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,705 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,705 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,705 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,705 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,706 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,706 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,706 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,706 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,706 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,706 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,706 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,706 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,706 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,707 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,707 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,707 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,707 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,707 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,707 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,707 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,707 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,707 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,707 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,708 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,708 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,708 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,708 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,708 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,708 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,708 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,708 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,708 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,708 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,709 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,709 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,709 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,709 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,709 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,709 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,709 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,709 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,709 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,709 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,709 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,710 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,710 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,710 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,710 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,710 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,710 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,710 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,710 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,710 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,710 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,711 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,711 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,711 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,711 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,711 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,711 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,711 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,711 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,711 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,711 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,712 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,712 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,712 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,712 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,712 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,712 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,712 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,712 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,712 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,712 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,713 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,713 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,713 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,713 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,713 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,713 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,713 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,713 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,713 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,713 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,714 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,714 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,714 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,714 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,714 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,714 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,714 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,714 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:38:41,725 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 11:38:41,738 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 11:38:41,738 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 11:38:41,738 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 11:38:41,738 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 11:38:41,738 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 11:38:41,738 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 11:38:41,738 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 11:38:41,738 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 11:38:41,748 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 175 places, 212 transitions [2019-12-07 11:38:41,750 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 175 places, 212 transitions [2019-12-07 11:38:41,806 INFO L134 PetriNetUnfolder]: 47/209 cut-off events. [2019-12-07 11:38:41,806 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 11:38:41,816 INFO L76 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 209 events. 47/209 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 12. Compared 702 event pairs. 9/169 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 11:38:41,832 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 175 places, 212 transitions [2019-12-07 11:38:41,864 INFO L134 PetriNetUnfolder]: 47/209 cut-off events. [2019-12-07 11:38:41,864 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 11:38:41,870 INFO L76 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 209 events. 47/209 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 12. Compared 702 event pairs. 9/169 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 11:38:41,885 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 11:38:41,886 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 11:38:45,038 WARN L192 SmtUtils]: Spent 158.00 ms on a formula simplification. DAG size of input: 89 DAG size of output: 87 [2019-12-07 11:38:45,327 INFO L206 etLargeBlockEncoding]: Checked pairs total: 125946 [2019-12-07 11:38:45,327 INFO L214 etLargeBlockEncoding]: Total number of compositions: 121 [2019-12-07 11:38:45,329 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 92 places, 102 transitions [2019-12-07 11:38:59,468 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 111572 states. [2019-12-07 11:38:59,469 INFO L276 IsEmpty]: Start isEmpty. Operand 111572 states. [2019-12-07 11:38:59,473 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 11:38:59,473 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:38:59,473 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 11:38:59,473 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:38:59,477 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:38:59,477 INFO L82 PathProgramCache]: Analyzing trace with hash 912834, now seen corresponding path program 1 times [2019-12-07 11:38:59,482 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:38:59,483 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1005576876] [2019-12-07 11:38:59,483 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:38:59,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:38:59,619 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:38:59,620 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1005576876] [2019-12-07 11:38:59,620 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:38:59,621 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 11:38:59,621 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1798344201] [2019-12-07 11:38:59,624 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:38:59,624 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:38:59,633 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:38:59,634 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:38:59,635 INFO L87 Difference]: Start difference. First operand 111572 states. Second operand 3 states. [2019-12-07 11:39:00,332 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:00,332 INFO L93 Difference]: Finished difference Result 110910 states and 474711 transitions. [2019-12-07 11:39:00,333 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:39:00,334 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 11:39:00,334 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:00,717 INFO L225 Difference]: With dead ends: 110910 [2019-12-07 11:39:00,717 INFO L226 Difference]: Without dead ends: 98066 [2019-12-07 11:39:00,718 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:39:04,083 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98066 states. [2019-12-07 11:39:05,425 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98066 to 98066. [2019-12-07 11:39:05,426 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 98066 states. [2019-12-07 11:39:05,707 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98066 states to 98066 states and 418629 transitions. [2019-12-07 11:39:05,708 INFO L78 Accepts]: Start accepts. Automaton has 98066 states and 418629 transitions. Word has length 3 [2019-12-07 11:39:05,708 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:05,709 INFO L462 AbstractCegarLoop]: Abstraction has 98066 states and 418629 transitions. [2019-12-07 11:39:05,709 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:39:05,709 INFO L276 IsEmpty]: Start isEmpty. Operand 98066 states and 418629 transitions. [2019-12-07 11:39:05,712 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 11:39:05,712 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:05,712 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:05,712 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:05,712 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:05,712 INFO L82 PathProgramCache]: Analyzing trace with hash 1027484309, now seen corresponding path program 1 times [2019-12-07 11:39:05,713 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:39:05,713 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [87354349] [2019-12-07 11:39:05,713 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:05,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:39:05,773 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:39:05,774 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [87354349] [2019-12-07 11:39:05,774 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:39:05,774 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:39:05,774 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1863098530] [2019-12-07 11:39:05,775 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:39:05,775 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:39:05,775 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:39:05,775 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:39:05,775 INFO L87 Difference]: Start difference. First operand 98066 states and 418629 transitions. Second operand 4 states. [2019-12-07 11:39:06,576 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:06,577 INFO L93 Difference]: Finished difference Result 156656 states and 639635 transitions. [2019-12-07 11:39:06,577 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:39:06,577 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 11:39:06,577 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:06,982 INFO L225 Difference]: With dead ends: 156656 [2019-12-07 11:39:06,982 INFO L226 Difference]: Without dead ends: 156558 [2019-12-07 11:39:06,982 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:39:12,971 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156558 states. [2019-12-07 11:39:14,773 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156558 to 142946. [2019-12-07 11:39:14,774 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142946 states. [2019-12-07 11:39:15,366 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142946 states to 142946 states and 591329 transitions. [2019-12-07 11:39:15,367 INFO L78 Accepts]: Start accepts. Automaton has 142946 states and 591329 transitions. Word has length 11 [2019-12-07 11:39:15,367 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:15,367 INFO L462 AbstractCegarLoop]: Abstraction has 142946 states and 591329 transitions. [2019-12-07 11:39:15,367 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:39:15,367 INFO L276 IsEmpty]: Start isEmpty. Operand 142946 states and 591329 transitions. [2019-12-07 11:39:15,371 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 11:39:15,371 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:15,371 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:15,371 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:15,372 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:15,372 INFO L82 PathProgramCache]: Analyzing trace with hash 1461043352, now seen corresponding path program 1 times [2019-12-07 11:39:15,372 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:39:15,372 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1612913819] [2019-12-07 11:39:15,372 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:15,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:39:15,420 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:39:15,421 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1612913819] [2019-12-07 11:39:15,421 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:39:15,421 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:39:15,421 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [371791415] [2019-12-07 11:39:15,421 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:39:15,421 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:39:15,421 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:39:15,422 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:39:15,422 INFO L87 Difference]: Start difference. First operand 142946 states and 591329 transitions. Second operand 4 states. [2019-12-07 11:39:16,395 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:16,395 INFO L93 Difference]: Finished difference Result 205190 states and 828176 transitions. [2019-12-07 11:39:16,396 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:39:16,396 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 11:39:16,396 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:16,914 INFO L225 Difference]: With dead ends: 205190 [2019-12-07 11:39:16,914 INFO L226 Difference]: Without dead ends: 205078 [2019-12-07 11:39:16,914 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:39:21,437 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 205078 states. [2019-12-07 11:39:25,731 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 205078 to 171310. [2019-12-07 11:39:25,732 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171310 states. [2019-12-07 11:39:26,204 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171310 states to 171310 states and 704416 transitions. [2019-12-07 11:39:26,204 INFO L78 Accepts]: Start accepts. Automaton has 171310 states and 704416 transitions. Word has length 13 [2019-12-07 11:39:26,205 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:26,205 INFO L462 AbstractCegarLoop]: Abstraction has 171310 states and 704416 transitions. [2019-12-07 11:39:26,205 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:39:26,205 INFO L276 IsEmpty]: Start isEmpty. Operand 171310 states and 704416 transitions. [2019-12-07 11:39:26,211 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 11:39:26,211 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:26,212 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:26,212 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:26,212 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:26,212 INFO L82 PathProgramCache]: Analyzing trace with hash -876468662, now seen corresponding path program 1 times [2019-12-07 11:39:26,212 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:39:26,212 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1762204847] [2019-12-07 11:39:26,212 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:26,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:39:26,261 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:39:26,262 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1762204847] [2019-12-07 11:39:26,262 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:39:26,262 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:39:26,262 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [517291407] [2019-12-07 11:39:26,262 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:39:26,262 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:39:26,263 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:39:26,263 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:39:26,263 INFO L87 Difference]: Start difference. First operand 171310 states and 704416 transitions. Second operand 5 states. [2019-12-07 11:39:27,782 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:27,782 INFO L93 Difference]: Finished difference Result 231848 states and 943034 transitions. [2019-12-07 11:39:27,783 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 11:39:27,783 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 11:39:27,783 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:28,353 INFO L225 Difference]: With dead ends: 231848 [2019-12-07 11:39:28,353 INFO L226 Difference]: Without dead ends: 231848 [2019-12-07 11:39:28,353 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:39:32,878 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 231848 states. [2019-12-07 11:39:35,907 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 231848 to 191437. [2019-12-07 11:39:35,907 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 191437 states. [2019-12-07 11:39:39,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 191437 states to 191437 states and 785356 transitions. [2019-12-07 11:39:39,624 INFO L78 Accepts]: Start accepts. Automaton has 191437 states and 785356 transitions. Word has length 16 [2019-12-07 11:39:39,624 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:39,624 INFO L462 AbstractCegarLoop]: Abstraction has 191437 states and 785356 transitions. [2019-12-07 11:39:39,624 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:39:39,624 INFO L276 IsEmpty]: Start isEmpty. Operand 191437 states and 785356 transitions. [2019-12-07 11:39:39,642 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 11:39:39,642 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:39,642 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:39,642 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:39,642 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:39,643 INFO L82 PathProgramCache]: Analyzing trace with hash -1118041263, now seen corresponding path program 1 times [2019-12-07 11:39:39,643 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:39:39,643 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1560434574] [2019-12-07 11:39:39,643 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:39,663 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:39:39,693 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:39:39,694 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1560434574] [2019-12-07 11:39:39,694 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:39:39,694 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 11:39:39,694 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [144372056] [2019-12-07 11:39:39,695 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:39:39,695 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:39:39,695 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:39:39,695 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:39:39,695 INFO L87 Difference]: Start difference. First operand 191437 states and 785356 transitions. Second operand 3 states. [2019-12-07 11:39:40,431 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:40,431 INFO L93 Difference]: Finished difference Result 191045 states and 783818 transitions. [2019-12-07 11:39:40,432 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:39:40,432 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 11:39:40,432 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:40,900 INFO L225 Difference]: With dead ends: 191045 [2019-12-07 11:39:40,900 INFO L226 Difference]: Without dead ends: 191045 [2019-12-07 11:39:40,900 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:39:45,263 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 191045 states. [2019-12-07 11:39:47,569 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 191045 to 191045. [2019-12-07 11:39:47,569 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 191045 states. [2019-12-07 11:39:48,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 191045 states to 191045 states and 783818 transitions. [2019-12-07 11:39:48,524 INFO L78 Accepts]: Start accepts. Automaton has 191045 states and 783818 transitions. Word has length 18 [2019-12-07 11:39:48,525 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:48,525 INFO L462 AbstractCegarLoop]: Abstraction has 191045 states and 783818 transitions. [2019-12-07 11:39:48,525 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:39:48,525 INFO L276 IsEmpty]: Start isEmpty. Operand 191045 states and 783818 transitions. [2019-12-07 11:39:48,537 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 11:39:48,537 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:48,537 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:48,537 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:48,537 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:48,537 INFO L82 PathProgramCache]: Analyzing trace with hash 2014810708, now seen corresponding path program 1 times [2019-12-07 11:39:48,537 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:39:48,538 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2139694534] [2019-12-07 11:39:48,538 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:48,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:39:48,583 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:39:48,583 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2139694534] [2019-12-07 11:39:48,584 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:39:48,584 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:39:48,584 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1426532348] [2019-12-07 11:39:48,584 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:39:48,584 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:39:48,584 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:39:48,585 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:39:48,585 INFO L87 Difference]: Start difference. First operand 191045 states and 783818 transitions. Second operand 3 states. [2019-12-07 11:39:49,307 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:39:49,307 INFO L93 Difference]: Finished difference Result 191045 states and 776286 transitions. [2019-12-07 11:39:49,308 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:39:49,308 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 11:39:49,308 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:39:49,766 INFO L225 Difference]: With dead ends: 191045 [2019-12-07 11:39:49,766 INFO L226 Difference]: Without dead ends: 191045 [2019-12-07 11:39:49,766 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:39:54,148 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 191045 states. [2019-12-07 11:39:58,640 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 191045 to 188095. [2019-12-07 11:39:58,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188095 states. [2019-12-07 11:39:59,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188095 states to 188095 states and 765370 transitions. [2019-12-07 11:39:59,156 INFO L78 Accepts]: Start accepts. Automaton has 188095 states and 765370 transitions. Word has length 19 [2019-12-07 11:39:59,156 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:39:59,156 INFO L462 AbstractCegarLoop]: Abstraction has 188095 states and 765370 transitions. [2019-12-07 11:39:59,156 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:39:59,156 INFO L276 IsEmpty]: Start isEmpty. Operand 188095 states and 765370 transitions. [2019-12-07 11:39:59,168 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 11:39:59,168 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:39:59,168 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:39:59,168 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:39:59,168 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:39:59,168 INFO L82 PathProgramCache]: Analyzing trace with hash 1466525918, now seen corresponding path program 1 times [2019-12-07 11:39:59,168 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:39:59,169 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [171350198] [2019-12-07 11:39:59,169 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:39:59,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:39:59,227 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:39:59,227 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [171350198] [2019-12-07 11:39:59,227 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:39:59,227 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:39:59,227 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1708316382] [2019-12-07 11:39:59,228 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:39:59,228 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:39:59,228 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:39:59,228 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:39:59,228 INFO L87 Difference]: Start difference. First operand 188095 states and 765370 transitions. Second operand 4 states. [2019-12-07 11:40:00,775 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:40:00,775 INFO L93 Difference]: Finished difference Result 331252 states and 1337867 transitions. [2019-12-07 11:40:00,776 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:40:00,776 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2019-12-07 11:40:00,776 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:40:01,507 INFO L225 Difference]: With dead ends: 331252 [2019-12-07 11:40:01,507 INFO L226 Difference]: Without dead ends: 298159 [2019-12-07 11:40:01,507 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:40:07,041 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 298159 states. [2019-12-07 11:40:13,933 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 298159 to 281786. [2019-12-07 11:40:13,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 281786 states. [2019-12-07 11:40:14,706 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 281786 states to 281786 states and 1147719 transitions. [2019-12-07 11:40:14,706 INFO L78 Accepts]: Start accepts. Automaton has 281786 states and 1147719 transitions. Word has length 19 [2019-12-07 11:40:14,706 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:40:14,706 INFO L462 AbstractCegarLoop]: Abstraction has 281786 states and 1147719 transitions. [2019-12-07 11:40:14,707 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:40:14,707 INFO L276 IsEmpty]: Start isEmpty. Operand 281786 states and 1147719 transitions. [2019-12-07 11:40:14,722 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 11:40:14,722 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:40:14,722 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:40:14,722 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:40:14,722 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:40:14,723 INFO L82 PathProgramCache]: Analyzing trace with hash -1265267965, now seen corresponding path program 1 times [2019-12-07 11:40:14,723 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:40:14,723 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [201812319] [2019-12-07 11:40:14,723 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:40:14,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:40:14,768 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:40:14,768 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [201812319] [2019-12-07 11:40:14,768 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:40:14,768 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:40:14,768 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2033991910] [2019-12-07 11:40:14,768 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:40:14,769 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:40:14,769 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:40:14,769 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:40:14,769 INFO L87 Difference]: Start difference. First operand 281786 states and 1147719 transitions. Second operand 5 states. [2019-12-07 11:40:16,965 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:40:16,965 INFO L93 Difference]: Finished difference Result 380791 states and 1524716 transitions. [2019-12-07 11:40:16,966 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 11:40:16,966 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 11:40:16,966 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:40:17,885 INFO L225 Difference]: With dead ends: 380791 [2019-12-07 11:40:17,885 INFO L226 Difference]: Without dead ends: 380609 [2019-12-07 11:40:17,885 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:40:27,917 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 380609 states. [2019-12-07 11:40:32,275 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 380609 to 292255. [2019-12-07 11:40:32,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 292255 states. [2019-12-07 11:40:33,379 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 292255 states to 292255 states and 1189343 transitions. [2019-12-07 11:40:33,379 INFO L78 Accepts]: Start accepts. Automaton has 292255 states and 1189343 transitions. Word has length 19 [2019-12-07 11:40:33,379 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:40:33,379 INFO L462 AbstractCegarLoop]: Abstraction has 292255 states and 1189343 transitions. [2019-12-07 11:40:33,379 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:40:33,379 INFO L276 IsEmpty]: Start isEmpty. Operand 292255 states and 1189343 transitions. [2019-12-07 11:40:33,402 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 11:40:33,402 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:40:33,402 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:40:33,402 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:40:33,402 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:40:33,402 INFO L82 PathProgramCache]: Analyzing trace with hash -1948660060, now seen corresponding path program 1 times [2019-12-07 11:40:33,402 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:40:33,402 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [132820675] [2019-12-07 11:40:33,402 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:40:33,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:40:33,430 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:40:33,430 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [132820675] [2019-12-07 11:40:33,430 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:40:33,430 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:40:33,431 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [337056602] [2019-12-07 11:40:33,431 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:40:33,431 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:40:33,431 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:40:33,431 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:40:33,431 INFO L87 Difference]: Start difference. First operand 292255 states and 1189343 transitions. Second operand 4 states. [2019-12-07 11:40:36,014 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:40:36,014 INFO L93 Difference]: Finished difference Result 518536 states and 2112700 transitions. [2019-12-07 11:40:36,015 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 11:40:36,015 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 20 [2019-12-07 11:40:36,015 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:40:36,719 INFO L225 Difference]: With dead ends: 518536 [2019-12-07 11:40:36,719 INFO L226 Difference]: Without dead ends: 275976 [2019-12-07 11:40:36,719 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:40:46,014 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 275976 states. [2019-12-07 11:40:49,251 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 275976 to 273684. [2019-12-07 11:40:49,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 273684 states. [2019-12-07 11:40:50,266 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 273684 states to 273684 states and 1104723 transitions. [2019-12-07 11:40:50,266 INFO L78 Accepts]: Start accepts. Automaton has 273684 states and 1104723 transitions. Word has length 20 [2019-12-07 11:40:50,267 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:40:50,267 INFO L462 AbstractCegarLoop]: Abstraction has 273684 states and 1104723 transitions. [2019-12-07 11:40:50,267 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:40:50,267 INFO L276 IsEmpty]: Start isEmpty. Operand 273684 states and 1104723 transitions. [2019-12-07 11:40:50,286 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 11:40:50,286 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:40:50,287 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:40:50,287 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:40:50,287 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:40:50,287 INFO L82 PathProgramCache]: Analyzing trace with hash -1503194098, now seen corresponding path program 2 times [2019-12-07 11:40:50,287 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:40:50,287 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1894894458] [2019-12-07 11:40:50,287 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:40:50,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:40:50,308 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:40:50,308 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1894894458] [2019-12-07 11:40:50,308 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:40:50,308 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:40:50,308 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1861026979] [2019-12-07 11:40:50,308 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:40:50,308 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:40:50,309 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:40:50,309 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:40:50,309 INFO L87 Difference]: Start difference. First operand 273684 states and 1104723 transitions. Second operand 3 states. [2019-12-07 11:40:50,477 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:40:50,477 INFO L93 Difference]: Finished difference Result 55820 states and 177630 transitions. [2019-12-07 11:40:50,477 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:40:50,478 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2019-12-07 11:40:50,478 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:40:50,565 INFO L225 Difference]: With dead ends: 55820 [2019-12-07 11:40:50,565 INFO L226 Difference]: Without dead ends: 55820 [2019-12-07 11:40:50,565 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:40:50,769 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55820 states. [2019-12-07 11:40:51,295 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55820 to 55820. [2019-12-07 11:40:51,296 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55820 states. [2019-12-07 11:40:51,393 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55820 states to 55820 states and 177630 transitions. [2019-12-07 11:40:51,394 INFO L78 Accepts]: Start accepts. Automaton has 55820 states and 177630 transitions. Word has length 20 [2019-12-07 11:40:51,394 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:40:51,394 INFO L462 AbstractCegarLoop]: Abstraction has 55820 states and 177630 transitions. [2019-12-07 11:40:51,394 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:40:51,394 INFO L276 IsEmpty]: Start isEmpty. Operand 55820 states and 177630 transitions. [2019-12-07 11:40:51,401 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 11:40:51,401 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:40:51,401 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:40:51,401 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:40:51,401 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:40:51,401 INFO L82 PathProgramCache]: Analyzing trace with hash -1783143627, now seen corresponding path program 1 times [2019-12-07 11:40:51,401 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:40:51,401 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1840525932] [2019-12-07 11:40:51,401 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:40:51,411 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:40:51,444 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:40:51,444 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1840525932] [2019-12-07 11:40:51,444 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:40:51,444 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:40:51,445 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [991388600] [2019-12-07 11:40:51,445 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:40:51,445 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:40:51,445 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:40:51,445 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:40:51,445 INFO L87 Difference]: Start difference. First operand 55820 states and 177630 transitions. Second operand 6 states. [2019-12-07 11:40:52,619 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:40:52,619 INFO L93 Difference]: Finished difference Result 84530 states and 261877 transitions. [2019-12-07 11:40:52,620 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 11:40:52,620 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-12-07 11:40:52,620 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:40:52,734 INFO L225 Difference]: With dead ends: 84530 [2019-12-07 11:40:52,734 INFO L226 Difference]: Without dead ends: 84474 [2019-12-07 11:40:52,734 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 11:40:52,993 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84474 states. [2019-12-07 11:40:53,753 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84474 to 64411. [2019-12-07 11:40:53,753 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64411 states. [2019-12-07 11:40:53,865 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64411 states to 64411 states and 203034 transitions. [2019-12-07 11:40:53,866 INFO L78 Accepts]: Start accepts. Automaton has 64411 states and 203034 transitions. Word has length 22 [2019-12-07 11:40:53,866 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:40:53,866 INFO L462 AbstractCegarLoop]: Abstraction has 64411 states and 203034 transitions. [2019-12-07 11:40:53,866 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:40:53,866 INFO L276 IsEmpty]: Start isEmpty. Operand 64411 states and 203034 transitions. [2019-12-07 11:40:53,881 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 11:40:53,882 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:40:53,882 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:40:53,882 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:40:53,882 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:40:53,882 INFO L82 PathProgramCache]: Analyzing trace with hash -1026533913, now seen corresponding path program 1 times [2019-12-07 11:40:53,882 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:40:53,882 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [789025725] [2019-12-07 11:40:53,882 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:40:53,890 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:40:53,920 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:40:53,920 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [789025725] [2019-12-07 11:40:53,921 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:40:53,921 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:40:53,921 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [766337682] [2019-12-07 11:40:53,921 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:40:53,921 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:40:53,921 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:40:53,921 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:40:53,921 INFO L87 Difference]: Start difference. First operand 64411 states and 203034 transitions. Second operand 6 states. [2019-12-07 11:40:54,454 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:40:54,455 INFO L93 Difference]: Finished difference Result 83769 states and 257907 transitions. [2019-12-07 11:40:54,455 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 11:40:54,455 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 11:40:54,455 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:40:54,567 INFO L225 Difference]: With dead ends: 83769 [2019-12-07 11:40:54,568 INFO L226 Difference]: Without dead ends: 83448 [2019-12-07 11:40:54,568 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 11:40:55,024 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83448 states. [2019-12-07 11:40:55,727 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83448 to 67614. [2019-12-07 11:40:55,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 67614 states. [2019-12-07 11:40:55,850 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67614 states to 67614 states and 212108 transitions. [2019-12-07 11:40:55,850 INFO L78 Accepts]: Start accepts. Automaton has 67614 states and 212108 transitions. Word has length 27 [2019-12-07 11:40:55,850 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:40:55,850 INFO L462 AbstractCegarLoop]: Abstraction has 67614 states and 212108 transitions. [2019-12-07 11:40:55,850 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:40:55,850 INFO L276 IsEmpty]: Start isEmpty. Operand 67614 states and 212108 transitions. [2019-12-07 11:40:55,870 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 11:40:55,870 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:40:55,870 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:40:55,870 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:40:55,870 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:40:55,870 INFO L82 PathProgramCache]: Analyzing trace with hash 1181071409, now seen corresponding path program 1 times [2019-12-07 11:40:55,870 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:40:55,871 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1360401742] [2019-12-07 11:40:55,871 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:40:55,883 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:40:55,899 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:40:55,900 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1360401742] [2019-12-07 11:40:55,900 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:40:55,900 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:40:55,900 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [539723926] [2019-12-07 11:40:55,900 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:40:55,901 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:40:55,901 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:40:55,901 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:40:55,901 INFO L87 Difference]: Start difference. First operand 67614 states and 212108 transitions. Second operand 4 states. [2019-12-07 11:40:55,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:40:55,994 INFO L93 Difference]: Finished difference Result 25317 states and 75571 transitions. [2019-12-07 11:40:55,994 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 11:40:55,994 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 31 [2019-12-07 11:40:55,995 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:40:56,023 INFO L225 Difference]: With dead ends: 25317 [2019-12-07 11:40:56,023 INFO L226 Difference]: Without dead ends: 25310 [2019-12-07 11:40:56,023 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:40:56,094 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25310 states. [2019-12-07 11:40:56,306 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25310 to 23676. [2019-12-07 11:40:56,306 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23676 states. [2019-12-07 11:40:56,339 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23676 states to 23676 states and 70887 transitions. [2019-12-07 11:40:56,340 INFO L78 Accepts]: Start accepts. Automaton has 23676 states and 70887 transitions. Word has length 31 [2019-12-07 11:40:56,340 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:40:56,340 INFO L462 AbstractCegarLoop]: Abstraction has 23676 states and 70887 transitions. [2019-12-07 11:40:56,340 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:40:56,340 INFO L276 IsEmpty]: Start isEmpty. Operand 23676 states and 70887 transitions. [2019-12-07 11:40:56,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 11:40:56,356 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:40:56,356 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:40:56,356 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:40:56,356 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:40:56,356 INFO L82 PathProgramCache]: Analyzing trace with hash 1079552274, now seen corresponding path program 1 times [2019-12-07 11:40:56,356 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:40:56,356 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [90070865] [2019-12-07 11:40:56,356 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:40:56,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:40:56,409 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:40:56,409 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [90070865] [2019-12-07 11:40:56,409 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:40:56,409 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 11:40:56,410 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [406244570] [2019-12-07 11:40:56,410 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 11:40:56,410 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:40:56,410 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 11:40:56,410 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:40:56,410 INFO L87 Difference]: Start difference. First operand 23676 states and 70887 transitions. Second operand 7 states. [2019-12-07 11:40:57,043 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:40:57,043 INFO L93 Difference]: Finished difference Result 31760 states and 92180 transitions. [2019-12-07 11:40:57,044 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 11:40:57,044 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 11:40:57,044 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:40:57,076 INFO L225 Difference]: With dead ends: 31760 [2019-12-07 11:40:57,076 INFO L226 Difference]: Without dead ends: 31760 [2019-12-07 11:40:57,077 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2019-12-07 11:40:57,159 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31760 states. [2019-12-07 11:40:57,535 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31760 to 24224. [2019-12-07 11:40:57,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24224 states. [2019-12-07 11:40:57,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24224 states to 24224 states and 72357 transitions. [2019-12-07 11:40:57,569 INFO L78 Accepts]: Start accepts. Automaton has 24224 states and 72357 transitions. Word has length 33 [2019-12-07 11:40:57,569 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:40:57,569 INFO L462 AbstractCegarLoop]: Abstraction has 24224 states and 72357 transitions. [2019-12-07 11:40:57,569 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 11:40:57,569 INFO L276 IsEmpty]: Start isEmpty. Operand 24224 states and 72357 transitions. [2019-12-07 11:40:57,588 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 11:40:57,588 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:40:57,588 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:40:57,588 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:40:57,588 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:40:57,589 INFO L82 PathProgramCache]: Analyzing trace with hash -1559668611, now seen corresponding path program 1 times [2019-12-07 11:40:57,589 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:40:57,589 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1846241392] [2019-12-07 11:40:57,589 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:40:57,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:40:57,639 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:40:57,639 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1846241392] [2019-12-07 11:40:57,639 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:40:57,639 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 11:40:57,639 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [441957419] [2019-12-07 11:40:57,639 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:40:57,640 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:40:57,640 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:40:57,640 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:40:57,640 INFO L87 Difference]: Start difference. First operand 24224 states and 72357 transitions. Second operand 5 states. [2019-12-07 11:40:58,021 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:40:58,021 INFO L93 Difference]: Finished difference Result 33462 states and 99816 transitions. [2019-12-07 11:40:58,021 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 11:40:58,021 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 11:40:58,021 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:40:58,057 INFO L225 Difference]: With dead ends: 33462 [2019-12-07 11:40:58,057 INFO L226 Difference]: Without dead ends: 33462 [2019-12-07 11:40:58,057 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:40:58,143 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33462 states. [2019-12-07 11:40:58,438 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33462 to 30420. [2019-12-07 11:40:58,438 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30420 states. [2019-12-07 11:40:58,481 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30420 states to 30420 states and 91272 transitions. [2019-12-07 11:40:58,481 INFO L78 Accepts]: Start accepts. Automaton has 30420 states and 91272 transitions. Word has length 41 [2019-12-07 11:40:58,481 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:40:58,481 INFO L462 AbstractCegarLoop]: Abstraction has 30420 states and 91272 transitions. [2019-12-07 11:40:58,482 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:40:58,482 INFO L276 IsEmpty]: Start isEmpty. Operand 30420 states and 91272 transitions. [2019-12-07 11:40:58,510 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 11:40:58,510 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:40:58,511 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:40:58,511 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:40:58,511 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:40:58,511 INFO L82 PathProgramCache]: Analyzing trace with hash 1910371961, now seen corresponding path program 2 times [2019-12-07 11:40:58,511 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:40:58,511 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1908188753] [2019-12-07 11:40:58,511 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:40:58,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:40:58,547 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:40:58,547 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1908188753] [2019-12-07 11:40:58,547 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:40:58,547 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:40:58,547 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [840796575] [2019-12-07 11:40:58,548 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:40:58,548 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:40:58,548 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:40:58,548 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:40:58,548 INFO L87 Difference]: Start difference. First operand 30420 states and 91272 transitions. Second operand 5 states. [2019-12-07 11:40:58,630 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:40:58,630 INFO L93 Difference]: Finished difference Result 28181 states and 86307 transitions. [2019-12-07 11:40:58,630 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:40:58,631 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 11:40:58,631 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:40:58,665 INFO L225 Difference]: With dead ends: 28181 [2019-12-07 11:40:58,665 INFO L226 Difference]: Without dead ends: 27150 [2019-12-07 11:40:58,665 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:40:58,744 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27150 states. [2019-12-07 11:40:58,923 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27150 to 15699. [2019-12-07 11:40:58,923 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15699 states. [2019-12-07 11:40:58,947 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15699 states to 15699 states and 48485 transitions. [2019-12-07 11:40:58,947 INFO L78 Accepts]: Start accepts. Automaton has 15699 states and 48485 transitions. Word has length 41 [2019-12-07 11:40:58,947 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:40:58,948 INFO L462 AbstractCegarLoop]: Abstraction has 15699 states and 48485 transitions. [2019-12-07 11:40:58,948 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:40:58,948 INFO L276 IsEmpty]: Start isEmpty. Operand 15699 states and 48485 transitions. [2019-12-07 11:40:58,961 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 11:40:58,961 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:40:58,961 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:40:58,961 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:40:58,961 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:40:58,961 INFO L82 PathProgramCache]: Analyzing trace with hash -244099463, now seen corresponding path program 1 times [2019-12-07 11:40:58,961 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:40:58,962 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1587044711] [2019-12-07 11:40:58,962 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:40:58,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:40:58,987 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:40:58,988 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1587044711] [2019-12-07 11:40:58,988 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:40:58,988 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:40:58,988 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [581449376] [2019-12-07 11:40:58,989 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:40:58,989 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:40:58,989 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:40:58,989 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:40:58,989 INFO L87 Difference]: Start difference. First operand 15699 states and 48485 transitions. Second operand 3 states. [2019-12-07 11:40:59,057 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:40:59,057 INFO L93 Difference]: Finished difference Result 22146 states and 68882 transitions. [2019-12-07 11:40:59,058 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:40:59,058 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 11:40:59,058 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:40:59,081 INFO L225 Difference]: With dead ends: 22146 [2019-12-07 11:40:59,081 INFO L226 Difference]: Without dead ends: 22146 [2019-12-07 11:40:59,081 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:40:59,145 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22146 states. [2019-12-07 11:40:59,324 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22146 to 17815. [2019-12-07 11:40:59,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17815 states. [2019-12-07 11:40:59,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17815 states to 17815 states and 55837 transitions. [2019-12-07 11:40:59,351 INFO L78 Accepts]: Start accepts. Automaton has 17815 states and 55837 transitions. Word has length 65 [2019-12-07 11:40:59,351 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:40:59,351 INFO L462 AbstractCegarLoop]: Abstraction has 17815 states and 55837 transitions. [2019-12-07 11:40:59,351 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:40:59,351 INFO L276 IsEmpty]: Start isEmpty. Operand 17815 states and 55837 transitions. [2019-12-07 11:40:59,366 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 11:40:59,366 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:40:59,366 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:40:59,367 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:40:59,367 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:40:59,367 INFO L82 PathProgramCache]: Analyzing trace with hash 163828837, now seen corresponding path program 1 times [2019-12-07 11:40:59,367 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:40:59,367 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [265849484] [2019-12-07 11:40:59,367 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:40:59,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:40:59,431 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:40:59,432 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [265849484] [2019-12-07 11:40:59,432 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:40:59,432 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 11:40:59,432 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [188077244] [2019-12-07 11:40:59,432 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 11:40:59,432 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:40:59,432 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 11:40:59,433 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:40:59,433 INFO L87 Difference]: Start difference. First operand 17815 states and 55837 transitions. Second operand 7 states. [2019-12-07 11:41:00,170 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:41:00,170 INFO L93 Difference]: Finished difference Result 26412 states and 80781 transitions. [2019-12-07 11:41:00,171 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 11:41:00,171 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 65 [2019-12-07 11:41:00,171 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:41:00,199 INFO L225 Difference]: With dead ends: 26412 [2019-12-07 11:41:00,200 INFO L226 Difference]: Without dead ends: 26412 [2019-12-07 11:41:00,200 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=52, Invalid=158, Unknown=0, NotChecked=0, Total=210 [2019-12-07 11:41:00,273 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26412 states. [2019-12-07 11:41:00,470 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26412 to 18115. [2019-12-07 11:41:00,470 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18115 states. [2019-12-07 11:41:00,497 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18115 states to 18115 states and 56819 transitions. [2019-12-07 11:41:00,498 INFO L78 Accepts]: Start accepts. Automaton has 18115 states and 56819 transitions. Word has length 65 [2019-12-07 11:41:00,498 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:41:00,498 INFO L462 AbstractCegarLoop]: Abstraction has 18115 states and 56819 transitions. [2019-12-07 11:41:00,498 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 11:41:00,498 INFO L276 IsEmpty]: Start isEmpty. Operand 18115 states and 56819 transitions. [2019-12-07 11:41:00,513 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 11:41:00,513 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:41:00,513 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:41:00,513 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:41:00,513 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:41:00,513 INFO L82 PathProgramCache]: Analyzing trace with hash 1796634723, now seen corresponding path program 2 times [2019-12-07 11:41:00,513 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:41:00,514 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1008420115] [2019-12-07 11:41:00,514 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:41:00,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:41:00,547 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:41:00,548 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1008420115] [2019-12-07 11:41:00,548 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:41:00,548 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:41:00,548 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1761300233] [2019-12-07 11:41:00,548 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:41:00,548 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:41:00,548 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:41:00,548 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:41:00,549 INFO L87 Difference]: Start difference. First operand 18115 states and 56819 transitions. Second operand 3 states. [2019-12-07 11:41:00,629 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:41:00,629 INFO L93 Difference]: Finished difference Result 21496 states and 67208 transitions. [2019-12-07 11:41:00,630 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:41:00,630 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 11:41:00,630 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:41:00,653 INFO L225 Difference]: With dead ends: 21496 [2019-12-07 11:41:00,653 INFO L226 Difference]: Without dead ends: 21496 [2019-12-07 11:41:00,653 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:41:00,717 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21496 states. [2019-12-07 11:41:00,903 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21496 to 18247. [2019-12-07 11:41:00,903 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18247 states. [2019-12-07 11:41:00,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18247 states to 18247 states and 57406 transitions. [2019-12-07 11:41:00,929 INFO L78 Accepts]: Start accepts. Automaton has 18247 states and 57406 transitions. Word has length 65 [2019-12-07 11:41:00,929 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:41:00,929 INFO L462 AbstractCegarLoop]: Abstraction has 18247 states and 57406 transitions. [2019-12-07 11:41:00,929 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:41:00,929 INFO L276 IsEmpty]: Start isEmpty. Operand 18247 states and 57406 transitions. [2019-12-07 11:41:00,944 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:41:00,944 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:41:00,944 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:41:00,944 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:41:00,944 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:41:00,944 INFO L82 PathProgramCache]: Analyzing trace with hash 1092185255, now seen corresponding path program 1 times [2019-12-07 11:41:00,944 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:41:00,945 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1374712849] [2019-12-07 11:41:00,945 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:41:00,959 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:41:01,022 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:41:01,023 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1374712849] [2019-12-07 11:41:01,023 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:41:01,023 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 11:41:01,023 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [183189791] [2019-12-07 11:41:01,023 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 11:41:01,023 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:41:01,023 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 11:41:01,023 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-12-07 11:41:01,023 INFO L87 Difference]: Start difference. First operand 18247 states and 57406 transitions. Second operand 8 states. [2019-12-07 11:41:01,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:41:01,986 INFO L93 Difference]: Finished difference Result 26440 states and 80650 transitions. [2019-12-07 11:41:01,986 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-12-07 11:41:01,986 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 66 [2019-12-07 11:41:01,986 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:41:02,019 INFO L225 Difference]: With dead ends: 26440 [2019-12-07 11:41:02,019 INFO L226 Difference]: Without dead ends: 26440 [2019-12-07 11:41:02,020 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 103 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=100, Invalid=406, Unknown=0, NotChecked=0, Total=506 [2019-12-07 11:41:02,093 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26440 states. [2019-12-07 11:41:02,296 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26440 to 18199. [2019-12-07 11:41:02,296 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18199 states. [2019-12-07 11:41:02,324 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18199 states to 18199 states and 57264 transitions. [2019-12-07 11:41:02,324 INFO L78 Accepts]: Start accepts. Automaton has 18199 states and 57264 transitions. Word has length 66 [2019-12-07 11:41:02,324 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:41:02,324 INFO L462 AbstractCegarLoop]: Abstraction has 18199 states and 57264 transitions. [2019-12-07 11:41:02,324 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 11:41:02,324 INFO L276 IsEmpty]: Start isEmpty. Operand 18199 states and 57264 transitions. [2019-12-07 11:41:02,340 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:41:02,340 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:41:02,340 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:41:02,340 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:41:02,340 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:41:02,340 INFO L82 PathProgramCache]: Analyzing trace with hash 1107820844, now seen corresponding path program 1 times [2019-12-07 11:41:02,340 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:41:02,340 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1222876168] [2019-12-07 11:41:02,340 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:41:02,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:41:02,367 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:41:02,368 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1222876168] [2019-12-07 11:41:02,368 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:41:02,368 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:41:02,368 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1667431388] [2019-12-07 11:41:02,368 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:41:02,368 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:41:02,368 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:41:02,368 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:41:02,368 INFO L87 Difference]: Start difference. First operand 18199 states and 57264 transitions. Second operand 4 states. [2019-12-07 11:41:02,573 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:41:02,573 INFO L93 Difference]: Finished difference Result 29089 states and 92284 transitions. [2019-12-07 11:41:02,574 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:41:02,574 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-12-07 11:41:02,574 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:41:02,608 INFO L225 Difference]: With dead ends: 29089 [2019-12-07 11:41:02,608 INFO L226 Difference]: Without dead ends: 29089 [2019-12-07 11:41:02,608 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:41:02,686 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29089 states. [2019-12-07 11:41:02,933 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29089 to 19573. [2019-12-07 11:41:02,933 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19573 states. [2019-12-07 11:41:02,963 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19573 states to 19573 states and 62220 transitions. [2019-12-07 11:41:02,963 INFO L78 Accepts]: Start accepts. Automaton has 19573 states and 62220 transitions. Word has length 66 [2019-12-07 11:41:02,963 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:41:02,963 INFO L462 AbstractCegarLoop]: Abstraction has 19573 states and 62220 transitions. [2019-12-07 11:41:02,963 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:41:02,963 INFO L276 IsEmpty]: Start isEmpty. Operand 19573 states and 62220 transitions. [2019-12-07 11:41:02,979 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:41:02,979 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:41:02,979 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:41:02,979 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:41:02,980 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:41:02,980 INFO L82 PathProgramCache]: Analyzing trace with hash 831300439, now seen corresponding path program 1 times [2019-12-07 11:41:02,980 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:41:03,128 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [82431255] [2019-12-07 11:41:03,128 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:41:03,137 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:41:03,177 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:41:03,177 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [82431255] [2019-12-07 11:41:03,178 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:41:03,178 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:41:03,178 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [727260330] [2019-12-07 11:41:03,178 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:41:03,178 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:41:03,178 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:41:03,178 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:41:03,178 INFO L87 Difference]: Start difference. First operand 19573 states and 62220 transitions. Second operand 4 states. [2019-12-07 11:41:03,274 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:41:03,274 INFO L93 Difference]: Finished difference Result 19573 states and 62025 transitions. [2019-12-07 11:41:03,274 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 11:41:03,274 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-12-07 11:41:03,275 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:41:03,296 INFO L225 Difference]: With dead ends: 19573 [2019-12-07 11:41:03,297 INFO L226 Difference]: Without dead ends: 19573 [2019-12-07 11:41:03,297 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:41:03,358 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19573 states. [2019-12-07 11:41:03,527 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19573 to 16672. [2019-12-07 11:41:03,527 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16672 states. [2019-12-07 11:41:03,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16672 states to 16672 states and 52277 transitions. [2019-12-07 11:41:03,552 INFO L78 Accepts]: Start accepts. Automaton has 16672 states and 52277 transitions. Word has length 66 [2019-12-07 11:41:03,552 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:41:03,552 INFO L462 AbstractCegarLoop]: Abstraction has 16672 states and 52277 transitions. [2019-12-07 11:41:03,552 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:41:03,552 INFO L276 IsEmpty]: Start isEmpty. Operand 16672 states and 52277 transitions. [2019-12-07 11:41:03,565 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:41:03,565 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:41:03,566 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:41:03,566 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:41:03,566 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:41:03,566 INFO L82 PathProgramCache]: Analyzing trace with hash 169560169, now seen corresponding path program 2 times [2019-12-07 11:41:03,566 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:41:03,566 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [650345407] [2019-12-07 11:41:03,566 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:41:03,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:41:03,736 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:41:03,736 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [650345407] [2019-12-07 11:41:03,737 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:41:03,737 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 11:41:03,737 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [911851631] [2019-12-07 11:41:03,737 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 11:41:03,737 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:41:03,737 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 11:41:03,737 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=105, Unknown=0, NotChecked=0, Total=132 [2019-12-07 11:41:03,737 INFO L87 Difference]: Start difference. First operand 16672 states and 52277 transitions. Second operand 12 states. [2019-12-07 11:41:05,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:41:05,888 INFO L93 Difference]: Finished difference Result 75898 states and 233012 transitions. [2019-12-07 11:41:05,888 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2019-12-07 11:41:05,888 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 66 [2019-12-07 11:41:05,889 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:41:05,957 INFO L225 Difference]: With dead ends: 75898 [2019-12-07 11:41:05,957 INFO L226 Difference]: Without dead ends: 50110 [2019-12-07 11:41:05,958 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 8 SyntacticMatches, 1 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 410 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=327, Invalid=1313, Unknown=0, NotChecked=0, Total=1640 [2019-12-07 11:41:06,074 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50110 states. [2019-12-07 11:41:06,377 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50110 to 19060. [2019-12-07 11:41:06,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19060 states. [2019-12-07 11:41:06,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19060 states to 19060 states and 60106 transitions. [2019-12-07 11:41:06,409 INFO L78 Accepts]: Start accepts. Automaton has 19060 states and 60106 transitions. Word has length 66 [2019-12-07 11:41:06,409 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:41:06,409 INFO L462 AbstractCegarLoop]: Abstraction has 19060 states and 60106 transitions. [2019-12-07 11:41:06,409 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 11:41:06,409 INFO L276 IsEmpty]: Start isEmpty. Operand 19060 states and 60106 transitions. [2019-12-07 11:41:06,426 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:41:06,427 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:41:06,427 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:41:06,427 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:41:06,427 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:41:06,427 INFO L82 PathProgramCache]: Analyzing trace with hash -1263353665, now seen corresponding path program 3 times [2019-12-07 11:41:06,427 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:41:06,427 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1872013635] [2019-12-07 11:41:06,427 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:41:06,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:41:06,461 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:41:06,461 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1872013635] [2019-12-07 11:41:06,461 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:41:06,461 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:41:06,461 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1812507136] [2019-12-07 11:41:06,462 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:41:06,462 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:41:06,462 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:41:06,462 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:41:06,462 INFO L87 Difference]: Start difference. First operand 19060 states and 60106 transitions. Second operand 3 states. [2019-12-07 11:41:06,514 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:41:06,514 INFO L93 Difference]: Finished difference Result 19060 states and 59095 transitions. [2019-12-07 11:41:06,514 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:41:06,514 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 11:41:06,515 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:41:06,536 INFO L225 Difference]: With dead ends: 19060 [2019-12-07 11:41:06,536 INFO L226 Difference]: Without dead ends: 19060 [2019-12-07 11:41:06,537 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:41:06,596 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19060 states. [2019-12-07 11:41:06,759 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19060 to 18759. [2019-12-07 11:41:06,759 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18759 states. [2019-12-07 11:41:06,787 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18759 states to 18759 states and 58244 transitions. [2019-12-07 11:41:06,787 INFO L78 Accepts]: Start accepts. Automaton has 18759 states and 58244 transitions. Word has length 66 [2019-12-07 11:41:06,787 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:41:06,787 INFO L462 AbstractCegarLoop]: Abstraction has 18759 states and 58244 transitions. [2019-12-07 11:41:06,787 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:41:06,787 INFO L276 IsEmpty]: Start isEmpty. Operand 18759 states and 58244 transitions. [2019-12-07 11:41:06,804 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 11:41:06,804 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:41:06,804 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:41:06,804 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:41:06,805 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:41:06,805 INFO L82 PathProgramCache]: Analyzing trace with hash -2007326845, now seen corresponding path program 1 times [2019-12-07 11:41:06,805 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:41:06,805 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1126275872] [2019-12-07 11:41:06,805 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:41:06,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:41:07,304 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:41:07,304 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1126275872] [2019-12-07 11:41:07,305 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:41:07,305 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 11:41:07,305 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1376637225] [2019-12-07 11:41:07,305 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 11:41:07,305 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:41:07,305 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 11:41:07,305 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=195, Unknown=0, NotChecked=0, Total=240 [2019-12-07 11:41:07,306 INFO L87 Difference]: Start difference. First operand 18759 states and 58244 transitions. Second operand 16 states. [2019-12-07 11:41:11,780 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:41:11,780 INFO L93 Difference]: Finished difference Result 38364 states and 116451 transitions. [2019-12-07 11:41:11,780 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2019-12-07 11:41:11,780 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 11:41:11,780 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:41:11,812 INFO L225 Difference]: With dead ends: 38364 [2019-12-07 11:41:11,812 INFO L226 Difference]: Without dead ends: 28431 [2019-12-07 11:41:11,813 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 872 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=531, Invalid=2439, Unknown=0, NotChecked=0, Total=2970 [2019-12-07 11:41:11,886 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28431 states. [2019-12-07 11:41:12,096 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28431 to 19915. [2019-12-07 11:41:12,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19915 states. [2019-12-07 11:41:12,128 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19915 states to 19915 states and 61320 transitions. [2019-12-07 11:41:12,128 INFO L78 Accepts]: Start accepts. Automaton has 19915 states and 61320 transitions. Word has length 67 [2019-12-07 11:41:12,128 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:41:12,128 INFO L462 AbstractCegarLoop]: Abstraction has 19915 states and 61320 transitions. [2019-12-07 11:41:12,128 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 11:41:12,128 INFO L276 IsEmpty]: Start isEmpty. Operand 19915 states and 61320 transitions. [2019-12-07 11:41:12,146 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 11:41:12,146 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:41:12,146 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:41:12,146 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:41:12,147 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:41:12,147 INFO L82 PathProgramCache]: Analyzing trace with hash -1473001563, now seen corresponding path program 2 times [2019-12-07 11:41:12,147 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:41:12,147 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2053725465] [2019-12-07 11:41:12,147 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:41:12,163 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:41:12,294 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:41:12,295 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2053725465] [2019-12-07 11:41:12,295 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:41:12,295 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 11:41:12,295 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [471552693] [2019-12-07 11:41:12,295 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 11:41:12,295 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:41:12,295 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 11:41:12,295 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 11:41:12,295 INFO L87 Difference]: Start difference. First operand 19915 states and 61320 transitions. Second operand 11 states. [2019-12-07 11:41:13,777 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:41:13,778 INFO L93 Difference]: Finished difference Result 49067 states and 150198 transitions. [2019-12-07 11:41:13,778 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2019-12-07 11:41:13,778 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 11:41:13,778 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:41:13,815 INFO L225 Difference]: With dead ends: 49067 [2019-12-07 11:41:13,815 INFO L226 Difference]: Without dead ends: 32306 [2019-12-07 11:41:13,816 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 382 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=284, Invalid=1198, Unknown=0, NotChecked=0, Total=1482 [2019-12-07 11:41:13,899 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32306 states. [2019-12-07 11:41:14,126 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32306 to 19402. [2019-12-07 11:41:14,126 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19402 states. [2019-12-07 11:41:14,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19402 states to 19402 states and 59187 transitions. [2019-12-07 11:41:14,156 INFO L78 Accepts]: Start accepts. Automaton has 19402 states and 59187 transitions. Word has length 67 [2019-12-07 11:41:14,156 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:41:14,156 INFO L462 AbstractCegarLoop]: Abstraction has 19402 states and 59187 transitions. [2019-12-07 11:41:14,156 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 11:41:14,156 INFO L276 IsEmpty]: Start isEmpty. Operand 19402 states and 59187 transitions. [2019-12-07 11:41:14,172 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 11:41:14,172 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:41:14,172 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:41:14,172 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:41:14,172 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:41:14,173 INFO L82 PathProgramCache]: Analyzing trace with hash -1156108883, now seen corresponding path program 3 times [2019-12-07 11:41:14,173 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:41:14,173 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1459368661] [2019-12-07 11:41:14,173 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:41:14,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:41:14,482 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:41:14,483 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1459368661] [2019-12-07 11:41:14,483 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:41:14,483 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 11:41:14,483 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1782223476] [2019-12-07 11:41:14,483 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 11:41:14,483 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:41:14,483 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 11:41:14,484 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=199, Unknown=0, NotChecked=0, Total=240 [2019-12-07 11:41:14,484 INFO L87 Difference]: Start difference. First operand 19402 states and 59187 transitions. Second operand 16 states. [2019-12-07 11:41:17,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:41:17,147 INFO L93 Difference]: Finished difference Result 27379 states and 81500 transitions. [2019-12-07 11:41:17,148 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2019-12-07 11:41:17,149 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 11:41:17,149 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:41:17,192 INFO L225 Difference]: With dead ends: 27379 [2019-12-07 11:41:17,192 INFO L226 Difference]: Without dead ends: 25672 [2019-12-07 11:41:17,193 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 52 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 739 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=479, Invalid=2071, Unknown=0, NotChecked=0, Total=2550 [2019-12-07 11:41:17,264 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25672 states. [2019-12-07 11:41:17,459 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25672 to 19661. [2019-12-07 11:41:17,459 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19661 states. [2019-12-07 11:41:17,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19661 states to 19661 states and 59846 transitions. [2019-12-07 11:41:17,488 INFO L78 Accepts]: Start accepts. Automaton has 19661 states and 59846 transitions. Word has length 67 [2019-12-07 11:41:17,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:41:17,488 INFO L462 AbstractCegarLoop]: Abstraction has 19661 states and 59846 transitions. [2019-12-07 11:41:17,488 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 11:41:17,488 INFO L276 IsEmpty]: Start isEmpty. Operand 19661 states and 59846 transitions. [2019-12-07 11:41:17,504 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 11:41:17,504 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:41:17,504 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:41:17,505 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:41:17,505 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:41:17,505 INFO L82 PathProgramCache]: Analyzing trace with hash 204518299, now seen corresponding path program 4 times [2019-12-07 11:41:17,505 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:41:17,505 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1415144061] [2019-12-07 11:41:17,505 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:41:17,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:41:17,623 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:41:17,624 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1415144061] [2019-12-07 11:41:17,624 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:41:17,624 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 11:41:17,624 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1067001343] [2019-12-07 11:41:17,624 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 11:41:17,624 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:41:17,624 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 11:41:17,624 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 11:41:17,624 INFO L87 Difference]: Start difference. First operand 19661 states and 59846 transitions. Second operand 10 states. [2019-12-07 11:41:18,772 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:41:18,772 INFO L93 Difference]: Finished difference Result 38534 states and 115994 transitions. [2019-12-07 11:41:18,772 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2019-12-07 11:41:18,773 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 11:41:18,773 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:41:18,814 INFO L225 Difference]: With dead ends: 38534 [2019-12-07 11:41:18,814 INFO L226 Difference]: Without dead ends: 36819 [2019-12-07 11:41:18,814 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 143 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=141, Invalid=615, Unknown=0, NotChecked=0, Total=756 [2019-12-07 11:41:18,905 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36819 states. [2019-12-07 11:41:19,139 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36819 to 19537. [2019-12-07 11:41:19,139 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19537 states. [2019-12-07 11:41:19,169 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19537 states to 19537 states and 59476 transitions. [2019-12-07 11:41:19,169 INFO L78 Accepts]: Start accepts. Automaton has 19537 states and 59476 transitions. Word has length 67 [2019-12-07 11:41:19,169 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:41:19,169 INFO L462 AbstractCegarLoop]: Abstraction has 19537 states and 59476 transitions. [2019-12-07 11:41:19,169 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 11:41:19,169 INFO L276 IsEmpty]: Start isEmpty. Operand 19537 states and 59476 transitions. [2019-12-07 11:41:19,185 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 11:41:19,185 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:41:19,185 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:41:19,185 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:41:19,186 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:41:19,186 INFO L82 PathProgramCache]: Analyzing trace with hash 842317367, now seen corresponding path program 5 times [2019-12-07 11:41:19,186 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:41:19,186 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1939820735] [2019-12-07 11:41:19,186 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:41:19,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:41:19,466 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:41:19,466 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1939820735] [2019-12-07 11:41:19,466 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:41:19,466 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 11:41:19,466 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [940875438] [2019-12-07 11:41:19,466 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 11:41:19,466 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:41:19,467 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 11:41:19,467 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=228, Unknown=0, NotChecked=0, Total=272 [2019-12-07 11:41:19,467 INFO L87 Difference]: Start difference. First operand 19537 states and 59476 transitions. Second operand 17 states. [2019-12-07 11:41:28,693 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:41:28,693 INFO L93 Difference]: Finished difference Result 42213 states and 126555 transitions. [2019-12-07 11:41:28,694 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 69 states. [2019-12-07 11:41:28,695 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 67 [2019-12-07 11:41:28,695 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:41:28,758 INFO L225 Difference]: With dead ends: 42213 [2019-12-07 11:41:28,758 INFO L226 Difference]: Without dead ends: 41850 [2019-12-07 11:41:28,759 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1661 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=703, Invalid=4409, Unknown=0, NotChecked=0, Total=5112 [2019-12-07 11:41:28,860 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41850 states. [2019-12-07 11:41:29,120 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41850 to 19541. [2019-12-07 11:41:29,120 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19541 states. [2019-12-07 11:41:29,150 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19541 states to 19541 states and 59488 transitions. [2019-12-07 11:41:29,151 INFO L78 Accepts]: Start accepts. Automaton has 19541 states and 59488 transitions. Word has length 67 [2019-12-07 11:41:29,151 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:41:29,151 INFO L462 AbstractCegarLoop]: Abstraction has 19541 states and 59488 transitions. [2019-12-07 11:41:29,151 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 11:41:29,151 INFO L276 IsEmpty]: Start isEmpty. Operand 19541 states and 59488 transitions. [2019-12-07 11:41:29,168 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 11:41:29,168 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:41:29,168 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:41:29,168 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:41:29,168 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:41:29,168 INFO L82 PathProgramCache]: Analyzing trace with hash 2145287493, now seen corresponding path program 6 times [2019-12-07 11:41:29,168 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:41:29,168 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [245551992] [2019-12-07 11:41:29,168 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:41:29,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:41:29,276 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:41:29,276 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [245551992] [2019-12-07 11:41:29,276 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:41:29,276 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 11:41:29,276 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [316678647] [2019-12-07 11:41:29,277 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 11:41:29,277 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:41:29,277 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 11:41:29,277 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 11:41:29,277 INFO L87 Difference]: Start difference. First operand 19541 states and 59488 transitions. Second operand 11 states. [2019-12-07 11:41:31,461 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:41:31,461 INFO L93 Difference]: Finished difference Result 37963 states and 114842 transitions. [2019-12-07 11:41:31,461 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 11:41:31,461 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 11:41:31,461 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:41:31,504 INFO L225 Difference]: With dead ends: 37963 [2019-12-07 11:41:31,505 INFO L226 Difference]: Without dead ends: 37600 [2019-12-07 11:41:31,505 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 203 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=171, Invalid=821, Unknown=0, NotChecked=0, Total=992 [2019-12-07 11:41:31,598 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37600 states. [2019-12-07 11:41:31,839 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37600 to 19433. [2019-12-07 11:41:31,839 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19433 states. [2019-12-07 11:41:31,870 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19433 states to 19433 states and 59202 transitions. [2019-12-07 11:41:31,870 INFO L78 Accepts]: Start accepts. Automaton has 19433 states and 59202 transitions. Word has length 67 [2019-12-07 11:41:31,870 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:41:31,870 INFO L462 AbstractCegarLoop]: Abstraction has 19433 states and 59202 transitions. [2019-12-07 11:41:31,870 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 11:41:31,870 INFO L276 IsEmpty]: Start isEmpty. Operand 19433 states and 59202 transitions. [2019-12-07 11:41:31,887 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 11:41:31,887 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:41:31,887 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:41:31,887 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:41:31,887 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:41:31,887 INFO L82 PathProgramCache]: Analyzing trace with hash -1650094651, now seen corresponding path program 7 times [2019-12-07 11:41:31,888 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:41:31,888 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [992527306] [2019-12-07 11:41:31,888 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:41:31,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:41:31,942 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:41:31,943 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [992527306] [2019-12-07 11:41:31,943 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:41:31,943 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 11:41:31,943 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1706782873] [2019-12-07 11:41:31,943 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:41:31,943 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:41:31,943 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:41:31,944 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:41:31,944 INFO L87 Difference]: Start difference. First operand 19433 states and 59202 transitions. Second operand 6 states. [2019-12-07 11:41:32,275 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:41:32,275 INFO L93 Difference]: Finished difference Result 49218 states and 147758 transitions. [2019-12-07 11:41:32,275 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 11:41:32,276 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 67 [2019-12-07 11:41:32,276 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:41:32,329 INFO L225 Difference]: With dead ends: 49218 [2019-12-07 11:41:32,329 INFO L226 Difference]: Without dead ends: 46634 [2019-12-07 11:41:32,329 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 11:41:32,439 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46634 states. [2019-12-07 11:41:32,835 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46634 to 19080. [2019-12-07 11:41:32,835 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19080 states. [2019-12-07 11:41:32,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19080 states to 19080 states and 58247 transitions. [2019-12-07 11:41:32,862 INFO L78 Accepts]: Start accepts. Automaton has 19080 states and 58247 transitions. Word has length 67 [2019-12-07 11:41:32,862 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:41:32,862 INFO L462 AbstractCegarLoop]: Abstraction has 19080 states and 58247 transitions. [2019-12-07 11:41:32,862 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:41:32,862 INFO L276 IsEmpty]: Start isEmpty. Operand 19080 states and 58247 transitions. [2019-12-07 11:41:32,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 11:41:32,877 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:41:32,877 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:41:32,877 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:41:32,878 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:41:32,878 INFO L82 PathProgramCache]: Analyzing trace with hash -2101838907, now seen corresponding path program 8 times [2019-12-07 11:41:32,878 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:41:32,878 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [552115534] [2019-12-07 11:41:32,878 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:41:32,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 11:41:32,913 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 11:41:32,951 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 11:41:32,951 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 11:41:32,954 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [894] [894] ULTIMATE.startENTRY-->L820: Formula: (let ((.cse0 (store |v_#valid_71| 0 0))) (and (= v_~z$w_buff0_used~0_958 0) (= v_~y~0_23 0) (= v_~z$r_buff0_thd2~0_111 0) (= v_~x~0_76 0) (= |v_#NULL.offset_6| 0) (= v_~z~0_178 0) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t2281~0.base_26| 4) |v_#length_23|) (= 0 v_~__unbuffered_p2_EAX~0_45) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t2281~0.base_26|)) (= v_~z$w_buff1_used~0_531 0) (= v_~z$r_buff0_thd1~0_132 0) (= v_~z$r_buff1_thd1~0_108 0) (= |v_ULTIMATE.start_main_~#t2281~0.offset_19| 0) (= v_~z$read_delayed_var~0.offset_7 0) (= v_~main$tmp_guard1~0_43 0) (= |v_#valid_69| (store .cse0 |v_ULTIMATE.start_main_~#t2281~0.base_26| 1)) (= v_~z$w_buff0~0_487 0) (< 0 |v_#StackHeapBarrier_18|) (= 0 v_~z$flush_delayed~0_28) (= v_~z$r_buff1_thd2~0_104 0) (= v_~z$mem_tmp~0_17 0) (= v_~z$w_buff1~0_307 0) (= 0 v_~z$r_buff1_thd3~0_237) (= 0 |v_#NULL.base_6|) (= v_~z$r_buff0_thd0~0_141 0) (= v_~z$read_delayed_var~0.base_7 0) (= v_~z$read_delayed~0_7 0) (= 0 v_~weak$$choice0~0_16) (= 0 v_~__unbuffered_cnt~0_91) (= v_~weak$$choice2~0_111 0) (= 0 v_~z$r_buff0_thd3~0_332) (= v_~main$tmp_guard0~0_26 0) (= v_~__unbuffered_p2_EBX~0_57 0) (= v_~z$r_buff1_thd0~0_133 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t2281~0.base_26| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t2281~0.base_26|) |v_ULTIMATE.start_main_~#t2281~0.offset_19| 0)) |v_#memory_int_21|) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t2281~0.base_26|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_104, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_31|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_287|, ULTIMATE.start_main_~#t2283~0.base=|v_ULTIMATE.start_main_~#t2283~0.base_16|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_41|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_93|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_141, ULTIMATE.start_main_~#t2281~0.offset=|v_ULTIMATE.start_main_~#t2281~0.offset_19|, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_45, ~z$mem_tmp~0=v_~z$mem_tmp~0_17, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_57, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_531, ULTIMATE.start_main_~#t2283~0.offset=|v_ULTIMATE.start_main_~#t2283~0.offset_12|, ~z$flush_delayed~0=v_~z$flush_delayed~0_28, ~weak$$choice0~0=v_~weak$$choice0~0_16, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ULTIMATE.start_main_~#t2282~0.base=|v_ULTIMATE.start_main_~#t2282~0.base_23|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_108, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_332, ULTIMATE.start_main_~#t2282~0.offset=|v_ULTIMATE.start_main_~#t2282~0.offset_19|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_91, ~x~0=v_~x~0_76, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_307, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_43, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_35|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_35|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_133, ULTIMATE.start_main_~#t2281~0.base=|v_ULTIMATE.start_main_~#t2281~0.base_26|, ~y~0=v_~y~0_23, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_111, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_23|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_958, ~z$w_buff0~0=v_~z$w_buff0~0_487, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_7|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_237, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_26, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_24|, #valid=|v_#valid_69|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_178, ~weak$$choice2~0=v_~weak$$choice2~0_111, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_132} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, ~z$read_delayed~0, #NULL.offset, ~z$w_buff1~0, ULTIMATE.start_main_#t~ite49, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_~#t2283~0.base, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ULTIMATE.start_main_~#t2281~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t2281~0.base, ~y~0, ~z$r_buff0_thd2~0, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ULTIMATE.start_main_~#t2283~0.offset, ~z$flush_delayed~0, ~main$tmp_guard0~0, #NULL.base, ~weak$$choice0~0, ULTIMATE.start_main_~#t2282~0.base, ULTIMATE.start_main_#res, ~z$r_buff1_thd1~0, #valid, #memory_int, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_~#t2282~0.offset, ~__unbuffered_cnt~0, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 11:41:32,954 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L820-1-->L822: Formula: (and (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t2282~0.base_9|) (not (= 0 |v_ULTIMATE.start_main_~#t2282~0.base_9|)) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t2282~0.base_9| 4)) (= 0 (select |v_#valid_34| |v_ULTIMATE.start_main_~#t2282~0.base_9|)) (= |v_#memory_int_11| (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2282~0.base_9| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2282~0.base_9|) |v_ULTIMATE.start_main_~#t2282~0.offset_8| 1))) (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t2282~0.base_9| 1)) (= 0 |v_ULTIMATE.start_main_~#t2282~0.offset_8|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t2282~0.base=|v_ULTIMATE.start_main_~#t2282~0.base_9|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_3|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t2282~0.offset=|v_ULTIMATE.start_main_~#t2282~0.offset_8|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2282~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t2282~0.offset, #length] because there is no mapped edge [2019-12-07 11:41:32,954 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] P0ENTRY-->L4-3: Formula: (and (= |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out-2119798901| (ite (not (and (not (= 0 (mod ~z$w_buff0_used~0_Out-2119798901 256))) (not (= (mod ~z$w_buff1_used~0_Out-2119798901 256) 0)))) 1 0)) (= ~z$w_buff0_used~0_Out-2119798901 1) (= ~z$w_buff0~0_In-2119798901 ~z$w_buff1~0_Out-2119798901) (= |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out-2119798901| P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out-2119798901) (= P0Thread1of1ForFork0_~arg.offset_Out-2119798901 |P0Thread1of1ForFork0_#in~arg.offset_In-2119798901|) (= ~z$w_buff0~0_Out-2119798901 1) (= P0Thread1of1ForFork0_~arg.base_Out-2119798901 |P0Thread1of1ForFork0_#in~arg.base_In-2119798901|) (= ~z$w_buff1_used~0_Out-2119798901 ~z$w_buff0_used~0_In-2119798901) (not (= 0 P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out-2119798901))) InVars {P0Thread1of1ForFork0_#in~arg.offset=|P0Thread1of1ForFork0_#in~arg.offset_In-2119798901|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2119798901, ~z$w_buff0~0=~z$w_buff0~0_In-2119798901, P0Thread1of1ForFork0_#in~arg.base=|P0Thread1of1ForFork0_#in~arg.base_In-2119798901|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|P0Thread1of1ForFork0_#in~arg.offset_In-2119798901|, ~z$w_buff0_used~0=~z$w_buff0_used~0_Out-2119798901, ~z$w_buff0~0=~z$w_buff0~0_Out-2119798901, ~z$w_buff1_used~0=~z$w_buff1_used~0_Out-2119798901, P0Thread1of1ForFork0___VERIFIER_assert_~expression=P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out-2119798901, P0Thread1of1ForFork0_#in~arg.base=|P0Thread1of1ForFork0_#in~arg.base_In-2119798901|, ~z$w_buff1~0=~z$w_buff1~0_Out-2119798901, P0Thread1of1ForFork0_~arg.base=P0Thread1of1ForFork0_~arg.base_Out-2119798901, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out-2119798901|, P0Thread1of1ForFork0_~arg.offset=P0Thread1of1ForFork0_~arg.offset_Out-2119798901} AuxVars[] AssignedVars[~z$w_buff0_used~0, ~z$w_buff0~0, ~z$w_buff1_used~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~z$w_buff1~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 11:41:32,955 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L822-1-->L824: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t2283~0.offset_9|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2283~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2283~0.base_11|) |v_ULTIMATE.start_main_~#t2283~0.offset_9| 2)) |v_#memory_int_15|) (not (= |v_ULTIMATE.start_main_~#t2283~0.base_11| 0)) (= (store |v_#valid_41| |v_ULTIMATE.start_main_~#t2283~0.base_11| 1) |v_#valid_40|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t2283~0.base_11|) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t2283~0.base_11| 4) |v_#length_17|) (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t2283~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t2283~0.offset=|v_ULTIMATE.start_main_~#t2283~0.offset_9|, #length=|v_#length_17|, ULTIMATE.start_main_~#t2283~0.base=|v_ULTIMATE.start_main_~#t2283~0.base_11|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t2283~0.offset, #length, ULTIMATE.start_main_~#t2283~0.base] because there is no mapped edge [2019-12-07 11:41:32,957 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] L764-2-->L764-5: Formula: (let ((.cse2 (= |P1Thread1of1ForFork1_#t~ite9_Out46451668| |P1Thread1of1ForFork1_#t~ite10_Out46451668|)) (.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In46451668 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In46451668 256) 0))) (or (and (or .cse0 .cse1) .cse2 (= |P1Thread1of1ForFork1_#t~ite9_Out46451668| ~z~0_In46451668)) (and (= |P1Thread1of1ForFork1_#t~ite9_Out46451668| ~z$w_buff1~0_In46451668) .cse2 (not .cse1) (not .cse0)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In46451668, ~z$w_buff1_used~0=~z$w_buff1_used~0_In46451668, ~z$w_buff1~0=~z$w_buff1~0_In46451668, ~z~0=~z~0_In46451668} OutVars{P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out46451668|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In46451668, ~z$w_buff1_used~0=~z$w_buff1_used~0_In46451668, P1Thread1of1ForFork1_#t~ite10=|P1Thread1of1ForFork1_#t~ite10_Out46451668|, ~z$w_buff1~0=~z$w_buff1~0_In46451668, ~z~0=~z~0_In46451668} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10] because there is no mapped edge [2019-12-07 11:41:32,957 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L765-->L765-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In1569080574 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In1569080574 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out1569080574|)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite11_Out1569080574| ~z$w_buff0_used~0_In1569080574)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1569080574, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1569080574} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1569080574, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out1569080574|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1569080574} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 11:41:32,958 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L766-->L766-2: Formula: (let ((.cse3 (= (mod ~z$r_buff1_thd2~0_In1453274942 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In1453274942 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In1453274942 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In1453274942 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In1453274942 |P1Thread1of1ForFork1_#t~ite12_Out1453274942|)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |P1Thread1of1ForFork1_#t~ite12_Out1453274942|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1453274942, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1453274942, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1453274942, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1453274942} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1453274942, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1453274942, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1453274942, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out1453274942|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1453274942} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 11:41:32,959 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L767-->L767-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd2~0_In-1642777139 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In-1642777139 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite13_Out-1642777139| 0) (not .cse0) (not .cse1)) (and (= |P1Thread1of1ForFork1_#t~ite13_Out-1642777139| ~z$r_buff0_thd2~0_In-1642777139) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1642777139, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1642777139} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1642777139, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-1642777139|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1642777139} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 11:41:32,959 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L787-->L787-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In10693579 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite23_In10693579| |P2Thread1of1ForFork2_#t~ite23_Out10693579|) (= ~z$w_buff1~0_In10693579 |P2Thread1of1ForFork2_#t~ite24_Out10693579|) (not .cse0)) (and (= |P2Thread1of1ForFork2_#t~ite23_Out10693579| |P2Thread1of1ForFork2_#t~ite24_Out10693579|) (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In10693579 256) 0))) (or (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In10693579 256))) (= 0 (mod ~z$w_buff0_used~0_In10693579 256)) (and .cse1 (= (mod ~z$r_buff1_thd3~0_In10693579 256) 0)))) (= |P2Thread1of1ForFork2_#t~ite23_Out10693579| ~z$w_buff1~0_In10693579) .cse0))) InVars {P2Thread1of1ForFork2_#t~ite23=|P2Thread1of1ForFork2_#t~ite23_In10693579|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In10693579, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In10693579, ~z$w_buff1_used~0=~z$w_buff1_used~0_In10693579, ~z$w_buff1~0=~z$w_buff1~0_In10693579, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In10693579, ~weak$$choice2~0=~weak$$choice2~0_In10693579} OutVars{P2Thread1of1ForFork2_#t~ite23=|P2Thread1of1ForFork2_#t~ite23_Out10693579|, P2Thread1of1ForFork2_#t~ite24=|P2Thread1of1ForFork2_#t~ite24_Out10693579|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In10693579, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In10693579, ~z$w_buff1_used~0=~z$w_buff1_used~0_In10693579, ~z$w_buff1~0=~z$w_buff1~0_In10693579, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In10693579, ~weak$$choice2~0=~weak$$choice2~0_In10693579} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite23, P2Thread1of1ForFork2_#t~ite24] because there is no mapped edge [2019-12-07 11:41:32,960 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L788-->L788-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In1547707947 256)))) (or (and (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In1547707947 256) 0))) (or (and (= (mod ~z$w_buff1_used~0_In1547707947 256) 0) .cse0) (= 0 (mod ~z$w_buff0_used~0_In1547707947 256)) (and (= 0 (mod ~z$r_buff1_thd3~0_In1547707947 256)) .cse0))) (= |P2Thread1of1ForFork2_#t~ite26_Out1547707947| ~z$w_buff0_used~0_In1547707947) .cse1 (= |P2Thread1of1ForFork2_#t~ite26_Out1547707947| |P2Thread1of1ForFork2_#t~ite27_Out1547707947|)) (and (not .cse1) (= |P2Thread1of1ForFork2_#t~ite26_In1547707947| |P2Thread1of1ForFork2_#t~ite26_Out1547707947|) (= |P2Thread1of1ForFork2_#t~ite27_Out1547707947| ~z$w_buff0_used~0_In1547707947)))) InVars {P2Thread1of1ForFork2_#t~ite26=|P2Thread1of1ForFork2_#t~ite26_In1547707947|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1547707947, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1547707947, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1547707947, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1547707947, ~weak$$choice2~0=~weak$$choice2~0_In1547707947} OutVars{P2Thread1of1ForFork2_#t~ite26=|P2Thread1of1ForFork2_#t~ite26_Out1547707947|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1547707947, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1547707947, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1547707947, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1547707947, ~weak$$choice2~0=~weak$$choice2~0_In1547707947, P2Thread1of1ForFork2_#t~ite27=|P2Thread1of1ForFork2_#t~ite27_Out1547707947|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite26, P2Thread1of1ForFork2_#t~ite27] because there is no mapped edge [2019-12-07 11:41:32,960 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L768-->L768-2: Formula: (let ((.cse2 (= (mod ~z$w_buff0_used~0_In217014200 256) 0)) (.cse3 (= (mod ~z$r_buff0_thd2~0_In217014200 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In217014200 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In217014200 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite14_Out217014200| 0)) (and (or .cse2 .cse3) (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite14_Out217014200| ~z$r_buff1_thd2~0_In217014200)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In217014200, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In217014200, ~z$w_buff1_used~0=~z$w_buff1_used~0_In217014200, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In217014200} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In217014200, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In217014200, ~z$w_buff1_used~0=~z$w_buff1_used~0_In217014200, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out217014200|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In217014200} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 11:41:32,960 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L768-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite14_26| v_~z$r_buff1_thd2~0_55) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_26|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_55, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_25|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 11:41:32,960 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L789-->L789-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In524802254 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite29_Out524802254| ~z$w_buff1_used~0_In524802254) .cse0 (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In524802254 256)))) (or (= (mod ~z$w_buff0_used~0_In524802254 256) 0) (and .cse1 (= (mod ~z$r_buff1_thd3~0_In524802254 256) 0)) (and .cse1 (= (mod ~z$w_buff1_used~0_In524802254 256) 0)))) (= |P2Thread1of1ForFork2_#t~ite29_Out524802254| |P2Thread1of1ForFork2_#t~ite30_Out524802254|)) (and (= |P2Thread1of1ForFork2_#t~ite29_In524802254| |P2Thread1of1ForFork2_#t~ite29_Out524802254|) (= ~z$w_buff1_used~0_In524802254 |P2Thread1of1ForFork2_#t~ite30_Out524802254|) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In524802254, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In524802254, ~z$w_buff1_used~0=~z$w_buff1_used~0_In524802254, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In524802254, ~weak$$choice2~0=~weak$$choice2~0_In524802254, P2Thread1of1ForFork2_#t~ite29=|P2Thread1of1ForFork2_#t~ite29_In524802254|} OutVars{P2Thread1of1ForFork2_#t~ite30=|P2Thread1of1ForFork2_#t~ite30_Out524802254|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In524802254, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In524802254, ~z$w_buff1_used~0=~z$w_buff1_used~0_In524802254, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In524802254, ~weak$$choice2~0=~weak$$choice2~0_In524802254, P2Thread1of1ForFork2_#t~ite29=|P2Thread1of1ForFork2_#t~ite29_Out524802254|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite30, P2Thread1of1ForFork2_#t~ite29] because there is no mapped edge [2019-12-07 11:41:32,961 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L790-->L791: Formula: (and (= v_~z$r_buff0_thd3~0_68 v_~z$r_buff0_thd3~0_67) (not (= 0 (mod v_~weak$$choice2~0_15 256)))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_68, ~weak$$choice2~0=v_~weak$$choice2~0_15} OutVars{P2Thread1of1ForFork2_#t~ite31=|v_P2Thread1of1ForFork2_#t~ite31_6|, P2Thread1of1ForFork2_#t~ite33=|v_P2Thread1of1ForFork2_#t~ite33_7|, P2Thread1of1ForFork2_#t~ite32=|v_P2Thread1of1ForFork2_#t~ite32_7|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, ~weak$$choice2~0=v_~weak$$choice2~0_15} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite31, P2Thread1of1ForFork2_#t~ite33, P2Thread1of1ForFork2_#t~ite32, ~z$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 11:41:32,961 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L793-->L797: Formula: (and (= 0 v_~z$flush_delayed~0_6) (= v_~z~0_25 v_~z$mem_tmp~0_5) (not (= 0 (mod v_~z$flush_delayed~0_7 256)))) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_7} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_5, P2Thread1of1ForFork2_#t~ite37=|v_P2Thread1of1ForFork2_#t~ite37_5|, ~z$flush_delayed~0=v_~z$flush_delayed~0_6, ~z~0=v_~z~0_25} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 11:41:32,962 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L745-->L745-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In947730089 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In947730089 256) 0))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork0_#t~ite5_Out947730089| ~z$w_buff0_used~0_In947730089)) (and (= |P0Thread1of1ForFork0_#t~ite5_Out947730089| 0) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In947730089, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In947730089} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out947730089|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In947730089, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In947730089} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 11:41:32,963 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L746-->L746-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd1~0_In-1518420139 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1518420139 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In-1518420139 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1518420139 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite6_Out-1518420139| ~z$w_buff1_used~0_In-1518420139) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite6_Out-1518420139| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1518420139, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1518420139, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1518420139, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1518420139} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-1518420139|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1518420139, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1518420139, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1518420139, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1518420139} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 11:41:32,963 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L747-->L748: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1343136368 256))) (.cse1 (= (mod ~z$r_buff0_thd1~0_In1343136368 256) 0)) (.cse2 (= ~z$r_buff0_thd1~0_In1343136368 ~z$r_buff0_thd1~0_Out1343136368))) (or (and (= 0 ~z$r_buff0_thd1~0_Out1343136368) (not .cse0) (not .cse1)) (and .cse0 .cse2) (and .cse1 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1343136368, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1343136368} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1343136368, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out1343136368|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out1343136368} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 11:41:32,963 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L748-->L748-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In1309036011 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In1309036011 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd1~0_In1309036011 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In1309036011 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork0_#t~ite8_Out1309036011| ~z$r_buff1_thd1~0_In1309036011)) (and (= |P0Thread1of1ForFork0_#t~ite8_Out1309036011| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1309036011, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1309036011, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1309036011, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1309036011} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1309036011, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out1309036011|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1309036011, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1309036011, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1309036011} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 11:41:32,963 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [861] [861] L748-2-->P0EXIT: Formula: (and (= v_~z$r_buff1_thd1~0_68 |v_P0Thread1of1ForFork0_#t~ite8_42|) (= v_~__unbuffered_cnt~0_73 (+ v_~__unbuffered_cnt~0_74 1)) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_74} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_41|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_68, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_73} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, ~z$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 11:41:32,963 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L797-2-->L797-5: Formula: (let ((.cse0 (= |P2Thread1of1ForFork2_#t~ite38_Out-730603441| |P2Thread1of1ForFork2_#t~ite39_Out-730603441|)) (.cse2 (= (mod ~z$r_buff1_thd3~0_In-730603441 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In-730603441 256) 0))) (or (and .cse0 (= |P2Thread1of1ForFork2_#t~ite38_Out-730603441| ~z~0_In-730603441) (or .cse1 .cse2)) (and .cse0 (= |P2Thread1of1ForFork2_#t~ite38_Out-730603441| ~z$w_buff1~0_In-730603441) (not .cse2) (not .cse1)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-730603441, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-730603441, ~z$w_buff1~0=~z$w_buff1~0_In-730603441, ~z~0=~z~0_In-730603441} OutVars{~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-730603441, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-730603441, ~z$w_buff1~0=~z$w_buff1~0_In-730603441, ~z~0=~z~0_In-730603441, P2Thread1of1ForFork2_#t~ite39=|P2Thread1of1ForFork2_#t~ite39_Out-730603441|, P2Thread1of1ForFork2_#t~ite38=|P2Thread1of1ForFork2_#t~ite38_Out-730603441|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite39, P2Thread1of1ForFork2_#t~ite38] because there is no mapped edge [2019-12-07 11:41:32,964 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L798-->L798-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In938575381 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In938575381 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In938575381 |P2Thread1of1ForFork2_#t~ite40_Out938575381|)) (and (not .cse1) (= 0 |P2Thread1of1ForFork2_#t~ite40_Out938575381|) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In938575381, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In938575381} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In938575381, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In938575381, P2Thread1of1ForFork2_#t~ite40=|P2Thread1of1ForFork2_#t~ite40_Out938575381|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite40] because there is no mapped edge [2019-12-07 11:41:32,964 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L799-->L799-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1581417184 256))) (.cse3 (= (mod ~z$r_buff0_thd3~0_In-1581417184 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1581417184 256))) (.cse0 (= (mod ~z$r_buff1_thd3~0_In-1581417184 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork2_#t~ite41_Out-1581417184| ~z$w_buff1_used~0_In-1581417184)) (and (= 0 |P2Thread1of1ForFork2_#t~ite41_Out-1581417184|) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1581417184, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1581417184, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1581417184, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1581417184} OutVars{P2Thread1of1ForFork2_#t~ite41=|P2Thread1of1ForFork2_#t~ite41_Out-1581417184|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1581417184, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1581417184, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1581417184, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1581417184} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite41] because there is no mapped edge [2019-12-07 11:41:32,964 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [815] [815] L800-->L800-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In393147374 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In393147374 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite42_Out393147374| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite42_Out393147374| ~z$r_buff0_thd3~0_In393147374)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In393147374, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In393147374} OutVars{P2Thread1of1ForFork2_#t~ite42=|P2Thread1of1ForFork2_#t~ite42_Out393147374|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In393147374, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In393147374} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite42] because there is no mapped edge [2019-12-07 11:41:32,965 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L801-->L801-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff0_thd3~0_In-1230418684 256))) (.cse3 (= (mod ~z$w_buff0_used~0_In-1230418684 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In-1230418684 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1230418684 256)))) (or (and (= ~z$r_buff1_thd3~0_In-1230418684 |P2Thread1of1ForFork2_#t~ite43_Out-1230418684|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= |P2Thread1of1ForFork2_#t~ite43_Out-1230418684| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1230418684, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1230418684, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1230418684, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1230418684} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1230418684, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1230418684, P2Thread1of1ForFork2_#t~ite43=|P2Thread1of1ForFork2_#t~ite43_Out-1230418684|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1230418684, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1230418684} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite43] because there is no mapped edge [2019-12-07 11:41:32,965 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L801-2-->P2EXIT: Formula: (and (= v_~z$r_buff1_thd3~0_136 |v_P2Thread1of1ForFork2_#t~ite43_28|) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55)) InVars {P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_136, P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_27|, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#t~ite43, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 11:41:32,965 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L824-1-->L830: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_13) 1 0)) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 11:41:32,965 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L830-2-->L830-5: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In-1563650889 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In-1563650889 256) 0)) (.cse2 (= |ULTIMATE.start_main_#t~ite48_Out-1563650889| |ULTIMATE.start_main_#t~ite47_Out-1563650889|))) (or (and (not .cse0) (= ~z$w_buff1~0_In-1563650889 |ULTIMATE.start_main_#t~ite47_Out-1563650889|) (not .cse1) .cse2) (and (= ~z~0_In-1563650889 |ULTIMATE.start_main_#t~ite47_Out-1563650889|) (or .cse0 .cse1) .cse2))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1563650889, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1563650889, ~z$w_buff1~0=~z$w_buff1~0_In-1563650889, ~z~0=~z~0_In-1563650889} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1563650889, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-1563650889|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1563650889, ~z$w_buff1~0=~z$w_buff1~0_In-1563650889, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-1563650889|, ~z~0=~z~0_In-1563650889} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 11:41:32,966 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L831-->L831-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-301420775 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-301420775 256)))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out-301420775| ~z$w_buff0_used~0_In-301420775) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |ULTIMATE.start_main_#t~ite49_Out-301420775| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-301420775, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-301420775} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-301420775, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-301420775, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-301420775|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 11:41:32,966 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L832-->L832-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff0_thd0~0_In-1465467034 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1465467034 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-1465467034 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In-1465467034 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In-1465467034 |ULTIMATE.start_main_#t~ite50_Out-1465467034|) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |ULTIMATE.start_main_#t~ite50_Out-1465467034| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1465467034, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1465467034, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1465467034, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1465467034} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1465467034|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1465467034, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1465467034, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1465467034, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1465467034} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 11:41:32,966 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L833-->L833-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-1852108284 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-1852108284 256)))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In-1852108284 |ULTIMATE.start_main_#t~ite51_Out-1852108284|)) (and (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite51_Out-1852108284|) (not .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1852108284, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1852108284} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1852108284, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1852108284|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1852108284} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 11:41:32,967 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L834-->L834-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In1177707338 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In1177707338 256))) (.cse3 (= (mod ~z$r_buff0_thd0~0_In1177707338 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In1177707338 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite52_Out1177707338|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= ~z$r_buff1_thd0~0_In1177707338 |ULTIMATE.start_main_#t~ite52_Out1177707338|) (or .cse3 .cse2)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1177707338, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1177707338, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1177707338, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1177707338} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1177707338|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1177707338, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1177707338, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1177707338, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1177707338} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 11:41:32,967 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L834-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_10| (mod v_~main$tmp_guard1~0_23 256)) (= |v_ULTIMATE.start_main_#t~ite52_54| v_~z$r_buff1_thd0~0_96) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_10|) (= v_~main$tmp_guard1~0_23 (ite (= 0 (ite (not (and (= v_~x~0_49 2) (= v_~__unbuffered_p2_EBX~0_30 0) (= 1 v_~__unbuffered_p2_EAX~0_25))) 1 0)) 0 1))) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_54|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_25, ~x~0=v_~x~0_49} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_53|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_15, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_96, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_25, ~x~0=v_~x~0_49, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 11:41:33,031 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 11:41:33 BasicIcfg [2019-12-07 11:41:33,031 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 11:41:33,031 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 11:41:33,032 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 11:41:33,032 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 11:41:33,032 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:38:41" (3/4) ... [2019-12-07 11:41:33,034 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 11:41:33,034 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [894] [894] ULTIMATE.startENTRY-->L820: Formula: (let ((.cse0 (store |v_#valid_71| 0 0))) (and (= v_~z$w_buff0_used~0_958 0) (= v_~y~0_23 0) (= v_~z$r_buff0_thd2~0_111 0) (= v_~x~0_76 0) (= |v_#NULL.offset_6| 0) (= v_~z~0_178 0) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t2281~0.base_26| 4) |v_#length_23|) (= 0 v_~__unbuffered_p2_EAX~0_45) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t2281~0.base_26|)) (= v_~z$w_buff1_used~0_531 0) (= v_~z$r_buff0_thd1~0_132 0) (= v_~z$r_buff1_thd1~0_108 0) (= |v_ULTIMATE.start_main_~#t2281~0.offset_19| 0) (= v_~z$read_delayed_var~0.offset_7 0) (= v_~main$tmp_guard1~0_43 0) (= |v_#valid_69| (store .cse0 |v_ULTIMATE.start_main_~#t2281~0.base_26| 1)) (= v_~z$w_buff0~0_487 0) (< 0 |v_#StackHeapBarrier_18|) (= 0 v_~z$flush_delayed~0_28) (= v_~z$r_buff1_thd2~0_104 0) (= v_~z$mem_tmp~0_17 0) (= v_~z$w_buff1~0_307 0) (= 0 v_~z$r_buff1_thd3~0_237) (= 0 |v_#NULL.base_6|) (= v_~z$r_buff0_thd0~0_141 0) (= v_~z$read_delayed_var~0.base_7 0) (= v_~z$read_delayed~0_7 0) (= 0 v_~weak$$choice0~0_16) (= 0 v_~__unbuffered_cnt~0_91) (= v_~weak$$choice2~0_111 0) (= 0 v_~z$r_buff0_thd3~0_332) (= v_~main$tmp_guard0~0_26 0) (= v_~__unbuffered_p2_EBX~0_57 0) (= v_~z$r_buff1_thd0~0_133 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t2281~0.base_26| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t2281~0.base_26|) |v_ULTIMATE.start_main_~#t2281~0.offset_19| 0)) |v_#memory_int_21|) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t2281~0.base_26|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_104, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_31|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_287|, ULTIMATE.start_main_~#t2283~0.base=|v_ULTIMATE.start_main_~#t2283~0.base_16|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_41|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_93|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_141, ULTIMATE.start_main_~#t2281~0.offset=|v_ULTIMATE.start_main_~#t2281~0.offset_19|, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_45, ~z$mem_tmp~0=v_~z$mem_tmp~0_17, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_57, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_531, ULTIMATE.start_main_~#t2283~0.offset=|v_ULTIMATE.start_main_~#t2283~0.offset_12|, ~z$flush_delayed~0=v_~z$flush_delayed~0_28, ~weak$$choice0~0=v_~weak$$choice0~0_16, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ULTIMATE.start_main_~#t2282~0.base=|v_ULTIMATE.start_main_~#t2282~0.base_23|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_108, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_332, ULTIMATE.start_main_~#t2282~0.offset=|v_ULTIMATE.start_main_~#t2282~0.offset_19|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_91, ~x~0=v_~x~0_76, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_307, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_43, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_35|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_35|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_133, ULTIMATE.start_main_~#t2281~0.base=|v_ULTIMATE.start_main_~#t2281~0.base_26|, ~y~0=v_~y~0_23, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_111, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_23|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_958, ~z$w_buff0~0=v_~z$w_buff0~0_487, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_7|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_237, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_26, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_24|, #valid=|v_#valid_69|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_178, ~weak$$choice2~0=v_~weak$$choice2~0_111, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_132} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, ~z$read_delayed~0, #NULL.offset, ~z$w_buff1~0, ULTIMATE.start_main_#t~ite49, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_~#t2283~0.base, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ULTIMATE.start_main_~#t2281~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t2281~0.base, ~y~0, ~z$r_buff0_thd2~0, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ULTIMATE.start_main_~#t2283~0.offset, ~z$flush_delayed~0, ~main$tmp_guard0~0, #NULL.base, ~weak$$choice0~0, ULTIMATE.start_main_~#t2282~0.base, ULTIMATE.start_main_#res, ~z$r_buff1_thd1~0, #valid, #memory_int, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_~#t2282~0.offset, ~__unbuffered_cnt~0, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 11:41:33,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L820-1-->L822: Formula: (and (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t2282~0.base_9|) (not (= 0 |v_ULTIMATE.start_main_~#t2282~0.base_9|)) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t2282~0.base_9| 4)) (= 0 (select |v_#valid_34| |v_ULTIMATE.start_main_~#t2282~0.base_9|)) (= |v_#memory_int_11| (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2282~0.base_9| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2282~0.base_9|) |v_ULTIMATE.start_main_~#t2282~0.offset_8| 1))) (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t2282~0.base_9| 1)) (= 0 |v_ULTIMATE.start_main_~#t2282~0.offset_8|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t2282~0.base=|v_ULTIMATE.start_main_~#t2282~0.base_9|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_3|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t2282~0.offset=|v_ULTIMATE.start_main_~#t2282~0.offset_8|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2282~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t2282~0.offset, #length] because there is no mapped edge [2019-12-07 11:41:33,035 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] P0ENTRY-->L4-3: Formula: (and (= |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out-2119798901| (ite (not (and (not (= 0 (mod ~z$w_buff0_used~0_Out-2119798901 256))) (not (= (mod ~z$w_buff1_used~0_Out-2119798901 256) 0)))) 1 0)) (= ~z$w_buff0_used~0_Out-2119798901 1) (= ~z$w_buff0~0_In-2119798901 ~z$w_buff1~0_Out-2119798901) (= |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out-2119798901| P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out-2119798901) (= P0Thread1of1ForFork0_~arg.offset_Out-2119798901 |P0Thread1of1ForFork0_#in~arg.offset_In-2119798901|) (= ~z$w_buff0~0_Out-2119798901 1) (= P0Thread1of1ForFork0_~arg.base_Out-2119798901 |P0Thread1of1ForFork0_#in~arg.base_In-2119798901|) (= ~z$w_buff1_used~0_Out-2119798901 ~z$w_buff0_used~0_In-2119798901) (not (= 0 P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out-2119798901))) InVars {P0Thread1of1ForFork0_#in~arg.offset=|P0Thread1of1ForFork0_#in~arg.offset_In-2119798901|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2119798901, ~z$w_buff0~0=~z$w_buff0~0_In-2119798901, P0Thread1of1ForFork0_#in~arg.base=|P0Thread1of1ForFork0_#in~arg.base_In-2119798901|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|P0Thread1of1ForFork0_#in~arg.offset_In-2119798901|, ~z$w_buff0_used~0=~z$w_buff0_used~0_Out-2119798901, ~z$w_buff0~0=~z$w_buff0~0_Out-2119798901, ~z$w_buff1_used~0=~z$w_buff1_used~0_Out-2119798901, P0Thread1of1ForFork0___VERIFIER_assert_~expression=P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out-2119798901, P0Thread1of1ForFork0_#in~arg.base=|P0Thread1of1ForFork0_#in~arg.base_In-2119798901|, ~z$w_buff1~0=~z$w_buff1~0_Out-2119798901, P0Thread1of1ForFork0_~arg.base=P0Thread1of1ForFork0_~arg.base_Out-2119798901, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out-2119798901|, P0Thread1of1ForFork0_~arg.offset=P0Thread1of1ForFork0_~arg.offset_Out-2119798901} AuxVars[] AssignedVars[~z$w_buff0_used~0, ~z$w_buff0~0, ~z$w_buff1_used~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~z$w_buff1~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 11:41:33,036 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L822-1-->L824: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t2283~0.offset_9|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2283~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2283~0.base_11|) |v_ULTIMATE.start_main_~#t2283~0.offset_9| 2)) |v_#memory_int_15|) (not (= |v_ULTIMATE.start_main_~#t2283~0.base_11| 0)) (= (store |v_#valid_41| |v_ULTIMATE.start_main_~#t2283~0.base_11| 1) |v_#valid_40|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t2283~0.base_11|) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t2283~0.base_11| 4) |v_#length_17|) (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t2283~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t2283~0.offset=|v_ULTIMATE.start_main_~#t2283~0.offset_9|, #length=|v_#length_17|, ULTIMATE.start_main_~#t2283~0.base=|v_ULTIMATE.start_main_~#t2283~0.base_11|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t2283~0.offset, #length, ULTIMATE.start_main_~#t2283~0.base] because there is no mapped edge [2019-12-07 11:41:33,037 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] L764-2-->L764-5: Formula: (let ((.cse2 (= |P1Thread1of1ForFork1_#t~ite9_Out46451668| |P1Thread1of1ForFork1_#t~ite10_Out46451668|)) (.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In46451668 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In46451668 256) 0))) (or (and (or .cse0 .cse1) .cse2 (= |P1Thread1of1ForFork1_#t~ite9_Out46451668| ~z~0_In46451668)) (and (= |P1Thread1of1ForFork1_#t~ite9_Out46451668| ~z$w_buff1~0_In46451668) .cse2 (not .cse1) (not .cse0)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In46451668, ~z$w_buff1_used~0=~z$w_buff1_used~0_In46451668, ~z$w_buff1~0=~z$w_buff1~0_In46451668, ~z~0=~z~0_In46451668} OutVars{P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out46451668|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In46451668, ~z$w_buff1_used~0=~z$w_buff1_used~0_In46451668, P1Thread1of1ForFork1_#t~ite10=|P1Thread1of1ForFork1_#t~ite10_Out46451668|, ~z$w_buff1~0=~z$w_buff1~0_In46451668, ~z~0=~z~0_In46451668} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10] because there is no mapped edge [2019-12-07 11:41:33,038 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L765-->L765-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In1569080574 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In1569080574 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out1569080574|)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite11_Out1569080574| ~z$w_buff0_used~0_In1569080574)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1569080574, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1569080574} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1569080574, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out1569080574|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1569080574} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 11:41:33,039 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L766-->L766-2: Formula: (let ((.cse3 (= (mod ~z$r_buff1_thd2~0_In1453274942 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In1453274942 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In1453274942 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In1453274942 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In1453274942 |P1Thread1of1ForFork1_#t~ite12_Out1453274942|)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |P1Thread1of1ForFork1_#t~ite12_Out1453274942|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1453274942, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1453274942, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1453274942, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1453274942} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1453274942, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1453274942, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1453274942, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out1453274942|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1453274942} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 11:41:33,039 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L767-->L767-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd2~0_In-1642777139 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In-1642777139 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite13_Out-1642777139| 0) (not .cse0) (not .cse1)) (and (= |P1Thread1of1ForFork1_#t~ite13_Out-1642777139| ~z$r_buff0_thd2~0_In-1642777139) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1642777139, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1642777139} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1642777139, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-1642777139|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1642777139} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 11:41:33,040 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L787-->L787-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In10693579 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite23_In10693579| |P2Thread1of1ForFork2_#t~ite23_Out10693579|) (= ~z$w_buff1~0_In10693579 |P2Thread1of1ForFork2_#t~ite24_Out10693579|) (not .cse0)) (and (= |P2Thread1of1ForFork2_#t~ite23_Out10693579| |P2Thread1of1ForFork2_#t~ite24_Out10693579|) (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In10693579 256) 0))) (or (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In10693579 256))) (= 0 (mod ~z$w_buff0_used~0_In10693579 256)) (and .cse1 (= (mod ~z$r_buff1_thd3~0_In10693579 256) 0)))) (= |P2Thread1of1ForFork2_#t~ite23_Out10693579| ~z$w_buff1~0_In10693579) .cse0))) InVars {P2Thread1of1ForFork2_#t~ite23=|P2Thread1of1ForFork2_#t~ite23_In10693579|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In10693579, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In10693579, ~z$w_buff1_used~0=~z$w_buff1_used~0_In10693579, ~z$w_buff1~0=~z$w_buff1~0_In10693579, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In10693579, ~weak$$choice2~0=~weak$$choice2~0_In10693579} OutVars{P2Thread1of1ForFork2_#t~ite23=|P2Thread1of1ForFork2_#t~ite23_Out10693579|, P2Thread1of1ForFork2_#t~ite24=|P2Thread1of1ForFork2_#t~ite24_Out10693579|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In10693579, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In10693579, ~z$w_buff1_used~0=~z$w_buff1_used~0_In10693579, ~z$w_buff1~0=~z$w_buff1~0_In10693579, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In10693579, ~weak$$choice2~0=~weak$$choice2~0_In10693579} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite23, P2Thread1of1ForFork2_#t~ite24] because there is no mapped edge [2019-12-07 11:41:33,040 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L788-->L788-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In1547707947 256)))) (or (and (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In1547707947 256) 0))) (or (and (= (mod ~z$w_buff1_used~0_In1547707947 256) 0) .cse0) (= 0 (mod ~z$w_buff0_used~0_In1547707947 256)) (and (= 0 (mod ~z$r_buff1_thd3~0_In1547707947 256)) .cse0))) (= |P2Thread1of1ForFork2_#t~ite26_Out1547707947| ~z$w_buff0_used~0_In1547707947) .cse1 (= |P2Thread1of1ForFork2_#t~ite26_Out1547707947| |P2Thread1of1ForFork2_#t~ite27_Out1547707947|)) (and (not .cse1) (= |P2Thread1of1ForFork2_#t~ite26_In1547707947| |P2Thread1of1ForFork2_#t~ite26_Out1547707947|) (= |P2Thread1of1ForFork2_#t~ite27_Out1547707947| ~z$w_buff0_used~0_In1547707947)))) InVars {P2Thread1of1ForFork2_#t~ite26=|P2Thread1of1ForFork2_#t~ite26_In1547707947|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1547707947, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1547707947, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1547707947, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1547707947, ~weak$$choice2~0=~weak$$choice2~0_In1547707947} OutVars{P2Thread1of1ForFork2_#t~ite26=|P2Thread1of1ForFork2_#t~ite26_Out1547707947|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1547707947, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1547707947, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1547707947, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1547707947, ~weak$$choice2~0=~weak$$choice2~0_In1547707947, P2Thread1of1ForFork2_#t~ite27=|P2Thread1of1ForFork2_#t~ite27_Out1547707947|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite26, P2Thread1of1ForFork2_#t~ite27] because there is no mapped edge [2019-12-07 11:41:33,040 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L768-->L768-2: Formula: (let ((.cse2 (= (mod ~z$w_buff0_used~0_In217014200 256) 0)) (.cse3 (= (mod ~z$r_buff0_thd2~0_In217014200 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In217014200 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In217014200 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite14_Out217014200| 0)) (and (or .cse2 .cse3) (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite14_Out217014200| ~z$r_buff1_thd2~0_In217014200)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In217014200, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In217014200, ~z$w_buff1_used~0=~z$w_buff1_used~0_In217014200, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In217014200} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In217014200, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In217014200, ~z$w_buff1_used~0=~z$w_buff1_used~0_In217014200, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out217014200|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In217014200} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 11:41:33,041 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L768-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite14_26| v_~z$r_buff1_thd2~0_55) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_26|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_55, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_25|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 11:41:33,041 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L789-->L789-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In524802254 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite29_Out524802254| ~z$w_buff1_used~0_In524802254) .cse0 (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In524802254 256)))) (or (= (mod ~z$w_buff0_used~0_In524802254 256) 0) (and .cse1 (= (mod ~z$r_buff1_thd3~0_In524802254 256) 0)) (and .cse1 (= (mod ~z$w_buff1_used~0_In524802254 256) 0)))) (= |P2Thread1of1ForFork2_#t~ite29_Out524802254| |P2Thread1of1ForFork2_#t~ite30_Out524802254|)) (and (= |P2Thread1of1ForFork2_#t~ite29_In524802254| |P2Thread1of1ForFork2_#t~ite29_Out524802254|) (= ~z$w_buff1_used~0_In524802254 |P2Thread1of1ForFork2_#t~ite30_Out524802254|) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In524802254, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In524802254, ~z$w_buff1_used~0=~z$w_buff1_used~0_In524802254, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In524802254, ~weak$$choice2~0=~weak$$choice2~0_In524802254, P2Thread1of1ForFork2_#t~ite29=|P2Thread1of1ForFork2_#t~ite29_In524802254|} OutVars{P2Thread1of1ForFork2_#t~ite30=|P2Thread1of1ForFork2_#t~ite30_Out524802254|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In524802254, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In524802254, ~z$w_buff1_used~0=~z$w_buff1_used~0_In524802254, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In524802254, ~weak$$choice2~0=~weak$$choice2~0_In524802254, P2Thread1of1ForFork2_#t~ite29=|P2Thread1of1ForFork2_#t~ite29_Out524802254|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite30, P2Thread1of1ForFork2_#t~ite29] because there is no mapped edge [2019-12-07 11:41:33,041 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L790-->L791: Formula: (and (= v_~z$r_buff0_thd3~0_68 v_~z$r_buff0_thd3~0_67) (not (= 0 (mod v_~weak$$choice2~0_15 256)))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_68, ~weak$$choice2~0=v_~weak$$choice2~0_15} OutVars{P2Thread1of1ForFork2_#t~ite31=|v_P2Thread1of1ForFork2_#t~ite31_6|, P2Thread1of1ForFork2_#t~ite33=|v_P2Thread1of1ForFork2_#t~ite33_7|, P2Thread1of1ForFork2_#t~ite32=|v_P2Thread1of1ForFork2_#t~ite32_7|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, ~weak$$choice2~0=v_~weak$$choice2~0_15} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite31, P2Thread1of1ForFork2_#t~ite33, P2Thread1of1ForFork2_#t~ite32, ~z$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 11:41:33,042 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L793-->L797: Formula: (and (= 0 v_~z$flush_delayed~0_6) (= v_~z~0_25 v_~z$mem_tmp~0_5) (not (= 0 (mod v_~z$flush_delayed~0_7 256)))) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_7} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_5, P2Thread1of1ForFork2_#t~ite37=|v_P2Thread1of1ForFork2_#t~ite37_5|, ~z$flush_delayed~0=v_~z$flush_delayed~0_6, ~z~0=v_~z~0_25} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 11:41:33,043 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L745-->L745-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In947730089 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In947730089 256) 0))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork0_#t~ite5_Out947730089| ~z$w_buff0_used~0_In947730089)) (and (= |P0Thread1of1ForFork0_#t~ite5_Out947730089| 0) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In947730089, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In947730089} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out947730089|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In947730089, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In947730089} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 11:41:33,043 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L746-->L746-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd1~0_In-1518420139 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1518420139 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In-1518420139 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1518420139 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite6_Out-1518420139| ~z$w_buff1_used~0_In-1518420139) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite6_Out-1518420139| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1518420139, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1518420139, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1518420139, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1518420139} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-1518420139|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1518420139, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1518420139, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1518420139, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1518420139} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 11:41:33,044 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L747-->L748: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1343136368 256))) (.cse1 (= (mod ~z$r_buff0_thd1~0_In1343136368 256) 0)) (.cse2 (= ~z$r_buff0_thd1~0_In1343136368 ~z$r_buff0_thd1~0_Out1343136368))) (or (and (= 0 ~z$r_buff0_thd1~0_Out1343136368) (not .cse0) (not .cse1)) (and .cse0 .cse2) (and .cse1 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1343136368, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1343136368} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1343136368, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out1343136368|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out1343136368} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 11:41:33,044 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L748-->L748-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In1309036011 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In1309036011 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd1~0_In1309036011 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In1309036011 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork0_#t~ite8_Out1309036011| ~z$r_buff1_thd1~0_In1309036011)) (and (= |P0Thread1of1ForFork0_#t~ite8_Out1309036011| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1309036011, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1309036011, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1309036011, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1309036011} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1309036011, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out1309036011|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1309036011, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1309036011, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1309036011} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 11:41:33,044 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [861] [861] L748-2-->P0EXIT: Formula: (and (= v_~z$r_buff1_thd1~0_68 |v_P0Thread1of1ForFork0_#t~ite8_42|) (= v_~__unbuffered_cnt~0_73 (+ v_~__unbuffered_cnt~0_74 1)) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_74} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_41|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_68, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_73} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, ~z$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 11:41:33,044 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L797-2-->L797-5: Formula: (let ((.cse0 (= |P2Thread1of1ForFork2_#t~ite38_Out-730603441| |P2Thread1of1ForFork2_#t~ite39_Out-730603441|)) (.cse2 (= (mod ~z$r_buff1_thd3~0_In-730603441 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In-730603441 256) 0))) (or (and .cse0 (= |P2Thread1of1ForFork2_#t~ite38_Out-730603441| ~z~0_In-730603441) (or .cse1 .cse2)) (and .cse0 (= |P2Thread1of1ForFork2_#t~ite38_Out-730603441| ~z$w_buff1~0_In-730603441) (not .cse2) (not .cse1)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-730603441, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-730603441, ~z$w_buff1~0=~z$w_buff1~0_In-730603441, ~z~0=~z~0_In-730603441} OutVars{~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-730603441, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-730603441, ~z$w_buff1~0=~z$w_buff1~0_In-730603441, ~z~0=~z~0_In-730603441, P2Thread1of1ForFork2_#t~ite39=|P2Thread1of1ForFork2_#t~ite39_Out-730603441|, P2Thread1of1ForFork2_#t~ite38=|P2Thread1of1ForFork2_#t~ite38_Out-730603441|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite39, P2Thread1of1ForFork2_#t~ite38] because there is no mapped edge [2019-12-07 11:41:33,044 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L798-->L798-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In938575381 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In938575381 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In938575381 |P2Thread1of1ForFork2_#t~ite40_Out938575381|)) (and (not .cse1) (= 0 |P2Thread1of1ForFork2_#t~ite40_Out938575381|) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In938575381, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In938575381} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In938575381, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In938575381, P2Thread1of1ForFork2_#t~ite40=|P2Thread1of1ForFork2_#t~ite40_Out938575381|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite40] because there is no mapped edge [2019-12-07 11:41:33,045 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L799-->L799-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1581417184 256))) (.cse3 (= (mod ~z$r_buff0_thd3~0_In-1581417184 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1581417184 256))) (.cse0 (= (mod ~z$r_buff1_thd3~0_In-1581417184 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork2_#t~ite41_Out-1581417184| ~z$w_buff1_used~0_In-1581417184)) (and (= 0 |P2Thread1of1ForFork2_#t~ite41_Out-1581417184|) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1581417184, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1581417184, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1581417184, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1581417184} OutVars{P2Thread1of1ForFork2_#t~ite41=|P2Thread1of1ForFork2_#t~ite41_Out-1581417184|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1581417184, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1581417184, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1581417184, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1581417184} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite41] because there is no mapped edge [2019-12-07 11:41:33,045 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [815] [815] L800-->L800-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In393147374 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In393147374 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite42_Out393147374| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite42_Out393147374| ~z$r_buff0_thd3~0_In393147374)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In393147374, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In393147374} OutVars{P2Thread1of1ForFork2_#t~ite42=|P2Thread1of1ForFork2_#t~ite42_Out393147374|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In393147374, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In393147374} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite42] because there is no mapped edge [2019-12-07 11:41:33,045 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L801-->L801-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff0_thd3~0_In-1230418684 256))) (.cse3 (= (mod ~z$w_buff0_used~0_In-1230418684 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In-1230418684 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1230418684 256)))) (or (and (= ~z$r_buff1_thd3~0_In-1230418684 |P2Thread1of1ForFork2_#t~ite43_Out-1230418684|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= |P2Thread1of1ForFork2_#t~ite43_Out-1230418684| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1230418684, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1230418684, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1230418684, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1230418684} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1230418684, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1230418684, P2Thread1of1ForFork2_#t~ite43=|P2Thread1of1ForFork2_#t~ite43_Out-1230418684|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1230418684, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1230418684} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite43] because there is no mapped edge [2019-12-07 11:41:33,046 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L801-2-->P2EXIT: Formula: (and (= v_~z$r_buff1_thd3~0_136 |v_P2Thread1of1ForFork2_#t~ite43_28|) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55)) InVars {P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_136, P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_27|, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#t~ite43, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 11:41:33,046 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L824-1-->L830: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_13) 1 0)) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 11:41:33,046 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L830-2-->L830-5: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In-1563650889 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In-1563650889 256) 0)) (.cse2 (= |ULTIMATE.start_main_#t~ite48_Out-1563650889| |ULTIMATE.start_main_#t~ite47_Out-1563650889|))) (or (and (not .cse0) (= ~z$w_buff1~0_In-1563650889 |ULTIMATE.start_main_#t~ite47_Out-1563650889|) (not .cse1) .cse2) (and (= ~z~0_In-1563650889 |ULTIMATE.start_main_#t~ite47_Out-1563650889|) (or .cse0 .cse1) .cse2))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1563650889, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1563650889, ~z$w_buff1~0=~z$w_buff1~0_In-1563650889, ~z~0=~z~0_In-1563650889} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1563650889, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-1563650889|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1563650889, ~z$w_buff1~0=~z$w_buff1~0_In-1563650889, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-1563650889|, ~z~0=~z~0_In-1563650889} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 11:41:33,046 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L831-->L831-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-301420775 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-301420775 256)))) (or (and (= |ULTIMATE.start_main_#t~ite49_Out-301420775| ~z$w_buff0_used~0_In-301420775) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |ULTIMATE.start_main_#t~ite49_Out-301420775| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-301420775, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-301420775} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-301420775, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-301420775, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-301420775|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 11:41:33,047 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L832-->L832-2: Formula: (let ((.cse3 (= 0 (mod ~z$r_buff0_thd0~0_In-1465467034 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1465467034 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd0~0_In-1465467034 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In-1465467034 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In-1465467034 |ULTIMATE.start_main_#t~ite50_Out-1465467034|) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= |ULTIMATE.start_main_#t~ite50_Out-1465467034| 0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1465467034, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1465467034, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1465467034, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1465467034} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1465467034|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1465467034, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1465467034, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1465467034, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1465467034} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 11:41:33,047 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L833-->L833-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-1852108284 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-1852108284 256)))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In-1852108284 |ULTIMATE.start_main_#t~ite51_Out-1852108284|)) (and (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite51_Out-1852108284|) (not .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1852108284, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1852108284} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1852108284, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out-1852108284|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1852108284} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 11:41:33,047 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L834-->L834-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In1177707338 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In1177707338 256))) (.cse3 (= (mod ~z$r_buff0_thd0~0_In1177707338 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In1177707338 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite52_Out1177707338|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= ~z$r_buff1_thd0~0_In1177707338 |ULTIMATE.start_main_#t~ite52_Out1177707338|) (or .cse3 .cse2)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1177707338, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1177707338, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1177707338, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1177707338} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1177707338|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1177707338, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1177707338, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1177707338, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1177707338} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 11:41:33,048 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L834-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_10| (mod v_~main$tmp_guard1~0_23 256)) (= |v_ULTIMATE.start_main_#t~ite52_54| v_~z$r_buff1_thd0~0_96) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_10|) (= v_~main$tmp_guard1~0_23 (ite (= 0 (ite (not (and (= v_~x~0_49 2) (= v_~__unbuffered_p2_EBX~0_30 0) (= 1 v_~__unbuffered_p2_EAX~0_25))) 1 0)) 0 1))) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_54|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_25, ~x~0=v_~x~0_49} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_53|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_15, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_96, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_25, ~x~0=v_~x~0_49, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 11:41:33,106 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_76a49e6b-28a9-46ef-a396-c339fdd5d234/bin/uautomizer/witness.graphml [2019-12-07 11:41:33,106 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 11:41:33,108 INFO L168 Benchmark]: Toolchain (without parser) took 172368.54 ms. Allocated memory was 1.0 GB in the beginning and 9.5 GB in the end (delta: 8.5 GB). Free memory was 939.8 MB in the beginning and 5.2 GB in the end (delta: -4.3 GB). Peak memory consumption was 4.2 GB. Max. memory is 11.5 GB. [2019-12-07 11:41:33,108 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 11:41:33,108 INFO L168 Benchmark]: CACSL2BoogieTranslator took 415.42 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 117.4 MB). Free memory was 939.8 MB in the beginning and 1.1 GB in the end (delta: -145.4 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. [2019-12-07 11:41:33,109 INFO L168 Benchmark]: Boogie Procedure Inliner took 40.57 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 11:41:33,109 INFO L168 Benchmark]: Boogie Preprocessor took 33.68 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 1.1 MB). Peak memory consumption was 1.1 MB. Max. memory is 11.5 GB. [2019-12-07 11:41:33,109 INFO L168 Benchmark]: RCFGBuilder took 417.78 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.2 MB). Peak memory consumption was 55.2 MB. Max. memory is 11.5 GB. [2019-12-07 11:41:33,110 INFO L168 Benchmark]: TraceAbstraction took 171382.70 ms. Allocated memory was 1.1 GB in the beginning and 9.5 GB in the end (delta: 8.4 GB). Free memory was 1.0 GB in the beginning and 5.3 GB in the end (delta: -4.2 GB). Peak memory consumption was 4.1 GB. Max. memory is 11.5 GB. [2019-12-07 11:41:33,110 INFO L168 Benchmark]: Witness Printer took 74.86 ms. Allocated memory is still 9.5 GB. Free memory was 5.3 GB in the beginning and 5.2 GB in the end (delta: 47.2 MB). Peak memory consumption was 47.2 MB. Max. memory is 11.5 GB. [2019-12-07 11:41:33,112 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 415.42 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 117.4 MB). Free memory was 939.8 MB in the beginning and 1.1 GB in the end (delta: -145.4 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 40.57 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 33.68 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 1.1 MB). Peak memory consumption was 1.1 MB. Max. memory is 11.5 GB. * RCFGBuilder took 417.78 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 55.2 MB). Peak memory consumption was 55.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 171382.70 ms. Allocated memory was 1.1 GB in the beginning and 9.5 GB in the end (delta: 8.4 GB). Free memory was 1.0 GB in the beginning and 5.3 GB in the end (delta: -4.2 GB). Peak memory consumption was 4.1 GB. Max. memory is 11.5 GB. * Witness Printer took 74.86 ms. Allocated memory is still 9.5 GB. Free memory was 5.3 GB in the beginning and 5.2 GB in the end (delta: 47.2 MB). Peak memory consumption was 47.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.5s, 175 ProgramPointsBefore, 92 ProgramPointsAfterwards, 212 TransitionsBefore, 102 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 12 FixpointIterations, 32 TrivialSequentialCompositions, 54 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 35 ConcurrentYvCompositions, 31 ChoiceCompositions, 7185 VarBasedMoverChecksPositive, 382 VarBasedMoverChecksNegative, 188 SemBasedMoverChecksPositive, 288 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.1s, 0 MoverChecksTotal, 125946 CheckedPairsTotal, 121 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L820] FCALL, FORK 0 pthread_create(&t2281, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L734] 1 z$r_buff1_thd0 = z$r_buff0_thd0 [L735] 1 z$r_buff1_thd1 = z$r_buff0_thd1 [L736] 1 z$r_buff1_thd2 = z$r_buff0_thd2 [L737] 1 z$r_buff1_thd3 = z$r_buff0_thd3 [L738] 1 z$r_buff0_thd1 = (_Bool)1 [L741] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L744] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L822] FCALL, FORK 0 pthread_create(&t2282, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L824] FCALL, FORK 0 pthread_create(&t2283, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L758] 2 x = 2 [L761] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L764] EXPR 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L764] 2 z = z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) [L778] 3 __unbuffered_p2_EAX = y [L781] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L782] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L783] 3 z$flush_delayed = weak$$choice2 [L784] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L785] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L785] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L765] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L786] EXPR 3 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0))=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L766] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L786] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L787] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L767] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L788] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L789] 3 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L791] EXPR 3 weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L791] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L792] 3 __unbuffered_p2_EBX = z VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L797] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L744] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L745] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L746] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L797] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L798] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L799] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L800] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L830] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L830] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L831] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L832] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L833] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 166 locations, 2 error locations. Result: UNSAFE, OverallTime: 171.2s, OverallIterations: 32, TraceHistogramMax: 1, AutomataDifference: 46.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 7324 SDtfs, 9166 SDslu, 25100 SDs, 0 SdLazy, 25487 SolverSat, 502 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 18.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 503 GetRequests, 49 SyntacticMatches, 23 SemanticMatches, 431 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4654 ImplicationChecksByTransitivity, 6.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=292255occurred in iteration=8, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 102.9s AutomataMinimizationTime, 31 MinimizatonAttempts, 437949 StatesRemovedByMinimization, 28 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 2.2s InterpolantComputationTime, 1414 NumberOfCodeBlocks, 1414 NumberOfCodeBlocksAsserted, 32 NumberOfCheckSat, 1316 ConstructedInterpolants, 0 QuantifiedInterpolants, 358818 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 31 InterpolantComputations, 31 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...