./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe021_power.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_eeb67cc8-f490-461e-ba8c-04de92756f14/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_eeb67cc8-f490-461e-ba8c-04de92756f14/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_eeb67cc8-f490-461e-ba8c-04de92756f14/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_eeb67cc8-f490-461e-ba8c-04de92756f14/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe021_power.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_eeb67cc8-f490-461e-ba8c-04de92756f14/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_eeb67cc8-f490-461e-ba8c-04de92756f14/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash ea9984fbf71bf5b7c3727b1cdfb6cadae73cb035 .............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 16:31:03,182 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 16:31:03,183 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 16:31:03,191 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 16:31:03,191 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 16:31:03,192 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 16:31:03,193 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 16:31:03,195 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 16:31:03,196 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 16:31:03,197 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 16:31:03,198 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 16:31:03,199 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 16:31:03,200 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 16:31:03,200 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 16:31:03,201 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 16:31:03,202 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 16:31:03,203 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 16:31:03,204 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 16:31:03,206 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 16:31:03,208 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 16:31:03,209 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 16:31:03,210 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 16:31:03,211 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 16:31:03,211 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 16:31:03,214 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 16:31:03,214 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 16:31:03,214 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 16:31:03,215 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 16:31:03,215 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 16:31:03,216 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 16:31:03,216 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 16:31:03,216 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 16:31:03,217 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 16:31:03,217 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 16:31:03,218 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 16:31:03,218 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 16:31:03,219 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 16:31:03,219 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 16:31:03,219 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 16:31:03,220 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 16:31:03,220 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 16:31:03,221 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_eeb67cc8-f490-461e-ba8c-04de92756f14/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 16:31:03,231 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 16:31:03,232 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 16:31:03,232 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 16:31:03,233 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 16:31:03,233 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 16:31:03,233 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 16:31:03,233 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 16:31:03,233 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 16:31:03,233 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 16:31:03,233 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 16:31:03,233 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 16:31:03,234 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 16:31:03,234 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 16:31:03,234 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 16:31:03,234 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 16:31:03,234 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 16:31:03,234 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 16:31:03,234 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 16:31:03,235 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 16:31:03,235 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 16:31:03,235 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 16:31:03,235 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 16:31:03,235 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 16:31:03,235 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 16:31:03,235 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 16:31:03,235 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 16:31:03,236 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 16:31:03,236 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 16:31:03,236 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 16:31:03,236 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_eeb67cc8-f490-461e-ba8c-04de92756f14/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> ea9984fbf71bf5b7c3727b1cdfb6cadae73cb035 [2019-12-07 16:31:03,346 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 16:31:03,354 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 16:31:03,356 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 16:31:03,357 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 16:31:03,357 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 16:31:03,357 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_eeb67cc8-f490-461e-ba8c-04de92756f14/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe021_power.opt.i [2019-12-07 16:31:03,396 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_eeb67cc8-f490-461e-ba8c-04de92756f14/bin/uautomizer/data/7edd96dad/4e38aaf74c2e4347a5df51b3938c61d6/FLAG06ff32f2a [2019-12-07 16:31:03,775 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 16:31:03,776 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_eeb67cc8-f490-461e-ba8c-04de92756f14/sv-benchmarks/c/pthread-wmm/safe021_power.opt.i [2019-12-07 16:31:03,786 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_eeb67cc8-f490-461e-ba8c-04de92756f14/bin/uautomizer/data/7edd96dad/4e38aaf74c2e4347a5df51b3938c61d6/FLAG06ff32f2a [2019-12-07 16:31:03,794 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_eeb67cc8-f490-461e-ba8c-04de92756f14/bin/uautomizer/data/7edd96dad/4e38aaf74c2e4347a5df51b3938c61d6 [2019-12-07 16:31:03,796 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 16:31:03,797 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 16:31:03,798 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 16:31:03,798 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 16:31:03,800 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 16:31:03,801 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 04:31:03" (1/1) ... [2019-12-07 16:31:03,802 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@68daf569 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:31:03, skipping insertion in model container [2019-12-07 16:31:03,802 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 04:31:03" (1/1) ... [2019-12-07 16:31:03,807 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 16:31:03,834 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 16:31:04,071 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 16:31:04,078 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 16:31:04,120 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 16:31:04,164 INFO L208 MainTranslator]: Completed translation [2019-12-07 16:31:04,164 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:31:04 WrapperNode [2019-12-07 16:31:04,164 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 16:31:04,165 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 16:31:04,165 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 16:31:04,165 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 16:31:04,170 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:31:04" (1/1) ... [2019-12-07 16:31:04,184 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:31:04" (1/1) ... [2019-12-07 16:31:04,205 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 16:31:04,205 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 16:31:04,205 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 16:31:04,205 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 16:31:04,211 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:31:04" (1/1) ... [2019-12-07 16:31:04,211 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:31:04" (1/1) ... [2019-12-07 16:31:04,214 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:31:04" (1/1) ... [2019-12-07 16:31:04,215 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:31:04" (1/1) ... [2019-12-07 16:31:04,221 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:31:04" (1/1) ... [2019-12-07 16:31:04,225 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:31:04" (1/1) ... [2019-12-07 16:31:04,227 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:31:04" (1/1) ... [2019-12-07 16:31:04,230 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 16:31:04,231 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 16:31:04,231 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 16:31:04,231 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 16:31:04,231 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:31:04" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_eeb67cc8-f490-461e-ba8c-04de92756f14/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 16:31:04,270 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 16:31:04,270 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 16:31:04,270 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 16:31:04,271 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 16:31:04,271 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 16:31:04,271 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 16:31:04,271 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 16:31:04,271 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 16:31:04,271 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 16:31:04,271 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 16:31:04,271 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 16:31:04,271 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 16:31:04,271 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 16:31:04,272 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 16:31:04,656 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 16:31:04,657 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 16:31:04,658 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 04:31:04 BoogieIcfgContainer [2019-12-07 16:31:04,658 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 16:31:04,659 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 16:31:04,659 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 16:31:04,661 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 16:31:04,662 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 04:31:03" (1/3) ... [2019-12-07 16:31:04,662 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1a1c2371 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 04:31:04, skipping insertion in model container [2019-12-07 16:31:04,662 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:31:04" (2/3) ... [2019-12-07 16:31:04,663 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1a1c2371 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 04:31:04, skipping insertion in model container [2019-12-07 16:31:04,663 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 04:31:04" (3/3) ... [2019-12-07 16:31:04,664 INFO L109 eAbstractionObserver]: Analyzing ICFG safe021_power.opt.i [2019-12-07 16:31:04,673 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 16:31:04,673 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 16:31:04,679 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 16:31:04,680 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 16:31:04,708 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,709 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,709 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,709 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,709 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,709 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,709 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,709 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,709 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,710 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,710 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,710 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,710 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,710 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,710 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,710 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,710 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,711 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,711 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,711 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,711 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,711 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,711 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,711 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,711 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,711 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,712 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,712 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,712 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,712 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,712 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,713 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,713 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,713 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,713 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,713 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,713 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,713 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,713 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,714 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,714 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,714 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,714 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,714 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,714 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,714 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,714 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,714 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,715 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,715 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,715 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,715 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,715 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,715 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,715 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,715 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,716 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,716 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,716 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,716 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,716 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,716 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,716 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,716 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,717 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,717 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,717 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,717 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,717 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,717 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,717 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,717 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,717 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,717 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,718 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,718 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,718 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,718 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,718 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,718 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,718 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,718 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,718 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,718 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,719 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,719 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,719 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,719 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,719 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,719 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,719 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,719 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,719 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,720 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:31:04,734 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 16:31:04,749 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 16:31:04,749 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 16:31:04,749 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 16:31:04,749 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 16:31:04,749 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 16:31:04,749 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 16:31:04,749 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 16:31:04,749 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 16:31:04,764 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 175 places, 212 transitions [2019-12-07 16:31:04,766 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 175 places, 212 transitions [2019-12-07 16:31:04,838 INFO L134 PetriNetUnfolder]: 47/209 cut-off events. [2019-12-07 16:31:04,838 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 16:31:04,851 INFO L76 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 209 events. 47/209 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 579 event pairs. 9/169 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 16:31:04,869 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 175 places, 212 transitions [2019-12-07 16:31:04,901 INFO L134 PetriNetUnfolder]: 47/209 cut-off events. [2019-12-07 16:31:04,901 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 16:31:04,906 INFO L76 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 209 events. 47/209 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 579 event pairs. 9/169 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 16:31:04,921 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 17074 [2019-12-07 16:31:04,922 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 16:31:07,650 WARN L192 SmtUtils]: Spent 121.00 ms on a formula simplification. DAG size of input: 82 DAG size of output: 80 [2019-12-07 16:31:07,906 INFO L206 etLargeBlockEncoding]: Checked pairs total: 91392 [2019-12-07 16:31:07,906 INFO L214 etLargeBlockEncoding]: Total number of compositions: 112 [2019-12-07 16:31:07,908 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 94 places, 103 transitions [2019-12-07 16:31:23,675 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 118050 states. [2019-12-07 16:31:23,676 INFO L276 IsEmpty]: Start isEmpty. Operand 118050 states. [2019-12-07 16:31:23,680 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-07 16:31:23,680 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:31:23,680 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-07 16:31:23,681 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:31:23,684 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:31:23,684 INFO L82 PathProgramCache]: Analyzing trace with hash 815309389, now seen corresponding path program 1 times [2019-12-07 16:31:23,690 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:31:23,690 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [64274587] [2019-12-07 16:31:23,690 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:31:23,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:31:23,829 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:31:23,830 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [64274587] [2019-12-07 16:31:23,830 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:31:23,830 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 16:31:23,831 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [987746586] [2019-12-07 16:31:23,834 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:31:23,834 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:31:23,843 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:31:23,843 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:31:23,844 INFO L87 Difference]: Start difference. First operand 118050 states. Second operand 3 states. [2019-12-07 16:31:24,730 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:31:24,731 INFO L93 Difference]: Finished difference Result 117660 states and 502246 transitions. [2019-12-07 16:31:24,732 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:31:24,733 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-07 16:31:24,733 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:31:25,297 INFO L225 Difference]: With dead ends: 117660 [2019-12-07 16:31:25,297 INFO L226 Difference]: Without dead ends: 115112 [2019-12-07 16:31:25,298 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:31:29,019 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115112 states. [2019-12-07 16:31:31,758 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115112 to 115112. [2019-12-07 16:31:31,759 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115112 states. [2019-12-07 16:31:32,316 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115112 states to 115112 states and 491858 transitions. [2019-12-07 16:31:32,317 INFO L78 Accepts]: Start accepts. Automaton has 115112 states and 491858 transitions. Word has length 5 [2019-12-07 16:31:32,317 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:31:32,318 INFO L462 AbstractCegarLoop]: Abstraction has 115112 states and 491858 transitions. [2019-12-07 16:31:32,318 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:31:32,318 INFO L276 IsEmpty]: Start isEmpty. Operand 115112 states and 491858 transitions. [2019-12-07 16:31:32,320 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 16:31:32,320 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:31:32,320 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:31:32,320 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:31:32,321 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:31:32,321 INFO L82 PathProgramCache]: Analyzing trace with hash 162612621, now seen corresponding path program 1 times [2019-12-07 16:31:32,321 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:31:32,321 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1556910173] [2019-12-07 16:31:32,321 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:31:32,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:31:32,374 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:31:32,375 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1556910173] [2019-12-07 16:31:32,375 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:31:32,375 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:31:32,375 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [54836073] [2019-12-07 16:31:32,376 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:31:32,376 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:31:32,376 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:31:32,376 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:31:32,376 INFO L87 Difference]: Start difference. First operand 115112 states and 491858 transitions. Second operand 4 states. [2019-12-07 16:31:33,284 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:31:33,284 INFO L93 Difference]: Finished difference Result 180042 states and 739573 transitions. [2019-12-07 16:31:33,285 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:31:33,285 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 16:31:33,285 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:31:33,745 INFO L225 Difference]: With dead ends: 180042 [2019-12-07 16:31:33,745 INFO L226 Difference]: Without dead ends: 179993 [2019-12-07 16:31:33,746 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:31:40,244 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179993 states. [2019-12-07 16:31:42,381 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179993 to 166069. [2019-12-07 16:31:42,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166069 states. [2019-12-07 16:31:42,822 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166069 states to 166069 states and 689057 transitions. [2019-12-07 16:31:42,822 INFO L78 Accepts]: Start accepts. Automaton has 166069 states and 689057 transitions. Word has length 11 [2019-12-07 16:31:42,822 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:31:42,822 INFO L462 AbstractCegarLoop]: Abstraction has 166069 states and 689057 transitions. [2019-12-07 16:31:42,823 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:31:42,823 INFO L276 IsEmpty]: Start isEmpty. Operand 166069 states and 689057 transitions. [2019-12-07 16:31:42,828 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 16:31:42,828 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:31:42,828 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:31:42,828 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:31:42,828 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:31:42,828 INFO L82 PathProgramCache]: Analyzing trace with hash 1907433687, now seen corresponding path program 1 times [2019-12-07 16:31:42,828 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:31:42,829 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1655326434] [2019-12-07 16:31:42,829 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:31:42,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:31:42,871 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:31:42,871 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1655326434] [2019-12-07 16:31:42,871 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:31:42,871 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:31:42,871 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1457754850] [2019-12-07 16:31:42,872 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:31:42,872 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:31:42,872 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:31:42,872 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:31:42,872 INFO L87 Difference]: Start difference. First operand 166069 states and 689057 transitions. Second operand 4 states. [2019-12-07 16:31:44,456 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:31:44,456 INFO L93 Difference]: Finished difference Result 237299 states and 961992 transitions. [2019-12-07 16:31:44,457 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:31:44,457 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 16:31:44,457 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:31:45,035 INFO L225 Difference]: With dead ends: 237299 [2019-12-07 16:31:45,035 INFO L226 Difference]: Without dead ends: 237236 [2019-12-07 16:31:45,036 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:31:52,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 237236 states. [2019-12-07 16:31:54,950 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 237236 to 202025. [2019-12-07 16:31:54,950 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 202025 states. [2019-12-07 16:31:55,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 202025 states to 202025 states and 831679 transitions. [2019-12-07 16:31:55,531 INFO L78 Accepts]: Start accepts. Automaton has 202025 states and 831679 transitions. Word has length 13 [2019-12-07 16:31:55,532 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:31:55,532 INFO L462 AbstractCegarLoop]: Abstraction has 202025 states and 831679 transitions. [2019-12-07 16:31:55,532 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:31:55,532 INFO L276 IsEmpty]: Start isEmpty. Operand 202025 states and 831679 transitions. [2019-12-07 16:31:55,534 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 16:31:55,534 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:31:55,535 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:31:55,535 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:31:55,535 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:31:55,535 INFO L82 PathProgramCache]: Analyzing trace with hash -1457610254, now seen corresponding path program 1 times [2019-12-07 16:31:55,535 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:31:55,535 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [635029206] [2019-12-07 16:31:55,535 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:31:55,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:31:55,576 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:31:55,576 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [635029206] [2019-12-07 16:31:55,576 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:31:55,576 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:31:55,576 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [573346754] [2019-12-07 16:31:55,577 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:31:55,577 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:31:55,577 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:31:55,577 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:31:55,577 INFO L87 Difference]: Start difference. First operand 202025 states and 831679 transitions. Second operand 4 states. [2019-12-07 16:31:57,205 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:31:57,205 INFO L93 Difference]: Finished difference Result 254241 states and 1038415 transitions. [2019-12-07 16:31:57,206 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:31:57,206 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 16:31:57,206 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:31:57,871 INFO L225 Difference]: With dead ends: 254241 [2019-12-07 16:31:57,871 INFO L226 Difference]: Without dead ends: 254241 [2019-12-07 16:31:57,871 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:32:03,456 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 254241 states. [2019-12-07 16:32:09,012 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 254241 to 214536. [2019-12-07 16:32:09,012 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 214536 states. [2019-12-07 16:32:09,640 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 214536 states to 214536 states and 883714 transitions. [2019-12-07 16:32:09,641 INFO L78 Accepts]: Start accepts. Automaton has 214536 states and 883714 transitions. Word has length 13 [2019-12-07 16:32:09,641 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:32:09,641 INFO L462 AbstractCegarLoop]: Abstraction has 214536 states and 883714 transitions. [2019-12-07 16:32:09,641 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:32:09,641 INFO L276 IsEmpty]: Start isEmpty. Operand 214536 states and 883714 transitions. [2019-12-07 16:32:09,662 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 16:32:09,662 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:32:09,662 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:32:09,662 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:32:09,662 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:32:09,662 INFO L82 PathProgramCache]: Analyzing trace with hash -440148133, now seen corresponding path program 1 times [2019-12-07 16:32:09,662 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:32:09,663 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1236932373] [2019-12-07 16:32:09,663 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:32:09,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:32:09,733 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:32:09,734 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1236932373] [2019-12-07 16:32:09,734 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:32:09,734 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:32:09,734 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1968151659] [2019-12-07 16:32:09,734 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:32:09,735 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:32:09,735 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:32:09,735 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:32:09,735 INFO L87 Difference]: Start difference. First operand 214536 states and 883714 transitions. Second operand 5 states. [2019-12-07 16:32:11,780 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:32:11,780 INFO L93 Difference]: Finished difference Result 310602 states and 1253169 transitions. [2019-12-07 16:32:11,781 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 16:32:11,781 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 16:32:11,781 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:32:12,533 INFO L225 Difference]: With dead ends: 310602 [2019-12-07 16:32:12,533 INFO L226 Difference]: Without dead ends: 310455 [2019-12-07 16:32:12,534 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 16:32:18,622 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 310455 states. [2019-12-07 16:32:22,125 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 310455 to 237118. [2019-12-07 16:32:22,125 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 237118 states. [2019-12-07 16:32:23,255 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 237118 states to 237118 states and 972610 transitions. [2019-12-07 16:32:23,255 INFO L78 Accepts]: Start accepts. Automaton has 237118 states and 972610 transitions. Word has length 19 [2019-12-07 16:32:23,256 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:32:23,256 INFO L462 AbstractCegarLoop]: Abstraction has 237118 states and 972610 transitions. [2019-12-07 16:32:23,256 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:32:23,256 INFO L276 IsEmpty]: Start isEmpty. Operand 237118 states and 972610 transitions. [2019-12-07 16:32:23,267 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 16:32:23,267 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:32:23,267 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:32:23,268 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:32:23,268 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:32:23,268 INFO L82 PathProgramCache]: Analyzing trace with hash 489775222, now seen corresponding path program 1 times [2019-12-07 16:32:23,268 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:32:23,268 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1520159902] [2019-12-07 16:32:23,268 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:32:23,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:32:23,311 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:32:23,311 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1520159902] [2019-12-07 16:32:23,312 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:32:23,312 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:32:23,312 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [432269908] [2019-12-07 16:32:23,312 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:32:23,312 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:32:23,312 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:32:23,312 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:32:23,313 INFO L87 Difference]: Start difference. First operand 237118 states and 972610 transitions. Second operand 5 states. [2019-12-07 16:32:25,022 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:32:25,023 INFO L93 Difference]: Finished difference Result 338053 states and 1359908 transitions. [2019-12-07 16:32:25,023 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 16:32:25,023 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 16:32:25,024 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:32:28,863 INFO L225 Difference]: With dead ends: 338053 [2019-12-07 16:32:28,863 INFO L226 Difference]: Without dead ends: 337990 [2019-12-07 16:32:28,863 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 16:32:34,944 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 337990 states. [2019-12-07 16:32:38,569 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 337990 to 240428. [2019-12-07 16:32:38,569 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 240428 states. [2019-12-07 16:32:39,247 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 240428 states to 240428 states and 984368 transitions. [2019-12-07 16:32:39,247 INFO L78 Accepts]: Start accepts. Automaton has 240428 states and 984368 transitions. Word has length 19 [2019-12-07 16:32:39,247 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:32:39,247 INFO L462 AbstractCegarLoop]: Abstraction has 240428 states and 984368 transitions. [2019-12-07 16:32:39,248 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:32:39,248 INFO L276 IsEmpty]: Start isEmpty. Operand 240428 states and 984368 transitions. [2019-12-07 16:32:39,261 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 16:32:39,261 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:32:39,261 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:32:39,261 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:32:39,262 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:32:39,262 INFO L82 PathProgramCache]: Analyzing trace with hash 15415012, now seen corresponding path program 1 times [2019-12-07 16:32:39,262 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:32:39,262 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [28363612] [2019-12-07 16:32:39,262 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:32:39,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:32:39,307 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:32:39,307 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [28363612] [2019-12-07 16:32:39,307 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:32:39,307 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:32:39,307 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1120262044] [2019-12-07 16:32:39,307 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:32:39,308 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:32:39,308 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:32:39,308 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:32:39,308 INFO L87 Difference]: Start difference. First operand 240428 states and 984368 transitions. Second operand 5 states. [2019-12-07 16:32:41,371 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:32:41,371 INFO L93 Difference]: Finished difference Result 349666 states and 1407169 transitions. [2019-12-07 16:32:41,372 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 16:32:41,372 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 16:32:41,372 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:32:42,690 INFO L225 Difference]: With dead ends: 349666 [2019-12-07 16:32:42,690 INFO L226 Difference]: Without dead ends: 349603 [2019-12-07 16:32:42,691 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 16:32:49,028 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 349603 states. [2019-12-07 16:32:52,728 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 349603 to 260547. [2019-12-07 16:32:52,729 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 260547 states. [2019-12-07 16:32:53,813 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 260547 states to 260547 states and 1064849 transitions. [2019-12-07 16:32:53,813 INFO L78 Accepts]: Start accepts. Automaton has 260547 states and 1064849 transitions. Word has length 19 [2019-12-07 16:32:53,814 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:32:53,814 INFO L462 AbstractCegarLoop]: Abstraction has 260547 states and 1064849 transitions. [2019-12-07 16:32:53,814 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:32:53,814 INFO L276 IsEmpty]: Start isEmpty. Operand 260547 states and 1064849 transitions. [2019-12-07 16:32:53,873 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 16:32:53,873 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:32:53,873 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:32:53,873 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:32:53,873 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:32:53,874 INFO L82 PathProgramCache]: Analyzing trace with hash -970063256, now seen corresponding path program 1 times [2019-12-07 16:32:53,874 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:32:53,874 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1056846080] [2019-12-07 16:32:53,874 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:32:53,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:32:53,933 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:32:53,933 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1056846080] [2019-12-07 16:32:53,933 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:32:53,934 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 16:32:53,934 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1960224022] [2019-12-07 16:32:53,934 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 16:32:53,934 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:32:53,934 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 16:32:53,934 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 16:32:53,934 INFO L87 Difference]: Start difference. First operand 260547 states and 1064849 transitions. Second operand 6 states. [2019-12-07 16:32:58,911 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:32:58,911 INFO L93 Difference]: Finished difference Result 307715 states and 1243462 transitions. [2019-12-07 16:32:58,911 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 16:32:58,911 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 25 [2019-12-07 16:32:58,911 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:32:59,647 INFO L225 Difference]: With dead ends: 307715 [2019-12-07 16:32:59,647 INFO L226 Difference]: Without dead ends: 307568 [2019-12-07 16:32:59,648 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 40 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=81, Invalid=191, Unknown=0, NotChecked=0, Total=272 [2019-12-07 16:33:05,357 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 307568 states. [2019-12-07 16:33:08,720 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 307568 to 213409. [2019-12-07 16:33:08,721 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 213409 states. [2019-12-07 16:33:09,309 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 213409 states to 213409 states and 876801 transitions. [2019-12-07 16:33:09,310 INFO L78 Accepts]: Start accepts. Automaton has 213409 states and 876801 transitions. Word has length 25 [2019-12-07 16:33:09,310 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:09,310 INFO L462 AbstractCegarLoop]: Abstraction has 213409 states and 876801 transitions. [2019-12-07 16:33:09,310 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 16:33:09,310 INFO L276 IsEmpty]: Start isEmpty. Operand 213409 states and 876801 transitions. [2019-12-07 16:33:09,380 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 16:33:09,380 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:09,380 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:09,380 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:09,381 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:09,381 INFO L82 PathProgramCache]: Analyzing trace with hash 1844684169, now seen corresponding path program 1 times [2019-12-07 16:33:09,381 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:09,381 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1556495144] [2019-12-07 16:33:09,381 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:09,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:09,405 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:09,405 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1556495144] [2019-12-07 16:33:09,405 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:09,405 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:33:09,405 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2052628680] [2019-12-07 16:33:09,405 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:33:09,405 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:09,406 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:33:09,406 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:33:09,406 INFO L87 Difference]: Start difference. First operand 213409 states and 876801 transitions. Second operand 3 states. [2019-12-07 16:33:10,829 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:10,829 INFO L93 Difference]: Finished difference Result 268544 states and 1104697 transitions. [2019-12-07 16:33:10,830 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:33:10,830 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 16:33:10,830 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:11,513 INFO L225 Difference]: With dead ends: 268544 [2019-12-07 16:33:11,514 INFO L226 Difference]: Without dead ends: 268544 [2019-12-07 16:33:11,514 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:33:17,109 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 268544 states. [2019-12-07 16:33:20,464 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 268544 to 237027. [2019-12-07 16:33:20,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 237027 states. [2019-12-07 16:33:21,470 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 237027 states to 237027 states and 974297 transitions. [2019-12-07 16:33:21,470 INFO L78 Accepts]: Start accepts. Automaton has 237027 states and 974297 transitions. Word has length 27 [2019-12-07 16:33:21,471 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:21,471 INFO L462 AbstractCegarLoop]: Abstraction has 237027 states and 974297 transitions. [2019-12-07 16:33:21,471 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:33:21,471 INFO L276 IsEmpty]: Start isEmpty. Operand 237027 states and 974297 transitions. [2019-12-07 16:33:21,542 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 16:33:21,542 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:21,542 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:21,542 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:21,542 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:21,542 INFO L82 PathProgramCache]: Analyzing trace with hash 2121472350, now seen corresponding path program 1 times [2019-12-07 16:33:21,542 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:21,542 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [98209478] [2019-12-07 16:33:21,542 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:21,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:21,572 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:21,572 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [98209478] [2019-12-07 16:33:21,573 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:21,573 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:33:21,573 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [152874200] [2019-12-07 16:33:21,573 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:33:21,573 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:21,573 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:33:21,574 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:33:21,574 INFO L87 Difference]: Start difference. First operand 237027 states and 974297 transitions. Second operand 3 states. [2019-12-07 16:33:21,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:21,692 INFO L93 Difference]: Finished difference Result 47294 states and 152066 transitions. [2019-12-07 16:33:21,693 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:33:21,693 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 16:33:21,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:21,762 INFO L225 Difference]: With dead ends: 47294 [2019-12-07 16:33:21,762 INFO L226 Difference]: Without dead ends: 47294 [2019-12-07 16:33:21,762 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:33:21,956 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47294 states. [2019-12-07 16:33:22,399 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47294 to 47294. [2019-12-07 16:33:22,400 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47294 states. [2019-12-07 16:33:22,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47294 states to 47294 states and 152066 transitions. [2019-12-07 16:33:22,482 INFO L78 Accepts]: Start accepts. Automaton has 47294 states and 152066 transitions. Word has length 27 [2019-12-07 16:33:22,482 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:22,482 INFO L462 AbstractCegarLoop]: Abstraction has 47294 states and 152066 transitions. [2019-12-07 16:33:22,482 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:33:22,483 INFO L276 IsEmpty]: Start isEmpty. Operand 47294 states and 152066 transitions. [2019-12-07 16:33:22,501 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 16:33:22,501 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:22,501 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:22,501 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:22,501 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:22,501 INFO L82 PathProgramCache]: Analyzing trace with hash -740685533, now seen corresponding path program 1 times [2019-12-07 16:33:22,501 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:22,501 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1348143254] [2019-12-07 16:33:22,502 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:22,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:22,536 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:22,536 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1348143254] [2019-12-07 16:33:22,536 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:22,536 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:33:22,536 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [258185540] [2019-12-07 16:33:22,536 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:33:22,537 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:22,537 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:33:22,537 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:33:22,537 INFO L87 Difference]: Start difference. First operand 47294 states and 152066 transitions. Second operand 4 states. [2019-12-07 16:33:22,564 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:22,564 INFO L93 Difference]: Finished difference Result 8652 states and 23278 transitions. [2019-12-07 16:33:22,564 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 16:33:22,564 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 39 [2019-12-07 16:33:22,565 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:22,572 INFO L225 Difference]: With dead ends: 8652 [2019-12-07 16:33:22,572 INFO L226 Difference]: Without dead ends: 8652 [2019-12-07 16:33:22,572 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:33:22,596 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8652 states. [2019-12-07 16:33:22,653 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8652 to 8512. [2019-12-07 16:33:22,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8512 states. [2019-12-07 16:33:22,663 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8512 states to 8512 states and 22878 transitions. [2019-12-07 16:33:22,663 INFO L78 Accepts]: Start accepts. Automaton has 8512 states and 22878 transitions. Word has length 39 [2019-12-07 16:33:22,663 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:22,663 INFO L462 AbstractCegarLoop]: Abstraction has 8512 states and 22878 transitions. [2019-12-07 16:33:22,663 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:33:22,663 INFO L276 IsEmpty]: Start isEmpty. Operand 8512 states and 22878 transitions. [2019-12-07 16:33:22,669 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-12-07 16:33:22,669 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:22,669 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:22,669 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:22,669 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:22,669 INFO L82 PathProgramCache]: Analyzing trace with hash 977436222, now seen corresponding path program 1 times [2019-12-07 16:33:22,670 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:22,670 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1742458955] [2019-12-07 16:33:22,670 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:22,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:22,714 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:22,715 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1742458955] [2019-12-07 16:33:22,715 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:22,715 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 16:33:22,715 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1634723183] [2019-12-07 16:33:22,715 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:33:22,715 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:22,715 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:33:22,716 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:33:22,716 INFO L87 Difference]: Start difference. First operand 8512 states and 22878 transitions. Second operand 5 states. [2019-12-07 16:33:22,740 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:22,740 INFO L93 Difference]: Finished difference Result 5737 states and 16470 transitions. [2019-12-07 16:33:22,740 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:33:22,741 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 51 [2019-12-07 16:33:22,741 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:22,746 INFO L225 Difference]: With dead ends: 5737 [2019-12-07 16:33:22,746 INFO L226 Difference]: Without dead ends: 5737 [2019-12-07 16:33:22,746 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:33:22,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5737 states. [2019-12-07 16:33:22,804 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5737 to 5324. [2019-12-07 16:33:22,805 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5324 states. [2019-12-07 16:33:22,811 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5324 states to 5324 states and 15353 transitions. [2019-12-07 16:33:22,811 INFO L78 Accepts]: Start accepts. Automaton has 5324 states and 15353 transitions. Word has length 51 [2019-12-07 16:33:22,811 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:22,811 INFO L462 AbstractCegarLoop]: Abstraction has 5324 states and 15353 transitions. [2019-12-07 16:33:22,811 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:33:22,811 INFO L276 IsEmpty]: Start isEmpty. Operand 5324 states and 15353 transitions. [2019-12-07 16:33:22,815 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 16:33:22,815 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:22,815 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:22,815 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:22,815 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:22,815 INFO L82 PathProgramCache]: Analyzing trace with hash 1883123384, now seen corresponding path program 1 times [2019-12-07 16:33:22,815 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:22,815 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [228901837] [2019-12-07 16:33:22,815 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:22,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:22,850 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:22,851 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [228901837] [2019-12-07 16:33:22,851 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:22,851 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:33:22,851 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2007650236] [2019-12-07 16:33:22,851 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:33:22,852 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:22,852 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:33:22,852 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:33:22,852 INFO L87 Difference]: Start difference. First operand 5324 states and 15353 transitions. Second operand 3 states. [2019-12-07 16:33:22,885 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:22,885 INFO L93 Difference]: Finished difference Result 5331 states and 15353 transitions. [2019-12-07 16:33:22,885 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:33:22,885 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 64 [2019-12-07 16:33:22,886 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:22,892 INFO L225 Difference]: With dead ends: 5331 [2019-12-07 16:33:22,892 INFO L226 Difference]: Without dead ends: 5330 [2019-12-07 16:33:22,892 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:33:22,918 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5330 states. [2019-12-07 16:33:22,960 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5330 to 5321. [2019-12-07 16:33:22,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5321 states. [2019-12-07 16:33:22,966 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5321 states to 5321 states and 15343 transitions. [2019-12-07 16:33:22,967 INFO L78 Accepts]: Start accepts. Automaton has 5321 states and 15343 transitions. Word has length 64 [2019-12-07 16:33:22,967 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:22,967 INFO L462 AbstractCegarLoop]: Abstraction has 5321 states and 15343 transitions. [2019-12-07 16:33:22,967 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:33:22,967 INFO L276 IsEmpty]: Start isEmpty. Operand 5321 states and 15343 transitions. [2019-12-07 16:33:22,971 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 16:33:22,971 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:22,971 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:22,971 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:22,972 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:22,972 INFO L82 PathProgramCache]: Analyzing trace with hash 1883571210, now seen corresponding path program 1 times [2019-12-07 16:33:22,972 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:22,972 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2070260298] [2019-12-07 16:33:22,972 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:22,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:23,022 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:23,022 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2070260298] [2019-12-07 16:33:23,022 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:23,022 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 16:33:23,022 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1495339085] [2019-12-07 16:33:23,023 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:33:23,023 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:23,023 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:33:23,023 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:33:23,023 INFO L87 Difference]: Start difference. First operand 5321 states and 15343 transitions. Second operand 5 states. [2019-12-07 16:33:23,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:23,223 INFO L93 Difference]: Finished difference Result 8189 states and 23271 transitions. [2019-12-07 16:33:23,224 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 16:33:23,224 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 64 [2019-12-07 16:33:23,224 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:23,231 INFO L225 Difference]: With dead ends: 8189 [2019-12-07 16:33:23,231 INFO L226 Difference]: Without dead ends: 8189 [2019-12-07 16:33:23,231 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 4 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 16:33:23,255 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8189 states. [2019-12-07 16:33:23,310 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8189 to 6643. [2019-12-07 16:33:23,311 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6643 states. [2019-12-07 16:33:23,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6643 states to 6643 states and 19068 transitions. [2019-12-07 16:33:23,319 INFO L78 Accepts]: Start accepts. Automaton has 6643 states and 19068 transitions. Word has length 64 [2019-12-07 16:33:23,319 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:23,319 INFO L462 AbstractCegarLoop]: Abstraction has 6643 states and 19068 transitions. [2019-12-07 16:33:23,319 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:33:23,319 INFO L276 IsEmpty]: Start isEmpty. Operand 6643 states and 19068 transitions. [2019-12-07 16:33:23,324 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2019-12-07 16:33:23,324 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:23,324 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:23,324 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:23,324 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:23,324 INFO L82 PathProgramCache]: Analyzing trace with hash -1230091042, now seen corresponding path program 2 times [2019-12-07 16:33:23,325 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:23,325 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [39432791] [2019-12-07 16:33:23,325 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:23,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:23,387 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:23,387 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [39432791] [2019-12-07 16:33:23,387 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:23,387 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:33:23,388 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [888088066] [2019-12-07 16:33:23,388 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:33:23,388 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:23,388 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:33:23,388 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:33:23,388 INFO L87 Difference]: Start difference. First operand 6643 states and 19068 transitions. Second operand 3 states. [2019-12-07 16:33:23,409 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:23,409 INFO L93 Difference]: Finished difference Result 6311 states and 17868 transitions. [2019-12-07 16:33:23,409 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:33:23,409 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 64 [2019-12-07 16:33:23,409 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:23,415 INFO L225 Difference]: With dead ends: 6311 [2019-12-07 16:33:23,415 INFO L226 Difference]: Without dead ends: 6311 [2019-12-07 16:33:23,415 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:33:23,435 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6311 states. [2019-12-07 16:33:24,116 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6311 to 6003. [2019-12-07 16:33:24,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6003 states. [2019-12-07 16:33:24,123 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6003 states to 6003 states and 17016 transitions. [2019-12-07 16:33:24,123 INFO L78 Accepts]: Start accepts. Automaton has 6003 states and 17016 transitions. Word has length 64 [2019-12-07 16:33:24,123 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:24,123 INFO L462 AbstractCegarLoop]: Abstraction has 6003 states and 17016 transitions. [2019-12-07 16:33:24,123 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:33:24,124 INFO L276 IsEmpty]: Start isEmpty. Operand 6003 states and 17016 transitions. [2019-12-07 16:33:24,127 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 16:33:24,127 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:24,127 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:24,127 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:24,128 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:24,128 INFO L82 PathProgramCache]: Analyzing trace with hash 1128424098, now seen corresponding path program 1 times [2019-12-07 16:33:24,128 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:24,128 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1311695599] [2019-12-07 16:33:24,128 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:24,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:24,180 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:24,180 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1311695599] [2019-12-07 16:33:24,180 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:24,180 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 16:33:24,180 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [707252577] [2019-12-07 16:33:24,181 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:33:24,181 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:24,181 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:33:24,181 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:33:24,181 INFO L87 Difference]: Start difference. First operand 6003 states and 17016 transitions. Second operand 5 states. [2019-12-07 16:33:24,352 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:24,352 INFO L93 Difference]: Finished difference Result 8571 states and 24160 transitions. [2019-12-07 16:33:24,352 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 16:33:24,352 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 65 [2019-12-07 16:33:24,352 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:24,359 INFO L225 Difference]: With dead ends: 8571 [2019-12-07 16:33:24,359 INFO L226 Difference]: Without dead ends: 8571 [2019-12-07 16:33:24,359 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 16:33:24,383 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8571 states. [2019-12-07 16:33:24,444 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8571 to 7033. [2019-12-07 16:33:24,444 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7033 states. [2019-12-07 16:33:24,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7033 states to 7033 states and 19986 transitions. [2019-12-07 16:33:24,453 INFO L78 Accepts]: Start accepts. Automaton has 7033 states and 19986 transitions. Word has length 65 [2019-12-07 16:33:24,453 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:24,453 INFO L462 AbstractCegarLoop]: Abstraction has 7033 states and 19986 transitions. [2019-12-07 16:33:24,453 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:33:24,453 INFO L276 IsEmpty]: Start isEmpty. Operand 7033 states and 19986 transitions. [2019-12-07 16:33:24,457 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 16:33:24,458 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:24,458 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:24,458 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:24,458 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:24,458 INFO L82 PathProgramCache]: Analyzing trace with hash -1714500708, now seen corresponding path program 2 times [2019-12-07 16:33:24,458 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:24,458 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1565658007] [2019-12-07 16:33:24,458 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:24,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:24,516 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:24,516 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1565658007] [2019-12-07 16:33:24,516 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:24,516 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:33:24,516 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1653271569] [2019-12-07 16:33:24,516 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:33:24,517 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:24,517 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:33:24,517 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:33:24,517 INFO L87 Difference]: Start difference. First operand 7033 states and 19986 transitions. Second operand 3 states. [2019-12-07 16:33:24,567 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:24,567 INFO L93 Difference]: Finished difference Result 7033 states and 19985 transitions. [2019-12-07 16:33:24,567 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:33:24,567 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 16:33:24,567 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:24,573 INFO L225 Difference]: With dead ends: 7033 [2019-12-07 16:33:24,574 INFO L226 Difference]: Without dead ends: 7033 [2019-12-07 16:33:24,574 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:33:24,595 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7033 states. [2019-12-07 16:33:24,637 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7033 to 5509. [2019-12-07 16:33:24,637 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5509 states. [2019-12-07 16:33:24,643 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5509 states to 5509 states and 15735 transitions. [2019-12-07 16:33:24,644 INFO L78 Accepts]: Start accepts. Automaton has 5509 states and 15735 transitions. Word has length 65 [2019-12-07 16:33:24,644 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:24,644 INFO L462 AbstractCegarLoop]: Abstraction has 5509 states and 15735 transitions. [2019-12-07 16:33:24,644 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:33:24,644 INFO L276 IsEmpty]: Start isEmpty. Operand 5509 states and 15735 transitions. [2019-12-07 16:33:24,647 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 16:33:24,648 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:24,648 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:24,648 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:24,648 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:24,648 INFO L82 PathProgramCache]: Analyzing trace with hash 1444653798, now seen corresponding path program 1 times [2019-12-07 16:33:24,648 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:24,648 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2099867574] [2019-12-07 16:33:24,648 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:24,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:24,685 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:24,686 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2099867574] [2019-12-07 16:33:24,686 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:24,686 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:33:24,686 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1725412875] [2019-12-07 16:33:24,687 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:33:24,687 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:24,687 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:33:24,687 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:33:24,687 INFO L87 Difference]: Start difference. First operand 5509 states and 15735 transitions. Second operand 3 states. [2019-12-07 16:33:24,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:24,709 INFO L93 Difference]: Finished difference Result 5020 states and 14037 transitions. [2019-12-07 16:33:24,710 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:33:24,710 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 16:33:24,710 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:24,715 INFO L225 Difference]: With dead ends: 5020 [2019-12-07 16:33:24,716 INFO L226 Difference]: Without dead ends: 5020 [2019-12-07 16:33:24,716 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:33:24,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5020 states. [2019-12-07 16:33:24,780 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5020 to 4736. [2019-12-07 16:33:24,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4736 states. [2019-12-07 16:33:24,785 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4736 states to 4736 states and 13237 transitions. [2019-12-07 16:33:24,786 INFO L78 Accepts]: Start accepts. Automaton has 4736 states and 13237 transitions. Word has length 66 [2019-12-07 16:33:24,786 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:24,786 INFO L462 AbstractCegarLoop]: Abstraction has 4736 states and 13237 transitions. [2019-12-07 16:33:24,786 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:33:24,786 INFO L276 IsEmpty]: Start isEmpty. Operand 4736 states and 13237 transitions. [2019-12-07 16:33:24,789 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:33:24,789 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:24,789 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:24,789 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:24,789 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:24,790 INFO L82 PathProgramCache]: Analyzing trace with hash -864116617, now seen corresponding path program 1 times [2019-12-07 16:33:24,790 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:24,790 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1808430806] [2019-12-07 16:33:24,790 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:24,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:33:24,957 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:33:24,957 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1808430806] [2019-12-07 16:33:24,958 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:33:24,958 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 16:33:24,958 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1936826799] [2019-12-07 16:33:24,958 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 16:33:24,958 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:33:24,958 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 16:33:24,958 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=117, Unknown=0, NotChecked=0, Total=156 [2019-12-07 16:33:24,958 INFO L87 Difference]: Start difference. First operand 4736 states and 13237 transitions. Second operand 13 states. [2019-12-07 16:33:25,573 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:33:25,573 INFO L93 Difference]: Finished difference Result 17039 states and 47919 transitions. [2019-12-07 16:33:25,573 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 16:33:25,573 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 67 [2019-12-07 16:33:25,573 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:33:25,579 INFO L225 Difference]: With dead ends: 17039 [2019-12-07 16:33:25,579 INFO L226 Difference]: Without dead ends: 6688 [2019-12-07 16:33:25,579 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 111 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=218, Invalid=538, Unknown=0, NotChecked=0, Total=756 [2019-12-07 16:33:25,600 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6688 states. [2019-12-07 16:33:25,634 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6688 to 3896. [2019-12-07 16:33:25,634 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3896 states. [2019-12-07 16:33:25,638 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3896 states to 3896 states and 10801 transitions. [2019-12-07 16:33:25,638 INFO L78 Accepts]: Start accepts. Automaton has 3896 states and 10801 transitions. Word has length 67 [2019-12-07 16:33:25,638 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:33:25,639 INFO L462 AbstractCegarLoop]: Abstraction has 3896 states and 10801 transitions. [2019-12-07 16:33:25,639 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 16:33:25,639 INFO L276 IsEmpty]: Start isEmpty. Operand 3896 states and 10801 transitions. [2019-12-07 16:33:25,641 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 16:33:25,641 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:33:25,641 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:33:25,641 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:33:25,641 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:33:25,641 INFO L82 PathProgramCache]: Analyzing trace with hash -492073483, now seen corresponding path program 2 times [2019-12-07 16:33:25,641 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:33:25,641 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [559836259] [2019-12-07 16:33:25,641 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:33:25,661 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 16:33:25,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 16:33:25,719 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 16:33:25,719 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 16:33:25,721 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] ULTIMATE.startENTRY-->L807: Formula: (let ((.cse0 (store |v_#valid_51| 0 0))) (and (= v_~x$r_buff1_thd1~0_165 0) (= 0 v_~x$r_buff1_thd3~0_146) (= 0 |v_ULTIMATE.start_main_~#t2284~0.offset_18|) (= v_~z~0_13 0) (= v_~main$tmp_guard0~0_18 0) (= v_~y~0_84 0) (= v_~x$flush_delayed~0_40 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t2284~0.base_24| 4)) (= v_~main$tmp_guard1~0_48 0) (= v_~__unbuffered_cnt~0_158 0) (= |v_#NULL.offset_3| 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t2284~0.base_24|) (= 0 v_~x$w_buff1_used~0_339) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~x$w_buff0_used~0_698) (= 0 v_~x$read_delayed_var~0.base_8) (= 0 v_~x~0_178) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t2284~0.base_24| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t2284~0.base_24|) |v_ULTIMATE.start_main_~#t2284~0.offset_18| 0)) |v_#memory_int_19|) (= 0 v_~x$r_buff1_thd2~0_152) (= v_~x$r_buff0_thd1~0_141 0) (= v_~x$mem_tmp~0_20 0) (= 0 v_~x$read_delayed~0_8) (= 0 v_~x$read_delayed_var~0.offset_8) (= |v_#valid_49| (store .cse0 |v_ULTIMATE.start_main_~#t2284~0.base_24| 1)) (= 0 v_~__unbuffered_p2_EAX~0_42) (= v_~__unbuffered_p2_EBX~0_42 0) (= v_~x$r_buff1_thd0~0_256 0) (= 0 v_~x$w_buff1~0_143) (= 0 |v_#NULL.base_3|) (= 0 v_~x$w_buff0~0_158) (= (select .cse0 |v_ULTIMATE.start_main_~#t2284~0.base_24|) 0) (= v_~x$r_buff0_thd0~0_367 0) (= 0 v_~weak$$choice2~0_95) (= 0 v_~x$r_buff0_thd2~0_210) (= 0 v_~x$r_buff0_thd3~0_129) (= 0 v_~weak$$choice0~0_12))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_51|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_16|, ~x$w_buff0~0=v_~x$w_buff0~0_158, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_38|, ULTIMATE.start_main_~#t2286~0.base=|v_ULTIMATE.start_main_~#t2286~0.base_18|, ~x$flush_delayed~0=v_~x$flush_delayed~0_40, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_26|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_30|, #NULL.offset=|v_#NULL.offset_3|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_24|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_62|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_165, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_129, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_32|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_34|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_71|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_35|, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_42, ULTIMATE.start_main_~#t2284~0.offset=|v_ULTIMATE.start_main_~#t2284~0.offset_18|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_367, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_42, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_9|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_26|, ~x$w_buff1~0=v_~x$w_buff1~0_143, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_43|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_339, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_152, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_43|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_68|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_8, ~weak$$choice0~0=v_~weak$$choice0~0_12, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_147|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_158, ~x~0=v_~x~0_178, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_141, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_16|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_26|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_24|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_28|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_146, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_48, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_30|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_31|, ~x$mem_tmp~0=v_~x$mem_tmp~0_20, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_254|, ULTIMATE.start_main_~#t2285~0.offset=|v_ULTIMATE.start_main_~#t2285~0.offset_16|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_32|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_80|, ~y~0=v_~y~0_84, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_8|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_16|, ULTIMATE.start_main_~#t2284~0.base=|v_ULTIMATE.start_main_~#t2284~0.base_24|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_22|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_45|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_18, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_256, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_210, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_44|, #NULL.base=|v_#NULL.base_3|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_45|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_698, ULTIMATE.start_main_~#t2285~0.base=|v_ULTIMATE.start_main_~#t2285~0.base_20|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_147|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_8, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, #valid=|v_#valid_49|, #memory_int=|v_#memory_int_19|, ~z~0=v_~z~0_13, ~weak$$choice2~0=v_~weak$$choice2~0_95, ULTIMATE.start_main_~#t2286~0.offset=|v_ULTIMATE.start_main_~#t2286~0.offset_15|, ~x$read_delayed~0=v_~x$read_delayed~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t2286~0.base, ~x$flush_delayed~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t2284~0.offset, ~x$r_buff0_thd0~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~nondet31, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_~#t2285~0.offset, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite51, ~y~0, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_~#t2284~0.base, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_~#t2285~0.base, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ULTIMATE.start_main_~#t2286~0.offset, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 16:33:25,722 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L807-1-->L809: Formula: (and (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2285~0.base_11| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2285~0.base_11|) |v_ULTIMATE.start_main_~#t2285~0.offset_9| 1)) |v_#memory_int_11|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t2285~0.base_11|) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t2285~0.base_11| 4)) (= |v_#valid_32| (store |v_#valid_33| |v_ULTIMATE.start_main_~#t2285~0.base_11| 1)) (= 0 |v_ULTIMATE.start_main_~#t2285~0.offset_9|) (= (select |v_#valid_33| |v_ULTIMATE.start_main_~#t2285~0.base_11|) 0) (not (= |v_ULTIMATE.start_main_~#t2285~0.base_11| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t2285~0.base=|v_ULTIMATE.start_main_~#t2285~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_3|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|, ULTIMATE.start_main_~#t2285~0.offset=|v_ULTIMATE.start_main_~#t2285~0.offset_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2285~0.base, ULTIMATE.start_main_#t~nondet21, #valid, #memory_int, #length, ULTIMATE.start_main_~#t2285~0.offset] because there is no mapped edge [2019-12-07 16:33:25,722 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L809-1-->L811: Formula: (and (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2286~0.base_11|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2286~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2286~0.base_11|) |v_ULTIMATE.start_main_~#t2286~0.offset_10| 2)) |v_#memory_int_13|) (= 0 (select |v_#valid_35| |v_ULTIMATE.start_main_~#t2286~0.base_11|)) (= 0 |v_ULTIMATE.start_main_~#t2286~0.offset_10|) (= |v_#valid_34| (store |v_#valid_35| |v_ULTIMATE.start_main_~#t2286~0.base_11| 1)) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t2286~0.base_11| 4) |v_#length_15|) (not (= 0 |v_ULTIMATE.start_main_~#t2286~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t2286~0.base=|v_ULTIMATE.start_main_~#t2286~0.base_11|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t2286~0.offset=|v_ULTIMATE.start_main_~#t2286~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2286~0.base, ULTIMATE.start_main_#t~nondet22, #valid, #memory_int, #length, ULTIMATE.start_main_~#t2286~0.offset] because there is no mapped edge [2019-12-07 16:33:25,722 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L4-->L764: Formula: (and (= ~x$r_buff1_thd3~0_Out864949676 ~x$r_buff0_thd3~0_In864949676) (= 1 ~x$r_buff0_thd2~0_Out864949676) (= ~x$r_buff1_thd0~0_Out864949676 ~x$r_buff0_thd0~0_In864949676) (not (= 0 P1Thread1of1ForFork1___VERIFIER_assert_~expression_In864949676)) (= ~x$r_buff0_thd2~0_In864949676 ~x$r_buff1_thd2~0_Out864949676) (= 1 ~y~0_Out864949676) (= ~x$r_buff0_thd1~0_In864949676 ~x$r_buff1_thd1~0_Out864949676)) InVars {P1Thread1of1ForFork1___VERIFIER_assert_~expression=P1Thread1of1ForFork1___VERIFIER_assert_~expression_In864949676, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In864949676, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In864949676, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In864949676, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In864949676} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=P1Thread1of1ForFork1___VERIFIER_assert_~expression_In864949676, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In864949676, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In864949676, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_Out864949676, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_Out864949676, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_Out864949676, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In864949676, ~y~0=~y~0_Out864949676, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out864949676, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_Out864949676} AuxVars[] AssignedVars[~x$r_buff1_thd3~0, ~x$r_buff1_thd2~0, ~x$r_buff1_thd1~0, ~y~0, ~x$r_buff0_thd2~0, ~x$r_buff1_thd0~0] because there is no mapped edge [2019-12-07 16:33:25,724 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L784-2-->L784-4: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In-574459404 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd3~0_In-574459404 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite15_Out-574459404| ~x$w_buff1~0_In-574459404)) (and (or .cse1 .cse0) (= ~x~0_In-574459404 |P2Thread1of1ForFork2_#t~ite15_Out-574459404|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-574459404, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-574459404, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-574459404, ~x~0=~x~0_In-574459404} OutVars{P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out-574459404|, ~x$w_buff1~0=~x$w_buff1~0_In-574459404, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-574459404, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-574459404, ~x~0=~x~0_In-574459404} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 16:33:25,724 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [693] [693] L784-4-->L785: Formula: (= |v_P2Thread1of1ForFork2_#t~ite15_8| v_~x~0_27) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_8|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_7|, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_11|, ~x~0=v_~x~0_27} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, P2Thread1of1ForFork2_#t~ite16, ~x~0] because there is no mapped edge [2019-12-07 16:33:25,724 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L785-->L785-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1476156865 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In-1476156865 256)))) (or (and (= ~x$w_buff0_used~0_In-1476156865 |P2Thread1of1ForFork2_#t~ite17_Out-1476156865|) (or .cse0 .cse1)) (and (= 0 |P2Thread1of1ForFork2_#t~ite17_Out-1476156865|) (not .cse0) (not .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1476156865, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1476156865} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1476156865, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out-1476156865|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1476156865} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 16:33:25,724 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L786-->L786-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd3~0_In1446167211 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1446167211 256))) (.cse2 (= 0 (mod ~x$r_buff1_thd3~0_In1446167211 256))) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In1446167211 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork2_#t~ite18_Out1446167211| 0)) (and (= |P2Thread1of1ForFork2_#t~ite18_Out1446167211| ~x$w_buff1_used~0_In1446167211) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1446167211, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1446167211, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1446167211, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1446167211} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1446167211, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1446167211, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1446167211, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out1446167211|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1446167211} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 16:33:25,724 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L735-2-->L735-4: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In-1916380321 256) 0)) (.cse0 (= (mod ~x$r_buff1_thd1~0_In-1916380321 256) 0))) (or (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork0_#t~ite3_Out-1916380321| ~x$w_buff1~0_In-1916380321)) (and (or .cse1 .cse0) (= |P0Thread1of1ForFork0_#t~ite3_Out-1916380321| ~x~0_In-1916380321)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1916380321, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1916380321, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1916380321, ~x~0=~x~0_In-1916380321} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out-1916380321|, ~x$w_buff1~0=~x$w_buff1~0_In-1916380321, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1916380321, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1916380321, ~x~0=~x~0_In-1916380321} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3] because there is no mapped edge [2019-12-07 16:33:25,724 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [694] [694] L735-4-->L736: Formula: (= v_~x~0_31 |v_P0Thread1of1ForFork0_#t~ite3_8|) InVars {P0Thread1of1ForFork0_#t~ite3=|v_P0Thread1of1ForFork0_#t~ite3_8|} OutVars{P0Thread1of1ForFork0_#t~ite3=|v_P0Thread1of1ForFork0_#t~ite3_7|, P0Thread1of1ForFork0_#t~ite4=|v_P0Thread1of1ForFork0_#t~ite4_11|, ~x~0=v_~x~0_31} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4, ~x~0] because there is no mapped edge [2019-12-07 16:33:25,725 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L736-->L736-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In319955123 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd1~0_In319955123 256) 0))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite5_Out319955123|) (not .cse0) (not .cse1)) (and (= ~x$w_buff0_used~0_In319955123 |P0Thread1of1ForFork0_#t~ite5_Out319955123|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In319955123, ~x$w_buff0_used~0=~x$w_buff0_used~0_In319955123} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out319955123|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In319955123, ~x$w_buff0_used~0=~x$w_buff0_used~0_In319955123} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 16:33:25,725 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L737-->L737-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff0_thd1~0_In64997452 256))) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In64997452 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In64997452 256))) (.cse0 (= (mod ~x$r_buff1_thd1~0_In64997452 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite6_Out64997452| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse1 .cse0) (= ~x$w_buff1_used~0_In64997452 |P0Thread1of1ForFork0_#t~ite6_Out64997452|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In64997452, ~x$w_buff1_used~0=~x$w_buff1_used~0_In64997452, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In64997452, ~x$w_buff0_used~0=~x$w_buff0_used~0_In64997452} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out64997452|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In64997452, ~x$w_buff1_used~0=~x$w_buff1_used~0_In64997452, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In64997452, ~x$w_buff0_used~0=~x$w_buff0_used~0_In64997452} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 16:33:25,725 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L738-->L738-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd1~0_In-644675241 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In-644675241 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite7_Out-644675241| 0) (not .cse0) (not .cse1)) (and (= |P0Thread1of1ForFork0_#t~ite7_Out-644675241| ~x$r_buff0_thd1~0_In-644675241) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-644675241, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-644675241} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-644675241, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-644675241|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-644675241} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 16:33:25,726 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L739-->L739-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff1_used~0_In647235309 256))) (.cse3 (= 0 (mod ~x$r_buff1_thd1~0_In647235309 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In647235309 256) 0)) (.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In647235309 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$r_buff1_thd1~0_In647235309 |P0Thread1of1ForFork0_#t~ite8_Out647235309|)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |P0Thread1of1ForFork0_#t~ite8_Out647235309|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In647235309, ~x$w_buff1_used~0=~x$w_buff1_used~0_In647235309, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In647235309, ~x$w_buff0_used~0=~x$w_buff0_used~0_In647235309} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In647235309, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out647235309|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In647235309, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In647235309, ~x$w_buff0_used~0=~x$w_buff0_used~0_In647235309} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 16:33:25,726 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L739-2-->P0EXIT: Formula: (and (= v_~x$r_buff1_thd1~0_101 |v_P0Thread1of1ForFork0_#t~ite8_60|) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~__unbuffered_cnt~0_100 (+ v_~__unbuffered_cnt~0_101 1)) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_60|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_101} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_59|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_100, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_101} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 16:33:25,726 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L765-->L765-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd2~0_In1287607330 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In1287607330 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In1287607330 |P1Thread1of1ForFork1_#t~ite11_Out1287607330|)) (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out1287607330|) (not .cse1)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1287607330, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1287607330} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out1287607330|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1287607330, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1287607330} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 16:33:25,727 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L766-->L766-2: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd2~0_In1257176016 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In1257176016 256) 0)) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In1257176016 256))) (.cse3 (= (mod ~x$w_buff0_used~0_In1257176016 256) 0))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite12_Out1257176016|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~x$w_buff1_used~0_In1257176016 |P1Thread1of1ForFork1_#t~ite12_Out1257176016|) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1257176016, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1257176016, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1257176016, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1257176016} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1257176016, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1257176016, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out1257176016|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1257176016, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1257176016} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 16:33:25,727 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L767-->L768: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd2~0_In-694589959 256) 0)) (.cse2 (= (mod ~x$w_buff0_used~0_In-694589959 256) 0)) (.cse0 (= ~x$r_buff0_thd2~0_Out-694589959 ~x$r_buff0_thd2~0_In-694589959))) (or (and .cse0 .cse1) (and (= ~x$r_buff0_thd2~0_Out-694589959 0) (not .cse1) (not .cse2)) (and .cse2 .cse0))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-694589959, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-694589959} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-694589959|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-694589959, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-694589959} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 16:33:25,727 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] L768-->L768-2: Formula: (let ((.cse3 (= (mod ~x$w_buff1_used~0_In334269772 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd2~0_In334269772 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In334269772 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd2~0_In334269772 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite14_Out334269772| ~x$r_buff1_thd2~0_In334269772) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |P1Thread1of1ForFork1_#t~ite14_Out334269772| 0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In334269772, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In334269772, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In334269772, ~x$w_buff0_used~0=~x$w_buff0_used~0_In334269772} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In334269772, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In334269772, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In334269772, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out334269772|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In334269772} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 16:33:25,727 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L768-2-->P1EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_52 1) v_~__unbuffered_cnt~0_51) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~x$r_buff1_thd2~0_54 |v_P1Thread1of1ForFork1_#t~ite14_30|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_52, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_30|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_54, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_51, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_29|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 16:33:25,727 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L787-->L787-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1089237804 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In-1089237804 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite19_Out-1089237804| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~x$r_buff0_thd3~0_In-1089237804 |P2Thread1of1ForFork2_#t~ite19_Out-1089237804|)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1089237804, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1089237804} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1089237804, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out-1089237804|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1089237804} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 16:33:25,728 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L788-->L788-2: Formula: (let ((.cse3 (= (mod ~x$r_buff1_thd3~0_In-653706639 256) 0)) (.cse2 (= (mod ~x$w_buff1_used~0_In-653706639 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-653706639 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In-653706639 256)))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite20_Out-653706639|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= |P2Thread1of1ForFork2_#t~ite20_Out-653706639| ~x$r_buff1_thd3~0_In-653706639) (or .cse0 .cse1)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-653706639, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-653706639, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-653706639, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-653706639} OutVars{P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out-653706639|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-653706639, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-653706639, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-653706639, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-653706639} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 16:33:25,728 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] L788-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= v_~x$r_buff1_thd3~0_81 |v_P2Thread1of1ForFork2_#t~ite20_48|) (= v_~__unbuffered_cnt~0_90 (+ v_~__unbuffered_cnt~0_91 1))) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_48|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_91} OutVars{P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_47|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_81, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_90, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, ~x$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 16:33:25,728 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L811-1-->L817: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 16:33:25,728 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L817-2-->L817-5: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In809263801 256))) (.cse2 (= (mod ~x$r_buff1_thd0~0_In809263801 256) 0)) (.cse1 (= |ULTIMATE.start_main_#t~ite25_Out809263801| |ULTIMATE.start_main_#t~ite24_Out809263801|))) (or (and (not .cse0) (= ~x$w_buff1~0_In809263801 |ULTIMATE.start_main_#t~ite24_Out809263801|) .cse1 (not .cse2)) (and (or .cse0 .cse2) (= ~x~0_In809263801 |ULTIMATE.start_main_#t~ite24_Out809263801|) .cse1))) InVars {~x$w_buff1~0=~x$w_buff1~0_In809263801, ~x$w_buff1_used~0=~x$w_buff1_used~0_In809263801, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In809263801, ~x~0=~x~0_In809263801} OutVars{~x$w_buff1~0=~x$w_buff1~0_In809263801, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out809263801|, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out809263801|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In809263801, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In809263801, ~x~0=~x~0_In809263801} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 16:33:25,729 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L818-->L818-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In-258029680 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-258029680 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite26_Out-258029680| 0) (not .cse1)) (and (= ~x$w_buff0_used~0_In-258029680 |ULTIMATE.start_main_#t~ite26_Out-258029680|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-258029680, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-258029680} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-258029680, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out-258029680|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-258029680} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 16:33:25,729 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L819-->L819-2: Formula: (let ((.cse2 (= (mod ~x$w_buff1_used~0_In1922642306 256) 0)) (.cse3 (= (mod ~x$r_buff1_thd0~0_In1922642306 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd0~0_In1922642306 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In1922642306 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite27_Out1922642306| ~x$w_buff1_used~0_In1922642306) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |ULTIMATE.start_main_#t~ite27_Out1922642306| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1922642306, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1922642306, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1922642306, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1922642306} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1922642306, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1922642306, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out1922642306|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1922642306, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1922642306} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 16:33:25,729 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [769] [769] L820-->L820-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-341247320 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In-341247320 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite28_Out-341247320|) (not .cse0) (not .cse1)) (and (= ~x$r_buff0_thd0~0_In-341247320 |ULTIMATE.start_main_#t~ite28_Out-341247320|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-341247320, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-341247320} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-341247320, ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out-341247320|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-341247320} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 16:33:25,730 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L821-->L821-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff1_thd0~0_In1300821445 256))) (.cse0 (= (mod ~x$w_buff1_used~0_In1300821445 256) 0)) (.cse3 (= (mod ~x$r_buff0_thd0~0_In1300821445 256) 0)) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In1300821445 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite29_Out1300821445| ~x$r_buff1_thd0~0_In1300821445)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |ULTIMATE.start_main_#t~ite29_Out1300821445| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1300821445, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1300821445, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1300821445, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1300821445} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1300821445, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out1300821445|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1300821445, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1300821445, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1300821445} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 16:33:25,732 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L832-->L832-8: Formula: (let ((.cse4 (= 0 (mod ~x$w_buff0_used~0_In1451612299 256))) (.cse3 (= 0 (mod ~x$r_buff1_thd0~0_In1451612299 256))) (.cse0 (= (mod ~weak$$choice2~0_In1451612299 256) 0)) (.cse5 (= |ULTIMATE.start_main_#t~ite44_Out1451612299| |ULTIMATE.start_main_#t~ite45_Out1451612299|)) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In1451612299 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd0~0_In1451612299 256)))) (or (and (= |ULTIMATE.start_main_#t~ite43_In1451612299| |ULTIMATE.start_main_#t~ite43_Out1451612299|) (or (and (= ~x$w_buff1_used~0_In1451612299 |ULTIMATE.start_main_#t~ite44_Out1451612299|) .cse0 (or (and .cse1 .cse2) (and .cse3 .cse2) .cse4) .cse5) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite44_Out1451612299| |ULTIMATE.start_main_#t~ite44_In1451612299|) (= ~x$w_buff1_used~0_In1451612299 |ULTIMATE.start_main_#t~ite45_Out1451612299|)))) (let ((.cse6 (not .cse2))) (and (not .cse4) (or (not .cse3) .cse6) .cse0 .cse5 (= |ULTIMATE.start_main_#t~ite44_Out1451612299| |ULTIMATE.start_main_#t~ite43_Out1451612299|) (or (not .cse1) .cse6) (= 0 |ULTIMATE.start_main_#t~ite43_Out1451612299|))))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1451612299, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1451612299, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1451612299, ~weak$$choice2~0=~weak$$choice2~0_In1451612299, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_In1451612299|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1451612299, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_In1451612299|} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1451612299, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1451612299, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1451612299, ~weak$$choice2~0=~weak$$choice2~0_In1451612299, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out1451612299|, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out1451612299|, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out1451612299|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1451612299} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 16:33:25,732 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L832-8-->L834: Formula: (and (not (= (mod v_~weak$$choice2~0_91 256) 0)) (= v_~x$w_buff1_used~0_335 |v_ULTIMATE.start_main_#t~ite45_32|) (= v_~x$r_buff0_thd0~0_362 v_~x$r_buff0_thd0~0_361)) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_362, ~weak$$choice2~0=v_~weak$$choice2~0_91, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_32|} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_361, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_26|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_26|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_335, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_27|, ~weak$$choice2~0=v_~weak$$choice2~0_91, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_30|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_31|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_30|} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 16:33:25,732 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [811] [811] L834-->L834-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In248908367 256)))) (or (and (not .cse0) (= ~x$r_buff1_thd0~0_In248908367 |ULTIMATE.start_main_#t~ite51_Out248908367|) (= |ULTIMATE.start_main_#t~ite50_In248908367| |ULTIMATE.start_main_#t~ite50_Out248908367|)) (and (= ~x$r_buff1_thd0~0_In248908367 |ULTIMATE.start_main_#t~ite50_Out248908367|) (= |ULTIMATE.start_main_#t~ite51_Out248908367| |ULTIMATE.start_main_#t~ite50_Out248908367|) .cse0 (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In248908367 256) 0))) (or (and (= (mod ~x$w_buff1_used~0_In248908367 256) 0) .cse1) (and .cse1 (= (mod ~x$r_buff1_thd0~0_In248908367 256) 0)) (= 0 (mod ~x$w_buff0_used~0_In248908367 256))))))) InVars {ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_In248908367|, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In248908367, ~x$w_buff1_used~0=~x$w_buff1_used~0_In248908367, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In248908367, ~weak$$choice2~0=~weak$$choice2~0_In248908367, ~x$w_buff0_used~0=~x$w_buff0_used~0_In248908367} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out248908367|, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In248908367, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out248908367|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In248908367, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In248908367, ~weak$$choice2~0=~weak$$choice2~0_In248908367, ~x$w_buff0_used~0=~x$w_buff0_used~0_In248908367} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 16:33:25,732 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [807] [807] L836-->L839-1: Formula: (and (= v_~x$mem_tmp~0_12 v_~x~0_148) (not (= (mod v_~x$flush_delayed~0_23 256) 0)) (= v_~x$flush_delayed~0_22 0) (= (mod v_~main$tmp_guard1~0_34 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_23, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_34, ~x$mem_tmp~0=v_~x$mem_tmp~0_12} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_17|, ~x$flush_delayed~0=v_~x$flush_delayed~0_22, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_34, ~x$mem_tmp~0=v_~x$mem_tmp~0_12, ~x~0=v_~x~0_148, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ~x$flush_delayed~0, ~x~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 16:33:25,732 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L839-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 16:33:25,787 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 04:33:25 BasicIcfg [2019-12-07 16:33:25,787 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 16:33:25,788 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 16:33:25,788 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 16:33:25,788 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 16:33:25,788 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 04:31:04" (3/4) ... [2019-12-07 16:33:25,790 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 16:33:25,790 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] ULTIMATE.startENTRY-->L807: Formula: (let ((.cse0 (store |v_#valid_51| 0 0))) (and (= v_~x$r_buff1_thd1~0_165 0) (= 0 v_~x$r_buff1_thd3~0_146) (= 0 |v_ULTIMATE.start_main_~#t2284~0.offset_18|) (= v_~z~0_13 0) (= v_~main$tmp_guard0~0_18 0) (= v_~y~0_84 0) (= v_~x$flush_delayed~0_40 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t2284~0.base_24| 4)) (= v_~main$tmp_guard1~0_48 0) (= v_~__unbuffered_cnt~0_158 0) (= |v_#NULL.offset_3| 0) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t2284~0.base_24|) (= 0 v_~x$w_buff1_used~0_339) (< 0 |v_#StackHeapBarrier_17|) (= 0 v_~x$w_buff0_used~0_698) (= 0 v_~x$read_delayed_var~0.base_8) (= 0 v_~x~0_178) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t2284~0.base_24| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t2284~0.base_24|) |v_ULTIMATE.start_main_~#t2284~0.offset_18| 0)) |v_#memory_int_19|) (= 0 v_~x$r_buff1_thd2~0_152) (= v_~x$r_buff0_thd1~0_141 0) (= v_~x$mem_tmp~0_20 0) (= 0 v_~x$read_delayed~0_8) (= 0 v_~x$read_delayed_var~0.offset_8) (= |v_#valid_49| (store .cse0 |v_ULTIMATE.start_main_~#t2284~0.base_24| 1)) (= 0 v_~__unbuffered_p2_EAX~0_42) (= v_~__unbuffered_p2_EBX~0_42 0) (= v_~x$r_buff1_thd0~0_256 0) (= 0 v_~x$w_buff1~0_143) (= 0 |v_#NULL.base_3|) (= 0 v_~x$w_buff0~0_158) (= (select .cse0 |v_ULTIMATE.start_main_~#t2284~0.base_24|) 0) (= v_~x$r_buff0_thd0~0_367 0) (= 0 v_~weak$$choice2~0_95) (= 0 v_~x$r_buff0_thd2~0_210) (= 0 v_~x$r_buff0_thd3~0_129) (= 0 v_~weak$$choice0~0_12))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_51|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_16|, ~x$w_buff0~0=v_~x$w_buff0~0_158, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_38|, ULTIMATE.start_main_~#t2286~0.base=|v_ULTIMATE.start_main_~#t2286~0.base_18|, ~x$flush_delayed~0=v_~x$flush_delayed~0_40, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_26|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_30|, #NULL.offset=|v_#NULL.offset_3|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_24|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_62|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_165, ~x$r_buff0_thd3~0=v_~x$r_buff0_thd3~0_129, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_32|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_34|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_71|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_35|, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_42, ULTIMATE.start_main_~#t2284~0.offset=|v_ULTIMATE.start_main_~#t2284~0.offset_18|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_367, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_42, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_9|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_26|, ~x$w_buff1~0=v_~x$w_buff1~0_143, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_43|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_339, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_152, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_43|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_68|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_8, ~weak$$choice0~0=v_~weak$$choice0~0_12, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_147|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_158, ~x~0=v_~x~0_178, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_141, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_16|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_26|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_24|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_28|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_146, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_48, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_30|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_31|, ~x$mem_tmp~0=v_~x$mem_tmp~0_20, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_254|, ULTIMATE.start_main_~#t2285~0.offset=|v_ULTIMATE.start_main_~#t2285~0.offset_16|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_32|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_80|, ~y~0=v_~y~0_84, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_8|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_16|, ULTIMATE.start_main_~#t2284~0.base=|v_ULTIMATE.start_main_~#t2284~0.base_24|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_22|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_45|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_18, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_256, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_210, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_44|, #NULL.base=|v_#NULL.base_3|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_45|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_698, ULTIMATE.start_main_~#t2285~0.base=|v_ULTIMATE.start_main_~#t2285~0.base_20|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_147|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_8, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, #valid=|v_#valid_49|, #memory_int=|v_#memory_int_19|, ~z~0=v_~z~0_13, ~weak$$choice2~0=v_~weak$$choice2~0_95, ULTIMATE.start_main_~#t2286~0.offset=|v_ULTIMATE.start_main_~#t2286~0.offset_15|, ~x$read_delayed~0=v_~x$read_delayed~0_8} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t2286~0.base, ~x$flush_delayed~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ~x$r_buff1_thd1~0, ~x$r_buff0_thd3~0, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t2284~0.offset, ~x$r_buff0_thd0~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~nondet31, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~x$r_buff1_thd3~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_~#t2285~0.offset, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite51, ~y~0, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_~#t2284~0.base, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_~#t2285~0.base, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ULTIMATE.start_main_~#t2286~0.offset, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 16:33:25,790 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L807-1-->L809: Formula: (and (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2285~0.base_11| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2285~0.base_11|) |v_ULTIMATE.start_main_~#t2285~0.offset_9| 1)) |v_#memory_int_11|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t2285~0.base_11|) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t2285~0.base_11| 4)) (= |v_#valid_32| (store |v_#valid_33| |v_ULTIMATE.start_main_~#t2285~0.base_11| 1)) (= 0 |v_ULTIMATE.start_main_~#t2285~0.offset_9|) (= (select |v_#valid_33| |v_ULTIMATE.start_main_~#t2285~0.base_11|) 0) (not (= |v_ULTIMATE.start_main_~#t2285~0.base_11| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t2285~0.base=|v_ULTIMATE.start_main_~#t2285~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_3|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|, ULTIMATE.start_main_~#t2285~0.offset=|v_ULTIMATE.start_main_~#t2285~0.offset_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2285~0.base, ULTIMATE.start_main_#t~nondet21, #valid, #memory_int, #length, ULTIMATE.start_main_~#t2285~0.offset] because there is no mapped edge [2019-12-07 16:33:25,790 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L809-1-->L811: Formula: (and (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2286~0.base_11|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2286~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2286~0.base_11|) |v_ULTIMATE.start_main_~#t2286~0.offset_10| 2)) |v_#memory_int_13|) (= 0 (select |v_#valid_35| |v_ULTIMATE.start_main_~#t2286~0.base_11|)) (= 0 |v_ULTIMATE.start_main_~#t2286~0.offset_10|) (= |v_#valid_34| (store |v_#valid_35| |v_ULTIMATE.start_main_~#t2286~0.base_11| 1)) (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t2286~0.base_11| 4) |v_#length_15|) (not (= 0 |v_ULTIMATE.start_main_~#t2286~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t2286~0.base=|v_ULTIMATE.start_main_~#t2286~0.base_11|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|, ULTIMATE.start_main_~#t2286~0.offset=|v_ULTIMATE.start_main_~#t2286~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2286~0.base, ULTIMATE.start_main_#t~nondet22, #valid, #memory_int, #length, ULTIMATE.start_main_~#t2286~0.offset] because there is no mapped edge [2019-12-07 16:33:25,791 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [810] [810] L4-->L764: Formula: (and (= ~x$r_buff1_thd3~0_Out864949676 ~x$r_buff0_thd3~0_In864949676) (= 1 ~x$r_buff0_thd2~0_Out864949676) (= ~x$r_buff1_thd0~0_Out864949676 ~x$r_buff0_thd0~0_In864949676) (not (= 0 P1Thread1of1ForFork1___VERIFIER_assert_~expression_In864949676)) (= ~x$r_buff0_thd2~0_In864949676 ~x$r_buff1_thd2~0_Out864949676) (= 1 ~y~0_Out864949676) (= ~x$r_buff0_thd1~0_In864949676 ~x$r_buff1_thd1~0_Out864949676)) InVars {P1Thread1of1ForFork1___VERIFIER_assert_~expression=P1Thread1of1ForFork1___VERIFIER_assert_~expression_In864949676, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In864949676, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In864949676, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In864949676, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In864949676} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=P1Thread1of1ForFork1___VERIFIER_assert_~expression_In864949676, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In864949676, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In864949676, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_Out864949676, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_Out864949676, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_Out864949676, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In864949676, ~y~0=~y~0_Out864949676, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out864949676, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_Out864949676} AuxVars[] AssignedVars[~x$r_buff1_thd3~0, ~x$r_buff1_thd2~0, ~x$r_buff1_thd1~0, ~y~0, ~x$r_buff0_thd2~0, ~x$r_buff1_thd0~0] because there is no mapped edge [2019-12-07 16:33:25,792 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L784-2-->L784-4: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In-574459404 256) 0)) (.cse0 (= 0 (mod ~x$r_buff1_thd3~0_In-574459404 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite15_Out-574459404| ~x$w_buff1~0_In-574459404)) (and (or .cse1 .cse0) (= ~x~0_In-574459404 |P2Thread1of1ForFork2_#t~ite15_Out-574459404|)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-574459404, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-574459404, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-574459404, ~x~0=~x~0_In-574459404} OutVars{P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out-574459404|, ~x$w_buff1~0=~x$w_buff1~0_In-574459404, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-574459404, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-574459404, ~x~0=~x~0_In-574459404} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 16:33:25,792 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [693] [693] L784-4-->L785: Formula: (= |v_P2Thread1of1ForFork2_#t~ite15_8| v_~x~0_27) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_8|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_7|, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_11|, ~x~0=v_~x~0_27} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, P2Thread1of1ForFork2_#t~ite16, ~x~0] because there is no mapped edge [2019-12-07 16:33:25,792 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [777] [777] L785-->L785-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1476156865 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In-1476156865 256)))) (or (and (= ~x$w_buff0_used~0_In-1476156865 |P2Thread1of1ForFork2_#t~ite17_Out-1476156865|) (or .cse0 .cse1)) (and (= 0 |P2Thread1of1ForFork2_#t~ite17_Out-1476156865|) (not .cse0) (not .cse1)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1476156865, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1476156865} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1476156865, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out-1476156865|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1476156865} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 16:33:25,792 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [775] [775] L786-->L786-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd3~0_In1446167211 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In1446167211 256))) (.cse2 (= 0 (mod ~x$r_buff1_thd3~0_In1446167211 256))) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In1446167211 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork2_#t~ite18_Out1446167211| 0)) (and (= |P2Thread1of1ForFork2_#t~ite18_Out1446167211| ~x$w_buff1_used~0_In1446167211) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1446167211, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1446167211, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1446167211, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1446167211} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1446167211, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In1446167211, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In1446167211, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out1446167211|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1446167211} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 16:33:25,792 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L735-2-->L735-4: Formula: (let ((.cse1 (= (mod ~x$w_buff1_used~0_In-1916380321 256) 0)) (.cse0 (= (mod ~x$r_buff1_thd1~0_In-1916380321 256) 0))) (or (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork0_#t~ite3_Out-1916380321| ~x$w_buff1~0_In-1916380321)) (and (or .cse1 .cse0) (= |P0Thread1of1ForFork0_#t~ite3_Out-1916380321| ~x~0_In-1916380321)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-1916380321, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1916380321, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1916380321, ~x~0=~x~0_In-1916380321} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out-1916380321|, ~x$w_buff1~0=~x$w_buff1~0_In-1916380321, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1916380321, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1916380321, ~x~0=~x~0_In-1916380321} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3] because there is no mapped edge [2019-12-07 16:33:25,792 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [694] [694] L735-4-->L736: Formula: (= v_~x~0_31 |v_P0Thread1of1ForFork0_#t~ite3_8|) InVars {P0Thread1of1ForFork0_#t~ite3=|v_P0Thread1of1ForFork0_#t~ite3_8|} OutVars{P0Thread1of1ForFork0_#t~ite3=|v_P0Thread1of1ForFork0_#t~ite3_7|, P0Thread1of1ForFork0_#t~ite4=|v_P0Thread1of1ForFork0_#t~ite4_11|, ~x~0=v_~x~0_31} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4, ~x~0] because there is no mapped edge [2019-12-07 16:33:25,793 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L736-->L736-2: Formula: (let ((.cse1 (= (mod ~x$w_buff0_used~0_In319955123 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd1~0_In319955123 256) 0))) (or (and (= 0 |P0Thread1of1ForFork0_#t~ite5_Out319955123|) (not .cse0) (not .cse1)) (and (= ~x$w_buff0_used~0_In319955123 |P0Thread1of1ForFork0_#t~ite5_Out319955123|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In319955123, ~x$w_buff0_used~0=~x$w_buff0_used~0_In319955123} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out319955123|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In319955123, ~x$w_buff0_used~0=~x$w_buff0_used~0_In319955123} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 16:33:25,793 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L737-->L737-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff0_thd1~0_In64997452 256))) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In64997452 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In64997452 256))) (.cse0 (= (mod ~x$r_buff1_thd1~0_In64997452 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite6_Out64997452| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse1 .cse0) (= ~x$w_buff1_used~0_In64997452 |P0Thread1of1ForFork0_#t~ite6_Out64997452|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In64997452, ~x$w_buff1_used~0=~x$w_buff1_used~0_In64997452, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In64997452, ~x$w_buff0_used~0=~x$w_buff0_used~0_In64997452} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out64997452|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In64997452, ~x$w_buff1_used~0=~x$w_buff1_used~0_In64997452, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In64997452, ~x$w_buff0_used~0=~x$w_buff0_used~0_In64997452} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 16:33:25,793 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [774] [774] L738-->L738-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd1~0_In-644675241 256) 0)) (.cse1 (= (mod ~x$w_buff0_used~0_In-644675241 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite7_Out-644675241| 0) (not .cse0) (not .cse1)) (and (= |P0Thread1of1ForFork0_#t~ite7_Out-644675241| ~x$r_buff0_thd1~0_In-644675241) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-644675241, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-644675241} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-644675241, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-644675241|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-644675241} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 16:33:25,794 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L739-->L739-2: Formula: (let ((.cse2 (= 0 (mod ~x$w_buff1_used~0_In647235309 256))) (.cse3 (= 0 (mod ~x$r_buff1_thd1~0_In647235309 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In647235309 256) 0)) (.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In647235309 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~x$r_buff1_thd1~0_In647235309 |P0Thread1of1ForFork0_#t~ite8_Out647235309|)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |P0Thread1of1ForFork0_#t~ite8_Out647235309|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In647235309, ~x$w_buff1_used~0=~x$w_buff1_used~0_In647235309, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In647235309, ~x$w_buff0_used~0=~x$w_buff0_used~0_In647235309} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In647235309, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out647235309|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In647235309, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In647235309, ~x$w_buff0_used~0=~x$w_buff0_used~0_In647235309} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 16:33:25,794 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L739-2-->P0EXIT: Formula: (and (= v_~x$r_buff1_thd1~0_101 |v_P0Thread1of1ForFork0_#t~ite8_60|) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~__unbuffered_cnt~0_100 (+ v_~__unbuffered_cnt~0_101 1)) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_60|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_101} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_59|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_100, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_101} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 16:33:25,794 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L765-->L765-2: Formula: (let ((.cse0 (= (mod ~x$r_buff0_thd2~0_In1287607330 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In1287607330 256)))) (or (and (or .cse0 .cse1) (= ~x$w_buff0_used~0_In1287607330 |P1Thread1of1ForFork1_#t~ite11_Out1287607330|)) (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out1287607330|) (not .cse1)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1287607330, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1287607330} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out1287607330|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1287607330, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1287607330} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 16:33:25,794 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L766-->L766-2: Formula: (let ((.cse1 (= (mod ~x$r_buff1_thd2~0_In1257176016 256) 0)) (.cse0 (= (mod ~x$w_buff1_used~0_In1257176016 256) 0)) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In1257176016 256))) (.cse3 (= (mod ~x$w_buff0_used~0_In1257176016 256) 0))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite12_Out1257176016|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~x$w_buff1_used~0_In1257176016 |P1Thread1of1ForFork1_#t~ite12_Out1257176016|) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1257176016, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1257176016, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1257176016, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1257176016} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1257176016, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1257176016, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out1257176016|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1257176016, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1257176016} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 16:33:25,795 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L767-->L768: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd2~0_In-694589959 256) 0)) (.cse2 (= (mod ~x$w_buff0_used~0_In-694589959 256) 0)) (.cse0 (= ~x$r_buff0_thd2~0_Out-694589959 ~x$r_buff0_thd2~0_In-694589959))) (or (and .cse0 .cse1) (and (= ~x$r_buff0_thd2~0_Out-694589959 0) (not .cse1) (not .cse2)) (and .cse2 .cse0))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-694589959, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-694589959} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-694589959|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out-694589959, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-694589959} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 16:33:25,795 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] L768-->L768-2: Formula: (let ((.cse3 (= (mod ~x$w_buff1_used~0_In334269772 256) 0)) (.cse2 (= 0 (mod ~x$r_buff1_thd2~0_In334269772 256))) (.cse0 (= (mod ~x$w_buff0_used~0_In334269772 256) 0)) (.cse1 (= (mod ~x$r_buff0_thd2~0_In334269772 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite14_Out334269772| ~x$r_buff1_thd2~0_In334269772) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |P1Thread1of1ForFork1_#t~ite14_Out334269772| 0)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In334269772, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In334269772, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In334269772, ~x$w_buff0_used~0=~x$w_buff0_used~0_In334269772} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In334269772, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In334269772, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In334269772, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out334269772|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In334269772} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 16:33:25,795 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L768-2-->P1EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_52 1) v_~__unbuffered_cnt~0_51) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~x$r_buff1_thd2~0_54 |v_P1Thread1of1ForFork1_#t~ite14_30|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_52, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_30|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_54, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_51, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_29|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 16:33:25,795 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L787-->L787-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1089237804 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In-1089237804 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite19_Out-1089237804| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~x$r_buff0_thd3~0_In-1089237804 |P2Thread1of1ForFork2_#t~ite19_Out-1089237804|)))) InVars {~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1089237804, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1089237804} OutVars{~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-1089237804, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out-1089237804|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1089237804} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 16:33:25,796 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L788-->L788-2: Formula: (let ((.cse3 (= (mod ~x$r_buff1_thd3~0_In-653706639 256) 0)) (.cse2 (= (mod ~x$w_buff1_used~0_In-653706639 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In-653706639 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd3~0_In-653706639 256)))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite20_Out-653706639|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= |P2Thread1of1ForFork2_#t~ite20_Out-653706639| ~x$r_buff1_thd3~0_In-653706639) (or .cse0 .cse1)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-653706639, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-653706639, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-653706639, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-653706639} OutVars{P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out-653706639|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-653706639, ~x$r_buff1_thd3~0=~x$r_buff1_thd3~0_In-653706639, ~x$r_buff0_thd3~0=~x$r_buff0_thd3~0_In-653706639, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-653706639} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 16:33:25,796 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] L788-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= v_~x$r_buff1_thd3~0_81 |v_P2Thread1of1ForFork2_#t~ite20_48|) (= v_~__unbuffered_cnt~0_90 (+ v_~__unbuffered_cnt~0_91 1))) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_48|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_91} OutVars{P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_47|, ~x$r_buff1_thd3~0=v_~x$r_buff1_thd3~0_81, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_90, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, ~x$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 16:33:25,796 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L811-1-->L817: Formula: (and (= v_~main$tmp_guard0~0_6 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= 0 (mod v_~main$tmp_guard0~0_6 256)))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 16:33:25,796 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L817-2-->L817-5: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In809263801 256))) (.cse2 (= (mod ~x$r_buff1_thd0~0_In809263801 256) 0)) (.cse1 (= |ULTIMATE.start_main_#t~ite25_Out809263801| |ULTIMATE.start_main_#t~ite24_Out809263801|))) (or (and (not .cse0) (= ~x$w_buff1~0_In809263801 |ULTIMATE.start_main_#t~ite24_Out809263801|) .cse1 (not .cse2)) (and (or .cse0 .cse2) (= ~x~0_In809263801 |ULTIMATE.start_main_#t~ite24_Out809263801|) .cse1))) InVars {~x$w_buff1~0=~x$w_buff1~0_In809263801, ~x$w_buff1_used~0=~x$w_buff1_used~0_In809263801, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In809263801, ~x~0=~x~0_In809263801} OutVars{~x$w_buff1~0=~x$w_buff1~0_In809263801, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out809263801|, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out809263801|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In809263801, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In809263801, ~x~0=~x~0_In809263801} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 16:33:25,796 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L818-->L818-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In-258029680 256))) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In-258029680 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite26_Out-258029680| 0) (not .cse1)) (and (= ~x$w_buff0_used~0_In-258029680 |ULTIMATE.start_main_#t~ite26_Out-258029680|) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-258029680, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-258029680} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-258029680, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out-258029680|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-258029680} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 16:33:25,797 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L819-->L819-2: Formula: (let ((.cse2 (= (mod ~x$w_buff1_used~0_In1922642306 256) 0)) (.cse3 (= (mod ~x$r_buff1_thd0~0_In1922642306 256) 0)) (.cse0 (= (mod ~x$r_buff0_thd0~0_In1922642306 256) 0)) (.cse1 (= 0 (mod ~x$w_buff0_used~0_In1922642306 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite27_Out1922642306| ~x$w_buff1_used~0_In1922642306) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1))) (= |ULTIMATE.start_main_#t~ite27_Out1922642306| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1922642306, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1922642306, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1922642306, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1922642306} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1922642306, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1922642306, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out1922642306|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1922642306, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1922642306} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 16:33:25,797 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [769] [769] L820-->L820-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-341247320 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In-341247320 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite28_Out-341247320|) (not .cse0) (not .cse1)) (and (= ~x$r_buff0_thd0~0_In-341247320 |ULTIMATE.start_main_#t~ite28_Out-341247320|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-341247320, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-341247320} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-341247320, ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out-341247320|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-341247320} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 16:33:25,797 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L821-->L821-2: Formula: (let ((.cse1 (= 0 (mod ~x$r_buff1_thd0~0_In1300821445 256))) (.cse0 (= (mod ~x$w_buff1_used~0_In1300821445 256) 0)) (.cse3 (= (mod ~x$r_buff0_thd0~0_In1300821445 256) 0)) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In1300821445 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite29_Out1300821445| ~x$r_buff1_thd0~0_In1300821445)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |ULTIMATE.start_main_#t~ite29_Out1300821445| 0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1300821445, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1300821445, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1300821445, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1300821445} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1300821445, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out1300821445|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1300821445, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1300821445, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1300821445} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 16:33:25,799 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L832-->L832-8: Formula: (let ((.cse4 (= 0 (mod ~x$w_buff0_used~0_In1451612299 256))) (.cse3 (= 0 (mod ~x$r_buff1_thd0~0_In1451612299 256))) (.cse0 (= (mod ~weak$$choice2~0_In1451612299 256) 0)) (.cse5 (= |ULTIMATE.start_main_#t~ite44_Out1451612299| |ULTIMATE.start_main_#t~ite45_Out1451612299|)) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In1451612299 256))) (.cse2 (= 0 (mod ~x$r_buff0_thd0~0_In1451612299 256)))) (or (and (= |ULTIMATE.start_main_#t~ite43_In1451612299| |ULTIMATE.start_main_#t~ite43_Out1451612299|) (or (and (= ~x$w_buff1_used~0_In1451612299 |ULTIMATE.start_main_#t~ite44_Out1451612299|) .cse0 (or (and .cse1 .cse2) (and .cse3 .cse2) .cse4) .cse5) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite44_Out1451612299| |ULTIMATE.start_main_#t~ite44_In1451612299|) (= ~x$w_buff1_used~0_In1451612299 |ULTIMATE.start_main_#t~ite45_Out1451612299|)))) (let ((.cse6 (not .cse2))) (and (not .cse4) (or (not .cse3) .cse6) .cse0 .cse5 (= |ULTIMATE.start_main_#t~ite44_Out1451612299| |ULTIMATE.start_main_#t~ite43_Out1451612299|) (or (not .cse1) .cse6) (= 0 |ULTIMATE.start_main_#t~ite43_Out1451612299|))))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1451612299, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1451612299, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1451612299, ~weak$$choice2~0=~weak$$choice2~0_In1451612299, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_In1451612299|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1451612299, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_In1451612299|} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1451612299, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1451612299, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1451612299, ~weak$$choice2~0=~weak$$choice2~0_In1451612299, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out1451612299|, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out1451612299|, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out1451612299|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1451612299} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 16:33:25,800 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L832-8-->L834: Formula: (and (not (= (mod v_~weak$$choice2~0_91 256) 0)) (= v_~x$w_buff1_used~0_335 |v_ULTIMATE.start_main_#t~ite45_32|) (= v_~x$r_buff0_thd0~0_362 v_~x$r_buff0_thd0~0_361)) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_362, ~weak$$choice2~0=v_~weak$$choice2~0_91, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_32|} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_361, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_26|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_26|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_335, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_27|, ~weak$$choice2~0=v_~weak$$choice2~0_91, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_30|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_31|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_30|} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ~x$w_buff1_used~0, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 16:33:25,800 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [811] [811] L834-->L834-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In248908367 256)))) (or (and (not .cse0) (= ~x$r_buff1_thd0~0_In248908367 |ULTIMATE.start_main_#t~ite51_Out248908367|) (= |ULTIMATE.start_main_#t~ite50_In248908367| |ULTIMATE.start_main_#t~ite50_Out248908367|)) (and (= ~x$r_buff1_thd0~0_In248908367 |ULTIMATE.start_main_#t~ite50_Out248908367|) (= |ULTIMATE.start_main_#t~ite51_Out248908367| |ULTIMATE.start_main_#t~ite50_Out248908367|) .cse0 (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In248908367 256) 0))) (or (and (= (mod ~x$w_buff1_used~0_In248908367 256) 0) .cse1) (and .cse1 (= (mod ~x$r_buff1_thd0~0_In248908367 256) 0)) (= 0 (mod ~x$w_buff0_used~0_In248908367 256))))))) InVars {ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_In248908367|, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In248908367, ~x$w_buff1_used~0=~x$w_buff1_used~0_In248908367, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In248908367, ~weak$$choice2~0=~weak$$choice2~0_In248908367, ~x$w_buff0_used~0=~x$w_buff0_used~0_In248908367} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out248908367|, ~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In248908367, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out248908367|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In248908367, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In248908367, ~weak$$choice2~0=~weak$$choice2~0_In248908367, ~x$w_buff0_used~0=~x$w_buff0_used~0_In248908367} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 16:33:25,800 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [807] [807] L836-->L839-1: Formula: (and (= v_~x$mem_tmp~0_12 v_~x~0_148) (not (= (mod v_~x$flush_delayed~0_23 256) 0)) (= v_~x$flush_delayed~0_22 0) (= (mod v_~main$tmp_guard1~0_34 256) |v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|)) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_23, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_34, ~x$mem_tmp~0=v_~x$mem_tmp~0_12} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_17|, ~x$flush_delayed~0=v_~x$flush_delayed~0_22, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_34, ~x$mem_tmp~0=v_~x$mem_tmp~0_12, ~x~0=v_~x~0_148, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_7|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ~x$flush_delayed~0, ~x~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 16:33:25,800 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L839-1-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 16:33:25,857 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_eeb67cc8-f490-461e-ba8c-04de92756f14/bin/uautomizer/witness.graphml [2019-12-07 16:33:25,857 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 16:33:25,858 INFO L168 Benchmark]: Toolchain (without parser) took 142060.84 ms. Allocated memory was 1.0 GB in the beginning and 7.3 GB in the end (delta: 6.2 GB). Free memory was 934.0 MB in the beginning and 6.2 GB in the end (delta: -5.2 GB). Peak memory consumption was 998.4 MB. Max. memory is 11.5 GB. [2019-12-07 16:33:25,858 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 955.4 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 16:33:25,858 INFO L168 Benchmark]: CACSL2BoogieTranslator took 366.75 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 92.8 MB). Free memory was 934.0 MB in the beginning and 1.1 GB in the end (delta: -125.2 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. [2019-12-07 16:33:25,859 INFO L168 Benchmark]: Boogie Procedure Inliner took 40.12 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 16:33:25,859 INFO L168 Benchmark]: Boogie Preprocessor took 25.60 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 16:33:25,859 INFO L168 Benchmark]: RCFGBuilder took 427.25 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 998.4 MB in the end (delta: 50.1 MB). Peak memory consumption was 50.1 MB. Max. memory is 11.5 GB. [2019-12-07 16:33:25,859 INFO L168 Benchmark]: TraceAbstraction took 141128.56 ms. Allocated memory was 1.1 GB in the beginning and 7.3 GB in the end (delta: 6.1 GB). Free memory was 993.0 MB in the beginning and 6.2 GB in the end (delta: -5.2 GB). Peak memory consumption was 955.4 MB. Max. memory is 11.5 GB. [2019-12-07 16:33:25,860 INFO L168 Benchmark]: Witness Printer took 69.22 ms. Allocated memory is still 7.3 GB. Free memory was 6.2 GB in the beginning and 6.2 GB in the end (delta: 9.3 MB). Peak memory consumption was 9.3 MB. Max. memory is 11.5 GB. [2019-12-07 16:33:25,861 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 955.4 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 366.75 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 92.8 MB). Free memory was 934.0 MB in the beginning and 1.1 GB in the end (delta: -125.2 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 40.12 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.60 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 427.25 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 998.4 MB in the end (delta: 50.1 MB). Peak memory consumption was 50.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 141128.56 ms. Allocated memory was 1.1 GB in the beginning and 7.3 GB in the end (delta: 6.1 GB). Free memory was 993.0 MB in the beginning and 6.2 GB in the end (delta: -5.2 GB). Peak memory consumption was 955.4 MB. Max. memory is 11.5 GB. * Witness Printer took 69.22 ms. Allocated memory is still 7.3 GB. Free memory was 6.2 GB in the beginning and 6.2 GB in the end (delta: 9.3 MB). Peak memory consumption was 9.3 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.1s, 175 ProgramPointsBefore, 94 ProgramPointsAfterwards, 212 TransitionsBefore, 103 TransitionsAfterwards, 17074 CoEnabledTransitionPairs, 8 FixpointIterations, 32 TrivialSequentialCompositions, 47 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 33 ConcurrentYvCompositions, 32 ChoiceCompositions, 5784 VarBasedMoverChecksPositive, 205 VarBasedMoverChecksNegative, 38 SemBasedMoverChecksPositive, 252 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 91392 CheckedPairsTotal, 112 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L807] FCALL, FORK 0 pthread_create(&t2284, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L809] FCALL, FORK 0 pthread_create(&t2285, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0, z=0] [L749] 2 x$w_buff1 = x$w_buff0 [L750] 2 x$w_buff0 = 2 [L751] 2 x$w_buff1_used = x$w_buff0_used [L752] 2 x$w_buff0_used = (_Bool)1 [L811] FCALL, FORK 0 pthread_create(&t2286, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L778] 3 __unbuffered_p2_EAX = y [L781] 3 __unbuffered_p2_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=0] [L729] 1 z = 1 [L732] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L784] 3 x$w_buff0_used && x$r_buff0_thd3 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd3 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L735] 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L785] 3 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$w_buff0_used [L736] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L737] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L738] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L764] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L764] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L765] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L766] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L786] 3 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd3 || x$w_buff1_used && x$r_buff1_thd3 ? (_Bool)0 : x$w_buff1_used [L787] 3 x$r_buff0_thd3 = x$w_buff0_used && x$r_buff0_thd3 ? (_Bool)0 : x$r_buff0_thd3 [L817] EXPR 0 x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L817] 0 x = x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd0 ? x$w_buff1 : x) [L818] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L819] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L820] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L821] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L824] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L825] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L826] 0 x$flush_delayed = weak$$choice2 [L827] 0 x$mem_tmp = x VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L828] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L828] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L829] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L829] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L830] EXPR 0 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L830] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L831] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] [L831] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L834] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L835] 0 main$tmp_guard1 = !(x == 2 && __unbuffered_p2_EAX == 1 && __unbuffered_p2_EBX == 0) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff0_thd3=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$r_buff1_thd3=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=1, z=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 166 locations, 2 error locations. Result: UNSAFE, OverallTime: 140.9s, OverallIterations: 20, TraceHistogramMax: 1, AutomataDifference: 28.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 3398 SDtfs, 2877 SDslu, 5941 SDs, 0 SdLazy, 3677 SolverSat, 140 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 133 GetRequests, 29 SyntacticMatches, 12 SemanticMatches, 92 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 164 ImplicationChecksByTransitivity, 0.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=260547occurred in iteration=7, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 92.2s AutomataMinimizationTime, 19 MinimizatonAttempts, 483025 StatesRemovedByMinimization, 17 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.7s InterpolantComputationTime, 790 NumberOfCodeBlocks, 790 NumberOfCodeBlocksAsserted, 20 NumberOfCheckSat, 704 ConstructedInterpolants, 0 QuantifiedInterpolants, 132346 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 19 InterpolantComputations, 19 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...