./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe021_pso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_123d4dde-fcef-47e5-b61e-f95b82c3223c/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_123d4dde-fcef-47e5-b61e-f95b82c3223c/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_123d4dde-fcef-47e5-b61e-f95b82c3223c/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_123d4dde-fcef-47e5-b61e-f95b82c3223c/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe021_pso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_123d4dde-fcef-47e5-b61e-f95b82c3223c/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_123d4dde-fcef-47e5-b61e-f95b82c3223c/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 3ac002b3633adb7e73afb8704d2ea9835992d8e2 .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 11:55:54,056 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 11:55:54,057 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 11:55:54,066 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 11:55:54,066 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 11:55:54,067 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 11:55:54,068 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 11:55:54,069 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 11:55:54,071 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 11:55:54,071 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 11:55:54,072 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 11:55:54,073 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 11:55:54,073 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 11:55:54,074 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 11:55:54,074 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 11:55:54,075 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 11:55:54,076 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 11:55:54,077 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 11:55:54,078 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 11:55:54,080 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 11:55:54,081 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 11:55:54,082 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 11:55:54,083 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 11:55:54,083 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 11:55:54,085 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 11:55:54,085 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 11:55:54,086 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 11:55:54,086 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 11:55:54,086 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 11:55:54,087 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 11:55:54,087 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 11:55:54,088 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 11:55:54,088 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 11:55:54,089 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 11:55:54,090 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 11:55:54,090 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 11:55:54,091 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 11:55:54,091 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 11:55:54,091 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 11:55:54,092 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 11:55:54,092 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 11:55:54,093 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_123d4dde-fcef-47e5-b61e-f95b82c3223c/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 11:55:54,105 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 11:55:54,105 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 11:55:54,106 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 11:55:54,106 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 11:55:54,106 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 11:55:54,107 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 11:55:54,107 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 11:55:54,107 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 11:55:54,107 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 11:55:54,107 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 11:55:54,107 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 11:55:54,108 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 11:55:54,108 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 11:55:54,108 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 11:55:54,108 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 11:55:54,108 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 11:55:54,108 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 11:55:54,108 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 11:55:54,109 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 11:55:54,109 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 11:55:54,109 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 11:55:54,109 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 11:55:54,109 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 11:55:54,109 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 11:55:54,110 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 11:55:54,110 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 11:55:54,110 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 11:55:54,110 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 11:55:54,110 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 11:55:54,111 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_123d4dde-fcef-47e5-b61e-f95b82c3223c/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 3ac002b3633adb7e73afb8704d2ea9835992d8e2 [2019-12-07 11:55:54,216 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 11:55:54,224 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 11:55:54,226 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 11:55:54,227 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 11:55:54,227 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 11:55:54,227 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_123d4dde-fcef-47e5-b61e-f95b82c3223c/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe021_pso.oepc.i [2019-12-07 11:55:54,264 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_123d4dde-fcef-47e5-b61e-f95b82c3223c/bin/uautomizer/data/bea6a9868/9cf7d9d957ce4b328f95a63a8984b7f6/FLAG1fd457039 [2019-12-07 11:55:54,661 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 11:55:54,662 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_123d4dde-fcef-47e5-b61e-f95b82c3223c/sv-benchmarks/c/pthread-wmm/safe021_pso.oepc.i [2019-12-07 11:55:54,672 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_123d4dde-fcef-47e5-b61e-f95b82c3223c/bin/uautomizer/data/bea6a9868/9cf7d9d957ce4b328f95a63a8984b7f6/FLAG1fd457039 [2019-12-07 11:55:54,680 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_123d4dde-fcef-47e5-b61e-f95b82c3223c/bin/uautomizer/data/bea6a9868/9cf7d9d957ce4b328f95a63a8984b7f6 [2019-12-07 11:55:54,682 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 11:55:54,683 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 11:55:54,684 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 11:55:54,684 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 11:55:54,686 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 11:55:54,687 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 11:55:54" (1/1) ... [2019-12-07 11:55:54,688 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5a2ff042 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:55:54, skipping insertion in model container [2019-12-07 11:55:54,688 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 11:55:54" (1/1) ... [2019-12-07 11:55:54,693 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 11:55:54,720 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 11:55:54,960 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 11:55:54,968 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 11:55:55,012 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 11:55:55,061 INFO L208 MainTranslator]: Completed translation [2019-12-07 11:55:55,062 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:55:55 WrapperNode [2019-12-07 11:55:55,062 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 11:55:55,062 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 11:55:55,062 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 11:55:55,063 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 11:55:55,068 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:55:55" (1/1) ... [2019-12-07 11:55:55,083 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:55:55" (1/1) ... [2019-12-07 11:55:55,103 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 11:55:55,103 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 11:55:55,103 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 11:55:55,103 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 11:55:55,110 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:55:55" (1/1) ... [2019-12-07 11:55:55,110 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:55:55" (1/1) ... [2019-12-07 11:55:55,113 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:55:55" (1/1) ... [2019-12-07 11:55:55,114 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:55:55" (1/1) ... [2019-12-07 11:55:55,121 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:55:55" (1/1) ... [2019-12-07 11:55:55,124 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:55:55" (1/1) ... [2019-12-07 11:55:55,127 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:55:55" (1/1) ... [2019-12-07 11:55:55,130 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 11:55:55,131 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 11:55:55,131 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 11:55:55,131 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 11:55:55,132 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:55:55" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_123d4dde-fcef-47e5-b61e-f95b82c3223c/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 11:55:55,173 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 11:55:55,173 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 11:55:55,173 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 11:55:55,173 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 11:55:55,174 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 11:55:55,174 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 11:55:55,174 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 11:55:55,174 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 11:55:55,174 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 11:55:55,174 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 11:55:55,174 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 11:55:55,174 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 11:55:55,174 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 11:55:55,175 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 11:55:55,553 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 11:55:55,553 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 11:55:55,554 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:55:55 BoogieIcfgContainer [2019-12-07 11:55:55,554 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 11:55:55,554 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 11:55:55,555 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 11:55:55,556 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 11:55:55,557 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 11:55:54" (1/3) ... [2019-12-07 11:55:55,557 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@170d09b2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 11:55:55, skipping insertion in model container [2019-12-07 11:55:55,557 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:55:55" (2/3) ... [2019-12-07 11:55:55,557 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@170d09b2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 11:55:55, skipping insertion in model container [2019-12-07 11:55:55,558 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:55:55" (3/3) ... [2019-12-07 11:55:55,559 INFO L109 eAbstractionObserver]: Analyzing ICFG safe021_pso.oepc.i [2019-12-07 11:55:55,565 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 11:55:55,565 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 11:55:55,570 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 11:55:55,571 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 11:55:55,596 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,596 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,596 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,596 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,596 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,596 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,597 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,597 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,597 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,597 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,597 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,597 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,597 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,598 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,598 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,598 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,598 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,598 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,598 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,598 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,598 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,598 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,599 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,599 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,599 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,599 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,599 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,599 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,599 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,599 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,600 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,600 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,600 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,600 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,600 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,600 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,600 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,600 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,601 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,601 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,601 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,601 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,601 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,601 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,601 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,601 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,602 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,602 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,602 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,602 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,602 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,602 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,602 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,602 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,602 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,603 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,603 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,603 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,603 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,603 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,603 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,603 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,603 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,603 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,604 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,604 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,604 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,604 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,604 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,605 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,605 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,605 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,605 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,605 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,605 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,605 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,605 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,605 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,606 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,606 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,606 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,606 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,606 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,606 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,606 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,606 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,606 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,607 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,607 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,607 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,607 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,607 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,607 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,607 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,607 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,607 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,608 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,608 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,608 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,608 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,608 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,608 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,608 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,608 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,608 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,608 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,609 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,609 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,609 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,609 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,609 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,609 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,609 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,609 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,609 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,609 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,610 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,610 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,610 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,610 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,610 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,610 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,610 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,610 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,610 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,610 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,611 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,611 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,611 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,611 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,611 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,611 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,611 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,611 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,611 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,611 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,612 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,612 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,612 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,612 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,612 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,612 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,612 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,612 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,612 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,612 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,612 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,613 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,613 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,613 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,613 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,613 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,613 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,613 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,613 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,613 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,613 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,614 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,614 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,614 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,614 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,614 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,614 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,614 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,614 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,614 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,614 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,615 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,615 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,615 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,615 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,615 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,615 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,615 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,615 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,615 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,616 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,616 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,616 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,616 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,616 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,616 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:55:55,627 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 11:55:55,639 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 11:55:55,639 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 11:55:55,640 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 11:55:55,640 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 11:55:55,640 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 11:55:55,640 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 11:55:55,640 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 11:55:55,640 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 11:55:55,651 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 175 places, 212 transitions [2019-12-07 11:55:55,652 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 175 places, 212 transitions [2019-12-07 11:55:55,708 INFO L134 PetriNetUnfolder]: 47/209 cut-off events. [2019-12-07 11:55:55,709 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 11:55:55,719 INFO L76 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 209 events. 47/209 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 12. Compared 702 event pairs. 9/169 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 11:55:55,735 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 175 places, 212 transitions [2019-12-07 11:55:55,767 INFO L134 PetriNetUnfolder]: 47/209 cut-off events. [2019-12-07 11:55:55,767 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 11:55:55,772 INFO L76 FinitePrefix]: Finished finitePrefix Result has 219 conditions, 209 events. 47/209 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 12. Compared 702 event pairs. 9/169 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 11:55:55,787 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 11:55:55,788 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 11:55:58,944 WARN L192 SmtUtils]: Spent 143.00 ms on a formula simplification. DAG size of input: 89 DAG size of output: 87 [2019-12-07 11:55:59,229 INFO L206 etLargeBlockEncoding]: Checked pairs total: 125946 [2019-12-07 11:55:59,230 INFO L214 etLargeBlockEncoding]: Total number of compositions: 121 [2019-12-07 11:55:59,232 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 92 places, 102 transitions [2019-12-07 11:56:13,362 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 111572 states. [2019-12-07 11:56:13,363 INFO L276 IsEmpty]: Start isEmpty. Operand 111572 states. [2019-12-07 11:56:13,367 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 11:56:13,367 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:56:13,368 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 11:56:13,368 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:56:13,372 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:56:13,372 INFO L82 PathProgramCache]: Analyzing trace with hash 912834, now seen corresponding path program 1 times [2019-12-07 11:56:13,377 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:56:13,377 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [670884353] [2019-12-07 11:56:13,377 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:56:13,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:56:13,502 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:56:13,503 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [670884353] [2019-12-07 11:56:13,503 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:56:13,504 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 11:56:13,504 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [510983560] [2019-12-07 11:56:13,507 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:56:13,507 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:56:13,516 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:56:13,516 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:56:13,518 INFO L87 Difference]: Start difference. First operand 111572 states. Second operand 3 states. [2019-12-07 11:56:14,340 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:56:14,340 INFO L93 Difference]: Finished difference Result 110910 states and 474711 transitions. [2019-12-07 11:56:14,341 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:56:14,342 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 11:56:14,342 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:56:14,775 INFO L225 Difference]: With dead ends: 110910 [2019-12-07 11:56:14,775 INFO L226 Difference]: Without dead ends: 98066 [2019-12-07 11:56:14,776 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:56:18,016 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98066 states. [2019-12-07 11:56:19,406 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98066 to 98066. [2019-12-07 11:56:19,407 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 98066 states. [2019-12-07 11:56:19,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98066 states to 98066 states and 418629 transitions. [2019-12-07 11:56:19,747 INFO L78 Accepts]: Start accepts. Automaton has 98066 states and 418629 transitions. Word has length 3 [2019-12-07 11:56:19,747 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:56:19,747 INFO L462 AbstractCegarLoop]: Abstraction has 98066 states and 418629 transitions. [2019-12-07 11:56:19,748 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:56:19,748 INFO L276 IsEmpty]: Start isEmpty. Operand 98066 states and 418629 transitions. [2019-12-07 11:56:19,750 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 11:56:19,751 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:56:19,751 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:56:19,751 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:56:19,751 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:56:19,751 INFO L82 PathProgramCache]: Analyzing trace with hash 1027484309, now seen corresponding path program 1 times [2019-12-07 11:56:19,751 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:56:19,751 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [969016266] [2019-12-07 11:56:19,751 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:56:19,770 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:56:19,811 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:56:19,811 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [969016266] [2019-12-07 11:56:19,811 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:56:19,811 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:56:19,811 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [586241454] [2019-12-07 11:56:19,812 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:56:19,812 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:56:19,813 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:56:19,813 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:56:19,813 INFO L87 Difference]: Start difference. First operand 98066 states and 418629 transitions. Second operand 4 states. [2019-12-07 11:56:22,227 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:56:22,227 INFO L93 Difference]: Finished difference Result 156656 states and 639635 transitions. [2019-12-07 11:56:22,228 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:56:22,228 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 11:56:22,228 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:56:22,630 INFO L225 Difference]: With dead ends: 156656 [2019-12-07 11:56:22,630 INFO L226 Difference]: Without dead ends: 156558 [2019-12-07 11:56:22,630 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:56:26,427 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156558 states. [2019-12-07 11:56:28,323 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156558 to 142946. [2019-12-07 11:56:28,324 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142946 states. [2019-12-07 11:56:28,709 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142946 states to 142946 states and 591329 transitions. [2019-12-07 11:56:28,709 INFO L78 Accepts]: Start accepts. Automaton has 142946 states and 591329 transitions. Word has length 11 [2019-12-07 11:56:28,709 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:56:28,709 INFO L462 AbstractCegarLoop]: Abstraction has 142946 states and 591329 transitions. [2019-12-07 11:56:28,709 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:56:28,709 INFO L276 IsEmpty]: Start isEmpty. Operand 142946 states and 591329 transitions. [2019-12-07 11:56:28,713 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 11:56:28,713 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:56:28,713 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:56:28,714 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:56:28,714 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:56:28,714 INFO L82 PathProgramCache]: Analyzing trace with hash 1461043352, now seen corresponding path program 1 times [2019-12-07 11:56:28,714 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:56:28,714 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1417097368] [2019-12-07 11:56:28,714 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:56:28,732 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:56:28,765 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:56:28,765 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1417097368] [2019-12-07 11:56:28,765 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:56:28,765 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:56:28,765 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1331303532] [2019-12-07 11:56:28,766 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:56:28,766 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:56:28,766 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:56:28,766 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:56:28,766 INFO L87 Difference]: Start difference. First operand 142946 states and 591329 transitions. Second operand 4 states. [2019-12-07 11:56:31,821 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:56:31,821 INFO L93 Difference]: Finished difference Result 205190 states and 828176 transitions. [2019-12-07 11:56:31,822 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:56:31,822 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 11:56:31,822 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:56:32,319 INFO L225 Difference]: With dead ends: 205190 [2019-12-07 11:56:32,320 INFO L226 Difference]: Without dead ends: 205078 [2019-12-07 11:56:32,320 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:56:36,671 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 205078 states. [2019-12-07 11:56:39,095 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 205078 to 171310. [2019-12-07 11:56:39,095 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171310 states. [2019-12-07 11:56:39,594 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171310 states to 171310 states and 704416 transitions. [2019-12-07 11:56:39,594 INFO L78 Accepts]: Start accepts. Automaton has 171310 states and 704416 transitions. Word has length 13 [2019-12-07 11:56:39,595 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:56:39,595 INFO L462 AbstractCegarLoop]: Abstraction has 171310 states and 704416 transitions. [2019-12-07 11:56:39,595 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:56:39,595 INFO L276 IsEmpty]: Start isEmpty. Operand 171310 states and 704416 transitions. [2019-12-07 11:56:39,601 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 11:56:39,601 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:56:39,601 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:56:39,601 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:56:39,601 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:56:39,601 INFO L82 PathProgramCache]: Analyzing trace with hash -876468662, now seen corresponding path program 1 times [2019-12-07 11:56:39,602 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:56:39,602 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1250224226] [2019-12-07 11:56:39,602 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:56:39,614 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:56:39,651 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:56:39,651 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1250224226] [2019-12-07 11:56:39,651 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:56:39,651 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:56:39,652 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [866254724] [2019-12-07 11:56:39,652 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:56:39,652 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:56:39,652 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:56:39,652 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:56:39,652 INFO L87 Difference]: Start difference. First operand 171310 states and 704416 transitions. Second operand 5 states. [2019-12-07 11:56:41,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:56:41,173 INFO L93 Difference]: Finished difference Result 231848 states and 943034 transitions. [2019-12-07 11:56:41,174 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 11:56:41,174 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 11:56:41,174 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:56:41,747 INFO L225 Difference]: With dead ends: 231848 [2019-12-07 11:56:41,747 INFO L226 Difference]: Without dead ends: 231848 [2019-12-07 11:56:41,748 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:56:46,635 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 231848 states. [2019-12-07 11:56:52,365 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 231848 to 191437. [2019-12-07 11:56:52,365 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 191437 states. [2019-12-07 11:56:52,898 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 191437 states to 191437 states and 785356 transitions. [2019-12-07 11:56:52,898 INFO L78 Accepts]: Start accepts. Automaton has 191437 states and 785356 transitions. Word has length 16 [2019-12-07 11:56:52,899 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:56:52,899 INFO L462 AbstractCegarLoop]: Abstraction has 191437 states and 785356 transitions. [2019-12-07 11:56:52,899 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:56:52,899 INFO L276 IsEmpty]: Start isEmpty. Operand 191437 states and 785356 transitions. [2019-12-07 11:56:52,911 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 11:56:52,911 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:56:52,912 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:56:52,912 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:56:52,912 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:56:52,912 INFO L82 PathProgramCache]: Analyzing trace with hash -1118041263, now seen corresponding path program 1 times [2019-12-07 11:56:52,912 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:56:52,912 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1384450860] [2019-12-07 11:56:52,912 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:56:52,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:56:52,962 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:56:52,962 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1384450860] [2019-12-07 11:56:52,963 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:56:52,963 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 11:56:52,963 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [466324472] [2019-12-07 11:56:52,963 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:56:52,963 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:56:52,963 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:56:52,963 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:56:52,963 INFO L87 Difference]: Start difference. First operand 191437 states and 785356 transitions. Second operand 3 states. [2019-12-07 11:56:54,368 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:56:54,368 INFO L93 Difference]: Finished difference Result 343655 states and 1400507 transitions. [2019-12-07 11:56:54,369 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:56:54,369 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 11:56:54,369 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:56:55,142 INFO L225 Difference]: With dead ends: 343655 [2019-12-07 11:56:55,142 INFO L226 Difference]: Without dead ends: 308466 [2019-12-07 11:56:55,142 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:57:00,880 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 308466 states. [2019-12-07 11:57:05,287 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 308466 to 294588. [2019-12-07 11:57:05,287 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 294588 states. [2019-12-07 11:57:06,150 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 294588 states to 294588 states and 1210005 transitions. [2019-12-07 11:57:06,150 INFO L78 Accepts]: Start accepts. Automaton has 294588 states and 1210005 transitions. Word has length 18 [2019-12-07 11:57:06,151 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:57:06,151 INFO L462 AbstractCegarLoop]: Abstraction has 294588 states and 1210005 transitions. [2019-12-07 11:57:06,151 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:57:06,151 INFO L276 IsEmpty]: Start isEmpty. Operand 294588 states and 1210005 transitions. [2019-12-07 11:57:06,172 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 11:57:06,172 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:57:06,172 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:57:06,172 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:57:06,172 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:57:06,173 INFO L82 PathProgramCache]: Analyzing trace with hash 2014810708, now seen corresponding path program 1 times [2019-12-07 11:57:06,173 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:57:06,173 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1202923249] [2019-12-07 11:57:06,173 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:57:06,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:57:06,208 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:57:06,209 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1202923249] [2019-12-07 11:57:06,209 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:57:06,209 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:57:06,209 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [589830839] [2019-12-07 11:57:06,209 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:57:06,209 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:57:06,209 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:57:06,209 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:57:06,210 INFO L87 Difference]: Start difference. First operand 294588 states and 1210005 transitions. Second operand 3 states. [2019-12-07 11:57:09,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:57:09,924 INFO L93 Difference]: Finished difference Result 294588 states and 1198153 transitions. [2019-12-07 11:57:09,924 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:57:09,924 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 11:57:09,924 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:57:10,664 INFO L225 Difference]: With dead ends: 294588 [2019-12-07 11:57:10,664 INFO L226 Difference]: Without dead ends: 294588 [2019-12-07 11:57:10,664 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:57:15,874 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 294588 states. [2019-12-07 11:57:19,738 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 294588 to 291136. [2019-12-07 11:57:19,738 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 291136 states. [2019-12-07 11:57:21,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 291136 states to 291136 states and 1185531 transitions. [2019-12-07 11:57:21,174 INFO L78 Accepts]: Start accepts. Automaton has 291136 states and 1185531 transitions. Word has length 19 [2019-12-07 11:57:21,174 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:57:21,174 INFO L462 AbstractCegarLoop]: Abstraction has 291136 states and 1185531 transitions. [2019-12-07 11:57:21,174 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:57:21,174 INFO L276 IsEmpty]: Start isEmpty. Operand 291136 states and 1185531 transitions. [2019-12-07 11:57:21,193 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 11:57:21,193 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:57:21,193 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:57:21,193 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:57:21,194 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:57:21,194 INFO L82 PathProgramCache]: Analyzing trace with hash 1466525918, now seen corresponding path program 1 times [2019-12-07 11:57:21,194 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:57:21,194 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1008464608] [2019-12-07 11:57:21,194 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:57:21,211 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:57:21,250 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:57:21,250 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1008464608] [2019-12-07 11:57:21,250 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:57:21,250 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:57:21,250 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1836512919] [2019-12-07 11:57:21,251 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:57:21,251 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:57:21,251 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:57:21,251 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:57:21,251 INFO L87 Difference]: Start difference. First operand 291136 states and 1185531 transitions. Second operand 4 states. [2019-12-07 11:57:22,472 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:57:22,472 INFO L93 Difference]: Finished difference Result 303335 states and 1222970 transitions. [2019-12-07 11:57:22,473 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:57:22,473 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2019-12-07 11:57:22,473 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:57:23,210 INFO L225 Difference]: With dead ends: 303335 [2019-12-07 11:57:23,211 INFO L226 Difference]: Without dead ends: 303335 [2019-12-07 11:57:23,211 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:57:32,333 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 303335 states. [2019-12-07 11:57:36,321 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 303335 to 285168. [2019-12-07 11:57:36,322 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 285168 states. [2019-12-07 11:57:37,120 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 285168 states to 285168 states and 1160482 transitions. [2019-12-07 11:57:37,120 INFO L78 Accepts]: Start accepts. Automaton has 285168 states and 1160482 transitions. Word has length 19 [2019-12-07 11:57:37,120 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:57:37,120 INFO L462 AbstractCegarLoop]: Abstraction has 285168 states and 1160482 transitions. [2019-12-07 11:57:37,120 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:57:37,121 INFO L276 IsEmpty]: Start isEmpty. Operand 285168 states and 1160482 transitions. [2019-12-07 11:57:37,138 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 11:57:37,138 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:57:37,138 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:57:37,139 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:57:37,139 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:57:37,139 INFO L82 PathProgramCache]: Analyzing trace with hash 1757364841, now seen corresponding path program 1 times [2019-12-07 11:57:37,139 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:57:37,139 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2038187970] [2019-12-07 11:57:37,139 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:57:37,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:57:37,567 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:57:37,567 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2038187970] [2019-12-07 11:57:37,568 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:57:37,568 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:57:37,568 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [749438680] [2019-12-07 11:57:37,568 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:57:37,568 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:57:37,568 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:57:37,568 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:57:37,568 INFO L87 Difference]: Start difference. First operand 285168 states and 1160482 transitions. Second operand 4 states. [2019-12-07 11:57:38,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:57:38,764 INFO L93 Difference]: Finished difference Result 302744 states and 1220925 transitions. [2019-12-07 11:57:38,764 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 11:57:38,764 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2019-12-07 11:57:38,764 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:57:39,497 INFO L225 Difference]: With dead ends: 302744 [2019-12-07 11:57:39,497 INFO L226 Difference]: Without dead ends: 302744 [2019-12-07 11:57:39,497 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:57:45,356 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 302744 states. [2019-12-07 11:57:52,860 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 302744 to 281786. [2019-12-07 11:57:52,860 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 281786 states. [2019-12-07 11:57:53,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 281786 states to 281786 states and 1147719 transitions. [2019-12-07 11:57:53,672 INFO L78 Accepts]: Start accepts. Automaton has 281786 states and 1147719 transitions. Word has length 19 [2019-12-07 11:57:53,672 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:57:53,673 INFO L462 AbstractCegarLoop]: Abstraction has 281786 states and 1147719 transitions. [2019-12-07 11:57:53,673 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:57:53,673 INFO L276 IsEmpty]: Start isEmpty. Operand 281786 states and 1147719 transitions. [2019-12-07 11:57:53,688 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 11:57:53,689 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:57:53,689 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:57:53,689 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:57:53,689 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:57:53,689 INFO L82 PathProgramCache]: Analyzing trace with hash -1265267965, now seen corresponding path program 1 times [2019-12-07 11:57:53,689 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:57:53,689 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [126532278] [2019-12-07 11:57:53,689 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:57:53,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:57:53,736 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:57:53,736 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [126532278] [2019-12-07 11:57:53,737 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:57:53,737 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:57:53,737 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1819378229] [2019-12-07 11:57:53,737 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:57:53,737 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:57:53,737 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:57:53,738 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:57:53,738 INFO L87 Difference]: Start difference. First operand 281786 states and 1147719 transitions. Second operand 5 states. [2019-12-07 11:57:55,983 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:57:55,984 INFO L93 Difference]: Finished difference Result 380791 states and 1524716 transitions. [2019-12-07 11:57:55,984 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 11:57:55,984 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 11:57:55,984 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:57:57,396 INFO L225 Difference]: With dead ends: 380791 [2019-12-07 11:57:57,396 INFO L226 Difference]: Without dead ends: 380609 [2019-12-07 11:57:57,396 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:58:03,685 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 380609 states. [2019-12-07 11:58:08,429 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 380609 to 292255. [2019-12-07 11:58:08,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 292255 states. [2019-12-07 11:58:09,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 292255 states to 292255 states and 1189343 transitions. [2019-12-07 11:58:09,238 INFO L78 Accepts]: Start accepts. Automaton has 292255 states and 1189343 transitions. Word has length 19 [2019-12-07 11:58:09,238 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:58:09,238 INFO L462 AbstractCegarLoop]: Abstraction has 292255 states and 1189343 transitions. [2019-12-07 11:58:09,238 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:58:09,238 INFO L276 IsEmpty]: Start isEmpty. Operand 292255 states and 1189343 transitions. [2019-12-07 11:58:09,260 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 11:58:09,260 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:58:09,260 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:58:09,260 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:58:09,260 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:58:09,261 INFO L82 PathProgramCache]: Analyzing trace with hash -1948660060, now seen corresponding path program 1 times [2019-12-07 11:58:09,261 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:58:09,261 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1702751691] [2019-12-07 11:58:09,261 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:58:09,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:58:09,304 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:58:09,304 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1702751691] [2019-12-07 11:58:09,304 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:58:09,304 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:58:09,304 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1335035810] [2019-12-07 11:58:09,305 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:58:09,305 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:58:09,305 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:58:09,305 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:58:09,305 INFO L87 Difference]: Start difference. First operand 292255 states and 1189343 transitions. Second operand 5 states. [2019-12-07 11:58:14,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:58:14,115 INFO L93 Difference]: Finished difference Result 529288 states and 2146665 transitions. [2019-12-07 11:58:14,116 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:58:14,116 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 20 [2019-12-07 11:58:14,116 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:58:15,089 INFO L225 Difference]: With dead ends: 529288 [2019-12-07 11:58:15,089 INFO L226 Difference]: Without dead ends: 286728 [2019-12-07 11:58:15,089 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:58:20,330 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 286728 states. [2019-12-07 11:58:24,055 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 286728 to 273684. [2019-12-07 11:58:24,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 273684 states. [2019-12-07 11:58:24,819 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 273684 states to 273684 states and 1104723 transitions. [2019-12-07 11:58:24,819 INFO L78 Accepts]: Start accepts. Automaton has 273684 states and 1104723 transitions. Word has length 20 [2019-12-07 11:58:24,819 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:58:24,819 INFO L462 AbstractCegarLoop]: Abstraction has 273684 states and 1104723 transitions. [2019-12-07 11:58:24,819 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:58:24,819 INFO L276 IsEmpty]: Start isEmpty. Operand 273684 states and 1104723 transitions. [2019-12-07 11:58:24,837 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 11:58:24,837 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:58:24,837 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:58:24,837 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:58:24,837 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:58:24,837 INFO L82 PathProgramCache]: Analyzing trace with hash -1503194098, now seen corresponding path program 2 times [2019-12-07 11:58:24,837 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:58:24,837 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [890585542] [2019-12-07 11:58:24,838 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:58:24,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:58:24,860 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:58:24,860 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [890585542] [2019-12-07 11:58:24,860 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:58:24,860 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:58:24,860 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [3500550] [2019-12-07 11:58:24,861 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:58:24,861 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:58:24,861 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:58:24,861 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:58:24,861 INFO L87 Difference]: Start difference. First operand 273684 states and 1104723 transitions. Second operand 3 states. [2019-12-07 11:58:25,028 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:58:25,028 INFO L93 Difference]: Finished difference Result 55820 states and 177630 transitions. [2019-12-07 11:58:25,028 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:58:25,028 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2019-12-07 11:58:25,029 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:58:25,112 INFO L225 Difference]: With dead ends: 55820 [2019-12-07 11:58:25,112 INFO L226 Difference]: Without dead ends: 55820 [2019-12-07 11:58:25,113 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:58:25,317 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55820 states. [2019-12-07 11:58:26,193 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55820 to 55820. [2019-12-07 11:58:26,193 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55820 states. [2019-12-07 11:58:26,294 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55820 states to 55820 states and 177630 transitions. [2019-12-07 11:58:26,294 INFO L78 Accepts]: Start accepts. Automaton has 55820 states and 177630 transitions. Word has length 20 [2019-12-07 11:58:26,294 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:58:26,294 INFO L462 AbstractCegarLoop]: Abstraction has 55820 states and 177630 transitions. [2019-12-07 11:58:26,295 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:58:26,295 INFO L276 IsEmpty]: Start isEmpty. Operand 55820 states and 177630 transitions. [2019-12-07 11:58:26,299 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 11:58:26,299 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:58:26,299 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:58:26,300 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:58:26,300 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:58:26,300 INFO L82 PathProgramCache]: Analyzing trace with hash -1783143627, now seen corresponding path program 1 times [2019-12-07 11:58:26,300 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:58:26,300 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [74898643] [2019-12-07 11:58:26,300 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:58:26,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:58:26,343 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:58:26,344 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [74898643] [2019-12-07 11:58:26,344 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:58:26,344 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:58:26,344 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [476107914] [2019-12-07 11:58:26,344 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:58:26,344 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:58:26,344 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:58:26,344 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:58:26,345 INFO L87 Difference]: Start difference. First operand 55820 states and 177630 transitions. Second operand 6 states. [2019-12-07 11:58:26,960 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:58:26,961 INFO L93 Difference]: Finished difference Result 84530 states and 261877 transitions. [2019-12-07 11:58:26,961 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 11:58:26,961 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-12-07 11:58:26,961 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:58:27,082 INFO L225 Difference]: With dead ends: 84530 [2019-12-07 11:58:27,082 INFO L226 Difference]: Without dead ends: 84474 [2019-12-07 11:58:27,082 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 11:58:27,346 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84474 states. [2019-12-07 11:58:28,530 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84474 to 64411. [2019-12-07 11:58:28,530 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64411 states. [2019-12-07 11:58:28,637 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64411 states to 64411 states and 203034 transitions. [2019-12-07 11:58:28,637 INFO L78 Accepts]: Start accepts. Automaton has 64411 states and 203034 transitions. Word has length 22 [2019-12-07 11:58:28,637 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:58:28,637 INFO L462 AbstractCegarLoop]: Abstraction has 64411 states and 203034 transitions. [2019-12-07 11:58:28,637 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:58:28,637 INFO L276 IsEmpty]: Start isEmpty. Operand 64411 states and 203034 transitions. [2019-12-07 11:58:28,648 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 11:58:28,649 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:58:28,649 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:58:28,649 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:58:28,649 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:58:28,649 INFO L82 PathProgramCache]: Analyzing trace with hash -1026533913, now seen corresponding path program 1 times [2019-12-07 11:58:28,649 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:58:28,649 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [478574377] [2019-12-07 11:58:28,649 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:58:28,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:58:28,686 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:58:28,686 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [478574377] [2019-12-07 11:58:28,686 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:58:28,686 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:58:28,686 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2111306791] [2019-12-07 11:58:28,686 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:58:28,687 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:58:28,687 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:58:28,687 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:58:28,687 INFO L87 Difference]: Start difference. First operand 64411 states and 203034 transitions. Second operand 6 states. [2019-12-07 11:58:29,209 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:58:29,209 INFO L93 Difference]: Finished difference Result 83769 states and 257907 transitions. [2019-12-07 11:58:29,209 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 11:58:29,209 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 11:58:29,210 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:58:29,314 INFO L225 Difference]: With dead ends: 83769 [2019-12-07 11:58:29,314 INFO L226 Difference]: Without dead ends: 83448 [2019-12-07 11:58:29,315 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 11:58:29,578 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83448 states. [2019-12-07 11:58:30,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83448 to 67614. [2019-12-07 11:58:30,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 67614 states. [2019-12-07 11:58:30,454 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67614 states to 67614 states and 212108 transitions. [2019-12-07 11:58:30,454 INFO L78 Accepts]: Start accepts. Automaton has 67614 states and 212108 transitions. Word has length 27 [2019-12-07 11:58:30,454 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:58:30,454 INFO L462 AbstractCegarLoop]: Abstraction has 67614 states and 212108 transitions. [2019-12-07 11:58:30,454 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:58:30,454 INFO L276 IsEmpty]: Start isEmpty. Operand 67614 states and 212108 transitions. [2019-12-07 11:58:30,473 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 11:58:30,473 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:58:30,473 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:58:30,473 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:58:30,474 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:58:30,474 INFO L82 PathProgramCache]: Analyzing trace with hash 1181071409, now seen corresponding path program 1 times [2019-12-07 11:58:30,474 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:58:30,474 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2065658654] [2019-12-07 11:58:30,474 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:58:30,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:58:30,513 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:58:30,513 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2065658654] [2019-12-07 11:58:30,513 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:58:30,513 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:58:30,513 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1723925488] [2019-12-07 11:58:30,513 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:58:30,514 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:58:30,514 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:58:30,514 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:58:30,514 INFO L87 Difference]: Start difference. First operand 67614 states and 212108 transitions. Second operand 4 states. [2019-12-07 11:58:30,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:58:30,661 INFO L93 Difference]: Finished difference Result 25317 states and 75571 transitions. [2019-12-07 11:58:30,661 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 11:58:30,661 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 31 [2019-12-07 11:58:30,661 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:58:30,686 INFO L225 Difference]: With dead ends: 25317 [2019-12-07 11:58:30,686 INFO L226 Difference]: Without dead ends: 25310 [2019-12-07 11:58:30,687 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:58:30,758 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25310 states. [2019-12-07 11:58:30,953 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25310 to 23676. [2019-12-07 11:58:30,954 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23676 states. [2019-12-07 11:58:30,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23676 states to 23676 states and 70887 transitions. [2019-12-07 11:58:30,987 INFO L78 Accepts]: Start accepts. Automaton has 23676 states and 70887 transitions. Word has length 31 [2019-12-07 11:58:30,987 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:58:30,987 INFO L462 AbstractCegarLoop]: Abstraction has 23676 states and 70887 transitions. [2019-12-07 11:58:30,987 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:58:30,987 INFO L276 IsEmpty]: Start isEmpty. Operand 23676 states and 70887 transitions. [2019-12-07 11:58:31,009 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 11:58:31,009 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:58:31,009 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:58:31,009 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:58:31,010 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:58:31,010 INFO L82 PathProgramCache]: Analyzing trace with hash 1079552274, now seen corresponding path program 1 times [2019-12-07 11:58:31,010 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:58:31,010 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [497420884] [2019-12-07 11:58:31,010 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:58:31,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:58:31,060 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:58:31,061 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [497420884] [2019-12-07 11:58:31,061 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:58:31,061 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 11:58:31,061 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2078923529] [2019-12-07 11:58:31,061 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 11:58:31,061 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:58:31,062 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 11:58:31,062 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:58:31,062 INFO L87 Difference]: Start difference. First operand 23676 states and 70887 transitions. Second operand 7 states. [2019-12-07 11:58:31,711 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:58:31,711 INFO L93 Difference]: Finished difference Result 31760 states and 92180 transitions. [2019-12-07 11:58:31,711 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 11:58:31,711 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 11:58:31,711 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:58:31,743 INFO L225 Difference]: With dead ends: 31760 [2019-12-07 11:58:31,743 INFO L226 Difference]: Without dead ends: 31760 [2019-12-07 11:58:31,743 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 58 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2019-12-07 11:58:31,827 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31760 states. [2019-12-07 11:58:32,084 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31760 to 24224. [2019-12-07 11:58:32,084 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24224 states. [2019-12-07 11:58:32,117 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24224 states to 24224 states and 72357 transitions. [2019-12-07 11:58:32,118 INFO L78 Accepts]: Start accepts. Automaton has 24224 states and 72357 transitions. Word has length 33 [2019-12-07 11:58:32,118 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:58:32,118 INFO L462 AbstractCegarLoop]: Abstraction has 24224 states and 72357 transitions. [2019-12-07 11:58:32,118 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 11:58:32,118 INFO L276 IsEmpty]: Start isEmpty. Operand 24224 states and 72357 transitions. [2019-12-07 11:58:32,136 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 11:58:32,136 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:58:32,137 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:58:32,137 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:58:32,137 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:58:32,137 INFO L82 PathProgramCache]: Analyzing trace with hash -1559668611, now seen corresponding path program 1 times [2019-12-07 11:58:32,137 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:58:32,137 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2106475881] [2019-12-07 11:58:32,137 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:58:32,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:58:32,171 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:58:32,171 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2106475881] [2019-12-07 11:58:32,171 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:58:32,171 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:58:32,171 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [483799799] [2019-12-07 11:58:32,171 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:58:32,171 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:58:32,171 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:58:32,172 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:58:32,172 INFO L87 Difference]: Start difference. First operand 24224 states and 72357 transitions. Second operand 5 states. [2019-12-07 11:58:32,237 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:58:32,237 INFO L93 Difference]: Finished difference Result 22160 states and 67802 transitions. [2019-12-07 11:58:32,237 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:58:32,237 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 11:58:32,237 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:58:32,260 INFO L225 Difference]: With dead ends: 22160 [2019-12-07 11:58:32,260 INFO L226 Difference]: Without dead ends: 21129 [2019-12-07 11:58:32,260 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:58:32,326 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21129 states. [2019-12-07 11:58:32,465 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21129 to 12442. [2019-12-07 11:58:32,465 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12442 states. [2019-12-07 11:58:32,483 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12442 states to 12442 states and 38477 transitions. [2019-12-07 11:58:32,484 INFO L78 Accepts]: Start accepts. Automaton has 12442 states and 38477 transitions. Word has length 41 [2019-12-07 11:58:32,484 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:58:32,484 INFO L462 AbstractCegarLoop]: Abstraction has 12442 states and 38477 transitions. [2019-12-07 11:58:32,484 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:58:32,484 INFO L276 IsEmpty]: Start isEmpty. Operand 12442 states and 38477 transitions. [2019-12-07 11:58:32,495 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 11:58:32,495 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:58:32,495 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:58:32,495 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:58:32,495 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:58:32,495 INFO L82 PathProgramCache]: Analyzing trace with hash -244099463, now seen corresponding path program 1 times [2019-12-07 11:58:32,495 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:58:32,495 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [775258721] [2019-12-07 11:58:32,495 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:58:32,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:58:32,520 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:58:32,520 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [775258721] [2019-12-07 11:58:32,521 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:58:32,521 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:58:32,521 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [373752186] [2019-12-07 11:58:32,521 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:58:32,521 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:58:32,521 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:58:32,521 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:58:32,521 INFO L87 Difference]: Start difference. First operand 12442 states and 38477 transitions. Second operand 3 states. [2019-12-07 11:58:32,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:58:32,584 INFO L93 Difference]: Finished difference Result 17689 states and 55100 transitions. [2019-12-07 11:58:32,584 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:58:32,584 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 11:58:32,585 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:58:32,604 INFO L225 Difference]: With dead ends: 17689 [2019-12-07 11:58:32,604 INFO L226 Difference]: Without dead ends: 17689 [2019-12-07 11:58:32,604 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:58:32,662 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17689 states. [2019-12-07 11:58:32,806 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17689 to 13952. [2019-12-07 11:58:32,806 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13952 states. [2019-12-07 11:58:32,830 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13952 states to 13952 states and 43890 transitions. [2019-12-07 11:58:32,830 INFO L78 Accepts]: Start accepts. Automaton has 13952 states and 43890 transitions. Word has length 65 [2019-12-07 11:58:32,830 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:58:32,830 INFO L462 AbstractCegarLoop]: Abstraction has 13952 states and 43890 transitions. [2019-12-07 11:58:32,830 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:58:32,830 INFO L276 IsEmpty]: Start isEmpty. Operand 13952 states and 43890 transitions. [2019-12-07 11:58:32,843 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 11:58:32,843 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:58:32,843 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:58:32,843 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:58:32,843 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:58:32,843 INFO L82 PathProgramCache]: Analyzing trace with hash 163828837, now seen corresponding path program 1 times [2019-12-07 11:58:32,843 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:58:32,843 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1011407504] [2019-12-07 11:58:32,844 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:58:32,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:58:32,889 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:58:32,889 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1011407504] [2019-12-07 11:58:32,889 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:58:32,889 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:58:32,889 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [275525639] [2019-12-07 11:58:32,890 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:58:32,890 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:58:32,890 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:58:32,890 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:58:32,890 INFO L87 Difference]: Start difference. First operand 13952 states and 43890 transitions. Second operand 3 states. [2019-12-07 11:58:32,960 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:58:32,960 INFO L93 Difference]: Finished difference Result 16780 states and 52533 transitions. [2019-12-07 11:58:32,961 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:58:32,961 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 11:58:32,961 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:58:32,979 INFO L225 Difference]: With dead ends: 16780 [2019-12-07 11:58:32,979 INFO L226 Difference]: Without dead ends: 16780 [2019-12-07 11:58:32,980 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:58:33,036 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16780 states. [2019-12-07 11:58:33,199 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16780 to 14336. [2019-12-07 11:58:33,199 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14336 states. [2019-12-07 11:58:33,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14336 states to 14336 states and 45202 transitions. [2019-12-07 11:58:33,223 INFO L78 Accepts]: Start accepts. Automaton has 14336 states and 45202 transitions. Word has length 65 [2019-12-07 11:58:33,223 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:58:33,223 INFO L462 AbstractCegarLoop]: Abstraction has 14336 states and 45202 transitions. [2019-12-07 11:58:33,223 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:58:33,223 INFO L276 IsEmpty]: Start isEmpty. Operand 14336 states and 45202 transitions. [2019-12-07 11:58:33,235 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:58:33,235 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:58:33,235 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:58:33,235 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:58:33,235 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:58:33,236 INFO L82 PathProgramCache]: Analyzing trace with hash 1663580586, now seen corresponding path program 1 times [2019-12-07 11:58:33,236 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:58:33,236 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [786966766] [2019-12-07 11:58:33,236 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:58:33,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:58:33,276 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:58:33,276 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [786966766] [2019-12-07 11:58:33,276 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:58:33,277 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:58:33,277 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [974391390] [2019-12-07 11:58:33,277 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:58:33,277 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:58:33,277 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:58:33,277 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:58:33,277 INFO L87 Difference]: Start difference. First operand 14336 states and 45202 transitions. Second operand 4 states. [2019-12-07 11:58:33,470 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:58:33,470 INFO L93 Difference]: Finished difference Result 24419 states and 77643 transitions. [2019-12-07 11:58:33,471 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:58:33,471 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-12-07 11:58:33,471 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:58:33,498 INFO L225 Difference]: With dead ends: 24419 [2019-12-07 11:58:33,498 INFO L226 Difference]: Without dead ends: 24419 [2019-12-07 11:58:33,498 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:58:33,568 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24419 states. [2019-12-07 11:58:33,768 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24419 to 15642. [2019-12-07 11:58:33,769 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15642 states. [2019-12-07 11:58:33,793 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15642 states to 15642 states and 49918 transitions. [2019-12-07 11:58:33,793 INFO L78 Accepts]: Start accepts. Automaton has 15642 states and 49918 transitions. Word has length 66 [2019-12-07 11:58:33,793 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:58:33,793 INFO L462 AbstractCegarLoop]: Abstraction has 15642 states and 49918 transitions. [2019-12-07 11:58:33,793 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:58:33,793 INFO L276 IsEmpty]: Start isEmpty. Operand 15642 states and 49918 transitions. [2019-12-07 11:58:33,806 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:58:33,806 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:58:33,806 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:58:33,807 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:58:33,807 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:58:33,807 INFO L82 PathProgramCache]: Analyzing trace with hash 1387060181, now seen corresponding path program 1 times [2019-12-07 11:58:33,807 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:58:33,807 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [882987008] [2019-12-07 11:58:33,807 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:58:33,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:58:33,843 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:58:33,844 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [882987008] [2019-12-07 11:58:33,844 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:58:33,844 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:58:33,844 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1811359466] [2019-12-07 11:58:33,844 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:58:33,844 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:58:33,844 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:58:33,844 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:58:33,844 INFO L87 Difference]: Start difference. First operand 15642 states and 49918 transitions. Second operand 4 states. [2019-12-07 11:58:33,920 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:58:33,921 INFO L93 Difference]: Finished difference Result 15642 states and 49762 transitions. [2019-12-07 11:58:33,921 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 11:58:33,921 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-12-07 11:58:33,921 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:58:33,938 INFO L225 Difference]: With dead ends: 15642 [2019-12-07 11:58:33,938 INFO L226 Difference]: Without dead ends: 15642 [2019-12-07 11:58:33,938 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:58:33,992 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15642 states. [2019-12-07 11:58:34,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15642 to 13149. [2019-12-07 11:58:34,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13149 states. [2019-12-07 11:58:34,137 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13149 states to 13149 states and 41321 transitions. [2019-12-07 11:58:34,137 INFO L78 Accepts]: Start accepts. Automaton has 13149 states and 41321 transitions. Word has length 66 [2019-12-07 11:58:34,137 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:58:34,137 INFO L462 AbstractCegarLoop]: Abstraction has 13149 states and 41321 transitions. [2019-12-07 11:58:34,137 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:58:34,137 INFO L276 IsEmpty]: Start isEmpty. Operand 13149 states and 41321 transitions. [2019-12-07 11:58:34,148 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:58:34,148 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:58:34,148 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:58:34,149 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:58:34,149 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:58:34,149 INFO L82 PathProgramCache]: Analyzing trace with hash 1092185255, now seen corresponding path program 1 times [2019-12-07 11:58:34,149 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:58:34,149 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1998638516] [2019-12-07 11:58:34,149 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:58:34,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:58:34,199 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:58:34,199 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1998638516] [2019-12-07 11:58:34,200 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:58:34,200 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 11:58:34,200 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [435352474] [2019-12-07 11:58:34,200 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 11:58:34,200 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:58:34,200 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 11:58:34,200 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:58:34,200 INFO L87 Difference]: Start difference. First operand 13149 states and 41321 transitions. Second operand 7 states. [2019-12-07 11:58:34,463 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:58:34,463 INFO L93 Difference]: Finished difference Result 38180 states and 118905 transitions. [2019-12-07 11:58:34,464 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 11:58:34,464 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 11:58:34,464 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:58:34,495 INFO L225 Difference]: With dead ends: 38180 [2019-12-07 11:58:34,495 INFO L226 Difference]: Without dead ends: 27176 [2019-12-07 11:58:34,495 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=46, Invalid=136, Unknown=0, NotChecked=0, Total=182 [2019-12-07 11:58:34,572 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27176 states. [2019-12-07 11:58:34,759 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27176 to 15752. [2019-12-07 11:58:34,759 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15752 states. [2019-12-07 11:58:34,784 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15752 states to 15752 states and 49598 transitions. [2019-12-07 11:58:34,784 INFO L78 Accepts]: Start accepts. Automaton has 15752 states and 49598 transitions. Word has length 66 [2019-12-07 11:58:34,784 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:58:34,784 INFO L462 AbstractCegarLoop]: Abstraction has 15752 states and 49598 transitions. [2019-12-07 11:58:34,784 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 11:58:34,785 INFO L276 IsEmpty]: Start isEmpty. Operand 15752 states and 49598 transitions. [2019-12-07 11:58:34,798 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:58:34,798 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:58:34,798 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:58:34,798 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:58:34,798 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:58:34,798 INFO L82 PathProgramCache]: Analyzing trace with hash -340728579, now seen corresponding path program 2 times [2019-12-07 11:58:34,798 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:58:34,798 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1688737544] [2019-12-07 11:58:34,798 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:58:34,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:58:34,854 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:58:34,854 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1688737544] [2019-12-07 11:58:34,854 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:58:34,854 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 11:58:34,854 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [503839241] [2019-12-07 11:58:34,855 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 11:58:34,855 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:58:34,855 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 11:58:34,855 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:58:34,855 INFO L87 Difference]: Start difference. First operand 15752 states and 49598 transitions. Second operand 7 states. [2019-12-07 11:58:35,136 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:58:35,136 INFO L93 Difference]: Finished difference Result 43193 states and 135606 transitions. [2019-12-07 11:58:35,136 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-07 11:58:35,136 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 11:58:35,136 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:58:35,175 INFO L225 Difference]: With dead ends: 43193 [2019-12-07 11:58:35,175 INFO L226 Difference]: Without dead ends: 33735 [2019-12-07 11:58:35,176 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=53, Invalid=157, Unknown=0, NotChecked=0, Total=210 [2019-12-07 11:58:35,263 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33735 states. [2019-12-07 11:58:35,517 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33735 to 19063. [2019-12-07 11:58:35,518 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19063 states. [2019-12-07 11:58:35,546 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19063 states to 19063 states and 60571 transitions. [2019-12-07 11:58:35,546 INFO L78 Accepts]: Start accepts. Automaton has 19063 states and 60571 transitions. Word has length 66 [2019-12-07 11:58:35,546 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:58:35,546 INFO L462 AbstractCegarLoop]: Abstraction has 19063 states and 60571 transitions. [2019-12-07 11:58:35,546 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 11:58:35,546 INFO L276 IsEmpty]: Start isEmpty. Operand 19063 states and 60571 transitions. [2019-12-07 11:58:35,562 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:58:35,562 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:58:35,562 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:58:35,562 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:58:35,562 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:58:35,562 INFO L82 PathProgramCache]: Analyzing trace with hash 1978178137, now seen corresponding path program 3 times [2019-12-07 11:58:35,562 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:58:35,562 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [286620091] [2019-12-07 11:58:35,563 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:58:35,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:58:35,593 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:58:35,594 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [286620091] [2019-12-07 11:58:35,594 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:58:35,594 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:58:35,594 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [25880354] [2019-12-07 11:58:35,594 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:58:35,595 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:58:35,595 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:58:35,595 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:58:35,595 INFO L87 Difference]: Start difference. First operand 19063 states and 60571 transitions. Second operand 3 states. [2019-12-07 11:58:35,642 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:58:35,642 INFO L93 Difference]: Finished difference Result 16282 states and 50420 transitions. [2019-12-07 11:58:35,643 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:58:35,643 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 11:58:35,643 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:58:35,660 INFO L225 Difference]: With dead ends: 16282 [2019-12-07 11:58:35,660 INFO L226 Difference]: Without dead ends: 16282 [2019-12-07 11:58:35,660 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:58:35,713 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16282 states. [2019-12-07 11:58:35,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16282 to 15554. [2019-12-07 11:58:35,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15554 states. [2019-12-07 11:58:35,866 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15554 states to 15554 states and 48045 transitions. [2019-12-07 11:58:35,866 INFO L78 Accepts]: Start accepts. Automaton has 15554 states and 48045 transitions. Word has length 66 [2019-12-07 11:58:35,866 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:58:35,866 INFO L462 AbstractCegarLoop]: Abstraction has 15554 states and 48045 transitions. [2019-12-07 11:58:35,866 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:58:35,866 INFO L276 IsEmpty]: Start isEmpty. Operand 15554 states and 48045 transitions. [2019-12-07 11:58:35,879 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 11:58:35,879 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:58:35,879 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:58:35,879 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:58:35,880 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:58:35,880 INFO L82 PathProgramCache]: Analyzing trace with hash -2007326845, now seen corresponding path program 1 times [2019-12-07 11:58:35,880 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:58:35,880 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1552560753] [2019-12-07 11:58:35,880 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:58:35,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:58:36,336 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:58:36,336 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1552560753] [2019-12-07 11:58:36,336 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:58:36,336 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 11:58:36,336 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [263561593] [2019-12-07 11:58:36,336 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 11:58:36,336 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:58:36,337 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 11:58:36,337 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=197, Unknown=0, NotChecked=0, Total=240 [2019-12-07 11:58:36,337 INFO L87 Difference]: Start difference. First operand 15554 states and 48045 transitions. Second operand 16 states. [2019-12-07 11:58:40,933 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:58:40,933 INFO L93 Difference]: Finished difference Result 27660 states and 85565 transitions. [2019-12-07 11:58:40,934 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2019-12-07 11:58:40,934 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 11:58:40,934 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:58:40,955 INFO L225 Difference]: With dead ends: 27660 [2019-12-07 11:58:40,955 INFO L226 Difference]: Without dead ends: 20775 [2019-12-07 11:58:40,956 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 414 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=356, Invalid=1624, Unknown=0, NotChecked=0, Total=1980 [2019-12-07 11:58:41,016 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20775 states. [2019-12-07 11:58:41,178 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20775 to 16522. [2019-12-07 11:58:41,179 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16522 states. [2019-12-07 11:58:41,204 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16522 states to 16522 states and 50775 transitions. [2019-12-07 11:58:41,204 INFO L78 Accepts]: Start accepts. Automaton has 16522 states and 50775 transitions. Word has length 67 [2019-12-07 11:58:41,204 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:58:41,205 INFO L462 AbstractCegarLoop]: Abstraction has 16522 states and 50775 transitions. [2019-12-07 11:58:41,205 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 11:58:41,205 INFO L276 IsEmpty]: Start isEmpty. Operand 16522 states and 50775 transitions. [2019-12-07 11:58:41,256 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 11:58:41,256 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:58:41,256 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:58:41,257 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:58:41,257 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:58:41,257 INFO L82 PathProgramCache]: Analyzing trace with hash -1816499453, now seen corresponding path program 2 times [2019-12-07 11:58:41,257 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:58:41,257 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1458625161] [2019-12-07 11:58:41,257 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:58:41,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:58:41,358 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:58:41,359 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1458625161] [2019-12-07 11:58:41,359 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:58:41,359 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 11:58:41,359 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [212049362] [2019-12-07 11:58:41,359 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 11:58:41,359 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:58:41,359 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 11:58:41,359 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 11:58:41,360 INFO L87 Difference]: Start difference. First operand 16522 states and 50775 transitions. Second operand 10 states. [2019-12-07 11:58:41,981 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:58:41,981 INFO L93 Difference]: Finished difference Result 34031 states and 104746 transitions. [2019-12-07 11:58:41,981 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2019-12-07 11:58:41,981 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 11:58:41,982 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:58:42,017 INFO L225 Difference]: With dead ends: 34031 [2019-12-07 11:58:42,017 INFO L226 Difference]: Without dead ends: 32116 [2019-12-07 11:58:42,018 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 154 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=152, Invalid=604, Unknown=0, NotChecked=0, Total=756 [2019-12-07 11:58:42,101 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32116 states. [2019-12-07 11:58:42,340 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32116 to 19391. [2019-12-07 11:58:42,341 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19391 states. [2019-12-07 11:58:42,370 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19391 states to 19391 states and 59849 transitions. [2019-12-07 11:58:42,370 INFO L78 Accepts]: Start accepts. Automaton has 19391 states and 59849 transitions. Word has length 67 [2019-12-07 11:58:42,371 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:58:42,371 INFO L462 AbstractCegarLoop]: Abstraction has 19391 states and 59849 transitions. [2019-12-07 11:58:42,371 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 11:58:42,371 INFO L276 IsEmpty]: Start isEmpty. Operand 19391 states and 59849 transitions. [2019-12-07 11:58:42,387 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 11:58:42,387 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:58:42,387 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:58:42,388 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:58:42,388 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:58:42,388 INFO L82 PathProgramCache]: Analyzing trace with hash 1315765029, now seen corresponding path program 3 times [2019-12-07 11:58:42,388 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:58:42,388 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1630406382] [2019-12-07 11:58:42,388 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:58:42,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:58:42,499 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:58:42,499 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1630406382] [2019-12-07 11:58:42,499 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:58:42,499 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 11:58:42,499 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [332534122] [2019-12-07 11:58:42,499 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 11:58:42,499 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:58:42,499 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 11:58:42,499 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 11:58:42,500 INFO L87 Difference]: Start difference. First operand 19391 states and 59849 transitions. Second operand 10 states. [2019-12-07 11:58:43,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:58:43,016 INFO L93 Difference]: Finished difference Result 32670 states and 100117 transitions. [2019-12-07 11:58:43,016 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 11:58:43,017 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 11:58:43,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:58:43,046 INFO L225 Difference]: With dead ends: 32670 [2019-12-07 11:58:43,046 INFO L226 Difference]: Without dead ends: 27395 [2019-12-07 11:58:43,047 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 72 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=100, Invalid=362, Unknown=0, NotChecked=0, Total=462 [2019-12-07 11:58:43,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27395 states. [2019-12-07 11:58:43,310 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27395 to 16051. [2019-12-07 11:58:43,310 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16051 states. [2019-12-07 11:58:43,334 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16051 states to 16051 states and 49256 transitions. [2019-12-07 11:58:43,334 INFO L78 Accepts]: Start accepts. Automaton has 16051 states and 49256 transitions. Word has length 67 [2019-12-07 11:58:43,334 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:58:43,334 INFO L462 AbstractCegarLoop]: Abstraction has 16051 states and 49256 transitions. [2019-12-07 11:58:43,335 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 11:58:43,335 INFO L276 IsEmpty]: Start isEmpty. Operand 16051 states and 49256 transitions. [2019-12-07 11:58:43,348 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 11:58:43,348 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:58:43,348 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:58:43,348 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:58:43,348 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:58:43,348 INFO L82 PathProgramCache]: Analyzing trace with hash 1885964539, now seen corresponding path program 4 times [2019-12-07 11:58:43,348 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:58:43,348 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1432161950] [2019-12-07 11:58:43,349 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:58:43,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:58:43,478 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:58:43,478 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1432161950] [2019-12-07 11:58:43,478 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:58:43,478 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 11:58:43,479 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [347284226] [2019-12-07 11:58:43,479 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 11:58:43,479 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:58:43,479 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 11:58:43,479 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 11:58:43,479 INFO L87 Difference]: Start difference. First operand 16051 states and 49256 transitions. Second operand 11 states. [2019-12-07 11:58:44,062 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:58:44,063 INFO L93 Difference]: Finished difference Result 29589 states and 90870 transitions. [2019-12-07 11:58:44,063 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 11:58:44,063 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 11:58:44,063 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:58:44,094 INFO L225 Difference]: With dead ends: 29589 [2019-12-07 11:58:44,094 INFO L226 Difference]: Without dead ends: 28570 [2019-12-07 11:58:44,095 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 111 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=123, Invalid=527, Unknown=0, NotChecked=0, Total=650 [2019-12-07 11:58:44,172 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28570 states. [2019-12-07 11:58:44,435 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28570 to 17743. [2019-12-07 11:58:44,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17743 states. [2019-12-07 11:58:44,459 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17743 states to 17743 states and 54728 transitions. [2019-12-07 11:58:44,460 INFO L78 Accepts]: Start accepts. Automaton has 17743 states and 54728 transitions. Word has length 67 [2019-12-07 11:58:44,460 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:58:44,460 INFO L462 AbstractCegarLoop]: Abstraction has 17743 states and 54728 transitions. [2019-12-07 11:58:44,460 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 11:58:44,460 INFO L276 IsEmpty]: Start isEmpty. Operand 17743 states and 54728 transitions. [2019-12-07 11:58:44,473 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 11:58:44,473 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:58:44,473 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:58:44,473 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:58:44,473 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:58:44,473 INFO L82 PathProgramCache]: Analyzing trace with hash 723261725, now seen corresponding path program 5 times [2019-12-07 11:58:44,473 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:58:44,474 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1018432421] [2019-12-07 11:58:44,474 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:58:44,482 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:58:44,592 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:58:44,592 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1018432421] [2019-12-07 11:58:44,592 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:58:44,593 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 11:58:44,593 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1560504879] [2019-12-07 11:58:44,593 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 11:58:44,593 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 11:58:44,593 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 11:58:44,593 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 11:58:44,593 INFO L87 Difference]: Start difference. First operand 17743 states and 54728 transitions. Second operand 11 states. [2019-12-07 11:58:45,163 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:58:45,164 INFO L93 Difference]: Finished difference Result 29068 states and 88894 transitions. [2019-12-07 11:58:45,164 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 11:58:45,164 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 11:58:45,164 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:58:45,195 INFO L225 Difference]: With dead ends: 29068 [2019-12-07 11:58:45,195 INFO L226 Difference]: Without dead ends: 26232 [2019-12-07 11:58:45,195 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 86 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=114, Invalid=438, Unknown=0, NotChecked=0, Total=552 [2019-12-07 11:58:45,269 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26232 states. [2019-12-07 11:58:45,444 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26232 to 15218. [2019-12-07 11:58:45,444 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15218 states. [2019-12-07 11:58:45,468 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15218 states to 15218 states and 46681 transitions. [2019-12-07 11:58:45,468 INFO L78 Accepts]: Start accepts. Automaton has 15218 states and 46681 transitions. Word has length 67 [2019-12-07 11:58:45,468 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:58:45,468 INFO L462 AbstractCegarLoop]: Abstraction has 15218 states and 46681 transitions. [2019-12-07 11:58:45,468 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 11:58:45,468 INFO L276 IsEmpty]: Start isEmpty. Operand 15218 states and 46681 transitions. [2019-12-07 11:58:45,480 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 11:58:45,480 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:58:45,481 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:58:45,481 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:58:45,481 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:58:45,481 INFO L82 PathProgramCache]: Analyzing trace with hash -2101838907, now seen corresponding path program 6 times [2019-12-07 11:58:45,481 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 11:58:45,481 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [679070308] [2019-12-07 11:58:45,481 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:58:45,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 11:58:45,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 11:58:45,549 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 11:58:45,549 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 11:58:45,552 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [894] [894] ULTIMATE.startENTRY-->L820: Formula: (let ((.cse0 (store |v_#valid_71| 0 0))) (and (= v_~z$w_buff0_used~0_958 0) (= v_~y~0_23 0) (= v_~z$r_buff0_thd2~0_111 0) (= v_~x~0_76 0) (= |v_#NULL.offset_6| 0) (= v_~z~0_178 0) (= 0 v_~__unbuffered_p2_EAX~0_45) (= v_~z$w_buff1_used~0_531 0) (= v_~z$r_buff0_thd1~0_132 0) (= v_~z$r_buff1_thd1~0_108 0) (= v_~z$read_delayed_var~0.offset_7 0) (= v_~main$tmp_guard1~0_43 0) (= v_~z$w_buff0~0_487 0) (< 0 |v_#StackHeapBarrier_18|) (= 0 v_~z$flush_delayed~0_28) (= v_~z$r_buff1_thd2~0_104 0) (= v_~z$mem_tmp~0_17 0) (= v_~z$w_buff1~0_307 0) (= 0 v_~z$r_buff1_thd3~0_237) (= 0 |v_#NULL.base_6|) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t2287~0.base_26|)) (= |v_#valid_69| (store .cse0 |v_ULTIMATE.start_main_~#t2287~0.base_26| 1)) (= v_~z$r_buff0_thd0~0_141 0) (= v_~z$read_delayed_var~0.base_7 0) (= v_~z$read_delayed~0_7 0) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t2287~0.base_26|) (= 0 v_~weak$$choice0~0_16) (= 0 v_~__unbuffered_cnt~0_91) (= v_~weak$$choice2~0_111 0) (= 0 v_~z$r_buff0_thd3~0_332) (= v_~main$tmp_guard0~0_26 0) (= v_~__unbuffered_p2_EBX~0_57 0) (= |v_#memory_int_21| (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t2287~0.base_26| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t2287~0.base_26|) |v_ULTIMATE.start_main_~#t2287~0.offset_19| 0))) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t2287~0.base_26| 4)) (= 0 |v_ULTIMATE.start_main_~#t2287~0.offset_19|) (= v_~z$r_buff1_thd0~0_133 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_104, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_31|, ULTIMATE.start_main_~#t2289~0.offset=|v_ULTIMATE.start_main_~#t2289~0.offset_12|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_287|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_41|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_93|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_141, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_45, ULTIMATE.start_main_~#t2289~0.base=|v_ULTIMATE.start_main_~#t2289~0.base_16|, ~z$mem_tmp~0=v_~z$mem_tmp~0_17, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_57, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_531, ~z$flush_delayed~0=v_~z$flush_delayed~0_28, ULTIMATE.start_main_~#t2287~0.base=|v_ULTIMATE.start_main_~#t2287~0.base_26|, ULTIMATE.start_main_~#t2288~0.base=|v_ULTIMATE.start_main_~#t2288~0.base_23|, ~weak$$choice0~0=v_~weak$$choice0~0_16, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_108, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_332, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_91, ~x~0=v_~x~0_76, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_307, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_43, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_35|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_35|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_133, ~y~0=v_~y~0_23, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_111, ULTIMATE.start_main_~#t2288~0.offset=|v_ULTIMATE.start_main_~#t2288~0.offset_19|, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_23|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_958, ~z$w_buff0~0=v_~z$w_buff0~0_487, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_7|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_237, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_26, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_~#t2287~0.offset=|v_ULTIMATE.start_main_~#t2287~0.offset_19|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_24|, #valid=|v_#valid_69|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_178, ~weak$$choice2~0=v_~weak$$choice2~0_111, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_132} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, ~z$read_delayed~0, ULTIMATE.start_main_~#t2289~0.offset, #NULL.offset, ~z$w_buff1~0, ULTIMATE.start_main_#t~ite49, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, #length, ~__unbuffered_p2_EAX~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t2288~0.offset, ULTIMATE.start_main_~#t2289~0.base, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t2287~0.base, #NULL.base, ULTIMATE.start_main_~#t2287~0.offset, ULTIMATE.start_main_~#t2288~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#res, ~z$r_buff1_thd1~0, #valid, #memory_int, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 11:58:45,552 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L820-1-->L822: Formula: (and (not (= |v_ULTIMATE.start_main_~#t2288~0.base_9| 0)) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t2288~0.base_9| 4)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2288~0.base_9| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2288~0.base_9|) |v_ULTIMATE.start_main_~#t2288~0.offset_8| 1)) |v_#memory_int_11|) (= 0 (select |v_#valid_34| |v_ULTIMATE.start_main_~#t2288~0.base_9|)) (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t2288~0.base_9| 1)) (= 0 |v_ULTIMATE.start_main_~#t2288~0.offset_8|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t2288~0.base_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t2288~0.base=|v_ULTIMATE.start_main_~#t2288~0.base_9|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_3|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|, ULTIMATE.start_main_~#t2288~0.offset=|v_ULTIMATE.start_main_~#t2288~0.offset_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2288~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t2288~0.offset] because there is no mapped edge [2019-12-07 11:58:45,552 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] P0ENTRY-->L4-3: Formula: (and (= |P0Thread1of1ForFork0_#in~arg.offset_In1465230824| P0Thread1of1ForFork0_~arg.offset_Out1465230824) (= 1 ~z$w_buff0_used~0_Out1465230824) (= ~z$w_buff1~0_Out1465230824 ~z$w_buff0~0_In1465230824) (= P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out1465230824 |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out1465230824|) (= ~z$w_buff1_used~0_Out1465230824 ~z$w_buff0_used~0_In1465230824) (= P0Thread1of1ForFork0_~arg.base_Out1465230824 |P0Thread1of1ForFork0_#in~arg.base_In1465230824|) (= (ite (not (and (not (= (mod ~z$w_buff0_used~0_Out1465230824 256) 0)) (not (= 0 (mod ~z$w_buff1_used~0_Out1465230824 256))))) 1 0) |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out1465230824|) (not (= P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out1465230824 0)) (= 1 ~z$w_buff0~0_Out1465230824)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|P0Thread1of1ForFork0_#in~arg.offset_In1465230824|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1465230824, ~z$w_buff0~0=~z$w_buff0~0_In1465230824, P0Thread1of1ForFork0_#in~arg.base=|P0Thread1of1ForFork0_#in~arg.base_In1465230824|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|P0Thread1of1ForFork0_#in~arg.offset_In1465230824|, ~z$w_buff0_used~0=~z$w_buff0_used~0_Out1465230824, ~z$w_buff0~0=~z$w_buff0~0_Out1465230824, ~z$w_buff1_used~0=~z$w_buff1_used~0_Out1465230824, P0Thread1of1ForFork0___VERIFIER_assert_~expression=P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out1465230824, P0Thread1of1ForFork0_#in~arg.base=|P0Thread1of1ForFork0_#in~arg.base_In1465230824|, ~z$w_buff1~0=~z$w_buff1~0_Out1465230824, P0Thread1of1ForFork0_~arg.base=P0Thread1of1ForFork0_~arg.base_Out1465230824, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out1465230824|, P0Thread1of1ForFork0_~arg.offset=P0Thread1of1ForFork0_~arg.offset_Out1465230824} AuxVars[] AssignedVars[~z$w_buff0_used~0, ~z$w_buff0~0, ~z$w_buff1_used~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~z$w_buff1~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 11:58:45,553 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L822-1-->L824: Formula: (and (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t2289~0.base_11| 1)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2289~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2289~0.base_11|) |v_ULTIMATE.start_main_~#t2289~0.offset_9| 2)) |v_#memory_int_15|) (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t2289~0.base_11|)) (= 0 |v_ULTIMATE.start_main_~#t2289~0.offset_9|) (not (= 0 |v_ULTIMATE.start_main_~#t2289~0.base_11|)) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t2289~0.base_11| 4) |v_#length_17|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t2289~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t2289~0.offset=|v_ULTIMATE.start_main_~#t2289~0.offset_9|, #length=|v_#length_17|, ULTIMATE.start_main_~#t2289~0.base=|v_ULTIMATE.start_main_~#t2289~0.base_11|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t2289~0.offset, #length, ULTIMATE.start_main_~#t2289~0.base] because there is no mapped edge [2019-12-07 11:58:45,554 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] L764-2-->L764-5: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd2~0_In1792127570 256) 0)) (.cse2 (= (mod ~z$w_buff1_used~0_In1792127570 256) 0)) (.cse0 (= |P1Thread1of1ForFork1_#t~ite10_Out1792127570| |P1Thread1of1ForFork1_#t~ite9_Out1792127570|))) (or (and .cse0 (not .cse1) (not .cse2) (= ~z$w_buff1~0_In1792127570 |P1Thread1of1ForFork1_#t~ite9_Out1792127570|)) (and (or .cse1 .cse2) .cse0 (= ~z~0_In1792127570 |P1Thread1of1ForFork1_#t~ite9_Out1792127570|)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1792127570, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1792127570, ~z$w_buff1~0=~z$w_buff1~0_In1792127570, ~z~0=~z~0_In1792127570} OutVars{P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out1792127570|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1792127570, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1792127570, P1Thread1of1ForFork1_#t~ite10=|P1Thread1of1ForFork1_#t~ite10_Out1792127570|, ~z$w_buff1~0=~z$w_buff1~0_In1792127570, ~z~0=~z~0_In1792127570} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10] because there is no mapped edge [2019-12-07 11:58:45,555 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L765-->L765-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1996696623 256))) (.cse1 (= (mod ~z$r_buff0_thd2~0_In-1996696623 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite11_Out-1996696623| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite11_Out-1996696623| ~z$w_buff0_used~0_In-1996696623)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1996696623, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1996696623} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1996696623, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-1996696623|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1996696623} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 11:58:45,556 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L766-->L766-2: Formula: (let ((.cse3 (= (mod ~z$r_buff1_thd2~0_In-1418249159 256) 0)) (.cse2 (= (mod ~z$w_buff1_used~0_In-1418249159 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd2~0_In-1418249159 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1418249159 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork1_#t~ite12_Out-1418249159| ~z$w_buff1_used~0_In-1418249159)) (and (= |P1Thread1of1ForFork1_#t~ite12_Out-1418249159| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1418249159, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1418249159, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1418249159, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1418249159} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1418249159, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1418249159, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1418249159, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-1418249159|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1418249159} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 11:58:45,557 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L767-->L767-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In769679876 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In769679876 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite13_Out769679876| ~z$r_buff0_thd2~0_In769679876) (or .cse0 .cse1)) (and (= 0 |P1Thread1of1ForFork1_#t~ite13_Out769679876|) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In769679876, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In769679876} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In769679876, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out769679876|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In769679876} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 11:58:45,557 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L787-->L787-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In516774371 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite24_Out516774371| |P2Thread1of1ForFork2_#t~ite23_Out516774371|) (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In516774371 256) 0))) (or (and (= (mod ~z$w_buff1_used~0_In516774371 256) 0) .cse0) (= 0 (mod ~z$w_buff0_used~0_In516774371 256)) (and (= 0 (mod ~z$r_buff1_thd3~0_In516774371 256)) .cse0))) (= |P2Thread1of1ForFork2_#t~ite23_Out516774371| ~z$w_buff1~0_In516774371) .cse1) (and (= |P2Thread1of1ForFork2_#t~ite23_In516774371| |P2Thread1of1ForFork2_#t~ite23_Out516774371|) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite24_Out516774371| ~z$w_buff1~0_In516774371)))) InVars {P2Thread1of1ForFork2_#t~ite23=|P2Thread1of1ForFork2_#t~ite23_In516774371|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In516774371, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In516774371, ~z$w_buff1_used~0=~z$w_buff1_used~0_In516774371, ~z$w_buff1~0=~z$w_buff1~0_In516774371, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In516774371, ~weak$$choice2~0=~weak$$choice2~0_In516774371} OutVars{P2Thread1of1ForFork2_#t~ite23=|P2Thread1of1ForFork2_#t~ite23_Out516774371|, P2Thread1of1ForFork2_#t~ite24=|P2Thread1of1ForFork2_#t~ite24_Out516774371|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In516774371, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In516774371, ~z$w_buff1_used~0=~z$w_buff1_used~0_In516774371, ~z$w_buff1~0=~z$w_buff1~0_In516774371, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In516774371, ~weak$$choice2~0=~weak$$choice2~0_In516774371} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite23, P2Thread1of1ForFork2_#t~ite24] because there is no mapped edge [2019-12-07 11:58:45,557 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L788-->L788-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In1733955725 256) 0))) (or (and (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In1733955725 256) 0))) (or (and (= 0 (mod ~z$w_buff1_used~0_In1733955725 256)) .cse0) (and (= 0 (mod ~z$r_buff1_thd3~0_In1733955725 256)) .cse0) (= (mod ~z$w_buff0_used~0_In1733955725 256) 0))) (= |P2Thread1of1ForFork2_#t~ite26_Out1733955725| ~z$w_buff0_used~0_In1733955725) .cse1 (= |P2Thread1of1ForFork2_#t~ite26_Out1733955725| |P2Thread1of1ForFork2_#t~ite27_Out1733955725|)) (and (= |P2Thread1of1ForFork2_#t~ite27_Out1733955725| ~z$w_buff0_used~0_In1733955725) (= |P2Thread1of1ForFork2_#t~ite26_In1733955725| |P2Thread1of1ForFork2_#t~ite26_Out1733955725|) (not .cse1)))) InVars {P2Thread1of1ForFork2_#t~ite26=|P2Thread1of1ForFork2_#t~ite26_In1733955725|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1733955725, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1733955725, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1733955725, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1733955725, ~weak$$choice2~0=~weak$$choice2~0_In1733955725} OutVars{P2Thread1of1ForFork2_#t~ite26=|P2Thread1of1ForFork2_#t~ite26_Out1733955725|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1733955725, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1733955725, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1733955725, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1733955725, ~weak$$choice2~0=~weak$$choice2~0_In1733955725, P2Thread1of1ForFork2_#t~ite27=|P2Thread1of1ForFork2_#t~ite27_Out1733955725|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite26, P2Thread1of1ForFork2_#t~ite27] because there is no mapped edge [2019-12-07 11:58:45,558 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L768-->L768-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In1044338518 256))) (.cse1 (= (mod ~z$r_buff1_thd2~0_In1044338518 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In1044338518 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd2~0_In1044338518 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite14_Out1044338518| 0)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite14_Out1044338518| ~z$r_buff1_thd2~0_In1044338518) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1044338518, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1044338518, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1044338518, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1044338518} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1044338518, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1044338518, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1044338518, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out1044338518|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1044338518} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 11:58:45,558 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L768-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite14_26| v_~z$r_buff1_thd2~0_55) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_26|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_55, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_25|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 11:58:45,558 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L789-->L789-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-2044275252 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite29_In-2044275252| |P2Thread1of1ForFork2_#t~ite29_Out-2044275252|) (= |P2Thread1of1ForFork2_#t~ite30_Out-2044275252| ~z$w_buff1_used~0_In-2044275252)) (and (= |P2Thread1of1ForFork2_#t~ite29_Out-2044275252| |P2Thread1of1ForFork2_#t~ite30_Out-2044275252|) .cse0 (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-2044275252 256)))) (or (and .cse1 (= 0 (mod ~z$r_buff1_thd3~0_In-2044275252 256))) (= 0 (mod ~z$w_buff0_used~0_In-2044275252 256)) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In-2044275252 256))))) (= |P2Thread1of1ForFork2_#t~ite29_Out-2044275252| ~z$w_buff1_used~0_In-2044275252)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-2044275252, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2044275252, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2044275252, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2044275252, ~weak$$choice2~0=~weak$$choice2~0_In-2044275252, P2Thread1of1ForFork2_#t~ite29=|P2Thread1of1ForFork2_#t~ite29_In-2044275252|} OutVars{P2Thread1of1ForFork2_#t~ite30=|P2Thread1of1ForFork2_#t~ite30_Out-2044275252|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2044275252, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2044275252, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2044275252, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2044275252, ~weak$$choice2~0=~weak$$choice2~0_In-2044275252, P2Thread1of1ForFork2_#t~ite29=|P2Thread1of1ForFork2_#t~ite29_Out-2044275252|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite30, P2Thread1of1ForFork2_#t~ite29] because there is no mapped edge [2019-12-07 11:58:45,559 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L790-->L791: Formula: (and (= v_~z$r_buff0_thd3~0_68 v_~z$r_buff0_thd3~0_67) (not (= 0 (mod v_~weak$$choice2~0_15 256)))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_68, ~weak$$choice2~0=v_~weak$$choice2~0_15} OutVars{P2Thread1of1ForFork2_#t~ite31=|v_P2Thread1of1ForFork2_#t~ite31_6|, P2Thread1of1ForFork2_#t~ite33=|v_P2Thread1of1ForFork2_#t~ite33_7|, P2Thread1of1ForFork2_#t~ite32=|v_P2Thread1of1ForFork2_#t~ite32_7|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, ~weak$$choice2~0=v_~weak$$choice2~0_15} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite31, P2Thread1of1ForFork2_#t~ite33, P2Thread1of1ForFork2_#t~ite32, ~z$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 11:58:45,559 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L793-->L797: Formula: (and (= 0 v_~z$flush_delayed~0_6) (= v_~z~0_25 v_~z$mem_tmp~0_5) (not (= 0 (mod v_~z$flush_delayed~0_7 256)))) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_7} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_5, P2Thread1of1ForFork2_#t~ite37=|v_P2Thread1of1ForFork2_#t~ite37_5|, ~z$flush_delayed~0=v_~z$flush_delayed~0_6, ~z~0=v_~z~0_25} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 11:58:45,560 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L745-->L745-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd1~0_In1059955501 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In1059955501 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite5_Out1059955501| ~z$w_buff0_used~0_In1059955501) (or .cse0 .cse1)) (and (= |P0Thread1of1ForFork0_#t~ite5_Out1059955501| 0) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1059955501, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1059955501} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out1059955501|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1059955501, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1059955501} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 11:58:45,560 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L746-->L746-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff1_used~0_In1888655857 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd1~0_In1888655857 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In1888655857 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd1~0_In1888655857 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite6_Out1888655857| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~z$w_buff1_used~0_In1888655857 |P0Thread1of1ForFork0_#t~ite6_Out1888655857|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1888655857, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1888655857, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1888655857, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1888655857} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out1888655857|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1888655857, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1888655857, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1888655857, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1888655857} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 11:58:45,561 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L747-->L748: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In2008346526 256))) (.cse2 (= (mod ~z$r_buff0_thd1~0_In2008346526 256) 0)) (.cse1 (= ~z$r_buff0_thd1~0_Out2008346526 ~z$r_buff0_thd1~0_In2008346526))) (or (and .cse0 .cse1) (and (not .cse2) (= ~z$r_buff0_thd1~0_Out2008346526 0) (not .cse0)) (and .cse2 .cse1))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2008346526, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In2008346526} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2008346526, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out2008346526|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out2008346526} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 11:58:45,561 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L748-->L748-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd1~0_In-1390542359 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1390542359 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-1390542359 256))) (.cse2 (= (mod ~z$r_buff1_thd1~0_In-1390542359 256) 0))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork0_#t~ite8_Out-1390542359| ~z$r_buff1_thd1~0_In-1390542359) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= |P0Thread1of1ForFork0_#t~ite8_Out-1390542359| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1390542359, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1390542359, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1390542359, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1390542359} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1390542359, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-1390542359|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1390542359, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1390542359, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1390542359} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 11:58:45,561 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [861] [861] L748-2-->P0EXIT: Formula: (and (= v_~z$r_buff1_thd1~0_68 |v_P0Thread1of1ForFork0_#t~ite8_42|) (= v_~__unbuffered_cnt~0_73 (+ v_~__unbuffered_cnt~0_74 1)) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_74} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_41|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_68, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_73} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, ~z$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 11:58:45,561 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L797-2-->L797-5: Formula: (let ((.cse1 (= |P2Thread1of1ForFork2_#t~ite38_Out1001360762| |P2Thread1of1ForFork2_#t~ite39_Out1001360762|)) (.cse0 (= (mod ~z$r_buff1_thd3~0_In1001360762 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In1001360762 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite38_Out1001360762| ~z$w_buff1~0_In1001360762) .cse1 (not .cse2)) (and (= |P2Thread1of1ForFork2_#t~ite38_Out1001360762| ~z~0_In1001360762) .cse1 (or .cse0 .cse2)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1001360762, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1001360762, ~z$w_buff1~0=~z$w_buff1~0_In1001360762, ~z~0=~z~0_In1001360762} OutVars{~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1001360762, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1001360762, ~z$w_buff1~0=~z$w_buff1~0_In1001360762, ~z~0=~z~0_In1001360762, P2Thread1of1ForFork2_#t~ite39=|P2Thread1of1ForFork2_#t~ite39_Out1001360762|, P2Thread1of1ForFork2_#t~ite38=|P2Thread1of1ForFork2_#t~ite38_Out1001360762|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite39, P2Thread1of1ForFork2_#t~ite38] because there is no mapped edge [2019-12-07 11:58:45,561 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L798-->L798-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1959059075 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In1959059075 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite40_Out1959059075| ~z$w_buff0_used~0_In1959059075) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |P2Thread1of1ForFork2_#t~ite40_Out1959059075| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1959059075, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1959059075} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1959059075, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1959059075, P2Thread1of1ForFork2_#t~ite40=|P2Thread1of1ForFork2_#t~ite40_Out1959059075|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite40] because there is no mapped edge [2019-12-07 11:58:45,562 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L799-->L799-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In1691391600 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In1691391600 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In1691391600 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd3~0_In1691391600 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In1691391600 |P2Thread1of1ForFork2_#t~ite41_Out1691391600|) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork2_#t~ite41_Out1691391600|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1691391600, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1691391600, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1691391600, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1691391600} OutVars{P2Thread1of1ForFork2_#t~ite41=|P2Thread1of1ForFork2_#t~ite41_Out1691391600|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1691391600, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1691391600, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1691391600, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1691391600} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite41] because there is no mapped edge [2019-12-07 11:58:45,562 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [815] [815] L800-->L800-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-1155486668 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd3~0_In-1155486668 256) 0))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite42_Out-1155486668|) (not .cse1)) (and (= |P2Thread1of1ForFork2_#t~ite42_Out-1155486668| ~z$r_buff0_thd3~0_In-1155486668) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1155486668, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1155486668} OutVars{P2Thread1of1ForFork2_#t~ite42=|P2Thread1of1ForFork2_#t~ite42_Out-1155486668|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1155486668, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1155486668} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite42] because there is no mapped edge [2019-12-07 11:58:45,563 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L801-->L801-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In586914970 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In586914970 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In586914970 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd3~0_In586914970 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork2_#t~ite43_Out586914970|)) (and (= ~z$r_buff1_thd3~0_In586914970 |P2Thread1of1ForFork2_#t~ite43_Out586914970|) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In586914970, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In586914970, ~z$w_buff1_used~0=~z$w_buff1_used~0_In586914970, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In586914970} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In586914970, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In586914970, P2Thread1of1ForFork2_#t~ite43=|P2Thread1of1ForFork2_#t~ite43_Out586914970|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In586914970, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In586914970} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite43] because there is no mapped edge [2019-12-07 11:58:45,563 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L801-2-->P2EXIT: Formula: (and (= v_~z$r_buff1_thd3~0_136 |v_P2Thread1of1ForFork2_#t~ite43_28|) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55)) InVars {P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_136, P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_27|, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#t~ite43, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 11:58:45,563 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L824-1-->L830: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_13) 1 0)) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 11:58:45,563 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L830-2-->L830-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite47_Out-897340555| |ULTIMATE.start_main_#t~ite48_Out-897340555|)) (.cse1 (= (mod ~z$w_buff1_used~0_In-897340555 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In-897340555 256)))) (or (and .cse0 (or .cse1 .cse2) (= ~z~0_In-897340555 |ULTIMATE.start_main_#t~ite47_Out-897340555|)) (and (= ~z$w_buff1~0_In-897340555 |ULTIMATE.start_main_#t~ite47_Out-897340555|) .cse0 (not .cse1) (not .cse2)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-897340555, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-897340555, ~z$w_buff1~0=~z$w_buff1~0_In-897340555, ~z~0=~z~0_In-897340555} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-897340555, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-897340555|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-897340555, ~z$w_buff1~0=~z$w_buff1~0_In-897340555, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-897340555|, ~z~0=~z~0_In-897340555} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 11:58:45,564 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L831-->L831-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In1331607331 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In1331607331 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite49_Out1331607331| ~z$w_buff0_used~0_In1331607331)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite49_Out1331607331| 0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1331607331, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1331607331} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1331607331, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1331607331, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out1331607331|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 11:58:45,564 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L832-->L832-2: Formula: (let ((.cse3 (= (mod ~z$w_buff1_used~0_In1848184045 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd0~0_In1848184045 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In1848184045 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd0~0_In1848184045 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite50_Out1848184045|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= ~z$w_buff1_used~0_In1848184045 |ULTIMATE.start_main_#t~ite50_Out1848184045|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1848184045, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1848184045, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1848184045, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1848184045} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1848184045|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1848184045, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1848184045, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1848184045, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1848184045} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 11:58:45,564 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L833-->L833-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In2036225937 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd0~0_In2036225937 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In2036225937 |ULTIMATE.start_main_#t~ite51_Out2036225937|)) (and (= 0 |ULTIMATE.start_main_#t~ite51_Out2036225937|) (not .cse1) (not .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2036225937, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2036225937} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2036225937, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out2036225937|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2036225937} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 11:58:45,565 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L834-->L834-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In-512980096 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-512980096 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In-512980096 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In-512980096 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite52_Out-512980096|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$r_buff1_thd0~0_In-512980096 |ULTIMATE.start_main_#t~ite52_Out-512980096|) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-512980096, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-512980096, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-512980096, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-512980096} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-512980096|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-512980096, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-512980096, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-512980096, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-512980096} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 11:58:45,565 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L834-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_10| (mod v_~main$tmp_guard1~0_23 256)) (= |v_ULTIMATE.start_main_#t~ite52_54| v_~z$r_buff1_thd0~0_96) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_10|) (= v_~main$tmp_guard1~0_23 (ite (= 0 (ite (not (and (= v_~x~0_49 2) (= v_~__unbuffered_p2_EBX~0_30 0) (= 1 v_~__unbuffered_p2_EAX~0_25))) 1 0)) 0 1))) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_54|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_25, ~x~0=v_~x~0_49} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_53|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_15, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_96, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_25, ~x~0=v_~x~0_49, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 11:58:45,615 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 11:58:45 BasicIcfg [2019-12-07 11:58:45,615 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 11:58:45,615 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 11:58:45,615 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 11:58:45,615 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 11:58:45,616 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:55:55" (3/4) ... [2019-12-07 11:58:45,617 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 11:58:45,617 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [894] [894] ULTIMATE.startENTRY-->L820: Formula: (let ((.cse0 (store |v_#valid_71| 0 0))) (and (= v_~z$w_buff0_used~0_958 0) (= v_~y~0_23 0) (= v_~z$r_buff0_thd2~0_111 0) (= v_~x~0_76 0) (= |v_#NULL.offset_6| 0) (= v_~z~0_178 0) (= 0 v_~__unbuffered_p2_EAX~0_45) (= v_~z$w_buff1_used~0_531 0) (= v_~z$r_buff0_thd1~0_132 0) (= v_~z$r_buff1_thd1~0_108 0) (= v_~z$read_delayed_var~0.offset_7 0) (= v_~main$tmp_guard1~0_43 0) (= v_~z$w_buff0~0_487 0) (< 0 |v_#StackHeapBarrier_18|) (= 0 v_~z$flush_delayed~0_28) (= v_~z$r_buff1_thd2~0_104 0) (= v_~z$mem_tmp~0_17 0) (= v_~z$w_buff1~0_307 0) (= 0 v_~z$r_buff1_thd3~0_237) (= 0 |v_#NULL.base_6|) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t2287~0.base_26|)) (= |v_#valid_69| (store .cse0 |v_ULTIMATE.start_main_~#t2287~0.base_26| 1)) (= v_~z$r_buff0_thd0~0_141 0) (= v_~z$read_delayed_var~0.base_7 0) (= v_~z$read_delayed~0_7 0) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t2287~0.base_26|) (= 0 v_~weak$$choice0~0_16) (= 0 v_~__unbuffered_cnt~0_91) (= v_~weak$$choice2~0_111 0) (= 0 v_~z$r_buff0_thd3~0_332) (= v_~main$tmp_guard0~0_26 0) (= v_~__unbuffered_p2_EBX~0_57 0) (= |v_#memory_int_21| (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t2287~0.base_26| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t2287~0.base_26|) |v_ULTIMATE.start_main_~#t2287~0.offset_19| 0))) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t2287~0.base_26| 4)) (= 0 |v_ULTIMATE.start_main_~#t2287~0.offset_19|) (= v_~z$r_buff1_thd0~0_133 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_71|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_104, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_31|, ULTIMATE.start_main_~#t2289~0.offset=|v_ULTIMATE.start_main_~#t2289~0.offset_12|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_287|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_41|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_93|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_141, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_45, ULTIMATE.start_main_~#t2289~0.base=|v_ULTIMATE.start_main_~#t2289~0.base_16|, ~z$mem_tmp~0=v_~z$mem_tmp~0_17, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_57, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_531, ~z$flush_delayed~0=v_~z$flush_delayed~0_28, ULTIMATE.start_main_~#t2287~0.base=|v_ULTIMATE.start_main_~#t2287~0.base_26|, ULTIMATE.start_main_~#t2288~0.base=|v_ULTIMATE.start_main_~#t2288~0.base_23|, ~weak$$choice0~0=v_~weak$$choice0~0_16, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_108, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_332, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_91, ~x~0=v_~x~0_76, ~z$read_delayed~0=v_~z$read_delayed~0_7, ~z$w_buff1~0=v_~z$w_buff1~0_307, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_43, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_35|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_35|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_133, ~y~0=v_~y~0_23, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_111, ULTIMATE.start_main_~#t2288~0.offset=|v_ULTIMATE.start_main_~#t2288~0.offset_19|, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_23|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_958, ~z$w_buff0~0=v_~z$w_buff0~0_487, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_7|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_237, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_26, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_~#t2287~0.offset=|v_ULTIMATE.start_main_~#t2287~0.offset_19|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_24|, #valid=|v_#valid_69|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_178, ~weak$$choice2~0=v_~weak$$choice2~0_111, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_132} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, ~z$read_delayed~0, ULTIMATE.start_main_~#t2289~0.offset, #NULL.offset, ~z$w_buff1~0, ULTIMATE.start_main_#t~ite49, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, #length, ~__unbuffered_p2_EAX~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t2288~0.offset, ULTIMATE.start_main_~#t2289~0.base, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~main$tmp_guard0~0, ULTIMATE.start_main_~#t2287~0.base, #NULL.base, ULTIMATE.start_main_~#t2287~0.offset, ULTIMATE.start_main_~#t2288~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#res, ~z$r_buff1_thd1~0, #valid, #memory_int, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0, ~x~0] because there is no mapped edge [2019-12-07 11:58:45,618 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L820-1-->L822: Formula: (and (not (= |v_ULTIMATE.start_main_~#t2288~0.base_9| 0)) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t2288~0.base_9| 4)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2288~0.base_9| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2288~0.base_9|) |v_ULTIMATE.start_main_~#t2288~0.offset_8| 1)) |v_#memory_int_11|) (= 0 (select |v_#valid_34| |v_ULTIMATE.start_main_~#t2288~0.base_9|)) (= |v_#valid_33| (store |v_#valid_34| |v_ULTIMATE.start_main_~#t2288~0.base_9| 1)) (= 0 |v_ULTIMATE.start_main_~#t2288~0.offset_8|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t2288~0.base_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t2288~0.base=|v_ULTIMATE.start_main_~#t2288~0.base_9|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_3|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|, ULTIMATE.start_main_~#t2288~0.offset=|v_ULTIMATE.start_main_~#t2288~0.offset_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2288~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length, ULTIMATE.start_main_~#t2288~0.offset] because there is no mapped edge [2019-12-07 11:58:45,618 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] P0ENTRY-->L4-3: Formula: (and (= |P0Thread1of1ForFork0_#in~arg.offset_In1465230824| P0Thread1of1ForFork0_~arg.offset_Out1465230824) (= 1 ~z$w_buff0_used~0_Out1465230824) (= ~z$w_buff1~0_Out1465230824 ~z$w_buff0~0_In1465230824) (= P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out1465230824 |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out1465230824|) (= ~z$w_buff1_used~0_Out1465230824 ~z$w_buff0_used~0_In1465230824) (= P0Thread1of1ForFork0_~arg.base_Out1465230824 |P0Thread1of1ForFork0_#in~arg.base_In1465230824|) (= (ite (not (and (not (= (mod ~z$w_buff0_used~0_Out1465230824 256) 0)) (not (= 0 (mod ~z$w_buff1_used~0_Out1465230824 256))))) 1 0) |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out1465230824|) (not (= P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out1465230824 0)) (= 1 ~z$w_buff0~0_Out1465230824)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|P0Thread1of1ForFork0_#in~arg.offset_In1465230824|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1465230824, ~z$w_buff0~0=~z$w_buff0~0_In1465230824, P0Thread1of1ForFork0_#in~arg.base=|P0Thread1of1ForFork0_#in~arg.base_In1465230824|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|P0Thread1of1ForFork0_#in~arg.offset_In1465230824|, ~z$w_buff0_used~0=~z$w_buff0_used~0_Out1465230824, ~z$w_buff0~0=~z$w_buff0~0_Out1465230824, ~z$w_buff1_used~0=~z$w_buff1_used~0_Out1465230824, P0Thread1of1ForFork0___VERIFIER_assert_~expression=P0Thread1of1ForFork0___VERIFIER_assert_~expression_Out1465230824, P0Thread1of1ForFork0_#in~arg.base=|P0Thread1of1ForFork0_#in~arg.base_In1465230824|, ~z$w_buff1~0=~z$w_buff1~0_Out1465230824, P0Thread1of1ForFork0_~arg.base=P0Thread1of1ForFork0_~arg.base_Out1465230824, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_Out1465230824|, P0Thread1of1ForFork0_~arg.offset=P0Thread1of1ForFork0_~arg.offset_Out1465230824} AuxVars[] AssignedVars[~z$w_buff0_used~0, ~z$w_buff0~0, ~z$w_buff1_used~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~z$w_buff1~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 11:58:45,619 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L822-1-->L824: Formula: (and (= |v_#valid_40| (store |v_#valid_41| |v_ULTIMATE.start_main_~#t2289~0.base_11| 1)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2289~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2289~0.base_11|) |v_ULTIMATE.start_main_~#t2289~0.offset_9| 2)) |v_#memory_int_15|) (= 0 (select |v_#valid_41| |v_ULTIMATE.start_main_~#t2289~0.base_11|)) (= 0 |v_ULTIMATE.start_main_~#t2289~0.offset_9|) (not (= 0 |v_ULTIMATE.start_main_~#t2289~0.base_11|)) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t2289~0.base_11| 4) |v_#length_17|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t2289~0.base_11|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_41|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t2289~0.offset=|v_ULTIMATE.start_main_~#t2289~0.offset_9|, #length=|v_#length_17|, ULTIMATE.start_main_~#t2289~0.base=|v_ULTIMATE.start_main_~#t2289~0.base_11|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t2289~0.offset, #length, ULTIMATE.start_main_~#t2289~0.base] because there is no mapped edge [2019-12-07 11:58:45,620 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [817] [817] L764-2-->L764-5: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd2~0_In1792127570 256) 0)) (.cse2 (= (mod ~z$w_buff1_used~0_In1792127570 256) 0)) (.cse0 (= |P1Thread1of1ForFork1_#t~ite10_Out1792127570| |P1Thread1of1ForFork1_#t~ite9_Out1792127570|))) (or (and .cse0 (not .cse1) (not .cse2) (= ~z$w_buff1~0_In1792127570 |P1Thread1of1ForFork1_#t~ite9_Out1792127570|)) (and (or .cse1 .cse2) .cse0 (= ~z~0_In1792127570 |P1Thread1of1ForFork1_#t~ite9_Out1792127570|)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1792127570, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1792127570, ~z$w_buff1~0=~z$w_buff1~0_In1792127570, ~z~0=~z~0_In1792127570} OutVars{P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out1792127570|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1792127570, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1792127570, P1Thread1of1ForFork1_#t~ite10=|P1Thread1of1ForFork1_#t~ite10_Out1792127570|, ~z$w_buff1~0=~z$w_buff1~0_In1792127570, ~z~0=~z~0_In1792127570} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10] because there is no mapped edge [2019-12-07 11:58:45,620 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L765-->L765-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1996696623 256))) (.cse1 (= (mod ~z$r_buff0_thd2~0_In-1996696623 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite11_Out-1996696623| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite11_Out-1996696623| ~z$w_buff0_used~0_In-1996696623)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1996696623, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1996696623} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1996696623, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-1996696623|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1996696623} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 11:58:45,621 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L766-->L766-2: Formula: (let ((.cse3 (= (mod ~z$r_buff1_thd2~0_In-1418249159 256) 0)) (.cse2 (= (mod ~z$w_buff1_used~0_In-1418249159 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd2~0_In-1418249159 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1418249159 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P1Thread1of1ForFork1_#t~ite12_Out-1418249159| ~z$w_buff1_used~0_In-1418249159)) (and (= |P1Thread1of1ForFork1_#t~ite12_Out-1418249159| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1418249159, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1418249159, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1418249159, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1418249159} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1418249159, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1418249159, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1418249159, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-1418249159|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1418249159} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 11:58:45,622 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L767-->L767-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In769679876 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In769679876 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite13_Out769679876| ~z$r_buff0_thd2~0_In769679876) (or .cse0 .cse1)) (and (= 0 |P1Thread1of1ForFork1_#t~ite13_Out769679876|) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In769679876, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In769679876} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In769679876, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out769679876|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In769679876} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 11:58:45,622 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L787-->L787-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In516774371 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite24_Out516774371| |P2Thread1of1ForFork2_#t~ite23_Out516774371|) (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In516774371 256) 0))) (or (and (= (mod ~z$w_buff1_used~0_In516774371 256) 0) .cse0) (= 0 (mod ~z$w_buff0_used~0_In516774371 256)) (and (= 0 (mod ~z$r_buff1_thd3~0_In516774371 256)) .cse0))) (= |P2Thread1of1ForFork2_#t~ite23_Out516774371| ~z$w_buff1~0_In516774371) .cse1) (and (= |P2Thread1of1ForFork2_#t~ite23_In516774371| |P2Thread1of1ForFork2_#t~ite23_Out516774371|) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite24_Out516774371| ~z$w_buff1~0_In516774371)))) InVars {P2Thread1of1ForFork2_#t~ite23=|P2Thread1of1ForFork2_#t~ite23_In516774371|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In516774371, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In516774371, ~z$w_buff1_used~0=~z$w_buff1_used~0_In516774371, ~z$w_buff1~0=~z$w_buff1~0_In516774371, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In516774371, ~weak$$choice2~0=~weak$$choice2~0_In516774371} OutVars{P2Thread1of1ForFork2_#t~ite23=|P2Thread1of1ForFork2_#t~ite23_Out516774371|, P2Thread1of1ForFork2_#t~ite24=|P2Thread1of1ForFork2_#t~ite24_Out516774371|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In516774371, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In516774371, ~z$w_buff1_used~0=~z$w_buff1_used~0_In516774371, ~z$w_buff1~0=~z$w_buff1~0_In516774371, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In516774371, ~weak$$choice2~0=~weak$$choice2~0_In516774371} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite23, P2Thread1of1ForFork2_#t~ite24] because there is no mapped edge [2019-12-07 11:58:45,623 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L788-->L788-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In1733955725 256) 0))) (or (and (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In1733955725 256) 0))) (or (and (= 0 (mod ~z$w_buff1_used~0_In1733955725 256)) .cse0) (and (= 0 (mod ~z$r_buff1_thd3~0_In1733955725 256)) .cse0) (= (mod ~z$w_buff0_used~0_In1733955725 256) 0))) (= |P2Thread1of1ForFork2_#t~ite26_Out1733955725| ~z$w_buff0_used~0_In1733955725) .cse1 (= |P2Thread1of1ForFork2_#t~ite26_Out1733955725| |P2Thread1of1ForFork2_#t~ite27_Out1733955725|)) (and (= |P2Thread1of1ForFork2_#t~ite27_Out1733955725| ~z$w_buff0_used~0_In1733955725) (= |P2Thread1of1ForFork2_#t~ite26_In1733955725| |P2Thread1of1ForFork2_#t~ite26_Out1733955725|) (not .cse1)))) InVars {P2Thread1of1ForFork2_#t~ite26=|P2Thread1of1ForFork2_#t~ite26_In1733955725|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1733955725, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1733955725, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1733955725, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1733955725, ~weak$$choice2~0=~weak$$choice2~0_In1733955725} OutVars{P2Thread1of1ForFork2_#t~ite26=|P2Thread1of1ForFork2_#t~ite26_Out1733955725|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1733955725, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1733955725, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1733955725, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1733955725, ~weak$$choice2~0=~weak$$choice2~0_In1733955725, P2Thread1of1ForFork2_#t~ite27=|P2Thread1of1ForFork2_#t~ite27_Out1733955725|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite26, P2Thread1of1ForFork2_#t~ite27] because there is no mapped edge [2019-12-07 11:58:45,623 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L768-->L768-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In1044338518 256))) (.cse1 (= (mod ~z$r_buff1_thd2~0_In1044338518 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In1044338518 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd2~0_In1044338518 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite14_Out1044338518| 0)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite14_Out1044338518| ~z$r_buff1_thd2~0_In1044338518) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1044338518, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1044338518, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1044338518, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1044338518} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1044338518, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1044338518, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1044338518, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out1044338518|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1044338518} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 11:58:45,623 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [848] [848] L768-2-->P1EXIT: Formula: (and (= |v_P1Thread1of1ForFork1_#t~ite14_26| v_~z$r_buff1_thd2~0_55) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_26|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_55, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_25|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 11:58:45,623 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [876] [876] L789-->L789-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-2044275252 256) 0))) (or (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite29_In-2044275252| |P2Thread1of1ForFork2_#t~ite29_Out-2044275252|) (= |P2Thread1of1ForFork2_#t~ite30_Out-2044275252| ~z$w_buff1_used~0_In-2044275252)) (and (= |P2Thread1of1ForFork2_#t~ite29_Out-2044275252| |P2Thread1of1ForFork2_#t~ite30_Out-2044275252|) .cse0 (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-2044275252 256)))) (or (and .cse1 (= 0 (mod ~z$r_buff1_thd3~0_In-2044275252 256))) (= 0 (mod ~z$w_buff0_used~0_In-2044275252 256)) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In-2044275252 256))))) (= |P2Thread1of1ForFork2_#t~ite29_Out-2044275252| ~z$w_buff1_used~0_In-2044275252)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-2044275252, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2044275252, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2044275252, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2044275252, ~weak$$choice2~0=~weak$$choice2~0_In-2044275252, P2Thread1of1ForFork2_#t~ite29=|P2Thread1of1ForFork2_#t~ite29_In-2044275252|} OutVars{P2Thread1of1ForFork2_#t~ite30=|P2Thread1of1ForFork2_#t~ite30_Out-2044275252|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2044275252, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-2044275252, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2044275252, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-2044275252, ~weak$$choice2~0=~weak$$choice2~0_In-2044275252, P2Thread1of1ForFork2_#t~ite29=|P2Thread1of1ForFork2_#t~ite29_Out-2044275252|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite30, P2Thread1of1ForFork2_#t~ite29] because there is no mapped edge [2019-12-07 11:58:45,624 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L790-->L791: Formula: (and (= v_~z$r_buff0_thd3~0_68 v_~z$r_buff0_thd3~0_67) (not (= 0 (mod v_~weak$$choice2~0_15 256)))) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_68, ~weak$$choice2~0=v_~weak$$choice2~0_15} OutVars{P2Thread1of1ForFork2_#t~ite31=|v_P2Thread1of1ForFork2_#t~ite31_6|, P2Thread1of1ForFork2_#t~ite33=|v_P2Thread1of1ForFork2_#t~ite33_7|, P2Thread1of1ForFork2_#t~ite32=|v_P2Thread1of1ForFork2_#t~ite32_7|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_67, ~weak$$choice2~0=v_~weak$$choice2~0_15} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite31, P2Thread1of1ForFork2_#t~ite33, P2Thread1of1ForFork2_#t~ite32, ~z$r_buff0_thd3~0] because there is no mapped edge [2019-12-07 11:58:45,625 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L793-->L797: Formula: (and (= 0 v_~z$flush_delayed~0_6) (= v_~z~0_25 v_~z$mem_tmp~0_5) (not (= 0 (mod v_~z$flush_delayed~0_7 256)))) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_7} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_5, P2Thread1of1ForFork2_#t~ite37=|v_P2Thread1of1ForFork2_#t~ite37_5|, ~z$flush_delayed~0=v_~z$flush_delayed~0_6, ~z~0=v_~z~0_25} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 11:58:45,625 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L745-->L745-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd1~0_In1059955501 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In1059955501 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite5_Out1059955501| ~z$w_buff0_used~0_In1059955501) (or .cse0 .cse1)) (and (= |P0Thread1of1ForFork0_#t~ite5_Out1059955501| 0) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1059955501, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1059955501} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out1059955501|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1059955501, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1059955501} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 11:58:45,626 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L746-->L746-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff1_used~0_In1888655857 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd1~0_In1888655857 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In1888655857 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd1~0_In1888655857 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite6_Out1888655857| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~z$w_buff1_used~0_In1888655857 |P0Thread1of1ForFork0_#t~ite6_Out1888655857|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1888655857, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1888655857, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1888655857, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1888655857} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out1888655857|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1888655857, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1888655857, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1888655857, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1888655857} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 11:58:45,626 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L747-->L748: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In2008346526 256))) (.cse2 (= (mod ~z$r_buff0_thd1~0_In2008346526 256) 0)) (.cse1 (= ~z$r_buff0_thd1~0_Out2008346526 ~z$r_buff0_thd1~0_In2008346526))) (or (and .cse0 .cse1) (and (not .cse2) (= ~z$r_buff0_thd1~0_Out2008346526 0) (not .cse0)) (and .cse2 .cse1))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2008346526, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In2008346526} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2008346526, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out2008346526|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out2008346526} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 11:58:45,626 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L748-->L748-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd1~0_In-1390542359 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1390542359 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-1390542359 256))) (.cse2 (= (mod ~z$r_buff1_thd1~0_In-1390542359 256) 0))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork0_#t~ite8_Out-1390542359| ~z$r_buff1_thd1~0_In-1390542359) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= |P0Thread1of1ForFork0_#t~ite8_Out-1390542359| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1390542359, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1390542359, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1390542359, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1390542359} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1390542359, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-1390542359|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-1390542359, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1390542359, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1390542359} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 11:58:45,626 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [861] [861] L748-2-->P0EXIT: Formula: (and (= v_~z$r_buff1_thd1~0_68 |v_P0Thread1of1ForFork0_#t~ite8_42|) (= v_~__unbuffered_cnt~0_73 (+ v_~__unbuffered_cnt~0_74 1)) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_42|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_74} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_41|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_68, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_73} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, ~z$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 11:58:45,626 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L797-2-->L797-5: Formula: (let ((.cse1 (= |P2Thread1of1ForFork2_#t~ite38_Out1001360762| |P2Thread1of1ForFork2_#t~ite39_Out1001360762|)) (.cse0 (= (mod ~z$r_buff1_thd3~0_In1001360762 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In1001360762 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite38_Out1001360762| ~z$w_buff1~0_In1001360762) .cse1 (not .cse2)) (and (= |P2Thread1of1ForFork2_#t~ite38_Out1001360762| ~z~0_In1001360762) .cse1 (or .cse0 .cse2)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1001360762, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1001360762, ~z$w_buff1~0=~z$w_buff1~0_In1001360762, ~z~0=~z~0_In1001360762} OutVars{~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1001360762, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1001360762, ~z$w_buff1~0=~z$w_buff1~0_In1001360762, ~z~0=~z~0_In1001360762, P2Thread1of1ForFork2_#t~ite39=|P2Thread1of1ForFork2_#t~ite39_Out1001360762|, P2Thread1of1ForFork2_#t~ite38=|P2Thread1of1ForFork2_#t~ite38_Out1001360762|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite39, P2Thread1of1ForFork2_#t~ite38] because there is no mapped edge [2019-12-07 11:58:45,627 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L798-->L798-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In1959059075 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In1959059075 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite40_Out1959059075| ~z$w_buff0_used~0_In1959059075) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= |P2Thread1of1ForFork2_#t~ite40_Out1959059075| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1959059075, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1959059075} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1959059075, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1959059075, P2Thread1of1ForFork2_#t~ite40=|P2Thread1of1ForFork2_#t~ite40_Out1959059075|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite40] because there is no mapped edge [2019-12-07 11:58:45,627 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L799-->L799-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In1691391600 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In1691391600 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In1691391600 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd3~0_In1691391600 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In1691391600 |P2Thread1of1ForFork2_#t~ite41_Out1691391600|) (or .cse2 .cse3)) (and (= 0 |P2Thread1of1ForFork2_#t~ite41_Out1691391600|) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1691391600, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1691391600, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1691391600, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1691391600} OutVars{P2Thread1of1ForFork2_#t~ite41=|P2Thread1of1ForFork2_#t~ite41_Out1691391600|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1691391600, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1691391600, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1691391600, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1691391600} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite41] because there is no mapped edge [2019-12-07 11:58:45,627 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [815] [815] L800-->L800-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-1155486668 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd3~0_In-1155486668 256) 0))) (or (and (not .cse0) (= 0 |P2Thread1of1ForFork2_#t~ite42_Out-1155486668|) (not .cse1)) (and (= |P2Thread1of1ForFork2_#t~ite42_Out-1155486668| ~z$r_buff0_thd3~0_In-1155486668) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1155486668, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1155486668} OutVars{P2Thread1of1ForFork2_#t~ite42=|P2Thread1of1ForFork2_#t~ite42_Out-1155486668|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1155486668, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1155486668} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite42] because there is no mapped edge [2019-12-07 11:58:45,628 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L801-->L801-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In586914970 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In586914970 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In586914970 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd3~0_In586914970 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P2Thread1of1ForFork2_#t~ite43_Out586914970|)) (and (= ~z$r_buff1_thd3~0_In586914970 |P2Thread1of1ForFork2_#t~ite43_Out586914970|) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In586914970, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In586914970, ~z$w_buff1_used~0=~z$w_buff1_used~0_In586914970, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In586914970} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In586914970, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In586914970, P2Thread1of1ForFork2_#t~ite43=|P2Thread1of1ForFork2_#t~ite43_Out586914970|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In586914970, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In586914970} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite43] because there is no mapped edge [2019-12-07 11:58:45,628 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [859] [859] L801-2-->P2EXIT: Formula: (and (= v_~z$r_buff1_thd3~0_136 |v_P2Thread1of1ForFork2_#t~ite43_28|) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_56 1) v_~__unbuffered_cnt~0_55)) InVars {P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_28|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_56} OutVars{~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_136, P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_27|, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#t~ite43, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 11:58:45,628 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [781] [781] L824-1-->L830: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_13) 1 0)) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_5|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_13, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 11:58:45,628 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [825] [825] L830-2-->L830-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite47_Out-897340555| |ULTIMATE.start_main_#t~ite48_Out-897340555|)) (.cse1 (= (mod ~z$w_buff1_used~0_In-897340555 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In-897340555 256)))) (or (and .cse0 (or .cse1 .cse2) (= ~z~0_In-897340555 |ULTIMATE.start_main_#t~ite47_Out-897340555|)) (and (= ~z$w_buff1~0_In-897340555 |ULTIMATE.start_main_#t~ite47_Out-897340555|) .cse0 (not .cse1) (not .cse2)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-897340555, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-897340555, ~z$w_buff1~0=~z$w_buff1~0_In-897340555, ~z~0=~z~0_In-897340555} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-897340555, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-897340555|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-897340555, ~z$w_buff1~0=~z$w_buff1~0_In-897340555, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-897340555|, ~z~0=~z~0_In-897340555} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 11:58:45,629 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L831-->L831-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In1331607331 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In1331607331 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite49_Out1331607331| ~z$w_buff0_used~0_In1331607331)) (and (not .cse0) (= |ULTIMATE.start_main_#t~ite49_Out1331607331| 0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1331607331, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1331607331} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1331607331, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1331607331, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out1331607331|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 11:58:45,629 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L832-->L832-2: Formula: (let ((.cse3 (= (mod ~z$w_buff1_used~0_In1848184045 256) 0)) (.cse2 (= (mod ~z$r_buff1_thd0~0_In1848184045 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In1848184045 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd0~0_In1848184045 256) 0))) (or (and (= 0 |ULTIMATE.start_main_#t~ite50_Out1848184045|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= ~z$w_buff1_used~0_In1848184045 |ULTIMATE.start_main_#t~ite50_Out1848184045|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1848184045, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1848184045, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1848184045, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1848184045} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1848184045|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1848184045, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1848184045, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1848184045, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1848184045} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 11:58:45,629 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L833-->L833-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In2036225937 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd0~0_In2036225937 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In2036225937 |ULTIMATE.start_main_#t~ite51_Out2036225937|)) (and (= 0 |ULTIMATE.start_main_#t~ite51_Out2036225937|) (not .cse1) (not .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2036225937, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2036225937} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2036225937, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out2036225937|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2036225937} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 11:58:45,630 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L834-->L834-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd0~0_In-512980096 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-512980096 256))) (.cse3 (= (mod ~z$w_buff1_used~0_In-512980096 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In-512980096 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite52_Out-512980096|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$r_buff1_thd0~0_In-512980096 |ULTIMATE.start_main_#t~ite52_Out-512980096|) (or .cse0 .cse1) (or .cse3 .cse2)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-512980096, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-512980096, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-512980096, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-512980096} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-512980096|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-512980096, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-512980096, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-512980096, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-512980096} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 11:58:45,630 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [883] [883] L834-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_10| (mod v_~main$tmp_guard1~0_23 256)) (= |v_ULTIMATE.start_main_#t~ite52_54| v_~z$r_buff1_thd0~0_96) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_15 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_10|) (= v_~main$tmp_guard1~0_23 (ite (= 0 (ite (not (and (= v_~x~0_49 2) (= v_~__unbuffered_p2_EBX~0_30 0) (= 1 v_~__unbuffered_p2_EAX~0_25))) 1 0)) 0 1))) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_54|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_25, ~x~0=v_~x~0_49} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_53|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_15, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_30, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_96, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_23, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_25, ~x~0=v_~x~0_49, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 11:58:45,679 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_123d4dde-fcef-47e5-b61e-f95b82c3223c/bin/uautomizer/witness.graphml [2019-12-07 11:58:45,679 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 11:58:45,680 INFO L168 Benchmark]: Toolchain (without parser) took 170997.47 ms. Allocated memory was 1.0 GB in the beginning and 8.5 GB in the end (delta: 7.4 GB). Free memory was 937.2 MB in the beginning and 4.0 GB in the end (delta: -3.0 GB). Peak memory consumption was 4.4 GB. Max. memory is 11.5 GB. [2019-12-07 11:58:45,681 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 958.7 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 11:58:45,681 INFO L168 Benchmark]: CACSL2BoogieTranslator took 378.34 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 154.7 MB). Free memory was 937.2 MB in the beginning and 1.1 GB in the end (delta: -185.1 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. [2019-12-07 11:58:45,681 INFO L168 Benchmark]: Boogie Procedure Inliner took 40.51 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. [2019-12-07 11:58:45,681 INFO L168 Benchmark]: Boogie Preprocessor took 27.63 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 11:58:45,682 INFO L168 Benchmark]: RCFGBuilder took 423.08 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 55.7 MB). Peak memory consumption was 55.7 MB. Max. memory is 11.5 GB. [2019-12-07 11:58:45,682 INFO L168 Benchmark]: TraceAbstraction took 170060.55 ms. Allocated memory was 1.2 GB in the beginning and 8.5 GB in the end (delta: 7.3 GB). Free memory was 1.1 GB in the beginning and 4.0 GB in the end (delta: -3.0 GB). Peak memory consumption was 4.3 GB. Max. memory is 11.5 GB. [2019-12-07 11:58:45,682 INFO L168 Benchmark]: Witness Printer took 64.29 ms. Allocated memory is still 8.5 GB. Free memory was 4.0 GB in the beginning and 4.0 GB in the end (delta: 39.9 MB). Peak memory consumption was 39.9 MB. Max. memory is 11.5 GB. [2019-12-07 11:58:45,683 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 1.0 GB. Free memory is still 958.7 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 378.34 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 154.7 MB). Free memory was 937.2 MB in the beginning and 1.1 GB in the end (delta: -185.1 MB). Peak memory consumption was 18.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 40.51 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 27.63 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 423.08 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 55.7 MB). Peak memory consumption was 55.7 MB. Max. memory is 11.5 GB. * TraceAbstraction took 170060.55 ms. Allocated memory was 1.2 GB in the beginning and 8.5 GB in the end (delta: 7.3 GB). Free memory was 1.1 GB in the beginning and 4.0 GB in the end (delta: -3.0 GB). Peak memory consumption was 4.3 GB. Max. memory is 11.5 GB. * Witness Printer took 64.29 ms. Allocated memory is still 8.5 GB. Free memory was 4.0 GB in the beginning and 4.0 GB in the end (delta: 39.9 MB). Peak memory consumption was 39.9 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.5s, 175 ProgramPointsBefore, 92 ProgramPointsAfterwards, 212 TransitionsBefore, 102 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 12 FixpointIterations, 32 TrivialSequentialCompositions, 54 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 35 ConcurrentYvCompositions, 31 ChoiceCompositions, 7185 VarBasedMoverChecksPositive, 382 VarBasedMoverChecksNegative, 188 SemBasedMoverChecksPositive, 288 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.1s, 0 MoverChecksTotal, 125946 CheckedPairsTotal, 121 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L820] FCALL, FORK 0 pthread_create(&t2287, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L734] 1 z$r_buff1_thd0 = z$r_buff0_thd0 [L735] 1 z$r_buff1_thd1 = z$r_buff0_thd1 [L736] 1 z$r_buff1_thd2 = z$r_buff0_thd2 [L737] 1 z$r_buff1_thd3 = z$r_buff0_thd3 [L738] 1 z$r_buff0_thd1 = (_Bool)1 [L741] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L744] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L822] FCALL, FORK 0 pthread_create(&t2288, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L824] FCALL, FORK 0 pthread_create(&t2289, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L758] 2 x = 2 [L761] 2 y = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L764] EXPR 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L764] 2 z = z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) [L778] 3 __unbuffered_p2_EAX = y [L781] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L782] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L783] 3 z$flush_delayed = weak$$choice2 [L784] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L785] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L785] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L765] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L786] EXPR 3 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0))=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L766] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L786] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L787] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L767] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L788] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L789] 3 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L791] EXPR 3 weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L791] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L792] 3 __unbuffered_p2_EBX = z VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L797] EXPR 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L744] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L745] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L746] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L797] 3 z = z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) [L798] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L799] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L800] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L830] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=1, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L830] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L831] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L832] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L833] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 166 locations, 2 error locations. Result: UNSAFE, OverallTime: 169.9s, OverallIterations: 29, TraceHistogramMax: 1, AutomataDifference: 40.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 6236 SDtfs, 7890 SDslu, 21594 SDs, 0 SdLazy, 10999 SolverSat, 281 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 6.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 285 GetRequests, 34 SyntacticMatches, 10 SemanticMatches, 241 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 969 ImplicationChecksByTransitivity, 2.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=294588occurred in iteration=5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 108.7s AutomataMinimizationTime, 28 MinimizatonAttempts, 393836 StatesRemovedByMinimization, 26 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.6s SatisfiabilityAnalysisTime, 1.5s InterpolantComputationTime, 1193 NumberOfCodeBlocks, 1193 NumberOfCodeBlocksAsserted, 29 NumberOfCheckSat, 1098 ConstructedInterpolants, 0 QuantifiedInterpolants, 223844 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 28 InterpolantComputations, 28 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...