./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe026_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_1611e02b-ec5b-4929-ad57-a03fe5f6c114/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_1611e02b-ec5b-4929-ad57-a03fe5f6c114/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_1611e02b-ec5b-4929-ad57-a03fe5f6c114/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_1611e02b-ec5b-4929-ad57-a03fe5f6c114/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe026_rmo.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_1611e02b-ec5b-4929-ad57-a03fe5f6c114/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_1611e02b-ec5b-4929-ad57-a03fe5f6c114/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash b08c1cee670bb2f78b143fe2b32269853c317e59 .................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 18:40:00,873 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 18:40:00,875 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 18:40:00,884 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 18:40:00,884 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 18:40:00,885 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 18:40:00,886 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 18:40:00,888 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 18:40:00,890 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 18:40:00,891 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 18:40:00,891 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 18:40:00,892 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 18:40:00,892 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 18:40:00,893 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 18:40:00,894 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 18:40:00,895 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 18:40:00,895 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 18:40:00,896 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 18:40:00,898 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 18:40:00,899 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 18:40:00,900 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 18:40:00,901 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 18:40:00,901 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 18:40:00,902 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 18:40:00,903 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 18:40:00,904 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 18:40:00,904 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 18:40:00,904 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 18:40:00,904 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 18:40:00,905 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 18:40:00,905 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 18:40:00,906 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 18:40:00,906 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 18:40:00,907 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 18:40:00,908 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 18:40:00,908 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 18:40:00,908 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 18:40:00,908 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 18:40:00,909 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 18:40:00,909 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 18:40:00,910 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 18:40:00,911 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_1611e02b-ec5b-4929-ad57-a03fe5f6c114/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 18:40:00,923 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 18:40:00,923 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 18:40:00,924 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 18:40:00,924 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 18:40:00,925 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 18:40:00,925 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 18:40:00,925 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 18:40:00,925 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 18:40:00,925 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 18:40:00,926 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 18:40:00,926 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 18:40:00,926 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 18:40:00,926 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 18:40:00,926 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 18:40:00,927 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 18:40:00,927 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 18:40:00,927 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 18:40:00,927 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 18:40:00,928 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 18:40:00,928 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 18:40:00,928 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 18:40:00,928 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:40:00,928 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 18:40:00,928 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 18:40:00,929 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 18:40:00,929 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 18:40:00,929 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 18:40:00,929 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 18:40:00,929 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 18:40:00,929 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_1611e02b-ec5b-4929-ad57-a03fe5f6c114/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> b08c1cee670bb2f78b143fe2b32269853c317e59 [2019-12-07 18:40:01,037 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 18:40:01,047 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 18:40:01,050 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 18:40:01,051 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 18:40:01,051 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 18:40:01,052 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_1611e02b-ec5b-4929-ad57-a03fe5f6c114/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe026_rmo.opt.i [2019-12-07 18:40:01,091 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_1611e02b-ec5b-4929-ad57-a03fe5f6c114/bin/uautomizer/data/3893d4e72/208005271a8044daa243488cec2af1cf/FLAGc7a8f0247 [2019-12-07 18:40:01,551 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 18:40:01,551 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_1611e02b-ec5b-4929-ad57-a03fe5f6c114/sv-benchmarks/c/pthread-wmm/safe026_rmo.opt.i [2019-12-07 18:40:01,564 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_1611e02b-ec5b-4929-ad57-a03fe5f6c114/bin/uautomizer/data/3893d4e72/208005271a8044daa243488cec2af1cf/FLAGc7a8f0247 [2019-12-07 18:40:02,073 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_1611e02b-ec5b-4929-ad57-a03fe5f6c114/bin/uautomizer/data/3893d4e72/208005271a8044daa243488cec2af1cf [2019-12-07 18:40:02,075 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 18:40:02,076 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 18:40:02,077 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 18:40:02,077 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 18:40:02,080 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 18:40:02,081 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:40:02" (1/1) ... [2019-12-07 18:40:02,083 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4beab7c6 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:40:02, skipping insertion in model container [2019-12-07 18:40:02,083 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 06:40:02" (1/1) ... [2019-12-07 18:40:02,089 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 18:40:02,125 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 18:40:02,408 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:40:02,415 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 18:40:02,458 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 18:40:02,507 INFO L208 MainTranslator]: Completed translation [2019-12-07 18:40:02,507 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:40:02 WrapperNode [2019-12-07 18:40:02,507 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 18:40:02,508 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 18:40:02,508 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 18:40:02,508 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 18:40:02,514 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:40:02" (1/1) ... [2019-12-07 18:40:02,529 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:40:02" (1/1) ... [2019-12-07 18:40:02,548 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 18:40:02,548 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 18:40:02,548 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 18:40:02,548 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 18:40:02,555 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:40:02" (1/1) ... [2019-12-07 18:40:02,555 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:40:02" (1/1) ... [2019-12-07 18:40:02,558 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:40:02" (1/1) ... [2019-12-07 18:40:02,558 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:40:02" (1/1) ... [2019-12-07 18:40:02,566 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:40:02" (1/1) ... [2019-12-07 18:40:02,569 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:40:02" (1/1) ... [2019-12-07 18:40:02,571 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:40:02" (1/1) ... [2019-12-07 18:40:02,574 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 18:40:02,575 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 18:40:02,575 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 18:40:02,575 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 18:40:02,576 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:40:02" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_1611e02b-ec5b-4929-ad57-a03fe5f6c114/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 18:40:02,618 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 18:40:02,619 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 18:40:02,619 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 18:40:02,619 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 18:40:02,619 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 18:40:02,619 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 18:40:02,619 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 18:40:02,619 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 18:40:02,620 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 18:40:02,620 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 18:40:02,620 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 18:40:02,620 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 18:40:02,620 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 18:40:02,622 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 18:40:02,992 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 18:40:02,993 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 18:40:02,993 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:40:02 BoogieIcfgContainer [2019-12-07 18:40:02,994 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 18:40:02,994 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 18:40:02,994 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 18:40:02,996 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 18:40:02,996 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 06:40:02" (1/3) ... [2019-12-07 18:40:02,997 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@217e98b5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:40:02, skipping insertion in model container [2019-12-07 18:40:02,997 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 06:40:02" (2/3) ... [2019-12-07 18:40:02,997 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@217e98b5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 06:40:02, skipping insertion in model container [2019-12-07 18:40:02,997 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:40:02" (3/3) ... [2019-12-07 18:40:02,998 INFO L109 eAbstractionObserver]: Analyzing ICFG safe026_rmo.opt.i [2019-12-07 18:40:03,005 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 18:40:03,005 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 18:40:03,010 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 18:40:03,010 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 18:40:03,036 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,036 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,036 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,036 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,036 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,036 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,036 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,037 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,037 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,037 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,037 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,037 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,037 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,037 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,038 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,038 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,038 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,038 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,038 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,038 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,038 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,038 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,038 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,039 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,039 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,039 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,039 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,039 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,039 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,039 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,039 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,039 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,040 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,040 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,040 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,040 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,040 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,040 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,040 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,041 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,041 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,041 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,041 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,041 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,041 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,041 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,041 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,042 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,042 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,042 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,042 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,042 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,042 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,042 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,042 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,042 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,043 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,043 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,043 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,043 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,043 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,043 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,043 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,043 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,044 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,044 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,044 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,044 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,044 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,044 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,045 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,045 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,045 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,045 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,045 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,045 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,045 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,046 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,046 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,046 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,046 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,046 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,046 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,046 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,046 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,046 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,046 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,047 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,048 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,049 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,050 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,051 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,052 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,053 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,053 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,053 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,053 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,053 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,053 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,053 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,053 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,053 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,053 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,054 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,054 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,054 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,054 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,054 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,054 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,054 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,054 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,054 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,054 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,055 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,055 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,055 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,055 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,055 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,055 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,055 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,055 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,055 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,055 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,056 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,056 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,056 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,056 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,056 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,056 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 18:40:03,067 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 18:40:03,079 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 18:40:03,079 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 18:40:03,080 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 18:40:03,080 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 18:40:03,080 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 18:40:03,080 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 18:40:03,080 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 18:40:03,080 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 18:40:03,091 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 174 places, 211 transitions [2019-12-07 18:40:03,093 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 174 places, 211 transitions [2019-12-07 18:40:03,147 INFO L134 PetriNetUnfolder]: 47/208 cut-off events. [2019-12-07 18:40:03,147 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:40:03,158 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 208 events. 47/208 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/168 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 18:40:03,173 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 174 places, 211 transitions [2019-12-07 18:40:03,204 INFO L134 PetriNetUnfolder]: 47/208 cut-off events. [2019-12-07 18:40:03,204 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 18:40:03,210 INFO L76 FinitePrefix]: Finished finitePrefix Result has 218 conditions, 208 events. 47/208 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/168 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 18:40:03,224 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 18:40:03,225 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 18:40:06,223 WARN L192 SmtUtils]: Spent 138.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 85 [2019-12-07 18:40:06,312 INFO L206 etLargeBlockEncoding]: Checked pairs total: 78269 [2019-12-07 18:40:06,312 INFO L214 etLargeBlockEncoding]: Total number of compositions: 114 [2019-12-07 18:40:06,314 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 93 places, 103 transitions [2019-12-07 18:40:19,340 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 109594 states. [2019-12-07 18:40:19,342 INFO L276 IsEmpty]: Start isEmpty. Operand 109594 states. [2019-12-07 18:40:19,346 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 18:40:19,346 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:40:19,346 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 18:40:19,346 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:40:19,350 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:40:19,350 INFO L82 PathProgramCache]: Analyzing trace with hash 909914, now seen corresponding path program 1 times [2019-12-07 18:40:19,356 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:40:19,357 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [910506155] [2019-12-07 18:40:19,357 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:40:19,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:40:19,498 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:40:19,498 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [910506155] [2019-12-07 18:40:19,499 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:40:19,499 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 18:40:19,499 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1885192556] [2019-12-07 18:40:19,502 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:40:19,503 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:40:19,511 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:40:19,512 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:40:19,513 INFO L87 Difference]: Start difference. First operand 109594 states. Second operand 3 states. [2019-12-07 18:40:20,167 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:40:20,168 INFO L93 Difference]: Finished difference Result 108680 states and 463562 transitions. [2019-12-07 18:40:20,169 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:40:20,170 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 18:40:20,170 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:40:20,718 INFO L225 Difference]: With dead ends: 108680 [2019-12-07 18:40:20,719 INFO L226 Difference]: Without dead ends: 102440 [2019-12-07 18:40:20,720 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:40:24,213 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102440 states. [2019-12-07 18:40:25,590 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102440 to 102440. [2019-12-07 18:40:25,591 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102440 states. [2019-12-07 18:40:25,933 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102440 states to 102440 states and 436366 transitions. [2019-12-07 18:40:25,934 INFO L78 Accepts]: Start accepts. Automaton has 102440 states and 436366 transitions. Word has length 3 [2019-12-07 18:40:25,934 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:40:25,934 INFO L462 AbstractCegarLoop]: Abstraction has 102440 states and 436366 transitions. [2019-12-07 18:40:25,934 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:40:25,935 INFO L276 IsEmpty]: Start isEmpty. Operand 102440 states and 436366 transitions. [2019-12-07 18:40:25,938 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 18:40:25,939 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:40:25,939 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:40:25,939 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:40:25,939 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:40:25,939 INFO L82 PathProgramCache]: Analyzing trace with hash -975068220, now seen corresponding path program 1 times [2019-12-07 18:40:25,940 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:40:25,940 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [53685191] [2019-12-07 18:40:25,940 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:40:25,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:40:26,017 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:40:26,018 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [53685191] [2019-12-07 18:40:26,018 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:40:26,018 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:40:26,018 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1692652833] [2019-12-07 18:40:26,019 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:40:26,019 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:40:26,019 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:40:26,019 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:40:26,019 INFO L87 Difference]: Start difference. First operand 102440 states and 436366 transitions. Second operand 4 states. [2019-12-07 18:40:28,882 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:40:28,882 INFO L93 Difference]: Finished difference Result 163248 states and 665679 transitions. [2019-12-07 18:40:28,883 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:40:28,883 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 18:40:28,883 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:40:29,277 INFO L225 Difference]: With dead ends: 163248 [2019-12-07 18:40:29,277 INFO L226 Difference]: Without dead ends: 163199 [2019-12-07 18:40:29,278 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:40:34,019 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163199 states. [2019-12-07 18:40:35,945 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163199 to 148639. [2019-12-07 18:40:35,945 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148639 states. [2019-12-07 18:40:36,358 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148639 states to 148639 states and 614105 transitions. [2019-12-07 18:40:36,359 INFO L78 Accepts]: Start accepts. Automaton has 148639 states and 614105 transitions. Word has length 11 [2019-12-07 18:40:36,359 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:40:36,359 INFO L462 AbstractCegarLoop]: Abstraction has 148639 states and 614105 transitions. [2019-12-07 18:40:36,359 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:40:36,359 INFO L276 IsEmpty]: Start isEmpty. Operand 148639 states and 614105 transitions. [2019-12-07 18:40:36,363 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 18:40:36,363 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:40:36,363 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:40:36,364 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:40:36,364 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:40:36,364 INFO L82 PathProgramCache]: Analyzing trace with hash -112330344, now seen corresponding path program 1 times [2019-12-07 18:40:36,364 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:40:36,364 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [410052203] [2019-12-07 18:40:36,364 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:40:36,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:40:36,411 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:40:36,412 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [410052203] [2019-12-07 18:40:36,412 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:40:36,412 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:40:36,412 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1645018869] [2019-12-07 18:40:36,412 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:40:36,412 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:40:36,412 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:40:36,413 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:40:36,413 INFO L87 Difference]: Start difference. First operand 148639 states and 614105 transitions. Second operand 4 states. [2019-12-07 18:40:37,898 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:40:37,898 INFO L93 Difference]: Finished difference Result 208779 states and 842772 transitions. [2019-12-07 18:40:37,899 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:40:37,899 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 18:40:37,899 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:40:38,431 INFO L225 Difference]: With dead ends: 208779 [2019-12-07 18:40:38,431 INFO L226 Difference]: Without dead ends: 208723 [2019-12-07 18:40:38,431 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:40:45,795 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 208723 states. [2019-12-07 18:40:48,100 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 208723 to 175996. [2019-12-07 18:40:48,100 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175996 states. [2019-12-07 18:40:48,827 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175996 states to 175996 states and 723083 transitions. [2019-12-07 18:40:48,828 INFO L78 Accepts]: Start accepts. Automaton has 175996 states and 723083 transitions. Word has length 13 [2019-12-07 18:40:48,828 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:40:48,828 INFO L462 AbstractCegarLoop]: Abstraction has 175996 states and 723083 transitions. [2019-12-07 18:40:48,828 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:40:48,828 INFO L276 IsEmpty]: Start isEmpty. Operand 175996 states and 723083 transitions. [2019-12-07 18:40:48,835 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 18:40:48,835 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:40:48,835 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:40:48,835 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:40:48,836 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:40:48,836 INFO L82 PathProgramCache]: Analyzing trace with hash -790185689, now seen corresponding path program 1 times [2019-12-07 18:40:48,836 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:40:48,836 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [863793532] [2019-12-07 18:40:48,836 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:40:48,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:40:48,885 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:40:48,885 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [863793532] [2019-12-07 18:40:48,886 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:40:48,886 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:40:48,886 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [653517001] [2019-12-07 18:40:48,886 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:40:48,886 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:40:48,886 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:40:48,887 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:40:48,887 INFO L87 Difference]: Start difference. First operand 175996 states and 723083 transitions. Second operand 5 states. [2019-12-07 18:40:50,100 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:40:50,100 INFO L93 Difference]: Finished difference Result 234922 states and 955485 transitions. [2019-12-07 18:40:50,100 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 18:40:50,100 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 18:40:50,101 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:40:50,707 INFO L225 Difference]: With dead ends: 234922 [2019-12-07 18:40:50,708 INFO L226 Difference]: Without dead ends: 234922 [2019-12-07 18:40:50,708 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:40:56,418 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 234922 states. [2019-12-07 18:41:01,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 234922 to 195490. [2019-12-07 18:41:01,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 195490 states. [2019-12-07 18:41:01,926 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195490 states to 195490 states and 801473 transitions. [2019-12-07 18:41:01,926 INFO L78 Accepts]: Start accepts. Automaton has 195490 states and 801473 transitions. Word has length 16 [2019-12-07 18:41:01,926 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:41:01,927 INFO L462 AbstractCegarLoop]: Abstraction has 195490 states and 801473 transitions. [2019-12-07 18:41:01,927 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:41:01,927 INFO L276 IsEmpty]: Start isEmpty. Operand 195490 states and 801473 transitions. [2019-12-07 18:41:01,937 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 18:41:01,938 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:41:01,938 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:41:01,938 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:41:01,938 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:41:01,938 INFO L82 PathProgramCache]: Analyzing trace with hash 1153162558, now seen corresponding path program 1 times [2019-12-07 18:41:01,938 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:41:01,938 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [982516719] [2019-12-07 18:41:01,939 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:41:01,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:41:01,989 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:41:01,989 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [982516719] [2019-12-07 18:41:01,989 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:41:01,989 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:41:01,989 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1952996957] [2019-12-07 18:41:01,990 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:41:01,990 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:41:01,990 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:41:01,990 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:41:01,990 INFO L87 Difference]: Start difference. First operand 195490 states and 801473 transitions. Second operand 3 states. [2019-12-07 18:41:03,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:41:03,135 INFO L93 Difference]: Finished difference Result 184358 states and 747757 transitions. [2019-12-07 18:41:03,136 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:41:03,136 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 18:41:03,136 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:41:03,569 INFO L225 Difference]: With dead ends: 184358 [2019-12-07 18:41:03,570 INFO L226 Difference]: Without dead ends: 184358 [2019-12-07 18:41:03,570 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:41:08,424 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184358 states. [2019-12-07 18:41:10,841 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184358 to 181506. [2019-12-07 18:41:10,841 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 181506 states. [2019-12-07 18:41:11,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181506 states to 181506 states and 737225 transitions. [2019-12-07 18:41:11,341 INFO L78 Accepts]: Start accepts. Automaton has 181506 states and 737225 transitions. Word has length 18 [2019-12-07 18:41:11,341 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:41:11,341 INFO L462 AbstractCegarLoop]: Abstraction has 181506 states and 737225 transitions. [2019-12-07 18:41:11,341 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:41:11,341 INFO L276 IsEmpty]: Start isEmpty. Operand 181506 states and 737225 transitions. [2019-12-07 18:41:11,350 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 18:41:11,350 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:41:11,350 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:41:11,350 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:41:11,350 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:41:11,350 INFO L82 PathProgramCache]: Analyzing trace with hash 2087583439, now seen corresponding path program 1 times [2019-12-07 18:41:11,350 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:41:11,350 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1041953756] [2019-12-07 18:41:11,351 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:41:11,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:41:11,398 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:41:11,398 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1041953756] [2019-12-07 18:41:11,398 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:41:11,399 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:41:11,399 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1258511048] [2019-12-07 18:41:11,399 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:41:11,399 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:41:11,399 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:41:11,400 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:41:11,400 INFO L87 Difference]: Start difference. First operand 181506 states and 737225 transitions. Second operand 4 states. [2019-12-07 18:41:11,567 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:41:11,567 INFO L93 Difference]: Finished difference Result 45669 states and 155577 transitions. [2019-12-07 18:41:11,567 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:41:11,567 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 18 [2019-12-07 18:41:11,567 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:41:11,621 INFO L225 Difference]: With dead ends: 45669 [2019-12-07 18:41:11,621 INFO L226 Difference]: Without dead ends: 34978 [2019-12-07 18:41:11,621 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:41:11,805 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34978 states. [2019-12-07 18:41:12,135 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34978 to 34978. [2019-12-07 18:41:12,135 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34978 states. [2019-12-07 18:41:12,194 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34978 states to 34978 states and 112197 transitions. [2019-12-07 18:41:12,194 INFO L78 Accepts]: Start accepts. Automaton has 34978 states and 112197 transitions. Word has length 18 [2019-12-07 18:41:12,194 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:41:12,194 INFO L462 AbstractCegarLoop]: Abstraction has 34978 states and 112197 transitions. [2019-12-07 18:41:12,194 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:41:12,195 INFO L276 IsEmpty]: Start isEmpty. Operand 34978 states and 112197 transitions. [2019-12-07 18:41:12,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 18:41:12,199 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:41:12,199 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:41:12,199 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:41:12,200 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:41:12,200 INFO L82 PathProgramCache]: Analyzing trace with hash 2079194331, now seen corresponding path program 1 times [2019-12-07 18:41:12,200 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:41:12,200 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1497405979] [2019-12-07 18:41:12,200 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:41:12,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:41:12,245 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:41:12,245 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1497405979] [2019-12-07 18:41:12,245 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:41:12,245 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:41:12,246 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [605728784] [2019-12-07 18:41:12,246 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:41:12,246 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:41:12,246 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:41:12,246 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:41:12,247 INFO L87 Difference]: Start difference. First operand 34978 states and 112197 transitions. Second operand 6 states. [2019-12-07 18:41:12,823 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:41:12,823 INFO L93 Difference]: Finished difference Result 53861 states and 168239 transitions. [2019-12-07 18:41:12,824 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 18:41:12,824 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-12-07 18:41:12,824 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:41:12,899 INFO L225 Difference]: With dead ends: 53861 [2019-12-07 18:41:12,899 INFO L226 Difference]: Without dead ends: 53805 [2019-12-07 18:41:12,900 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:41:13,127 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53805 states. [2019-12-07 18:41:14,355 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53805 to 35610. [2019-12-07 18:41:14,355 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35610 states. [2019-12-07 18:41:14,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35610 states to 35610 states and 113401 transitions. [2019-12-07 18:41:14,411 INFO L78 Accepts]: Start accepts. Automaton has 35610 states and 113401 transitions. Word has length 22 [2019-12-07 18:41:14,411 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:41:14,411 INFO L462 AbstractCegarLoop]: Abstraction has 35610 states and 113401 transitions. [2019-12-07 18:41:14,411 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:41:14,411 INFO L276 IsEmpty]: Start isEmpty. Operand 35610 states and 113401 transitions. [2019-12-07 18:41:14,419 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 18:41:14,419 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:41:14,420 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:41:14,420 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:41:14,420 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:41:14,420 INFO L82 PathProgramCache]: Analyzing trace with hash -356343789, now seen corresponding path program 1 times [2019-12-07 18:41:14,420 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:41:14,420 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2100277224] [2019-12-07 18:41:14,420 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:41:14,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:41:14,473 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:41:14,473 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2100277224] [2019-12-07 18:41:14,473 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:41:14,473 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:41:14,473 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1429529302] [2019-12-07 18:41:14,473 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:41:14,474 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:41:14,474 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:41:14,474 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:41:14,474 INFO L87 Difference]: Start difference. First operand 35610 states and 113401 transitions. Second operand 5 states. [2019-12-07 18:41:14,549 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:41:14,549 INFO L93 Difference]: Finished difference Result 16042 states and 49130 transitions. [2019-12-07 18:41:14,550 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 18:41:14,550 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 18:41:14,550 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:41:14,566 INFO L225 Difference]: With dead ends: 16042 [2019-12-07 18:41:14,566 INFO L226 Difference]: Without dead ends: 14091 [2019-12-07 18:41:14,567 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:41:14,626 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14091 states. [2019-12-07 18:41:14,742 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14091 to 14020. [2019-12-07 18:41:14,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14020 states. [2019-12-07 18:41:14,765 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14020 states to 14020 states and 42840 transitions. [2019-12-07 18:41:14,765 INFO L78 Accepts]: Start accepts. Automaton has 14020 states and 42840 transitions. Word has length 25 [2019-12-07 18:41:14,765 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:41:14,765 INFO L462 AbstractCegarLoop]: Abstraction has 14020 states and 42840 transitions. [2019-12-07 18:41:14,765 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:41:14,765 INFO L276 IsEmpty]: Start isEmpty. Operand 14020 states and 42840 transitions. [2019-12-07 18:41:14,774 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 18:41:14,774 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:41:14,775 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:41:14,775 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:41:14,775 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:41:14,775 INFO L82 PathProgramCache]: Analyzing trace with hash -1041381309, now seen corresponding path program 1 times [2019-12-07 18:41:14,775 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:41:14,775 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [95455474] [2019-12-07 18:41:14,775 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:41:14,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:41:14,828 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:41:14,828 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [95455474] [2019-12-07 18:41:14,828 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:41:14,828 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:41:14,829 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1483913526] [2019-12-07 18:41:14,829 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:41:14,829 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:41:14,829 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:41:14,829 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:41:14,829 INFO L87 Difference]: Start difference. First operand 14020 states and 42840 transitions. Second operand 6 states. [2019-12-07 18:41:15,219 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:41:15,219 INFO L93 Difference]: Finished difference Result 20440 states and 60379 transitions. [2019-12-07 18:41:15,220 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 18:41:15,220 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 18:41:15,220 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:41:15,240 INFO L225 Difference]: With dead ends: 20440 [2019-12-07 18:41:15,241 INFO L226 Difference]: Without dead ends: 20130 [2019-12-07 18:41:15,241 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 18:41:15,313 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20130 states. [2019-12-07 18:41:15,454 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20130 to 15012. [2019-12-07 18:41:15,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15012 states. [2019-12-07 18:41:15,477 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15012 states to 15012 states and 45538 transitions. [2019-12-07 18:41:15,477 INFO L78 Accepts]: Start accepts. Automaton has 15012 states and 45538 transitions. Word has length 27 [2019-12-07 18:41:15,477 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:41:15,478 INFO L462 AbstractCegarLoop]: Abstraction has 15012 states and 45538 transitions. [2019-12-07 18:41:15,478 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:41:15,478 INFO L276 IsEmpty]: Start isEmpty. Operand 15012 states and 45538 transitions. [2019-12-07 18:41:15,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 18:41:15,493 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:41:15,493 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:41:15,493 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:41:15,493 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:41:15,493 INFO L82 PathProgramCache]: Analyzing trace with hash -1993081713, now seen corresponding path program 1 times [2019-12-07 18:41:15,494 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:41:15,494 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1087033799] [2019-12-07 18:41:15,494 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:41:15,505 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:41:15,561 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:41:15,561 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1087033799] [2019-12-07 18:41:15,561 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:41:15,561 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:41:15,561 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2930788] [2019-12-07 18:41:15,561 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:41:15,562 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:41:15,562 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:41:15,562 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:41:15,562 INFO L87 Difference]: Start difference. First operand 15012 states and 45538 transitions. Second operand 7 states. [2019-12-07 18:41:16,775 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:41:16,775 INFO L93 Difference]: Finished difference Result 21534 states and 63259 transitions. [2019-12-07 18:41:16,775 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 18:41:16,775 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 18:41:16,775 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:41:16,796 INFO L225 Difference]: With dead ends: 21534 [2019-12-07 18:41:16,796 INFO L226 Difference]: Without dead ends: 20847 [2019-12-07 18:41:16,796 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 22 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 61 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=90, Invalid=252, Unknown=0, NotChecked=0, Total=342 [2019-12-07 18:41:16,868 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20847 states. [2019-12-07 18:41:17,009 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20847 to 14369. [2019-12-07 18:41:17,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14369 states. [2019-12-07 18:41:17,032 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14369 states to 14369 states and 43467 transitions. [2019-12-07 18:41:17,032 INFO L78 Accepts]: Start accepts. Automaton has 14369 states and 43467 transitions. Word has length 33 [2019-12-07 18:41:17,032 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:41:17,032 INFO L462 AbstractCegarLoop]: Abstraction has 14369 states and 43467 transitions. [2019-12-07 18:41:17,033 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:41:17,033 INFO L276 IsEmpty]: Start isEmpty. Operand 14369 states and 43467 transitions. [2019-12-07 18:41:17,050 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 18:41:17,050 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:41:17,050 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:41:17,050 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:41:17,050 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:41:17,050 INFO L82 PathProgramCache]: Analyzing trace with hash 731907862, now seen corresponding path program 1 times [2019-12-07 18:41:17,051 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:41:17,051 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1437703231] [2019-12-07 18:41:17,051 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:41:17,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:41:17,104 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:41:17,104 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1437703231] [2019-12-07 18:41:17,104 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:41:17,104 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:41:17,104 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1082564304] [2019-12-07 18:41:17,105 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:41:17,105 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:41:17,105 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:41:17,105 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:41:17,105 INFO L87 Difference]: Start difference. First operand 14369 states and 43467 transitions. Second operand 5 states. [2019-12-07 18:41:17,641 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:41:17,641 INFO L93 Difference]: Finished difference Result 20994 states and 62972 transitions. [2019-12-07 18:41:17,642 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:41:17,642 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2019-12-07 18:41:17,643 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:41:17,675 INFO L225 Difference]: With dead ends: 20994 [2019-12-07 18:41:17,676 INFO L226 Difference]: Without dead ends: 20994 [2019-12-07 18:41:17,676 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:41:17,749 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20994 states. [2019-12-07 18:41:17,917 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20994 to 18297. [2019-12-07 18:41:17,917 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18297 states. [2019-12-07 18:41:17,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18297 states to 18297 states and 55493 transitions. [2019-12-07 18:41:17,945 INFO L78 Accepts]: Start accepts. Automaton has 18297 states and 55493 transitions. Word has length 40 [2019-12-07 18:41:17,945 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:41:17,945 INFO L462 AbstractCegarLoop]: Abstraction has 18297 states and 55493 transitions. [2019-12-07 18:41:17,945 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:41:17,945 INFO L276 IsEmpty]: Start isEmpty. Operand 18297 states and 55493 transitions. [2019-12-07 18:41:17,964 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 18:41:17,964 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:41:17,965 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:41:17,965 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:41:17,965 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:41:17,965 INFO L82 PathProgramCache]: Analyzing trace with hash 1202471860, now seen corresponding path program 2 times [2019-12-07 18:41:17,965 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:41:17,965 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1852095953] [2019-12-07 18:41:17,965 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:41:17,976 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:41:18,000 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:41:18,000 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1852095953] [2019-12-07 18:41:18,001 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:41:18,001 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:41:18,001 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2122095500] [2019-12-07 18:41:18,001 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:41:18,001 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:41:18,001 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:41:18,001 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:41:18,001 INFO L87 Difference]: Start difference. First operand 18297 states and 55493 transitions. Second operand 3 states. [2019-12-07 18:41:18,056 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:41:18,056 INFO L93 Difference]: Finished difference Result 18297 states and 54821 transitions. [2019-12-07 18:41:18,056 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:41:18,057 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2019-12-07 18:41:18,057 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:41:18,075 INFO L225 Difference]: With dead ends: 18297 [2019-12-07 18:41:18,075 INFO L226 Difference]: Without dead ends: 18297 [2019-12-07 18:41:18,075 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:41:18,141 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18297 states. [2019-12-07 18:41:18,282 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18297 to 17851. [2019-12-07 18:41:18,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17851 states. [2019-12-07 18:41:18,398 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17851 states to 17851 states and 53559 transitions. [2019-12-07 18:41:18,398 INFO L78 Accepts]: Start accepts. Automaton has 17851 states and 53559 transitions. Word has length 40 [2019-12-07 18:41:18,399 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:41:18,399 INFO L462 AbstractCegarLoop]: Abstraction has 17851 states and 53559 transitions. [2019-12-07 18:41:18,399 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:41:18,399 INFO L276 IsEmpty]: Start isEmpty. Operand 17851 states and 53559 transitions. [2019-12-07 18:41:18,417 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 18:41:18,417 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:41:18,417 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:41:18,418 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:41:18,418 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:41:18,418 INFO L82 PathProgramCache]: Analyzing trace with hash 854921497, now seen corresponding path program 1 times [2019-12-07 18:41:18,418 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:41:18,418 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1977864967] [2019-12-07 18:41:18,418 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:41:18,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:41:18,473 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:41:18,473 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1977864967] [2019-12-07 18:41:18,474 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:41:18,474 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 18:41:18,474 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1190892808] [2019-12-07 18:41:18,474 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 18:41:18,474 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:41:18,474 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 18:41:18,474 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:41:18,474 INFO L87 Difference]: Start difference. First operand 17851 states and 53559 transitions. Second operand 6 states. [2019-12-07 18:41:18,549 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:41:18,549 INFO L93 Difference]: Finished difference Result 16802 states and 51226 transitions. [2019-12-07 18:41:18,549 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:41:18,549 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 41 [2019-12-07 18:41:18,549 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:41:18,566 INFO L225 Difference]: With dead ends: 16802 [2019-12-07 18:41:18,567 INFO L226 Difference]: Without dead ends: 16672 [2019-12-07 18:41:18,567 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-12-07 18:41:18,631 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16672 states. [2019-12-07 18:41:18,771 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16672 to 16672. [2019-12-07 18:41:18,771 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16672 states. [2019-12-07 18:41:18,796 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16672 states to 16672 states and 50949 transitions. [2019-12-07 18:41:18,796 INFO L78 Accepts]: Start accepts. Automaton has 16672 states and 50949 transitions. Word has length 41 [2019-12-07 18:41:18,796 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:41:18,796 INFO L462 AbstractCegarLoop]: Abstraction has 16672 states and 50949 transitions. [2019-12-07 18:41:18,796 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 18:41:18,796 INFO L276 IsEmpty]: Start isEmpty. Operand 16672 states and 50949 transitions. [2019-12-07 18:41:18,810 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:41:18,810 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:41:18,810 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:41:18,811 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:41:18,811 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:41:18,811 INFO L82 PathProgramCache]: Analyzing trace with hash 1128251409, now seen corresponding path program 1 times [2019-12-07 18:41:18,811 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:41:18,811 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2003184990] [2019-12-07 18:41:18,811 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:41:18,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:41:18,845 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:41:18,845 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2003184990] [2019-12-07 18:41:18,845 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:41:18,845 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:41:18,846 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [323659712] [2019-12-07 18:41:18,846 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:41:18,846 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:41:18,846 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:41:18,846 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:41:18,846 INFO L87 Difference]: Start difference. First operand 16672 states and 50949 transitions. Second operand 3 states. [2019-12-07 18:41:18,917 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:41:18,917 INFO L93 Difference]: Finished difference Result 23766 states and 72975 transitions. [2019-12-07 18:41:18,917 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:41:18,917 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 18:41:18,917 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:41:18,941 INFO L225 Difference]: With dead ends: 23766 [2019-12-07 18:41:18,941 INFO L226 Difference]: Without dead ends: 23766 [2019-12-07 18:41:18,942 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:41:19,019 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23766 states. [2019-12-07 18:41:19,207 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23766 to 18908. [2019-12-07 18:41:19,208 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18908 states. [2019-12-07 18:41:19,237 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18908 states to 18908 states and 58542 transitions. [2019-12-07 18:41:19,237 INFO L78 Accepts]: Start accepts. Automaton has 18908 states and 58542 transitions. Word has length 66 [2019-12-07 18:41:19,237 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:41:19,237 INFO L462 AbstractCegarLoop]: Abstraction has 18908 states and 58542 transitions. [2019-12-07 18:41:19,237 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:41:19,237 INFO L276 IsEmpty]: Start isEmpty. Operand 18908 states and 58542 transitions. [2019-12-07 18:41:19,254 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:41:19,254 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:41:19,254 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:41:19,255 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:41:19,255 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:41:19,255 INFO L82 PathProgramCache]: Analyzing trace with hash 1486247926, now seen corresponding path program 1 times [2019-12-07 18:41:19,255 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:41:19,255 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [713019467] [2019-12-07 18:41:19,255 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:41:19,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:41:19,280 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:41:19,281 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [713019467] [2019-12-07 18:41:19,281 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:41:19,281 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:41:19,281 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1413033061] [2019-12-07 18:41:19,281 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:41:19,282 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:41:19,282 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:41:19,282 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:41:19,282 INFO L87 Difference]: Start difference. First operand 18908 states and 58542 transitions. Second operand 3 states. [2019-12-07 18:41:19,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:41:19,346 INFO L93 Difference]: Finished difference Result 22628 states and 67954 transitions. [2019-12-07 18:41:19,346 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:41:19,347 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 18:41:19,347 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:41:19,370 INFO L225 Difference]: With dead ends: 22628 [2019-12-07 18:41:19,371 INFO L226 Difference]: Without dead ends: 22628 [2019-12-07 18:41:19,371 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:41:19,448 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22628 states. [2019-12-07 18:41:19,619 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22628 to 17579. [2019-12-07 18:41:19,619 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17579 states. [2019-12-07 18:41:19,645 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17579 states to 17579 states and 52993 transitions. [2019-12-07 18:41:19,645 INFO L78 Accepts]: Start accepts. Automaton has 17579 states and 52993 transitions. Word has length 66 [2019-12-07 18:41:19,645 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:41:19,645 INFO L462 AbstractCegarLoop]: Abstraction has 17579 states and 52993 transitions. [2019-12-07 18:41:19,645 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:41:19,645 INFO L276 IsEmpty]: Start isEmpty. Operand 17579 states and 52993 transitions. [2019-12-07 18:41:19,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:41:19,660 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:41:19,660 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:41:19,660 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:41:19,660 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:41:19,660 INFO L82 PathProgramCache]: Analyzing trace with hash 2105019115, now seen corresponding path program 1 times [2019-12-07 18:41:19,660 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:41:19,660 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1861363517] [2019-12-07 18:41:19,661 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:41:19,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:41:19,733 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:41:19,733 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1861363517] [2019-12-07 18:41:19,733 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:41:19,733 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 18:41:19,733 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1822798961] [2019-12-07 18:41:19,734 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:41:19,734 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:41:19,734 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:41:19,734 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:41:19,734 INFO L87 Difference]: Start difference. First operand 17579 states and 52993 transitions. Second operand 7 states. [2019-12-07 18:41:20,332 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:41:20,332 INFO L93 Difference]: Finished difference Result 27087 states and 80193 transitions. [2019-12-07 18:41:20,333 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 18:41:20,333 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 66 [2019-12-07 18:41:20,333 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:41:20,360 INFO L225 Difference]: With dead ends: 27087 [2019-12-07 18:41:20,361 INFO L226 Difference]: Without dead ends: 27087 [2019-12-07 18:41:20,361 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=52, Invalid=158, Unknown=0, NotChecked=0, Total=210 [2019-12-07 18:41:20,446 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27087 states. [2019-12-07 18:41:20,635 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27087 to 17891. [2019-12-07 18:41:20,635 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17891 states. [2019-12-07 18:41:20,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17891 states to 17891 states and 53983 transitions. [2019-12-07 18:41:20,660 INFO L78 Accepts]: Start accepts. Automaton has 17891 states and 53983 transitions. Word has length 66 [2019-12-07 18:41:20,660 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:41:20,660 INFO L462 AbstractCegarLoop]: Abstraction has 17891 states and 53983 transitions. [2019-12-07 18:41:20,660 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:41:20,660 INFO L276 IsEmpty]: Start isEmpty. Operand 17891 states and 53983 transitions. [2019-12-07 18:41:20,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 18:41:20,674 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:41:20,675 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:41:20,675 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:41:20,675 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:41:20,675 INFO L82 PathProgramCache]: Analyzing trace with hash 1336131631, now seen corresponding path program 2 times [2019-12-07 18:41:20,675 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:41:20,675 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2004032291] [2019-12-07 18:41:20,675 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:41:20,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:41:20,710 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:41:20,710 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2004032291] [2019-12-07 18:41:20,711 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:41:20,711 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 18:41:20,711 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2104025688] [2019-12-07 18:41:20,711 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 18:41:20,711 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:41:20,712 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 18:41:20,712 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:41:20,712 INFO L87 Difference]: Start difference. First operand 17891 states and 53983 transitions. Second operand 3 states. [2019-12-07 18:41:20,798 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:41:20,799 INFO L93 Difference]: Finished difference Result 20935 states and 63324 transitions. [2019-12-07 18:41:20,799 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 18:41:20,799 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 18:41:20,799 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:41:20,820 INFO L225 Difference]: With dead ends: 20935 [2019-12-07 18:41:20,820 INFO L226 Difference]: Without dead ends: 20935 [2019-12-07 18:41:20,820 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 18:41:20,893 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20935 states. [2019-12-07 18:41:21,041 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20935 to 15752. [2019-12-07 18:41:21,041 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15752 states. [2019-12-07 18:41:21,062 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15752 states to 15752 states and 48027 transitions. [2019-12-07 18:41:21,062 INFO L78 Accepts]: Start accepts. Automaton has 15752 states and 48027 transitions. Word has length 66 [2019-12-07 18:41:21,063 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:41:21,063 INFO L462 AbstractCegarLoop]: Abstraction has 15752 states and 48027 transitions. [2019-12-07 18:41:21,063 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 18:41:21,063 INFO L276 IsEmpty]: Start isEmpty. Operand 15752 states and 48027 transitions. [2019-12-07 18:41:21,076 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:41:21,076 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:41:21,076 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:41:21,076 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:41:21,076 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:41:21,076 INFO L82 PathProgramCache]: Analyzing trace with hash 1394509299, now seen corresponding path program 1 times [2019-12-07 18:41:21,076 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:41:21,076 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1140605192] [2019-12-07 18:41:21,077 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:41:21,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:41:21,115 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:41:21,115 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1140605192] [2019-12-07 18:41:21,115 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:41:21,115 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 18:41:21,115 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [339413504] [2019-12-07 18:41:21,115 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 18:41:21,116 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:41:21,116 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 18:41:21,116 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 18:41:21,116 INFO L87 Difference]: Start difference. First operand 15752 states and 48027 transitions. Second operand 4 states. [2019-12-07 18:41:21,199 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:41:21,199 INFO L93 Difference]: Finished difference Result 15580 states and 47314 transitions. [2019-12-07 18:41:21,200 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 18:41:21,200 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 18:41:21,200 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:41:21,217 INFO L225 Difference]: With dead ends: 15580 [2019-12-07 18:41:21,217 INFO L226 Difference]: Without dead ends: 15580 [2019-12-07 18:41:21,217 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:41:21,279 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15580 states. [2019-12-07 18:41:21,404 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15580 to 14091. [2019-12-07 18:41:21,405 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14091 states. [2019-12-07 18:41:21,426 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14091 states to 14091 states and 42650 transitions. [2019-12-07 18:41:21,426 INFO L78 Accepts]: Start accepts. Automaton has 14091 states and 42650 transitions. Word has length 67 [2019-12-07 18:41:21,426 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:41:21,426 INFO L462 AbstractCegarLoop]: Abstraction has 14091 states and 42650 transitions. [2019-12-07 18:41:21,426 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 18:41:21,426 INFO L276 IsEmpty]: Start isEmpty. Operand 14091 states and 42650 transitions. [2019-12-07 18:41:21,438 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:41:21,438 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:41:21,438 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:41:21,438 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:41:21,438 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:41:21,439 INFO L82 PathProgramCache]: Analyzing trace with hash -869199490, now seen corresponding path program 1 times [2019-12-07 18:41:21,439 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:41:21,439 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [323307001] [2019-12-07 18:41:21,439 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:41:21,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:41:21,517 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:41:21,517 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [323307001] [2019-12-07 18:41:21,517 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:41:21,517 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 18:41:21,517 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [346569630] [2019-12-07 18:41:21,517 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 18:41:21,518 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:41:21,518 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 18:41:21,518 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 18:41:21,518 INFO L87 Difference]: Start difference. First operand 14091 states and 42650 transitions. Second operand 7 states. [2019-12-07 18:41:21,980 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:41:21,981 INFO L93 Difference]: Finished difference Result 67855 states and 202642 transitions. [2019-12-07 18:41:21,981 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 18:41:21,981 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 67 [2019-12-07 18:41:21,981 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:41:22,031 INFO L225 Difference]: With dead ends: 67855 [2019-12-07 18:41:22,031 INFO L226 Difference]: Without dead ends: 47320 [2019-12-07 18:41:22,032 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=78, Invalid=228, Unknown=0, NotChecked=0, Total=306 [2019-12-07 18:41:22,160 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47320 states. [2019-12-07 18:41:22,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47320 to 16499. [2019-12-07 18:41:22,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16499 states. [2019-12-07 18:41:22,446 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16499 states to 16499 states and 49591 transitions. [2019-12-07 18:41:22,446 INFO L78 Accepts]: Start accepts. Automaton has 16499 states and 49591 transitions. Word has length 67 [2019-12-07 18:41:22,446 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:41:22,446 INFO L462 AbstractCegarLoop]: Abstraction has 16499 states and 49591 transitions. [2019-12-07 18:41:22,446 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 18:41:22,446 INFO L276 IsEmpty]: Start isEmpty. Operand 16499 states and 49591 transitions. [2019-12-07 18:41:22,460 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:41:22,460 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:41:22,460 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:41:22,460 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:41:22,460 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:41:22,460 INFO L82 PathProgramCache]: Analyzing trace with hash -825405888, now seen corresponding path program 2 times [2019-12-07 18:41:22,460 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:41:22,460 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1538845113] [2019-12-07 18:41:22,461 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:41:22,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:41:22,612 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:41:22,612 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1538845113] [2019-12-07 18:41:22,612 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:41:22,612 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:41:22,613 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1677683092] [2019-12-07 18:41:22,613 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:41:22,613 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:41:22,613 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:41:22,613 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:41:22,613 INFO L87 Difference]: Start difference. First operand 16499 states and 49591 transitions. Second operand 11 states. [2019-12-07 18:41:23,752 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:41:23,752 INFO L93 Difference]: Finished difference Result 62791 states and 188486 transitions. [2019-12-07 18:41:23,752 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2019-12-07 18:41:23,752 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 18:41:23,753 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:41:23,820 INFO L225 Difference]: With dead ends: 62791 [2019-12-07 18:41:23,820 INFO L226 Difference]: Without dead ends: 60876 [2019-12-07 18:41:23,821 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 503 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=364, Invalid=1442, Unknown=0, NotChecked=0, Total=1806 [2019-12-07 18:41:23,983 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60876 states. [2019-12-07 18:41:24,308 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60876 to 20532. [2019-12-07 18:41:24,309 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20532 states. [2019-12-07 18:41:24,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20532 states to 20532 states and 61610 transitions. [2019-12-07 18:41:24,336 INFO L78 Accepts]: Start accepts. Automaton has 20532 states and 61610 transitions. Word has length 67 [2019-12-07 18:41:24,336 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:41:24,336 INFO L462 AbstractCegarLoop]: Abstraction has 20532 states and 61610 transitions. [2019-12-07 18:41:24,336 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:41:24,336 INFO L276 IsEmpty]: Start isEmpty. Operand 20532 states and 61610 transitions. [2019-12-07 18:41:24,352 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:41:24,352 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:41:24,352 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:41:24,352 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:41:24,353 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:41:24,353 INFO L82 PathProgramCache]: Analyzing trace with hash 289864222, now seen corresponding path program 3 times [2019-12-07 18:41:24,353 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:41:24,353 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [905532786] [2019-12-07 18:41:24,353 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:41:24,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:41:24,523 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:41:24,523 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [905532786] [2019-12-07 18:41:24,523 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:41:24,523 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 18:41:24,524 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1796181627] [2019-12-07 18:41:24,524 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 18:41:24,524 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:41:24,524 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 18:41:24,524 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=128, Unknown=0, NotChecked=0, Total=156 [2019-12-07 18:41:24,524 INFO L87 Difference]: Start difference. First operand 20532 states and 61610 transitions. Second operand 13 states. [2019-12-07 18:41:31,986 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:41:31,986 INFO L93 Difference]: Finished difference Result 68148 states and 200675 transitions. [2019-12-07 18:41:31,987 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 93 states. [2019-12-07 18:41:31,987 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 67 [2019-12-07 18:41:31,987 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:41:32,038 INFO L225 Difference]: With dead ends: 68148 [2019-12-07 18:41:32,038 INFO L226 Difference]: Without dead ends: 47817 [2019-12-07 18:41:32,041 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 92 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3064 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=1236, Invalid=7506, Unknown=0, NotChecked=0, Total=8742 [2019-12-07 18:41:32,168 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47817 states. [2019-12-07 18:41:32,443 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47817 to 19585. [2019-12-07 18:41:32,443 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19585 states. [2019-12-07 18:41:32,473 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19585 states to 19585 states and 58017 transitions. [2019-12-07 18:41:32,473 INFO L78 Accepts]: Start accepts. Automaton has 19585 states and 58017 transitions. Word has length 67 [2019-12-07 18:41:32,474 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:41:32,474 INFO L462 AbstractCegarLoop]: Abstraction has 19585 states and 58017 transitions. [2019-12-07 18:41:32,474 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 18:41:32,474 INFO L276 IsEmpty]: Start isEmpty. Operand 19585 states and 58017 transitions. [2019-12-07 18:41:32,490 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:41:32,490 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:41:32,491 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:41:32,491 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:41:32,491 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:41:32,491 INFO L82 PathProgramCache]: Analyzing trace with hash 974434770, now seen corresponding path program 4 times [2019-12-07 18:41:32,491 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:41:32,491 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [781060279] [2019-12-07 18:41:32,491 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:41:32,513 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:41:32,819 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:41:32,820 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [781060279] [2019-12-07 18:41:32,820 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:41:32,820 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 18:41:32,820 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1198317642] [2019-12-07 18:41:32,820 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 18:41:32,820 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:41:32,820 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 18:41:32,821 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=205, Unknown=0, NotChecked=0, Total=240 [2019-12-07 18:41:32,821 INFO L87 Difference]: Start difference. First operand 19585 states and 58017 transitions. Second operand 16 states. [2019-12-07 18:41:36,093 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:41:36,093 INFO L93 Difference]: Finished difference Result 50453 states and 147202 transitions. [2019-12-07 18:41:36,093 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2019-12-07 18:41:36,093 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 18:41:36,094 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:41:36,148 INFO L225 Difference]: With dead ends: 50453 [2019-12-07 18:41:36,149 INFO L226 Difference]: Without dead ends: 48440 [2019-12-07 18:41:36,150 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 0 SyntacticMatches, 5 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 495 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=286, Invalid=1876, Unknown=0, NotChecked=0, Total=2162 [2019-12-07 18:41:36,280 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48440 states. [2019-12-07 18:41:36,561 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48440 to 20218. [2019-12-07 18:41:36,561 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20218 states. [2019-12-07 18:41:36,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20218 states to 20218 states and 59359 transitions. [2019-12-07 18:41:36,591 INFO L78 Accepts]: Start accepts. Automaton has 20218 states and 59359 transitions. Word has length 67 [2019-12-07 18:41:36,592 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:41:36,592 INFO L462 AbstractCegarLoop]: Abstraction has 20218 states and 59359 transitions. [2019-12-07 18:41:36,592 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 18:41:36,592 INFO L276 IsEmpty]: Start isEmpty. Operand 20218 states and 59359 transitions. [2019-12-07 18:41:36,608 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:41:36,608 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:41:36,609 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:41:36,609 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:41:36,609 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:41:36,609 INFO L82 PathProgramCache]: Analyzing trace with hash -336813154, now seen corresponding path program 5 times [2019-12-07 18:41:36,609 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:41:36,609 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [928302282] [2019-12-07 18:41:36,609 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:41:36,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:41:36,930 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:41:36,930 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [928302282] [2019-12-07 18:41:36,930 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:41:36,930 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2019-12-07 18:41:36,930 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1581218235] [2019-12-07 18:41:36,930 INFO L442 AbstractCegarLoop]: Interpolant automaton has 17 states [2019-12-07 18:41:36,930 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:41:36,931 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 18:41:36,931 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=225, Unknown=0, NotChecked=0, Total=272 [2019-12-07 18:41:36,931 INFO L87 Difference]: Start difference. First operand 20218 states and 59359 transitions. Second operand 17 states. [2019-12-07 18:41:43,295 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:41:43,295 INFO L93 Difference]: Finished difference Result 53187 states and 153043 transitions. [2019-12-07 18:41:43,295 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 70 states. [2019-12-07 18:41:43,295 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 67 [2019-12-07 18:41:43,295 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:41:43,358 INFO L225 Difference]: With dead ends: 53187 [2019-12-07 18:41:43,358 INFO L226 Difference]: Without dead ends: 51034 [2019-12-07 18:41:43,360 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 71 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1786 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=815, Invalid=4441, Unknown=0, NotChecked=0, Total=5256 [2019-12-07 18:41:43,493 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51034 states. [2019-12-07 18:41:43,793 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51034 to 20224. [2019-12-07 18:41:43,794 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20224 states. [2019-12-07 18:41:43,826 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20224 states to 20224 states and 59382 transitions. [2019-12-07 18:41:43,826 INFO L78 Accepts]: Start accepts. Automaton has 20224 states and 59382 transitions. Word has length 67 [2019-12-07 18:41:43,826 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:41:43,826 INFO L462 AbstractCegarLoop]: Abstraction has 20224 states and 59382 transitions. [2019-12-07 18:41:43,826 INFO L463 AbstractCegarLoop]: Interpolant automaton has 17 states. [2019-12-07 18:41:43,826 INFO L276 IsEmpty]: Start isEmpty. Operand 20224 states and 59382 transitions. [2019-12-07 18:41:43,844 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:41:43,844 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:41:43,845 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:41:43,845 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:41:43,845 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:41:43,845 INFO L82 PathProgramCache]: Analyzing trace with hash 2084926540, now seen corresponding path program 6 times [2019-12-07 18:41:43,845 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:41:43,845 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1881645629] [2019-12-07 18:41:43,845 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:41:43,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:41:43,902 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:41:43,903 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1881645629] [2019-12-07 18:41:43,903 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:41:43,903 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 18:41:43,903 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1522787367] [2019-12-07 18:41:43,903 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 18:41:43,903 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:41:43,904 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 18:41:43,904 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 18:41:43,904 INFO L87 Difference]: Start difference. First operand 20224 states and 59382 transitions. Second operand 5 states. [2019-12-07 18:41:44,044 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:41:44,044 INFO L93 Difference]: Finished difference Result 61140 states and 179439 transitions. [2019-12-07 18:41:44,044 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 18:41:44,044 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 67 [2019-12-07 18:41:44,045 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:41:44,064 INFO L225 Difference]: With dead ends: 61140 [2019-12-07 18:41:44,064 INFO L226 Difference]: Without dead ends: 17257 [2019-12-07 18:41:44,064 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2019-12-07 18:41:44,127 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17257 states. [2019-12-07 18:41:44,269 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17257 to 17257. [2019-12-07 18:41:44,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17257 states. [2019-12-07 18:41:44,294 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17257 states to 17257 states and 50535 transitions. [2019-12-07 18:41:44,294 INFO L78 Accepts]: Start accepts. Automaton has 17257 states and 50535 transitions. Word has length 67 [2019-12-07 18:41:44,294 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:41:44,294 INFO L462 AbstractCegarLoop]: Abstraction has 17257 states and 50535 transitions. [2019-12-07 18:41:44,294 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 18:41:44,294 INFO L276 IsEmpty]: Start isEmpty. Operand 17257 states and 50535 transitions. [2019-12-07 18:41:44,308 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:41:44,308 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:41:44,308 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:41:44,308 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:41:44,308 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:41:44,308 INFO L82 PathProgramCache]: Analyzing trace with hash 427599030, now seen corresponding path program 7 times [2019-12-07 18:41:44,309 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:41:44,309 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1916370970] [2019-12-07 18:41:44,309 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:41:44,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 18:41:44,436 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 18:41:44,436 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1916370970] [2019-12-07 18:41:44,436 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 18:41:44,437 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 18:41:44,437 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [831626223] [2019-12-07 18:41:44,437 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 18:41:44,437 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 18:41:44,437 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 18:41:44,437 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 18:41:44,437 INFO L87 Difference]: Start difference. First operand 17257 states and 50535 transitions. Second operand 11 states. [2019-12-07 18:41:45,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 18:41:45,315 INFO L93 Difference]: Finished difference Result 22388 states and 64745 transitions. [2019-12-07 18:41:45,316 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 18:41:45,316 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 18:41:45,317 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 18:41:45,347 INFO L225 Difference]: With dead ends: 22388 [2019-12-07 18:41:45,347 INFO L226 Difference]: Without dead ends: 19734 [2019-12-07 18:41:45,347 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 118 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=123, Invalid=579, Unknown=0, NotChecked=0, Total=702 [2019-12-07 18:41:45,415 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19734 states. [2019-12-07 18:41:45,560 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19734 to 15339. [2019-12-07 18:41:45,561 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15339 states. [2019-12-07 18:41:45,584 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15339 states to 15339 states and 44953 transitions. [2019-12-07 18:41:45,584 INFO L78 Accepts]: Start accepts. Automaton has 15339 states and 44953 transitions. Word has length 67 [2019-12-07 18:41:45,584 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 18:41:45,584 INFO L462 AbstractCegarLoop]: Abstraction has 15339 states and 44953 transitions. [2019-12-07 18:41:45,584 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 18:41:45,584 INFO L276 IsEmpty]: Start isEmpty. Operand 15339 states and 44953 transitions. [2019-12-07 18:41:45,602 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 18:41:45,602 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 18:41:45,602 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 18:41:45,603 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 18:41:45,603 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 18:41:45,603 INFO L82 PathProgramCache]: Analyzing trace with hash 1080421452, now seen corresponding path program 8 times [2019-12-07 18:41:45,603 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 18:41:45,603 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [217376599] [2019-12-07 18:41:45,603 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 18:41:45,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:41:45,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 18:41:45,673 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 18:41:45,673 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 18:41:45,676 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [891] [891] ULTIMATE.startENTRY-->L815: Formula: (let ((.cse0 (store |v_#valid_74| 0 0))) (and (= 0 v_~__unbuffered_p2_EAX~0_43) (= v_~y$r_buff1_thd1~0_178 0) (= 0 v_~y$read_delayed_var~0.offset_7) (= v_~y$w_buff1_used~0_439 0) (= v_~y$w_buff1~0_188 0) (= 0 v_~y$r_buff1_thd3~0_309) (= v_~y$read_delayed~0_7 0) (= v_~y$r_buff1_thd0~0_201 0) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t2408~0.base_39| 4)) (= v_~main$tmp_guard0~0_41 0) (= 0 v_~y$w_buff0~0_254) (= 0 v_~y$r_buff0_thd3~0_343) (< 0 |v_#StackHeapBarrier_15|) (= v_~main$tmp_guard1~0_39 0) (= v_~__unbuffered_p2_EBX~0_50 0) (= 0 v_~y$flush_delayed~0_35) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t2408~0.base_39| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t2408~0.base_39|) |v_ULTIMATE.start_main_~#t2408~0.offset_26| 0)) |v_#memory_int_23|) (= 0 v_~y$r_buff0_thd2~0_104) (= v_~weak$$choice2~0_129 0) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t2408~0.base_39|) (= 0 |v_#NULL.base_4|) (= 0 v_~y$read_delayed_var~0.base_7) (= v_~y$r_buff0_thd0~0_134 0) (= 0 v_~weak$$choice0~0_22) (= v_~y$mem_tmp~0_24 0) (= |v_#valid_72| (store .cse0 |v_ULTIMATE.start_main_~#t2408~0.base_39| 1)) (= v_~y$w_buff0_used~0_785 0) (= |v_#NULL.offset_4| 0) (= 0 v_~x~0_158) (= 0 v_~y$r_buff1_thd2~0_197) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t2408~0.base_39|)) (= v_~y~0_189 0) (= |v_ULTIMATE.start_main_~#t2408~0.offset_26| 0) (= v_~y$r_buff0_thd1~0_218 0) (= v_~__unbuffered_cnt~0_118 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_74|, #memory_int=|v_#memory_int_24|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_~#t2409~0.base=|v_ULTIMATE.start_main_~#t2409~0.base_37|, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_785, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_133|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_293|, ULTIMATE.start_main_~#t2409~0.offset=|v_ULTIMATE.start_main_~#t2409~0.offset_25|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_39, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_104|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_47|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_178, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_78|, ~y$mem_tmp~0=v_~y$mem_tmp~0_24, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_37|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_309, ~y$w_buff0~0=v_~y$w_buff0~0_254, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_343, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_218, ~y$flush_delayed~0=v_~y$flush_delayed~0_35, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_43, ~y~0=v_~y~0_189, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_50, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_18|, ULTIMATE.start_main_~#t2408~0.offset=|v_ULTIMATE.start_main_~#t2408~0.offset_26|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ULTIMATE.start_main_~#t2408~0.base=|v_ULTIMATE.start_main_~#t2408~0.base_39|, ULTIMATE.start_main_~#t2410~0.base=|v_ULTIMATE.start_main_~#t2410~0.base_27|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_41, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_~#t2410~0.offset=|v_ULTIMATE.start_main_~#t2410~0.offset_20|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_197, ~weak$$choice0~0=v_~weak$$choice0~0_22, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ~y$w_buff1~0=v_~y$w_buff1~0_188, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_27|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_134, #valid=|v_#valid_72|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_104, #memory_int=|v_#memory_int_23|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_118, ~weak$$choice2~0=v_~weak$$choice2~0_129, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_201, ~x~0=v_~x~0_158, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_439} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2409~0.base, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_~#t2409~0.offset, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_#t~ite50, ~y$read_delayed~0, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite52, ~y$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~y$r_buff1_thd3~0, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ~y~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_~#t2408~0.offset, ULTIMATE.start_main_#t~nondet44, ULTIMATE.start_main_#t~nondet45, ULTIMATE.start_main_~#t2408~0.base, ULTIMATE.start_main_~#t2410~0.base, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_~#t2410~0.offset, ~y$r_buff1_thd2~0, ~weak$$choice0~0, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, ~y$r_buff0_thd2~0, #memory_int, ~__unbuffered_cnt~0, ~weak$$choice2~0, ~y$r_buff1_thd0~0, ~x~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 18:41:45,676 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] P0ENTRY-->L4-3: Formula: (and (= v_~y$w_buff1_used~0_76 v_~y$w_buff0_used~0_125) (= v_~y$w_buff0~0_37 v_~y$w_buff1~0_27) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_13 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_11|) (= v_~y$w_buff0_used~0_124 1) (= v_P0Thread1of1ForFork0_~arg.base_11 |v_P0Thread1of1ForFork0_#in~arg.base_13|) (= v_P0Thread1of1ForFork0_~arg.offset_11 |v_P0Thread1of1ForFork0_#in~arg.offset_13|) (= 1 v_~y$w_buff0~0_36) (= |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_11| (ite (not (and (not (= 0 (mod v_~y$w_buff1_used~0_76 256))) (not (= (mod v_~y$w_buff0_used~0_124 256) 0)))) 1 0)) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_13 0))) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_13|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_125, ~y$w_buff0~0=v_~y$w_buff0~0_37, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_13|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_13|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_124, ~y$w_buff1~0=v_~y$w_buff1~0_27, ~y$w_buff0~0=v_~y$w_buff0~0_36, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_13, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_13|, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_11, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_11|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_11, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_76} AuxVars[] AssignedVars[~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 18:41:45,676 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L815-1-->L817: Formula: (and (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2409~0.base_11|) (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t2409~0.base_11| 1)) (= |v_ULTIMATE.start_main_~#t2409~0.offset_10| 0) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t2409~0.base_11| 4)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2409~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2409~0.base_11|) |v_ULTIMATE.start_main_~#t2409~0.offset_10| 1)) |v_#memory_int_15|) (not (= |v_ULTIMATE.start_main_~#t2409~0.base_11| 0)) (= 0 (select |v_#valid_40| |v_ULTIMATE.start_main_~#t2409~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t2409~0.base=|v_ULTIMATE.start_main_~#t2409~0.base_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t2409~0.offset=|v_ULTIMATE.start_main_~#t2409~0.offset_10|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2409~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t2409~0.offset, #length] because there is no mapped edge [2019-12-07 18:41:45,677 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L817-1-->L819: Formula: (and (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2410~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2410~0.base_11|) |v_ULTIMATE.start_main_~#t2410~0.offset_10| 2)) |v_#memory_int_13|) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t2410~0.base_11| 1)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t2410~0.base_11|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t2410~0.base_11| 4)) (= (select |v_#valid_32| |v_ULTIMATE.start_main_~#t2410~0.base_11|) 0) (= 0 |v_ULTIMATE.start_main_~#t2410~0.offset_10|) (not (= |v_ULTIMATE.start_main_~#t2410~0.base_11| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t2410~0.offset=|v_ULTIMATE.start_main_~#t2410~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_31|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t2410~0.base=|v_ULTIMATE.start_main_~#t2410~0.base_11|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2410~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t2410~0.base, #length] because there is no mapped edge [2019-12-07 18:41:45,679 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L782-->L782-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-1712075487 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite24_Out-1712075487| |P2Thread1of1ForFork2_#t~ite23_Out-1712075487|) .cse0 (= |P2Thread1of1ForFork2_#t~ite23_Out-1712075487| ~y$w_buff1~0_In-1712075487) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-1712075487 256)))) (or (= 0 (mod ~y$w_buff0_used~0_In-1712075487 256)) (and (= 0 (mod ~y$r_buff1_thd3~0_In-1712075487 256)) .cse1) (and (= 0 (mod ~y$w_buff1_used~0_In-1712075487 256)) .cse1)))) (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite24_Out-1712075487| ~y$w_buff1~0_In-1712075487) (= |P2Thread1of1ForFork2_#t~ite23_In-1712075487| |P2Thread1of1ForFork2_#t~ite23_Out-1712075487|)))) InVars {P2Thread1of1ForFork2_#t~ite23=|P2Thread1of1ForFork2_#t~ite23_In-1712075487|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1712075487, ~y$w_buff1~0=~y$w_buff1~0_In-1712075487, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1712075487, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1712075487, ~weak$$choice2~0=~weak$$choice2~0_In-1712075487, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1712075487} OutVars{P2Thread1of1ForFork2_#t~ite23=|P2Thread1of1ForFork2_#t~ite23_Out-1712075487|, P2Thread1of1ForFork2_#t~ite24=|P2Thread1of1ForFork2_#t~ite24_Out-1712075487|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1712075487, ~y$w_buff1~0=~y$w_buff1~0_In-1712075487, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1712075487, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1712075487, ~weak$$choice2~0=~weak$$choice2~0_In-1712075487, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1712075487} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite23, P2Thread1of1ForFork2_#t~ite24] because there is no mapped edge [2019-12-07 18:41:45,680 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L783-->L783-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-358104250 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite26_In-358104250| |P2Thread1of1ForFork2_#t~ite26_Out-358104250|) (= ~y$w_buff0_used~0_In-358104250 |P2Thread1of1ForFork2_#t~ite27_Out-358104250|) (not .cse0)) (and .cse0 (= ~y$w_buff0_used~0_In-358104250 |P2Thread1of1ForFork2_#t~ite26_Out-358104250|) (= |P2Thread1of1ForFork2_#t~ite27_Out-358104250| |P2Thread1of1ForFork2_#t~ite26_Out-358104250|) (let ((.cse1 (= (mod ~y$r_buff0_thd3~0_In-358104250 256) 0))) (or (= (mod ~y$w_buff0_used~0_In-358104250 256) 0) (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In-358104250 256))) (and .cse1 (= 0 (mod ~y$r_buff1_thd3~0_In-358104250 256)))))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-358104250, P2Thread1of1ForFork2_#t~ite26=|P2Thread1of1ForFork2_#t~ite26_In-358104250|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-358104250, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-358104250, ~weak$$choice2~0=~weak$$choice2~0_In-358104250, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-358104250} OutVars{P2Thread1of1ForFork2_#t~ite26=|P2Thread1of1ForFork2_#t~ite26_Out-358104250|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-358104250, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-358104250, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-358104250, ~weak$$choice2~0=~weak$$choice2~0_In-358104250, P2Thread1of1ForFork2_#t~ite27=|P2Thread1of1ForFork2_#t~ite27_Out-358104250|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-358104250} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite26, P2Thread1of1ForFork2_#t~ite27] because there is no mapped edge [2019-12-07 18:41:45,680 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L784-->L784-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1000278414 256)))) (or (and .cse0 (= |P2Thread1of1ForFork2_#t~ite30_Out-1000278414| |P2Thread1of1ForFork2_#t~ite29_Out-1000278414|) (let ((.cse1 (= (mod ~y$r_buff0_thd3~0_In-1000278414 256) 0))) (or (and (= (mod ~y$r_buff1_thd3~0_In-1000278414 256) 0) .cse1) (= (mod ~y$w_buff0_used~0_In-1000278414 256) 0) (and (= (mod ~y$w_buff1_used~0_In-1000278414 256) 0) .cse1))) (= ~y$w_buff1_used~0_In-1000278414 |P2Thread1of1ForFork2_#t~ite29_Out-1000278414|)) (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite30_Out-1000278414| ~y$w_buff1_used~0_In-1000278414) (= |P2Thread1of1ForFork2_#t~ite29_In-1000278414| |P2Thread1of1ForFork2_#t~ite29_Out-1000278414|)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1000278414, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1000278414, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1000278414, ~weak$$choice2~0=~weak$$choice2~0_In-1000278414, P2Thread1of1ForFork2_#t~ite29=|P2Thread1of1ForFork2_#t~ite29_In-1000278414|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1000278414} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1000278414, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1000278414, P2Thread1of1ForFork2_#t~ite30=|P2Thread1of1ForFork2_#t~ite30_Out-1000278414|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1000278414, ~weak$$choice2~0=~weak$$choice2~0_In-1000278414, P2Thread1of1ForFork2_#t~ite29=|P2Thread1of1ForFork2_#t~ite29_Out-1000278414|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1000278414} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite30, P2Thread1of1ForFork2_#t~ite29] because there is no mapped edge [2019-12-07 18:41:45,680 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [784] [784] L785-->L786: Formula: (and (= v_~y$r_buff0_thd3~0_93 v_~y$r_buff0_thd3~0_92) (not (= (mod v_~weak$$choice2~0_23 256) 0))) InVars {~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_93, ~weak$$choice2~0=v_~weak$$choice2~0_23} OutVars{P2Thread1of1ForFork2_#t~ite31=|v_P2Thread1of1ForFork2_#t~ite31_6|, P2Thread1of1ForFork2_#t~ite33=|v_P2Thread1of1ForFork2_#t~ite33_7|, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_92, P2Thread1of1ForFork2_#t~ite32=|v_P2Thread1of1ForFork2_#t~ite32_8|, ~weak$$choice2~0=v_~weak$$choice2~0_23} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite31, P2Thread1of1ForFork2_#t~ite33, ~y$r_buff0_thd3~0, P2Thread1of1ForFork2_#t~ite32] because there is no mapped edge [2019-12-07 18:41:45,681 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [808] [808] L788-->L792: Formula: (and (= v_~y~0_52 v_~y$mem_tmp~0_5) (not (= 0 (mod v_~y$flush_delayed~0_7 256))) (= 0 v_~y$flush_delayed~0_6)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_5, ~y$flush_delayed~0=v_~y$flush_delayed~0_7} OutVars{P2Thread1of1ForFork2_#t~ite37=|v_P2Thread1of1ForFork2_#t~ite37_5|, ~y$mem_tmp~0=v_~y$mem_tmp~0_5, ~y$flush_delayed~0=v_~y$flush_delayed~0_6, ~y~0=v_~y~0_52} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite37, ~y$flush_delayed~0, ~y~0] because there is no mapped edge [2019-12-07 18:41:45,681 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L792-2-->L792-4: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff1_thd3~0_In-1973632962 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-1973632962 256)))) (or (and (not .cse0) (not .cse1) (= ~y$w_buff1~0_In-1973632962 |P2Thread1of1ForFork2_#t~ite38_Out-1973632962|)) (and (= ~y~0_In-1973632962 |P2Thread1of1ForFork2_#t~ite38_Out-1973632962|) (or .cse1 .cse0)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1973632962, ~y$w_buff1~0=~y$w_buff1~0_In-1973632962, ~y~0=~y~0_In-1973632962, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1973632962} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1973632962, ~y$w_buff1~0=~y$w_buff1~0_In-1973632962, ~y~0=~y~0_In-1973632962, P2Thread1of1ForFork2_#t~ite38=|P2Thread1of1ForFork2_#t~ite38_Out-1973632962|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1973632962} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite38] because there is no mapped edge [2019-12-07 18:41:45,682 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L743-->L743-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd1~0_In-1918085567 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-1918085567 256) 0))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out-1918085567|) (not .cse1)) (and (= ~y$w_buff0_used~0_In-1918085567 |P0Thread1of1ForFork0_#t~ite5_Out-1918085567|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1918085567, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1918085567} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-1918085567|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1918085567, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1918085567} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 18:41:45,682 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [816] [816] L744-->L744-2: Formula: (let ((.cse2 (= (mod ~y$w_buff1_used~0_In1898225073 256) 0)) (.cse3 (= (mod ~y$r_buff1_thd1~0_In1898225073 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd1~0_In1898225073 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In1898225073 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In1898225073 |P0Thread1of1ForFork0_#t~ite6_Out1898225073|) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out1898225073|)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1898225073, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1898225073, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1898225073, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1898225073} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out1898225073|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1898225073, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1898225073, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1898225073, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1898225073} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 18:41:45,683 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L759-2-->L759-5: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In-1781854064 256))) (.cse2 (= |P1Thread1of1ForFork1_#t~ite9_Out-1781854064| |P1Thread1of1ForFork1_#t~ite10_Out-1781854064|)) (.cse1 (= (mod ~y$r_buff1_thd2~0_In-1781854064 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite9_Out-1781854064| ~y~0_In-1781854064) .cse2) (and (not .cse0) .cse2 (= ~y$w_buff1~0_In-1781854064 |P1Thread1of1ForFork1_#t~ite9_Out-1781854064|) (not .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1781854064, ~y$w_buff1~0=~y$w_buff1~0_In-1781854064, ~y~0=~y~0_In-1781854064, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1781854064} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1781854064, ~y$w_buff1~0=~y$w_buff1~0_In-1781854064, P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out-1781854064|, P1Thread1of1ForFork1_#t~ite10=|P1Thread1of1ForFork1_#t~ite10_Out-1781854064|, ~y~0=~y~0_In-1781854064, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1781854064} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10] because there is no mapped edge [2019-12-07 18:41:45,683 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L792-4-->L793: Formula: (= v_~y~0_32 |v_P2Thread1of1ForFork2_#t~ite38_10|) InVars {P2Thread1of1ForFork2_#t~ite38=|v_P2Thread1of1ForFork2_#t~ite38_10|} OutVars{~y~0=v_~y~0_32, P2Thread1of1ForFork2_#t~ite39=|v_P2Thread1of1ForFork2_#t~ite39_5|, P2Thread1of1ForFork2_#t~ite38=|v_P2Thread1of1ForFork2_#t~ite38_9|} AuxVars[] AssignedVars[~y~0, P2Thread1of1ForFork2_#t~ite39, P2Thread1of1ForFork2_#t~ite38] because there is no mapped edge [2019-12-07 18:41:45,683 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L793-->L793-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In1669515767 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd3~0_In1669515767 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork2_#t~ite40_Out1669515767|)) (and (= ~y$w_buff0_used~0_In1669515767 |P2Thread1of1ForFork2_#t~ite40_Out1669515767|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1669515767, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1669515767} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1669515767, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1669515767, P2Thread1of1ForFork2_#t~ite40=|P2Thread1of1ForFork2_#t~ite40_Out1669515767|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite40] because there is no mapped edge [2019-12-07 18:41:45,683 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L794-->L794-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1266182369 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-1266182369 256))) (.cse2 (= (mod ~y$r_buff1_thd3~0_In-1266182369 256) 0)) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In-1266182369 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite41_Out-1266182369| ~y$w_buff1_used~0_In-1266182369) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork2_#t~ite41_Out-1266182369| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1266182369, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1266182369, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1266182369, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1266182369} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1266182369, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1266182369, P2Thread1of1ForFork2_#t~ite41=|P2Thread1of1ForFork2_#t~ite41_Out-1266182369|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1266182369, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1266182369} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite41] because there is no mapped edge [2019-12-07 18:41:45,684 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L795-->L795-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In1228075538 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In1228075538 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite42_Out1228075538| 0)) (and (= |P2Thread1of1ForFork2_#t~ite42_Out1228075538| ~y$r_buff0_thd3~0_In1228075538) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1228075538, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1228075538} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1228075538, P2Thread1of1ForFork2_#t~ite42=|P2Thread1of1ForFork2_#t~ite42_Out1228075538|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1228075538} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite42] because there is no mapped edge [2019-12-07 18:41:45,684 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L796-->L796-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff0_thd3~0_In-1143063478 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In-1143063478 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd3~0_In-1143063478 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-1143063478 256)))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite43_Out-1143063478|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse0 .cse1) (= ~y$r_buff1_thd3~0_In-1143063478 |P2Thread1of1ForFork2_#t~ite43_Out-1143063478|)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1143063478, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1143063478, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1143063478, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1143063478} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1143063478, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1143063478, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1143063478, P2Thread1of1ForFork2_#t~ite43=|P2Thread1of1ForFork2_#t~ite43_Out-1143063478|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1143063478} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite43] because there is no mapped edge [2019-12-07 18:41:45,684 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L745-->L746: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1373842439 256))) (.cse0 (= (mod ~y$r_buff0_thd1~0_In-1373842439 256) 0)) (.cse2 (= ~y$r_buff0_thd1~0_In-1373842439 ~y$r_buff0_thd1~0_Out-1373842439))) (or (and (= 0 ~y$r_buff0_thd1~0_Out-1373842439) (not .cse0) (not .cse1)) (and .cse1 .cse2) (and .cse0 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1373842439, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1373842439} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1373842439, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-1373842439|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_Out-1373842439} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~y$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:41:45,684 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L746-->L746-2: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In380352156 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd1~0_In380352156 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd1~0_In380352156 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In380352156 256) 0))) (or (and (= ~y$r_buff1_thd1~0_In380352156 |P0Thread1of1ForFork0_#t~ite8_Out380352156|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite8_Out380352156| 0)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In380352156, ~y$w_buff0_used~0=~y$w_buff0_used~0_In380352156, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In380352156, ~y$w_buff1_used~0=~y$w_buff1_used~0_In380352156} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In380352156, ~y$w_buff0_used~0=~y$w_buff0_used~0_In380352156, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out380352156|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In380352156, ~y$w_buff1_used~0=~y$w_buff1_used~0_In380352156} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 18:41:45,684 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [869] [869] L746-2-->P0EXIT: Formula: (and (= v_~y$r_buff1_thd1~0_95 |v_P0Thread1of1ForFork0_#t~ite8_36|) (= v_~__unbuffered_cnt~0_73 (+ v_~__unbuffered_cnt~0_74 1)) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_74} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_95, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_35|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_73} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 18:41:45,684 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [863] [863] L796-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_49 1) v_~__unbuffered_cnt~0_48) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= |v_P2Thread1of1ForFork2_#t~ite43_32| v_~y$r_buff1_thd3~0_152)) InVars {P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_152, P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_31|, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~y$r_buff1_thd3~0, P2Thread1of1ForFork2_#t~ite43, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 18:41:45,685 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L760-->L760-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In268270463 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In268270463 256)))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out268270463|) (not .cse1)) (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In268270463 |P1Thread1of1ForFork1_#t~ite11_Out268270463|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In268270463, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In268270463} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In268270463, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In268270463, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out268270463|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 18:41:45,685 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L761-->L761-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff1_thd2~0_In-9624593 256))) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In-9624593 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In-9624593 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-9624593 256)))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite12_Out-9624593|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= ~y$w_buff1_used~0_In-9624593 |P1Thread1of1ForFork1_#t~ite12_Out-9624593|) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-9624593, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-9624593, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-9624593, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-9624593} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-9624593, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-9624593, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-9624593, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-9624593|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-9624593} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 18:41:45,686 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L762-->L762-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In1386948943 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In1386948943 256) 0))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite13_Out1386948943|) (not .cse0) (not .cse1)) (and (= ~y$r_buff0_thd2~0_In1386948943 |P1Thread1of1ForFork1_#t~ite13_Out1386948943|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1386948943, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1386948943} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1386948943, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1386948943, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out1386948943|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 18:41:45,686 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L763-->L763-2: Formula: (let ((.cse2 (= 0 (mod ~y$w_buff1_used~0_In507688556 256))) (.cse3 (= (mod ~y$r_buff1_thd2~0_In507688556 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd2~0_In507688556 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In507688556 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite14_Out507688556|)) (and (or .cse2 .cse3) (= |P1Thread1of1ForFork1_#t~ite14_Out507688556| ~y$r_buff1_thd2~0_In507688556) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In507688556, ~y$w_buff0_used~0=~y$w_buff0_used~0_In507688556, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In507688556, ~y$w_buff1_used~0=~y$w_buff1_used~0_In507688556} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In507688556, ~y$w_buff0_used~0=~y$w_buff0_used~0_In507688556, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In507688556, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out507688556|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In507688556} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 18:41:45,686 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [866] [866] L763-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_54 (+ v_~__unbuffered_cnt~0_55 1)) (= v_~y$r_buff1_thd2~0_109 |v_P1Thread1of1ForFork1_#t~ite14_30|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_30|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_109, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_29|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 18:41:45,686 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L823-->L825-2: Formula: (and (or (= (mod v_~y$w_buff0_used~0_137 256) 0) (= 0 (mod v_~y$r_buff0_thd0~0_31 256))) (not (= (mod v_~main$tmp_guard0~0_4 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_137, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_31, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_4} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_137, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_31, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_4} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 18:41:45,686 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [815] [815] L825-2-->L825-4: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In-36228232 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-36228232 256)))) (or (and (= |ULTIMATE.start_main_#t~ite47_Out-36228232| ~y$w_buff1~0_In-36228232) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~y~0_In-36228232 |ULTIMATE.start_main_#t~ite47_Out-36228232|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-36228232, ~y~0=~y~0_In-36228232, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-36228232, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-36228232} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-36228232, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-36228232|, ~y~0=~y~0_In-36228232, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-36228232, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-36228232} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 18:41:45,687 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L825-4-->L826: Formula: (= v_~y~0_31 |v_ULTIMATE.start_main_#t~ite47_11|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_11|} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_10|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_17|, ~y~0=v_~y~0_31} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48, ~y~0] because there is no mapped edge [2019-12-07 18:41:45,687 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L826-->L826-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In765721580 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In765721580 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite49_Out765721580| 0)) (and (= |ULTIMATE.start_main_#t~ite49_Out765721580| ~y$w_buff0_used~0_In765721580) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In765721580, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In765721580} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In765721580, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In765721580, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out765721580|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 18:41:45,687 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L827-->L827-2: Formula: (let ((.cse3 (= 0 (mod ~y$w_buff1_used~0_In-1346629380 256))) (.cse2 (= (mod ~y$r_buff1_thd0~0_In-1346629380 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-1346629380 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In-1346629380 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In-1346629380 |ULTIMATE.start_main_#t~ite50_Out-1346629380|) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite50_Out-1346629380| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1346629380, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1346629380, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1346629380, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1346629380} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1346629380|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1346629380, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1346629380, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1346629380, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1346629380} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 18:41:45,687 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L828-->L828-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In403499697 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In403499697 256)))) (or (and (= |ULTIMATE.start_main_#t~ite51_Out403499697| ~y$r_buff0_thd0~0_In403499697) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite51_Out403499697|) (not .cse0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In403499697, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In403499697} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out403499697|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In403499697, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In403499697} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 18:41:45,688 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L829-->L829-2: Formula: (let ((.cse3 (= (mod ~y$r_buff0_thd0~0_In671517062 256) 0)) (.cse2 (= (mod ~y$w_buff0_used~0_In671517062 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd0~0_In671517062 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In671517062 256)))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out671517062| ~y$r_buff1_thd0~0_In671517062) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |ULTIMATE.start_main_#t~ite52_Out671517062| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In671517062, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In671517062, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In671517062, ~y$w_buff1_used~0=~y$w_buff1_used~0_In671517062} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out671517062|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In671517062, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In671517062, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In671517062, ~y$w_buff1_used~0=~y$w_buff1_used~0_In671517062} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 18:41:45,688 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L829-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|) (= v_~main$tmp_guard1~0_18 (ite (= 0 (ite (not (and (= 2 v_~x~0_130) (= 2 v_~__unbuffered_p2_EAX~0_23) (= v_~__unbuffered_p2_EBX~0_31 0))) 1 0)) 0 1)) (= v_~y$r_buff1_thd0~0_163 |v_ULTIMATE.start_main_#t~ite52_41|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11| (mod v_~main$tmp_guard1~0_18 256))) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_41|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_31, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_130} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_40|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_17, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_31, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_18, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_130, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_163, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~main$tmp_guard1~0, ~y$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:41:45,748 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 06:41:45 BasicIcfg [2019-12-07 18:41:45,748 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 18:41:45,748 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 18:41:45,748 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 18:41:45,748 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 18:41:45,749 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 06:40:02" (3/4) ... [2019-12-07 18:41:45,750 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 18:41:45,750 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [891] [891] ULTIMATE.startENTRY-->L815: Formula: (let ((.cse0 (store |v_#valid_74| 0 0))) (and (= 0 v_~__unbuffered_p2_EAX~0_43) (= v_~y$r_buff1_thd1~0_178 0) (= 0 v_~y$read_delayed_var~0.offset_7) (= v_~y$w_buff1_used~0_439 0) (= v_~y$w_buff1~0_188 0) (= 0 v_~y$r_buff1_thd3~0_309) (= v_~y$read_delayed~0_7 0) (= v_~y$r_buff1_thd0~0_201 0) (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t2408~0.base_39| 4)) (= v_~main$tmp_guard0~0_41 0) (= 0 v_~y$w_buff0~0_254) (= 0 v_~y$r_buff0_thd3~0_343) (< 0 |v_#StackHeapBarrier_15|) (= v_~main$tmp_guard1~0_39 0) (= v_~__unbuffered_p2_EBX~0_50 0) (= 0 v_~y$flush_delayed~0_35) (= (store |v_#memory_int_24| |v_ULTIMATE.start_main_~#t2408~0.base_39| (store (select |v_#memory_int_24| |v_ULTIMATE.start_main_~#t2408~0.base_39|) |v_ULTIMATE.start_main_~#t2408~0.offset_26| 0)) |v_#memory_int_23|) (= 0 v_~y$r_buff0_thd2~0_104) (= v_~weak$$choice2~0_129 0) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t2408~0.base_39|) (= 0 |v_#NULL.base_4|) (= 0 v_~y$read_delayed_var~0.base_7) (= v_~y$r_buff0_thd0~0_134 0) (= 0 v_~weak$$choice0~0_22) (= v_~y$mem_tmp~0_24 0) (= |v_#valid_72| (store .cse0 |v_ULTIMATE.start_main_~#t2408~0.base_39| 1)) (= v_~y$w_buff0_used~0_785 0) (= |v_#NULL.offset_4| 0) (= 0 v_~x~0_158) (= 0 v_~y$r_buff1_thd2~0_197) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t2408~0.base_39|)) (= v_~y~0_189 0) (= |v_ULTIMATE.start_main_~#t2408~0.offset_26| 0) (= v_~y$r_buff0_thd1~0_218 0) (= v_~__unbuffered_cnt~0_118 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_74|, #memory_int=|v_#memory_int_24|, #length=|v_#length_26|} OutVars{ULTIMATE.start_main_~#t2409~0.base=|v_ULTIMATE.start_main_~#t2409~0.base_37|, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_785, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_133|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_293|, ULTIMATE.start_main_~#t2409~0.offset=|v_ULTIMATE.start_main_~#t2409~0.offset_25|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_39, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_104|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_47|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_178, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_78|, ~y$mem_tmp~0=v_~y$mem_tmp~0_24, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_37|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_309, ~y$w_buff0~0=v_~y$w_buff0~0_254, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_343, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_218, ~y$flush_delayed~0=v_~y$flush_delayed~0_35, #length=|v_#length_25|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_43, ~y~0=v_~y~0_189, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_50, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_18|, ULTIMATE.start_main_~#t2408~0.offset=|v_ULTIMATE.start_main_~#t2408~0.offset_26|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ULTIMATE.start_main_~#t2408~0.base=|v_ULTIMATE.start_main_~#t2408~0.base_39|, ULTIMATE.start_main_~#t2410~0.base=|v_ULTIMATE.start_main_~#t2410~0.base_27|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_41, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_~#t2410~0.offset=|v_ULTIMATE.start_main_~#t2410~0.offset_20|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_197, ~weak$$choice0~0=v_~weak$$choice0~0_22, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ~y$w_buff1~0=v_~y$w_buff1~0_188, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_27|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_134, #valid=|v_#valid_72|, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_104, #memory_int=|v_#memory_int_23|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_118, ~weak$$choice2~0=v_~weak$$choice2~0_129, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_201, ~x~0=v_~x~0_158, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_439} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2409~0.base, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_~#t2409~0.offset, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_#t~ite50, ~y$read_delayed~0, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite52, ~y$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~y$r_buff1_thd3~0, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ~__unbuffered_p2_EAX~0, ~y~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_~#t2408~0.offset, ULTIMATE.start_main_#t~nondet44, ULTIMATE.start_main_#t~nondet45, ULTIMATE.start_main_~#t2408~0.base, ULTIMATE.start_main_~#t2410~0.base, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_~#t2410~0.offset, ~y$r_buff1_thd2~0, ~weak$$choice0~0, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, ~y$r_buff0_thd2~0, #memory_int, ~__unbuffered_cnt~0, ~weak$$choice2~0, ~y$r_buff1_thd0~0, ~x~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 18:41:45,751 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] P0ENTRY-->L4-3: Formula: (and (= v_~y$w_buff1_used~0_76 v_~y$w_buff0_used~0_125) (= v_~y$w_buff0~0_37 v_~y$w_buff1~0_27) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_13 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_11|) (= v_~y$w_buff0_used~0_124 1) (= v_P0Thread1of1ForFork0_~arg.base_11 |v_P0Thread1of1ForFork0_#in~arg.base_13|) (= v_P0Thread1of1ForFork0_~arg.offset_11 |v_P0Thread1of1ForFork0_#in~arg.offset_13|) (= 1 v_~y$w_buff0~0_36) (= |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_11| (ite (not (and (not (= 0 (mod v_~y$w_buff1_used~0_76 256))) (not (= (mod v_~y$w_buff0_used~0_124 256) 0)))) 1 0)) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_13 0))) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_13|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_125, ~y$w_buff0~0=v_~y$w_buff0~0_37, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_13|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_13|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_124, ~y$w_buff1~0=v_~y$w_buff1~0_27, ~y$w_buff0~0=v_~y$w_buff0~0_36, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_13, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_13|, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_11, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_11|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_11, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_76} AuxVars[] AssignedVars[~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 18:41:45,751 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L815-1-->L817: Formula: (and (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2409~0.base_11|) (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t2409~0.base_11| 1)) (= |v_ULTIMATE.start_main_~#t2409~0.offset_10| 0) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t2409~0.base_11| 4)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2409~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2409~0.base_11|) |v_ULTIMATE.start_main_~#t2409~0.offset_10| 1)) |v_#memory_int_15|) (not (= |v_ULTIMATE.start_main_~#t2409~0.base_11| 0)) (= 0 (select |v_#valid_40| |v_ULTIMATE.start_main_~#t2409~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t2409~0.base=|v_ULTIMATE.start_main_~#t2409~0.base_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t2409~0.offset=|v_ULTIMATE.start_main_~#t2409~0.offset_10|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2409~0.base, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t2409~0.offset, #length] because there is no mapped edge [2019-12-07 18:41:45,752 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L817-1-->L819: Formula: (and (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2410~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2410~0.base_11|) |v_ULTIMATE.start_main_~#t2410~0.offset_10| 2)) |v_#memory_int_13|) (= |v_#valid_31| (store |v_#valid_32| |v_ULTIMATE.start_main_~#t2410~0.base_11| 1)) (< |v_#StackHeapBarrier_9| |v_ULTIMATE.start_main_~#t2410~0.base_11|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t2410~0.base_11| 4)) (= (select |v_#valid_32| |v_ULTIMATE.start_main_~#t2410~0.base_11|) 0) (= 0 |v_ULTIMATE.start_main_~#t2410~0.offset_10|) (not (= |v_ULTIMATE.start_main_~#t2410~0.base_11| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t2410~0.offset=|v_ULTIMATE.start_main_~#t2410~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_9|, #valid=|v_#valid_31|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_6|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t2410~0.base=|v_ULTIMATE.start_main_~#t2410~0.base_11|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2410~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t2410~0.base, #length] because there is no mapped edge [2019-12-07 18:41:45,755 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [874] [874] L782-->L782-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-1712075487 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite24_Out-1712075487| |P2Thread1of1ForFork2_#t~ite23_Out-1712075487|) .cse0 (= |P2Thread1of1ForFork2_#t~ite23_Out-1712075487| ~y$w_buff1~0_In-1712075487) (let ((.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-1712075487 256)))) (or (= 0 (mod ~y$w_buff0_used~0_In-1712075487 256)) (and (= 0 (mod ~y$r_buff1_thd3~0_In-1712075487 256)) .cse1) (and (= 0 (mod ~y$w_buff1_used~0_In-1712075487 256)) .cse1)))) (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite24_Out-1712075487| ~y$w_buff1~0_In-1712075487) (= |P2Thread1of1ForFork2_#t~ite23_In-1712075487| |P2Thread1of1ForFork2_#t~ite23_Out-1712075487|)))) InVars {P2Thread1of1ForFork2_#t~ite23=|P2Thread1of1ForFork2_#t~ite23_In-1712075487|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1712075487, ~y$w_buff1~0=~y$w_buff1~0_In-1712075487, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1712075487, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1712075487, ~weak$$choice2~0=~weak$$choice2~0_In-1712075487, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1712075487} OutVars{P2Thread1of1ForFork2_#t~ite23=|P2Thread1of1ForFork2_#t~ite23_Out-1712075487|, P2Thread1of1ForFork2_#t~ite24=|P2Thread1of1ForFork2_#t~ite24_Out-1712075487|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1712075487, ~y$w_buff1~0=~y$w_buff1~0_In-1712075487, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1712075487, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1712075487, ~weak$$choice2~0=~weak$$choice2~0_In-1712075487, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1712075487} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite23, P2Thread1of1ForFork2_#t~ite24] because there is no mapped edge [2019-12-07 18:41:45,755 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L783-->L783-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-358104250 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite26_In-358104250| |P2Thread1of1ForFork2_#t~ite26_Out-358104250|) (= ~y$w_buff0_used~0_In-358104250 |P2Thread1of1ForFork2_#t~ite27_Out-358104250|) (not .cse0)) (and .cse0 (= ~y$w_buff0_used~0_In-358104250 |P2Thread1of1ForFork2_#t~ite26_Out-358104250|) (= |P2Thread1of1ForFork2_#t~ite27_Out-358104250| |P2Thread1of1ForFork2_#t~ite26_Out-358104250|) (let ((.cse1 (= (mod ~y$r_buff0_thd3~0_In-358104250 256) 0))) (or (= (mod ~y$w_buff0_used~0_In-358104250 256) 0) (and .cse1 (= 0 (mod ~y$w_buff1_used~0_In-358104250 256))) (and .cse1 (= 0 (mod ~y$r_buff1_thd3~0_In-358104250 256)))))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-358104250, P2Thread1of1ForFork2_#t~ite26=|P2Thread1of1ForFork2_#t~ite26_In-358104250|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-358104250, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-358104250, ~weak$$choice2~0=~weak$$choice2~0_In-358104250, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-358104250} OutVars{P2Thread1of1ForFork2_#t~ite26=|P2Thread1of1ForFork2_#t~ite26_Out-358104250|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-358104250, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-358104250, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-358104250, ~weak$$choice2~0=~weak$$choice2~0_In-358104250, P2Thread1of1ForFork2_#t~ite27=|P2Thread1of1ForFork2_#t~ite27_Out-358104250|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-358104250} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite26, P2Thread1of1ForFork2_#t~ite27] because there is no mapped edge [2019-12-07 18:41:45,756 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [873] [873] L784-->L784-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1000278414 256)))) (or (and .cse0 (= |P2Thread1of1ForFork2_#t~ite30_Out-1000278414| |P2Thread1of1ForFork2_#t~ite29_Out-1000278414|) (let ((.cse1 (= (mod ~y$r_buff0_thd3~0_In-1000278414 256) 0))) (or (and (= (mod ~y$r_buff1_thd3~0_In-1000278414 256) 0) .cse1) (= (mod ~y$w_buff0_used~0_In-1000278414 256) 0) (and (= (mod ~y$w_buff1_used~0_In-1000278414 256) 0) .cse1))) (= ~y$w_buff1_used~0_In-1000278414 |P2Thread1of1ForFork2_#t~ite29_Out-1000278414|)) (and (not .cse0) (= |P2Thread1of1ForFork2_#t~ite30_Out-1000278414| ~y$w_buff1_used~0_In-1000278414) (= |P2Thread1of1ForFork2_#t~ite29_In-1000278414| |P2Thread1of1ForFork2_#t~ite29_Out-1000278414|)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1000278414, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1000278414, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1000278414, ~weak$$choice2~0=~weak$$choice2~0_In-1000278414, P2Thread1of1ForFork2_#t~ite29=|P2Thread1of1ForFork2_#t~ite29_In-1000278414|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1000278414} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1000278414, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1000278414, P2Thread1of1ForFork2_#t~ite30=|P2Thread1of1ForFork2_#t~ite30_Out-1000278414|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1000278414, ~weak$$choice2~0=~weak$$choice2~0_In-1000278414, P2Thread1of1ForFork2_#t~ite29=|P2Thread1of1ForFork2_#t~ite29_Out-1000278414|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1000278414} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite30, P2Thread1of1ForFork2_#t~ite29] because there is no mapped edge [2019-12-07 18:41:45,756 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [784] [784] L785-->L786: Formula: (and (= v_~y$r_buff0_thd3~0_93 v_~y$r_buff0_thd3~0_92) (not (= (mod v_~weak$$choice2~0_23 256) 0))) InVars {~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_93, ~weak$$choice2~0=v_~weak$$choice2~0_23} OutVars{P2Thread1of1ForFork2_#t~ite31=|v_P2Thread1of1ForFork2_#t~ite31_6|, P2Thread1of1ForFork2_#t~ite33=|v_P2Thread1of1ForFork2_#t~ite33_7|, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_92, P2Thread1of1ForFork2_#t~ite32=|v_P2Thread1of1ForFork2_#t~ite32_8|, ~weak$$choice2~0=v_~weak$$choice2~0_23} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite31, P2Thread1of1ForFork2_#t~ite33, ~y$r_buff0_thd3~0, P2Thread1of1ForFork2_#t~ite32] because there is no mapped edge [2019-12-07 18:41:45,757 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [808] [808] L788-->L792: Formula: (and (= v_~y~0_52 v_~y$mem_tmp~0_5) (not (= 0 (mod v_~y$flush_delayed~0_7 256))) (= 0 v_~y$flush_delayed~0_6)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_5, ~y$flush_delayed~0=v_~y$flush_delayed~0_7} OutVars{P2Thread1of1ForFork2_#t~ite37=|v_P2Thread1of1ForFork2_#t~ite37_5|, ~y$mem_tmp~0=v_~y$mem_tmp~0_5, ~y$flush_delayed~0=v_~y$flush_delayed~0_6, ~y~0=v_~y~0_52} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite37, ~y$flush_delayed~0, ~y~0] because there is no mapped edge [2019-12-07 18:41:45,757 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [819] [819] L792-2-->L792-4: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff1_thd3~0_In-1973632962 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In-1973632962 256)))) (or (and (not .cse0) (not .cse1) (= ~y$w_buff1~0_In-1973632962 |P2Thread1of1ForFork2_#t~ite38_Out-1973632962|)) (and (= ~y~0_In-1973632962 |P2Thread1of1ForFork2_#t~ite38_Out-1973632962|) (or .cse1 .cse0)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1973632962, ~y$w_buff1~0=~y$w_buff1~0_In-1973632962, ~y~0=~y~0_In-1973632962, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1973632962} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1973632962, ~y$w_buff1~0=~y$w_buff1~0_In-1973632962, ~y~0=~y~0_In-1973632962, P2Thread1of1ForFork2_#t~ite38=|P2Thread1of1ForFork2_#t~ite38_Out-1973632962|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1973632962} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite38] because there is no mapped edge [2019-12-07 18:41:45,758 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L743-->L743-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd1~0_In-1918085567 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-1918085567 256) 0))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out-1918085567|) (not .cse1)) (and (= ~y$w_buff0_used~0_In-1918085567 |P0Thread1of1ForFork0_#t~ite5_Out-1918085567|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1918085567, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1918085567} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-1918085567|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1918085567, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1918085567} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 18:41:45,758 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [816] [816] L744-->L744-2: Formula: (let ((.cse2 (= (mod ~y$w_buff1_used~0_In1898225073 256) 0)) (.cse3 (= (mod ~y$r_buff1_thd1~0_In1898225073 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd1~0_In1898225073 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In1898225073 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In1898225073 |P0Thread1of1ForFork0_#t~ite6_Out1898225073|) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out1898225073|)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1898225073, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1898225073, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1898225073, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1898225073} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out1898225073|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1898225073, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1898225073, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1898225073, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1898225073} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 18:41:45,759 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [818] [818] L759-2-->L759-5: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff1_used~0_In-1781854064 256))) (.cse2 (= |P1Thread1of1ForFork1_#t~ite9_Out-1781854064| |P1Thread1of1ForFork1_#t~ite10_Out-1781854064|)) (.cse1 (= (mod ~y$r_buff1_thd2~0_In-1781854064 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite9_Out-1781854064| ~y~0_In-1781854064) .cse2) (and (not .cse0) .cse2 (= ~y$w_buff1~0_In-1781854064 |P1Thread1of1ForFork1_#t~ite9_Out-1781854064|) (not .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1781854064, ~y$w_buff1~0=~y$w_buff1~0_In-1781854064, ~y~0=~y~0_In-1781854064, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1781854064} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1781854064, ~y$w_buff1~0=~y$w_buff1~0_In-1781854064, P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out-1781854064|, P1Thread1of1ForFork1_#t~ite10=|P1Thread1of1ForFork1_#t~ite10_Out-1781854064|, ~y~0=~y~0_In-1781854064, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1781854064} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10] because there is no mapped edge [2019-12-07 18:41:45,759 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L792-4-->L793: Formula: (= v_~y~0_32 |v_P2Thread1of1ForFork2_#t~ite38_10|) InVars {P2Thread1of1ForFork2_#t~ite38=|v_P2Thread1of1ForFork2_#t~ite38_10|} OutVars{~y~0=v_~y~0_32, P2Thread1of1ForFork2_#t~ite39=|v_P2Thread1of1ForFork2_#t~ite39_5|, P2Thread1of1ForFork2_#t~ite38=|v_P2Thread1of1ForFork2_#t~ite38_9|} AuxVars[] AssignedVars[~y~0, P2Thread1of1ForFork2_#t~ite39, P2Thread1of1ForFork2_#t~ite38] because there is no mapped edge [2019-12-07 18:41:45,760 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L793-->L793-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In1669515767 256) 0)) (.cse1 (= (mod ~y$r_buff0_thd3~0_In1669515767 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork2_#t~ite40_Out1669515767|)) (and (= ~y$w_buff0_used~0_In1669515767 |P2Thread1of1ForFork2_#t~ite40_Out1669515767|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1669515767, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1669515767} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1669515767, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1669515767, P2Thread1of1ForFork2_#t~ite40=|P2Thread1of1ForFork2_#t~ite40_Out1669515767|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite40] because there is no mapped edge [2019-12-07 18:41:45,760 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L794-->L794-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1266182369 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-1266182369 256))) (.cse2 (= (mod ~y$r_buff1_thd3~0_In-1266182369 256) 0)) (.cse3 (= 0 (mod ~y$w_buff1_used~0_In-1266182369 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite41_Out-1266182369| ~y$w_buff1_used~0_In-1266182369) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork2_#t~ite41_Out-1266182369| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1266182369, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1266182369, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1266182369, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1266182369} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1266182369, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1266182369, P2Thread1of1ForFork2_#t~ite41=|P2Thread1of1ForFork2_#t~ite41_Out-1266182369|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1266182369, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1266182369} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite41] because there is no mapped edge [2019-12-07 18:41:45,760 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L795-->L795-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In1228075538 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In1228075538 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite42_Out1228075538| 0)) (and (= |P2Thread1of1ForFork2_#t~ite42_Out1228075538| ~y$r_buff0_thd3~0_In1228075538) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1228075538, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1228075538} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1228075538, P2Thread1of1ForFork2_#t~ite42=|P2Thread1of1ForFork2_#t~ite42_Out1228075538|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1228075538} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite42] because there is no mapped edge [2019-12-07 18:41:45,761 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [826] [826] L796-->L796-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff0_thd3~0_In-1143063478 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In-1143063478 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd3~0_In-1143063478 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-1143063478 256)))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite43_Out-1143063478|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse0 .cse1) (= ~y$r_buff1_thd3~0_In-1143063478 |P2Thread1of1ForFork2_#t~ite43_Out-1143063478|)))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1143063478, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1143063478, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1143063478, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1143063478} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1143063478, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1143063478, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1143063478, P2Thread1of1ForFork2_#t~ite43=|P2Thread1of1ForFork2_#t~ite43_Out-1143063478|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1143063478} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite43] because there is no mapped edge [2019-12-07 18:41:45,761 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L745-->L746: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1373842439 256))) (.cse0 (= (mod ~y$r_buff0_thd1~0_In-1373842439 256) 0)) (.cse2 (= ~y$r_buff0_thd1~0_In-1373842439 ~y$r_buff0_thd1~0_Out-1373842439))) (or (and (= 0 ~y$r_buff0_thd1~0_Out-1373842439) (not .cse0) (not .cse1)) (and .cse1 .cse2) (and .cse0 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1373842439, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1373842439} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1373842439, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-1373842439|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_Out-1373842439} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~y$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 18:41:45,761 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [821] [821] L746-->L746-2: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In380352156 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd1~0_In380352156 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd1~0_In380352156 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In380352156 256) 0))) (or (and (= ~y$r_buff1_thd1~0_In380352156 |P0Thread1of1ForFork0_#t~ite8_Out380352156|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite8_Out380352156| 0)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In380352156, ~y$w_buff0_used~0=~y$w_buff0_used~0_In380352156, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In380352156, ~y$w_buff1_used~0=~y$w_buff1_used~0_In380352156} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In380352156, ~y$w_buff0_used~0=~y$w_buff0_used~0_In380352156, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out380352156|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In380352156, ~y$w_buff1_used~0=~y$w_buff1_used~0_In380352156} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 18:41:45,761 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [869] [869] L746-2-->P0EXIT: Formula: (and (= v_~y$r_buff1_thd1~0_95 |v_P0Thread1of1ForFork0_#t~ite8_36|) (= v_~__unbuffered_cnt~0_73 (+ v_~__unbuffered_cnt~0_74 1)) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_74} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_95, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_35|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_73} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 18:41:45,761 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [863] [863] L796-2-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_49 1) v_~__unbuffered_cnt~0_48) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0) (= |v_P2Thread1of1ForFork2_#t~ite43_32| v_~y$r_buff1_thd3~0_152)) InVars {P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49} OutVars{~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_152, P2Thread1of1ForFork2_#t~ite43=|v_P2Thread1of1ForFork2_#t~ite43_31|, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[~y$r_buff1_thd3~0, P2Thread1of1ForFork2_#t~ite43, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 18:41:45,762 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L760-->L760-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In268270463 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In268270463 256)))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out268270463|) (not .cse1)) (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In268270463 |P1Thread1of1ForFork1_#t~ite11_Out268270463|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In268270463, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In268270463} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In268270463, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In268270463, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out268270463|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 18:41:45,762 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L761-->L761-2: Formula: (let ((.cse3 (= 0 (mod ~y$r_buff1_thd2~0_In-9624593 256))) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In-9624593 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In-9624593 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-9624593 256)))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite12_Out-9624593|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (= ~y$w_buff1_used~0_In-9624593 |P1Thread1of1ForFork1_#t~ite12_Out-9624593|) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-9624593, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-9624593, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-9624593, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-9624593} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-9624593, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-9624593, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-9624593, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-9624593|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-9624593} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 18:41:45,763 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [823] [823] L762-->L762-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In1386948943 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In1386948943 256) 0))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite13_Out1386948943|) (not .cse0) (not .cse1)) (and (= ~y$r_buff0_thd2~0_In1386948943 |P1Thread1of1ForFork1_#t~ite13_Out1386948943|) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1386948943, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1386948943} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1386948943, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1386948943, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out1386948943|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 18:41:45,764 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L763-->L763-2: Formula: (let ((.cse2 (= 0 (mod ~y$w_buff1_used~0_In507688556 256))) (.cse3 (= (mod ~y$r_buff1_thd2~0_In507688556 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd2~0_In507688556 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In507688556 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite14_Out507688556|)) (and (or .cse2 .cse3) (= |P1Thread1of1ForFork1_#t~ite14_Out507688556| ~y$r_buff1_thd2~0_In507688556) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In507688556, ~y$w_buff0_used~0=~y$w_buff0_used~0_In507688556, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In507688556, ~y$w_buff1_used~0=~y$w_buff1_used~0_In507688556} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In507688556, ~y$w_buff0_used~0=~y$w_buff0_used~0_In507688556, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In507688556, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out507688556|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In507688556} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 18:41:45,764 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [866] [866] L763-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~__unbuffered_cnt~0_54 (+ v_~__unbuffered_cnt~0_55 1)) (= v_~y$r_buff1_thd2~0_109 |v_P1Thread1of1ForFork1_#t~ite14_30|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_30|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_109, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_29|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 18:41:45,764 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L823-->L825-2: Formula: (and (or (= (mod v_~y$w_buff0_used~0_137 256) 0) (= 0 (mod v_~y$r_buff0_thd0~0_31 256))) (not (= (mod v_~main$tmp_guard0~0_4 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_137, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_31, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_4} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_137, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_31, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_4} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 18:41:45,764 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [815] [815] L825-2-->L825-4: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff1_thd0~0_In-36228232 256))) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In-36228232 256)))) (or (and (= |ULTIMATE.start_main_#t~ite47_Out-36228232| ~y$w_buff1~0_In-36228232) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~y~0_In-36228232 |ULTIMATE.start_main_#t~ite47_Out-36228232|)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-36228232, ~y~0=~y~0_In-36228232, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-36228232, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-36228232} OutVars{~y$w_buff1~0=~y$w_buff1~0_In-36228232, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-36228232|, ~y~0=~y~0_In-36228232, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-36228232, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-36228232} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 18:41:45,764 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L825-4-->L826: Formula: (= v_~y~0_31 |v_ULTIMATE.start_main_#t~ite47_11|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_11|} OutVars{ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_10|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_17|, ~y~0=v_~y~0_31} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48, ~y~0] because there is no mapped edge [2019-12-07 18:41:45,764 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [822] [822] L826-->L826-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In765721580 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In765721580 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite49_Out765721580| 0)) (and (= |ULTIMATE.start_main_#t~ite49_Out765721580| ~y$w_buff0_used~0_In765721580) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In765721580, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In765721580} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In765721580, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In765721580, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out765721580|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 18:41:45,765 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] L827-->L827-2: Formula: (let ((.cse3 (= 0 (mod ~y$w_buff1_used~0_In-1346629380 256))) (.cse2 (= (mod ~y$r_buff1_thd0~0_In-1346629380 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-1346629380 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In-1346629380 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In-1346629380 |ULTIMATE.start_main_#t~ite50_Out-1346629380|) (or .cse2 .cse3)) (and (= |ULTIMATE.start_main_#t~ite50_Out-1346629380| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1346629380, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1346629380, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1346629380, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1346629380} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1346629380|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1346629380, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1346629380, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1346629380, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1346629380} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 18:41:45,765 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L828-->L828-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In403499697 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In403499697 256)))) (or (and (= |ULTIMATE.start_main_#t~ite51_Out403499697| ~y$r_buff0_thd0~0_In403499697) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite51_Out403499697|) (not .cse0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In403499697, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In403499697} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out403499697|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In403499697, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In403499697} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 18:41:45,766 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L829-->L829-2: Formula: (let ((.cse3 (= (mod ~y$r_buff0_thd0~0_In671517062 256) 0)) (.cse2 (= (mod ~y$w_buff0_used~0_In671517062 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd0~0_In671517062 256) 0)) (.cse1 (= 0 (mod ~y$w_buff1_used~0_In671517062 256)))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out671517062| ~y$r_buff1_thd0~0_In671517062) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= |ULTIMATE.start_main_#t~ite52_Out671517062| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In671517062, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In671517062, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In671517062, ~y$w_buff1_used~0=~y$w_buff1_used~0_In671517062} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out671517062|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In671517062, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In671517062, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In671517062, ~y$w_buff1_used~0=~y$w_buff1_used~0_In671517062} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 18:41:45,766 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L829-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_17 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|) (= v_~main$tmp_guard1~0_18 (ite (= 0 (ite (not (and (= 2 v_~x~0_130) (= 2 v_~__unbuffered_p2_EAX~0_23) (= v_~__unbuffered_p2_EBX~0_31 0))) 1 0)) 0 1)) (= v_~y$r_buff1_thd0~0_163 |v_ULTIMATE.start_main_#t~ite52_41|) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_11| (mod v_~main$tmp_guard1~0_18 256))) InVars {ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_41|, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_31, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_130} OutVars{ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_40|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_17, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_31, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_18, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ~x~0=v_~x~0_130, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_163, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~main$tmp_guard1~0, ~y$r_buff1_thd0~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 18:41:45,818 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_1611e02b-ec5b-4929-ad57-a03fe5f6c114/bin/uautomizer/witness.graphml [2019-12-07 18:41:45,818 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 18:41:45,819 INFO L168 Benchmark]: Toolchain (without parser) took 103743.18 ms. Allocated memory was 1.0 GB in the beginning and 6.3 GB in the end (delta: 5.3 GB). Free memory was 938.1 MB in the beginning and 3.9 GB in the end (delta: -3.0 GB). Peak memory consumption was 2.3 GB. Max. memory is 11.5 GB. [2019-12-07 18:41:45,820 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 960.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:41:45,820 INFO L168 Benchmark]: CACSL2BoogieTranslator took 430.18 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 108.0 MB). Free memory was 938.1 MB in the beginning and 1.1 GB in the end (delta: -136.3 MB). Peak memory consumption was 18.6 MB. Max. memory is 11.5 GB. [2019-12-07 18:41:45,820 INFO L168 Benchmark]: Boogie Procedure Inliner took 40.10 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 18:41:45,820 INFO L168 Benchmark]: Boogie Preprocessor took 26.67 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 18:41:45,821 INFO L168 Benchmark]: RCFGBuilder took 418.84 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.6 MB). Peak memory consumption was 54.6 MB. Max. memory is 11.5 GB. [2019-12-07 18:41:45,821 INFO L168 Benchmark]: TraceAbstraction took 102753.92 ms. Allocated memory was 1.1 GB in the beginning and 6.3 GB in the end (delta: 5.2 GB). Free memory was 1.0 GB in the beginning and 3.9 GB in the end (delta: -2.9 GB). Peak memory consumption was 2.3 GB. Max. memory is 11.5 GB. [2019-12-07 18:41:45,821 INFO L168 Benchmark]: Witness Printer took 69.94 ms. Allocated memory is still 6.3 GB. Free memory was 3.9 GB in the beginning and 3.9 GB in the end (delta: 13.2 MB). Peak memory consumption was 13.2 MB. Max. memory is 11.5 GB. [2019-12-07 18:41:45,822 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 960.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 430.18 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 108.0 MB). Free memory was 938.1 MB in the beginning and 1.1 GB in the end (delta: -136.3 MB). Peak memory consumption was 18.6 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 40.10 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.67 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 418.84 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.6 MB). Peak memory consumption was 54.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 102753.92 ms. Allocated memory was 1.1 GB in the beginning and 6.3 GB in the end (delta: 5.2 GB). Free memory was 1.0 GB in the beginning and 3.9 GB in the end (delta: -2.9 GB). Peak memory consumption was 2.3 GB. Max. memory is 11.5 GB. * Witness Printer took 69.94 ms. Allocated memory is still 6.3 GB. Free memory was 3.9 GB in the beginning and 3.9 GB in the end (delta: 13.2 MB). Peak memory consumption was 13.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.2s, 174 ProgramPointsBefore, 93 ProgramPointsAfterwards, 211 TransitionsBefore, 103 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 7 FixpointIterations, 31 TrivialSequentialCompositions, 51 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 32 ConcurrentYvCompositions, 31 ChoiceCompositions, 6738 VarBasedMoverChecksPositive, 252 VarBasedMoverChecksNegative, 75 SemBasedMoverChecksPositive, 241 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 78269 CheckedPairsTotal, 114 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L815] FCALL, FORK 0 pthread_create(&t2408, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L732] 1 y$r_buff1_thd0 = y$r_buff0_thd0 [L733] 1 y$r_buff1_thd1 = y$r_buff0_thd1 [L734] 1 y$r_buff1_thd2 = y$r_buff0_thd2 [L735] 1 y$r_buff1_thd3 = y$r_buff0_thd3 [L736] 1 y$r_buff0_thd1 = (_Bool)1 [L739] 1 x = 1 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L817] FCALL, FORK 0 pthread_create(&t2409, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L742] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L756] 2 x = 2 VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L819] FCALL, FORK 0 pthread_create(&t2410, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L773] 3 __unbuffered_p2_EAX = x [L776] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L777] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L778] 3 y$flush_delayed = weak$$choice2 [L779] 3 y$mem_tmp = y VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L780] EXPR 3 !y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : y$w_buff1) VAL [!y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : y$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L780] 3 y = !y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : y$w_buff1) [L781] EXPR 3 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : y$w_buff0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : y$w_buff0))=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L781] 3 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : y$w_buff0)) [L782] 3 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff1 : y$w_buff1)) [L783] 3 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used)) [L784] 3 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L786] EXPR 3 weak$$choice2 ? y$r_buff1_thd3 : (!y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y$r_buff1_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? y$r_buff1_thd3 : (!y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y$r_buff1_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L786] 3 y$r_buff1_thd3 = weak$$choice2 ? y$r_buff1_thd3 : (!y$w_buff0_used || !y$r_buff0_thd3 && !y$w_buff1_used || !y$r_buff0_thd3 && !y$r_buff1_thd3 ? y$r_buff1_thd3 : (y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L787] 3 __unbuffered_p2_EBX = y VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=2, y=0, y$flush_delayed=1, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L792] 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=2, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L742] 1 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L743] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L744] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L759] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y=0] [L793] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L794] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L795] 3 y$r_buff0_thd3 = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$r_buff0_thd3 [L759] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L760] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L761] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L762] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L821] 0 main$tmp_guard0 = __unbuffered_cnt == 3 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p2_EAX=2, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=1, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L826] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L827] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L828] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 165 locations, 2 error locations. Result: UNSAFE, OverallTime: 102.5s, OverallIterations: 26, TraceHistogramMax: 1, AutomataDifference: 34.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 6146 SDtfs, 8104 SDslu, 22667 SDs, 0 SdLazy, 19737 SolverSat, 475 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 14.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 441 GetRequests, 39 SyntacticMatches, 20 SemanticMatches, 382 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6142 ImplicationChecksByTransitivity, 5.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=195490occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 49.2s AutomataMinimizationTime, 25 MinimizatonAttempts, 311175 StatesRemovedByMinimization, 21 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 1.6s InterpolantComputationTime, 1174 NumberOfCodeBlocks, 1174 NumberOfCodeBlocksAsserted, 26 NumberOfCheckSat, 1082 ConstructedInterpolants, 0 QuantifiedInterpolants, 368255 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 25 InterpolantComputations, 25 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...