./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe029_power.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_cdd49675-f65f-4ca9-bde7-3f1e5d7d9c4a/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_cdd49675-f65f-4ca9-bde7-3f1e5d7d9c4a/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_cdd49675-f65f-4ca9-bde7-3f1e5d7d9c4a/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_cdd49675-f65f-4ca9-bde7-3f1e5d7d9c4a/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe029_power.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_cdd49675-f65f-4ca9-bde7-3f1e5d7d9c4a/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_cdd49675-f65f-4ca9-bde7-3f1e5d7d9c4a/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash b6f84a75f7e7e2b60206e8ca033ac378ee639ae0 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 16:18:48,941 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 16:18:48,943 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 16:18:48,950 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 16:18:48,950 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 16:18:48,951 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 16:18:48,952 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 16:18:48,953 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 16:18:48,954 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 16:18:48,955 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 16:18:48,955 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 16:18:48,956 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 16:18:48,957 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 16:18:48,957 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 16:18:48,958 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 16:18:48,959 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 16:18:48,959 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 16:18:48,960 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 16:18:48,961 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 16:18:48,963 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 16:18:48,964 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 16:18:48,965 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 16:18:48,965 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 16:18:48,966 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 16:18:48,968 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 16:18:48,968 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 16:18:48,968 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 16:18:48,968 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 16:18:48,969 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 16:18:48,969 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 16:18:48,969 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 16:18:48,970 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 16:18:48,970 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 16:18:48,971 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 16:18:48,971 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 16:18:48,971 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 16:18:48,972 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 16:18:48,972 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 16:18:48,972 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 16:18:48,972 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 16:18:48,973 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 16:18:48,973 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_cdd49675-f65f-4ca9-bde7-3f1e5d7d9c4a/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 16:18:48,983 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 16:18:48,983 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 16:18:48,984 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 16:18:48,984 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 16:18:48,984 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 16:18:48,984 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 16:18:48,984 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 16:18:48,984 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 16:18:48,985 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 16:18:48,985 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 16:18:48,985 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 16:18:48,985 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 16:18:48,985 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 16:18:48,985 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 16:18:48,985 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 16:18:48,985 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 16:18:48,986 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 16:18:48,986 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 16:18:48,986 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 16:18:48,986 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 16:18:48,986 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 16:18:48,986 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 16:18:48,986 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 16:18:48,987 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 16:18:48,987 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 16:18:48,987 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 16:18:48,987 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 16:18:48,987 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 16:18:48,987 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 16:18:48,987 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_cdd49675-f65f-4ca9-bde7-3f1e5d7d9c4a/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> b6f84a75f7e7e2b60206e8ca033ac378ee639ae0 [2019-12-07 16:18:49,085 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 16:18:49,093 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 16:18:49,095 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 16:18:49,096 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 16:18:49,096 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 16:18:49,097 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_cdd49675-f65f-4ca9-bde7-3f1e5d7d9c4a/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe029_power.oepc.i [2019-12-07 16:18:49,133 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_cdd49675-f65f-4ca9-bde7-3f1e5d7d9c4a/bin/uautomizer/data/7609c9f47/08b8dfedc3eb45c198cbea824a3b943f/FLAGc6aeb3ba6 [2019-12-07 16:18:49,535 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 16:18:49,535 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_cdd49675-f65f-4ca9-bde7-3f1e5d7d9c4a/sv-benchmarks/c/pthread-wmm/safe029_power.oepc.i [2019-12-07 16:18:49,545 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_cdd49675-f65f-4ca9-bde7-3f1e5d7d9c4a/bin/uautomizer/data/7609c9f47/08b8dfedc3eb45c198cbea824a3b943f/FLAGc6aeb3ba6 [2019-12-07 16:18:49,554 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_cdd49675-f65f-4ca9-bde7-3f1e5d7d9c4a/bin/uautomizer/data/7609c9f47/08b8dfedc3eb45c198cbea824a3b943f [2019-12-07 16:18:49,557 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 16:18:49,558 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 16:18:49,559 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 16:18:49,559 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 16:18:49,562 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 16:18:49,563 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 04:18:49" (1/1) ... [2019-12-07 16:18:49,565 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6a1693e9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:18:49, skipping insertion in model container [2019-12-07 16:18:49,565 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 04:18:49" (1/1) ... [2019-12-07 16:18:49,571 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 16:18:49,599 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 16:18:49,834 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 16:18:49,842 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 16:18:49,886 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 16:18:49,932 INFO L208 MainTranslator]: Completed translation [2019-12-07 16:18:49,932 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:18:49 WrapperNode [2019-12-07 16:18:49,932 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 16:18:49,933 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 16:18:49,933 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 16:18:49,933 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 16:18:49,939 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:18:49" (1/1) ... [2019-12-07 16:18:49,951 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:18:49" (1/1) ... [2019-12-07 16:18:49,974 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 16:18:49,975 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 16:18:49,975 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 16:18:49,975 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 16:18:49,981 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:18:49" (1/1) ... [2019-12-07 16:18:49,981 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:18:49" (1/1) ... [2019-12-07 16:18:49,985 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:18:49" (1/1) ... [2019-12-07 16:18:49,985 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:18:49" (1/1) ... [2019-12-07 16:18:49,991 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:18:49" (1/1) ... [2019-12-07 16:18:49,994 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:18:49" (1/1) ... [2019-12-07 16:18:49,996 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:18:49" (1/1) ... [2019-12-07 16:18:49,999 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 16:18:50,000 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 16:18:50,000 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 16:18:50,000 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 16:18:50,000 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:18:49" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_cdd49675-f65f-4ca9-bde7-3f1e5d7d9c4a/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 16:18:50,043 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 16:18:50,043 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 16:18:50,043 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 16:18:50,043 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 16:18:50,043 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 16:18:50,043 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 16:18:50,043 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 16:18:50,043 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 16:18:50,043 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 16:18:50,043 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 16:18:50,044 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 16:18:50,045 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 16:18:50,378 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 16:18:50,378 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 16:18:50,379 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 04:18:50 BoogieIcfgContainer [2019-12-07 16:18:50,379 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 16:18:50,380 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 16:18:50,380 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 16:18:50,381 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 16:18:50,382 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 04:18:49" (1/3) ... [2019-12-07 16:18:50,382 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7c1929a8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 04:18:50, skipping insertion in model container [2019-12-07 16:18:50,382 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:18:49" (2/3) ... [2019-12-07 16:18:50,382 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7c1929a8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 04:18:50, skipping insertion in model container [2019-12-07 16:18:50,382 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 04:18:50" (3/3) ... [2019-12-07 16:18:50,383 INFO L109 eAbstractionObserver]: Analyzing ICFG safe029_power.oepc.i [2019-12-07 16:18:50,390 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 16:18:50,390 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 16:18:50,394 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 16:18:50,395 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 16:18:50,415 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,415 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,416 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,416 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,416 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,416 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,416 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,416 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,416 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,417 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,417 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,417 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,417 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,417 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,417 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,417 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,417 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,417 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,418 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,418 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,418 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,418 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,418 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,418 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,418 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,418 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,419 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,419 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,419 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,419 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,419 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,419 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,419 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,419 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,420 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,420 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,420 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,420 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,420 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,420 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,420 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,420 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,420 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,421 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,421 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,421 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,421 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,421 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,421 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,421 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,421 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,421 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,422 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,422 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,422 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,422 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,422 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,422 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,422 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,422 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,423 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,423 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,423 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,423 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:18:50,433 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-12-07 16:18:50,445 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 16:18:50,445 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 16:18:50,445 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 16:18:50,445 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 16:18:50,445 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 16:18:50,445 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 16:18:50,445 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 16:18:50,445 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 16:18:50,455 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 145 places, 179 transitions [2019-12-07 16:18:50,457 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 145 places, 179 transitions [2019-12-07 16:18:50,503 INFO L134 PetriNetUnfolder]: 41/177 cut-off events. [2019-12-07 16:18:50,504 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 16:18:50,511 INFO L76 FinitePrefix]: Finished finitePrefix Result has 184 conditions, 177 events. 41/177 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 466 event pairs. 6/140 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-12-07 16:18:50,522 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 145 places, 179 transitions [2019-12-07 16:18:50,543 INFO L134 PetriNetUnfolder]: 41/177 cut-off events. [2019-12-07 16:18:50,543 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 16:18:50,546 INFO L76 FinitePrefix]: Finished finitePrefix Result has 184 conditions, 177 events. 41/177 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 466 event pairs. 6/140 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-12-07 16:18:50,554 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 10418 [2019-12-07 16:18:50,555 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 16:18:53,122 WARN L192 SmtUtils]: Spent 119.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 77 [2019-12-07 16:18:53,199 INFO L206 etLargeBlockEncoding]: Checked pairs total: 46212 [2019-12-07 16:18:53,199 INFO L214 etLargeBlockEncoding]: Total number of compositions: 97 [2019-12-07 16:18:53,202 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 78 places, 90 transitions [2019-12-07 16:18:53,537 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 8458 states. [2019-12-07 16:18:53,539 INFO L276 IsEmpty]: Start isEmpty. Operand 8458 states. [2019-12-07 16:18:53,542 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 16:18:53,542 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:18:53,543 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 16:18:53,543 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:18:53,547 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:18:53,547 INFO L82 PathProgramCache]: Analyzing trace with hash 717058, now seen corresponding path program 1 times [2019-12-07 16:18:53,553 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:18:53,553 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1852935292] [2019-12-07 16:18:53,553 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:18:53,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:18:53,700 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:18:53,700 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1852935292] [2019-12-07 16:18:53,701 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:18:53,701 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 16:18:53,702 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1989937838] [2019-12-07 16:18:53,705 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:18:53,705 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:18:53,714 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:18:53,714 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:18:53,716 INFO L87 Difference]: Start difference. First operand 8458 states. Second operand 3 states. [2019-12-07 16:18:53,896 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:18:53,896 INFO L93 Difference]: Finished difference Result 8394 states and 27476 transitions. [2019-12-07 16:18:53,897 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:18:53,898 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 16:18:53,898 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:18:53,962 INFO L225 Difference]: With dead ends: 8394 [2019-12-07 16:18:53,963 INFO L226 Difference]: Without dead ends: 8226 [2019-12-07 16:18:53,964 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:18:54,049 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8226 states. [2019-12-07 16:18:54,221 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8226 to 8226. [2019-12-07 16:18:54,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8226 states. [2019-12-07 16:18:54,253 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8226 states to 8226 states and 26958 transitions. [2019-12-07 16:18:54,254 INFO L78 Accepts]: Start accepts. Automaton has 8226 states and 26958 transitions. Word has length 3 [2019-12-07 16:18:54,254 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:18:54,255 INFO L462 AbstractCegarLoop]: Abstraction has 8226 states and 26958 transitions. [2019-12-07 16:18:54,255 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:18:54,255 INFO L276 IsEmpty]: Start isEmpty. Operand 8226 states and 26958 transitions. [2019-12-07 16:18:54,257 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 16:18:54,257 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:18:54,257 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:18:54,257 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:18:54,257 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:18:54,257 INFO L82 PathProgramCache]: Analyzing trace with hash 651590314, now seen corresponding path program 1 times [2019-12-07 16:18:54,257 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:18:54,258 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2039655707] [2019-12-07 16:18:54,258 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:18:54,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:18:54,341 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:18:54,341 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2039655707] [2019-12-07 16:18:54,341 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:18:54,341 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:18:54,341 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1930687147] [2019-12-07 16:18:54,342 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:18:54,342 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:18:54,342 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:18:54,343 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:18:54,343 INFO L87 Difference]: Start difference. First operand 8226 states and 26958 transitions. Second operand 4 states. [2019-12-07 16:18:54,623 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:18:54,624 INFO L93 Difference]: Finished difference Result 12778 states and 40134 transitions. [2019-12-07 16:18:54,624 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:18:54,624 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 16:18:54,624 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:18:54,685 INFO L225 Difference]: With dead ends: 12778 [2019-12-07 16:18:54,685 INFO L226 Difference]: Without dead ends: 12771 [2019-12-07 16:18:54,686 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:18:54,771 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12771 states. [2019-12-07 16:18:54,987 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12771 to 11467. [2019-12-07 16:18:54,988 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11467 states. [2019-12-07 16:18:55,012 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11467 states to 11467 states and 36507 transitions. [2019-12-07 16:18:55,012 INFO L78 Accepts]: Start accepts. Automaton has 11467 states and 36507 transitions. Word has length 11 [2019-12-07 16:18:55,012 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:18:55,012 INFO L462 AbstractCegarLoop]: Abstraction has 11467 states and 36507 transitions. [2019-12-07 16:18:55,012 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:18:55,013 INFO L276 IsEmpty]: Start isEmpty. Operand 11467 states and 36507 transitions. [2019-12-07 16:18:55,015 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 16:18:55,015 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:18:55,015 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:18:55,016 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:18:55,016 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:18:55,016 INFO L82 PathProgramCache]: Analyzing trace with hash -1968692504, now seen corresponding path program 1 times [2019-12-07 16:18:55,016 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:18:55,016 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [928254945] [2019-12-07 16:18:55,016 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:18:55,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:18:55,085 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:18:55,085 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [928254945] [2019-12-07 16:18:55,085 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:18:55,085 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:18:55,085 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [872338109] [2019-12-07 16:18:55,085 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:18:55,086 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:18:55,086 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:18:55,086 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:18:55,086 INFO L87 Difference]: Start difference. First operand 11467 states and 36507 transitions. Second operand 4 states. [2019-12-07 16:18:55,232 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:18:55,233 INFO L93 Difference]: Finished difference Result 14268 states and 44852 transitions. [2019-12-07 16:18:55,233 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:18:55,233 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 16:18:55,233 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:18:55,279 INFO L225 Difference]: With dead ends: 14268 [2019-12-07 16:18:55,280 INFO L226 Difference]: Without dead ends: 14268 [2019-12-07 16:18:55,280 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:18:55,354 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14268 states. [2019-12-07 16:18:55,504 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14268 to 12752. [2019-12-07 16:18:55,505 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12752 states. [2019-12-07 16:18:55,530 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12752 states to 12752 states and 40448 transitions. [2019-12-07 16:18:55,531 INFO L78 Accepts]: Start accepts. Automaton has 12752 states and 40448 transitions. Word has length 11 [2019-12-07 16:18:55,531 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:18:55,531 INFO L462 AbstractCegarLoop]: Abstraction has 12752 states and 40448 transitions. [2019-12-07 16:18:55,531 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:18:55,531 INFO L276 IsEmpty]: Start isEmpty. Operand 12752 states and 40448 transitions. [2019-12-07 16:18:55,535 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2019-12-07 16:18:55,535 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:18:55,535 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:18:55,535 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:18:55,535 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:18:55,535 INFO L82 PathProgramCache]: Analyzing trace with hash -1372508181, now seen corresponding path program 1 times [2019-12-07 16:18:55,535 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:18:55,535 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [455447217] [2019-12-07 16:18:55,535 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:18:55,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:18:55,586 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:18:55,590 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [455447217] [2019-12-07 16:18:55,590 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:18:55,590 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 16:18:55,590 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [835404882] [2019-12-07 16:18:55,590 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 16:18:55,590 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:18:55,590 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 16:18:55,591 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 16:18:55,591 INFO L87 Difference]: Start difference. First operand 12752 states and 40448 transitions. Second operand 6 states. [2019-12-07 16:18:55,858 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:18:55,858 INFO L93 Difference]: Finished difference Result 17010 states and 52843 transitions. [2019-12-07 16:18:55,859 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 16:18:55,859 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 17 [2019-12-07 16:18:55,859 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:18:55,880 INFO L225 Difference]: With dead ends: 17010 [2019-12-07 16:18:55,880 INFO L226 Difference]: Without dead ends: 17003 [2019-12-07 16:18:55,881 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 16:18:55,981 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17003 states. [2019-12-07 16:18:56,112 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17003 to 12755. [2019-12-07 16:18:56,112 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12755 states. [2019-12-07 16:18:56,132 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12755 states to 12755 states and 40342 transitions. [2019-12-07 16:18:56,132 INFO L78 Accepts]: Start accepts. Automaton has 12755 states and 40342 transitions. Word has length 17 [2019-12-07 16:18:56,132 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:18:56,132 INFO L462 AbstractCegarLoop]: Abstraction has 12755 states and 40342 transitions. [2019-12-07 16:18:56,132 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 16:18:56,133 INFO L276 IsEmpty]: Start isEmpty. Operand 12755 states and 40342 transitions. [2019-12-07 16:18:56,140 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 16:18:56,140 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:18:56,140 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:18:56,141 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:18:56,141 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:18:56,141 INFO L82 PathProgramCache]: Analyzing trace with hash -1155459573, now seen corresponding path program 1 times [2019-12-07 16:18:56,141 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:18:56,141 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [342637736] [2019-12-07 16:18:56,141 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:18:56,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:18:56,168 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:18:56,168 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [342637736] [2019-12-07 16:18:56,169 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:18:56,169 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:18:56,169 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2056028248] [2019-12-07 16:18:56,169 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:18:56,169 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:18:56,169 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:18:56,169 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:18:56,169 INFO L87 Difference]: Start difference. First operand 12755 states and 40342 transitions. Second operand 3 states. [2019-12-07 16:18:56,238 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:18:56,238 INFO L93 Difference]: Finished difference Result 15529 states and 48523 transitions. [2019-12-07 16:18:56,239 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:18:56,239 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2019-12-07 16:18:56,239 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:18:56,262 INFO L225 Difference]: With dead ends: 15529 [2019-12-07 16:18:56,262 INFO L226 Difference]: Without dead ends: 15529 [2019-12-07 16:18:56,262 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:18:56,326 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15529 states. [2019-12-07 16:18:56,475 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15529 to 13746. [2019-12-07 16:18:56,476 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13746 states. [2019-12-07 16:18:56,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13746 states to 13746 states and 43375 transitions. [2019-12-07 16:18:56,556 INFO L78 Accepts]: Start accepts. Automaton has 13746 states and 43375 transitions. Word has length 25 [2019-12-07 16:18:56,557 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:18:56,557 INFO L462 AbstractCegarLoop]: Abstraction has 13746 states and 43375 transitions. [2019-12-07 16:18:56,557 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:18:56,557 INFO L276 IsEmpty]: Start isEmpty. Operand 13746 states and 43375 transitions. [2019-12-07 16:18:56,563 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 16:18:56,563 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:18:56,563 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:18:56,563 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:18:56,563 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:18:56,564 INFO L82 PathProgramCache]: Analyzing trace with hash -1248228747, now seen corresponding path program 1 times [2019-12-07 16:18:56,564 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:18:56,564 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [524071505] [2019-12-07 16:18:56,564 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:18:56,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:18:56,654 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:18:56,655 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [524071505] [2019-12-07 16:18:56,655 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:18:56,655 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 16:18:56,655 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [715722858] [2019-12-07 16:18:56,655 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 16:18:56,655 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:18:56,655 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 16:18:56,656 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 16:18:56,656 INFO L87 Difference]: Start difference. First operand 13746 states and 43375 transitions. Second operand 6 states. [2019-12-07 16:18:56,939 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:18:56,940 INFO L93 Difference]: Finished difference Result 19657 states and 60760 transitions. [2019-12-07 16:18:56,940 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 16:18:56,940 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 25 [2019-12-07 16:18:56,940 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:18:56,964 INFO L225 Difference]: With dead ends: 19657 [2019-12-07 16:18:56,964 INFO L226 Difference]: Without dead ends: 19641 [2019-12-07 16:18:56,964 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 16:18:57,036 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19641 states. [2019-12-07 16:18:57,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19641 to 15905. [2019-12-07 16:18:57,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15905 states. [2019-12-07 16:18:57,227 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15905 states to 15905 states and 49859 transitions. [2019-12-07 16:18:57,227 INFO L78 Accepts]: Start accepts. Automaton has 15905 states and 49859 transitions. Word has length 25 [2019-12-07 16:18:57,227 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:18:57,227 INFO L462 AbstractCegarLoop]: Abstraction has 15905 states and 49859 transitions. [2019-12-07 16:18:57,227 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 16:18:57,227 INFO L276 IsEmpty]: Start isEmpty. Operand 15905 states and 49859 transitions. [2019-12-07 16:18:57,239 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 16:18:57,239 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:18:57,239 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:18:57,239 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:18:57,239 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:18:57,239 INFO L82 PathProgramCache]: Analyzing trace with hash 279625016, now seen corresponding path program 1 times [2019-12-07 16:18:57,239 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:18:57,240 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [867793016] [2019-12-07 16:18:57,240 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:18:57,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:18:57,289 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:18:57,289 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [867793016] [2019-12-07 16:18:57,290 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:18:57,290 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:18:57,290 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1802121383] [2019-12-07 16:18:57,290 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:18:57,290 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:18:57,290 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:18:57,291 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:18:57,291 INFO L87 Difference]: Start difference. First operand 15905 states and 49859 transitions. Second operand 4 states. [2019-12-07 16:18:57,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:18:57,315 INFO L93 Difference]: Finished difference Result 2247 states and 5122 transitions. [2019-12-07 16:18:57,315 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 16:18:57,315 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 31 [2019-12-07 16:18:57,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:18:57,317 INFO L225 Difference]: With dead ends: 2247 [2019-12-07 16:18:57,317 INFO L226 Difference]: Without dead ends: 1970 [2019-12-07 16:18:57,318 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:18:57,321 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1970 states. [2019-12-07 16:18:57,334 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1970 to 1970. [2019-12-07 16:18:57,334 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1970 states. [2019-12-07 16:18:57,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1970 states to 1970 states and 4356 transitions. [2019-12-07 16:18:57,336 INFO L78 Accepts]: Start accepts. Automaton has 1970 states and 4356 transitions. Word has length 31 [2019-12-07 16:18:57,336 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:18:57,337 INFO L462 AbstractCegarLoop]: Abstraction has 1970 states and 4356 transitions. [2019-12-07 16:18:57,337 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:18:57,337 INFO L276 IsEmpty]: Start isEmpty. Operand 1970 states and 4356 transitions. [2019-12-07 16:18:57,338 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-12-07 16:18:57,339 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:18:57,339 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:18:57,339 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:18:57,339 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:18:57,339 INFO L82 PathProgramCache]: Analyzing trace with hash -1011623832, now seen corresponding path program 1 times [2019-12-07 16:18:57,340 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:18:57,340 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [316875071] [2019-12-07 16:18:57,340 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:18:57,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:18:57,548 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:18:57,549 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [316875071] [2019-12-07 16:18:57,549 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:18:57,549 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 16:18:57,549 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [281114138] [2019-12-07 16:18:57,550 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 16:18:57,550 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:18:57,550 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 16:18:57,550 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2019-12-07 16:18:57,550 INFO L87 Difference]: Start difference. First operand 1970 states and 4356 transitions. Second operand 9 states. [2019-12-07 16:18:57,933 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:18:57,934 INFO L93 Difference]: Finished difference Result 2561 states and 5544 transitions. [2019-12-07 16:18:57,934 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 16:18:57,934 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 37 [2019-12-07 16:18:57,934 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:18:57,937 INFO L225 Difference]: With dead ends: 2561 [2019-12-07 16:18:57,937 INFO L226 Difference]: Without dead ends: 2559 [2019-12-07 16:18:57,937 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=117, Unknown=0, NotChecked=0, Total=156 [2019-12-07 16:18:57,941 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2559 states. [2019-12-07 16:18:57,959 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2559 to 2033. [2019-12-07 16:18:57,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2033 states. [2019-12-07 16:18:57,961 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2033 states to 2033 states and 4500 transitions. [2019-12-07 16:18:57,962 INFO L78 Accepts]: Start accepts. Automaton has 2033 states and 4500 transitions. Word has length 37 [2019-12-07 16:18:57,962 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:18:57,962 INFO L462 AbstractCegarLoop]: Abstraction has 2033 states and 4500 transitions. [2019-12-07 16:18:57,962 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 16:18:57,962 INFO L276 IsEmpty]: Start isEmpty. Operand 2033 states and 4500 transitions. [2019-12-07 16:18:57,965 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 16:18:57,965 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:18:57,965 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:18:57,965 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:18:57,965 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:18:57,965 INFO L82 PathProgramCache]: Analyzing trace with hash -669150451, now seen corresponding path program 1 times [2019-12-07 16:18:57,965 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:18:57,965 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1463759295] [2019-12-07 16:18:57,966 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:18:57,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:18:58,032 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:18:58,032 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1463759295] [2019-12-07 16:18:58,032 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:18:58,032 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 16:18:58,033 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1994179868] [2019-12-07 16:18:58,033 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:18:58,033 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:18:58,033 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:18:58,033 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:18:58,034 INFO L87 Difference]: Start difference. First operand 2033 states and 4500 transitions. Second operand 5 states. [2019-12-07 16:18:58,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:18:58,344 INFO L93 Difference]: Finished difference Result 2780 states and 6027 transitions. [2019-12-07 16:18:58,344 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 16:18:58,344 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 16:18:58,344 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:18:58,346 INFO L225 Difference]: With dead ends: 2780 [2019-12-07 16:18:58,346 INFO L226 Difference]: Without dead ends: 2780 [2019-12-07 16:18:58,346 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 16:18:58,349 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2780 states. [2019-12-07 16:18:58,364 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2780 to 2441. [2019-12-07 16:18:58,364 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2441 states. [2019-12-07 16:18:58,366 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2441 states to 2441 states and 5347 transitions. [2019-12-07 16:18:58,367 INFO L78 Accepts]: Start accepts. Automaton has 2441 states and 5347 transitions. Word has length 41 [2019-12-07 16:18:58,367 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:18:58,367 INFO L462 AbstractCegarLoop]: Abstraction has 2441 states and 5347 transitions. [2019-12-07 16:18:58,367 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:18:58,367 INFO L276 IsEmpty]: Start isEmpty. Operand 2441 states and 5347 transitions. [2019-12-07 16:18:58,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 16:18:58,369 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:18:58,369 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:18:58,369 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:18:58,369 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:18:58,369 INFO L82 PathProgramCache]: Analyzing trace with hash -1265386816, now seen corresponding path program 1 times [2019-12-07 16:18:58,370 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:18:58,370 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [235074927] [2019-12-07 16:18:58,370 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:18:58,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:18:58,416 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:18:58,416 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [235074927] [2019-12-07 16:18:58,416 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:18:58,416 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:18:58,416 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [246147910] [2019-12-07 16:18:58,416 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:18:58,416 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:18:58,417 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:18:58,417 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:18:58,417 INFO L87 Difference]: Start difference. First operand 2441 states and 5347 transitions. Second operand 3 states. [2019-12-07 16:18:58,429 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:18:58,430 INFO L93 Difference]: Finished difference Result 2372 states and 5134 transitions. [2019-12-07 16:18:58,430 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:18:58,430 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 42 [2019-12-07 16:18:58,430 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:18:58,432 INFO L225 Difference]: With dead ends: 2372 [2019-12-07 16:18:58,432 INFO L226 Difference]: Without dead ends: 2372 [2019-12-07 16:18:58,432 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:18:58,435 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2372 states. [2019-12-07 16:18:58,449 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2372 to 2364. [2019-12-07 16:18:58,449 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2364 states. [2019-12-07 16:18:58,452 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2364 states to 2364 states and 5118 transitions. [2019-12-07 16:18:58,452 INFO L78 Accepts]: Start accepts. Automaton has 2364 states and 5118 transitions. Word has length 42 [2019-12-07 16:18:58,452 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:18:58,452 INFO L462 AbstractCegarLoop]: Abstraction has 2364 states and 5118 transitions. [2019-12-07 16:18:58,452 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:18:58,452 INFO L276 IsEmpty]: Start isEmpty. Operand 2364 states and 5118 transitions. [2019-12-07 16:18:58,454 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 16:18:58,454 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:18:58,454 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:18:58,455 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:18:58,455 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:18:58,455 INFO L82 PathProgramCache]: Analyzing trace with hash 1349071825, now seen corresponding path program 1 times [2019-12-07 16:18:58,455 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:18:58,455 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1214026809] [2019-12-07 16:18:58,455 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:18:58,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:18:58,501 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:18:58,501 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1214026809] [2019-12-07 16:18:58,501 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:18:58,502 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 16:18:58,502 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1803690430] [2019-12-07 16:18:58,502 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:18:58,502 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:18:58,502 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:18:58,502 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:18:58,502 INFO L87 Difference]: Start difference. First operand 2364 states and 5118 transitions. Second operand 5 states. [2019-12-07 16:18:58,527 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:18:58,527 INFO L93 Difference]: Finished difference Result 581 states and 1046 transitions. [2019-12-07 16:18:58,527 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:18:58,528 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-12-07 16:18:58,528 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:18:58,528 INFO L225 Difference]: With dead ends: 581 [2019-12-07 16:18:58,528 INFO L226 Difference]: Without dead ends: 514 [2019-12-07 16:18:58,528 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 16:18:58,529 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 514 states. [2019-12-07 16:18:58,531 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 514 to 425. [2019-12-07 16:18:58,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 425 states. [2019-12-07 16:18:58,532 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 425 states to 425 states and 753 transitions. [2019-12-07 16:18:58,532 INFO L78 Accepts]: Start accepts. Automaton has 425 states and 753 transitions. Word has length 42 [2019-12-07 16:18:58,532 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:18:58,532 INFO L462 AbstractCegarLoop]: Abstraction has 425 states and 753 transitions. [2019-12-07 16:18:58,532 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:18:58,532 INFO L276 IsEmpty]: Start isEmpty. Operand 425 states and 753 transitions. [2019-12-07 16:18:58,533 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 16:18:58,533 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:18:58,533 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:18:58,533 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:18:58,533 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:18:58,533 INFO L82 PathProgramCache]: Analyzing trace with hash 923557156, now seen corresponding path program 1 times [2019-12-07 16:18:58,533 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:18:58,533 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1619305348] [2019-12-07 16:18:58,533 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:18:58,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:18:58,570 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:18:58,570 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1619305348] [2019-12-07 16:18:58,570 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:18:58,571 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:18:58,571 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1310376040] [2019-12-07 16:18:58,571 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:18:58,571 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:18:58,571 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:18:58,571 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:18:58,571 INFO L87 Difference]: Start difference. First operand 425 states and 753 transitions. Second operand 3 states. [2019-12-07 16:18:58,596 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:18:58,596 INFO L93 Difference]: Finished difference Result 424 states and 751 transitions. [2019-12-07 16:18:58,596 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:18:58,596 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-12-07 16:18:58,596 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:18:58,597 INFO L225 Difference]: With dead ends: 424 [2019-12-07 16:18:58,597 INFO L226 Difference]: Without dead ends: 424 [2019-12-07 16:18:58,597 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:18:58,598 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 424 states. [2019-12-07 16:18:58,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 424 to 333. [2019-12-07 16:18:58,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 333 states. [2019-12-07 16:18:58,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 333 states to 333 states and 585 transitions. [2019-12-07 16:18:58,600 INFO L78 Accepts]: Start accepts. Automaton has 333 states and 585 transitions. Word has length 53 [2019-12-07 16:18:58,600 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:18:58,600 INFO L462 AbstractCegarLoop]: Abstraction has 333 states and 585 transitions. [2019-12-07 16:18:58,600 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:18:58,600 INFO L276 IsEmpty]: Start isEmpty. Operand 333 states and 585 transitions. [2019-12-07 16:18:58,601 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 16:18:58,601 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:18:58,601 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:18:58,601 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:18:58,601 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:18:58,601 INFO L82 PathProgramCache]: Analyzing trace with hash 1896622654, now seen corresponding path program 1 times [2019-12-07 16:18:58,601 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:18:58,601 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1268807931] [2019-12-07 16:18:58,601 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:18:58,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:18:58,664 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:18:58,664 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1268807931] [2019-12-07 16:18:58,664 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:18:58,665 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 16:18:58,665 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [332327203] [2019-12-07 16:18:58,665 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:18:58,665 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:18:58,665 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:18:58,665 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:18:58,666 INFO L87 Difference]: Start difference. First operand 333 states and 585 transitions. Second operand 5 states. [2019-12-07 16:18:58,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:18:58,692 INFO L93 Difference]: Finished difference Result 510 states and 895 transitions. [2019-12-07 16:18:58,692 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:18:58,692 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 54 [2019-12-07 16:18:58,692 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:18:58,693 INFO L225 Difference]: With dead ends: 510 [2019-12-07 16:18:58,693 INFO L226 Difference]: Without dead ends: 219 [2019-12-07 16:18:58,693 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 16:18:58,693 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219 states. [2019-12-07 16:18:58,695 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219 to 219. [2019-12-07 16:18:58,695 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 219 states. [2019-12-07 16:18:58,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 219 states to 219 states and 389 transitions. [2019-12-07 16:18:58,695 INFO L78 Accepts]: Start accepts. Automaton has 219 states and 389 transitions. Word has length 54 [2019-12-07 16:18:58,695 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:18:58,695 INFO L462 AbstractCegarLoop]: Abstraction has 219 states and 389 transitions. [2019-12-07 16:18:58,695 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:18:58,695 INFO L276 IsEmpty]: Start isEmpty. Operand 219 states and 389 transitions. [2019-12-07 16:18:58,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 16:18:58,696 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:18:58,696 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:18:58,696 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:18:58,696 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:18:58,696 INFO L82 PathProgramCache]: Analyzing trace with hash 133727006, now seen corresponding path program 2 times [2019-12-07 16:18:58,696 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:18:58,696 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [685179637] [2019-12-07 16:18:58,697 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:18:58,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:18:58,850 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:18:58,850 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [685179637] [2019-12-07 16:18:58,850 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:18:58,850 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 16:18:58,850 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1277555798] [2019-12-07 16:18:58,850 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 16:18:58,850 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:18:58,851 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 16:18:58,851 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=129, Unknown=0, NotChecked=0, Total=156 [2019-12-07 16:18:58,851 INFO L87 Difference]: Start difference. First operand 219 states and 389 transitions. Second operand 13 states. [2019-12-07 16:18:59,129 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:18:59,129 INFO L93 Difference]: Finished difference Result 368 states and 633 transitions. [2019-12-07 16:18:59,129 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 16:18:59,129 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 54 [2019-12-07 16:18:59,130 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:18:59,130 INFO L225 Difference]: With dead ends: 368 [2019-12-07 16:18:59,130 INFO L226 Difference]: Without dead ends: 337 [2019-12-07 16:18:59,130 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 83 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=117, Invalid=483, Unknown=0, NotChecked=0, Total=600 [2019-12-07 16:18:59,131 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 337 states. [2019-12-07 16:18:59,132 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 337 to 327. [2019-12-07 16:18:59,132 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 327 states. [2019-12-07 16:18:59,133 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 327 states to 327 states and 574 transitions. [2019-12-07 16:18:59,133 INFO L78 Accepts]: Start accepts. Automaton has 327 states and 574 transitions. Word has length 54 [2019-12-07 16:18:59,133 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:18:59,133 INFO L462 AbstractCegarLoop]: Abstraction has 327 states and 574 transitions. [2019-12-07 16:18:59,133 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 16:18:59,133 INFO L276 IsEmpty]: Start isEmpty. Operand 327 states and 574 transitions. [2019-12-07 16:18:59,133 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 16:18:59,134 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:18:59,134 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:18:59,134 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:18:59,134 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:18:59,134 INFO L82 PathProgramCache]: Analyzing trace with hash 2067211286, now seen corresponding path program 3 times [2019-12-07 16:18:59,134 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:18:59,134 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [973906874] [2019-12-07 16:18:59,134 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:18:59,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 16:18:59,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 16:18:59,198 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 16:18:59,198 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 16:18:59,200 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [696] [696] ULTIMATE.startENTRY-->L777: Formula: (let ((.cse0 (store |v_#valid_40| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t2473~0.base_19|) (= 0 v_~__unbuffered_cnt~0_61) (= v_~weak$$choice2~0_132 0) (= |v_#NULL.offset_6| 0) (= v_~y$read_delayed~0_7 0) (= v_~y$w_buff1_used~0_444 0) (= v_~y$r_buff1_thd0~0_304 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t2473~0.base_19|) 0) (= v_~main$tmp_guard0~0_23 0) (= v_~y$r_buff0_thd0~0_394 0) (= |v_#valid_38| (store .cse0 |v_ULTIMATE.start_main_~#t2473~0.base_19| 1)) (= |v_#memory_int_15| (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2473~0.base_19| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2473~0.base_19|) |v_ULTIMATE.start_main_~#t2473~0.offset_16| 0))) (= 0 v_~y$w_buff0~0_376) (= 0 |v_#NULL.base_6|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t2473~0.base_19| 4)) (= v_~y$r_buff1_thd1~0_220 0) (= v_~y~0_141 0) (= v_~y$r_buff0_thd1~0_301 0) (= 0 v_~weak$$choice0~0_24) (= 0 v_~y$flush_delayed~0_48) (= 0 v_~y$r_buff0_thd2~0_175) (= v_~y$w_buff1~0_254 0) (= v_~y$mem_tmp~0_31 0) (= v_~y$w_buff0_used~0_753 0) (= 0 v_~y$read_delayed_var~0.offset_6) (= 0 v_~y$r_buff1_thd2~0_205) (= 0 |v_ULTIMATE.start_main_~#t2473~0.offset_16|) (= 0 v_~x~0_168) (< 0 |v_#StackHeapBarrier_13|) (= v_~main$tmp_guard1~0_22 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_45|, ULTIMATE.start_main_~#t2473~0.base=|v_ULTIMATE.start_main_~#t2473~0.base_19|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_32|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_32|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_42|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_56|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_35|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ~y$mem_tmp~0=v_~y$mem_tmp~0_31, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_301, ~y$flush_delayed~0=v_~y$flush_delayed~0_48, #length=|v_#length_15|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_29|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_32|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_44|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_35|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_51|, ULTIMATE.start_main_~#t2474~0.offset=|v_ULTIMATE.start_main_~#t2474~0.offset_15|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_45|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_31|, ~weak$$choice0~0=v_~weak$$choice0~0_24, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_30|, ~y$w_buff1~0=v_~y$w_buff1~0_254, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_175, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61, ULTIMATE.start_main_~#t2473~0.offset=|v_ULTIMATE.start_main_~#t2473~0.offset_16|, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_304, ~x~0=v_~x~0_168, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_753, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_28|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_28|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_22, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_43|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_28|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_46|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_28|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_220, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_39|, ~y$w_buff0~0=v_~y$w_buff0~0_376, ~y~0=v_~y~0_141, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_30|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_44|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_26|, ULTIMATE.start_main_~#t2474~0.base=|v_ULTIMATE.start_main_~#t2474~0.base_19|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_37|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_29|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_23, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_28|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_39|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_205, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_16|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_15|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_394, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_13|, ~weak$$choice2~0=v_~weak$$choice2~0_132, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_444} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t2473~0.base, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~y$mem_tmp~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_~#t2474~0.offset, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t2473~0.offset, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_~#t2474~0.base, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 16:18:59,201 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [677] [677] L777-1-->L779: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t2474~0.base_11|)) (= |v_#valid_21| (store |v_#valid_22| |v_ULTIMATE.start_main_~#t2474~0.base_11| 1)) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t2474~0.base_11| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t2474~0.base_11|) |v_ULTIMATE.start_main_~#t2474~0.offset_10| 1))) (= 0 |v_ULTIMATE.start_main_~#t2474~0.offset_10|) (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t2474~0.base_11|) (= 0 (select |v_#valid_22| |v_ULTIMATE.start_main_~#t2474~0.base_11|)) (= (store |v_#length_10| |v_ULTIMATE.start_main_~#t2474~0.base_11| 4) |v_#length_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_22|, #memory_int=|v_#memory_int_10|, #length=|v_#length_10|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_21|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~#t2474~0.base=|v_ULTIMATE.start_main_~#t2474~0.base_11|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_9|, ULTIMATE.start_main_~#t2474~0.offset=|v_ULTIMATE.start_main_~#t2474~0.offset_10|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_~#t2474~0.base, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t2474~0.offset] because there is no mapped edge [2019-12-07 16:18:59,201 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [623] [623] P0ENTRY-->L4-3: Formula: (and (= 2 v_~y$w_buff0~0_172) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_79 0)) (= (ite (not (and (not (= (mod v_~y$w_buff0_used~0_290 256) 0)) (not (= 0 (mod v_~y$w_buff1_used~0_162 256))))) 1 0) |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_77|) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_79 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_77|) (= v_~y$w_buff0_used~0_290 1) (= v_P0Thread1of1ForFork0_~arg.offset_77 |v_P0Thread1of1ForFork0_#in~arg.offset_79|) (= v_P0Thread1of1ForFork0_~arg.base_77 |v_P0Thread1of1ForFork0_#in~arg.base_79|) (= v_~y$w_buff0_used~0_291 v_~y$w_buff1_used~0_162) (= v_~y$w_buff1~0_100 v_~y$w_buff0~0_173)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_79|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_291, ~y$w_buff0~0=v_~y$w_buff0~0_173, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_79|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_79|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_290, ~y$w_buff1~0=v_~y$w_buff1~0_100, ~y$w_buff0~0=v_~y$w_buff0~0_172, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_79, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_79|, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_77, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_77|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_77, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_162} AuxVars[] AssignedVars[~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 16:18:59,202 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L735-->L735-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd1~0_In-707767518 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-707767518 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite5_Out-707767518| 0) (not .cse0) (not .cse1)) (and (= |P0Thread1of1ForFork0_#t~ite5_Out-707767518| ~y$w_buff0_used~0_In-707767518) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-707767518, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-707767518} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-707767518|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-707767518, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-707767518} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 16:18:59,202 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L754-2-->L754-4: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In757781375 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd2~0_In757781375 256) 0))) (or (and (= ~y$w_buff1~0_In757781375 |P1Thread1of1ForFork1_#t~ite9_Out757781375|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~y~0_In757781375 |P1Thread1of1ForFork1_#t~ite9_Out757781375|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In757781375, ~y$w_buff1~0=~y$w_buff1~0_In757781375, ~y~0=~y~0_In757781375, ~y$w_buff1_used~0=~y$w_buff1_used~0_In757781375} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In757781375, ~y$w_buff1~0=~y$w_buff1~0_In757781375, P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out757781375|, ~y~0=~y~0_In757781375, ~y$w_buff1_used~0=~y$w_buff1_used~0_In757781375} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9] because there is no mapped edge [2019-12-07 16:18:59,202 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [630] [630] L754-4-->L755: Formula: (= v_~y~0_50 |v_P1Thread1of1ForFork1_#t~ite9_12|) InVars {P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_12|} OutVars{P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_11|, P1Thread1of1ForFork1_#t~ite10=|v_P1Thread1of1ForFork1_#t~ite10_13|, ~y~0=v_~y~0_50} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10, ~y~0] because there is no mapped edge [2019-12-07 16:18:59,202 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [640] [640] L755-->L755-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1607866896 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In-1607866896 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out-1607866896|)) (and (= |P1Thread1of1ForFork1_#t~ite11_Out-1607866896| ~y$w_buff0_used~0_In-1607866896) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1607866896, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1607866896} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1607866896, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1607866896, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-1607866896|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 16:18:59,202 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L736-->L736-2: Formula: (let ((.cse3 (= (mod ~y$r_buff0_thd1~0_In842919619 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In842919619 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd1~0_In842919619 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In842919619 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite6_Out842919619| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P0Thread1of1ForFork0_#t~ite6_Out842919619| ~y$w_buff1_used~0_In842919619) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In842919619, ~y$w_buff0_used~0=~y$w_buff0_used~0_In842919619, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In842919619, ~y$w_buff1_used~0=~y$w_buff1_used~0_In842919619} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out842919619|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In842919619, ~y$w_buff0_used~0=~y$w_buff0_used~0_In842919619, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In842919619, ~y$w_buff1_used~0=~y$w_buff1_used~0_In842919619} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 16:18:59,203 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L737-->L738: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd1~0_In1021541712 256) 0)) (.cse0 (= ~y$r_buff0_thd1~0_In1021541712 ~y$r_buff0_thd1~0_Out1021541712)) (.cse2 (= (mod ~y$w_buff0_used~0_In1021541712 256) 0))) (or (and .cse0 .cse1) (and (= 0 ~y$r_buff0_thd1~0_Out1021541712) (not .cse2) (not .cse1)) (and .cse0 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1021541712, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1021541712} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1021541712, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out1021541712|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_Out1021541712} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~y$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 16:18:59,203 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [638] [638] L756-->L756-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In-2060814609 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In-2060814609 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In-2060814609 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd2~0_In-2060814609 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite12_Out-2060814609| ~y$w_buff1_used~0_In-2060814609) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork1_#t~ite12_Out-2060814609| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-2060814609, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2060814609, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-2060814609, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2060814609} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-2060814609, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2060814609, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-2060814609, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-2060814609|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2060814609} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 16:18:59,203 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L757-->L757-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In1454999533 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In1454999533 256)))) (or (and (= ~y$r_buff0_thd2~0_In1454999533 |P1Thread1of1ForFork1_#t~ite13_Out1454999533|) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P1Thread1of1ForFork1_#t~ite13_Out1454999533|) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1454999533, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1454999533} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1454999533, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1454999533, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out1454999533|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 16:18:59,203 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [644] [644] L758-->L758-2: Formula: (let ((.cse2 (= (mod ~y$w_buff1_used~0_In-1471100370 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd2~0_In-1471100370 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-1471100370 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-1471100370 256) 0))) (or (and (or .cse0 .cse1) (= ~y$r_buff1_thd2~0_In-1471100370 |P1Thread1of1ForFork1_#t~ite14_Out-1471100370|) (or .cse2 .cse3)) (and (= 0 |P1Thread1of1ForFork1_#t~ite14_Out-1471100370|) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1471100370, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1471100370, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1471100370, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1471100370} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1471100370, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1471100370, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1471100370, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-1471100370|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1471100370} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 16:18:59,203 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [668] [668] L758-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39) (= |v_P1Thread1of1ForFork1_#t~ite14_32| v_~y$r_buff1_thd2~0_85)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_32|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_85, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_31|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 16:18:59,204 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L738-->L738-2: Formula: (let ((.cse3 (= (mod ~y$r_buff1_thd1~0_In-1400614604 256) 0)) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In-1400614604 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd1~0_In-1400614604 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1400614604 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite8_Out-1400614604| 0)) (and (= |P0Thread1of1ForFork0_#t~ite8_Out-1400614604| ~y$r_buff1_thd1~0_In-1400614604) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-1400614604, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1400614604, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1400614604, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1400614604} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-1400614604, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1400614604, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-1400614604|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1400614604, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1400614604} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 16:18:59,204 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [663] [663] L738-2-->P0EXIT: Formula: (and (= v_~__unbuffered_cnt~0_32 (+ v_~__unbuffered_cnt~0_33 1)) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~y$r_buff1_thd1~0_63 |v_P0Thread1of1ForFork0_#t~ite8_26|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_33} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_63, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_25|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 16:18:59,204 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [592] [592] L783-->L785-2: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (or (= (mod v_~y$w_buff0_used~0_159 256) 0) (= (mod v_~y$r_buff0_thd0~0_61 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_159, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_61, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_159, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_61, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 16:18:59,204 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [654] [654] L785-2-->L785-4: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In2019555827 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In2019555827 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite17_Out2019555827| ~y$w_buff1~0_In2019555827) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite17_Out2019555827| ~y~0_In2019555827)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In2019555827, ~y~0=~y~0_In2019555827, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2019555827, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2019555827} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out2019555827|, ~y$w_buff1~0=~y$w_buff1~0_In2019555827, ~y~0=~y~0_In2019555827, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2019555827, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2019555827} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17] because there is no mapped edge [2019-12-07 16:18:59,204 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [621] [621] L785-4-->L786: Formula: (= v_~y~0_46 |v_ULTIMATE.start_main_#t~ite17_8|) InVars {ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_8|} OutVars{ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_7|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_8|, ~y~0=v_~y~0_46} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18, ~y~0] because there is no mapped edge [2019-12-07 16:18:59,204 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L786-->L786-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1512038279 256))) (.cse1 (= (mod ~y$r_buff0_thd0~0_In-1512038279 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite19_Out-1512038279| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite19_Out-1512038279| ~y$w_buff0_used~0_In-1512038279)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1512038279, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1512038279} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1512038279, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1512038279|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1512038279} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 16:18:59,204 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [641] [641] L787-->L787-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In-838964328 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-838964328 256))) (.cse2 (= (mod ~y$r_buff1_thd0~0_In-838964328 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In-838964328 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite20_Out-838964328| ~y$w_buff1_used~0_In-838964328)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite20_Out-838964328| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-838964328, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-838964328, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-838964328, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-838964328} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-838964328, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-838964328, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-838964328|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-838964328, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-838964328} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 16:18:59,205 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [650] [650] L788-->L788-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In1795293355 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In1795293355 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite21_Out1795293355| 0) (not .cse1)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite21_Out1795293355| ~y$r_buff0_thd0~0_In1795293355)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1795293355, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1795293355} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1795293355, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1795293355, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out1795293355|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 16:18:59,205 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [642] [642] L789-->L789-2: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In750841652 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In750841652 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In750841652 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In750841652 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite22_Out750841652|)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite22_Out750841652| ~y$r_buff1_thd0~0_In750841652) (or .cse3 .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In750841652, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In750841652, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In750841652, ~y$w_buff1_used~0=~y$w_buff1_used~0_In750841652} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In750841652, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In750841652, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In750841652, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out750841652|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In750841652} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 16:18:59,206 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] L799-->L799-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-756688863 256) 0))) (or (and (not .cse0) (= ~y$w_buff0_used~0_In-756688863 |ULTIMATE.start_main_#t~ite35_Out-756688863|) (= |ULTIMATE.start_main_#t~ite34_In-756688863| |ULTIMATE.start_main_#t~ite34_Out-756688863|)) (and (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-756688863 256) 0))) (or (and .cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-756688863 256))) (and (= 0 (mod ~y$w_buff1_used~0_In-756688863 256)) .cse1) (= 0 (mod ~y$w_buff0_used~0_In-756688863 256)))) (= |ULTIMATE.start_main_#t~ite34_Out-756688863| |ULTIMATE.start_main_#t~ite35_Out-756688863|) (= ~y$w_buff0_used~0_In-756688863 |ULTIMATE.start_main_#t~ite34_Out-756688863|) .cse0))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-756688863, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-756688863, ~weak$$choice2~0=~weak$$choice2~0_In-756688863, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-756688863, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-756688863, ULTIMATE.start_main_#t~ite34=|ULTIMATE.start_main_#t~ite34_In-756688863|} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-756688863, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-756688863, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_Out-756688863|, ~weak$$choice2~0=~weak$$choice2~0_In-756688863, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-756688863, ULTIMATE.start_main_#t~ite34=|ULTIMATE.start_main_#t~ite34_Out-756688863|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-756688863} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite34] because there is no mapped edge [2019-12-07 16:18:59,206 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [597] [597] L801-->L802: Formula: (and (= v_~y$r_buff0_thd0~0_72 v_~y$r_buff0_thd0~0_71) (not (= (mod v_~weak$$choice2~0_23 256) 0))) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_72, ~weak$$choice2~0=v_~weak$$choice2~0_23} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_7|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_7|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_7|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_71, ~weak$$choice2~0=v_~weak$$choice2~0_23} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39, ~y$r_buff0_thd0~0] because there is no mapped edge [2019-12-07 16:18:59,207 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [676] [676] L804-->L4: Formula: (and (= v_~y~0_99 v_~y$mem_tmp~0_21) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_10| (mod v_~main$tmp_guard1~0_10 256)) (not (= 0 (mod v_~y$flush_delayed~0_36 256))) (= 0 v_~y$flush_delayed~0_35)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_21, ~y$flush_delayed~0=v_~y$flush_delayed~0_36, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_10} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_21, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~y$flush_delayed~0=v_~y$flush_delayed~0_35, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_10, ~y~0=v_~y~0_99, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_28|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_10|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ~y~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 16:18:59,207 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [671] [671] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 16:18:59,250 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 04:18:59 BasicIcfg [2019-12-07 16:18:59,250 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 16:18:59,250 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 16:18:59,250 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 16:18:59,250 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 16:18:59,251 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 04:18:50" (3/4) ... [2019-12-07 16:18:59,252 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 16:18:59,252 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [696] [696] ULTIMATE.startENTRY-->L777: Formula: (let ((.cse0 (store |v_#valid_40| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t2473~0.base_19|) (= 0 v_~__unbuffered_cnt~0_61) (= v_~weak$$choice2~0_132 0) (= |v_#NULL.offset_6| 0) (= v_~y$read_delayed~0_7 0) (= v_~y$w_buff1_used~0_444 0) (= v_~y$r_buff1_thd0~0_304 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t2473~0.base_19|) 0) (= v_~main$tmp_guard0~0_23 0) (= v_~y$r_buff0_thd0~0_394 0) (= |v_#valid_38| (store .cse0 |v_ULTIMATE.start_main_~#t2473~0.base_19| 1)) (= |v_#memory_int_15| (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2473~0.base_19| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2473~0.base_19|) |v_ULTIMATE.start_main_~#t2473~0.offset_16| 0))) (= 0 v_~y$w_buff0~0_376) (= 0 |v_#NULL.base_6|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t2473~0.base_19| 4)) (= v_~y$r_buff1_thd1~0_220 0) (= v_~y~0_141 0) (= v_~y$r_buff0_thd1~0_301 0) (= 0 v_~weak$$choice0~0_24) (= 0 v_~y$flush_delayed~0_48) (= 0 v_~y$r_buff0_thd2~0_175) (= v_~y$w_buff1~0_254 0) (= v_~y$mem_tmp~0_31 0) (= v_~y$w_buff0_used~0_753 0) (= 0 v_~y$read_delayed_var~0.offset_6) (= 0 v_~y$r_buff1_thd2~0_205) (= 0 |v_ULTIMATE.start_main_~#t2473~0.offset_16|) (= 0 v_~x~0_168) (< 0 |v_#StackHeapBarrier_13|) (= v_~main$tmp_guard1~0_22 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_45|, ULTIMATE.start_main_~#t2473~0.base=|v_ULTIMATE.start_main_~#t2473~0.base_19|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_32|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_32|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_42|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_56|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_35|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ~y$mem_tmp~0=v_~y$mem_tmp~0_31, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_301, ~y$flush_delayed~0=v_~y$flush_delayed~0_48, #length=|v_#length_15|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_29|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_32|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_44|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_35|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_51|, ULTIMATE.start_main_~#t2474~0.offset=|v_ULTIMATE.start_main_~#t2474~0.offset_15|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_45|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_31|, ~weak$$choice0~0=v_~weak$$choice0~0_24, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_30|, ~y$w_buff1~0=v_~y$w_buff1~0_254, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_175, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61, ULTIMATE.start_main_~#t2473~0.offset=|v_ULTIMATE.start_main_~#t2473~0.offset_16|, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_304, ~x~0=v_~x~0_168, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_753, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_28|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_28|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_22, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_43|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_28|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_46|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_28|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_220, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_39|, ~y$w_buff0~0=v_~y$w_buff0~0_376, ~y~0=v_~y~0_141, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_30|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_44|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_26|, ULTIMATE.start_main_~#t2474~0.base=|v_ULTIMATE.start_main_~#t2474~0.base_19|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_37|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_29|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_23, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_28|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_39|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_205, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_16|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_15|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_394, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_13|, ~weak$$choice2~0=v_~weak$$choice2~0_132, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_444} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, ULTIMATE.start_main_~#t2473~0.base, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~y$mem_tmp~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, #length, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_~#t2474~0.offset, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t2473~0.offset, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_~#t2474~0.base, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 16:18:59,253 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [677] [677] L777-1-->L779: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t2474~0.base_11|)) (= |v_#valid_21| (store |v_#valid_22| |v_ULTIMATE.start_main_~#t2474~0.base_11| 1)) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t2474~0.base_11| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t2474~0.base_11|) |v_ULTIMATE.start_main_~#t2474~0.offset_10| 1))) (= 0 |v_ULTIMATE.start_main_~#t2474~0.offset_10|) (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t2474~0.base_11|) (= 0 (select |v_#valid_22| |v_ULTIMATE.start_main_~#t2474~0.base_11|)) (= (store |v_#length_10| |v_ULTIMATE.start_main_~#t2474~0.base_11| 4) |v_#length_9|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_22|, #memory_int=|v_#memory_int_10|, #length=|v_#length_10|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_21|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_~#t2474~0.base=|v_ULTIMATE.start_main_~#t2474~0.base_11|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_9|, ULTIMATE.start_main_~#t2474~0.offset=|v_ULTIMATE.start_main_~#t2474~0.offset_10|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_~#t2474~0.base, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t2474~0.offset] because there is no mapped edge [2019-12-07 16:18:59,253 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [623] [623] P0ENTRY-->L4-3: Formula: (and (= 2 v_~y$w_buff0~0_172) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_79 0)) (= (ite (not (and (not (= (mod v_~y$w_buff0_used~0_290 256) 0)) (not (= 0 (mod v_~y$w_buff1_used~0_162 256))))) 1 0) |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_77|) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_79 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_77|) (= v_~y$w_buff0_used~0_290 1) (= v_P0Thread1of1ForFork0_~arg.offset_77 |v_P0Thread1of1ForFork0_#in~arg.offset_79|) (= v_P0Thread1of1ForFork0_~arg.base_77 |v_P0Thread1of1ForFork0_#in~arg.base_79|) (= v_~y$w_buff0_used~0_291 v_~y$w_buff1_used~0_162) (= v_~y$w_buff1~0_100 v_~y$w_buff0~0_173)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_79|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_291, ~y$w_buff0~0=v_~y$w_buff0~0_173, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_79|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_79|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_290, ~y$w_buff1~0=v_~y$w_buff1~0_100, ~y$w_buff0~0=v_~y$w_buff0~0_172, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_79, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_79|, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_77, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_77|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_77, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_162} AuxVars[] AssignedVars[~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 16:18:59,254 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L735-->L735-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd1~0_In-707767518 256) 0)) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-707767518 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite5_Out-707767518| 0) (not .cse0) (not .cse1)) (and (= |P0Thread1of1ForFork0_#t~ite5_Out-707767518| ~y$w_buff0_used~0_In-707767518) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-707767518, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-707767518} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out-707767518|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-707767518, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-707767518} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 16:18:59,254 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L754-2-->L754-4: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In757781375 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd2~0_In757781375 256) 0))) (or (and (= ~y$w_buff1~0_In757781375 |P1Thread1of1ForFork1_#t~ite9_Out757781375|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~y~0_In757781375 |P1Thread1of1ForFork1_#t~ite9_Out757781375|)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In757781375, ~y$w_buff1~0=~y$w_buff1~0_In757781375, ~y~0=~y~0_In757781375, ~y$w_buff1_used~0=~y$w_buff1_used~0_In757781375} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In757781375, ~y$w_buff1~0=~y$w_buff1~0_In757781375, P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out757781375|, ~y~0=~y~0_In757781375, ~y$w_buff1_used~0=~y$w_buff1_used~0_In757781375} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9] because there is no mapped edge [2019-12-07 16:18:59,254 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [630] [630] L754-4-->L755: Formula: (= v_~y~0_50 |v_P1Thread1of1ForFork1_#t~ite9_12|) InVars {P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_12|} OutVars{P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_11|, P1Thread1of1ForFork1_#t~ite10=|v_P1Thread1of1ForFork1_#t~ite10_13|, ~y~0=v_~y~0_50} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10, ~y~0] because there is no mapped edge [2019-12-07 16:18:59,254 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [640] [640] L755-->L755-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1607866896 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In-1607866896 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out-1607866896|)) (and (= |P1Thread1of1ForFork1_#t~ite11_Out-1607866896| ~y$w_buff0_used~0_In-1607866896) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1607866896, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1607866896} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1607866896, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1607866896, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-1607866896|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 16:18:59,254 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L736-->L736-2: Formula: (let ((.cse3 (= (mod ~y$r_buff0_thd1~0_In842919619 256) 0)) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In842919619 256))) (.cse1 (= 0 (mod ~y$r_buff1_thd1~0_In842919619 256))) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In842919619 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite6_Out842919619| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P0Thread1of1ForFork0_#t~ite6_Out842919619| ~y$w_buff1_used~0_In842919619) (or .cse3 .cse2) (or .cse1 .cse0)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In842919619, ~y$w_buff0_used~0=~y$w_buff0_used~0_In842919619, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In842919619, ~y$w_buff1_used~0=~y$w_buff1_used~0_In842919619} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out842919619|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In842919619, ~y$w_buff0_used~0=~y$w_buff0_used~0_In842919619, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In842919619, ~y$w_buff1_used~0=~y$w_buff1_used~0_In842919619} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 16:18:59,254 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L737-->L738: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd1~0_In1021541712 256) 0)) (.cse0 (= ~y$r_buff0_thd1~0_In1021541712 ~y$r_buff0_thd1~0_Out1021541712)) (.cse2 (= (mod ~y$w_buff0_used~0_In1021541712 256) 0))) (or (and .cse0 .cse1) (and (= 0 ~y$r_buff0_thd1~0_Out1021541712) (not .cse2) (not .cse1)) (and .cse0 .cse2))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1021541712, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1021541712} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1021541712, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out1021541712|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_Out1021541712} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~y$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 16:18:59,255 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [638] [638] L756-->L756-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In-2060814609 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In-2060814609 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In-2060814609 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd2~0_In-2060814609 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite12_Out-2060814609| ~y$w_buff1_used~0_In-2060814609) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork1_#t~ite12_Out-2060814609| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-2060814609, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2060814609, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-2060814609, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2060814609} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-2060814609, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-2060814609, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-2060814609, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-2060814609|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-2060814609} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 16:18:59,255 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L757-->L757-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In1454999533 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In1454999533 256)))) (or (and (= ~y$r_buff0_thd2~0_In1454999533 |P1Thread1of1ForFork1_#t~ite13_Out1454999533|) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P1Thread1of1ForFork1_#t~ite13_Out1454999533|) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1454999533, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1454999533} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1454999533, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1454999533, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out1454999533|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 16:18:59,255 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [644] [644] L758-->L758-2: Formula: (let ((.cse2 (= (mod ~y$w_buff1_used~0_In-1471100370 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd2~0_In-1471100370 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-1471100370 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In-1471100370 256) 0))) (or (and (or .cse0 .cse1) (= ~y$r_buff1_thd2~0_In-1471100370 |P1Thread1of1ForFork1_#t~ite14_Out-1471100370|) (or .cse2 .cse3)) (and (= 0 |P1Thread1of1ForFork1_#t~ite14_Out-1471100370|) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1471100370, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1471100370, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1471100370, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1471100370} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1471100370, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1471100370, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1471100370, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-1471100370|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1471100370} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 16:18:59,255 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [668] [668] L758-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39) (= |v_P1Thread1of1ForFork1_#t~ite14_32| v_~y$r_buff1_thd2~0_85)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_32|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_85, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_31|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 16:18:59,255 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L738-->L738-2: Formula: (let ((.cse3 (= (mod ~y$r_buff1_thd1~0_In-1400614604 256) 0)) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In-1400614604 256))) (.cse0 (= 0 (mod ~y$r_buff0_thd1~0_In-1400614604 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1400614604 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite8_Out-1400614604| 0)) (and (= |P0Thread1of1ForFork0_#t~ite8_Out-1400614604| ~y$r_buff1_thd1~0_In-1400614604) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-1400614604, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1400614604, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1400614604, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1400614604} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-1400614604, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1400614604, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-1400614604|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-1400614604, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1400614604} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 16:18:59,255 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [663] [663] L738-2-->P0EXIT: Formula: (and (= v_~__unbuffered_cnt~0_32 (+ v_~__unbuffered_cnt~0_33 1)) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~y$r_buff1_thd1~0_63 |v_P0Thread1of1ForFork0_#t~ite8_26|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_33} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_63, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_25|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 16:18:59,255 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [592] [592] L783-->L785-2: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (or (= (mod v_~y$w_buff0_used~0_159 256) 0) (= (mod v_~y$r_buff0_thd0~0_61 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_159, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_61, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_159, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_61, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 16:18:59,256 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [654] [654] L785-2-->L785-4: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In2019555827 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In2019555827 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite17_Out2019555827| ~y$w_buff1~0_In2019555827) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite17_Out2019555827| ~y~0_In2019555827)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In2019555827, ~y~0=~y~0_In2019555827, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2019555827, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2019555827} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out2019555827|, ~y$w_buff1~0=~y$w_buff1~0_In2019555827, ~y~0=~y~0_In2019555827, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In2019555827, ~y$w_buff1_used~0=~y$w_buff1_used~0_In2019555827} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17] because there is no mapped edge [2019-12-07 16:18:59,256 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [621] [621] L785-4-->L786: Formula: (= v_~y~0_46 |v_ULTIMATE.start_main_#t~ite17_8|) InVars {ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_8|} OutVars{ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_7|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_8|, ~y~0=v_~y~0_46} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18, ~y~0] because there is no mapped edge [2019-12-07 16:18:59,256 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L786-->L786-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1512038279 256))) (.cse1 (= (mod ~y$r_buff0_thd0~0_In-1512038279 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite19_Out-1512038279| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite19_Out-1512038279| ~y$w_buff0_used~0_In-1512038279)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1512038279, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1512038279} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1512038279, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1512038279|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1512038279} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 16:18:59,256 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [641] [641] L787-->L787-2: Formula: (let ((.cse1 (= (mod ~y$w_buff0_used~0_In-838964328 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-838964328 256))) (.cse2 (= (mod ~y$r_buff1_thd0~0_In-838964328 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In-838964328 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite20_Out-838964328| ~y$w_buff1_used~0_In-838964328)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite20_Out-838964328| 0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-838964328, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-838964328, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-838964328, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-838964328} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-838964328, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-838964328, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-838964328|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-838964328, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-838964328} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 16:18:59,256 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [650] [650] L788-->L788-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In1795293355 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In1795293355 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite21_Out1795293355| 0) (not .cse1)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite21_Out1795293355| ~y$r_buff0_thd0~0_In1795293355)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1795293355, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1795293355} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1795293355, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1795293355, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out1795293355|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 16:18:59,256 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [642] [642] L789-->L789-2: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In750841652 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd0~0_In750841652 256))) (.cse3 (= (mod ~y$w_buff0_used~0_In750841652 256) 0)) (.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In750841652 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite22_Out750841652|)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite22_Out750841652| ~y$r_buff1_thd0~0_In750841652) (or .cse3 .cse2)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In750841652, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In750841652, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In750841652, ~y$w_buff1_used~0=~y$w_buff1_used~0_In750841652} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In750841652, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In750841652, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In750841652, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out750841652|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In750841652} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 16:18:59,257 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] L799-->L799-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-756688863 256) 0))) (or (and (not .cse0) (= ~y$w_buff0_used~0_In-756688863 |ULTIMATE.start_main_#t~ite35_Out-756688863|) (= |ULTIMATE.start_main_#t~ite34_In-756688863| |ULTIMATE.start_main_#t~ite34_Out-756688863|)) (and (let ((.cse1 (= (mod ~y$r_buff0_thd0~0_In-756688863 256) 0))) (or (and .cse1 (= 0 (mod ~y$r_buff1_thd0~0_In-756688863 256))) (and (= 0 (mod ~y$w_buff1_used~0_In-756688863 256)) .cse1) (= 0 (mod ~y$w_buff0_used~0_In-756688863 256)))) (= |ULTIMATE.start_main_#t~ite34_Out-756688863| |ULTIMATE.start_main_#t~ite35_Out-756688863|) (= ~y$w_buff0_used~0_In-756688863 |ULTIMATE.start_main_#t~ite34_Out-756688863|) .cse0))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-756688863, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-756688863, ~weak$$choice2~0=~weak$$choice2~0_In-756688863, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-756688863, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-756688863, ULTIMATE.start_main_#t~ite34=|ULTIMATE.start_main_#t~ite34_In-756688863|} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-756688863, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-756688863, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_Out-756688863|, ~weak$$choice2~0=~weak$$choice2~0_In-756688863, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-756688863, ULTIMATE.start_main_#t~ite34=|ULTIMATE.start_main_#t~ite34_Out-756688863|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-756688863} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite34] because there is no mapped edge [2019-12-07 16:18:59,258 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [597] [597] L801-->L802: Formula: (and (= v_~y$r_buff0_thd0~0_72 v_~y$r_buff0_thd0~0_71) (not (= (mod v_~weak$$choice2~0_23 256) 0))) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_72, ~weak$$choice2~0=v_~weak$$choice2~0_23} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_7|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_7|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_7|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_71, ~weak$$choice2~0=v_~weak$$choice2~0_23} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39, ~y$r_buff0_thd0~0] because there is no mapped edge [2019-12-07 16:18:59,258 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [676] [676] L804-->L4: Formula: (and (= v_~y~0_99 v_~y$mem_tmp~0_21) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_10| (mod v_~main$tmp_guard1~0_10 256)) (not (= 0 (mod v_~y$flush_delayed~0_36 256))) (= 0 v_~y$flush_delayed~0_35)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_21, ~y$flush_delayed~0=v_~y$flush_delayed~0_36, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_10} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_21, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~y$flush_delayed~0=v_~y$flush_delayed~0_35, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_10, ~y~0=v_~y~0_99, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_28|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_10|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ~y~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 16:18:59,258 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [671] [671] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 16:18:59,310 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_cdd49675-f65f-4ca9-bde7-3f1e5d7d9c4a/bin/uautomizer/witness.graphml [2019-12-07 16:18:59,310 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 16:18:59,311 INFO L168 Benchmark]: Toolchain (without parser) took 9753.44 ms. Allocated memory was 1.0 GB in the beginning and 1.4 GB in the end (delta: 420.0 MB). Free memory was 938.2 MB in the beginning and 951.4 MB in the end (delta: -13.3 MB). Peak memory consumption was 406.7 MB. Max. memory is 11.5 GB. [2019-12-07 16:18:59,311 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 16:18:59,312 INFO L168 Benchmark]: CACSL2BoogieTranslator took 373.48 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 103.3 MB). Free memory was 938.2 MB in the beginning and 1.1 GB in the end (delta: -132.9 MB). Peak memory consumption was 18.0 MB. Max. memory is 11.5 GB. [2019-12-07 16:18:59,312 INFO L168 Benchmark]: Boogie Procedure Inliner took 41.70 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 16:18:59,312 INFO L168 Benchmark]: Boogie Preprocessor took 24.85 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 16:18:59,312 INFO L168 Benchmark]: RCFGBuilder took 379.41 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 50.1 MB). Peak memory consumption was 50.1 MB. Max. memory is 11.5 GB. [2019-12-07 16:18:59,313 INFO L168 Benchmark]: TraceAbstraction took 8870.21 ms. Allocated memory was 1.1 GB in the beginning and 1.4 GB in the end (delta: 316.7 MB). Free memory was 1.0 GB in the beginning and 975.5 MB in the end (delta: 40.2 MB). Peak memory consumption was 356.8 MB. Max. memory is 11.5 GB. [2019-12-07 16:18:59,313 INFO L168 Benchmark]: Witness Printer took 60.12 ms. Allocated memory is still 1.4 GB. Free memory was 975.5 MB in the beginning and 951.4 MB in the end (delta: 24.1 MB). Peak memory consumption was 24.1 MB. Max. memory is 11.5 GB. [2019-12-07 16:18:59,314 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 373.48 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 103.3 MB). Free memory was 938.2 MB in the beginning and 1.1 GB in the end (delta: -132.9 MB). Peak memory consumption was 18.0 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 41.70 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 24.85 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 379.41 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 50.1 MB). Peak memory consumption was 50.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 8870.21 ms. Allocated memory was 1.1 GB in the beginning and 1.4 GB in the end (delta: 316.7 MB). Free memory was 1.0 GB in the beginning and 975.5 MB in the end (delta: 40.2 MB). Peak memory consumption was 356.8 MB. Max. memory is 11.5 GB. * Witness Printer took 60.12 ms. Allocated memory is still 1.4 GB. Free memory was 975.5 MB in the beginning and 951.4 MB in the end (delta: 24.1 MB). Peak memory consumption was 24.1 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 2.7s, 145 ProgramPointsBefore, 78 ProgramPointsAfterwards, 179 TransitionsBefore, 90 TransitionsAfterwards, 10418 CoEnabledTransitionPairs, 7 FixpointIterations, 27 TrivialSequentialCompositions, 38 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 32 ConcurrentYvCompositions, 25 ChoiceCompositions, 3579 VarBasedMoverChecksPositive, 213 VarBasedMoverChecksNegative, 67 SemBasedMoverChecksPositive, 198 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 46212 CheckedPairsTotal, 97 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L777] FCALL, FORK 0 pthread_create(&t2473, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L779] FCALL, FORK 0 pthread_create(&t2474, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L725] 1 y$r_buff1_thd0 = y$r_buff0_thd0 [L726] 1 y$r_buff1_thd1 = y$r_buff0_thd1 [L727] 1 y$r_buff1_thd2 = y$r_buff0_thd2 [L728] 1 y$r_buff0_thd1 = (_Bool)1 [L731] 1 x = 1 VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L734] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L748] 2 x = 2 [L751] 2 y = 1 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L734] 1 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L754] 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L735] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L736] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L755] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L756] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L757] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L781] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L786] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L787] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L788] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L789] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L792] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L793] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L794] 0 y$flush_delayed = weak$$choice2 [L795] 0 y$mem_tmp = y VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L796] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L796] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L797] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L797] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L798] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L798] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L799] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L800] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L800] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L802] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L802] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L803] 0 main$tmp_guard1 = !(x == 2 && y == 2) VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=5, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 139 locations, 2 error locations. Result: UNSAFE, OverallTime: 8.7s, OverallIterations: 15, TraceHistogramMax: 1, AutomataDifference: 2.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1785 SDtfs, 1580 SDslu, 3550 SDs, 0 SdLazy, 2062 SolverSat, 125 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.3s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 101 GetRequests, 16 SyntacticMatches, 10 SemanticMatches, 75 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 111 ImplicationChecksByTransitivity, 0.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=15905occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 1.7s AutomataMinimizationTime, 14 MinimizatonAttempts, 13650 StatesRemovedByMinimization, 11 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.8s InterpolantComputationTime, 500 NumberOfCodeBlocks, 500 NumberOfCodeBlocksAsserted, 15 NumberOfCheckSat, 432 ConstructedInterpolants, 0 QuantifiedInterpolants, 68100 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 14 InterpolantComputations, 14 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...