./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe029_rmo.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_c12aea8c-00b5-41df-883e-bda8e876d56e/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_c12aea8c-00b5-41df-883e-bda8e876d56e/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_c12aea8c-00b5-41df-883e-bda8e876d56e/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_c12aea8c-00b5-41df-883e-bda8e876d56e/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe029_rmo.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_c12aea8c-00b5-41df-883e-bda8e876d56e/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_c12aea8c-00b5-41df-883e-bda8e876d56e/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash eff86fe4110cf0b56af359bea2f58358a83b929a .............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 16:15:37,503 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 16:15:37,505 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 16:15:37,515 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 16:15:37,515 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 16:15:37,516 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 16:15:37,517 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 16:15:37,519 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 16:15:37,521 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 16:15:37,522 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 16:15:37,522 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 16:15:37,523 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 16:15:37,524 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 16:15:37,524 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 16:15:37,525 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 16:15:37,526 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 16:15:37,526 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 16:15:37,527 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 16:15:37,529 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 16:15:37,530 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 16:15:37,532 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 16:15:37,532 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 16:15:37,533 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 16:15:37,534 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 16:15:37,536 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 16:15:37,536 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 16:15:37,536 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 16:15:37,537 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 16:15:37,537 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 16:15:37,538 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 16:15:37,538 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 16:15:37,539 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 16:15:37,539 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 16:15:37,540 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 16:15:37,541 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 16:15:37,541 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 16:15:37,542 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 16:15:37,542 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 16:15:37,542 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 16:15:37,543 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 16:15:37,544 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 16:15:37,545 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_c12aea8c-00b5-41df-883e-bda8e876d56e/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 16:15:37,557 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 16:15:37,558 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 16:15:37,559 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 16:15:37,559 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 16:15:37,559 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 16:15:37,559 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 16:15:37,560 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 16:15:37,560 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 16:15:37,560 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 16:15:37,560 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 16:15:37,560 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 16:15:37,561 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 16:15:37,561 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 16:15:37,561 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 16:15:37,561 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 16:15:37,561 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 16:15:37,562 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 16:15:37,562 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 16:15:37,562 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 16:15:37,562 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 16:15:37,562 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 16:15:37,563 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 16:15:37,563 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 16:15:37,563 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 16:15:37,563 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 16:15:37,563 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 16:15:37,563 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 16:15:37,564 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 16:15:37,564 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 16:15:37,564 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_c12aea8c-00b5-41df-883e-bda8e876d56e/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> eff86fe4110cf0b56af359bea2f58358a83b929a [2019-12-07 16:15:37,678 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 16:15:37,688 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 16:15:37,691 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 16:15:37,692 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 16:15:37,693 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 16:15:37,693 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_c12aea8c-00b5-41df-883e-bda8e876d56e/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe029_rmo.oepc.i [2019-12-07 16:15:37,731 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_c12aea8c-00b5-41df-883e-bda8e876d56e/bin/uautomizer/data/37860c754/7f097be6f97f484dab6bf9aab68a80a1/FLAG3fee0f2f6 [2019-12-07 16:15:38,213 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 16:15:38,214 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_c12aea8c-00b5-41df-883e-bda8e876d56e/sv-benchmarks/c/pthread-wmm/safe029_rmo.oepc.i [2019-12-07 16:15:38,225 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_c12aea8c-00b5-41df-883e-bda8e876d56e/bin/uautomizer/data/37860c754/7f097be6f97f484dab6bf9aab68a80a1/FLAG3fee0f2f6 [2019-12-07 16:15:38,234 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_c12aea8c-00b5-41df-883e-bda8e876d56e/bin/uautomizer/data/37860c754/7f097be6f97f484dab6bf9aab68a80a1 [2019-12-07 16:15:38,236 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 16:15:38,237 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 16:15:38,238 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 16:15:38,238 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 16:15:38,240 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 16:15:38,241 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 04:15:38" (1/1) ... [2019-12-07 16:15:38,242 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@78735eb5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:15:38, skipping insertion in model container [2019-12-07 16:15:38,242 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 04:15:38" (1/1) ... [2019-12-07 16:15:38,247 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 16:15:38,276 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 16:15:38,510 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 16:15:38,518 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 16:15:38,559 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 16:15:38,604 INFO L208 MainTranslator]: Completed translation [2019-12-07 16:15:38,605 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:15:38 WrapperNode [2019-12-07 16:15:38,605 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 16:15:38,605 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 16:15:38,605 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 16:15:38,605 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 16:15:38,611 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:15:38" (1/1) ... [2019-12-07 16:15:38,627 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:15:38" (1/1) ... [2019-12-07 16:15:38,654 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 16:15:38,654 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 16:15:38,654 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 16:15:38,654 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 16:15:38,661 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:15:38" (1/1) ... [2019-12-07 16:15:38,661 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:15:38" (1/1) ... [2019-12-07 16:15:38,664 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:15:38" (1/1) ... [2019-12-07 16:15:38,665 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:15:38" (1/1) ... [2019-12-07 16:15:38,671 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:15:38" (1/1) ... [2019-12-07 16:15:38,674 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:15:38" (1/1) ... [2019-12-07 16:15:38,676 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:15:38" (1/1) ... [2019-12-07 16:15:38,679 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 16:15:38,679 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 16:15:38,679 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 16:15:38,679 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 16:15:38,680 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:15:38" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_c12aea8c-00b5-41df-883e-bda8e876d56e/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 16:15:38,728 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 16:15:38,728 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 16:15:38,728 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 16:15:38,728 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 16:15:38,728 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 16:15:38,729 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 16:15:38,729 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 16:15:38,729 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 16:15:38,729 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 16:15:38,729 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 16:15:38,729 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 16:15:38,731 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 16:15:39,077 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 16:15:39,077 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 16:15:39,078 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 04:15:39 BoogieIcfgContainer [2019-12-07 16:15:39,078 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 16:15:39,079 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 16:15:39,079 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 16:15:39,081 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 16:15:39,081 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 04:15:38" (1/3) ... [2019-12-07 16:15:39,081 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3c993a55 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 04:15:39, skipping insertion in model container [2019-12-07 16:15:39,081 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 04:15:38" (2/3) ... [2019-12-07 16:15:39,081 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3c993a55 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 04:15:39, skipping insertion in model container [2019-12-07 16:15:39,082 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 04:15:39" (3/3) ... [2019-12-07 16:15:39,083 INFO L109 eAbstractionObserver]: Analyzing ICFG safe029_rmo.oepc.i [2019-12-07 16:15:39,089 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 16:15:39,089 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 16:15:39,093 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 16:15:39,094 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 16:15:39,114 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,114 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,114 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,114 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,114 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,114 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,115 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,115 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,115 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,115 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,115 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,115 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,116 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,116 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,116 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,116 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,116 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,117 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,117 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,117 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,117 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,117 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,118 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,118 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,118 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,118 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,118 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,118 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,118 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,118 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,119 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,119 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,119 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,119 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,119 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,119 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,119 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,120 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,120 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,120 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,120 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,120 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,120 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,120 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,120 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,121 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,121 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,121 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,121 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,121 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,121 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,121 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,121 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,121 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,122 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,122 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,122 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,122 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,122 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,122 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,122 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,122 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,123 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,123 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 16:15:39,133 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-12-07 16:15:39,146 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 16:15:39,146 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 16:15:39,146 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 16:15:39,146 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 16:15:39,146 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 16:15:39,146 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 16:15:39,146 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 16:15:39,147 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 16:15:39,157 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 145 places, 179 transitions [2019-12-07 16:15:39,158 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 145 places, 179 transitions [2019-12-07 16:15:39,209 INFO L134 PetriNetUnfolder]: 41/177 cut-off events. [2019-12-07 16:15:39,209 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 16:15:39,217 INFO L76 FinitePrefix]: Finished finitePrefix Result has 184 conditions, 177 events. 41/177 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 466 event pairs. 6/140 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-12-07 16:15:39,228 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 145 places, 179 transitions [2019-12-07 16:15:39,251 INFO L134 PetriNetUnfolder]: 41/177 cut-off events. [2019-12-07 16:15:39,251 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 16:15:39,254 INFO L76 FinitePrefix]: Finished finitePrefix Result has 184 conditions, 177 events. 41/177 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 466 event pairs. 6/140 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-12-07 16:15:39,263 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 10418 [2019-12-07 16:15:39,263 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 16:15:41,785 WARN L192 SmtUtils]: Spent 127.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 77 [2019-12-07 16:15:41,875 INFO L206 etLargeBlockEncoding]: Checked pairs total: 46212 [2019-12-07 16:15:41,875 INFO L214 etLargeBlockEncoding]: Total number of compositions: 97 [2019-12-07 16:15:41,877 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 78 places, 90 transitions [2019-12-07 16:15:42,203 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 8458 states. [2019-12-07 16:15:42,205 INFO L276 IsEmpty]: Start isEmpty. Operand 8458 states. [2019-12-07 16:15:42,208 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 16:15:42,209 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:15:42,209 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 16:15:42,209 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:15:42,213 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:15:42,213 INFO L82 PathProgramCache]: Analyzing trace with hash 717058, now seen corresponding path program 1 times [2019-12-07 16:15:42,219 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:15:42,219 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2034695398] [2019-12-07 16:15:42,219 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:15:42,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:15:42,369 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:15:42,369 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2034695398] [2019-12-07 16:15:42,370 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:15:42,370 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 16:15:42,371 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [996984448] [2019-12-07 16:15:42,373 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:15:42,374 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:15:42,383 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:15:42,383 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:15:42,384 INFO L87 Difference]: Start difference. First operand 8458 states. Second operand 3 states. [2019-12-07 16:15:42,549 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:15:42,549 INFO L93 Difference]: Finished difference Result 8394 states and 27476 transitions. [2019-12-07 16:15:42,550 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:15:42,551 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 16:15:42,551 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:15:42,611 INFO L225 Difference]: With dead ends: 8394 [2019-12-07 16:15:42,611 INFO L226 Difference]: Without dead ends: 8226 [2019-12-07 16:15:42,612 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:15:42,683 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8226 states. [2019-12-07 16:15:42,851 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8226 to 8226. [2019-12-07 16:15:42,852 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8226 states. [2019-12-07 16:15:42,882 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8226 states to 8226 states and 26958 transitions. [2019-12-07 16:15:42,883 INFO L78 Accepts]: Start accepts. Automaton has 8226 states and 26958 transitions. Word has length 3 [2019-12-07 16:15:42,883 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:15:42,883 INFO L462 AbstractCegarLoop]: Abstraction has 8226 states and 26958 transitions. [2019-12-07 16:15:42,884 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:15:42,884 INFO L276 IsEmpty]: Start isEmpty. Operand 8226 states and 26958 transitions. [2019-12-07 16:15:42,885 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 16:15:42,885 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:15:42,885 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:15:42,886 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:15:42,886 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:15:42,886 INFO L82 PathProgramCache]: Analyzing trace with hash 651590314, now seen corresponding path program 1 times [2019-12-07 16:15:42,886 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:15:42,886 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [74442342] [2019-12-07 16:15:42,886 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:15:42,906 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:15:42,948 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:15:42,948 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [74442342] [2019-12-07 16:15:42,948 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:15:42,948 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:15:42,949 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2057610299] [2019-12-07 16:15:42,950 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:15:42,950 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:15:42,950 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:15:42,950 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:15:42,951 INFO L87 Difference]: Start difference. First operand 8226 states and 26958 transitions. Second operand 4 states. [2019-12-07 16:15:43,169 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:15:43,170 INFO L93 Difference]: Finished difference Result 12778 states and 40134 transitions. [2019-12-07 16:15:43,170 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:15:43,170 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 16:15:43,170 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:15:43,229 INFO L225 Difference]: With dead ends: 12778 [2019-12-07 16:15:43,229 INFO L226 Difference]: Without dead ends: 12771 [2019-12-07 16:15:43,229 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:15:43,300 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12771 states. [2019-12-07 16:15:43,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12771 to 11467. [2019-12-07 16:15:43,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11467 states. [2019-12-07 16:15:43,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11467 states to 11467 states and 36507 transitions. [2019-12-07 16:15:43,534 INFO L78 Accepts]: Start accepts. Automaton has 11467 states and 36507 transitions. Word has length 11 [2019-12-07 16:15:43,535 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:15:43,535 INFO L462 AbstractCegarLoop]: Abstraction has 11467 states and 36507 transitions. [2019-12-07 16:15:43,535 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:15:43,535 INFO L276 IsEmpty]: Start isEmpty. Operand 11467 states and 36507 transitions. [2019-12-07 16:15:43,537 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 16:15:43,537 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:15:43,537 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:15:43,537 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:15:43,538 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:15:43,538 INFO L82 PathProgramCache]: Analyzing trace with hash -1968692504, now seen corresponding path program 1 times [2019-12-07 16:15:43,538 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:15:43,538 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1765870270] [2019-12-07 16:15:43,538 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:15:43,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:15:43,582 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:15:43,582 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1765870270] [2019-12-07 16:15:43,582 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:15:43,582 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:15:43,582 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1752979352] [2019-12-07 16:15:43,583 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:15:43,583 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:15:43,583 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:15:43,583 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:15:43,583 INFO L87 Difference]: Start difference. First operand 11467 states and 36507 transitions. Second operand 4 states. [2019-12-07 16:15:43,749 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:15:43,749 INFO L93 Difference]: Finished difference Result 14268 states and 44852 transitions. [2019-12-07 16:15:43,750 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:15:43,750 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 16:15:43,750 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:15:43,781 INFO L225 Difference]: With dead ends: 14268 [2019-12-07 16:15:43,781 INFO L226 Difference]: Without dead ends: 14268 [2019-12-07 16:15:43,782 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:15:43,844 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14268 states. [2019-12-07 16:15:44,012 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14268 to 12752. [2019-12-07 16:15:44,013 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12752 states. [2019-12-07 16:15:44,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12752 states to 12752 states and 40448 transitions. [2019-12-07 16:15:44,039 INFO L78 Accepts]: Start accepts. Automaton has 12752 states and 40448 transitions. Word has length 11 [2019-12-07 16:15:44,039 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:15:44,039 INFO L462 AbstractCegarLoop]: Abstraction has 12752 states and 40448 transitions. [2019-12-07 16:15:44,039 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:15:44,039 INFO L276 IsEmpty]: Start isEmpty. Operand 12752 states and 40448 transitions. [2019-12-07 16:15:44,044 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2019-12-07 16:15:44,044 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:15:44,044 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:15:44,044 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:15:44,044 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:15:44,045 INFO L82 PathProgramCache]: Analyzing trace with hash -1372508181, now seen corresponding path program 1 times [2019-12-07 16:15:44,045 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:15:44,045 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [121739720] [2019-12-07 16:15:44,045 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:15:44,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:15:44,109 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:15:44,109 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [121739720] [2019-12-07 16:15:44,109 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:15:44,109 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:15:44,109 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [826053579] [2019-12-07 16:15:44,110 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:15:44,110 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:15:44,110 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:15:44,110 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:15:44,110 INFO L87 Difference]: Start difference. First operand 12752 states and 40448 transitions. Second operand 5 states. [2019-12-07 16:15:44,391 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:15:44,391 INFO L93 Difference]: Finished difference Result 17010 states and 52843 transitions. [2019-12-07 16:15:44,391 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 16:15:44,391 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2019-12-07 16:15:44,392 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:15:44,413 INFO L225 Difference]: With dead ends: 17010 [2019-12-07 16:15:44,413 INFO L226 Difference]: Without dead ends: 17003 [2019-12-07 16:15:44,413 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 16:15:44,485 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17003 states. [2019-12-07 16:15:44,665 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17003 to 12755. [2019-12-07 16:15:44,665 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12755 states. [2019-12-07 16:15:44,684 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12755 states to 12755 states and 40342 transitions. [2019-12-07 16:15:44,684 INFO L78 Accepts]: Start accepts. Automaton has 12755 states and 40342 transitions. Word has length 17 [2019-12-07 16:15:44,684 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:15:44,684 INFO L462 AbstractCegarLoop]: Abstraction has 12755 states and 40342 transitions. [2019-12-07 16:15:44,684 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:15:44,684 INFO L276 IsEmpty]: Start isEmpty. Operand 12755 states and 40342 transitions. [2019-12-07 16:15:44,695 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 16:15:44,695 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:15:44,695 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:15:44,695 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:15:44,695 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:15:44,695 INFO L82 PathProgramCache]: Analyzing trace with hash -1155459573, now seen corresponding path program 1 times [2019-12-07 16:15:44,696 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:15:44,696 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [420674712] [2019-12-07 16:15:44,696 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:15:44,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:15:44,737 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:15:44,737 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [420674712] [2019-12-07 16:15:44,738 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:15:44,738 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:15:44,738 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [395765896] [2019-12-07 16:15:44,738 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:15:44,738 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:15:44,738 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:15:44,738 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:15:44,738 INFO L87 Difference]: Start difference. First operand 12755 states and 40342 transitions. Second operand 3 states. [2019-12-07 16:15:44,807 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:15:44,807 INFO L93 Difference]: Finished difference Result 15529 states and 48523 transitions. [2019-12-07 16:15:44,808 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:15:44,808 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 25 [2019-12-07 16:15:44,808 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:15:44,826 INFO L225 Difference]: With dead ends: 15529 [2019-12-07 16:15:44,826 INFO L226 Difference]: Without dead ends: 15529 [2019-12-07 16:15:44,826 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:15:44,880 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15529 states. [2019-12-07 16:15:45,017 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15529 to 13746. [2019-12-07 16:15:45,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13746 states. [2019-12-07 16:15:45,038 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13746 states to 13746 states and 43375 transitions. [2019-12-07 16:15:45,039 INFO L78 Accepts]: Start accepts. Automaton has 13746 states and 43375 transitions. Word has length 25 [2019-12-07 16:15:45,039 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:15:45,040 INFO L462 AbstractCegarLoop]: Abstraction has 13746 states and 43375 transitions. [2019-12-07 16:15:45,040 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:15:45,040 INFO L276 IsEmpty]: Start isEmpty. Operand 13746 states and 43375 transitions. [2019-12-07 16:15:45,046 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 16:15:45,046 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:15:45,046 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:15:45,046 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:15:45,046 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:15:45,047 INFO L82 PathProgramCache]: Analyzing trace with hash -1248228747, now seen corresponding path program 1 times [2019-12-07 16:15:45,047 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:15:45,047 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1244728448] [2019-12-07 16:15:45,047 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:15:45,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:15:45,114 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:15:45,114 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1244728448] [2019-12-07 16:15:45,114 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:15:45,114 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 16:15:45,115 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1990616754] [2019-12-07 16:15:45,115 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 16:15:45,115 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:15:45,115 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 16:15:45,115 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 16:15:45,115 INFO L87 Difference]: Start difference. First operand 13746 states and 43375 transitions. Second operand 6 states. [2019-12-07 16:15:45,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:15:45,453 INFO L93 Difference]: Finished difference Result 19657 states and 60760 transitions. [2019-12-07 16:15:45,453 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 16:15:45,453 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 25 [2019-12-07 16:15:45,453 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:15:45,473 INFO L225 Difference]: With dead ends: 19657 [2019-12-07 16:15:45,474 INFO L226 Difference]: Without dead ends: 19641 [2019-12-07 16:15:45,474 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 16:15:45,535 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19641 states. [2019-12-07 16:15:45,700 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19641 to 15905. [2019-12-07 16:15:45,700 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15905 states. [2019-12-07 16:15:45,723 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15905 states to 15905 states and 49859 transitions. [2019-12-07 16:15:45,723 INFO L78 Accepts]: Start accepts. Automaton has 15905 states and 49859 transitions. Word has length 25 [2019-12-07 16:15:45,723 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:15:45,724 INFO L462 AbstractCegarLoop]: Abstraction has 15905 states and 49859 transitions. [2019-12-07 16:15:45,724 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 16:15:45,724 INFO L276 IsEmpty]: Start isEmpty. Operand 15905 states and 49859 transitions. [2019-12-07 16:15:45,735 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 16:15:45,735 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:15:45,735 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:15:45,735 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:15:45,735 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:15:45,735 INFO L82 PathProgramCache]: Analyzing trace with hash 279625016, now seen corresponding path program 1 times [2019-12-07 16:15:45,735 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:15:45,735 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1811270895] [2019-12-07 16:15:45,736 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:15:45,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:15:45,784 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:15:45,785 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1811270895] [2019-12-07 16:15:45,785 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:15:45,785 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 16:15:45,785 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2086301962] [2019-12-07 16:15:45,785 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 16:15:45,785 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:15:45,786 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 16:15:45,786 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 16:15:45,786 INFO L87 Difference]: Start difference. First operand 15905 states and 49859 transitions. Second operand 4 states. [2019-12-07 16:15:45,807 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:15:45,807 INFO L93 Difference]: Finished difference Result 2247 states and 5122 transitions. [2019-12-07 16:15:45,807 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 16:15:45,808 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 31 [2019-12-07 16:15:45,808 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:15:45,809 INFO L225 Difference]: With dead ends: 2247 [2019-12-07 16:15:45,809 INFO L226 Difference]: Without dead ends: 1970 [2019-12-07 16:15:45,809 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:15:45,812 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1970 states. [2019-12-07 16:15:45,824 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1970 to 1970. [2019-12-07 16:15:45,824 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1970 states. [2019-12-07 16:15:45,826 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1970 states to 1970 states and 4356 transitions. [2019-12-07 16:15:45,826 INFO L78 Accepts]: Start accepts. Automaton has 1970 states and 4356 transitions. Word has length 31 [2019-12-07 16:15:45,826 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:15:45,826 INFO L462 AbstractCegarLoop]: Abstraction has 1970 states and 4356 transitions. [2019-12-07 16:15:45,826 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 16:15:45,826 INFO L276 IsEmpty]: Start isEmpty. Operand 1970 states and 4356 transitions. [2019-12-07 16:15:45,828 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-12-07 16:15:45,828 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:15:45,828 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:15:45,828 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:15:45,828 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:15:45,829 INFO L82 PathProgramCache]: Analyzing trace with hash -1011623832, now seen corresponding path program 1 times [2019-12-07 16:15:45,829 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:15:45,829 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [789491378] [2019-12-07 16:15:45,829 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:15:45,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:15:45,920 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:15:45,920 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [789491378] [2019-12-07 16:15:45,920 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:15:45,921 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 16:15:45,921 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1704086635] [2019-12-07 16:15:45,921 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 16:15:45,921 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:15:45,921 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 16:15:45,921 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 16:15:45,921 INFO L87 Difference]: Start difference. First operand 1970 states and 4356 transitions. Second operand 8 states. [2019-12-07 16:15:46,356 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:15:46,357 INFO L93 Difference]: Finished difference Result 2561 states and 5544 transitions. [2019-12-07 16:15:46,357 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 16:15:46,357 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 37 [2019-12-07 16:15:46,357 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:15:46,359 INFO L225 Difference]: With dead ends: 2561 [2019-12-07 16:15:46,359 INFO L226 Difference]: Without dead ends: 2559 [2019-12-07 16:15:46,360 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=61, Invalid=179, Unknown=0, NotChecked=0, Total=240 [2019-12-07 16:15:46,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2559 states. [2019-12-07 16:15:46,374 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2559 to 2033. [2019-12-07 16:15:46,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2033 states. [2019-12-07 16:15:46,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2033 states to 2033 states and 4500 transitions. [2019-12-07 16:15:46,376 INFO L78 Accepts]: Start accepts. Automaton has 2033 states and 4500 transitions. Word has length 37 [2019-12-07 16:15:46,376 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:15:46,376 INFO L462 AbstractCegarLoop]: Abstraction has 2033 states and 4500 transitions. [2019-12-07 16:15:46,376 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 16:15:46,376 INFO L276 IsEmpty]: Start isEmpty. Operand 2033 states and 4500 transitions. [2019-12-07 16:15:46,379 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 16:15:46,379 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:15:46,379 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:15:46,379 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:15:46,379 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:15:46,379 INFO L82 PathProgramCache]: Analyzing trace with hash -669150451, now seen corresponding path program 1 times [2019-12-07 16:15:46,379 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:15:46,380 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [873376546] [2019-12-07 16:15:46,380 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:15:46,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:15:46,438 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:15:46,438 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [873376546] [2019-12-07 16:15:46,438 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:15:46,438 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 16:15:46,438 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [110982308] [2019-12-07 16:15:46,438 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:15:46,439 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:15:46,439 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:15:46,439 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:15:46,439 INFO L87 Difference]: Start difference. First operand 2033 states and 4500 transitions. Second operand 5 states. [2019-12-07 16:15:46,718 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:15:46,718 INFO L93 Difference]: Finished difference Result 2780 states and 6027 transitions. [2019-12-07 16:15:46,718 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 16:15:46,718 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 16:15:46,719 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:15:46,721 INFO L225 Difference]: With dead ends: 2780 [2019-12-07 16:15:46,721 INFO L226 Difference]: Without dead ends: 2780 [2019-12-07 16:15:46,721 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 16:15:46,724 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2780 states. [2019-12-07 16:15:46,744 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2780 to 2441. [2019-12-07 16:15:46,744 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2441 states. [2019-12-07 16:15:46,747 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2441 states to 2441 states and 5347 transitions. [2019-12-07 16:15:46,747 INFO L78 Accepts]: Start accepts. Automaton has 2441 states and 5347 transitions. Word has length 41 [2019-12-07 16:15:46,747 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:15:46,747 INFO L462 AbstractCegarLoop]: Abstraction has 2441 states and 5347 transitions. [2019-12-07 16:15:46,747 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:15:46,747 INFO L276 IsEmpty]: Start isEmpty. Operand 2441 states and 5347 transitions. [2019-12-07 16:15:46,750 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 16:15:46,750 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:15:46,750 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:15:46,751 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:15:46,751 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:15:46,751 INFO L82 PathProgramCache]: Analyzing trace with hash -1265386816, now seen corresponding path program 1 times [2019-12-07 16:15:46,751 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:15:46,751 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1573446698] [2019-12-07 16:15:46,751 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:15:46,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:15:46,804 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:15:46,804 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1573446698] [2019-12-07 16:15:46,804 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:15:46,804 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 16:15:46,805 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1505099255] [2019-12-07 16:15:46,805 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:15:46,805 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:15:46,805 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:15:46,805 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:15:46,805 INFO L87 Difference]: Start difference. First operand 2441 states and 5347 transitions. Second operand 5 states. [2019-12-07 16:15:47,142 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:15:47,142 INFO L93 Difference]: Finished difference Result 3289 states and 7089 transitions. [2019-12-07 16:15:47,142 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 16:15:47,143 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-12-07 16:15:47,143 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:15:47,145 INFO L225 Difference]: With dead ends: 3289 [2019-12-07 16:15:47,145 INFO L226 Difference]: Without dead ends: 3289 [2019-12-07 16:15:47,145 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 16:15:47,148 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3289 states. [2019-12-07 16:15:47,164 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3289 to 2732. [2019-12-07 16:15:47,164 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2732 states. [2019-12-07 16:15:47,167 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2732 states to 2732 states and 5972 transitions. [2019-12-07 16:15:47,167 INFO L78 Accepts]: Start accepts. Automaton has 2732 states and 5972 transitions. Word has length 42 [2019-12-07 16:15:47,167 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:15:47,167 INFO L462 AbstractCegarLoop]: Abstraction has 2732 states and 5972 transitions. [2019-12-07 16:15:47,168 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:15:47,168 INFO L276 IsEmpty]: Start isEmpty. Operand 2732 states and 5972 transitions. [2019-12-07 16:15:47,170 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 16:15:47,170 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:15:47,170 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:15:47,171 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:15:47,171 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:15:47,171 INFO L82 PathProgramCache]: Analyzing trace with hash 1349071825, now seen corresponding path program 1 times [2019-12-07 16:15:47,171 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:15:47,171 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1796046276] [2019-12-07 16:15:47,171 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:15:47,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:15:47,229 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:15:47,229 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1796046276] [2019-12-07 16:15:47,229 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:15:47,229 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 16:15:47,230 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1492796351] [2019-12-07 16:15:47,230 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 16:15:47,230 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:15:47,230 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 16:15:47,230 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 16:15:47,230 INFO L87 Difference]: Start difference. First operand 2732 states and 5972 transitions. Second operand 5 states. [2019-12-07 16:15:47,259 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:15:47,259 INFO L93 Difference]: Finished difference Result 706 states and 1302 transitions. [2019-12-07 16:15:47,259 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 16:15:47,260 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-12-07 16:15:47,260 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:15:47,260 INFO L225 Difference]: With dead ends: 706 [2019-12-07 16:15:47,260 INFO L226 Difference]: Without dead ends: 626 [2019-12-07 16:15:47,260 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 16:15:47,261 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 626 states. [2019-12-07 16:15:47,264 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 626 to 500. [2019-12-07 16:15:47,264 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 500 states. [2019-12-07 16:15:47,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 500 states to 500 states and 913 transitions. [2019-12-07 16:15:47,265 INFO L78 Accepts]: Start accepts. Automaton has 500 states and 913 transitions. Word has length 42 [2019-12-07 16:15:47,265 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:15:47,265 INFO L462 AbstractCegarLoop]: Abstraction has 500 states and 913 transitions. [2019-12-07 16:15:47,265 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 16:15:47,265 INFO L276 IsEmpty]: Start isEmpty. Operand 500 states and 913 transitions. [2019-12-07 16:15:47,266 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 16:15:47,266 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:15:47,266 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:15:47,266 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:15:47,266 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:15:47,266 INFO L82 PathProgramCache]: Analyzing trace with hash -1583281740, now seen corresponding path program 1 times [2019-12-07 16:15:47,266 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:15:47,266 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [651834479] [2019-12-07 16:15:47,266 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:15:47,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:15:47,305 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:15:47,305 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [651834479] [2019-12-07 16:15:47,306 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:15:47,306 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:15:47,306 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1340309929] [2019-12-07 16:15:47,306 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:15:47,306 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:15:47,307 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:15:47,307 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:15:47,307 INFO L87 Difference]: Start difference. First operand 500 states and 913 transitions. Second operand 3 states. [2019-12-07 16:15:47,339 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:15:47,339 INFO L93 Difference]: Finished difference Result 499 states and 911 transitions. [2019-12-07 16:15:47,339 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:15:47,339 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 52 [2019-12-07 16:15:47,339 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:15:47,340 INFO L225 Difference]: With dead ends: 499 [2019-12-07 16:15:47,340 INFO L226 Difference]: Without dead ends: 499 [2019-12-07 16:15:47,340 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:15:47,340 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 499 states. [2019-12-07 16:15:47,343 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 499 to 385. [2019-12-07 16:15:47,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 385 states. [2019-12-07 16:15:47,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 385 states to 385 states and 702 transitions. [2019-12-07 16:15:47,343 INFO L78 Accepts]: Start accepts. Automaton has 385 states and 702 transitions. Word has length 52 [2019-12-07 16:15:47,343 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:15:47,343 INFO L462 AbstractCegarLoop]: Abstraction has 385 states and 702 transitions. [2019-12-07 16:15:47,343 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:15:47,344 INFO L276 IsEmpty]: Start isEmpty. Operand 385 states and 702 transitions. [2019-12-07 16:15:47,344 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 16:15:47,344 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:15:47,344 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:15:47,344 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:15:47,344 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:15:47,344 INFO L82 PathProgramCache]: Analyzing trace with hash 154647446, now seen corresponding path program 1 times [2019-12-07 16:15:47,345 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:15:47,345 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1043147729] [2019-12-07 16:15:47,345 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:15:47,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:15:47,381 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:15:47,381 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1043147729] [2019-12-07 16:15:47,382 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:15:47,382 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 16:15:47,382 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [25482643] [2019-12-07 16:15:47,382 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 16:15:47,382 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:15:47,382 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 16:15:47,382 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:15:47,383 INFO L87 Difference]: Start difference. First operand 385 states and 702 transitions. Second operand 3 states. [2019-12-07 16:15:47,391 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:15:47,391 INFO L93 Difference]: Finished difference Result 369 states and 653 transitions. [2019-12-07 16:15:47,391 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 16:15:47,391 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-12-07 16:15:47,391 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:15:47,391 INFO L225 Difference]: With dead ends: 369 [2019-12-07 16:15:47,392 INFO L226 Difference]: Without dead ends: 369 [2019-12-07 16:15:47,392 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 16:15:47,392 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 369 states. [2019-12-07 16:15:47,395 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 369 to 333. [2019-12-07 16:15:47,395 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 333 states. [2019-12-07 16:15:47,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 333 states to 333 states and 585 transitions. [2019-12-07 16:15:47,395 INFO L78 Accepts]: Start accepts. Automaton has 333 states and 585 transitions. Word has length 53 [2019-12-07 16:15:47,395 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:15:47,395 INFO L462 AbstractCegarLoop]: Abstraction has 333 states and 585 transitions. [2019-12-07 16:15:47,395 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 16:15:47,395 INFO L276 IsEmpty]: Start isEmpty. Operand 333 states and 585 transitions. [2019-12-07 16:15:47,396 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 16:15:47,396 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:15:47,396 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:15:47,396 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:15:47,396 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:15:47,396 INFO L82 PathProgramCache]: Analyzing trace with hash 1896622654, now seen corresponding path program 1 times [2019-12-07 16:15:47,397 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:15:47,397 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1303256441] [2019-12-07 16:15:47,397 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:15:47,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:15:47,499 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:15:47,499 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1303256441] [2019-12-07 16:15:47,499 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:15:47,499 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 16:15:47,499 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [400850653] [2019-12-07 16:15:47,500 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 16:15:47,500 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:15:47,500 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 16:15:47,500 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2019-12-07 16:15:47,500 INFO L87 Difference]: Start difference. First operand 333 states and 585 transitions. Second operand 8 states. [2019-12-07 16:15:47,568 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:15:47,568 INFO L93 Difference]: Finished difference Result 534 states and 940 transitions. [2019-12-07 16:15:47,568 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 16:15:47,569 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 54 [2019-12-07 16:15:47,569 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:15:47,569 INFO L225 Difference]: With dead ends: 534 [2019-12-07 16:15:47,569 INFO L226 Difference]: Without dead ends: 243 [2019-12-07 16:15:47,569 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=39, Invalid=71, Unknown=0, NotChecked=0, Total=110 [2019-12-07 16:15:47,570 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 243 states. [2019-12-07 16:15:47,572 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 243 to 219. [2019-12-07 16:15:47,572 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 219 states. [2019-12-07 16:15:47,572 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 219 states to 219 states and 389 transitions. [2019-12-07 16:15:47,572 INFO L78 Accepts]: Start accepts. Automaton has 219 states and 389 transitions. Word has length 54 [2019-12-07 16:15:47,572 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:15:47,573 INFO L462 AbstractCegarLoop]: Abstraction has 219 states and 389 transitions. [2019-12-07 16:15:47,573 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 16:15:47,573 INFO L276 IsEmpty]: Start isEmpty. Operand 219 states and 389 transitions. [2019-12-07 16:15:47,573 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 16:15:47,573 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:15:47,573 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:15:47,573 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:15:47,574 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:15:47,574 INFO L82 PathProgramCache]: Analyzing trace with hash 133727006, now seen corresponding path program 2 times [2019-12-07 16:15:47,574 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:15:47,574 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [277717938] [2019-12-07 16:15:47,574 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:15:47,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:15:47,738 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:15:47,738 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [277717938] [2019-12-07 16:15:47,738 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:15:47,738 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 16:15:47,738 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [784725085] [2019-12-07 16:15:47,738 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 16:15:47,739 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:15:47,739 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 16:15:47,739 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=125, Unknown=0, NotChecked=0, Total=156 [2019-12-07 16:15:47,739 INFO L87 Difference]: Start difference. First operand 219 states and 389 transitions. Second operand 13 states. [2019-12-07 16:15:48,013 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:15:48,013 INFO L93 Difference]: Finished difference Result 376 states and 647 transitions. [2019-12-07 16:15:48,013 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-07 16:15:48,013 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 54 [2019-12-07 16:15:48,013 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:15:48,013 INFO L225 Difference]: With dead ends: 376 [2019-12-07 16:15:48,013 INFO L226 Difference]: Without dead ends: 345 [2019-12-07 16:15:48,014 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=73, Invalid=307, Unknown=0, NotChecked=0, Total=380 [2019-12-07 16:15:48,014 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 345 states. [2019-12-07 16:15:48,016 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 345 to 315. [2019-12-07 16:15:48,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 315 states. [2019-12-07 16:15:48,016 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 315 states to 315 states and 553 transitions. [2019-12-07 16:15:48,016 INFO L78 Accepts]: Start accepts. Automaton has 315 states and 553 transitions. Word has length 54 [2019-12-07 16:15:48,016 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:15:48,016 INFO L462 AbstractCegarLoop]: Abstraction has 315 states and 553 transitions. [2019-12-07 16:15:48,016 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 16:15:48,016 INFO L276 IsEmpty]: Start isEmpty. Operand 315 states and 553 transitions. [2019-12-07 16:15:48,017 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 16:15:48,017 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:15:48,017 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:15:48,017 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:15:48,017 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:15:48,017 INFO L82 PathProgramCache]: Analyzing trace with hash 1481215198, now seen corresponding path program 3 times [2019-12-07 16:15:48,017 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:15:48,018 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1703450737] [2019-12-07 16:15:48,018 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:15:48,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:15:48,201 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:15:48,201 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1703450737] [2019-12-07 16:15:48,201 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:15:48,201 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 16:15:48,201 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1972126770] [2019-12-07 16:15:48,202 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 16:15:48,202 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:15:48,202 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 16:15:48,202 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=148, Unknown=0, NotChecked=0, Total=182 [2019-12-07 16:15:48,202 INFO L87 Difference]: Start difference. First operand 315 states and 553 transitions. Second operand 14 states. [2019-12-07 16:15:48,450 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:15:48,450 INFO L93 Difference]: Finished difference Result 432 states and 733 transitions. [2019-12-07 16:15:48,451 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 16:15:48,451 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 54 [2019-12-07 16:15:48,451 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:15:48,451 INFO L225 Difference]: With dead ends: 432 [2019-12-07 16:15:48,451 INFO L226 Difference]: Without dead ends: 401 [2019-12-07 16:15:48,451 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=84, Invalid=378, Unknown=0, NotChecked=0, Total=462 [2019-12-07 16:15:48,452 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 401 states. [2019-12-07 16:15:48,453 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 401 to 319. [2019-12-07 16:15:48,454 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 319 states. [2019-12-07 16:15:48,454 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 319 states to 319 states and 560 transitions. [2019-12-07 16:15:48,454 INFO L78 Accepts]: Start accepts. Automaton has 319 states and 560 transitions. Word has length 54 [2019-12-07 16:15:48,454 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:15:48,454 INFO L462 AbstractCegarLoop]: Abstraction has 319 states and 560 transitions. [2019-12-07 16:15:48,454 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 16:15:48,454 INFO L276 IsEmpty]: Start isEmpty. Operand 319 states and 560 transitions. [2019-12-07 16:15:48,455 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 16:15:48,455 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:15:48,455 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:15:48,455 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:15:48,455 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:15:48,455 INFO L82 PathProgramCache]: Analyzing trace with hash 815200260, now seen corresponding path program 4 times [2019-12-07 16:15:48,455 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:15:48,455 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1937289558] [2019-12-07 16:15:48,455 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:15:48,467 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 16:15:48,626 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 16:15:48,626 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1937289558] [2019-12-07 16:15:48,626 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 16:15:48,626 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 16:15:48,627 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [203026425] [2019-12-07 16:15:48,627 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 16:15:48,627 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 16:15:48,627 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 16:15:48,627 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=149, Unknown=0, NotChecked=0, Total=182 [2019-12-07 16:15:48,627 INFO L87 Difference]: Start difference. First operand 319 states and 560 transitions. Second operand 14 states. [2019-12-07 16:15:48,843 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 16:15:48,843 INFO L93 Difference]: Finished difference Result 420 states and 712 transitions. [2019-12-07 16:15:48,843 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 16:15:48,843 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 54 [2019-12-07 16:15:48,844 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 16:15:48,844 INFO L225 Difference]: With dead ends: 420 [2019-12-07 16:15:48,844 INFO L226 Difference]: Without dead ends: 389 [2019-12-07 16:15:48,844 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 72 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=102, Invalid=450, Unknown=0, NotChecked=0, Total=552 [2019-12-07 16:15:48,845 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 389 states. [2019-12-07 16:15:48,846 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 389 to 327. [2019-12-07 16:15:48,846 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 327 states. [2019-12-07 16:15:48,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 327 states to 327 states and 574 transitions. [2019-12-07 16:15:48,847 INFO L78 Accepts]: Start accepts. Automaton has 327 states and 574 transitions. Word has length 54 [2019-12-07 16:15:48,847 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 16:15:48,847 INFO L462 AbstractCegarLoop]: Abstraction has 327 states and 574 transitions. [2019-12-07 16:15:48,847 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 16:15:48,847 INFO L276 IsEmpty]: Start isEmpty. Operand 327 states and 574 transitions. [2019-12-07 16:15:48,847 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 16:15:48,848 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 16:15:48,848 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 16:15:48,848 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 16:15:48,848 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 16:15:48,848 INFO L82 PathProgramCache]: Analyzing trace with hash 2067211286, now seen corresponding path program 5 times [2019-12-07 16:15:48,848 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 16:15:48,848 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [820521707] [2019-12-07 16:15:48,848 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 16:15:48,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 16:15:48,875 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 16:15:48,903 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 16:15:48,903 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 16:15:48,906 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [696] [696] ULTIMATE.startENTRY-->L777: Formula: (let ((.cse0 (store |v_#valid_40| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t2481~0.base_19| 4)) (= 0 |v_ULTIMATE.start_main_~#t2481~0.offset_16|) (= 0 v_~__unbuffered_cnt~0_61) (= v_~weak$$choice2~0_132 0) (= |v_#NULL.offset_6| 0) (= v_~y$read_delayed~0_7 0) (= v_~y$w_buff1_used~0_444 0) (= v_~y$r_buff1_thd0~0_304 0) (= v_~main$tmp_guard0~0_23 0) (= v_~y$r_buff0_thd0~0_394 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t2481~0.base_19|) 0) (= 0 v_~y$w_buff0~0_376) (= 0 |v_#NULL.base_6|) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t2481~0.base_19|) (= v_~y$r_buff1_thd1~0_220 0) (= v_~y~0_141 0) (= v_~y$r_buff0_thd1~0_301 0) (= 0 v_~weak$$choice0~0_24) (= 0 v_~y$flush_delayed~0_48) (= 0 v_~y$r_buff0_thd2~0_175) (= v_~y$w_buff1~0_254 0) (= |v_#valid_38| (store .cse0 |v_ULTIMATE.start_main_~#t2481~0.base_19| 1)) (= v_~y$mem_tmp~0_31 0) (= v_~y$w_buff0_used~0_753 0) (= 0 v_~y$read_delayed_var~0.offset_6) (= 0 v_~y$r_buff1_thd2~0_205) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2481~0.base_19| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2481~0.base_19|) |v_ULTIMATE.start_main_~#t2481~0.offset_16| 0)) |v_#memory_int_15|) (= 0 v_~x~0_168) (< 0 |v_#StackHeapBarrier_13|) (= v_~main$tmp_guard1~0_22 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_45|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_32|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_32|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_42|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_56|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_35|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ULTIMATE.start_main_~#t2481~0.offset=|v_ULTIMATE.start_main_~#t2481~0.offset_16|, ~y$mem_tmp~0=v_~y$mem_tmp~0_31, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_301, ~y$flush_delayed~0=v_~y$flush_delayed~0_48, ULTIMATE.start_main_~#t2482~0.base=|v_ULTIMATE.start_main_~#t2482~0.base_19|, #length=|v_#length_15|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_29|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_32|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_44|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_35|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_51|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_45|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_31|, ~weak$$choice0~0=v_~weak$$choice0~0_24, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_30|, ~y$w_buff1~0=v_~y$w_buff1~0_254, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_175, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_304, ~x~0=v_~x~0_168, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ULTIMATE.start_main_~#t2482~0.offset=|v_ULTIMATE.start_main_~#t2482~0.offset_15|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_753, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_28|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_28|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_22, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_43|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_28|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_46|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_28|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_220, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_39|, ~y$w_buff0~0=v_~y$w_buff0~0_376, ~y~0=v_~y~0_141, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_30|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_44|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_26|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_37|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_29|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_23, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_28|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_39|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_205, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_16|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_15|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_394, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_13|, ~weak$$choice2~0=v_~weak$$choice2~0_132, ULTIMATE.start_main_~#t2481~0.base=|v_ULTIMATE.start_main_~#t2481~0.base_19|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_444} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ULTIMATE.start_main_~#t2481~0.offset, ~y$mem_tmp~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, ULTIMATE.start_main_~#t2482~0.base, #length, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ULTIMATE.start_main_~#t2482~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ULTIMATE.start_main_~#t2481~0.base, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 16:15:48,906 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [677] [677] L777-1-->L779: Formula: (and (not (= |v_ULTIMATE.start_main_~#t2482~0.base_11| 0)) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t2482~0.base_11| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t2482~0.base_11|) |v_ULTIMATE.start_main_~#t2482~0.offset_10| 1))) (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t2482~0.base_11|) (= |v_#valid_21| (store |v_#valid_22| |v_ULTIMATE.start_main_~#t2482~0.base_11| 1)) (= 0 |v_ULTIMATE.start_main_~#t2482~0.offset_10|) (= (store |v_#length_10| |v_ULTIMATE.start_main_~#t2482~0.base_11| 4) |v_#length_9|) (= 0 (select |v_#valid_22| |v_ULTIMATE.start_main_~#t2482~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_22|, #memory_int=|v_#memory_int_10|, #length=|v_#length_10|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_8|, ULTIMATE.start_main_~#t2482~0.offset=|v_ULTIMATE.start_main_~#t2482~0.offset_10|, #valid=|v_#valid_21|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, ULTIMATE.start_main_~#t2482~0.base=|v_ULTIMATE.start_main_~#t2482~0.base_11|, #length=|v_#length_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2482~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_~#t2482~0.base, #length] because there is no mapped edge [2019-12-07 16:15:48,906 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [623] [623] P0ENTRY-->L4-3: Formula: (and (= 2 v_~y$w_buff0~0_172) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_79 0)) (= (ite (not (and (not (= (mod v_~y$w_buff0_used~0_290 256) 0)) (not (= 0 (mod v_~y$w_buff1_used~0_162 256))))) 1 0) |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_77|) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_79 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_77|) (= v_~y$w_buff0_used~0_290 1) (= v_P0Thread1of1ForFork0_~arg.offset_77 |v_P0Thread1of1ForFork0_#in~arg.offset_79|) (= v_P0Thread1of1ForFork0_~arg.base_77 |v_P0Thread1of1ForFork0_#in~arg.base_79|) (= v_~y$w_buff0_used~0_291 v_~y$w_buff1_used~0_162) (= v_~y$w_buff1~0_100 v_~y$w_buff0~0_173)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_79|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_291, ~y$w_buff0~0=v_~y$w_buff0~0_173, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_79|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_79|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_290, ~y$w_buff1~0=v_~y$w_buff1~0_100, ~y$w_buff0~0=v_~y$w_buff0~0_172, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_79, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_79|, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_77, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_77|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_77, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_162} AuxVars[] AssignedVars[~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 16:15:48,907 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L735-->L735-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In380308741 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd1~0_In380308741 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In380308741 |P0Thread1of1ForFork0_#t~ite5_Out380308741|)) (and (= 0 |P0Thread1of1ForFork0_#t~ite5_Out380308741|) (not .cse0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In380308741, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In380308741} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out380308741|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In380308741, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In380308741} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 16:15:48,907 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L754-2-->L754-4: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In1877043737 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd2~0_In1877043737 256) 0))) (or (and (= ~y$w_buff1~0_In1877043737 |P1Thread1of1ForFork1_#t~ite9_Out1877043737|) (not .cse0) (not .cse1)) (and (= ~y~0_In1877043737 |P1Thread1of1ForFork1_#t~ite9_Out1877043737|) (or .cse1 .cse0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1877043737, ~y$w_buff1~0=~y$w_buff1~0_In1877043737, ~y~0=~y~0_In1877043737, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1877043737} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1877043737, ~y$w_buff1~0=~y$w_buff1~0_In1877043737, P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out1877043737|, ~y~0=~y~0_In1877043737, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1877043737} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9] because there is no mapped edge [2019-12-07 16:15:48,908 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [630] [630] L754-4-->L755: Formula: (= v_~y~0_50 |v_P1Thread1of1ForFork1_#t~ite9_12|) InVars {P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_12|} OutVars{P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_11|, P1Thread1of1ForFork1_#t~ite10=|v_P1Thread1of1ForFork1_#t~ite10_13|, ~y~0=v_~y~0_50} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10, ~y~0] because there is no mapped edge [2019-12-07 16:15:48,908 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [640] [640] L755-->L755-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In-977627321 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In-977627321 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-977627321 |P1Thread1of1ForFork1_#t~ite11_Out-977627321|)) (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite11_Out-977627321| 0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-977627321, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-977627321} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-977627321, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-977627321, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-977627321|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 16:15:48,908 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L736-->L736-2: Formula: (let ((.cse1 (= (mod ~y$r_buff1_thd1~0_In-746758535 256) 0)) (.cse0 (= (mod ~y$w_buff1_used~0_In-746758535 256) 0)) (.cse3 (= 0 (mod ~y$r_buff0_thd1~0_In-746758535 256))) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-746758535 256)))) (or (and (= ~y$w_buff1_used~0_In-746758535 |P0Thread1of1ForFork0_#t~ite6_Out-746758535|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P0Thread1of1ForFork0_#t~ite6_Out-746758535|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-746758535, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-746758535, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-746758535, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-746758535} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-746758535|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-746758535, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-746758535, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-746758535, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-746758535} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 16:15:48,908 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L737-->L738: Formula: (let ((.cse1 (= ~y$r_buff0_thd1~0_Out442649901 ~y$r_buff0_thd1~0_In442649901)) (.cse2 (= (mod ~y$w_buff0_used~0_In442649901 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd1~0_In442649901 256) 0))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (not .cse2) (= 0 ~y$r_buff0_thd1~0_Out442649901) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In442649901, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In442649901} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In442649901, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out442649901|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_Out442649901} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~y$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 16:15:48,908 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [638] [638] L756-->L756-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In1464716396 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In1464716396 256) 0)) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In1464716396 256))) (.cse3 (= 0 (mod ~y$r_buff1_thd2~0_In1464716396 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite12_Out1464716396|)) (and (= ~y$w_buff1_used~0_In1464716396 |P1Thread1of1ForFork1_#t~ite12_Out1464716396|) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1464716396, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1464716396, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1464716396, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1464716396} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1464716396, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1464716396, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1464716396, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out1464716396|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1464716396} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 16:15:48,909 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L757-->L757-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In41508719 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In41508719 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite13_Out41508719| ~y$r_buff0_thd2~0_In41508719)) (and (= 0 |P1Thread1of1ForFork1_#t~ite13_Out41508719|) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In41508719, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In41508719} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In41508719, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In41508719, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out41508719|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 16:15:48,909 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [644] [644] L758-->L758-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-1494492856 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1494492856 256))) (.cse2 (= (mod ~y$r_buff1_thd2~0_In-1494492856 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In-1494492856 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$r_buff1_thd2~0_In-1494492856 |P1Thread1of1ForFork1_#t~ite14_Out-1494492856|)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite14_Out-1494492856| 0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1494492856, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1494492856, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1494492856, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1494492856} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1494492856, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1494492856, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1494492856, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-1494492856|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1494492856} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 16:15:48,909 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [668] [668] L758-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39) (= |v_P1Thread1of1ForFork1_#t~ite14_32| v_~y$r_buff1_thd2~0_85)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_32|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_85, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_31|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 16:15:48,909 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L738-->L738-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff1_thd1~0_In1128078612 256))) (.cse3 (= (mod ~y$w_buff1_used~0_In1128078612 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd1~0_In1128078612 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In1128078612 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite8_Out1128078612|)) (and (or .cse2 .cse3) (= ~y$r_buff1_thd1~0_In1128078612 |P0Thread1of1ForFork0_#t~ite8_Out1128078612|) (or .cse1 .cse0)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1128078612, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1128078612, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1128078612, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1128078612} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1128078612, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1128078612, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out1128078612|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1128078612, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1128078612} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 16:15:48,909 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [663] [663] L738-2-->P0EXIT: Formula: (and (= v_~__unbuffered_cnt~0_32 (+ v_~__unbuffered_cnt~0_33 1)) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~y$r_buff1_thd1~0_63 |v_P0Thread1of1ForFork0_#t~ite8_26|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_33} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_63, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_25|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 16:15:48,909 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [592] [592] L783-->L785-2: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (or (= (mod v_~y$w_buff0_used~0_159 256) 0) (= (mod v_~y$r_buff0_thd0~0_61 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_159, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_61, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_159, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_61, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 16:15:48,909 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [654] [654] L785-2-->L785-4: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In-678074773 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd0~0_In-678074773 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite17_Out-678074773| ~y~0_In-678074773)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite17_Out-678074773| ~y$w_buff1~0_In-678074773) (not .cse0)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-678074773, ~y~0=~y~0_In-678074773, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-678074773, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-678074773} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out-678074773|, ~y$w_buff1~0=~y$w_buff1~0_In-678074773, ~y~0=~y~0_In-678074773, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-678074773, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-678074773} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17] because there is no mapped edge [2019-12-07 16:15:48,910 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [621] [621] L785-4-->L786: Formula: (= v_~y~0_46 |v_ULTIMATE.start_main_#t~ite17_8|) InVars {ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_8|} OutVars{ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_7|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_8|, ~y~0=v_~y~0_46} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18, ~y~0] because there is no mapped edge [2019-12-07 16:15:48,910 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L786-->L786-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In153470290 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In153470290 256)))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite19_Out153470290|)) (and (= ~y$w_buff0_used~0_In153470290 |ULTIMATE.start_main_#t~ite19_Out153470290|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In153470290, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In153470290} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In153470290, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out153470290|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In153470290} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 16:15:48,910 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [641] [641] L787-->L787-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In-1736883334 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In-1736883334 256))) (.cse0 (= (mod ~y$w_buff1_used~0_In-1736883334 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd0~0_In-1736883334 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite20_Out-1736883334| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |ULTIMATE.start_main_#t~ite20_Out-1736883334| ~y$w_buff1_used~0_In-1736883334) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1736883334, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1736883334, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1736883334, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1736883334} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1736883334, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1736883334, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-1736883334|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1736883334, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1736883334} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 16:15:48,910 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [650] [650] L788-->L788-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-764964004 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-764964004 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite21_Out-764964004| 0) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite21_Out-764964004| ~y$r_buff0_thd0~0_In-764964004)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-764964004, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-764964004} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-764964004, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-764964004, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-764964004|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 16:15:48,910 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [642] [642] L789-->L789-2: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In-1022259150 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd0~0_In-1022259150 256) 0)) (.cse3 (= (mod ~y$r_buff0_thd0~0_In-1022259150 256) 0)) (.cse2 (= (mod ~y$w_buff0_used~0_In-1022259150 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite22_Out-1022259150|)) (and (or .cse0 .cse1) (or .cse3 .cse2) (= ~y$r_buff1_thd0~0_In-1022259150 |ULTIMATE.start_main_#t~ite22_Out-1022259150|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1022259150, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1022259150, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1022259150, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1022259150} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1022259150, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1022259150, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1022259150, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-1022259150|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1022259150} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 16:15:48,911 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] L799-->L799-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In1484464172 256)))) (or (and (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In1484464172 256)))) (or (and (= 0 (mod ~y$w_buff1_used~0_In1484464172 256)) .cse0) (and (= 0 (mod ~y$r_buff1_thd0~0_In1484464172 256)) .cse0) (= 0 (mod ~y$w_buff0_used~0_In1484464172 256)))) .cse1 (= |ULTIMATE.start_main_#t~ite34_Out1484464172| |ULTIMATE.start_main_#t~ite35_Out1484464172|) (= ~y$w_buff0_used~0_In1484464172 |ULTIMATE.start_main_#t~ite34_Out1484464172|)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite34_In1484464172| |ULTIMATE.start_main_#t~ite34_Out1484464172|) (= ~y$w_buff0_used~0_In1484464172 |ULTIMATE.start_main_#t~ite35_Out1484464172|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1484464172, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1484464172, ~weak$$choice2~0=~weak$$choice2~0_In1484464172, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1484464172, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1484464172, ULTIMATE.start_main_#t~ite34=|ULTIMATE.start_main_#t~ite34_In1484464172|} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1484464172, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1484464172, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_Out1484464172|, ~weak$$choice2~0=~weak$$choice2~0_In1484464172, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1484464172, ULTIMATE.start_main_#t~ite34=|ULTIMATE.start_main_#t~ite34_Out1484464172|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1484464172} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite34] because there is no mapped edge [2019-12-07 16:15:48,912 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [597] [597] L801-->L802: Formula: (and (= v_~y$r_buff0_thd0~0_72 v_~y$r_buff0_thd0~0_71) (not (= (mod v_~weak$$choice2~0_23 256) 0))) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_72, ~weak$$choice2~0=v_~weak$$choice2~0_23} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_7|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_7|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_7|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_71, ~weak$$choice2~0=v_~weak$$choice2~0_23} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39, ~y$r_buff0_thd0~0] because there is no mapped edge [2019-12-07 16:15:48,912 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [676] [676] L804-->L4: Formula: (and (= v_~y~0_99 v_~y$mem_tmp~0_21) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_10| (mod v_~main$tmp_guard1~0_10 256)) (not (= 0 (mod v_~y$flush_delayed~0_36 256))) (= 0 v_~y$flush_delayed~0_35)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_21, ~y$flush_delayed~0=v_~y$flush_delayed~0_36, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_10} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_21, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~y$flush_delayed~0=v_~y$flush_delayed~0_35, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_10, ~y~0=v_~y~0_99, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_28|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_10|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ~y~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 16:15:48,912 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [671] [671] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 16:15:48,957 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 04:15:48 BasicIcfg [2019-12-07 16:15:48,957 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 16:15:48,957 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 16:15:48,957 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 16:15:48,957 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 16:15:48,957 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 04:15:39" (3/4) ... [2019-12-07 16:15:48,959 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 16:15:48,959 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [696] [696] ULTIMATE.startENTRY-->L777: Formula: (let ((.cse0 (store |v_#valid_40| 0 0))) (and (= 0 v_~y$read_delayed_var~0.base_6) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t2481~0.base_19| 4)) (= 0 |v_ULTIMATE.start_main_~#t2481~0.offset_16|) (= 0 v_~__unbuffered_cnt~0_61) (= v_~weak$$choice2~0_132 0) (= |v_#NULL.offset_6| 0) (= v_~y$read_delayed~0_7 0) (= v_~y$w_buff1_used~0_444 0) (= v_~y$r_buff1_thd0~0_304 0) (= v_~main$tmp_guard0~0_23 0) (= v_~y$r_buff0_thd0~0_394 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t2481~0.base_19|) 0) (= 0 v_~y$w_buff0~0_376) (= 0 |v_#NULL.base_6|) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t2481~0.base_19|) (= v_~y$r_buff1_thd1~0_220 0) (= v_~y~0_141 0) (= v_~y$r_buff0_thd1~0_301 0) (= 0 v_~weak$$choice0~0_24) (= 0 v_~y$flush_delayed~0_48) (= 0 v_~y$r_buff0_thd2~0_175) (= v_~y$w_buff1~0_254 0) (= |v_#valid_38| (store .cse0 |v_ULTIMATE.start_main_~#t2481~0.base_19| 1)) (= v_~y$mem_tmp~0_31 0) (= v_~y$w_buff0_used~0_753 0) (= 0 v_~y$read_delayed_var~0.offset_6) (= 0 v_~y$r_buff1_thd2~0_205) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2481~0.base_19| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2481~0.base_19|) |v_ULTIMATE.start_main_~#t2481~0.offset_16| 0)) |v_#memory_int_15|) (= 0 v_~x~0_168) (< 0 |v_#StackHeapBarrier_13|) (= v_~main$tmp_guard1~0_22 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_16|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_45|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_32|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_32|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_42|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_56|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_35|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ULTIMATE.start_main_~#t2481~0.offset=|v_ULTIMATE.start_main_~#t2481~0.offset_16|, ~y$mem_tmp~0=v_~y$mem_tmp~0_31, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_301, ~y$flush_delayed~0=v_~y$flush_delayed~0_48, ULTIMATE.start_main_~#t2482~0.base=|v_ULTIMATE.start_main_~#t2482~0.base_19|, #length=|v_#length_15|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_29|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_32|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_44|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_35|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_51|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_45|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_31|, ~weak$$choice0~0=v_~weak$$choice0~0_24, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_30|, ~y$w_buff1~0=v_~y$w_buff1~0_254, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_6, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_175, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_8|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_304, ~x~0=v_~x~0_168, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_6, ULTIMATE.start_main_~#t2482~0.offset=|v_ULTIMATE.start_main_~#t2482~0.offset_15|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_753, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_28|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_28|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_22, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_43|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_28|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_46|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_28|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_220, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_39|, ~y$w_buff0~0=v_~y$w_buff0~0_376, ~y~0=v_~y~0_141, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_30|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_44|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_26|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_37|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_29|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_23, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_28|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_39|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_205, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_16|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_15|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_394, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_13|, ~weak$$choice2~0=v_~weak$$choice2~0_132, ULTIMATE.start_main_~#t2481~0.base=|v_ULTIMATE.start_main_~#t2481~0.base_19|, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_444} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ULTIMATE.start_main_~#t2481~0.offset, ~y$mem_tmp~0, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, ULTIMATE.start_main_~#t2482~0.base, #length, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ULTIMATE.start_main_~#t2482~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ULTIMATE.start_main_~#t2481~0.base, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 16:15:48,959 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [677] [677] L777-1-->L779: Formula: (and (not (= |v_ULTIMATE.start_main_~#t2482~0.base_11| 0)) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t2482~0.base_11| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t2482~0.base_11|) |v_ULTIMATE.start_main_~#t2482~0.offset_10| 1))) (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t2482~0.base_11|) (= |v_#valid_21| (store |v_#valid_22| |v_ULTIMATE.start_main_~#t2482~0.base_11| 1)) (= 0 |v_ULTIMATE.start_main_~#t2482~0.offset_10|) (= (store |v_#length_10| |v_ULTIMATE.start_main_~#t2482~0.base_11| 4) |v_#length_9|) (= 0 (select |v_#valid_22| |v_ULTIMATE.start_main_~#t2482~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_22|, #memory_int=|v_#memory_int_10|, #length=|v_#length_10|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_8|, ULTIMATE.start_main_~#t2482~0.offset=|v_ULTIMATE.start_main_~#t2482~0.offset_10|, #valid=|v_#valid_21|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, ULTIMATE.start_main_~#t2482~0.base=|v_ULTIMATE.start_main_~#t2482~0.base_11|, #length=|v_#length_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2482~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_~#t2482~0.base, #length] because there is no mapped edge [2019-12-07 16:15:48,960 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [623] [623] P0ENTRY-->L4-3: Formula: (and (= 2 v_~y$w_buff0~0_172) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_79 0)) (= (ite (not (and (not (= (mod v_~y$w_buff0_used~0_290 256) 0)) (not (= 0 (mod v_~y$w_buff1_used~0_162 256))))) 1 0) |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_77|) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_79 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_77|) (= v_~y$w_buff0_used~0_290 1) (= v_P0Thread1of1ForFork0_~arg.offset_77 |v_P0Thread1of1ForFork0_#in~arg.offset_79|) (= v_P0Thread1of1ForFork0_~arg.base_77 |v_P0Thread1of1ForFork0_#in~arg.base_79|) (= v_~y$w_buff0_used~0_291 v_~y$w_buff1_used~0_162) (= v_~y$w_buff1~0_100 v_~y$w_buff0~0_173)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_79|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_291, ~y$w_buff0~0=v_~y$w_buff0~0_173, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_79|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_79|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_290, ~y$w_buff1~0=v_~y$w_buff1~0_100, ~y$w_buff0~0=v_~y$w_buff0~0_172, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_79, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_79|, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_77, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_77|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_77, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_162} AuxVars[] AssignedVars[~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 16:15:48,960 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L735-->L735-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In380308741 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd1~0_In380308741 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In380308741 |P0Thread1of1ForFork0_#t~ite5_Out380308741|)) (and (= 0 |P0Thread1of1ForFork0_#t~ite5_Out380308741|) (not .cse0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In380308741, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In380308741} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out380308741|, ~y$w_buff0_used~0=~y$w_buff0_used~0_In380308741, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In380308741} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 16:15:48,961 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L754-2-->L754-4: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In1877043737 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd2~0_In1877043737 256) 0))) (or (and (= ~y$w_buff1~0_In1877043737 |P1Thread1of1ForFork1_#t~ite9_Out1877043737|) (not .cse0) (not .cse1)) (and (= ~y~0_In1877043737 |P1Thread1of1ForFork1_#t~ite9_Out1877043737|) (or .cse1 .cse0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1877043737, ~y$w_buff1~0=~y$w_buff1~0_In1877043737, ~y~0=~y~0_In1877043737, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1877043737} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1877043737, ~y$w_buff1~0=~y$w_buff1~0_In1877043737, P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out1877043737|, ~y~0=~y~0_In1877043737, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1877043737} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9] because there is no mapped edge [2019-12-07 16:15:48,961 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [630] [630] L754-4-->L755: Formula: (= v_~y~0_50 |v_P1Thread1of1ForFork1_#t~ite9_12|) InVars {P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_12|} OutVars{P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_11|, P1Thread1of1ForFork1_#t~ite10=|v_P1Thread1of1ForFork1_#t~ite10_13|, ~y~0=v_~y~0_50} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10, ~y~0] because there is no mapped edge [2019-12-07 16:15:48,961 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [640] [640] L755-->L755-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd2~0_In-977627321 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In-977627321 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-977627321 |P1Thread1of1ForFork1_#t~ite11_Out-977627321|)) (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite11_Out-977627321| 0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-977627321, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-977627321} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-977627321, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-977627321, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-977627321|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 16:15:48,961 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [657] [657] L736-->L736-2: Formula: (let ((.cse1 (= (mod ~y$r_buff1_thd1~0_In-746758535 256) 0)) (.cse0 (= (mod ~y$w_buff1_used~0_In-746758535 256) 0)) (.cse3 (= 0 (mod ~y$r_buff0_thd1~0_In-746758535 256))) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In-746758535 256)))) (or (and (= ~y$w_buff1_used~0_In-746758535 |P0Thread1of1ForFork0_#t~ite6_Out-746758535|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |P0Thread1of1ForFork0_#t~ite6_Out-746758535|) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-746758535, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-746758535, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-746758535, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-746758535} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-746758535|, ~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In-746758535, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-746758535, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In-746758535, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-746758535} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 16:15:48,961 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L737-->L738: Formula: (let ((.cse1 (= ~y$r_buff0_thd1~0_Out442649901 ~y$r_buff0_thd1~0_In442649901)) (.cse2 (= (mod ~y$w_buff0_used~0_In442649901 256) 0)) (.cse0 (= (mod ~y$r_buff0_thd1~0_In442649901 256) 0))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (not .cse2) (= 0 ~y$r_buff0_thd1~0_Out442649901) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In442649901, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In442649901} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In442649901, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out442649901|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_Out442649901} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~y$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 16:15:48,961 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [638] [638] L756-->L756-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In1464716396 256))) (.cse1 (= (mod ~y$w_buff0_used~0_In1464716396 256) 0)) (.cse2 (= 0 (mod ~y$w_buff1_used~0_In1464716396 256))) (.cse3 (= 0 (mod ~y$r_buff1_thd2~0_In1464716396 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork1_#t~ite12_Out1464716396|)) (and (= ~y$w_buff1_used~0_In1464716396 |P1Thread1of1ForFork1_#t~ite12_Out1464716396|) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1464716396, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1464716396, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1464716396, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1464716396} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In1464716396, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1464716396, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In1464716396, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out1464716396|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1464716396} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 16:15:48,962 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [659] [659] L757-->L757-2: Formula: (let ((.cse1 (= (mod ~y$r_buff0_thd2~0_In41508719 256) 0)) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In41508719 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork1_#t~ite13_Out41508719| ~y$r_buff0_thd2~0_In41508719)) (and (= 0 |P1Thread1of1ForFork1_#t~ite13_Out41508719|) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In41508719, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In41508719} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In41508719, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In41508719, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out41508719|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 16:15:48,962 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [644] [644] L758-->L758-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd2~0_In-1494492856 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In-1494492856 256))) (.cse2 (= (mod ~y$r_buff1_thd2~0_In-1494492856 256) 0)) (.cse3 (= (mod ~y$w_buff1_used~0_In-1494492856 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$r_buff1_thd2~0_In-1494492856 |P1Thread1of1ForFork1_#t~ite14_Out-1494492856|)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork1_#t~ite14_Out-1494492856| 0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1494492856, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1494492856, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1494492856, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1494492856} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-1494492856, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1494492856, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-1494492856, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-1494492856|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1494492856} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 16:15:48,962 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [668] [668] L758-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_40 1) v_~__unbuffered_cnt~0_39) (= |v_P1Thread1of1ForFork1_#t~ite14_32| v_~y$r_buff1_thd2~0_85)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_32|} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_85, P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_39, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_31|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork1_#res.offset, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 16:15:48,962 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [655] [655] L738-->L738-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff1_thd1~0_In1128078612 256))) (.cse3 (= (mod ~y$w_buff1_used~0_In1128078612 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd1~0_In1128078612 256))) (.cse0 (= (mod ~y$w_buff0_used~0_In1128078612 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite8_Out1128078612|)) (and (or .cse2 .cse3) (= ~y$r_buff1_thd1~0_In1128078612 |P0Thread1of1ForFork0_#t~ite8_Out1128078612|) (or .cse1 .cse0)))) InVars {~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1128078612, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1128078612, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1128078612, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1128078612} OutVars{~y$r_buff1_thd1~0=~y$r_buff1_thd1~0_In1128078612, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1128078612, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out1128078612|, ~y$r_buff0_thd1~0=~y$r_buff0_thd1~0_In1128078612, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1128078612} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 16:15:48,962 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [663] [663] L738-2-->P0EXIT: Formula: (and (= v_~__unbuffered_cnt~0_32 (+ v_~__unbuffered_cnt~0_33 1)) (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~y$r_buff1_thd1~0_63 |v_P0Thread1of1ForFork0_#t~ite8_26|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_33} OutVars{~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_63, P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_25|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32} AuxVars[] AssignedVars[~y$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 16:15:48,962 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [592] [592] L783-->L785-2: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_6 256))) (or (= (mod v_~y$w_buff0_used~0_159 256) 0) (= (mod v_~y$r_buff0_thd0~0_61 256) 0))) InVars {~y$w_buff0_used~0=v_~y$w_buff0_used~0_159, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_61, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} OutVars{~y$w_buff0_used~0=v_~y$w_buff0_used~0_159, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_61, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_6} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 16:15:48,962 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [654] [654] L785-2-->L785-4: Formula: (let ((.cse1 (= (mod ~y$w_buff1_used~0_In-678074773 256) 0)) (.cse0 (= (mod ~y$r_buff1_thd0~0_In-678074773 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite17_Out-678074773| ~y~0_In-678074773)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite17_Out-678074773| ~y$w_buff1~0_In-678074773) (not .cse0)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In-678074773, ~y~0=~y~0_In-678074773, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-678074773, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-678074773} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out-678074773|, ~y$w_buff1~0=~y$w_buff1~0_In-678074773, ~y~0=~y~0_In-678074773, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-678074773, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-678074773} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17] because there is no mapped edge [2019-12-07 16:15:48,962 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [621] [621] L785-4-->L786: Formula: (= v_~y~0_46 |v_ULTIMATE.start_main_#t~ite17_8|) InVars {ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_8|} OutVars{ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_7|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_8|, ~y~0=v_~y~0_46} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18, ~y~0] because there is no mapped edge [2019-12-07 16:15:48,962 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [647] [647] L786-->L786-2: Formula: (let ((.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In153470290 256))) (.cse0 (= 0 (mod ~y$w_buff0_used~0_In153470290 256)))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite19_Out153470290|)) (and (= ~y$w_buff0_used~0_In153470290 |ULTIMATE.start_main_#t~ite19_Out153470290|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In153470290, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In153470290} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In153470290, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out153470290|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In153470290} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 16:15:48,963 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [641] [641] L787-->L787-2: Formula: (let ((.cse2 (= 0 (mod ~y$r_buff0_thd0~0_In-1736883334 256))) (.cse3 (= 0 (mod ~y$w_buff0_used~0_In-1736883334 256))) (.cse0 (= (mod ~y$w_buff1_used~0_In-1736883334 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd0~0_In-1736883334 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite20_Out-1736883334| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |ULTIMATE.start_main_#t~ite20_Out-1736883334| ~y$w_buff1_used~0_In-1736883334) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1736883334, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1736883334, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1736883334, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1736883334} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1736883334, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1736883334, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-1736883334|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1736883334, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1736883334} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 16:15:48,963 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [650] [650] L788-->L788-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-764964004 256))) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In-764964004 256)))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite21_Out-764964004| 0) (not .cse1)) (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite21_Out-764964004| ~y$r_buff0_thd0~0_In-764964004)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-764964004, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-764964004} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-764964004, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-764964004, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-764964004|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 16:15:48,963 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [642] [642] L789-->L789-2: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In-1022259150 256) 0)) (.cse1 (= (mod ~y$r_buff1_thd0~0_In-1022259150 256) 0)) (.cse3 (= (mod ~y$r_buff0_thd0~0_In-1022259150 256) 0)) (.cse2 (= (mod ~y$w_buff0_used~0_In-1022259150 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite22_Out-1022259150|)) (and (or .cse0 .cse1) (or .cse3 .cse2) (= ~y$r_buff1_thd0~0_In-1022259150 |ULTIMATE.start_main_#t~ite22_Out-1022259150|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1022259150, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1022259150, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1022259150, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1022259150} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1022259150, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1022259150, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1022259150, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out-1022259150|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1022259150} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 16:15:48,964 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] L799-->L799-8: Formula: (let ((.cse1 (= 0 (mod ~weak$$choice2~0_In1484464172 256)))) (or (and (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In1484464172 256)))) (or (and (= 0 (mod ~y$w_buff1_used~0_In1484464172 256)) .cse0) (and (= 0 (mod ~y$r_buff1_thd0~0_In1484464172 256)) .cse0) (= 0 (mod ~y$w_buff0_used~0_In1484464172 256)))) .cse1 (= |ULTIMATE.start_main_#t~ite34_Out1484464172| |ULTIMATE.start_main_#t~ite35_Out1484464172|) (= ~y$w_buff0_used~0_In1484464172 |ULTIMATE.start_main_#t~ite34_Out1484464172|)) (and (not .cse1) (= |ULTIMATE.start_main_#t~ite34_In1484464172| |ULTIMATE.start_main_#t~ite34_Out1484464172|) (= ~y$w_buff0_used~0_In1484464172 |ULTIMATE.start_main_#t~ite35_Out1484464172|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1484464172, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1484464172, ~weak$$choice2~0=~weak$$choice2~0_In1484464172, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1484464172, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1484464172, ULTIMATE.start_main_#t~ite34=|ULTIMATE.start_main_#t~ite34_In1484464172|} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1484464172, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1484464172, ULTIMATE.start_main_#t~ite35=|ULTIMATE.start_main_#t~ite35_Out1484464172|, ~weak$$choice2~0=~weak$$choice2~0_In1484464172, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In1484464172, ULTIMATE.start_main_#t~ite34=|ULTIMATE.start_main_#t~ite34_Out1484464172|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1484464172} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite34] because there is no mapped edge [2019-12-07 16:15:48,965 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [597] [597] L801-->L802: Formula: (and (= v_~y$r_buff0_thd0~0_72 v_~y$r_buff0_thd0~0_71) (not (= (mod v_~weak$$choice2~0_23 256) 0))) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_72, ~weak$$choice2~0=v_~weak$$choice2~0_23} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_7|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_7|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_7|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_71, ~weak$$choice2~0=v_~weak$$choice2~0_23} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39, ~y$r_buff0_thd0~0] because there is no mapped edge [2019-12-07 16:15:48,965 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [676] [676] L804-->L4: Formula: (and (= v_~y~0_99 v_~y$mem_tmp~0_21) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_10| (mod v_~main$tmp_guard1~0_10 256)) (not (= 0 (mod v_~y$flush_delayed~0_36 256))) (= 0 v_~y$flush_delayed~0_35)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_21, ~y$flush_delayed~0=v_~y$flush_delayed~0_36, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_10} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_21, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~y$flush_delayed~0=v_~y$flush_delayed~0_35, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_10, ~y~0=v_~y~0_99, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_28|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_10|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ~y~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 16:15:48,965 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [671] [671] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_10 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_10, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 16:15:49,015 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_c12aea8c-00b5-41df-883e-bda8e876d56e/bin/uautomizer/witness.graphml [2019-12-07 16:15:49,015 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 16:15:49,016 INFO L168 Benchmark]: Toolchain (without parser) took 10779.39 ms. Allocated memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: 466.6 MB). Free memory was 934.0 MB in the beginning and 769.1 MB in the end (delta: 164.9 MB). Peak memory consumption was 631.6 MB. Max. memory is 11.5 GB. [2019-12-07 16:15:49,017 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 954.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 16:15:49,017 INFO L168 Benchmark]: CACSL2BoogieTranslator took 367.27 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 89.1 MB). Free memory was 934.0 MB in the beginning and 1.1 GB in the end (delta: -122.7 MB). Peak memory consumption was 22.9 MB. Max. memory is 11.5 GB. [2019-12-07 16:15:49,017 INFO L168 Benchmark]: Boogie Procedure Inliner took 48.94 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. [2019-12-07 16:15:49,017 INFO L168 Benchmark]: Boogie Preprocessor took 24.70 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 1.3 MB). Peak memory consumption was 1.3 MB. Max. memory is 11.5 GB. [2019-12-07 16:15:49,018 INFO L168 Benchmark]: RCFGBuilder took 399.11 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 997.1 MB in the end (delta: 55.6 MB). Peak memory consumption was 55.6 MB. Max. memory is 11.5 GB. [2019-12-07 16:15:49,018 INFO L168 Benchmark]: TraceAbstraction took 9877.95 ms. Allocated memory was 1.1 GB in the beginning and 1.5 GB in the end (delta: 377.5 MB). Free memory was 997.1 MB in the beginning and 783.9 MB in the end (delta: 213.2 MB). Peak memory consumption was 590.7 MB. Max. memory is 11.5 GB. [2019-12-07 16:15:49,018 INFO L168 Benchmark]: Witness Printer took 58.39 ms. Allocated memory is still 1.5 GB. Free memory was 783.9 MB in the beginning and 769.1 MB in the end (delta: 14.9 MB). Peak memory consumption was 14.9 MB. Max. memory is 11.5 GB. [2019-12-07 16:15:49,020 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 954.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 367.27 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 89.1 MB). Free memory was 934.0 MB in the beginning and 1.1 GB in the end (delta: -122.7 MB). Peak memory consumption was 22.9 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 48.94 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 2.7 MB). Peak memory consumption was 2.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 24.70 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 1.3 MB). Peak memory consumption was 1.3 MB. Max. memory is 11.5 GB. * RCFGBuilder took 399.11 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 997.1 MB in the end (delta: 55.6 MB). Peak memory consumption was 55.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 9877.95 ms. Allocated memory was 1.1 GB in the beginning and 1.5 GB in the end (delta: 377.5 MB). Free memory was 997.1 MB in the beginning and 783.9 MB in the end (delta: 213.2 MB). Peak memory consumption was 590.7 MB. Max. memory is 11.5 GB. * Witness Printer took 58.39 ms. Allocated memory is still 1.5 GB. Free memory was 783.9 MB in the beginning and 769.1 MB in the end (delta: 14.9 MB). Peak memory consumption was 14.9 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 2.7s, 145 ProgramPointsBefore, 78 ProgramPointsAfterwards, 179 TransitionsBefore, 90 TransitionsAfterwards, 10418 CoEnabledTransitionPairs, 7 FixpointIterations, 27 TrivialSequentialCompositions, 38 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 32 ConcurrentYvCompositions, 25 ChoiceCompositions, 3579 VarBasedMoverChecksPositive, 213 VarBasedMoverChecksNegative, 67 SemBasedMoverChecksPositive, 198 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 46212 CheckedPairsTotal, 97 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L777] FCALL, FORK 0 pthread_create(&t2481, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L779] FCALL, FORK 0 pthread_create(&t2482, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0] [L725] 1 y$r_buff1_thd0 = y$r_buff0_thd0 [L726] 1 y$r_buff1_thd1 = y$r_buff0_thd1 [L727] 1 y$r_buff1_thd2 = y$r_buff0_thd2 [L728] 1 y$r_buff0_thd1 = (_Bool)1 [L731] 1 x = 1 VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L734] EXPR 1 y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L748] 2 x = 2 [L751] 2 y = 1 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L734] 1 y = y$w_buff0_used && y$r_buff0_thd1 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd1 ? y$w_buff1 : y) [L754] 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L735] 1 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd1 ? (_Bool)0 : y$w_buff0_used [L736] 1 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd1 || y$w_buff1_used && y$r_buff1_thd1 ? (_Bool)0 : y$w_buff1_used [L755] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L756] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L757] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L781] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L786] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L787] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L788] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L789] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L792] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L793] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L794] 0 y$flush_delayed = weak$$choice2 [L795] 0 y$mem_tmp = y VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L796] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L796] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L797] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L797] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L798] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L798] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L799] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L800] EXPR 0 weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L800] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L802] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] [L802] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L803] 0 main$tmp_guard1 = !(x == 2 && y == 2) VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=1, y$r_buff0_thd2=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 139 locations, 2 error locations. Result: UNSAFE, OverallTime: 9.7s, OverallIterations: 18, TraceHistogramMax: 1, AutomataDifference: 3.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 2225 SDtfs, 2239 SDslu, 5490 SDs, 0 SdLazy, 3274 SolverSat, 196 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 155 GetRequests, 21 SyntacticMatches, 10 SemanticMatches, 124 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 236 ImplicationChecksByTransitivity, 0.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=15905occurred in iteration=6, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 1.6s AutomataMinimizationTime, 17 MinimizatonAttempts, 14483 StatesRemovedByMinimization, 15 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.0s InterpolantComputationTime, 660 NumberOfCodeBlocks, 660 NumberOfCodeBlocksAsserted, 18 NumberOfCheckSat, 589 ConstructedInterpolants, 0 QuantifiedInterpolants, 113237 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 17 InterpolantComputations, 17 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...