./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe029_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_b87c6edf-47ae-4c5e-85c6-5aae55aad974/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_b87c6edf-47ae-4c5e-85c6-5aae55aad974/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_b87c6edf-47ae-4c5e-85c6-5aae55aad974/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_b87c6edf-47ae-4c5e-85c6-5aae55aad974/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe029_rmo.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_b87c6edf-47ae-4c5e-85c6-5aae55aad974/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_b87c6edf-47ae-4c5e-85c6-5aae55aad974/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 3915ac96bf19657900740412bd5789f6788284da ................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 12:34:01,291 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 12:34:01,292 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 12:34:01,299 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 12:34:01,300 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 12:34:01,300 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 12:34:01,301 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 12:34:01,302 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 12:34:01,304 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 12:34:01,304 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 12:34:01,305 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 12:34:01,306 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 12:34:01,306 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 12:34:01,307 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 12:34:01,307 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 12:34:01,308 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 12:34:01,309 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 12:34:01,309 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 12:34:01,310 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 12:34:01,312 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 12:34:01,313 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 12:34:01,314 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 12:34:01,314 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 12:34:01,315 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 12:34:01,317 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 12:34:01,317 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 12:34:01,317 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 12:34:01,317 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 12:34:01,318 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 12:34:01,318 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 12:34:01,318 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 12:34:01,319 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 12:34:01,319 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 12:34:01,320 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 12:34:01,320 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 12:34:01,320 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 12:34:01,321 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 12:34:01,321 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 12:34:01,321 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 12:34:01,321 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 12:34:01,322 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 12:34:01,322 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_b87c6edf-47ae-4c5e-85c6-5aae55aad974/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 12:34:01,331 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 12:34:01,331 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 12:34:01,332 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 12:34:01,332 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 12:34:01,332 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 12:34:01,332 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 12:34:01,332 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 12:34:01,333 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 12:34:01,333 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 12:34:01,333 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 12:34:01,333 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 12:34:01,333 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 12:34:01,333 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 12:34:01,333 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 12:34:01,333 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 12:34:01,333 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 12:34:01,333 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 12:34:01,334 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 12:34:01,334 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 12:34:01,334 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 12:34:01,334 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 12:34:01,334 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 12:34:01,334 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 12:34:01,334 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 12:34:01,334 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 12:34:01,334 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 12:34:01,334 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 12:34:01,335 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 12:34:01,335 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 12:34:01,335 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_b87c6edf-47ae-4c5e-85c6-5aae55aad974/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 3915ac96bf19657900740412bd5789f6788284da [2019-12-07 12:34:01,433 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 12:34:01,443 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 12:34:01,446 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 12:34:01,448 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 12:34:01,448 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 12:34:01,448 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_b87c6edf-47ae-4c5e-85c6-5aae55aad974/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe029_rmo.opt.i [2019-12-07 12:34:01,490 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_b87c6edf-47ae-4c5e-85c6-5aae55aad974/bin/uautomizer/data/a209ef0a4/c0d487555837485abc5456f71de9b7ba/FLAG143b224be [2019-12-07 12:34:01,950 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 12:34:01,950 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_b87c6edf-47ae-4c5e-85c6-5aae55aad974/sv-benchmarks/c/pthread-wmm/safe029_rmo.opt.i [2019-12-07 12:34:01,962 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_b87c6edf-47ae-4c5e-85c6-5aae55aad974/bin/uautomizer/data/a209ef0a4/c0d487555837485abc5456f71de9b7ba/FLAG143b224be [2019-12-07 12:34:02,471 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_b87c6edf-47ae-4c5e-85c6-5aae55aad974/bin/uautomizer/data/a209ef0a4/c0d487555837485abc5456f71de9b7ba [2019-12-07 12:34:02,474 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 12:34:02,475 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 12:34:02,475 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 12:34:02,475 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 12:34:02,478 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 12:34:02,478 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 12:34:02" (1/1) ... [2019-12-07 12:34:02,480 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4a374d02 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:34:02, skipping insertion in model container [2019-12-07 12:34:02,481 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 12:34:02" (1/1) ... [2019-12-07 12:34:02,486 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 12:34:02,523 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 12:34:02,795 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 12:34:02,805 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 12:34:02,860 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 12:34:02,911 INFO L208 MainTranslator]: Completed translation [2019-12-07 12:34:02,912 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:34:02 WrapperNode [2019-12-07 12:34:02,912 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 12:34:02,912 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 12:34:02,912 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 12:34:02,913 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 12:34:02,919 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:34:02" (1/1) ... [2019-12-07 12:34:02,936 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:34:02" (1/1) ... [2019-12-07 12:34:02,958 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 12:34:02,959 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 12:34:02,959 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 12:34:02,959 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 12:34:02,965 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:34:02" (1/1) ... [2019-12-07 12:34:02,965 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:34:02" (1/1) ... [2019-12-07 12:34:02,968 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:34:02" (1/1) ... [2019-12-07 12:34:02,969 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:34:02" (1/1) ... [2019-12-07 12:34:02,975 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:34:02" (1/1) ... [2019-12-07 12:34:02,977 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:34:02" (1/1) ... [2019-12-07 12:34:02,980 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:34:02" (1/1) ... [2019-12-07 12:34:02,983 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 12:34:02,983 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 12:34:02,983 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 12:34:02,983 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 12:34:02,984 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:34:02" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_b87c6edf-47ae-4c5e-85c6-5aae55aad974/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 12:34:03,029 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 12:34:03,029 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 12:34:03,029 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 12:34:03,029 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 12:34:03,029 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 12:34:03,029 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 12:34:03,030 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 12:34:03,030 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 12:34:03,030 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 12:34:03,030 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 12:34:03,030 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 12:34:03,031 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 12:34:03,372 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 12:34:03,373 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 12:34:03,373 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:34:03 BoogieIcfgContainer [2019-12-07 12:34:03,374 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 12:34:03,374 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 12:34:03,374 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 12:34:03,376 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 12:34:03,376 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 12:34:02" (1/3) ... [2019-12-07 12:34:03,377 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@40ace57f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 12:34:03, skipping insertion in model container [2019-12-07 12:34:03,377 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:34:02" (2/3) ... [2019-12-07 12:34:03,377 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@40ace57f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 12:34:03, skipping insertion in model container [2019-12-07 12:34:03,377 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:34:03" (3/3) ... [2019-12-07 12:34:03,378 INFO L109 eAbstractionObserver]: Analyzing ICFG safe029_rmo.opt.i [2019-12-07 12:34:03,384 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 12:34:03,384 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 12:34:03,389 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 12:34:03,389 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 12:34:03,409 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,409 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,409 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,409 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,410 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,410 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,410 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,410 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,410 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,410 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,410 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,411 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,411 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,411 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,411 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,411 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,411 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,411 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,411 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,411 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,411 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,412 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,412 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,412 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,412 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,412 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,413 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,413 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,413 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,413 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,414 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,414 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,414 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,414 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,414 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,415 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,415 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,415 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,415 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,416 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,416 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,416 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,416 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,416 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,417 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,417 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,417 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,417 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,417 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,417 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,418 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,418 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,418 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,418 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,418 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,419 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,419 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,419 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,419 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,419 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,420 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,420 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,420 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,420 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 12:34:03,434 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-12-07 12:34:03,447 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 12:34:03,447 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 12:34:03,448 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 12:34:03,448 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 12:34:03,448 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 12:34:03,448 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 12:34:03,448 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 12:34:03,448 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 12:34:03,458 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 145 places, 179 transitions [2019-12-07 12:34:03,459 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 145 places, 179 transitions [2019-12-07 12:34:03,503 INFO L134 PetriNetUnfolder]: 41/177 cut-off events. [2019-12-07 12:34:03,503 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 12:34:03,511 INFO L76 FinitePrefix]: Finished finitePrefix Result has 184 conditions, 177 events. 41/177 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 462 event pairs. 6/140 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-12-07 12:34:03,522 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 145 places, 179 transitions [2019-12-07 12:34:03,543 INFO L134 PetriNetUnfolder]: 41/177 cut-off events. [2019-12-07 12:34:03,543 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 12:34:03,546 INFO L76 FinitePrefix]: Finished finitePrefix Result has 184 conditions, 177 events. 41/177 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 8. Compared 462 event pairs. 6/140 useless extension candidates. Maximal degree in co-relation 150. Up to 2 conditions per place. [2019-12-07 12:34:03,555 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 10378 [2019-12-07 12:34:03,556 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 12:34:06,027 WARN L192 SmtUtils]: Spent 115.00 ms on a formula simplification. DAG size of input: 79 DAG size of output: 77 [2019-12-07 12:34:06,108 INFO L206 etLargeBlockEncoding]: Checked pairs total: 47380 [2019-12-07 12:34:06,109 INFO L214 etLargeBlockEncoding]: Total number of compositions: 96 [2019-12-07 12:34:06,111 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 79 places, 90 transitions [2019-12-07 12:34:06,426 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 8608 states. [2019-12-07 12:34:06,427 INFO L276 IsEmpty]: Start isEmpty. Operand 8608 states. [2019-12-07 12:34:06,431 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 6 [2019-12-07 12:34:06,431 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:34:06,432 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1] [2019-12-07 12:34:06,432 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:34:06,436 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:34:06,436 INFO L82 PathProgramCache]: Analyzing trace with hash 689103523, now seen corresponding path program 1 times [2019-12-07 12:34:06,442 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:34:06,442 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [751243959] [2019-12-07 12:34:06,442 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:34:06,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:34:06,606 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:34:06,607 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [751243959] [2019-12-07 12:34:06,607 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:34:06,607 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 12:34:06,608 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [91715950] [2019-12-07 12:34:06,611 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:34:06,611 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:34:06,621 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:34:06,621 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:34:06,623 INFO L87 Difference]: Start difference. First operand 8608 states. Second operand 3 states. [2019-12-07 12:34:06,829 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:34:06,830 INFO L93 Difference]: Finished difference Result 8560 states and 27962 transitions. [2019-12-07 12:34:06,830 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:34:06,831 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 5 [2019-12-07 12:34:06,832 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:34:06,893 INFO L225 Difference]: With dead ends: 8560 [2019-12-07 12:34:06,893 INFO L226 Difference]: Without dead ends: 8391 [2019-12-07 12:34:06,894 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:34:06,965 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8391 states. [2019-12-07 12:34:07,118 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8391 to 8391. [2019-12-07 12:34:07,119 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8391 states. [2019-12-07 12:34:07,149 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8391 states to 8391 states and 27442 transitions. [2019-12-07 12:34:07,150 INFO L78 Accepts]: Start accepts. Automaton has 8391 states and 27442 transitions. Word has length 5 [2019-12-07 12:34:07,151 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:34:07,151 INFO L462 AbstractCegarLoop]: Abstraction has 8391 states and 27442 transitions. [2019-12-07 12:34:07,151 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:34:07,151 INFO L276 IsEmpty]: Start isEmpty. Operand 8391 states and 27442 transitions. [2019-12-07 12:34:07,153 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 12:34:07,153 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:34:07,153 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:34:07,153 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:34:07,153 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:34:07,154 INFO L82 PathProgramCache]: Analyzing trace with hash -1296433146, now seen corresponding path program 1 times [2019-12-07 12:34:07,154 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:34:07,154 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1715939403] [2019-12-07 12:34:07,154 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:34:07,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:34:07,222 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:34:07,222 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1715939403] [2019-12-07 12:34:07,222 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:34:07,223 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:34:07,223 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1702387714] [2019-12-07 12:34:07,224 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:34:07,224 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:34:07,224 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:34:07,224 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:34:07,224 INFO L87 Difference]: Start difference. First operand 8391 states and 27442 transitions. Second operand 4 states. [2019-12-07 12:34:07,457 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:34:07,457 INFO L93 Difference]: Finished difference Result 13399 states and 41962 transitions. [2019-12-07 12:34:07,458 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:34:07,458 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 12:34:07,458 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:34:07,514 INFO L225 Difference]: With dead ends: 13399 [2019-12-07 12:34:07,514 INFO L226 Difference]: Without dead ends: 13392 [2019-12-07 12:34:07,515 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:34:07,578 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13392 states. [2019-12-07 12:34:07,762 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13392 to 11787. [2019-12-07 12:34:07,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11787 states. [2019-12-07 12:34:07,835 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11787 states to 11787 states and 37494 transitions. [2019-12-07 12:34:07,836 INFO L78 Accepts]: Start accepts. Automaton has 11787 states and 37494 transitions. Word has length 11 [2019-12-07 12:34:07,836 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:34:07,836 INFO L462 AbstractCegarLoop]: Abstraction has 11787 states and 37494 transitions. [2019-12-07 12:34:07,836 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:34:07,836 INFO L276 IsEmpty]: Start isEmpty. Operand 11787 states and 37494 transitions. [2019-12-07 12:34:07,838 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 12:34:07,838 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:34:07,839 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:34:07,839 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:34:07,839 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:34:07,839 INFO L82 PathProgramCache]: Analyzing trace with hash 825675890, now seen corresponding path program 1 times [2019-12-07 12:34:07,839 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:34:07,840 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1725252543] [2019-12-07 12:34:07,840 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:34:07,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:34:07,902 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:34:07,903 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1725252543] [2019-12-07 12:34:07,903 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:34:07,903 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:34:07,903 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [288266190] [2019-12-07 12:34:07,903 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 12:34:07,904 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:34:07,904 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:34:07,904 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:34:07,904 INFO L87 Difference]: Start difference. First operand 11787 states and 37494 transitions. Second operand 4 states. [2019-12-07 12:34:07,935 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:34:07,935 INFO L93 Difference]: Finished difference Result 1949 states and 4516 transitions. [2019-12-07 12:34:07,935 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 12:34:07,935 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 12:34:07,935 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:34:07,938 INFO L225 Difference]: With dead ends: 1949 [2019-12-07 12:34:07,938 INFO L226 Difference]: Without dead ends: 1663 [2019-12-07 12:34:07,938 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:34:07,942 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1663 states. [2019-12-07 12:34:07,959 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1663 to 1663. [2019-12-07 12:34:07,959 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1663 states. [2019-12-07 12:34:07,966 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1663 states to 1663 states and 3725 transitions. [2019-12-07 12:34:07,966 INFO L78 Accepts]: Start accepts. Automaton has 1663 states and 3725 transitions. Word has length 11 [2019-12-07 12:34:07,966 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:34:07,967 INFO L462 AbstractCegarLoop]: Abstraction has 1663 states and 3725 transitions. [2019-12-07 12:34:07,967 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 12:34:07,967 INFO L276 IsEmpty]: Start isEmpty. Operand 1663 states and 3725 transitions. [2019-12-07 12:34:07,968 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2019-12-07 12:34:07,968 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:34:07,968 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:34:07,968 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:34:07,968 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:34:07,968 INFO L82 PathProgramCache]: Analyzing trace with hash 1402369775, now seen corresponding path program 1 times [2019-12-07 12:34:07,968 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:34:07,969 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [684505865] [2019-12-07 12:34:07,969 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:34:07,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:34:08,030 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:34:08,030 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [684505865] [2019-12-07 12:34:08,030 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:34:08,030 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:34:08,031 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [863460658] [2019-12-07 12:34:08,031 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:34:08,031 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:34:08,031 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:34:08,031 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:34:08,032 INFO L87 Difference]: Start difference. First operand 1663 states and 3725 transitions. Second operand 5 states. [2019-12-07 12:34:08,063 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:34:08,063 INFO L93 Difference]: Finished difference Result 403 states and 750 transitions. [2019-12-07 12:34:08,063 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:34:08,063 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 23 [2019-12-07 12:34:08,064 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:34:08,065 INFO L225 Difference]: With dead ends: 403 [2019-12-07 12:34:08,065 INFO L226 Difference]: Without dead ends: 357 [2019-12-07 12:34:08,066 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:34:08,066 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 357 states. [2019-12-07 12:34:08,069 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 357 to 322. [2019-12-07 12:34:08,069 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 322 states. [2019-12-07 12:34:08,070 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 322 states to 322 states and 595 transitions. [2019-12-07 12:34:08,070 INFO L78 Accepts]: Start accepts. Automaton has 322 states and 595 transitions. Word has length 23 [2019-12-07 12:34:08,070 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:34:08,070 INFO L462 AbstractCegarLoop]: Abstraction has 322 states and 595 transitions. [2019-12-07 12:34:08,070 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:34:08,071 INFO L276 IsEmpty]: Start isEmpty. Operand 322 states and 595 transitions. [2019-12-07 12:34:08,072 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 12:34:08,072 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:34:08,072 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:34:08,073 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:34:08,073 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:34:08,073 INFO L82 PathProgramCache]: Analyzing trace with hash -1079059862, now seen corresponding path program 1 times [2019-12-07 12:34:08,073 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:34:08,073 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1830407007] [2019-12-07 12:34:08,074 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:34:08,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:34:08,133 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:34:08,133 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1830407007] [2019-12-07 12:34:08,133 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:34:08,134 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 12:34:08,134 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [375054852] [2019-12-07 12:34:08,134 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:34:08,134 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:34:08,134 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:34:08,134 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:34:08,134 INFO L87 Difference]: Start difference. First operand 322 states and 595 transitions. Second operand 3 states. [2019-12-07 12:34:08,164 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:34:08,164 INFO L93 Difference]: Finished difference Result 332 states and 605 transitions. [2019-12-07 12:34:08,164 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:34:08,164 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 52 [2019-12-07 12:34:08,164 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:34:08,165 INFO L225 Difference]: With dead ends: 332 [2019-12-07 12:34:08,165 INFO L226 Difference]: Without dead ends: 332 [2019-12-07 12:34:08,165 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:34:08,166 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 332 states. [2019-12-07 12:34:08,169 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 332 to 328. [2019-12-07 12:34:08,169 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 328 states. [2019-12-07 12:34:08,169 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 328 states to 328 states and 601 transitions. [2019-12-07 12:34:08,169 INFO L78 Accepts]: Start accepts. Automaton has 328 states and 601 transitions. Word has length 52 [2019-12-07 12:34:08,170 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:34:08,170 INFO L462 AbstractCegarLoop]: Abstraction has 328 states and 601 transitions. [2019-12-07 12:34:08,170 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:34:08,170 INFO L276 IsEmpty]: Start isEmpty. Operand 328 states and 601 transitions. [2019-12-07 12:34:08,171 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 12:34:08,171 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:34:08,172 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:34:08,172 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:34:08,172 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:34:08,172 INFO L82 PathProgramCache]: Analyzing trace with hash -1678296005, now seen corresponding path program 1 times [2019-12-07 12:34:08,172 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:34:08,172 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1577738776] [2019-12-07 12:34:08,172 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:34:08,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:34:08,237 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:34:08,237 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1577738776] [2019-12-07 12:34:08,238 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:34:08,238 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 12:34:08,238 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [601882156] [2019-12-07 12:34:08,238 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:34:08,239 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:34:08,239 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:34:08,239 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:34:08,239 INFO L87 Difference]: Start difference. First operand 328 states and 601 transitions. Second operand 5 states. [2019-12-07 12:34:08,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:34:08,365 INFO L93 Difference]: Finished difference Result 459 states and 837 transitions. [2019-12-07 12:34:08,365 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 12:34:08,365 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 52 [2019-12-07 12:34:08,365 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:34:08,366 INFO L225 Difference]: With dead ends: 459 [2019-12-07 12:34:08,366 INFO L226 Difference]: Without dead ends: 459 [2019-12-07 12:34:08,366 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:34:08,367 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 459 states. [2019-12-07 12:34:08,370 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 459 to 375. [2019-12-07 12:34:08,370 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 375 states. [2019-12-07 12:34:08,371 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 375 states to 375 states and 692 transitions. [2019-12-07 12:34:08,371 INFO L78 Accepts]: Start accepts. Automaton has 375 states and 692 transitions. Word has length 52 [2019-12-07 12:34:08,371 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:34:08,371 INFO L462 AbstractCegarLoop]: Abstraction has 375 states and 692 transitions. [2019-12-07 12:34:08,371 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:34:08,372 INFO L276 IsEmpty]: Start isEmpty. Operand 375 states and 692 transitions. [2019-12-07 12:34:08,372 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 12:34:08,373 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:34:08,373 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:34:08,373 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:34:08,373 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:34:08,373 INFO L82 PathProgramCache]: Analyzing trace with hash -856791897, now seen corresponding path program 2 times [2019-12-07 12:34:08,373 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:34:08,373 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [705849923] [2019-12-07 12:34:08,373 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:34:08,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:34:08,438 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:34:08,438 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [705849923] [2019-12-07 12:34:08,438 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:34:08,438 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 12:34:08,438 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1245369531] [2019-12-07 12:34:08,439 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 12:34:08,439 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:34:08,439 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 12:34:08,439 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:34:08,439 INFO L87 Difference]: Start difference. First operand 375 states and 692 transitions. Second operand 6 states. [2019-12-07 12:34:08,650 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:34:08,651 INFO L93 Difference]: Finished difference Result 644 states and 1177 transitions. [2019-12-07 12:34:08,651 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 12:34:08,651 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2019-12-07 12:34:08,651 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:34:08,653 INFO L225 Difference]: With dead ends: 644 [2019-12-07 12:34:08,653 INFO L226 Difference]: Without dead ends: 644 [2019-12-07 12:34:08,653 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 12:34:08,654 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 644 states. [2019-12-07 12:34:08,658 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 644 to 405. [2019-12-07 12:34:08,658 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 405 states. [2019-12-07 12:34:08,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 405 states to 405 states and 752 transitions. [2019-12-07 12:34:08,659 INFO L78 Accepts]: Start accepts. Automaton has 405 states and 752 transitions. Word has length 52 [2019-12-07 12:34:08,659 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:34:08,659 INFO L462 AbstractCegarLoop]: Abstraction has 405 states and 752 transitions. [2019-12-07 12:34:08,659 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 12:34:08,659 INFO L276 IsEmpty]: Start isEmpty. Operand 405 states and 752 transitions. [2019-12-07 12:34:08,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 12:34:08,660 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:34:08,661 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:34:08,661 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:34:08,661 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:34:08,661 INFO L82 PathProgramCache]: Analyzing trace with hash 1692114105, now seen corresponding path program 3 times [2019-12-07 12:34:08,661 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:34:08,661 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1115118058] [2019-12-07 12:34:08,661 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:34:08,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:34:08,725 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:34:08,725 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1115118058] [2019-12-07 12:34:08,725 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:34:08,725 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 12:34:08,726 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [835904961] [2019-12-07 12:34:08,726 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 12:34:08,726 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:34:08,726 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 12:34:08,726 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:34:08,726 INFO L87 Difference]: Start difference. First operand 405 states and 752 transitions. Second operand 6 states. [2019-12-07 12:34:08,933 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:34:08,933 INFO L93 Difference]: Finished difference Result 622 states and 1139 transitions. [2019-12-07 12:34:08,933 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 12:34:08,933 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2019-12-07 12:34:08,933 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:34:08,934 INFO L225 Difference]: With dead ends: 622 [2019-12-07 12:34:08,934 INFO L226 Difference]: Without dead ends: 622 [2019-12-07 12:34:08,934 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2019-12-07 12:34:08,935 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 622 states. [2019-12-07 12:34:08,939 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 622 to 446. [2019-12-07 12:34:08,939 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 446 states. [2019-12-07 12:34:08,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 446 states to 446 states and 830 transitions. [2019-12-07 12:34:08,940 INFO L78 Accepts]: Start accepts. Automaton has 446 states and 830 transitions. Word has length 52 [2019-12-07 12:34:08,941 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:34:08,941 INFO L462 AbstractCegarLoop]: Abstraction has 446 states and 830 transitions. [2019-12-07 12:34:08,941 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 12:34:08,941 INFO L276 IsEmpty]: Start isEmpty. Operand 446 states and 830 transitions. [2019-12-07 12:34:08,942 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2019-12-07 12:34:08,942 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:34:08,942 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:34:08,943 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:34:08,943 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:34:08,943 INFO L82 PathProgramCache]: Analyzing trace with hash -1537444781, now seen corresponding path program 4 times [2019-12-07 12:34:08,943 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:34:08,943 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [100205793] [2019-12-07 12:34:08,943 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:34:08,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:34:09,035 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:34:09,035 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [100205793] [2019-12-07 12:34:09,035 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:34:09,035 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 12:34:09,035 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [68211818] [2019-12-07 12:34:09,036 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 12:34:09,036 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:34:09,036 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 12:34:09,036 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:34:09,036 INFO L87 Difference]: Start difference. First operand 446 states and 830 transitions. Second operand 7 states. [2019-12-07 12:34:09,305 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:34:09,305 INFO L93 Difference]: Finished difference Result 704 states and 1288 transitions. [2019-12-07 12:34:09,305 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 12:34:09,306 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 52 [2019-12-07 12:34:09,306 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:34:09,306 INFO L225 Difference]: With dead ends: 704 [2019-12-07 12:34:09,306 INFO L226 Difference]: Without dead ends: 704 [2019-12-07 12:34:09,306 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 6 SyntacticMatches, 3 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=80, Unknown=0, NotChecked=0, Total=110 [2019-12-07 12:34:09,307 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 704 states. [2019-12-07 12:34:09,311 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 704 to 425. [2019-12-07 12:34:09,312 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 425 states. [2019-12-07 12:34:09,312 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 425 states to 425 states and 789 transitions. [2019-12-07 12:34:09,312 INFO L78 Accepts]: Start accepts. Automaton has 425 states and 789 transitions. Word has length 52 [2019-12-07 12:34:09,312 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:34:09,312 INFO L462 AbstractCegarLoop]: Abstraction has 425 states and 789 transitions. [2019-12-07 12:34:09,313 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 12:34:09,313 INFO L276 IsEmpty]: Start isEmpty. Operand 425 states and 789 transitions. [2019-12-07 12:34:09,313 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 12:34:09,313 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:34:09,313 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:34:09,314 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:34:09,314 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:34:09,314 INFO L82 PathProgramCache]: Analyzing trace with hash 1548250017, now seen corresponding path program 1 times [2019-12-07 12:34:09,314 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:34:09,314 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1256805176] [2019-12-07 12:34:09,314 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:34:09,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:34:09,424 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:34:09,424 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1256805176] [2019-12-07 12:34:09,424 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:34:09,424 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 12:34:09,424 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1814972153] [2019-12-07 12:34:09,424 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 12:34:09,424 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:34:09,425 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 12:34:09,425 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2019-12-07 12:34:09,425 INFO L87 Difference]: Start difference. First operand 425 states and 789 transitions. Second operand 8 states. [2019-12-07 12:34:09,779 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:34:09,779 INFO L93 Difference]: Finished difference Result 716 states and 1278 transitions. [2019-12-07 12:34:09,779 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 12:34:09,779 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 53 [2019-12-07 12:34:09,779 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:34:09,780 INFO L225 Difference]: With dead ends: 716 [2019-12-07 12:34:09,780 INFO L226 Difference]: Without dead ends: 716 [2019-12-07 12:34:09,780 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=128, Unknown=0, NotChecked=0, Total=182 [2019-12-07 12:34:09,781 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 716 states. [2019-12-07 12:34:09,785 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 716 to 383. [2019-12-07 12:34:09,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 383 states. [2019-12-07 12:34:09,785 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 383 states to 383 states and 695 transitions. [2019-12-07 12:34:09,785 INFO L78 Accepts]: Start accepts. Automaton has 383 states and 695 transitions. Word has length 53 [2019-12-07 12:34:09,786 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:34:09,786 INFO L462 AbstractCegarLoop]: Abstraction has 383 states and 695 transitions. [2019-12-07 12:34:09,786 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 12:34:09,786 INFO L276 IsEmpty]: Start isEmpty. Operand 383 states and 695 transitions. [2019-12-07 12:34:09,786 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 12:34:09,786 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:34:09,786 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:34:09,787 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:34:09,787 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:34:09,787 INFO L82 PathProgramCache]: Analyzing trace with hash -1975941905, now seen corresponding path program 2 times [2019-12-07 12:34:09,787 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:34:09,787 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1568059165] [2019-12-07 12:34:09,787 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:34:09,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:34:09,825 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:34:09,825 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1568059165] [2019-12-07 12:34:09,826 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:34:09,826 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:34:09,826 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2146408354] [2019-12-07 12:34:09,826 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:34:09,826 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:34:09,826 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:34:09,826 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:34:09,826 INFO L87 Difference]: Start difference. First operand 383 states and 695 transitions. Second operand 3 states. [2019-12-07 12:34:09,857 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:34:09,857 INFO L93 Difference]: Finished difference Result 382 states and 693 transitions. [2019-12-07 12:34:09,857 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:34:09,857 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-12-07 12:34:09,858 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:34:09,858 INFO L225 Difference]: With dead ends: 382 [2019-12-07 12:34:09,858 INFO L226 Difference]: Without dead ends: 382 [2019-12-07 12:34:09,858 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:34:09,859 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 382 states. [2019-12-07 12:34:09,863 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 382 to 279. [2019-12-07 12:34:09,863 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 279 states. [2019-12-07 12:34:09,864 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 279 states to 279 states and 500 transitions. [2019-12-07 12:34:09,864 INFO L78 Accepts]: Start accepts. Automaton has 279 states and 500 transitions. Word has length 53 [2019-12-07 12:34:09,864 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:34:09,864 INFO L462 AbstractCegarLoop]: Abstraction has 279 states and 500 transitions. [2019-12-07 12:34:09,865 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:34:09,865 INFO L276 IsEmpty]: Start isEmpty. Operand 279 states and 500 transitions. [2019-12-07 12:34:09,865 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2019-12-07 12:34:09,866 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:34:09,866 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:34:09,866 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:34:09,866 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:34:09,866 INFO L82 PathProgramCache]: Analyzing trace with hash 768058421, now seen corresponding path program 1 times [2019-12-07 12:34:09,866 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:34:09,866 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1991344627] [2019-12-07 12:34:09,867 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:34:09,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:34:09,917 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:34:09,917 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1991344627] [2019-12-07 12:34:09,917 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:34:09,918 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 12:34:09,918 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1859023498] [2019-12-07 12:34:09,918 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 12:34:09,918 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:34:09,918 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:34:09,919 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:34:09,919 INFO L87 Difference]: Start difference. First operand 279 states and 500 transitions. Second operand 3 states. [2019-12-07 12:34:09,928 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:34:09,928 INFO L93 Difference]: Finished difference Result 275 states and 487 transitions. [2019-12-07 12:34:09,929 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:34:09,929 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 53 [2019-12-07 12:34:09,929 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:34:09,929 INFO L225 Difference]: With dead ends: 275 [2019-12-07 12:34:09,929 INFO L226 Difference]: Without dead ends: 275 [2019-12-07 12:34:09,930 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:34:09,931 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 275 states. [2019-12-07 12:34:09,933 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 275 to 275. [2019-12-07 12:34:09,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 275 states. [2019-12-07 12:34:09,934 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 275 states to 275 states and 487 transitions. [2019-12-07 12:34:09,934 INFO L78 Accepts]: Start accepts. Automaton has 275 states and 487 transitions. Word has length 53 [2019-12-07 12:34:09,934 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:34:09,934 INFO L462 AbstractCegarLoop]: Abstraction has 275 states and 487 transitions. [2019-12-07 12:34:09,935 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 12:34:09,935 INFO L276 IsEmpty]: Start isEmpty. Operand 275 states and 487 transitions. [2019-12-07 12:34:09,935 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 12:34:09,935 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:34:09,936 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:34:09,936 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:34:09,936 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:34:09,936 INFO L82 PathProgramCache]: Analyzing trace with hash 1826767497, now seen corresponding path program 1 times [2019-12-07 12:34:09,936 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:34:09,936 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1722873771] [2019-12-07 12:34:09,937 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:34:09,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:34:10,021 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:34:10,021 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1722873771] [2019-12-07 12:34:10,021 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:34:10,021 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 12:34:10,022 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [58472175] [2019-12-07 12:34:10,022 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 12:34:10,022 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:34:10,022 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:34:10,022 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:34:10,022 INFO L87 Difference]: Start difference. First operand 275 states and 487 transitions. Second operand 5 states. [2019-12-07 12:34:10,053 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:34:10,053 INFO L93 Difference]: Finished difference Result 455 states and 796 transitions. [2019-12-07 12:34:10,053 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:34:10,053 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 54 [2019-12-07 12:34:10,054 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:34:10,054 INFO L225 Difference]: With dead ends: 455 [2019-12-07 12:34:10,054 INFO L226 Difference]: Without dead ends: 197 [2019-12-07 12:34:10,054 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:34:10,055 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197 states. [2019-12-07 12:34:10,056 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197 to 197. [2019-12-07 12:34:10,056 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 197 states. [2019-12-07 12:34:10,056 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 197 states to 197 states and 335 transitions. [2019-12-07 12:34:10,057 INFO L78 Accepts]: Start accepts. Automaton has 197 states and 335 transitions. Word has length 54 [2019-12-07 12:34:10,057 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:34:10,057 INFO L462 AbstractCegarLoop]: Abstraction has 197 states and 335 transitions. [2019-12-07 12:34:10,057 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 12:34:10,057 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 335 transitions. [2019-12-07 12:34:10,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 12:34:10,057 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:34:10,057 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:34:10,058 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:34:10,058 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:34:10,058 INFO L82 PathProgramCache]: Analyzing trace with hash 584180705, now seen corresponding path program 2 times [2019-12-07 12:34:10,058 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:34:10,058 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1395122546] [2019-12-07 12:34:10,058 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:34:10,075 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:34:10,246 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:34:10,247 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1395122546] [2019-12-07 12:34:10,247 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:34:10,247 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 12:34:10,247 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [205118841] [2019-12-07 12:34:10,248 INFO L442 AbstractCegarLoop]: Interpolant automaton has 13 states [2019-12-07 12:34:10,248 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:34:10,248 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 12:34:10,248 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=129, Unknown=0, NotChecked=0, Total=156 [2019-12-07 12:34:10,248 INFO L87 Difference]: Start difference. First operand 197 states and 335 transitions. Second operand 13 states. [2019-12-07 12:34:10,620 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:34:10,620 INFO L93 Difference]: Finished difference Result 363 states and 608 transitions. [2019-12-07 12:34:10,620 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 12:34:10,620 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 54 [2019-12-07 12:34:10,620 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:34:10,620 INFO L225 Difference]: With dead ends: 363 [2019-12-07 12:34:10,620 INFO L226 Difference]: Without dead ends: 331 [2019-12-07 12:34:10,621 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 24 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 61 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=85, Invalid=421, Unknown=0, NotChecked=0, Total=506 [2019-12-07 12:34:10,621 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 331 states. [2019-12-07 12:34:10,623 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 331 to 297. [2019-12-07 12:34:10,623 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 297 states. [2019-12-07 12:34:10,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 297 states to 297 states and 506 transitions. [2019-12-07 12:34:10,624 INFO L78 Accepts]: Start accepts. Automaton has 297 states and 506 transitions. Word has length 54 [2019-12-07 12:34:10,624 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:34:10,624 INFO L462 AbstractCegarLoop]: Abstraction has 297 states and 506 transitions. [2019-12-07 12:34:10,624 INFO L463 AbstractCegarLoop]: Interpolant automaton has 13 states. [2019-12-07 12:34:10,624 INFO L276 IsEmpty]: Start isEmpty. Operand 297 states and 506 transitions. [2019-12-07 12:34:10,625 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 12:34:10,625 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:34:10,625 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:34:10,625 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:34:10,625 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:34:10,625 INFO L82 PathProgramCache]: Analyzing trace with hash -1111282689, now seen corresponding path program 3 times [2019-12-07 12:34:10,625 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:34:10,625 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1558054130] [2019-12-07 12:34:10,625 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:34:10,642 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:34:10,769 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:34:10,770 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1558054130] [2019-12-07 12:34:10,770 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:34:10,770 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 12:34:10,770 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1194949090] [2019-12-07 12:34:10,770 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 12:34:10,770 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:34:10,770 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 12:34:10,770 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=106, Unknown=0, NotChecked=0, Total=132 [2019-12-07 12:34:10,770 INFO L87 Difference]: Start difference. First operand 297 states and 506 transitions. Second operand 12 states. [2019-12-07 12:34:10,987 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:34:10,987 INFO L93 Difference]: Finished difference Result 399 states and 659 transitions. [2019-12-07 12:34:10,987 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-07 12:34:10,988 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 54 [2019-12-07 12:34:10,988 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 12:34:10,988 INFO L225 Difference]: With dead ends: 399 [2019-12-07 12:34:10,988 INFO L226 Difference]: Without dead ends: 367 [2019-12-07 12:34:10,988 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 53 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=72, Invalid=308, Unknown=0, NotChecked=0, Total=380 [2019-12-07 12:34:10,989 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 367 states. [2019-12-07 12:34:10,991 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 367 to 305. [2019-12-07 12:34:10,991 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 305 states. [2019-12-07 12:34:10,992 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 305 states to 305 states and 520 transitions. [2019-12-07 12:34:10,992 INFO L78 Accepts]: Start accepts. Automaton has 305 states and 520 transitions. Word has length 54 [2019-12-07 12:34:10,992 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 12:34:10,992 INFO L462 AbstractCegarLoop]: Abstraction has 305 states and 520 transitions. [2019-12-07 12:34:10,992 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 12:34:10,992 INFO L276 IsEmpty]: Start isEmpty. Operand 305 states and 520 transitions. [2019-12-07 12:34:10,993 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2019-12-07 12:34:10,993 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 12:34:10,993 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 12:34:10,993 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P1Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P1Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 12:34:10,993 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:34:10,993 INFO L82 PathProgramCache]: Analyzing trace with hash -695821945, now seen corresponding path program 4 times [2019-12-07 12:34:10,993 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:34:10,993 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [671282376] [2019-12-07 12:34:10,994 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:34:11,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:34:11,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:34:11,052 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:34:11,052 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 12:34:11,054 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [696] [696] ULTIMATE.startENTRY-->L777: Formula: (let ((.cse0 (store |v_#valid_42| 0 0))) (and (= 0 v_~x$w_buff1_used~0_344) (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t2483~0.base_19| 4)) (= v_~x$r_buff0_thd0~0_298 0) (= v_~x$r_buff0_thd1~0_128 0) (= 0 v_~weak$$choice0~0_26) (= |v_#valid_40| (store .cse0 |v_ULTIMATE.start_main_~#t2483~0.base_19| 1)) (= 0 |v_ULTIMATE.start_main_~#t2483~0.offset_16|) (= v_~x$r_buff1_thd2~0_87 0) (= v_~x$flush_delayed~0_47 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t2483~0.base_19|)) (= 0 v_~x$read_delayed_var~0.base_7) (= 0 v_~x$w_buff1~0_200) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t2483~0.base_19| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t2483~0.base_19|) |v_ULTIMATE.start_main_~#t2483~0.offset_16| 0)) |v_#memory_int_17|) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t2483~0.base_19|) (= v_~x$r_buff1_thd0~0_184 0) (= v_~y~0_77 0) (= 0 v_~x$w_buff0_used~0_631) (= v_~x$mem_tmp~0_31 0) (= 0 v_~x$read_delayed~0_7) (= v_~main$tmp_guard1~0_19 0) (= |v_#NULL.offset_5| 0) (= 0 v_~x$r_buff0_thd2~0_137) (= 0 v_~x~0_143) (= v_~weak$$choice2~0_101 0) (= v_~x$r_buff1_thd1~0_135 0) (= 0 v_~__unbuffered_cnt~0_59) (= 0 v_~x$read_delayed_var~0.offset_7) (= v_~main$tmp_guard0~0_24 0) (= 0 |v_#NULL.base_5|) (= 0 v_~x$w_buff0~0_255) (< 0 |v_#StackHeapBarrier_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_18|, #length=|v_#length_20|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_255, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_36|, ~x$flush_delayed~0=v_~x$flush_delayed~0_47, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_27|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_135, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_31|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_35|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_57|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_36|, ULTIMATE.start_main_~#t2484~0.offset=|v_ULTIMATE.start_main_~#t2484~0.offset_16|, #length=|v_#length_19|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_298, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_30|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_25|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_45|, ~x$w_buff1~0=v_~x$w_buff1~0_200, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_25|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_344, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_87, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_38|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_38|, ULTIMATE.start_main_~#t2483~0.base=|v_ULTIMATE.start_main_~#t2483~0.base_19|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_28|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ~weak$$choice0~0=v_~weak$$choice0~0_26, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_25|, ULTIMATE.start_main_~#t2484~0.base=|v_ULTIMATE.start_main_~#t2484~0.base_20|, ULTIMATE.start_main_~#t2483~0.offset=|v_ULTIMATE.start_main_~#t2483~0.offset_16|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_59, ~x~0=v_~x~0_143, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_128, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_23|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_29|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_19, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_38|, ~x$mem_tmp~0=v_~x$mem_tmp~0_31, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_27|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_39|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_21|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_40|, ~y~0=v_~y~0_77, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_29|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_45|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_25|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_33|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_29|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_184, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_137, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_27|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_30|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_631, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_25|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_16|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_16|, ~weak$$choice2~0=v_~weak$$choice2~0_101, ~x$read_delayed~0=v_~x$read_delayed~0_7} AuxVars[] AssignedVars[~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, #NULL.offset, ULTIMATE.start_main_#t~ite26, ~x$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t2484~0.offset, #length, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_~#t2483~0.base, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_~#t2484~0.base, ULTIMATE.start_main_~#t2483~0.offset, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ~y~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 12:34:11,055 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [671] [671] L777-1-->L779: Formula: (and (= |v_#length_11| (store |v_#length_12| |v_ULTIMATE.start_main_~#t2484~0.base_10| 4)) (= 0 |v_ULTIMATE.start_main_~#t2484~0.offset_9|) (= |v_#valid_21| (store |v_#valid_22| |v_ULTIMATE.start_main_~#t2484~0.base_10| 1)) (< |v_#StackHeapBarrier_7| |v_ULTIMATE.start_main_~#t2484~0.base_10|) (= 0 (select |v_#valid_22| |v_ULTIMATE.start_main_~#t2484~0.base_10|)) (not (= 0 |v_ULTIMATE.start_main_~#t2484~0.base_10|)) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t2484~0.base_10| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t2484~0.base_10|) |v_ULTIMATE.start_main_~#t2484~0.offset_9| 1)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_7|, #valid=|v_#valid_22|, #memory_int=|v_#memory_int_10|, #length=|v_#length_12|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_7|, ULTIMATE.start_main_~#t2484~0.base=|v_ULTIMATE.start_main_~#t2484~0.base_10|, ULTIMATE.start_main_~#t2484~0.offset=|v_ULTIMATE.start_main_~#t2484~0.offset_9|, #valid=|v_#valid_21|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2484~0.base, ULTIMATE.start_main_~#t2484~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length] because there is no mapped edge [2019-12-07 12:34:11,055 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] P1ENTRY-->L4-3: Formula: (and (= ~x$w_buff0~0_In-2099130540 ~x$w_buff1~0_Out-2099130540) (= 2 ~x$w_buff0~0_Out-2099130540) (= ~x$w_buff1_used~0_Out-2099130540 ~x$w_buff0_used~0_In-2099130540) (= |P1Thread1of1ForFork1_#in~arg.base_In-2099130540| P1Thread1of1ForFork1_~arg.base_Out-2099130540) (= P1Thread1of1ForFork1_~arg.offset_Out-2099130540 |P1Thread1of1ForFork1_#in~arg.offset_In-2099130540|) (= P1Thread1of1ForFork1___VERIFIER_assert_~expression_Out-2099130540 |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_Out-2099130540|) (= (ite (not (and (not (= (mod ~x$w_buff0_used~0_Out-2099130540 256) 0)) (not (= (mod ~x$w_buff1_used~0_Out-2099130540 256) 0)))) 1 0) |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_Out-2099130540|) (= 1 ~x$w_buff0_used~0_Out-2099130540) (not (= 0 P1Thread1of1ForFork1___VERIFIER_assert_~expression_Out-2099130540))) InVars {~x$w_buff0~0=~x$w_buff0~0_In-2099130540, P1Thread1of1ForFork1_#in~arg.base=|P1Thread1of1ForFork1_#in~arg.base_In-2099130540|, P1Thread1of1ForFork1_#in~arg.offset=|P1Thread1of1ForFork1_#in~arg.offset_In-2099130540|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2099130540} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=P1Thread1of1ForFork1___VERIFIER_assert_~expression_Out-2099130540, ~x$w_buff0~0=~x$w_buff0~0_Out-2099130540, P1Thread1of1ForFork1_~arg.offset=P1Thread1of1ForFork1_~arg.offset_Out-2099130540, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_Out-2099130540|, P1Thread1of1ForFork1_~arg.base=P1Thread1of1ForFork1_~arg.base_Out-2099130540, ~x$w_buff1~0=~x$w_buff1~0_Out-2099130540, P1Thread1of1ForFork1_#in~arg.base=|P1Thread1of1ForFork1_#in~arg.base_In-2099130540|, P1Thread1of1ForFork1_#in~arg.offset=|P1Thread1of1ForFork1_#in~arg.offset_In-2099130540|, ~x$w_buff1_used~0=~x$w_buff1_used~0_Out-2099130540, ~x$w_buff0_used~0=~x$w_buff0_used~0_Out-2099130540} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$w_buff0~0, P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 12:34:11,056 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [641] [641] L726-2-->L726-5: Formula: (let ((.cse0 (= (mod ~x$r_buff1_thd1~0_In-780269282 256) 0)) (.cse2 (= |P0Thread1of1ForFork0_#t~ite3_Out-780269282| |P0Thread1of1ForFork0_#t~ite4_Out-780269282|)) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In-780269282 256)))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork0_#t~ite3_Out-780269282| ~x~0_In-780269282) .cse2) (and (= |P0Thread1of1ForFork0_#t~ite3_Out-780269282| ~x$w_buff1~0_In-780269282) (not .cse0) .cse2 (not .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-780269282, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-780269282, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-780269282, ~x~0=~x~0_In-780269282} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out-780269282|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out-780269282|, ~x$w_buff1~0=~x$w_buff1~0_In-780269282, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-780269282, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-780269282, ~x~0=~x~0_In-780269282} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-12-07 12:34:11,056 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [654] [654] L755-->L755-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-844217014 256))) (.cse0 (= (mod ~x$r_buff0_thd2~0_In-844217014 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out-844217014|)) (and (= ~x$w_buff0_used~0_In-844217014 |P1Thread1of1ForFork1_#t~ite11_Out-844217014|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-844217014, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-844217014} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-844217014|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-844217014, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-844217014} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 12:34:11,057 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L727-->L727-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In591213331 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In591213331 256)))) (or (and (= ~x$w_buff0_used~0_In591213331 |P0Thread1of1ForFork0_#t~ite5_Out591213331|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out591213331|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In591213331, ~x$w_buff0_used~0=~x$w_buff0_used~0_In591213331} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out591213331|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In591213331, ~x$w_buff0_used~0=~x$w_buff0_used~0_In591213331} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 12:34:11,057 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L728-->L728-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff1_thd1~0_In-16643669 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In-16643669 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In-16643669 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In-16643669 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out-16643669|)) (and (= ~x$w_buff1_used~0_In-16643669 |P0Thread1of1ForFork0_#t~ite6_Out-16643669|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-16643669, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-16643669, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-16643669, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-16643669} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-16643669|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-16643669, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-16643669, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-16643669, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-16643669} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 12:34:11,057 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L729-->L729-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In258004879 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In258004879 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite7_Out258004879| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~x$r_buff0_thd1~0_In258004879 |P0Thread1of1ForFork0_#t~ite7_Out258004879|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In258004879, ~x$w_buff0_used~0=~x$w_buff0_used~0_In258004879} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In258004879, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out258004879|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In258004879} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 12:34:11,058 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [638] [638] L730-->L730-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1710265932 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In-1710265932 256))) (.cse2 (= 0 (mod ~x$r_buff1_thd1~0_In-1710265932 256))) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In-1710265932 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite8_Out-1710265932| 0)) (and (or .cse1 .cse0) (or .cse2 .cse3) (= |P0Thread1of1ForFork0_#t~ite8_Out-1710265932| ~x$r_buff1_thd1~0_In-1710265932)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1710265932, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1710265932, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1710265932, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1710265932} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1710265932, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-1710265932|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1710265932, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1710265932, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1710265932} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 12:34:11,058 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [672] [672] L730-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_43 1) v_~__unbuffered_cnt~0_42) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~x$r_buff1_thd1~0_79 |v_P0Thread1of1ForFork0_#t~ite8_34|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_43} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_33|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_42, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_79} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 12:34:11,058 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [636] [636] L756-->L756-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In-684787689 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd2~0_In-684787689 256))) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In-684787689 256))) (.cse3 (= (mod ~x$r_buff0_thd2~0_In-684787689 256) 0))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite12_Out-684787689|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~x$w_buff1_used~0_In-684787689 |P1Thread1of1ForFork1_#t~ite12_Out-684787689|) (or .cse2 .cse3)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-684787689, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-684787689, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-684787689, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-684787689} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-684787689, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-684787689, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-684787689|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-684787689, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-684787689} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 12:34:11,058 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [653] [653] L757-->L758: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In1369065793 256) 0)) (.cse1 (= ~x$r_buff0_thd2~0_Out1369065793 ~x$r_buff0_thd2~0_In1369065793)) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In1369065793 256)))) (or (and .cse0 .cse1) (and (= ~x$r_buff0_thd2~0_Out1369065793 0) (not .cse2) (not .cse0)) (and .cse1 .cse2))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1369065793, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1369065793} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out1369065793|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out1369065793, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1369065793} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 12:34:11,058 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [639] [639] L758-->L758-2: Formula: (let ((.cse3 (= (mod ~x$r_buff0_thd2~0_In1150307447 256) 0)) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In1150307447 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd2~0_In1150307447 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In1150307447 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite14_Out1150307447| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite14_Out1150307447| ~x$r_buff1_thd2~0_In1150307447)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1150307447, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1150307447, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1150307447, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1150307447} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1150307447, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1150307447, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1150307447, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out1150307447|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1150307447} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 12:34:11,058 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [662] [662] L758-2-->P1EXIT: Formula: (and (= v_~__unbuffered_cnt~0_32 (+ v_~__unbuffered_cnt~0_33 1)) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~x$r_buff1_thd2~0_45 |v_P1Thread1of1ForFork1_#t~ite14_28|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_33, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_28|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_45, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_27|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 12:34:11,059 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [585] [585] L783-->L785-2: Formula: (and (or (= (mod v_~x$w_buff0_used~0_91 256) 0) (= (mod v_~x$r_buff0_thd0~0_49 256) 0)) (not (= (mod v_~main$tmp_guard0~0_8 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_49, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_91} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_49, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_91} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 12:34:11,059 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [649] [649] L785-2-->L785-4: Formula: (let ((.cse0 (= (mod ~x$w_buff1_used~0_In-362765357 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd0~0_In-362765357 256)))) (or (and (= ~x~0_In-362765357 |ULTIMATE.start_main_#t~ite17_Out-362765357|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite17_Out-362765357| ~x$w_buff1~0_In-362765357)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-362765357, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-362765357, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-362765357, ~x~0=~x~0_In-362765357} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out-362765357|, ~x$w_buff1~0=~x$w_buff1~0_In-362765357, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-362765357, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-362765357, ~x~0=~x~0_In-362765357} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17] because there is no mapped edge [2019-12-07 12:34:11,059 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [609] [609] L785-4-->L786: Formula: (= v_~x~0_39 |v_ULTIMATE.start_main_#t~ite17_8|) InVars {ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_8|} OutVars{ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_7|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_8|, ~x~0=v_~x~0_39} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18, ~x~0] because there is no mapped edge [2019-12-07 12:34:11,059 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [650] [650] L786-->L786-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1690805159 256))) (.cse0 (= (mod ~x$r_buff0_thd0~0_In-1690805159 256) 0))) (or (and (= ~x$w_buff0_used~0_In-1690805159 |ULTIMATE.start_main_#t~ite19_Out-1690805159|) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite19_Out-1690805159| 0) (not .cse1) (not .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1690805159, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1690805159} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1690805159, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1690805159|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1690805159} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 12:34:11,059 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L787-->L787-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1368212079 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-1368212079 256))) (.cse3 (= (mod ~x$r_buff1_thd0~0_In-1368212079 256) 0)) (.cse2 (= (mod ~x$w_buff1_used~0_In-1368212079 256) 0))) (or (and (or .cse0 .cse1) (= ~x$w_buff1_used~0_In-1368212079 |ULTIMATE.start_main_#t~ite20_Out-1368212079|) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |ULTIMATE.start_main_#t~ite20_Out-1368212079|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1368212079, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1368212079, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1368212079, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1368212079} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1368212079, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1368212079, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-1368212079|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1368212079, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1368212079} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 12:34:11,060 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [645] [645] L788-->L788-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-332535995 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In-332535995 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite21_Out-332535995| 0)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite21_Out-332535995| ~x$r_buff0_thd0~0_In-332535995)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-332535995, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-332535995} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-332535995, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-332535995|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-332535995} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 12:34:11,060 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [640] [640] L789-->L789-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In1487837072 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In1487837072 256))) (.cse3 (= (mod ~x$w_buff0_used~0_In1487837072 256) 0)) (.cse2 (= 0 (mod ~x$r_buff0_thd0~0_In1487837072 256)))) (or (and (= |ULTIMATE.start_main_#t~ite22_Out1487837072| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~x$r_buff1_thd0~0_In1487837072 |ULTIMATE.start_main_#t~ite22_Out1487837072|) (or .cse3 .cse2)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1487837072, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1487837072, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1487837072, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1487837072} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1487837072, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1487837072, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1487837072, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out1487837072|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1487837072} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 12:34:11,061 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L800-->L800-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-778828099 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite37_In-778828099| |ULTIMATE.start_main_#t~ite37_Out-778828099|) (= ~x$w_buff1_used~0_In-778828099 |ULTIMATE.start_main_#t~ite38_Out-778828099|) (not .cse0)) (and (= ~x$w_buff1_used~0_In-778828099 |ULTIMATE.start_main_#t~ite37_Out-778828099|) (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In-778828099 256) 0))) (or (and (= (mod ~x$w_buff1_used~0_In-778828099 256) 0) .cse1) (= 0 (mod ~x$w_buff0_used~0_In-778828099 256)) (and (= 0 (mod ~x$r_buff1_thd0~0_In-778828099 256)) .cse1))) .cse0 (= |ULTIMATE.start_main_#t~ite37_Out-778828099| |ULTIMATE.start_main_#t~ite38_Out-778828099|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-778828099, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-778828099, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_In-778828099|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-778828099, ~weak$$choice2~0=~weak$$choice2~0_In-778828099, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-778828099} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-778828099, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-778828099, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out-778828099|, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_Out-778828099|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-778828099, ~weak$$choice2~0=~weak$$choice2~0_In-778828099, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-778828099} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_#t~ite37] because there is no mapped edge [2019-12-07 12:34:11,061 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [590] [590] L801-->L802: Formula: (and (= v_~x$r_buff0_thd0~0_57 v_~x$r_buff0_thd0~0_56) (not (= (mod v_~weak$$choice2~0_21 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_57, ~weak$$choice2~0=v_~weak$$choice2~0_21} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_56, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_7|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_8|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_7|, ~weak$$choice2~0=v_~weak$$choice2~0_21} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-07 12:34:11,062 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [664] [664] L804-->L4: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6| (mod v_~main$tmp_guard1~0_10 256)) (= v_~x~0_75 v_~x$mem_tmp~0_14) (= v_~x$flush_delayed~0_25 0) (not (= (mod v_~x$flush_delayed~0_26 256) 0))) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_26, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_10, ~x$mem_tmp~0=v_~x$mem_tmp~0_14} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_8, ~x$flush_delayed~0=v_~x$flush_delayed~0_25, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_10, ~x$mem_tmp~0=v_~x$mem_tmp~0_14, ~x~0=v_~x~0_75, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_21|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~x$flush_delayed~0, ~x~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 12:34:11,062 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [669] [669] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 12:34:11,101 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 12:34:11 BasicIcfg [2019-12-07 12:34:11,101 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 12:34:11,101 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 12:34:11,101 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 12:34:11,101 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 12:34:11,102 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:34:03" (3/4) ... [2019-12-07 12:34:11,103 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 12:34:11,103 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [696] [696] ULTIMATE.startENTRY-->L777: Formula: (let ((.cse0 (store |v_#valid_42| 0 0))) (and (= 0 v_~x$w_buff1_used~0_344) (= |v_#length_19| (store |v_#length_20| |v_ULTIMATE.start_main_~#t2483~0.base_19| 4)) (= v_~x$r_buff0_thd0~0_298 0) (= v_~x$r_buff0_thd1~0_128 0) (= 0 v_~weak$$choice0~0_26) (= |v_#valid_40| (store .cse0 |v_ULTIMATE.start_main_~#t2483~0.base_19| 1)) (= 0 |v_ULTIMATE.start_main_~#t2483~0.offset_16|) (= v_~x$r_buff1_thd2~0_87 0) (= v_~x$flush_delayed~0_47 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t2483~0.base_19|)) (= 0 v_~x$read_delayed_var~0.base_7) (= 0 v_~x$w_buff1~0_200) (= (store |v_#memory_int_18| |v_ULTIMATE.start_main_~#t2483~0.base_19| (store (select |v_#memory_int_18| |v_ULTIMATE.start_main_~#t2483~0.base_19|) |v_ULTIMATE.start_main_~#t2483~0.offset_16| 0)) |v_#memory_int_17|) (< |v_#StackHeapBarrier_13| |v_ULTIMATE.start_main_~#t2483~0.base_19|) (= v_~x$r_buff1_thd0~0_184 0) (= v_~y~0_77 0) (= 0 v_~x$w_buff0_used~0_631) (= v_~x$mem_tmp~0_31 0) (= 0 v_~x$read_delayed~0_7) (= v_~main$tmp_guard1~0_19 0) (= |v_#NULL.offset_5| 0) (= 0 v_~x$r_buff0_thd2~0_137) (= 0 v_~x~0_143) (= v_~weak$$choice2~0_101 0) (= v_~x$r_buff1_thd1~0_135 0) (= 0 v_~__unbuffered_cnt~0_59) (= 0 v_~x$read_delayed_var~0.offset_7) (= v_~main$tmp_guard0~0_24 0) (= 0 |v_#NULL.base_5|) (= 0 v_~x$w_buff0~0_255) (< 0 |v_#StackHeapBarrier_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_13|, #valid=|v_#valid_42|, #memory_int=|v_#memory_int_18|, #length=|v_#length_20|} OutVars{~x$w_buff0~0=v_~x$w_buff0~0_255, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_36|, ~x$flush_delayed~0=v_~x$flush_delayed~0_47, #NULL.offset=|v_#NULL.offset_5|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_27|, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_135, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_31|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_35|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_57|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_36|, ULTIMATE.start_main_~#t2484~0.offset=|v_ULTIMATE.start_main_~#t2484~0.offset_16|, #length=|v_#length_19|, ~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_298, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_30|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_25|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_45|, ~x$w_buff1~0=v_~x$w_buff1~0_200, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_25|, ~x$w_buff1_used~0=v_~x$w_buff1_used~0_344, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_87, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_38|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_38|, ULTIMATE.start_main_~#t2483~0.base=|v_ULTIMATE.start_main_~#t2483~0.base_19|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_28|, ~x$read_delayed_var~0.base=v_~x$read_delayed_var~0.base_7, ~weak$$choice0~0=v_~weak$$choice0~0_26, #StackHeapBarrier=|v_#StackHeapBarrier_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_25|, ULTIMATE.start_main_~#t2484~0.base=|v_ULTIMATE.start_main_~#t2484~0.base_20|, ULTIMATE.start_main_~#t2483~0.offset=|v_ULTIMATE.start_main_~#t2483~0.offset_16|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_9|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_59, ~x~0=v_~x~0_143, ~x$r_buff0_thd1~0=v_~x$r_buff0_thd1~0_128, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_23|, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_29|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_19, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_38|, ~x$mem_tmp~0=v_~x$mem_tmp~0_31, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_27|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_39|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_21|, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_40|, ~y~0=v_~y~0_77, ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_29|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_45|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_25|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_33|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_29|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_24, ~x$r_buff1_thd0~0=v_~x$r_buff1_thd0~0_184, ~x$r_buff0_thd2~0=v_~x$r_buff0_thd2~0_137, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_27|, #NULL.base=|v_#NULL.base_5|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_30|, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_631, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_25|, ~x$read_delayed_var~0.offset=v_~x$read_delayed_var~0.offset_7, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_16|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_17|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_16|, ~weak$$choice2~0=v_~weak$$choice2~0_101, ~x$read_delayed~0=v_~x$read_delayed~0_7} AuxVars[] AssignedVars[~x$w_buff0~0, ULTIMATE.start_main_#t~ite28, ~x$flush_delayed~0, #NULL.offset, ULTIMATE.start_main_#t~ite26, ~x$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_~#t2484~0.offset, #length, ~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ~x$w_buff1~0, ULTIMATE.start_main_#t~ite35, ~x$w_buff1_used~0, ~x$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_~#t2483~0.base, ULTIMATE.start_main_#t~ite33, ~x$read_delayed_var~0.base, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_~#t2484~0.base, ULTIMATE.start_main_~#t2483~0.offset, ULTIMATE.start_main_#t~nondet15, ~__unbuffered_cnt~0, ~x~0, ~x$r_buff0_thd1~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite25, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ~x$mem_tmp~0, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite30, ~y~0, ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~nondet23, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ~x$r_buff1_thd0~0, ~x$r_buff0_thd2~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~x$w_buff0_used~0, ULTIMATE.start_main_#t~ite41, ~x$read_delayed_var~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~weak$$choice2~0, ~x$read_delayed~0] because there is no mapped edge [2019-12-07 12:34:11,104 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [671] [671] L777-1-->L779: Formula: (and (= |v_#length_11| (store |v_#length_12| |v_ULTIMATE.start_main_~#t2484~0.base_10| 4)) (= 0 |v_ULTIMATE.start_main_~#t2484~0.offset_9|) (= |v_#valid_21| (store |v_#valid_22| |v_ULTIMATE.start_main_~#t2484~0.base_10| 1)) (< |v_#StackHeapBarrier_7| |v_ULTIMATE.start_main_~#t2484~0.base_10|) (= 0 (select |v_#valid_22| |v_ULTIMATE.start_main_~#t2484~0.base_10|)) (not (= 0 |v_ULTIMATE.start_main_~#t2484~0.base_10|)) (= |v_#memory_int_9| (store |v_#memory_int_10| |v_ULTIMATE.start_main_~#t2484~0.base_10| (store (select |v_#memory_int_10| |v_ULTIMATE.start_main_~#t2484~0.base_10|) |v_ULTIMATE.start_main_~#t2484~0.offset_9| 1)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_7|, #valid=|v_#valid_22|, #memory_int=|v_#memory_int_10|, #length=|v_#length_12|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_7|, ULTIMATE.start_main_~#t2484~0.base=|v_ULTIMATE.start_main_~#t2484~0.base_10|, ULTIMATE.start_main_~#t2484~0.offset=|v_ULTIMATE.start_main_~#t2484~0.offset_9|, #valid=|v_#valid_21|, #memory_int=|v_#memory_int_9|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2484~0.base, ULTIMATE.start_main_~#t2484~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length] because there is no mapped edge [2019-12-07 12:34:11,104 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] P1ENTRY-->L4-3: Formula: (and (= ~x$w_buff0~0_In-2099130540 ~x$w_buff1~0_Out-2099130540) (= 2 ~x$w_buff0~0_Out-2099130540) (= ~x$w_buff1_used~0_Out-2099130540 ~x$w_buff0_used~0_In-2099130540) (= |P1Thread1of1ForFork1_#in~arg.base_In-2099130540| P1Thread1of1ForFork1_~arg.base_Out-2099130540) (= P1Thread1of1ForFork1_~arg.offset_Out-2099130540 |P1Thread1of1ForFork1_#in~arg.offset_In-2099130540|) (= P1Thread1of1ForFork1___VERIFIER_assert_~expression_Out-2099130540 |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_Out-2099130540|) (= (ite (not (and (not (= (mod ~x$w_buff0_used~0_Out-2099130540 256) 0)) (not (= (mod ~x$w_buff1_used~0_Out-2099130540 256) 0)))) 1 0) |P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_Out-2099130540|) (= 1 ~x$w_buff0_used~0_Out-2099130540) (not (= 0 P1Thread1of1ForFork1___VERIFIER_assert_~expression_Out-2099130540))) InVars {~x$w_buff0~0=~x$w_buff0~0_In-2099130540, P1Thread1of1ForFork1_#in~arg.base=|P1Thread1of1ForFork1_#in~arg.base_In-2099130540|, P1Thread1of1ForFork1_#in~arg.offset=|P1Thread1of1ForFork1_#in~arg.offset_In-2099130540|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-2099130540} OutVars{P1Thread1of1ForFork1___VERIFIER_assert_~expression=P1Thread1of1ForFork1___VERIFIER_assert_~expression_Out-2099130540, ~x$w_buff0~0=~x$w_buff0~0_Out-2099130540, P1Thread1of1ForFork1_~arg.offset=P1Thread1of1ForFork1_~arg.offset_Out-2099130540, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression=|P1Thread1of1ForFork1___VERIFIER_assert_#in~expression_Out-2099130540|, P1Thread1of1ForFork1_~arg.base=P1Thread1of1ForFork1_~arg.base_Out-2099130540, ~x$w_buff1~0=~x$w_buff1~0_Out-2099130540, P1Thread1of1ForFork1_#in~arg.base=|P1Thread1of1ForFork1_#in~arg.base_In-2099130540|, P1Thread1of1ForFork1_#in~arg.offset=|P1Thread1of1ForFork1_#in~arg.offset_In-2099130540|, ~x$w_buff1_used~0=~x$w_buff1_used~0_Out-2099130540, ~x$w_buff0_used~0=~x$w_buff0_used~0_Out-2099130540} AuxVars[] AssignedVars[P1Thread1of1ForFork1___VERIFIER_assert_~expression, ~x$w_buff0~0, P1Thread1of1ForFork1_~arg.offset, P1Thread1of1ForFork1___VERIFIER_assert_#in~expression, P1Thread1of1ForFork1_~arg.base, ~x$w_buff1~0, ~x$w_buff1_used~0, ~x$w_buff0_used~0] because there is no mapped edge [2019-12-07 12:34:11,105 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [641] [641] L726-2-->L726-5: Formula: (let ((.cse0 (= (mod ~x$r_buff1_thd1~0_In-780269282 256) 0)) (.cse2 (= |P0Thread1of1ForFork0_#t~ite3_Out-780269282| |P0Thread1of1ForFork0_#t~ite4_Out-780269282|)) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In-780269282 256)))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork0_#t~ite3_Out-780269282| ~x~0_In-780269282) .cse2) (and (= |P0Thread1of1ForFork0_#t~ite3_Out-780269282| ~x$w_buff1~0_In-780269282) (not .cse0) .cse2 (not .cse1)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-780269282, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-780269282, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-780269282, ~x~0=~x~0_In-780269282} OutVars{P0Thread1of1ForFork0_#t~ite3=|P0Thread1of1ForFork0_#t~ite3_Out-780269282|, P0Thread1of1ForFork0_#t~ite4=|P0Thread1of1ForFork0_#t~ite4_Out-780269282|, ~x$w_buff1~0=~x$w_buff1~0_In-780269282, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-780269282, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-780269282, ~x~0=~x~0_In-780269282} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite3, P0Thread1of1ForFork0_#t~ite4] because there is no mapped edge [2019-12-07 12:34:11,127 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [654] [654] L755-->L755-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-844217014 256))) (.cse0 (= (mod ~x$r_buff0_thd2~0_In-844217014 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out-844217014|)) (and (= ~x$w_buff0_used~0_In-844217014 |P1Thread1of1ForFork1_#t~ite11_Out-844217014|) (or .cse1 .cse0)))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-844217014, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-844217014} OutVars{P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out-844217014|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-844217014, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-844217014} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 12:34:11,128 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [648] [648] L727-->L727-2: Formula: (let ((.cse1 (= (mod ~x$r_buff0_thd1~0_In591213331 256) 0)) (.cse0 (= 0 (mod ~x$w_buff0_used~0_In591213331 256)))) (or (and (= ~x$w_buff0_used~0_In591213331 |P0Thread1of1ForFork0_#t~ite5_Out591213331|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out591213331|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In591213331, ~x$w_buff0_used~0=~x$w_buff0_used~0_In591213331} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out591213331|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In591213331, ~x$w_buff0_used~0=~x$w_buff0_used~0_In591213331} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 12:34:11,128 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [652] [652] L728-->L728-2: Formula: (let ((.cse3 (= 0 (mod ~x$r_buff1_thd1~0_In-16643669 256))) (.cse2 (= 0 (mod ~x$w_buff1_used~0_In-16643669 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In-16643669 256))) (.cse1 (= (mod ~x$w_buff0_used~0_In-16643669 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P0Thread1of1ForFork0_#t~ite6_Out-16643669|)) (and (= ~x$w_buff1_used~0_In-16643669 |P0Thread1of1ForFork0_#t~ite6_Out-16643669|) (or .cse3 .cse2) (or .cse0 .cse1)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-16643669, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-16643669, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-16643669, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-16643669} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-16643669|, ~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-16643669, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-16643669, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-16643669, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-16643669} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 12:34:11,128 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [643] [643] L729-->L729-2: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In258004879 256) 0)) (.cse1 (= 0 (mod ~x$r_buff0_thd1~0_In258004879 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite7_Out258004879| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~x$r_buff0_thd1~0_In258004879 |P0Thread1of1ForFork0_#t~ite7_Out258004879|)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In258004879, ~x$w_buff0_used~0=~x$w_buff0_used~0_In258004879} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In258004879, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out258004879|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In258004879} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7] because there is no mapped edge [2019-12-07 12:34:11,128 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [638] [638] L730-->L730-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1710265932 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd1~0_In-1710265932 256))) (.cse2 (= 0 (mod ~x$r_buff1_thd1~0_In-1710265932 256))) (.cse3 (= 0 (mod ~x$w_buff1_used~0_In-1710265932 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite8_Out-1710265932| 0)) (and (or .cse1 .cse0) (or .cse2 .cse3) (= |P0Thread1of1ForFork0_#t~ite8_Out-1710265932| ~x$r_buff1_thd1~0_In-1710265932)))) InVars {~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1710265932, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1710265932, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1710265932, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1710265932} OutVars{~x$r_buff0_thd1~0=~x$r_buff0_thd1~0_In-1710265932, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-1710265932|, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1710265932, ~x$r_buff1_thd1~0=~x$r_buff1_thd1~0_In-1710265932, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1710265932} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 12:34:11,128 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [672] [672] L730-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= (+ v_~__unbuffered_cnt~0_43 1) v_~__unbuffered_cnt~0_42) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= v_~x$r_buff1_thd1~0_79 |v_P0Thread1of1ForFork0_#t~ite8_34|)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_43} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_33|, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_42, ~x$r_buff1_thd1~0=v_~x$r_buff1_thd1~0_79} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, ~x$r_buff1_thd1~0] because there is no mapped edge [2019-12-07 12:34:11,129 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [636] [636] L756-->L756-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff1_used~0_In-684787689 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd2~0_In-684787689 256))) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In-684787689 256))) (.cse3 (= (mod ~x$r_buff0_thd2~0_In-684787689 256) 0))) (or (and (= 0 |P1Thread1of1ForFork1_#t~ite12_Out-684787689|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~x$w_buff1_used~0_In-684787689 |P1Thread1of1ForFork1_#t~ite12_Out-684787689|) (or .cse2 .cse3)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In-684787689, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-684787689, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-684787689, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-684787689} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In-684787689, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In-684787689, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-684787689|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In-684787689, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-684787689} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 12:34:11,129 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [653] [653] L757-->L758: Formula: (let ((.cse0 (= (mod ~x$w_buff0_used~0_In1369065793 256) 0)) (.cse1 (= ~x$r_buff0_thd2~0_Out1369065793 ~x$r_buff0_thd2~0_In1369065793)) (.cse2 (= 0 (mod ~x$r_buff0_thd2~0_In1369065793 256)))) (or (and .cse0 .cse1) (and (= ~x$r_buff0_thd2~0_Out1369065793 0) (not .cse2) (not .cse0)) (and .cse1 .cse2))) InVars {~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1369065793, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1369065793} OutVars{P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out1369065793|, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_Out1369065793, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1369065793} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13, ~x$r_buff0_thd2~0] because there is no mapped edge [2019-12-07 12:34:11,129 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [639] [639] L758-->L758-2: Formula: (let ((.cse3 (= (mod ~x$r_buff0_thd2~0_In1150307447 256) 0)) (.cse2 (= 0 (mod ~x$w_buff0_used~0_In1150307447 256))) (.cse1 (= 0 (mod ~x$r_buff1_thd2~0_In1150307447 256))) (.cse0 (= 0 (mod ~x$w_buff1_used~0_In1150307447 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite14_Out1150307447| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite14_Out1150307447| ~x$r_buff1_thd2~0_In1150307447)))) InVars {~x$w_buff1_used~0=~x$w_buff1_used~0_In1150307447, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1150307447, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1150307447, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1150307447} OutVars{~x$w_buff1_used~0=~x$w_buff1_used~0_In1150307447, ~x$r_buff1_thd2~0=~x$r_buff1_thd2~0_In1150307447, ~x$r_buff0_thd2~0=~x$r_buff0_thd2~0_In1150307447, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out1150307447|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1150307447} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 12:34:11,129 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [662] [662] L758-2-->P1EXIT: Formula: (and (= v_~__unbuffered_cnt~0_32 (+ v_~__unbuffered_cnt~0_33 1)) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= v_~x$r_buff1_thd2~0_45 |v_P1Thread1of1ForFork1_#t~ite14_28|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_33, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_28|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~x$r_buff1_thd2~0=v_~x$r_buff1_thd2~0_45, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_32, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_27|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~x$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 12:34:11,129 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [585] [585] L783-->L785-2: Formula: (and (or (= (mod v_~x$w_buff0_used~0_91 256) 0) (= (mod v_~x$r_buff0_thd0~0_49 256) 0)) (not (= (mod v_~main$tmp_guard0~0_8 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_49, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_91} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_49, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_8, ~x$w_buff0_used~0=v_~x$w_buff0_used~0_91} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 12:34:11,130 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [649] [649] L785-2-->L785-4: Formula: (let ((.cse0 (= (mod ~x$w_buff1_used~0_In-362765357 256) 0)) (.cse1 (= 0 (mod ~x$r_buff1_thd0~0_In-362765357 256)))) (or (and (= ~x~0_In-362765357 |ULTIMATE.start_main_#t~ite17_Out-362765357|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite17_Out-362765357| ~x$w_buff1~0_In-362765357)))) InVars {~x$w_buff1~0=~x$w_buff1~0_In-362765357, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-362765357, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-362765357, ~x~0=~x~0_In-362765357} OutVars{ULTIMATE.start_main_#t~ite17=|ULTIMATE.start_main_#t~ite17_Out-362765357|, ~x$w_buff1~0=~x$w_buff1~0_In-362765357, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-362765357, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-362765357, ~x~0=~x~0_In-362765357} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17] because there is no mapped edge [2019-12-07 12:34:11,130 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [609] [609] L785-4-->L786: Formula: (= v_~x~0_39 |v_ULTIMATE.start_main_#t~ite17_8|) InVars {ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_8|} OutVars{ULTIMATE.start_main_#t~ite17=|v_ULTIMATE.start_main_#t~ite17_7|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_8|, ~x~0=v_~x~0_39} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite17, ULTIMATE.start_main_#t~ite18, ~x~0] because there is no mapped edge [2019-12-07 12:34:11,130 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [650] [650] L786-->L786-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-1690805159 256))) (.cse0 (= (mod ~x$r_buff0_thd0~0_In-1690805159 256) 0))) (or (and (= ~x$w_buff0_used~0_In-1690805159 |ULTIMATE.start_main_#t~ite19_Out-1690805159|) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite19_Out-1690805159| 0) (not .cse1) (not .cse0)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1690805159, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1690805159} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1690805159, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out-1690805159|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1690805159} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 12:34:11,130 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [656] [656] L787-->L787-2: Formula: (let ((.cse0 (= 0 (mod ~x$w_buff0_used~0_In-1368212079 256))) (.cse1 (= 0 (mod ~x$r_buff0_thd0~0_In-1368212079 256))) (.cse3 (= (mod ~x$r_buff1_thd0~0_In-1368212079 256) 0)) (.cse2 (= (mod ~x$w_buff1_used~0_In-1368212079 256) 0))) (or (and (or .cse0 .cse1) (= ~x$w_buff1_used~0_In-1368212079 |ULTIMATE.start_main_#t~ite20_Out-1368212079|) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |ULTIMATE.start_main_#t~ite20_Out-1368212079|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1368212079, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1368212079, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1368212079, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1368212079} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-1368212079, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-1368212079, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out-1368212079|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-1368212079, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-1368212079} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 12:34:11,130 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [645] [645] L788-->L788-2: Formula: (let ((.cse1 (= 0 (mod ~x$w_buff0_used~0_In-332535995 256))) (.cse0 (= 0 (mod ~x$r_buff0_thd0~0_In-332535995 256)))) (or (and (not .cse0) (not .cse1) (= |ULTIMATE.start_main_#t~ite21_Out-332535995| 0)) (and (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite21_Out-332535995| ~x$r_buff0_thd0~0_In-332535995)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-332535995, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-332535995} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-332535995, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-332535995|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-332535995} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 12:34:11,130 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [640] [640] L789-->L789-2: Formula: (let ((.cse0 (= 0 (mod ~x$r_buff1_thd0~0_In1487837072 256))) (.cse1 (= 0 (mod ~x$w_buff1_used~0_In1487837072 256))) (.cse3 (= (mod ~x$w_buff0_used~0_In1487837072 256) 0)) (.cse2 (= 0 (mod ~x$r_buff0_thd0~0_In1487837072 256)))) (or (and (= |ULTIMATE.start_main_#t~ite22_Out1487837072| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (= ~x$r_buff1_thd0~0_In1487837072 |ULTIMATE.start_main_#t~ite22_Out1487837072|) (or .cse3 .cse2)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1487837072, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1487837072, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1487837072, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1487837072} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In1487837072, ~x$w_buff1_used~0=~x$w_buff1_used~0_In1487837072, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In1487837072, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out1487837072|, ~x$w_buff0_used~0=~x$w_buff0_used~0_In1487837072} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 12:34:11,132 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L800-->L800-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-778828099 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite37_In-778828099| |ULTIMATE.start_main_#t~ite37_Out-778828099|) (= ~x$w_buff1_used~0_In-778828099 |ULTIMATE.start_main_#t~ite38_Out-778828099|) (not .cse0)) (and (= ~x$w_buff1_used~0_In-778828099 |ULTIMATE.start_main_#t~ite37_Out-778828099|) (let ((.cse1 (= (mod ~x$r_buff0_thd0~0_In-778828099 256) 0))) (or (and (= (mod ~x$w_buff1_used~0_In-778828099 256) 0) .cse1) (= 0 (mod ~x$w_buff0_used~0_In-778828099 256)) (and (= 0 (mod ~x$r_buff1_thd0~0_In-778828099 256)) .cse1))) .cse0 (= |ULTIMATE.start_main_#t~ite37_Out-778828099| |ULTIMATE.start_main_#t~ite38_Out-778828099|)))) InVars {~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-778828099, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-778828099, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_In-778828099|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-778828099, ~weak$$choice2~0=~weak$$choice2~0_In-778828099, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-778828099} OutVars{~x$r_buff0_thd0~0=~x$r_buff0_thd0~0_In-778828099, ~x$w_buff1_used~0=~x$w_buff1_used~0_In-778828099, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out-778828099|, ULTIMATE.start_main_#t~ite37=|ULTIMATE.start_main_#t~ite37_Out-778828099|, ~x$r_buff1_thd0~0=~x$r_buff1_thd0~0_In-778828099, ~weak$$choice2~0=~weak$$choice2~0_In-778828099, ~x$w_buff0_used~0=~x$w_buff0_used~0_In-778828099} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite38, ULTIMATE.start_main_#t~ite37] because there is no mapped edge [2019-12-07 12:34:11,132 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [590] [590] L801-->L802: Formula: (and (= v_~x$r_buff0_thd0~0_57 v_~x$r_buff0_thd0~0_56) (not (= (mod v_~weak$$choice2~0_21 256) 0))) InVars {~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_57, ~weak$$choice2~0=v_~weak$$choice2~0_21} OutVars{~x$r_buff0_thd0~0=v_~x$r_buff0_thd0~0_56, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_7|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_8|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_7|, ~weak$$choice2~0=v_~weak$$choice2~0_21} AuxVars[] AssignedVars[~x$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_#t~ite39] because there is no mapped edge [2019-12-07 12:34:11,132 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [664] [664] L804-->L4: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6| (mod v_~main$tmp_guard1~0_10 256)) (= v_~x~0_75 v_~x$mem_tmp~0_14) (= v_~x$flush_delayed~0_25 0) (not (= (mod v_~x$flush_delayed~0_26 256) 0))) InVars {~x$flush_delayed~0=v_~x$flush_delayed~0_26, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_10, ~x$mem_tmp~0=v_~x$mem_tmp~0_14} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_8, ~x$flush_delayed~0=v_~x$flush_delayed~0_25, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_10, ~x$mem_tmp~0=v_~x$mem_tmp~0_14, ~x~0=v_~x~0_75, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_21|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~x$flush_delayed~0, ~x~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 12:34:11,133 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [669] [669] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_9|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 12:34:11,178 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_b87c6edf-47ae-4c5e-85c6-5aae55aad974/bin/uautomizer/witness.graphml [2019-12-07 12:34:11,178 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 12:34:11,179 INFO L168 Benchmark]: Toolchain (without parser) took 8704.94 ms. Allocated memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: 436.2 MB). Free memory was 939.8 MB in the beginning and 1.3 GB in the end (delta: -400.4 MB). Peak memory consumption was 404.5 MB. Max. memory is 11.5 GB. [2019-12-07 12:34:11,180 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 12:34:11,180 INFO L168 Benchmark]: CACSL2BoogieTranslator took 436.89 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 100.7 MB). Free memory was 939.8 MB in the beginning and 1.1 GB in the end (delta: -130.1 MB). Peak memory consumption was 18.6 MB. Max. memory is 11.5 GB. [2019-12-07 12:34:11,180 INFO L168 Benchmark]: Boogie Procedure Inliner took 46.06 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 12:34:11,180 INFO L168 Benchmark]: Boogie Preprocessor took 24.14 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 12:34:11,181 INFO L168 Benchmark]: RCFGBuilder took 390.65 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 48.7 MB). Peak memory consumption was 48.7 MB. Max. memory is 11.5 GB. [2019-12-07 12:34:11,181 INFO L168 Benchmark]: TraceAbstraction took 7726.78 ms. Allocated memory was 1.1 GB in the beginning and 1.3 GB in the end (delta: 161.5 MB). Free memory was 1.0 GB in the beginning and 797.4 MB in the end (delta: 218.4 MB). Peak memory consumption was 379.9 MB. Max. memory is 11.5 GB. [2019-12-07 12:34:11,181 INFO L168 Benchmark]: Witness Printer took 77.23 ms. Allocated memory was 1.3 GB in the beginning and 1.5 GB in the end (delta: 174.1 MB). Free memory was 797.4 MB in the beginning and 1.3 GB in the end (delta: -542.8 MB). Peak memory consumption was 8.2 kB. Max. memory is 11.5 GB. [2019-12-07 12:34:11,183 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 436.89 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 100.7 MB). Free memory was 939.8 MB in the beginning and 1.1 GB in the end (delta: -130.1 MB). Peak memory consumption was 18.6 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 46.06 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 24.14 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 390.65 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 48.7 MB). Peak memory consumption was 48.7 MB. Max. memory is 11.5 GB. * TraceAbstraction took 7726.78 ms. Allocated memory was 1.1 GB in the beginning and 1.3 GB in the end (delta: 161.5 MB). Free memory was 1.0 GB in the beginning and 797.4 MB in the end (delta: 218.4 MB). Peak memory consumption was 379.9 MB. Max. memory is 11.5 GB. * Witness Printer took 77.23 ms. Allocated memory was 1.3 GB in the beginning and 1.5 GB in the end (delta: 174.1 MB). Free memory was 797.4 MB in the beginning and 1.3 GB in the end (delta: -542.8 MB). Peak memory consumption was 8.2 kB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 2.6s, 145 ProgramPointsBefore, 79 ProgramPointsAfterwards, 179 TransitionsBefore, 90 TransitionsAfterwards, 10378 CoEnabledTransitionPairs, 7 FixpointIterations, 27 TrivialSequentialCompositions, 41 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 28 ConcurrentYvCompositions, 26 ChoiceCompositions, 3606 VarBasedMoverChecksPositive, 166 VarBasedMoverChecksNegative, 18 SemBasedMoverChecksPositive, 205 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.7s, 0 MoverChecksTotal, 47380 CheckedPairsTotal, 96 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L777] FCALL, FORK 0 pthread_create(&t2483, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L779] FCALL, FORK 0 pthread_create(&t2484, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=0, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=0, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=0] [L745] 2 x$r_buff1_thd0 = x$r_buff0_thd0 [L746] 2 x$r_buff1_thd1 = x$r_buff0_thd1 [L747] 2 x$r_buff1_thd2 = x$r_buff0_thd2 [L748] 2 x$r_buff0_thd2 = (_Bool)1 [L751] 2 y = 1 VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L754] EXPR 2 x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=1] [L720] 1 y = 2 [L723] 1 x = 1 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L754] 2 x = x$w_buff0_used && x$r_buff0_thd2 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd2 ? x$w_buff1 : x) [L726] EXPR 1 x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=1, x$w_buff1=0, x$w_buff1_used=0, y=2] [L726] 1 x = x$w_buff0_used && x$r_buff0_thd1 ? x$w_buff0 : (x$w_buff1_used && x$r_buff1_thd1 ? x$w_buff1 : x) [L727] 1 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$w_buff0_used [L728] 1 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd1 || x$w_buff1_used && x$r_buff1_thd1 ? (_Bool)0 : x$w_buff1_used [L729] 1 x$r_buff0_thd1 = x$w_buff0_used && x$r_buff0_thd1 ? (_Bool)0 : x$r_buff0_thd1 [L755] 2 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd2 ? (_Bool)0 : x$w_buff0_used [L756] 2 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd2 || x$w_buff1_used && x$r_buff1_thd2 ? (_Bool)0 : x$w_buff1_used [L781] 0 main$tmp_guard0 = __unbuffered_cnt == 2 VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, x$flush_delayed=0, x$mem_tmp=0, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L786] 0 x$w_buff0_used = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used [L787] 0 x$w_buff1_used = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$w_buff1_used [L788] 0 x$r_buff0_thd0 = x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$r_buff0_thd0 [L789] 0 x$r_buff1_thd0 = x$w_buff0_used && x$r_buff0_thd0 || x$w_buff1_used && x$r_buff1_thd0 ? (_Bool)0 : x$r_buff1_thd0 [L792] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L793] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L794] 0 x$flush_delayed = weak$$choice2 [L795] 0 x$mem_tmp = x VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L796] EXPR 0 !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L796] 0 x = !x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff1) [L797] EXPR 0 weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L797] 0 x$w_buff0 = weak$$choice2 ? x$w_buff0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff0 : x$w_buff0)) [L798] EXPR 0 weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L798] 0 x$w_buff1 = weak$$choice2 ? x$w_buff1 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1 : (x$w_buff0_used && x$r_buff0_thd0 ? x$w_buff1 : x$w_buff1)) [L799] EXPR 0 weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L799] 0 x$w_buff0_used = weak$$choice2 ? x$w_buff0_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff0_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : x$w_buff0_used)) [L800] 0 x$w_buff1_used = weak$$choice2 ? x$w_buff1_used : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$w_buff1_used : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L802] EXPR 0 weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] [L802] 0 x$r_buff1_thd0 = weak$$choice2 ? x$r_buff1_thd0 : (!x$w_buff0_used || !x$r_buff0_thd0 && !x$w_buff1_used || !x$r_buff0_thd0 && !x$r_buff1_thd0 ? x$r_buff1_thd0 : (x$w_buff0_used && x$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L803] 0 main$tmp_guard1 = !(x == 2 && y == 2) VAL [\result={0:0}, __unbuffered_cnt=2, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=6, weak$$choice2=1, x=2, x$flush_delayed=1, x$mem_tmp=2, x$r_buff0_thd0=0, x$r_buff0_thd1=0, x$r_buff0_thd2=1, x$r_buff1_thd0=0, x$r_buff1_thd1=0, x$r_buff1_thd2=0, x$read_delayed=0, x$read_delayed_var={0:0}, x$w_buff0=2, x$w_buff0_used=0, x$w_buff1=0, x$w_buff1_used=0, y=2] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 139 locations, 2 error locations. Result: UNSAFE, OverallTime: 7.6s, OverallIterations: 16, TraceHistogramMax: 1, AutomataDifference: 2.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1483 SDtfs, 1196 SDslu, 3629 SDs, 0 SdLazy, 2341 SolverSat, 118 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 150 GetRequests, 33 SyntacticMatches, 17 SemanticMatches, 100 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 169 ImplicationChecksByTransitivity, 0.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=11787occurred in iteration=2, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.6s AutomataMinimizationTime, 15 MinimizatonAttempts, 2954 StatesRemovedByMinimization, 11 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.9s InterpolantComputationTime, 685 NumberOfCodeBlocks, 685 NumberOfCodeBlocksAsserted, 16 NumberOfCheckSat, 616 ConstructedInterpolants, 0 QuantifiedInterpolants, 102325 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 15 InterpolantComputations, 15 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...