./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe030_power.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_1b4d415f-4b29-4f1e-ace5-02c859baecd6/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_1b4d415f-4b29-4f1e-ace5-02c859baecd6/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_1b4d415f-4b29-4f1e-ace5-02c859baecd6/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_1b4d415f-4b29-4f1e-ace5-02c859baecd6/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe030_power.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_1b4d415f-4b29-4f1e-ace5-02c859baecd6/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_1b4d415f-4b29-4f1e-ace5-02c859baecd6/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 1452eb551b673ede75b9a7c48e2ff98688478cdd ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 10:48:43,690 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 10:48:43,692 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 10:48:43,701 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 10:48:43,701 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 10:48:43,702 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 10:48:43,703 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 10:48:43,704 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 10:48:43,706 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 10:48:43,707 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 10:48:43,707 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 10:48:43,708 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 10:48:43,708 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 10:48:43,709 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 10:48:43,710 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 10:48:43,711 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 10:48:43,711 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 10:48:43,712 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 10:48:43,713 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 10:48:43,715 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 10:48:43,716 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 10:48:43,716 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 10:48:43,717 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 10:48:43,717 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 10:48:43,719 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 10:48:43,719 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 10:48:43,719 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 10:48:43,720 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 10:48:43,720 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 10:48:43,721 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 10:48:43,721 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 10:48:43,721 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 10:48:43,722 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 10:48:43,722 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 10:48:43,723 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 10:48:43,723 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 10:48:43,723 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 10:48:43,723 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 10:48:43,724 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 10:48:43,724 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 10:48:43,724 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 10:48:43,725 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_1b4d415f-4b29-4f1e-ace5-02c859baecd6/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 10:48:43,734 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 10:48:43,734 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 10:48:43,735 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 10:48:43,735 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 10:48:43,735 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 10:48:43,735 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 10:48:43,735 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 10:48:43,735 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 10:48:43,735 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 10:48:43,736 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 10:48:43,736 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 10:48:43,736 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 10:48:43,736 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 10:48:43,736 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 10:48:43,736 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 10:48:43,736 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 10:48:43,736 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 10:48:43,736 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 10:48:43,737 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 10:48:43,737 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 10:48:43,737 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 10:48:43,737 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 10:48:43,737 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 10:48:43,737 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 10:48:43,737 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 10:48:43,737 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 10:48:43,737 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 10:48:43,738 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 10:48:43,738 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 10:48:43,738 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_1b4d415f-4b29-4f1e-ace5-02c859baecd6/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 1452eb551b673ede75b9a7c48e2ff98688478cdd [2019-12-07 10:48:43,865 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 10:48:43,875 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 10:48:43,878 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 10:48:43,879 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 10:48:43,879 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 10:48:43,879 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_1b4d415f-4b29-4f1e-ace5-02c859baecd6/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe030_power.oepc.i [2019-12-07 10:48:43,924 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_1b4d415f-4b29-4f1e-ace5-02c859baecd6/bin/uautomizer/data/b71987e52/e8c2658df0e64713a3708777b2b9881b/FLAG8a73aaa8a [2019-12-07 10:48:44,458 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 10:48:44,458 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_1b4d415f-4b29-4f1e-ace5-02c859baecd6/sv-benchmarks/c/pthread-wmm/safe030_power.oepc.i [2019-12-07 10:48:44,468 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_1b4d415f-4b29-4f1e-ace5-02c859baecd6/bin/uautomizer/data/b71987e52/e8c2658df0e64713a3708777b2b9881b/FLAG8a73aaa8a [2019-12-07 10:48:44,907 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_1b4d415f-4b29-4f1e-ace5-02c859baecd6/bin/uautomizer/data/b71987e52/e8c2658df0e64713a3708777b2b9881b [2019-12-07 10:48:44,909 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 10:48:44,910 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 10:48:44,911 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 10:48:44,911 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 10:48:44,914 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 10:48:44,914 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 10:48:44" (1/1) ... [2019-12-07 10:48:44,916 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@27a7eda1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:48:44, skipping insertion in model container [2019-12-07 10:48:44,917 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 10:48:44" (1/1) ... [2019-12-07 10:48:44,922 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 10:48:44,953 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 10:48:45,195 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 10:48:45,203 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 10:48:45,248 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 10:48:45,293 INFO L208 MainTranslator]: Completed translation [2019-12-07 10:48:45,293 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:48:45 WrapperNode [2019-12-07 10:48:45,293 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 10:48:45,294 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 10:48:45,294 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 10:48:45,294 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 10:48:45,300 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:48:45" (1/1) ... [2019-12-07 10:48:45,313 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:48:45" (1/1) ... [2019-12-07 10:48:45,336 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 10:48:45,336 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 10:48:45,336 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 10:48:45,336 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 10:48:45,343 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:48:45" (1/1) ... [2019-12-07 10:48:45,343 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:48:45" (1/1) ... [2019-12-07 10:48:45,346 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:48:45" (1/1) ... [2019-12-07 10:48:45,347 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:48:45" (1/1) ... [2019-12-07 10:48:45,354 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:48:45" (1/1) ... [2019-12-07 10:48:45,357 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:48:45" (1/1) ... [2019-12-07 10:48:45,359 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:48:45" (1/1) ... [2019-12-07 10:48:45,363 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 10:48:45,363 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 10:48:45,363 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 10:48:45,363 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 10:48:45,364 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:48:45" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_1b4d415f-4b29-4f1e-ace5-02c859baecd6/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 10:48:45,406 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 10:48:45,406 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 10:48:45,406 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 10:48:45,406 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 10:48:45,406 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 10:48:45,406 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 10:48:45,406 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 10:48:45,406 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 10:48:45,406 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 10:48:45,406 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 10:48:45,407 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 10:48:45,407 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 10:48:45,407 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 10:48:45,408 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 10:48:45,781 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 10:48:45,781 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 10:48:45,782 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:48:45 BoogieIcfgContainer [2019-12-07 10:48:45,782 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 10:48:45,783 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 10:48:45,783 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 10:48:45,785 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 10:48:45,785 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 10:48:44" (1/3) ... [2019-12-07 10:48:45,786 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@54d43a39 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 10:48:45, skipping insertion in model container [2019-12-07 10:48:45,786 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:48:45" (2/3) ... [2019-12-07 10:48:45,786 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@54d43a39 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 10:48:45, skipping insertion in model container [2019-12-07 10:48:45,786 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:48:45" (3/3) ... [2019-12-07 10:48:45,788 INFO L109 eAbstractionObserver]: Analyzing ICFG safe030_power.oepc.i [2019-12-07 10:48:45,794 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 10:48:45,794 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 10:48:45,800 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 10:48:45,801 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 10:48:45,828 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,828 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,828 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,829 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,829 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,829 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,829 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,829 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,829 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,829 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,830 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,830 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,830 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,830 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,830 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,830 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,830 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,830 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,830 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,831 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,831 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,831 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,831 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,831 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,831 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,831 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,832 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,832 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,832 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,832 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,832 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,832 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,832 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,832 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,833 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,833 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,833 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,833 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,834 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,834 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,834 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,834 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,834 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,834 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,835 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,835 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,835 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,835 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,835 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,836 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,836 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,836 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,836 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,836 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,836 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,836 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,836 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,836 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,837 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,837 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,837 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,837 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,837 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,837 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,837 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,838 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,838 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,838 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,838 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,838 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,838 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,839 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,839 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,839 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,839 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,839 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,839 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,840 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,840 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,840 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,840 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,840 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,840 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,840 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,841 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,841 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,841 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,841 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,841 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,841 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,841 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,842 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,842 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,842 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:48:45,853 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 10:48:45,866 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 10:48:45,866 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 10:48:45,866 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 10:48:45,866 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 10:48:45,866 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 10:48:45,866 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 10:48:45,866 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 10:48:45,866 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 10:48:45,880 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 173 places, 210 transitions [2019-12-07 10:48:45,881 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 173 places, 210 transitions [2019-12-07 10:48:45,948 INFO L134 PetriNetUnfolder]: 47/207 cut-off events. [2019-12-07 10:48:45,948 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 10:48:45,959 INFO L76 FinitePrefix]: Finished finitePrefix Result has 217 conditions, 207 events. 47/207 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 583 event pairs. 9/167 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 10:48:45,973 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 173 places, 210 transitions [2019-12-07 10:48:45,999 INFO L134 PetriNetUnfolder]: 47/207 cut-off events. [2019-12-07 10:48:45,999 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 10:48:46,004 INFO L76 FinitePrefix]: Finished finitePrefix Result has 217 conditions, 207 events. 47/207 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 583 event pairs. 9/167 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 10:48:46,018 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 17114 [2019-12-07 10:48:46,018 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 10:48:48,676 WARN L192 SmtUtils]: Spent 131.00 ms on a formula simplification. DAG size of input: 85 DAG size of output: 83 [2019-12-07 10:48:48,768 INFO L206 etLargeBlockEncoding]: Checked pairs total: 79634 [2019-12-07 10:48:48,768 INFO L214 etLargeBlockEncoding]: Total number of compositions: 110 [2019-12-07 10:48:48,771 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 95 places, 107 transitions [2019-12-07 10:49:02,631 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 115670 states. [2019-12-07 10:49:02,632 INFO L276 IsEmpty]: Start isEmpty. Operand 115670 states. [2019-12-07 10:49:02,636 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 10:49:02,636 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:49:02,636 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 10:49:02,637 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:49:02,640 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:49:02,640 INFO L82 PathProgramCache]: Analyzing trace with hash 839588, now seen corresponding path program 1 times [2019-12-07 10:49:02,646 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:49:02,646 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1285942909] [2019-12-07 10:49:02,646 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:49:02,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:49:02,795 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:49:02,795 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1285942909] [2019-12-07 10:49:02,796 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:49:02,796 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 10:49:02,796 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [271584809] [2019-12-07 10:49:02,800 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:49:02,800 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:49:02,810 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:49:02,810 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:49:02,812 INFO L87 Difference]: Start difference. First operand 115670 states. Second operand 3 states. [2019-12-07 10:49:03,540 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:49:03,540 INFO L93 Difference]: Finished difference Result 115280 states and 496088 transitions. [2019-12-07 10:49:03,541 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:49:03,542 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 10:49:03,543 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:49:04,071 INFO L225 Difference]: With dead ends: 115280 [2019-12-07 10:49:04,071 INFO L226 Difference]: Without dead ends: 112928 [2019-12-07 10:49:04,072 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:49:09,011 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112928 states. [2019-12-07 10:49:10,446 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112928 to 112928. [2019-12-07 10:49:10,447 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112928 states. [2019-12-07 10:49:11,068 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112928 states to 112928 states and 486484 transitions. [2019-12-07 10:49:11,069 INFO L78 Accepts]: Start accepts. Automaton has 112928 states and 486484 transitions. Word has length 3 [2019-12-07 10:49:11,069 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:49:11,069 INFO L462 AbstractCegarLoop]: Abstraction has 112928 states and 486484 transitions. [2019-12-07 10:49:11,069 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:49:11,069 INFO L276 IsEmpty]: Start isEmpty. Operand 112928 states and 486484 transitions. [2019-12-07 10:49:11,072 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 10:49:11,072 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:49:11,073 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:49:11,073 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:49:11,073 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:49:11,073 INFO L82 PathProgramCache]: Analyzing trace with hash 1760802055, now seen corresponding path program 1 times [2019-12-07 10:49:11,073 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:49:11,073 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [691935169] [2019-12-07 10:49:11,073 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:49:11,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:49:11,142 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:49:11,142 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [691935169] [2019-12-07 10:49:11,142 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:49:11,142 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:49:11,142 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1050769331] [2019-12-07 10:49:11,143 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:49:11,144 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:49:11,144 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:49:11,144 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:49:11,144 INFO L87 Difference]: Start difference. First operand 112928 states and 486484 transitions. Second operand 4 states. [2019-12-07 10:49:12,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:49:12,111 INFO L93 Difference]: Finished difference Result 176610 states and 731654 transitions. [2019-12-07 10:49:12,112 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:49:12,112 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 10:49:12,112 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:49:12,585 INFO L225 Difference]: With dead ends: 176610 [2019-12-07 10:49:12,585 INFO L226 Difference]: Without dead ends: 176561 [2019-12-07 10:49:12,586 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:49:17,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176561 states. [2019-12-07 10:49:21,086 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176561 to 162745. [2019-12-07 10:49:21,086 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162745 states. [2019-12-07 10:49:21,565 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162745 states to 162745 states and 681729 transitions. [2019-12-07 10:49:21,565 INFO L78 Accepts]: Start accepts. Automaton has 162745 states and 681729 transitions. Word has length 11 [2019-12-07 10:49:21,565 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:49:21,565 INFO L462 AbstractCegarLoop]: Abstraction has 162745 states and 681729 transitions. [2019-12-07 10:49:21,565 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:49:21,565 INFO L276 IsEmpty]: Start isEmpty. Operand 162745 states and 681729 transitions. [2019-12-07 10:49:21,569 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 10:49:21,570 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:49:21,570 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:49:21,570 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:49:21,570 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:49:21,570 INFO L82 PathProgramCache]: Analyzing trace with hash 1561773324, now seen corresponding path program 1 times [2019-12-07 10:49:21,570 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:49:21,570 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1800476766] [2019-12-07 10:49:21,570 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:49:21,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:49:21,611 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:49:21,611 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1800476766] [2019-12-07 10:49:21,612 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:49:21,612 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:49:21,612 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [843771694] [2019-12-07 10:49:21,612 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:49:21,612 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:49:21,612 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:49:21,613 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:49:21,613 INFO L87 Difference]: Start difference. First operand 162745 states and 681729 transitions. Second operand 3 states. [2019-12-07 10:49:21,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:49:21,715 INFO L93 Difference]: Finished difference Result 33244 states and 109167 transitions. [2019-12-07 10:49:21,716 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:49:21,716 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 13 [2019-12-07 10:49:21,716 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:49:21,786 INFO L225 Difference]: With dead ends: 33244 [2019-12-07 10:49:21,786 INFO L226 Difference]: Without dead ends: 33244 [2019-12-07 10:49:21,786 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:49:21,949 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33244 states. [2019-12-07 10:49:22,263 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33244 to 33244. [2019-12-07 10:49:22,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33244 states. [2019-12-07 10:49:22,669 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33244 states to 33244 states and 109167 transitions. [2019-12-07 10:49:22,669 INFO L78 Accepts]: Start accepts. Automaton has 33244 states and 109167 transitions. Word has length 13 [2019-12-07 10:49:22,670 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:49:22,670 INFO L462 AbstractCegarLoop]: Abstraction has 33244 states and 109167 transitions. [2019-12-07 10:49:22,670 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:49:22,670 INFO L276 IsEmpty]: Start isEmpty. Operand 33244 states and 109167 transitions. [2019-12-07 10:49:22,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 10:49:22,671 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:49:22,671 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:49:22,671 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:49:22,671 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:49:22,671 INFO L82 PathProgramCache]: Analyzing trace with hash 1197008698, now seen corresponding path program 1 times [2019-12-07 10:49:22,672 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:49:22,672 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [144145862] [2019-12-07 10:49:22,672 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:49:22,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:49:22,725 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:49:22,725 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [144145862] [2019-12-07 10:49:22,725 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:49:22,725 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:49:22,726 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1667352694] [2019-12-07 10:49:22,726 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:49:22,726 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:49:22,726 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:49:22,726 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:49:22,727 INFO L87 Difference]: Start difference. First operand 33244 states and 109167 transitions. Second operand 4 states. [2019-12-07 10:49:23,006 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:49:23,006 INFO L93 Difference]: Finished difference Result 44535 states and 142999 transitions. [2019-12-07 10:49:23,007 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:49:23,007 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 10:49:23,007 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:49:23,072 INFO L225 Difference]: With dead ends: 44535 [2019-12-07 10:49:23,072 INFO L226 Difference]: Without dead ends: 44528 [2019-12-07 10:49:23,073 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:49:23,262 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44528 states. [2019-12-07 10:49:23,667 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44528 to 39179. [2019-12-07 10:49:23,667 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39179 states. [2019-12-07 10:49:23,737 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39179 states to 39179 states and 127862 transitions. [2019-12-07 10:49:23,737 INFO L78 Accepts]: Start accepts. Automaton has 39179 states and 127862 transitions. Word has length 13 [2019-12-07 10:49:23,737 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:49:23,737 INFO L462 AbstractCegarLoop]: Abstraction has 39179 states and 127862 transitions. [2019-12-07 10:49:23,737 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:49:23,737 INFO L276 IsEmpty]: Start isEmpty. Operand 39179 states and 127862 transitions. [2019-12-07 10:49:23,741 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 10:49:23,741 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:49:23,741 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:49:23,741 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:49:23,741 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:49:23,741 INFO L82 PathProgramCache]: Analyzing trace with hash -789449835, now seen corresponding path program 1 times [2019-12-07 10:49:23,741 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:49:23,741 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [759423516] [2019-12-07 10:49:23,742 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:49:23,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:49:23,803 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:49:23,803 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [759423516] [2019-12-07 10:49:23,803 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:49:23,803 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:49:23,803 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [372810424] [2019-12-07 10:49:23,804 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:49:23,804 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:49:23,804 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:49:23,804 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:49:23,804 INFO L87 Difference]: Start difference. First operand 39179 states and 127862 transitions. Second operand 5 states. [2019-12-07 10:49:24,310 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:49:24,310 INFO L93 Difference]: Finished difference Result 52446 states and 167747 transitions. [2019-12-07 10:49:24,310 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 10:49:24,310 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 10:49:24,311 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:49:24,392 INFO L225 Difference]: With dead ends: 52446 [2019-12-07 10:49:24,393 INFO L226 Difference]: Without dead ends: 52433 [2019-12-07 10:49:24,393 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 10:49:24,604 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52433 states. [2019-12-07 10:49:25,044 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52433 to 39607. [2019-12-07 10:49:25,044 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39607 states. [2019-12-07 10:49:25,115 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39607 states to 39607 states and 129076 transitions. [2019-12-07 10:49:25,115 INFO L78 Accepts]: Start accepts. Automaton has 39607 states and 129076 transitions. Word has length 19 [2019-12-07 10:49:25,115 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:49:25,115 INFO L462 AbstractCegarLoop]: Abstraction has 39607 states and 129076 transitions. [2019-12-07 10:49:25,115 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:49:25,115 INFO L276 IsEmpty]: Start isEmpty. Operand 39607 states and 129076 transitions. [2019-12-07 10:49:25,123 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 10:49:25,123 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:49:25,124 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:49:25,124 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:49:25,124 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:49:25,124 INFO L82 PathProgramCache]: Analyzing trace with hash -2013302827, now seen corresponding path program 1 times [2019-12-07 10:49:25,124 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:49:25,124 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1587053447] [2019-12-07 10:49:25,124 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:49:25,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:49:25,201 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:49:25,201 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1587053447] [2019-12-07 10:49:25,201 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:49:25,201 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:49:25,201 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1079101425] [2019-12-07 10:49:25,202 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:49:25,202 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:49:25,202 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:49:25,202 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:49:25,202 INFO L87 Difference]: Start difference. First operand 39607 states and 129076 transitions. Second operand 5 states. [2019-12-07 10:49:25,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:49:25,595 INFO L93 Difference]: Finished difference Result 53629 states and 171295 transitions. [2019-12-07 10:49:25,595 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 10:49:25,595 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 10:49:25,595 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:49:25,678 INFO L225 Difference]: With dead ends: 53629 [2019-12-07 10:49:25,678 INFO L226 Difference]: Without dead ends: 53629 [2019-12-07 10:49:25,678 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:49:25,890 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53629 states. [2019-12-07 10:49:26,434 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53629 to 43513. [2019-12-07 10:49:26,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43513 states. [2019-12-07 10:49:26,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43513 states to 43513 states and 140924 transitions. [2019-12-07 10:49:26,814 INFO L78 Accepts]: Start accepts. Automaton has 43513 states and 140924 transitions. Word has length 25 [2019-12-07 10:49:26,814 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:49:26,814 INFO L462 AbstractCegarLoop]: Abstraction has 43513 states and 140924 transitions. [2019-12-07 10:49:26,814 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:49:26,814 INFO L276 IsEmpty]: Start isEmpty. Operand 43513 states and 140924 transitions. [2019-12-07 10:49:26,821 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 10:49:26,821 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:49:26,822 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:49:26,822 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:49:26,822 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:49:26,822 INFO L82 PathProgramCache]: Analyzing trace with hash 1410541457, now seen corresponding path program 1 times [2019-12-07 10:49:26,822 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:49:26,822 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1715274998] [2019-12-07 10:49:26,822 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:49:26,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:49:26,856 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:49:26,856 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1715274998] [2019-12-07 10:49:26,857 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:49:26,857 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:49:26,857 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1866251284] [2019-12-07 10:49:26,857 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:49:26,857 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:49:26,857 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:49:26,857 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:49:26,857 INFO L87 Difference]: Start difference. First operand 43513 states and 140924 transitions. Second operand 4 states. [2019-12-07 10:49:26,886 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:49:26,886 INFO L93 Difference]: Finished difference Result 8729 states and 23613 transitions. [2019-12-07 10:49:26,886 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 10:49:26,887 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 25 [2019-12-07 10:49:26,887 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:49:26,894 INFO L225 Difference]: With dead ends: 8729 [2019-12-07 10:49:26,894 INFO L226 Difference]: Without dead ends: 8729 [2019-12-07 10:49:26,894 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:49:26,918 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8729 states. [2019-12-07 10:49:26,978 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8729 to 8589. [2019-12-07 10:49:26,979 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8589 states. [2019-12-07 10:49:26,989 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8589 states to 8589 states and 23213 transitions. [2019-12-07 10:49:26,989 INFO L78 Accepts]: Start accepts. Automaton has 8589 states and 23213 transitions. Word has length 25 [2019-12-07 10:49:26,990 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:49:26,990 INFO L462 AbstractCegarLoop]: Abstraction has 8589 states and 23213 transitions. [2019-12-07 10:49:26,990 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:49:26,990 INFO L276 IsEmpty]: Start isEmpty. Operand 8589 states and 23213 transitions. [2019-12-07 10:49:26,998 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2019-12-07 10:49:26,998 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:49:26,998 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:49:26,998 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:49:26,998 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:49:26,998 INFO L82 PathProgramCache]: Analyzing trace with hash -1439896358, now seen corresponding path program 1 times [2019-12-07 10:49:26,998 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:49:26,999 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [40595089] [2019-12-07 10:49:26,999 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:49:27,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:49:27,077 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:49:27,077 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [40595089] [2019-12-07 10:49:27,077 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:49:27,077 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 10:49:27,077 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [163522872] [2019-12-07 10:49:27,078 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 10:49:27,078 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:49:27,078 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 10:49:27,078 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 10:49:27,078 INFO L87 Difference]: Start difference. First operand 8589 states and 23213 transitions. Second operand 6 states. [2019-12-07 10:49:27,503 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:49:27,503 INFO L93 Difference]: Finished difference Result 9663 states and 25583 transitions. [2019-12-07 10:49:27,504 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 10:49:27,504 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 37 [2019-12-07 10:49:27,504 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:49:27,512 INFO L225 Difference]: With dead ends: 9663 [2019-12-07 10:49:27,512 INFO L226 Difference]: Without dead ends: 9663 [2019-12-07 10:49:27,513 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 2 SyntacticMatches, 4 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=47, Invalid=109, Unknown=0, NotChecked=0, Total=156 [2019-12-07 10:49:27,537 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9663 states. [2019-12-07 10:49:27,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9663 to 7869. [2019-12-07 10:49:27,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7869 states. [2019-12-07 10:49:27,609 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7869 states to 7869 states and 21231 transitions. [2019-12-07 10:49:27,609 INFO L78 Accepts]: Start accepts. Automaton has 7869 states and 21231 transitions. Word has length 37 [2019-12-07 10:49:27,609 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:49:27,610 INFO L462 AbstractCegarLoop]: Abstraction has 7869 states and 21231 transitions. [2019-12-07 10:49:27,610 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 10:49:27,610 INFO L276 IsEmpty]: Start isEmpty. Operand 7869 states and 21231 transitions. [2019-12-07 10:49:27,618 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-12-07 10:49:27,618 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:49:27,619 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:49:27,619 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:49:27,619 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:49:27,619 INFO L82 PathProgramCache]: Analyzing trace with hash -1997153686, now seen corresponding path program 1 times [2019-12-07 10:49:27,619 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:49:27,619 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [867649633] [2019-12-07 10:49:27,619 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:49:27,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:49:27,648 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:49:27,648 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [867649633] [2019-12-07 10:49:27,649 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:49:27,649 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:49:27,649 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1304466616] [2019-12-07 10:49:27,649 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:49:27,649 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:49:27,649 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:49:27,649 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:49:27,649 INFO L87 Difference]: Start difference. First operand 7869 states and 21231 transitions. Second operand 3 states. [2019-12-07 10:49:27,691 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:49:27,692 INFO L93 Difference]: Finished difference Result 8358 states and 22385 transitions. [2019-12-07 10:49:27,692 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:49:27,692 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 51 [2019-12-07 10:49:27,692 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:49:27,699 INFO L225 Difference]: With dead ends: 8358 [2019-12-07 10:49:27,699 INFO L226 Difference]: Without dead ends: 8358 [2019-12-07 10:49:27,699 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:49:27,722 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8358 states. [2019-12-07 10:49:27,779 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8358 to 8196. [2019-12-07 10:49:27,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8196 states. [2019-12-07 10:49:27,789 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8196 states to 8196 states and 22054 transitions. [2019-12-07 10:49:27,789 INFO L78 Accepts]: Start accepts. Automaton has 8196 states and 22054 transitions. Word has length 51 [2019-12-07 10:49:27,789 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:49:27,789 INFO L462 AbstractCegarLoop]: Abstraction has 8196 states and 22054 transitions. [2019-12-07 10:49:27,789 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:49:27,789 INFO L276 IsEmpty]: Start isEmpty. Operand 8196 states and 22054 transitions. [2019-12-07 10:49:27,798 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-12-07 10:49:27,798 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:49:27,798 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:49:27,798 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:49:27,799 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:49:27,799 INFO L82 PathProgramCache]: Analyzing trace with hash -1840840309, now seen corresponding path program 1 times [2019-12-07 10:49:27,799 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:49:27,799 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1310903455] [2019-12-07 10:49:27,799 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:49:27,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:49:27,899 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:49:27,899 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1310903455] [2019-12-07 10:49:27,899 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:49:27,899 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 10:49:27,899 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1367607869] [2019-12-07 10:49:27,899 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 10:49:27,899 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:49:27,900 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 10:49:27,900 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:49:27,900 INFO L87 Difference]: Start difference. First operand 8196 states and 22054 transitions. Second operand 7 states. [2019-12-07 10:49:28,428 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:49:28,428 INFO L93 Difference]: Finished difference Result 8904 states and 23547 transitions. [2019-12-07 10:49:28,429 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 10:49:28,429 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 51 [2019-12-07 10:49:28,429 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:49:28,436 INFO L225 Difference]: With dead ends: 8904 [2019-12-07 10:49:28,436 INFO L226 Difference]: Without dead ends: 8903 [2019-12-07 10:49:28,437 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 0 SyntacticMatches, 4 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=67, Invalid=205, Unknown=0, NotChecked=0, Total=272 [2019-12-07 10:49:28,460 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8903 states. [2019-12-07 10:49:28,519 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8903 to 8410. [2019-12-07 10:49:28,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8410 states. [2019-12-07 10:49:28,530 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8410 states to 8410 states and 22481 transitions. [2019-12-07 10:49:28,530 INFO L78 Accepts]: Start accepts. Automaton has 8410 states and 22481 transitions. Word has length 51 [2019-12-07 10:49:28,530 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:49:28,530 INFO L462 AbstractCegarLoop]: Abstraction has 8410 states and 22481 transitions. [2019-12-07 10:49:28,530 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 10:49:28,530 INFO L276 IsEmpty]: Start isEmpty. Operand 8410 states and 22481 transitions. [2019-12-07 10:49:28,539 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-12-07 10:49:28,539 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:49:28,539 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:49:28,539 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:49:28,540 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:49:28,540 INFO L82 PathProgramCache]: Analyzing trace with hash -1866819472, now seen corresponding path program 1 times [2019-12-07 10:49:28,540 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:49:28,540 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [503035316] [2019-12-07 10:49:28,540 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:49:28,556 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:49:28,584 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:49:28,584 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [503035316] [2019-12-07 10:49:28,584 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:49:28,584 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 10:49:28,584 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [133794849] [2019-12-07 10:49:28,584 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:49:28,584 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:49:28,585 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:49:28,585 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:49:28,585 INFO L87 Difference]: Start difference. First operand 8410 states and 22481 transitions. Second operand 5 states. [2019-12-07 10:49:28,610 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:49:28,610 INFO L93 Difference]: Finished difference Result 5344 states and 15307 transitions. [2019-12-07 10:49:28,610 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:49:28,610 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 51 [2019-12-07 10:49:28,610 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:49:28,615 INFO L225 Difference]: With dead ends: 5344 [2019-12-07 10:49:28,615 INFO L226 Difference]: Without dead ends: 5344 [2019-12-07 10:49:28,616 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:49:28,634 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5344 states. [2019-12-07 10:49:28,675 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5344 to 4980. [2019-12-07 10:49:28,676 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4980 states. [2019-12-07 10:49:28,682 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4980 states to 4980 states and 14323 transitions. [2019-12-07 10:49:28,682 INFO L78 Accepts]: Start accepts. Automaton has 4980 states and 14323 transitions. Word has length 51 [2019-12-07 10:49:28,682 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:49:28,682 INFO L462 AbstractCegarLoop]: Abstraction has 4980 states and 14323 transitions. [2019-12-07 10:49:28,682 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:49:28,682 INFO L276 IsEmpty]: Start isEmpty. Operand 4980 states and 14323 transitions. [2019-12-07 10:49:28,688 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 10:49:28,688 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:49:28,688 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:49:28,689 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:49:28,689 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:49:28,689 INFO L82 PathProgramCache]: Analyzing trace with hash 873301269, now seen corresponding path program 1 times [2019-12-07 10:49:28,689 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:49:28,689 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [763755762] [2019-12-07 10:49:28,689 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:49:28,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:49:28,733 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:49:28,733 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [763755762] [2019-12-07 10:49:28,733 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:49:28,733 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 10:49:28,733 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1100596289] [2019-12-07 10:49:28,734 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:49:28,734 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:49:28,734 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:49:28,734 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:49:28,734 INFO L87 Difference]: Start difference. First operand 4980 states and 14323 transitions. Second operand 5 states. [2019-12-07 10:49:28,915 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:49:28,915 INFO L93 Difference]: Finished difference Result 7571 states and 21588 transitions. [2019-12-07 10:49:28,916 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 10:49:28,916 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 65 [2019-12-07 10:49:28,916 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:49:28,922 INFO L225 Difference]: With dead ends: 7571 [2019-12-07 10:49:28,922 INFO L226 Difference]: Without dead ends: 7571 [2019-12-07 10:49:28,922 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 10:49:28,944 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7571 states. [2019-12-07 10:49:28,997 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7571 to 6672. [2019-12-07 10:49:28,997 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6672 states. [2019-12-07 10:49:29,005 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6672 states to 6672 states and 19109 transitions. [2019-12-07 10:49:29,005 INFO L78 Accepts]: Start accepts. Automaton has 6672 states and 19109 transitions. Word has length 65 [2019-12-07 10:49:29,005 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:49:29,006 INFO L462 AbstractCegarLoop]: Abstraction has 6672 states and 19109 transitions. [2019-12-07 10:49:29,006 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:49:29,006 INFO L276 IsEmpty]: Start isEmpty. Operand 6672 states and 19109 transitions. [2019-12-07 10:49:29,013 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 10:49:29,013 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:49:29,013 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:49:29,014 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:49:29,014 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:49:29,014 INFO L82 PathProgramCache]: Analyzing trace with hash -127580537, now seen corresponding path program 2 times [2019-12-07 10:49:29,014 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:49:29,014 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1158899411] [2019-12-07 10:49:29,014 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:49:29,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:49:29,082 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:49:29,082 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1158899411] [2019-12-07 10:49:29,083 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:49:29,083 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 10:49:29,083 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1298973617] [2019-12-07 10:49:29,083 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 10:49:29,083 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:49:29,083 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 10:49:29,083 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 10:49:29,083 INFO L87 Difference]: Start difference. First operand 6672 states and 19109 transitions. Second operand 6 states. [2019-12-07 10:49:29,397 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:49:29,397 INFO L93 Difference]: Finished difference Result 11209 states and 31993 transitions. [2019-12-07 10:49:29,398 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 10:49:29,398 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 65 [2019-12-07 10:49:29,398 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:49:29,407 INFO L225 Difference]: With dead ends: 11209 [2019-12-07 10:49:29,407 INFO L226 Difference]: Without dead ends: 11209 [2019-12-07 10:49:29,407 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 10:49:29,435 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11209 states. [2019-12-07 10:49:29,508 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11209 to 7637. [2019-12-07 10:49:29,508 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7637 states. [2019-12-07 10:49:29,518 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7637 states to 7637 states and 21943 transitions. [2019-12-07 10:49:29,518 INFO L78 Accepts]: Start accepts. Automaton has 7637 states and 21943 transitions. Word has length 65 [2019-12-07 10:49:29,519 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:49:29,519 INFO L462 AbstractCegarLoop]: Abstraction has 7637 states and 21943 transitions. [2019-12-07 10:49:29,519 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 10:49:29,519 INFO L276 IsEmpty]: Start isEmpty. Operand 7637 states and 21943 transitions. [2019-12-07 10:49:29,528 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 10:49:29,528 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:49:29,528 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:49:29,528 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:49:29,528 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:49:29,529 INFO L82 PathProgramCache]: Analyzing trace with hash 1928895531, now seen corresponding path program 3 times [2019-12-07 10:49:29,529 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:49:29,529 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [34401010] [2019-12-07 10:49:29,529 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:49:29,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:49:29,588 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:49:29,588 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [34401010] [2019-12-07 10:49:29,588 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:49:29,588 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:49:29,588 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1788168141] [2019-12-07 10:49:29,588 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:49:29,589 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:49:29,589 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:49:29,589 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:49:29,589 INFO L87 Difference]: Start difference. First operand 7637 states and 21943 transitions. Second operand 3 states. [2019-12-07 10:49:29,637 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:49:29,637 INFO L93 Difference]: Finished difference Result 7637 states and 21942 transitions. [2019-12-07 10:49:29,638 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:49:29,638 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 10:49:29,638 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:49:29,645 INFO L225 Difference]: With dead ends: 7637 [2019-12-07 10:49:29,646 INFO L226 Difference]: Without dead ends: 7637 [2019-12-07 10:49:29,646 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:49:29,668 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7637 states. [2019-12-07 10:49:29,718 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7637 to 6314. [2019-12-07 10:49:29,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6314 states. [2019-12-07 10:49:29,726 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6314 states to 6314 states and 18271 transitions. [2019-12-07 10:49:29,726 INFO L78 Accepts]: Start accepts. Automaton has 6314 states and 18271 transitions. Word has length 65 [2019-12-07 10:49:29,727 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:49:29,727 INFO L462 AbstractCegarLoop]: Abstraction has 6314 states and 18271 transitions. [2019-12-07 10:49:29,727 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:49:29,727 INFO L276 IsEmpty]: Start isEmpty. Operand 6314 states and 18271 transitions. [2019-12-07 10:49:29,733 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 10:49:29,733 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:49:29,733 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:49:29,733 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:49:29,733 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:49:29,733 INFO L82 PathProgramCache]: Analyzing trace with hash 796962561, now seen corresponding path program 1 times [2019-12-07 10:49:29,734 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:49:29,734 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [384819857] [2019-12-07 10:49:29,734 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:49:29,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:49:29,782 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:49:29,782 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [384819857] [2019-12-07 10:49:29,783 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:49:29,783 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:49:29,783 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1675585169] [2019-12-07 10:49:29,783 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:49:29,783 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:49:29,783 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:49:29,783 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:49:29,783 INFO L87 Difference]: Start difference. First operand 6314 states and 18271 transitions. Second operand 3 states. [2019-12-07 10:49:29,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:49:29,804 INFO L93 Difference]: Finished difference Result 6014 states and 17128 transitions. [2019-12-07 10:49:29,804 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:49:29,804 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 10:49:29,804 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:49:29,809 INFO L225 Difference]: With dead ends: 6014 [2019-12-07 10:49:29,810 INFO L226 Difference]: Without dead ends: 6014 [2019-12-07 10:49:29,810 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:49:29,828 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6014 states. [2019-12-07 10:49:29,871 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6014 to 5226. [2019-12-07 10:49:29,871 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5226 states. [2019-12-07 10:49:29,877 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5226 states to 5226 states and 14892 transitions. [2019-12-07 10:49:29,877 INFO L78 Accepts]: Start accepts. Automaton has 5226 states and 14892 transitions. Word has length 66 [2019-12-07 10:49:29,877 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:49:29,877 INFO L462 AbstractCegarLoop]: Abstraction has 5226 states and 14892 transitions. [2019-12-07 10:49:29,878 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:49:29,878 INFO L276 IsEmpty]: Start isEmpty. Operand 5226 states and 14892 transitions. [2019-12-07 10:49:29,881 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:49:29,881 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:49:29,881 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:49:29,882 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:49:29,882 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:49:29,882 INFO L82 PathProgramCache]: Analyzing trace with hash 1385200921, now seen corresponding path program 1 times [2019-12-07 10:49:29,882 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:49:29,882 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [443998744] [2019-12-07 10:49:29,882 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:49:29,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:49:29,932 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:49:29,932 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [443998744] [2019-12-07 10:49:29,932 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:49:29,932 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 10:49:29,932 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1870476231] [2019-12-07 10:49:29,932 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 10:49:29,932 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:49:29,933 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 10:49:29,933 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 10:49:29,933 INFO L87 Difference]: Start difference. First operand 5226 states and 14892 transitions. Second operand 6 states. [2019-12-07 10:49:30,251 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:49:30,251 INFO L93 Difference]: Finished difference Result 8514 states and 23885 transitions. [2019-12-07 10:49:30,251 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 10:49:30,251 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 67 [2019-12-07 10:49:30,251 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:49:30,258 INFO L225 Difference]: With dead ends: 8514 [2019-12-07 10:49:30,258 INFO L226 Difference]: Without dead ends: 8514 [2019-12-07 10:49:30,259 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-07 10:49:30,282 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8514 states. [2019-12-07 10:49:30,334 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8514 to 5238. [2019-12-07 10:49:30,334 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5238 states. [2019-12-07 10:49:30,340 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5238 states to 5238 states and 14926 transitions. [2019-12-07 10:49:30,341 INFO L78 Accepts]: Start accepts. Automaton has 5238 states and 14926 transitions. Word has length 67 [2019-12-07 10:49:30,341 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:49:30,341 INFO L462 AbstractCegarLoop]: Abstraction has 5238 states and 14926 transitions. [2019-12-07 10:49:30,341 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 10:49:30,341 INFO L276 IsEmpty]: Start isEmpty. Operand 5238 states and 14926 transitions. [2019-12-07 10:49:30,345 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:49:30,345 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:49:30,345 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:49:30,345 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:49:30,345 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:49:30,345 INFO L82 PathProgramCache]: Analyzing trace with hash 1641001739, now seen corresponding path program 2 times [2019-12-07 10:49:30,345 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:49:30,345 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1746216638] [2019-12-07 10:49:30,345 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:49:30,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:49:30,534 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:49:30,534 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1746216638] [2019-12-07 10:49:30,534 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:49:30,534 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 10:49:30,534 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [930059598] [2019-12-07 10:49:30,534 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 10:49:30,534 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:49:30,535 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 10:49:30,535 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2019-12-07 10:49:30,535 INFO L87 Difference]: Start difference. First operand 5238 states and 14926 transitions. Second operand 12 states. [2019-12-07 10:49:30,807 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:49:30,807 INFO L93 Difference]: Finished difference Result 9824 states and 28104 transitions. [2019-12-07 10:49:30,807 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 10:49:30,807 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 10:49:30,808 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:49:30,815 INFO L225 Difference]: With dead ends: 9824 [2019-12-07 10:49:30,815 INFO L226 Difference]: Without dead ends: 9051 [2019-12-07 10:49:30,816 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 79 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=107, Invalid=399, Unknown=0, NotChecked=0, Total=506 [2019-12-07 10:49:30,839 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9051 states. [2019-12-07 10:49:30,896 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9051 to 6578. [2019-12-07 10:49:30,896 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6578 states. [2019-12-07 10:49:30,904 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6578 states to 6578 states and 18630 transitions. [2019-12-07 10:49:30,904 INFO L78 Accepts]: Start accepts. Automaton has 6578 states and 18630 transitions. Word has length 67 [2019-12-07 10:49:30,905 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:49:30,905 INFO L462 AbstractCegarLoop]: Abstraction has 6578 states and 18630 transitions. [2019-12-07 10:49:30,905 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 10:49:30,905 INFO L276 IsEmpty]: Start isEmpty. Operand 6578 states and 18630 transitions. [2019-12-07 10:49:30,910 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:49:30,910 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:49:30,910 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:49:30,910 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:49:30,910 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:49:30,910 INFO L82 PathProgramCache]: Analyzing trace with hash -62078829, now seen corresponding path program 3 times [2019-12-07 10:49:30,910 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:49:30,910 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [520203222] [2019-12-07 10:49:30,911 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:49:30,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:49:30,942 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:49:30,943 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [520203222] [2019-12-07 10:49:30,943 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:49:30,943 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:49:30,943 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1199528100] [2019-12-07 10:49:30,943 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:49:30,943 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:49:30,943 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:49:30,944 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:49:30,944 INFO L87 Difference]: Start difference. First operand 6578 states and 18630 transitions. Second operand 3 states. [2019-12-07 10:49:30,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:49:30,970 INFO L93 Difference]: Finished difference Result 6030 states and 16727 transitions. [2019-12-07 10:49:30,970 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:49:30,971 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-12-07 10:49:30,971 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:49:30,977 INFO L225 Difference]: With dead ends: 6030 [2019-12-07 10:49:30,977 INFO L226 Difference]: Without dead ends: 6030 [2019-12-07 10:49:30,978 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:49:31,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6030 states. [2019-12-07 10:49:31,043 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6030 to 5648. [2019-12-07 10:49:31,044 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5648 states. [2019-12-07 10:49:31,050 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5648 states to 5648 states and 15661 transitions. [2019-12-07 10:49:31,050 INFO L78 Accepts]: Start accepts. Automaton has 5648 states and 15661 transitions. Word has length 67 [2019-12-07 10:49:31,051 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:49:31,051 INFO L462 AbstractCegarLoop]: Abstraction has 5648 states and 15661 transitions. [2019-12-07 10:49:31,051 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:49:31,051 INFO L276 IsEmpty]: Start isEmpty. Operand 5648 states and 15661 transitions. [2019-12-07 10:49:31,055 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 10:49:31,055 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:49:31,055 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:49:31,055 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:49:31,056 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:49:31,056 INFO L82 PathProgramCache]: Analyzing trace with hash 1442657587, now seen corresponding path program 1 times [2019-12-07 10:49:31,056 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:49:31,056 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [826572961] [2019-12-07 10:49:31,056 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:49:31,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 10:49:31,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 10:49:31,150 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 10:49:31,150 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 10:49:31,153 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] ULTIMATE.startENTRY-->L803: Formula: (let ((.cse0 (store |v_#valid_58| 0 0))) (and (= v_~z$w_buff1~0_188 0) (= v_~weak$$choice2~0_132 0) (= v_~main$tmp_guard0~0_18 0) (= |v_#NULL.offset_6| 0) (= v_~z$r_buff0_thd1~0_211 0) (= v_~main$tmp_guard1~0_26 0) (= v_~z~0_153 0) (= 0 v_~z$r_buff0_thd3~0_107) (= v_~z$read_delayed_var~0.offset_7 0) (< 0 |v_#StackHeapBarrier_15|) (= |v_#valid_56| (store .cse0 |v_ULTIMATE.start_main_~#t2489~0.base_22| 1)) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t2489~0.base_22|) (= v_~z$mem_tmp~0_39 0) (= v_~z$r_buff0_thd2~0_110 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t2489~0.base_22|)) (= v_~z$r_buff1_thd1~0_172 0) (= 0 v_~z$flush_delayed~0_55) (= 0 |v_#NULL.base_6|) (= v_~z$read_delayed_var~0.base_7 0) (= v_~z$read_delayed~0_7 0) (= |v_#memory_int_19| (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t2489~0.base_22| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t2489~0.base_22|) |v_ULTIMATE.start_main_~#t2489~0.offset_17| 0))) (= v_~y~0_40 0) (= 0 v_~x~0_132) (= v_~__unbuffered_cnt~0_139 0) (= v_~z$w_buff1_used~0_438 0) (= v_~z$w_buff0~0_198 0) (= v_~z$r_buff1_thd0~0_288 0) (= |v_ULTIMATE.start_main_~#t2489~0.offset_17| 0) (= 0 v_~weak$$choice0~0_34) (= v_~z$w_buff0_used~0_699 0) (= 0 v_~z$r_buff1_thd3~0_190) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t2489~0.base_22| 4)) (= v_~z$r_buff1_thd2~0_178 0) (= v_~z$r_buff0_thd0~0_338 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_58|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_59|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_25|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_178, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_25|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_27|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_~#t2489~0.offset=|v_ULTIMATE.start_main_~#t2489~0.offset_17|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_135|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_42|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_37|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_23|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_44|, ULTIMATE.start_main_~#t2491~0.base=|v_ULTIMATE.start_main_~#t2491~0.base_19|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_34|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_338, ULTIMATE.start_main_~#t2491~0.offset=|v_ULTIMATE.start_main_~#t2491~0.offset_14|, #length=|v_#length_21|, ULTIMATE.start_main_~#t2489~0.base=|v_ULTIMATE.start_main_~#t2489~0.base_22|, ~z$mem_tmp~0=v_~z$mem_tmp~0_39, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_7|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_27|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_48|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_438, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_38|, ~z$flush_delayed~0=v_~z$flush_delayed~0_55, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_29|, ~weak$$choice0~0=v_~weak$$choice0~0_34, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_26|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_172, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_107, ULTIMATE.start_main_~#t2490~0.base=|v_ULTIMATE.start_main_~#t2490~0.base_21|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_139, ~x~0=v_~x~0_132, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_59|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_71|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_29|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_27|, ~z$w_buff1~0=v_~z$w_buff1~0_188, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_26, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_195|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_15|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_23|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_39|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_32|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_288, ~y~0=v_~y~0_40, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_110, ULTIMATE.start_main_~#t2490~0.offset=|v_ULTIMATE.start_main_~#t2490~0.offset_17|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_7|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_17|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_699, ~z$w_buff0~0=v_~z$w_buff0~0_198, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_190, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_39|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_56|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_18, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_23|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_44|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_30|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, #valid=|v_#valid_56|, #memory_int=|v_#memory_int_19|, ~z~0=v_~z~0_153, ~weak$$choice2~0=v_~weak$$choice2~0_132, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_211} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ULTIMATE.start_main_#t~ite28, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_~#t2489~0.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_~#t2491~0.base, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ULTIMATE.start_main_~#t2491~0.offset, #length, ULTIMATE.start_main_~#t2489~0.base, ~z$mem_tmp~0, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ~z$w_buff1_used~0, ULTIMATE.start_main_#t~ite37, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_~#t2490~0.base, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_#t~nondet31, ULTIMATE.start_main_#t~ite29, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t2490~0.offset, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ~z$w_buff0_used~0, ~z$w_buff0~0, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 10:49:31,153 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] P0ENTRY-->L4-3: Formula: (and (= |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_5| (ite (not (and (not (= 0 (mod v_~z$w_buff0_used~0_114 256))) (not (= 0 (mod v_~z$w_buff1_used~0_60 256))))) 1 0)) (= v_~z$w_buff0_used~0_115 v_~z$w_buff1_used~0_60) (= v_P0Thread1of1ForFork0_~arg.offset_5 |v_P0Thread1of1ForFork0_#in~arg.offset_7|) (= v_~z$w_buff0~0_27 v_~z$w_buff1~0_20) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_7 0)) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_7 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_5|) (= v_~z$w_buff0_used~0_114 1) (= v_P0Thread1of1ForFork0_~arg.base_5 |v_P0Thread1of1ForFork0_#in~arg.base_7|) (= 2 v_~z$w_buff0~0_26)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_7|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_115, ~z$w_buff0~0=v_~z$w_buff0~0_27, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_7|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_7|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_114, ~z$w_buff0~0=v_~z$w_buff0~0_26, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_7, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_60, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_7|, ~z$w_buff1~0=v_~z$w_buff1~0_20, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_5, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_5|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_5} AuxVars[] AssignedVars[~z$w_buff0_used~0, ~z$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~z$w_buff1_used~0, ~z$w_buff1~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 10:49:31,154 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [754] [754] L741-->L741-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In898880708 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In898880708 256)))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out898880708|) (not .cse1)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In898880708 |P0Thread1of1ForFork0_#t~ite5_Out898880708|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In898880708, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In898880708} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out898880708|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In898880708, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In898880708} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 10:49:31,154 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L803-1-->L805: Formula: (and (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t2490~0.base_9|) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t2490~0.base_9|)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2490~0.base_9| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2490~0.base_9|) |v_ULTIMATE.start_main_~#t2490~0.offset_9| 1)) |v_#memory_int_11|) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t2490~0.base_9| 4) |v_#length_13|) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t2490~0.base_9| 1)) (= |v_ULTIMATE.start_main_~#t2490~0.offset_9| 0) (not (= |v_ULTIMATE.start_main_~#t2490~0.base_9| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t2490~0.offset=|v_ULTIMATE.start_main_~#t2490~0.offset_9|, #StackHeapBarrier=|v_#StackHeapBarrier_8|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_4|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t2490~0.base=|v_ULTIMATE.start_main_~#t2490~0.base_9|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2490~0.offset, ULTIMATE.start_main_#t~nondet21, #valid, #memory_int, ULTIMATE.start_main_~#t2490~0.base, #length] because there is no mapped edge [2019-12-07 10:49:31,155 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [802] [802] L805-1-->L807: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t2491~0.base_13|)) (= 0 |v_ULTIMATE.start_main_~#t2491~0.offset_11|) (= |v_#valid_38| (store |v_#valid_39| |v_ULTIMATE.start_main_~#t2491~0.base_13| 1)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2491~0.base_13|) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t2491~0.base_13| 4) |v_#length_17|) (= |v_#memory_int_15| (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2491~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2491~0.base_13|) |v_ULTIMATE.start_main_~#t2491~0.offset_11| 2))) (= (select |v_#valid_39| |v_ULTIMATE.start_main_~#t2491~0.base_13|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t2491~0.base=|v_ULTIMATE.start_main_~#t2491~0.base_13|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t2491~0.offset=|v_ULTIMATE.start_main_~#t2491~0.offset_11|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_15|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2491~0.base, ULTIMATE.start_main_~#t2491~0.offset, ULTIMATE.start_main_#t~nondet22, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 10:49:31,156 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L760-2-->L760-4: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd2~0_In-1778705683 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In-1778705683 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite9_Out-1778705683| ~z$w_buff1~0_In-1778705683) (not .cse0) (not .cse1)) (and (= |P1Thread1of1ForFork1_#t~ite9_Out-1778705683| ~z~0_In-1778705683) (or .cse1 .cse0)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1778705683, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1778705683, ~z$w_buff1~0=~z$w_buff1~0_In-1778705683, ~z~0=~z~0_In-1778705683} OutVars{P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out-1778705683|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1778705683, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1778705683, ~z$w_buff1~0=~z$w_buff1~0_In-1778705683, ~z~0=~z~0_In-1778705683} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9] because there is no mapped edge [2019-12-07 10:49:31,156 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [706] [706] L760-4-->L761: Formula: (= |v_P1Thread1of1ForFork1_#t~ite9_8| v_~z~0_37) InVars {P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_8|} OutVars{P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_7|, P1Thread1of1ForFork1_#t~ite10=|v_P1Thread1of1ForFork1_#t~ite10_11|, ~z~0=v_~z~0_37} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10, ~z~0] because there is no mapped edge [2019-12-07 10:49:31,156 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L761-->L761-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In1290905860 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In1290905860 256)))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork1_#t~ite11_Out1290905860| 0)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite11_Out1290905860| ~z$w_buff0_used~0_In1290905860)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1290905860, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1290905860} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1290905860, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out1290905860|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1290905860} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 10:49:31,156 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L780-2-->L780-4: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In875920522 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In875920522 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite15_Out875920522| ~z~0_In875920522) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite15_Out875920522| ~z$w_buff1~0_In875920522)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In875920522, ~z$w_buff1_used~0=~z$w_buff1_used~0_In875920522, ~z$w_buff1~0=~z$w_buff1~0_In875920522, ~z~0=~z~0_In875920522} OutVars{P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out875920522|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In875920522, ~z$w_buff1_used~0=~z$w_buff1_used~0_In875920522, ~z$w_buff1~0=~z$w_buff1~0_In875920522, ~z~0=~z~0_In875920522} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 10:49:31,156 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [707] [707] L780-4-->L781: Formula: (= |v_P2Thread1of1ForFork2_#t~ite15_8| v_~z~0_41) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_8|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_7|, ~z~0=v_~z~0_41, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_13|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, ~z~0, P2Thread1of1ForFork2_#t~ite16] because there is no mapped edge [2019-12-07 10:49:31,157 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L781-->L781-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-928969378 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-928969378 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite17_Out-928969378| ~z$w_buff0_used~0_In-928969378)) (and (= 0 |P2Thread1of1ForFork2_#t~ite17_Out-928969378|) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-928969378, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-928969378} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-928969378, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-928969378, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out-928969378|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 10:49:31,157 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L782-->L782-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1982289347 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd3~0_In-1982289347 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1982289347 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In-1982289347 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork2_#t~ite18_Out-1982289347| 0)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= ~z$w_buff1_used~0_In-1982289347 |P2Thread1of1ForFork2_#t~ite18_Out-1982289347|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1982289347, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1982289347, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1982289347, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1982289347} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1982289347, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1982289347, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1982289347, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1982289347, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out-1982289347|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 10:49:31,157 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L762-->L762-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In-80802922 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-80802922 256))) (.cse3 (= (mod ~z$r_buff0_thd2~0_In-80802922 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-80802922 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite12_Out-80802922| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite12_Out-80802922| ~z$w_buff1_used~0_In-80802922) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-80802922, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-80802922, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-80802922, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-80802922} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-80802922, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-80802922, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-80802922, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-80802922|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-80802922} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 10:49:31,157 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L783-->L783-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-51037365 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-51037365 256)))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd3~0_In-51037365 |P2Thread1of1ForFork2_#t~ite19_Out-51037365|)) (and (= 0 |P2Thread1of1ForFork2_#t~ite19_Out-51037365|) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-51037365, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-51037365} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-51037365, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-51037365, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out-51037365|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 10:49:31,157 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L763-->L763-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-612522564 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd2~0_In-612522564 256) 0))) (or (and (= ~z$r_buff0_thd2~0_In-612522564 |P1Thread1of1ForFork1_#t~ite13_Out-612522564|) (or .cse0 .cse1)) (and (= 0 |P1Thread1of1ForFork1_#t~ite13_Out-612522564|) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-612522564, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-612522564} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-612522564, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-612522564|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-612522564} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 10:49:31,158 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L764-->L764-2: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd2~0_In1794859058 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In1794859058 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In1794859058 256))) (.cse2 (= (mod ~z$r_buff0_thd2~0_In1794859058 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite14_Out1794859058| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse3 .cse2) (= |P1Thread1of1ForFork1_#t~ite14_Out1794859058| ~z$r_buff1_thd2~0_In1794859058)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1794859058, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1794859058, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1794859058, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1794859058} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1794859058, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1794859058, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1794859058, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out1794859058|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1794859058} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 10:49:31,158 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L764-2-->P1EXIT: Formula: (and (= v_~z$r_buff1_thd2~0_130 |v_P1Thread1of1ForFork1_#t~ite14_38|) (= (+ v_~__unbuffered_cnt~0_70 1) v_~__unbuffered_cnt~0_69) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_38|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_130, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_37|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 10:49:31,158 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] L784-->L784-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1412388756 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In-1412388756 256))) (.cse2 (= (mod ~z$r_buff0_thd3~0_In-1412388756 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1412388756 256)))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite20_Out-1412388756|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork2_#t~ite20_Out-1412388756| ~z$r_buff1_thd3~0_In-1412388756)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1412388756, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1412388756, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1412388756, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1412388756} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1412388756, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out-1412388756|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1412388756, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1412388756, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1412388756} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 10:49:31,158 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L784-2-->P2EXIT: Formula: (and (= v_~z$r_buff1_thd3~0_148 |v_P2Thread1of1ForFork2_#t~ite20_34|) (= (+ v_~__unbuffered_cnt~0_80 1) v_~__unbuffered_cnt~0_79) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0)) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_80} OutVars{P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_33|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_148, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, ~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 10:49:31,158 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L742-->L742-2: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd1~0_In-2039380594 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-2039380594 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-2039380594 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd1~0_In-2039380594 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite6_Out-2039380594| 0)) (and (or .cse0 .cse1) (= |P0Thread1of1ForFork0_#t~ite6_Out-2039380594| ~z$w_buff1_used~0_In-2039380594) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-2039380594, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-2039380594, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2039380594, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-2039380594} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-2039380594|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2039380594, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-2039380594, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2039380594, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-2039380594} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 10:49:31,159 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L743-->L744: Formula: (let ((.cse1 (= ~z$r_buff0_thd1~0_In-1189064342 ~z$r_buff0_thd1~0_Out-1189064342)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1189064342 256))) (.cse2 (= (mod ~z$r_buff0_thd1~0_In-1189064342 256) 0))) (or (and .cse0 .cse1) (and .cse1 .cse2) (and (= ~z$r_buff0_thd1~0_Out-1189064342 0) (not .cse0) (not .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1189064342, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1189064342} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1189064342, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-1189064342|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-1189064342} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 10:49:31,159 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L744-->L744-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff0_used~0_In1228209859 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In1228209859 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In1228209859 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd1~0_In1228209859 256)))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork0_#t~ite8_Out1228209859| ~z$r_buff1_thd1~0_In1228209859) (or .cse2 .cse3)) (and (= |P0Thread1of1ForFork0_#t~ite8_Out1228209859| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1228209859, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1228209859, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1228209859, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1228209859} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1228209859, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out1228209859|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1228209859, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1228209859, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1228209859} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 10:49:31,159 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [792] [792] L744-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~z$r_buff1_thd1~0_118 |v_P0Thread1of1ForFork0_#t~ite8_36|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_64 1) v_~__unbuffered_cnt~0_63)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_64} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_35|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_118, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, ~z$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 10:49:31,159 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [705] [705] L807-1-->L813: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 10:49:31,159 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [753] [753] L813-2-->L813-5: Formula: (let ((.cse2 (= (mod ~z$r_buff1_thd0~0_In-989057550 256) 0)) (.cse0 (= |ULTIMATE.start_main_#t~ite24_Out-989057550| |ULTIMATE.start_main_#t~ite25_Out-989057550|)) (.cse1 (= (mod ~z$w_buff1_used~0_In-989057550 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite24_Out-989057550| ~z~0_In-989057550) .cse0 (or .cse1 .cse2)) (and (= |ULTIMATE.start_main_#t~ite24_Out-989057550| ~z$w_buff1~0_In-989057550) (not .cse2) .cse0 (not .cse1)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-989057550, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-989057550, ~z$w_buff1~0=~z$w_buff1~0_In-989057550, ~z~0=~z~0_In-989057550} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-989057550, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out-989057550|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-989057550, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out-989057550|, ~z$w_buff1~0=~z$w_buff1~0_In-989057550, ~z~0=~z~0_In-989057550} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 10:49:31,159 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L814-->L814-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In1162972327 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In1162972327 256) 0))) (or (and (= ~z$w_buff0_used~0_In1162972327 |ULTIMATE.start_main_#t~ite26_Out1162972327|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite26_Out1162972327|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1162972327, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1162972327} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1162972327, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1162972327, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out1162972327|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 10:49:31,160 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L815-->L815-2: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In-1299200421 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd0~0_In-1299200421 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In-1299200421 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd0~0_In-1299200421 256)))) (or (and (= ~z$w_buff1_used~0_In-1299200421 |ULTIMATE.start_main_#t~ite27_Out-1299200421|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |ULTIMATE.start_main_#t~ite27_Out-1299200421|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1299200421, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1299200421, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1299200421, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1299200421} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1299200421, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1299200421, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1299200421, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1299200421, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out-1299200421|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 10:49:31,160 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L816-->L816-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1680523031 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In1680523031 256)))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In1680523031 |ULTIMATE.start_main_#t~ite28_Out1680523031|)) (and (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite28_Out1680523031|) (not .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1680523031, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1680523031} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1680523031, ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out1680523031|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1680523031} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 10:49:31,160 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L817-->L817-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In2048722628 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In2048722628 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In2048722628 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In2048722628 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite29_Out2048722628|)) (and (= ~z$r_buff1_thd0~0_In2048722628 |ULTIMATE.start_main_#t~ite29_Out2048722628|) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2048722628, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2048722628, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In2048722628, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2048722628} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2048722628, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out2048722628|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2048722628, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In2048722628, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2048722628} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 10:49:31,163 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [751] [751] L829-->L830: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_46 256))) (= v_~z$r_buff0_thd0~0_162 v_~z$r_buff0_thd0~0_161)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_162, ~weak$$choice2~0=v_~weak$$choice2~0_46} OutVars{~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_161, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_10|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_17|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_7|, ~weak$$choice2~0=v_~weak$$choice2~0_46} AuxVars[] AssignedVars[~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 10:49:31,163 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L832-->L4: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8| (mod v_~main$tmp_guard1~0_15 256)) (not (= (mod v_~z$flush_delayed~0_47 256) 0)) (= 0 v_~z$flush_delayed~0_46) (= v_~z$mem_tmp~0_33 v_~z~0_120)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_33, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_15, ~z$flush_delayed~0=v_~z$flush_delayed~0_47} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_33, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_28|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_15, ~z$flush_delayed~0=v_~z$flush_delayed~0_46, ~z~0=v_~z~0_120, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 10:49:31,163 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [780] [780] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_8 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_8 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_8, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 10:49:31,225 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 10:49:31 BasicIcfg [2019-12-07 10:49:31,225 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 10:49:31,225 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 10:49:31,225 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 10:49:31,226 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 10:49:31,226 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:48:45" (3/4) ... [2019-12-07 10:49:31,228 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 10:49:31,228 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] ULTIMATE.startENTRY-->L803: Formula: (let ((.cse0 (store |v_#valid_58| 0 0))) (and (= v_~z$w_buff1~0_188 0) (= v_~weak$$choice2~0_132 0) (= v_~main$tmp_guard0~0_18 0) (= |v_#NULL.offset_6| 0) (= v_~z$r_buff0_thd1~0_211 0) (= v_~main$tmp_guard1~0_26 0) (= v_~z~0_153 0) (= 0 v_~z$r_buff0_thd3~0_107) (= v_~z$read_delayed_var~0.offset_7 0) (< 0 |v_#StackHeapBarrier_15|) (= |v_#valid_56| (store .cse0 |v_ULTIMATE.start_main_~#t2489~0.base_22| 1)) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t2489~0.base_22|) (= v_~z$mem_tmp~0_39 0) (= v_~z$r_buff0_thd2~0_110 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t2489~0.base_22|)) (= v_~z$r_buff1_thd1~0_172 0) (= 0 v_~z$flush_delayed~0_55) (= 0 |v_#NULL.base_6|) (= v_~z$read_delayed_var~0.base_7 0) (= v_~z$read_delayed~0_7 0) (= |v_#memory_int_19| (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t2489~0.base_22| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t2489~0.base_22|) |v_ULTIMATE.start_main_~#t2489~0.offset_17| 0))) (= v_~y~0_40 0) (= 0 v_~x~0_132) (= v_~__unbuffered_cnt~0_139 0) (= v_~z$w_buff1_used~0_438 0) (= v_~z$w_buff0~0_198 0) (= v_~z$r_buff1_thd0~0_288 0) (= |v_ULTIMATE.start_main_~#t2489~0.offset_17| 0) (= 0 v_~weak$$choice0~0_34) (= v_~z$w_buff0_used~0_699 0) (= 0 v_~z$r_buff1_thd3~0_190) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t2489~0.base_22| 4)) (= v_~z$r_buff1_thd2~0_178 0) (= v_~z$r_buff0_thd0~0_338 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_58|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_59|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_25|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_178, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_25|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_27|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_~#t2489~0.offset=|v_ULTIMATE.start_main_~#t2489~0.offset_17|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_135|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_42|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_37|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_23|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_44|, ULTIMATE.start_main_~#t2491~0.base=|v_ULTIMATE.start_main_~#t2491~0.base_19|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_34|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_338, ULTIMATE.start_main_~#t2491~0.offset=|v_ULTIMATE.start_main_~#t2491~0.offset_14|, #length=|v_#length_21|, ULTIMATE.start_main_~#t2489~0.base=|v_ULTIMATE.start_main_~#t2489~0.base_22|, ~z$mem_tmp~0=v_~z$mem_tmp~0_39, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_7|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_27|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_48|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_438, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_38|, ~z$flush_delayed~0=v_~z$flush_delayed~0_55, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_29|, ~weak$$choice0~0=v_~weak$$choice0~0_34, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_26|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_172, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_107, ULTIMATE.start_main_~#t2490~0.base=|v_ULTIMATE.start_main_~#t2490~0.base_21|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_139, ~x~0=v_~x~0_132, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_59|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_71|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_29|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_27|, ~z$w_buff1~0=v_~z$w_buff1~0_188, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_26, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_195|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_15|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_23|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_39|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_32|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_288, ~y~0=v_~y~0_40, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_110, ULTIMATE.start_main_~#t2490~0.offset=|v_ULTIMATE.start_main_~#t2490~0.offset_17|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_7|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_17|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_699, ~z$w_buff0~0=v_~z$w_buff0~0_198, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_190, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_39|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_56|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_18, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_23|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_44|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_30|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, #valid=|v_#valid_56|, #memory_int=|v_#memory_int_19|, ~z~0=v_~z~0_153, ~weak$$choice2~0=v_~weak$$choice2~0_132, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_211} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ULTIMATE.start_main_#t~ite28, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_~#t2489~0.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_~#t2491~0.base, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ULTIMATE.start_main_~#t2491~0.offset, #length, ULTIMATE.start_main_~#t2489~0.base, ~z$mem_tmp~0, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ~z$w_buff1_used~0, ULTIMATE.start_main_#t~ite37, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ULTIMATE.start_main_~#t2490~0.base, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_#t~nondet31, ULTIMATE.start_main_#t~ite29, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t2490~0.offset, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ~z$w_buff0_used~0, ~z$w_buff0~0, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 10:49:31,228 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] P0ENTRY-->L4-3: Formula: (and (= |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_5| (ite (not (and (not (= 0 (mod v_~z$w_buff0_used~0_114 256))) (not (= 0 (mod v_~z$w_buff1_used~0_60 256))))) 1 0)) (= v_~z$w_buff0_used~0_115 v_~z$w_buff1_used~0_60) (= v_P0Thread1of1ForFork0_~arg.offset_5 |v_P0Thread1of1ForFork0_#in~arg.offset_7|) (= v_~z$w_buff0~0_27 v_~z$w_buff1~0_20) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_7 0)) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_7 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_5|) (= v_~z$w_buff0_used~0_114 1) (= v_P0Thread1of1ForFork0_~arg.base_5 |v_P0Thread1of1ForFork0_#in~arg.base_7|) (= 2 v_~z$w_buff0~0_26)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_7|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_115, ~z$w_buff0~0=v_~z$w_buff0~0_27, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_7|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_7|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_114, ~z$w_buff0~0=v_~z$w_buff0~0_26, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_7, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_60, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_7|, ~z$w_buff1~0=v_~z$w_buff1~0_20, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_5, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_5|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_5} AuxVars[] AssignedVars[~z$w_buff0_used~0, ~z$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~z$w_buff1_used~0, ~z$w_buff1~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 10:49:31,229 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [754] [754] L741-->L741-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In898880708 256))) (.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In898880708 256)))) (or (and (not .cse0) (= 0 |P0Thread1of1ForFork0_#t~ite5_Out898880708|) (not .cse1)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In898880708 |P0Thread1of1ForFork0_#t~ite5_Out898880708|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In898880708, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In898880708} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out898880708|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In898880708, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In898880708} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 10:49:31,229 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L803-1-->L805: Formula: (and (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t2490~0.base_9|) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t2490~0.base_9|)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2490~0.base_9| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2490~0.base_9|) |v_ULTIMATE.start_main_~#t2490~0.offset_9| 1)) |v_#memory_int_11|) (= (store |v_#length_14| |v_ULTIMATE.start_main_~#t2490~0.base_9| 4) |v_#length_13|) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t2490~0.base_9| 1)) (= |v_ULTIMATE.start_main_~#t2490~0.offset_9| 0) (not (= |v_ULTIMATE.start_main_~#t2490~0.base_9| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t2490~0.offset=|v_ULTIMATE.start_main_~#t2490~0.offset_9|, #StackHeapBarrier=|v_#StackHeapBarrier_8|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_4|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_11|, ULTIMATE.start_main_~#t2490~0.base=|v_ULTIMATE.start_main_~#t2490~0.base_9|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2490~0.offset, ULTIMATE.start_main_#t~nondet21, #valid, #memory_int, ULTIMATE.start_main_~#t2490~0.base, #length] because there is no mapped edge [2019-12-07 10:49:31,229 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [802] [802] L805-1-->L807: Formula: (and (not (= 0 |v_ULTIMATE.start_main_~#t2491~0.base_13|)) (= 0 |v_ULTIMATE.start_main_~#t2491~0.offset_11|) (= |v_#valid_38| (store |v_#valid_39| |v_ULTIMATE.start_main_~#t2491~0.base_13| 1)) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2491~0.base_13|) (= (store |v_#length_18| |v_ULTIMATE.start_main_~#t2491~0.base_13| 4) |v_#length_17|) (= |v_#memory_int_15| (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2491~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2491~0.base_13|) |v_ULTIMATE.start_main_~#t2491~0.offset_11| 2))) (= (select |v_#valid_39| |v_ULTIMATE.start_main_~#t2491~0.base_13|) 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t2491~0.base=|v_ULTIMATE.start_main_~#t2491~0.base_13|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_~#t2491~0.offset=|v_ULTIMATE.start_main_~#t2491~0.offset_11|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_15|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2491~0.base, ULTIMATE.start_main_~#t2491~0.offset, ULTIMATE.start_main_#t~nondet22, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 10:49:31,230 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L760-2-->L760-4: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd2~0_In-1778705683 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In-1778705683 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite9_Out-1778705683| ~z$w_buff1~0_In-1778705683) (not .cse0) (not .cse1)) (and (= |P1Thread1of1ForFork1_#t~ite9_Out-1778705683| ~z~0_In-1778705683) (or .cse1 .cse0)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1778705683, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1778705683, ~z$w_buff1~0=~z$w_buff1~0_In-1778705683, ~z~0=~z~0_In-1778705683} OutVars{P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out-1778705683|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1778705683, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1778705683, ~z$w_buff1~0=~z$w_buff1~0_In-1778705683, ~z~0=~z~0_In-1778705683} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9] because there is no mapped edge [2019-12-07 10:49:31,231 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [706] [706] L760-4-->L761: Formula: (= |v_P1Thread1of1ForFork1_#t~ite9_8| v_~z~0_37) InVars {P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_8|} OutVars{P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_7|, P1Thread1of1ForFork1_#t~ite10=|v_P1Thread1of1ForFork1_#t~ite10_11|, ~z~0=v_~z~0_37} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10, ~z~0] because there is no mapped edge [2019-12-07 10:49:31,231 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L761-->L761-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In1290905860 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In1290905860 256)))) (or (and (not .cse0) (not .cse1) (= |P1Thread1of1ForFork1_#t~ite11_Out1290905860| 0)) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite11_Out1290905860| ~z$w_buff0_used~0_In1290905860)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1290905860, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1290905860} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1290905860, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out1290905860|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1290905860} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 10:49:31,231 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L780-2-->L780-4: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In875920522 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In875920522 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite15_Out875920522| ~z~0_In875920522) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite15_Out875920522| ~z$w_buff1~0_In875920522)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In875920522, ~z$w_buff1_used~0=~z$w_buff1_used~0_In875920522, ~z$w_buff1~0=~z$w_buff1~0_In875920522, ~z~0=~z~0_In875920522} OutVars{P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out875920522|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In875920522, ~z$w_buff1_used~0=~z$w_buff1_used~0_In875920522, ~z$w_buff1~0=~z$w_buff1~0_In875920522, ~z~0=~z~0_In875920522} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 10:49:31,231 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [707] [707] L780-4-->L781: Formula: (= |v_P2Thread1of1ForFork2_#t~ite15_8| v_~z~0_41) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_8|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_7|, ~z~0=v_~z~0_41, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_13|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, ~z~0, P2Thread1of1ForFork2_#t~ite16] because there is no mapped edge [2019-12-07 10:49:31,231 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L781-->L781-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-928969378 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-928969378 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite17_Out-928969378| ~z$w_buff0_used~0_In-928969378)) (and (= 0 |P2Thread1of1ForFork2_#t~ite17_Out-928969378|) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-928969378, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-928969378} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-928969378, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-928969378, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out-928969378|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 10:49:31,231 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L782-->L782-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1982289347 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd3~0_In-1982289347 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1982289347 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd3~0_In-1982289347 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork2_#t~ite18_Out-1982289347| 0)) (and (or .cse3 .cse2) (or .cse1 .cse0) (= ~z$w_buff1_used~0_In-1982289347 |P2Thread1of1ForFork2_#t~ite18_Out-1982289347|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1982289347, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1982289347, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1982289347, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1982289347} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1982289347, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1982289347, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1982289347, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1982289347, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out-1982289347|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 10:49:31,231 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L762-->L762-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd2~0_In-80802922 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-80802922 256))) (.cse3 (= (mod ~z$r_buff0_thd2~0_In-80802922 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-80802922 256)))) (or (and (= |P1Thread1of1ForFork1_#t~ite12_Out-80802922| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (= |P1Thread1of1ForFork1_#t~ite12_Out-80802922| ~z$w_buff1_used~0_In-80802922) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-80802922, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-80802922, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-80802922, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-80802922} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-80802922, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-80802922, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-80802922, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-80802922|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-80802922} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 10:49:31,232 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L783-->L783-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-51037365 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-51037365 256)))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd3~0_In-51037365 |P2Thread1of1ForFork2_#t~ite19_Out-51037365|)) (and (= 0 |P2Thread1of1ForFork2_#t~ite19_Out-51037365|) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-51037365, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-51037365} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-51037365, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-51037365, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out-51037365|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 10:49:31,232 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L763-->L763-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-612522564 256) 0)) (.cse1 (= (mod ~z$r_buff0_thd2~0_In-612522564 256) 0))) (or (and (= ~z$r_buff0_thd2~0_In-612522564 |P1Thread1of1ForFork1_#t~ite13_Out-612522564|) (or .cse0 .cse1)) (and (= 0 |P1Thread1of1ForFork1_#t~ite13_Out-612522564|) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-612522564, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-612522564} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-612522564, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-612522564|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-612522564} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 10:49:31,232 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L764-->L764-2: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd2~0_In1794859058 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In1794859058 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In1794859058 256))) (.cse2 (= (mod ~z$r_buff0_thd2~0_In1794859058 256) 0))) (or (and (= |P1Thread1of1ForFork1_#t~ite14_Out1794859058| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse3 .cse2) (= |P1Thread1of1ForFork1_#t~ite14_Out1794859058| ~z$r_buff1_thd2~0_In1794859058)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1794859058, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1794859058, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1794859058, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1794859058} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1794859058, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1794859058, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1794859058, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out1794859058|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1794859058} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 10:49:31,232 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L764-2-->P1EXIT: Formula: (and (= v_~z$r_buff1_thd2~0_130 |v_P1Thread1of1ForFork1_#t~ite14_38|) (= (+ v_~__unbuffered_cnt~0_70 1) v_~__unbuffered_cnt~0_69) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_38|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_130, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_37|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 10:49:31,233 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] L784-->L784-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1412388756 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In-1412388756 256))) (.cse2 (= (mod ~z$r_buff0_thd3~0_In-1412388756 256) 0)) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-1412388756 256)))) (or (and (= 0 |P2Thread1of1ForFork2_#t~ite20_Out-1412388756|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork2_#t~ite20_Out-1412388756| ~z$r_buff1_thd3~0_In-1412388756)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1412388756, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1412388756, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1412388756, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1412388756} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1412388756, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out-1412388756|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1412388756, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1412388756, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1412388756} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 10:49:31,233 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L784-2-->P2EXIT: Formula: (and (= v_~z$r_buff1_thd3~0_148 |v_P2Thread1of1ForFork2_#t~ite20_34|) (= (+ v_~__unbuffered_cnt~0_80 1) v_~__unbuffered_cnt~0_79) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0)) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_80} OutVars{P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_33|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_148, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, ~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 10:49:31,233 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L742-->L742-2: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd1~0_In-2039380594 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-2039380594 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-2039380594 256))) (.cse3 (= 0 (mod ~z$r_buff0_thd1~0_In-2039380594 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork0_#t~ite6_Out-2039380594| 0)) (and (or .cse0 .cse1) (= |P0Thread1of1ForFork0_#t~ite6_Out-2039380594| ~z$w_buff1_used~0_In-2039380594) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-2039380594, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-2039380594, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2039380594, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-2039380594} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-2039380594|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-2039380594, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-2039380594, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-2039380594, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-2039380594} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 10:49:31,233 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L743-->L744: Formula: (let ((.cse1 (= ~z$r_buff0_thd1~0_In-1189064342 ~z$r_buff0_thd1~0_Out-1189064342)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1189064342 256))) (.cse2 (= (mod ~z$r_buff0_thd1~0_In-1189064342 256) 0))) (or (and .cse0 .cse1) (and .cse1 .cse2) (and (= ~z$r_buff0_thd1~0_Out-1189064342 0) (not .cse0) (not .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1189064342, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-1189064342} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1189064342, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out-1189064342|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-1189064342} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 10:49:31,233 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L744-->L744-2: Formula: (let ((.cse3 (= 0 (mod ~z$w_buff0_used~0_In1228209859 256))) (.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In1228209859 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In1228209859 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd1~0_In1228209859 256)))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork0_#t~ite8_Out1228209859| ~z$r_buff1_thd1~0_In1228209859) (or .cse2 .cse3)) (and (= |P0Thread1of1ForFork0_#t~ite8_Out1228209859| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1228209859, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1228209859, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1228209859, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1228209859} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1228209859, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out1228209859|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1228209859, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1228209859, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1228209859} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 10:49:31,233 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [792] [792] L744-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~z$r_buff1_thd1~0_118 |v_P0Thread1of1ForFork0_#t~ite8_36|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_64 1) v_~__unbuffered_cnt~0_63)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_64} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_35|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_118, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, ~z$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 10:49:31,233 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [705] [705] L807-1-->L813: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 10:49:31,233 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [753] [753] L813-2-->L813-5: Formula: (let ((.cse2 (= (mod ~z$r_buff1_thd0~0_In-989057550 256) 0)) (.cse0 (= |ULTIMATE.start_main_#t~ite24_Out-989057550| |ULTIMATE.start_main_#t~ite25_Out-989057550|)) (.cse1 (= (mod ~z$w_buff1_used~0_In-989057550 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite24_Out-989057550| ~z~0_In-989057550) .cse0 (or .cse1 .cse2)) (and (= |ULTIMATE.start_main_#t~ite24_Out-989057550| ~z$w_buff1~0_In-989057550) (not .cse2) .cse0 (not .cse1)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-989057550, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-989057550, ~z$w_buff1~0=~z$w_buff1~0_In-989057550, ~z~0=~z~0_In-989057550} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-989057550, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out-989057550|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-989057550, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out-989057550|, ~z$w_buff1~0=~z$w_buff1~0_In-989057550, ~z~0=~z~0_In-989057550} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 10:49:31,234 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L814-->L814-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In1162972327 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In1162972327 256) 0))) (or (and (= ~z$w_buff0_used~0_In1162972327 |ULTIMATE.start_main_#t~ite26_Out1162972327|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite26_Out1162972327|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1162972327, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1162972327} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1162972327, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1162972327, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out1162972327|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 10:49:31,234 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L815-->L815-2: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In-1299200421 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd0~0_In-1299200421 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In-1299200421 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd0~0_In-1299200421 256)))) (or (and (= ~z$w_buff1_used~0_In-1299200421 |ULTIMATE.start_main_#t~ite27_Out-1299200421|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |ULTIMATE.start_main_#t~ite27_Out-1299200421|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1299200421, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1299200421, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1299200421, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1299200421} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1299200421, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1299200421, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1299200421, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1299200421, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out-1299200421|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 10:49:31,234 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L816-->L816-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In1680523031 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In1680523031 256)))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd0~0_In1680523031 |ULTIMATE.start_main_#t~ite28_Out1680523031|)) (and (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite28_Out1680523031|) (not .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1680523031, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1680523031} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1680523031, ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out1680523031|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1680523031} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 10:49:31,235 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L817-->L817-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In2048722628 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In2048722628 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In2048722628 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In2048722628 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite29_Out2048722628|)) (and (= ~z$r_buff1_thd0~0_In2048722628 |ULTIMATE.start_main_#t~ite29_Out2048722628|) (or .cse1 .cse0) (or .cse2 .cse3)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2048722628, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2048722628, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In2048722628, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2048722628} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2048722628, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out2048722628|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2048722628, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In2048722628, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2048722628} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 10:49:31,237 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [751] [751] L829-->L830: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_46 256))) (= v_~z$r_buff0_thd0~0_162 v_~z$r_buff0_thd0~0_161)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_162, ~weak$$choice2~0=v_~weak$$choice2~0_46} OutVars{~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_161, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_10|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_17|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_7|, ~weak$$choice2~0=v_~weak$$choice2~0_46} AuxVars[] AssignedVars[~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 10:49:31,237 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L832-->L4: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8| (mod v_~main$tmp_guard1~0_15 256)) (not (= (mod v_~z$flush_delayed~0_47 256) 0)) (= 0 v_~z$flush_delayed~0_46) (= v_~z$mem_tmp~0_33 v_~z~0_120)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_33, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_15, ~z$flush_delayed~0=v_~z$flush_delayed~0_47} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_33, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_28|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_15, ~z$flush_delayed~0=v_~z$flush_delayed~0_46, ~z~0=v_~z~0_120, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 10:49:31,237 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [780] [780] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_8 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_8 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_8, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 10:49:31,309 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_1b4d415f-4b29-4f1e-ace5-02c859baecd6/bin/uautomizer/witness.graphml [2019-12-07 10:49:31,309 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 10:49:31,310 INFO L168 Benchmark]: Toolchain (without parser) took 46400.22 ms. Allocated memory was 1.0 GB in the beginning and 5.9 GB in the end (delta: 4.9 GB). Free memory was 939.3 MB in the beginning and 1.6 GB in the end (delta: -632.7 MB). Peak memory consumption was 4.2 GB. Max. memory is 11.5 GB. [2019-12-07 10:49:31,310 INFO L168 Benchmark]: CDTParser took 0.18 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 10:49:31,311 INFO L168 Benchmark]: CACSL2BoogieTranslator took 382.56 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 87.6 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -114.6 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. [2019-12-07 10:49:31,311 INFO L168 Benchmark]: Boogie Procedure Inliner took 42.25 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 10:49:31,311 INFO L168 Benchmark]: Boogie Preprocessor took 26.88 ms. Allocated memory is still 1.1 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 10:49:31,312 INFO L168 Benchmark]: RCFGBuilder took 418.88 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 994.0 MB in the end (delta: 54.6 MB). Peak memory consumption was 54.6 MB. Max. memory is 11.5 GB. [2019-12-07 10:49:31,312 INFO L168 Benchmark]: TraceAbstraction took 45442.29 ms. Allocated memory was 1.1 GB in the beginning and 5.9 GB in the end (delta: 4.8 GB). Free memory was 994.0 MB in the beginning and 1.6 GB in the end (delta: -633.8 MB). Peak memory consumption was 4.2 GB. Max. memory is 11.5 GB. [2019-12-07 10:49:31,312 INFO L168 Benchmark]: Witness Printer took 83.70 ms. Allocated memory is still 5.9 GB. Free memory was 1.6 GB in the beginning and 1.6 GB in the end (delta: 55.7 MB). Peak memory consumption was 55.7 MB. Max. memory is 11.5 GB. [2019-12-07 10:49:31,314 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 382.56 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 87.6 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -114.6 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 42.25 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.88 ms. Allocated memory is still 1.1 GB. Free memory is still 1.0 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 418.88 ms. Allocated memory is still 1.1 GB. Free memory was 1.0 GB in the beginning and 994.0 MB in the end (delta: 54.6 MB). Peak memory consumption was 54.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 45442.29 ms. Allocated memory was 1.1 GB in the beginning and 5.9 GB in the end (delta: 4.8 GB). Free memory was 994.0 MB in the beginning and 1.6 GB in the end (delta: -633.8 MB). Peak memory consumption was 4.2 GB. Max. memory is 11.5 GB. * Witness Printer took 83.70 ms. Allocated memory is still 5.9 GB. Free memory was 1.6 GB in the beginning and 1.6 GB in the end (delta: 55.7 MB). Peak memory consumption was 55.7 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 2.8s, 173 ProgramPointsBefore, 95 ProgramPointsAfterwards, 210 TransitionsBefore, 107 TransitionsAfterwards, 17114 CoEnabledTransitionPairs, 7 FixpointIterations, 30 TrivialSequentialCompositions, 42 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 38 ConcurrentYvCompositions, 29 ChoiceCompositions, 5611 VarBasedMoverChecksPositive, 231 VarBasedMoverChecksNegative, 69 SemBasedMoverChecksPositive, 225 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.7s, 0 MoverChecksTotal, 79634 CheckedPairsTotal, 110 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L803] FCALL, FORK 0 pthread_create(&t2489, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L730] 1 z$r_buff1_thd0 = z$r_buff0_thd0 [L731] 1 z$r_buff1_thd1 = z$r_buff0_thd1 [L732] 1 z$r_buff1_thd2 = z$r_buff0_thd2 [L733] 1 z$r_buff1_thd3 = z$r_buff0_thd3 [L734] 1 z$r_buff0_thd1 = (_Bool)1 [L737] 1 x = 1 VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L740] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L740] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L741] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L805] FCALL, FORK 0 pthread_create(&t2490, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L807] FCALL, FORK 0 pthread_create(&t2491, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L754] 2 x = 2 [L757] 2 y = 1 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L760] 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L774] 3 y = 2 [L777] 3 z = 1 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z=2] [L780] 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z=2] [L761] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L781] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L762] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L782] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L763] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L783] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L742] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L813] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L813] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L814] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L815] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L816] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 [L817] 0 z$r_buff1_thd0 = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 [L820] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L821] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L822] 0 z$flush_delayed = weak$$choice2 [L823] 0 z$mem_tmp = z VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L824] EXPR 0 !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L824] 0 z = !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) [L825] EXPR 0 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L825] 0 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) [L826] EXPR 0 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L826] 0 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) [L827] EXPR 0 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L827] 0 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used)) [L828] EXPR 0 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L828] 0 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L830] EXPR 0 weak$$choice2 ? z$r_buff1_thd0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$r_buff1_thd0 : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L830] 0 z$r_buff1_thd0 = weak$$choice2 ? z$r_buff1_thd0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$r_buff1_thd0 : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L831] 0 main$tmp_guard1 = !(x == 2 && y == 2 && z == 2) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 164 locations, 2 error locations. Result: UNSAFE, OverallTime: 45.2s, OverallIterations: 19, TraceHistogramMax: 1, AutomataDifference: 6.6s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 3384 SDtfs, 2708 SDslu, 7161 SDs, 0 SdLazy, 3822 SolverSat, 137 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 143 GetRequests, 25 SyntacticMatches, 21 SemanticMatches, 97 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 154 ImplicationChecksByTransitivity, 0.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=162745occurred in iteration=2, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 20.3s AutomataMinimizationTime, 18 MinimizatonAttempts, 57773 StatesRemovedByMinimization, 16 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.8s InterpolantComputationTime, 829 NumberOfCodeBlocks, 829 NumberOfCodeBlocksAsserted, 19 NumberOfCheckSat, 743 ConstructedInterpolants, 0 QuantifiedInterpolants, 148079 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 18 InterpolantComputations, 18 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...