./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe030_rmo.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_831d22dc-e084-461c-9e9f-fd745810e9c8/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_831d22dc-e084-461c-9e9f-fd745810e9c8/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_831d22dc-e084-461c-9e9f-fd745810e9c8/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_831d22dc-e084-461c-9e9f-fd745810e9c8/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe030_rmo.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_831d22dc-e084-461c-9e9f-fd745810e9c8/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_831d22dc-e084-461c-9e9f-fd745810e9c8/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 12555ed3665e558016bc8373ba4e7fae9d05feba ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 13:47:18,236 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 13:47:18,237 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 13:47:18,244 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 13:47:18,245 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 13:47:18,245 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 13:47:18,246 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 13:47:18,248 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 13:47:18,249 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 13:47:18,249 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 13:47:18,250 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 13:47:18,251 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 13:47:18,251 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 13:47:18,252 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 13:47:18,252 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 13:47:18,253 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 13:47:18,254 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 13:47:18,254 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 13:47:18,255 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 13:47:18,257 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 13:47:18,258 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 13:47:18,258 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 13:47:18,259 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 13:47:18,260 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 13:47:18,261 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 13:47:18,261 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 13:47:18,261 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 13:47:18,262 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 13:47:18,262 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 13:47:18,263 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 13:47:18,263 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 13:47:18,263 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 13:47:18,264 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 13:47:18,264 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 13:47:18,265 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 13:47:18,265 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 13:47:18,265 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 13:47:18,265 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 13:47:18,265 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 13:47:18,266 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 13:47:18,266 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 13:47:18,267 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_831d22dc-e084-461c-9e9f-fd745810e9c8/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 13:47:18,276 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 13:47:18,277 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 13:47:18,277 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 13:47:18,277 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 13:47:18,277 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 13:47:18,278 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 13:47:18,278 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 13:47:18,278 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 13:47:18,278 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 13:47:18,278 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 13:47:18,278 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 13:47:18,278 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 13:47:18,279 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 13:47:18,279 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 13:47:18,279 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 13:47:18,279 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 13:47:18,279 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 13:47:18,279 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 13:47:18,279 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 13:47:18,279 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 13:47:18,280 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 13:47:18,280 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 13:47:18,280 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 13:47:18,280 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 13:47:18,280 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 13:47:18,280 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 13:47:18,280 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 13:47:18,280 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 13:47:18,280 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 13:47:18,281 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_831d22dc-e084-461c-9e9f-fd745810e9c8/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 12555ed3665e558016bc8373ba4e7fae9d05feba [2019-12-07 13:47:18,377 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 13:47:18,386 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 13:47:18,388 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 13:47:18,389 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 13:47:18,390 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 13:47:18,390 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_831d22dc-e084-461c-9e9f-fd745810e9c8/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe030_rmo.oepc.i [2019-12-07 13:47:18,429 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_831d22dc-e084-461c-9e9f-fd745810e9c8/bin/uautomizer/data/0d72b23b3/779831eb0cc24b9fb373fccc557fdbf6/FLAGd58d43d37 [2019-12-07 13:47:18,802 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 13:47:18,802 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_831d22dc-e084-461c-9e9f-fd745810e9c8/sv-benchmarks/c/pthread-wmm/safe030_rmo.oepc.i [2019-12-07 13:47:18,812 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_831d22dc-e084-461c-9e9f-fd745810e9c8/bin/uautomizer/data/0d72b23b3/779831eb0cc24b9fb373fccc557fdbf6/FLAGd58d43d37 [2019-12-07 13:47:18,821 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_831d22dc-e084-461c-9e9f-fd745810e9c8/bin/uautomizer/data/0d72b23b3/779831eb0cc24b9fb373fccc557fdbf6 [2019-12-07 13:47:18,823 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 13:47:18,824 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 13:47:18,824 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 13:47:18,825 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 13:47:18,827 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 13:47:18,827 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 01:47:18" (1/1) ... [2019-12-07 13:47:18,829 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5a2ff042 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:47:18, skipping insertion in model container [2019-12-07 13:47:18,829 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 01:47:18" (1/1) ... [2019-12-07 13:47:18,834 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 13:47:18,862 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 13:47:19,112 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 13:47:19,123 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 13:47:19,174 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 13:47:19,227 INFO L208 MainTranslator]: Completed translation [2019-12-07 13:47:19,227 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:47:19 WrapperNode [2019-12-07 13:47:19,227 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 13:47:19,228 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 13:47:19,228 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 13:47:19,228 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 13:47:19,234 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:47:19" (1/1) ... [2019-12-07 13:47:19,253 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:47:19" (1/1) ... [2019-12-07 13:47:19,282 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 13:47:19,282 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 13:47:19,282 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 13:47:19,282 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 13:47:19,289 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:47:19" (1/1) ... [2019-12-07 13:47:19,289 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:47:19" (1/1) ... [2019-12-07 13:47:19,294 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:47:19" (1/1) ... [2019-12-07 13:47:19,294 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:47:19" (1/1) ... [2019-12-07 13:47:19,304 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:47:19" (1/1) ... [2019-12-07 13:47:19,308 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:47:19" (1/1) ... [2019-12-07 13:47:19,312 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:47:19" (1/1) ... [2019-12-07 13:47:19,316 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 13:47:19,317 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 13:47:19,317 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 13:47:19,317 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 13:47:19,318 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:47:19" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_831d22dc-e084-461c-9e9f-fd745810e9c8/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 13:47:19,370 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 13:47:19,370 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 13:47:19,370 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 13:47:19,370 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 13:47:19,370 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 13:47:19,370 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 13:47:19,370 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 13:47:19,370 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 13:47:19,370 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 13:47:19,370 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 13:47:19,370 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 13:47:19,371 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 13:47:19,371 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 13:47:19,372 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 13:47:19,752 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 13:47:19,752 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 13:47:19,753 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:47:19 BoogieIcfgContainer [2019-12-07 13:47:19,753 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 13:47:19,754 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 13:47:19,755 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 13:47:19,757 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 13:47:19,757 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 01:47:18" (1/3) ... [2019-12-07 13:47:19,758 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3bceedef and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 01:47:19, skipping insertion in model container [2019-12-07 13:47:19,758 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:47:19" (2/3) ... [2019-12-07 13:47:19,758 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3bceedef and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 01:47:19, skipping insertion in model container [2019-12-07 13:47:19,758 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:47:19" (3/3) ... [2019-12-07 13:47:19,760 INFO L109 eAbstractionObserver]: Analyzing ICFG safe030_rmo.oepc.i [2019-12-07 13:47:19,768 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 13:47:19,768 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 13:47:19,774 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 13:47:19,774 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 13:47:19,798 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,798 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,798 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,798 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,798 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,798 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,798 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,799 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,799 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,799 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,799 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,799 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,799 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,800 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,800 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,800 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,800 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,800 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,800 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,800 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,801 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,801 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,801 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,801 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,801 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,801 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,801 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,801 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,802 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,802 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,802 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,802 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,802 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,802 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,803 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,803 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,803 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,803 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,803 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,804 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,804 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,804 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,804 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,804 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,804 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,805 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,805 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,805 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,805 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,805 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,805 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,806 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,806 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,806 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,806 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,806 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,806 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,806 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,806 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,806 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,807 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,807 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,807 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,807 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,807 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,807 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,808 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,808 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,808 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,808 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,808 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,808 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,808 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,809 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,809 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,809 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,809 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,809 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,810 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,810 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,810 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,810 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,810 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,810 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,810 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,811 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,811 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,811 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,811 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,811 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,811 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,811 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,811 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,812 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 13:47:19,823 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 13:47:19,835 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 13:47:19,836 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 13:47:19,836 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 13:47:19,836 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 13:47:19,836 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 13:47:19,836 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 13:47:19,836 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 13:47:19,836 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 13:47:19,849 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 173 places, 210 transitions [2019-12-07 13:47:19,850 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 173 places, 210 transitions [2019-12-07 13:47:19,914 INFO L134 PetriNetUnfolder]: 47/207 cut-off events. [2019-12-07 13:47:19,915 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 13:47:19,925 INFO L76 FinitePrefix]: Finished finitePrefix Result has 217 conditions, 207 events. 47/207 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 583 event pairs. 9/167 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 13:47:19,938 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 173 places, 210 transitions [2019-12-07 13:47:19,965 INFO L134 PetriNetUnfolder]: 47/207 cut-off events. [2019-12-07 13:47:19,965 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 13:47:19,970 INFO L76 FinitePrefix]: Finished finitePrefix Result has 217 conditions, 207 events. 47/207 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 583 event pairs. 9/167 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 13:47:19,983 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 17114 [2019-12-07 13:47:19,984 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 13:47:22,661 WARN L192 SmtUtils]: Spent 132.00 ms on a formula simplification. DAG size of input: 85 DAG size of output: 83 [2019-12-07 13:47:22,744 INFO L206 etLargeBlockEncoding]: Checked pairs total: 79634 [2019-12-07 13:47:22,744 INFO L214 etLargeBlockEncoding]: Total number of compositions: 110 [2019-12-07 13:47:22,746 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 95 places, 107 transitions [2019-12-07 13:47:36,480 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 115670 states. [2019-12-07 13:47:36,481 INFO L276 IsEmpty]: Start isEmpty. Operand 115670 states. [2019-12-07 13:47:36,485 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 13:47:36,485 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:47:36,485 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 13:47:36,485 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:47:36,489 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:47:36,489 INFO L82 PathProgramCache]: Analyzing trace with hash 839588, now seen corresponding path program 1 times [2019-12-07 13:47:36,495 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:47:36,495 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [492317956] [2019-12-07 13:47:36,495 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:47:36,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:47:36,629 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:47:36,629 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [492317956] [2019-12-07 13:47:36,630 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:47:36,630 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 13:47:36,630 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1167056560] [2019-12-07 13:47:36,633 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:47:36,634 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:47:36,642 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:47:36,643 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:47:36,644 INFO L87 Difference]: Start difference. First operand 115670 states. Second operand 3 states. [2019-12-07 13:47:37,512 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:47:37,512 INFO L93 Difference]: Finished difference Result 115280 states and 496088 transitions. [2019-12-07 13:47:37,513 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:47:37,514 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 13:47:37,514 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:47:38,129 INFO L225 Difference]: With dead ends: 115280 [2019-12-07 13:47:38,129 INFO L226 Difference]: Without dead ends: 112928 [2019-12-07 13:47:38,130 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:47:41,989 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112928 states. [2019-12-07 13:47:44,762 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112928 to 112928. [2019-12-07 13:47:44,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112928 states. [2019-12-07 13:47:45,251 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112928 states to 112928 states and 486484 transitions. [2019-12-07 13:47:45,252 INFO L78 Accepts]: Start accepts. Automaton has 112928 states and 486484 transitions. Word has length 3 [2019-12-07 13:47:45,252 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:47:45,253 INFO L462 AbstractCegarLoop]: Abstraction has 112928 states and 486484 transitions. [2019-12-07 13:47:45,253 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:47:45,253 INFO L276 IsEmpty]: Start isEmpty. Operand 112928 states and 486484 transitions. [2019-12-07 13:47:45,256 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 13:47:45,256 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:47:45,256 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:47:45,257 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:47:45,257 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:47:45,257 INFO L82 PathProgramCache]: Analyzing trace with hash 1760802055, now seen corresponding path program 1 times [2019-12-07 13:47:45,257 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:47:45,257 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2029736922] [2019-12-07 13:47:45,257 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:47:45,278 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:47:45,329 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:47:45,329 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2029736922] [2019-12-07 13:47:45,329 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:47:45,329 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:47:45,330 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2042667482] [2019-12-07 13:47:45,330 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:47:45,331 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:47:45,331 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:47:45,331 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:47:45,331 INFO L87 Difference]: Start difference. First operand 112928 states and 486484 transitions. Second operand 4 states. [2019-12-07 13:47:46,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:47:46,258 INFO L93 Difference]: Finished difference Result 176610 states and 731654 transitions. [2019-12-07 13:47:46,259 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:47:46,259 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 13:47:46,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:47:46,733 INFO L225 Difference]: With dead ends: 176610 [2019-12-07 13:47:46,733 INFO L226 Difference]: Without dead ends: 176561 [2019-12-07 13:47:46,734 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:47:51,700 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176561 states. [2019-12-07 13:47:55,744 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176561 to 162745. [2019-12-07 13:47:55,744 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162745 states. [2019-12-07 13:47:56,420 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162745 states to 162745 states and 681729 transitions. [2019-12-07 13:47:56,420 INFO L78 Accepts]: Start accepts. Automaton has 162745 states and 681729 transitions. Word has length 11 [2019-12-07 13:47:56,421 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:47:56,421 INFO L462 AbstractCegarLoop]: Abstraction has 162745 states and 681729 transitions. [2019-12-07 13:47:56,421 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:47:56,421 INFO L276 IsEmpty]: Start isEmpty. Operand 162745 states and 681729 transitions. [2019-12-07 13:47:56,425 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 13:47:56,425 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:47:56,425 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:47:56,425 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:47:56,426 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:47:56,426 INFO L82 PathProgramCache]: Analyzing trace with hash 1561773324, now seen corresponding path program 1 times [2019-12-07 13:47:56,426 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:47:56,426 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [837215926] [2019-12-07 13:47:56,426 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:47:56,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:47:56,466 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:47:56,467 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [837215926] [2019-12-07 13:47:56,467 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:47:56,467 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:47:56,467 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1738154202] [2019-12-07 13:47:56,468 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:47:56,468 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:47:56,468 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:47:56,468 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:47:56,468 INFO L87 Difference]: Start difference. First operand 162745 states and 681729 transitions. Second operand 3 states. [2019-12-07 13:47:56,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:47:56,574 INFO L93 Difference]: Finished difference Result 33244 states and 109167 transitions. [2019-12-07 13:47:56,575 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:47:56,575 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 13 [2019-12-07 13:47:56,575 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:47:56,627 INFO L225 Difference]: With dead ends: 33244 [2019-12-07 13:47:56,627 INFO L226 Difference]: Without dead ends: 33244 [2019-12-07 13:47:56,628 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:47:56,801 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33244 states. [2019-12-07 13:47:57,120 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33244 to 33244. [2019-12-07 13:47:57,120 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33244 states. [2019-12-07 13:47:57,180 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33244 states to 33244 states and 109167 transitions. [2019-12-07 13:47:57,180 INFO L78 Accepts]: Start accepts. Automaton has 33244 states and 109167 transitions. Word has length 13 [2019-12-07 13:47:57,180 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:47:57,180 INFO L462 AbstractCegarLoop]: Abstraction has 33244 states and 109167 transitions. [2019-12-07 13:47:57,180 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:47:57,180 INFO L276 IsEmpty]: Start isEmpty. Operand 33244 states and 109167 transitions. [2019-12-07 13:47:57,181 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 13:47:57,181 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:47:57,181 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:47:57,182 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:47:57,182 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:47:57,182 INFO L82 PathProgramCache]: Analyzing trace with hash 1197008698, now seen corresponding path program 1 times [2019-12-07 13:47:57,182 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:47:57,182 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1802614864] [2019-12-07 13:47:57,182 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:47:57,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:47:57,231 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:47:57,231 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1802614864] [2019-12-07 13:47:57,232 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:47:57,232 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:47:57,232 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1982402538] [2019-12-07 13:47:57,232 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:47:57,232 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:47:57,232 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:47:57,233 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:47:57,233 INFO L87 Difference]: Start difference. First operand 33244 states and 109167 transitions. Second operand 4 states. [2019-12-07 13:47:57,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:47:57,517 INFO L93 Difference]: Finished difference Result 44535 states and 142999 transitions. [2019-12-07 13:47:57,517 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:47:57,518 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 13:47:57,518 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:47:57,579 INFO L225 Difference]: With dead ends: 44535 [2019-12-07 13:47:57,579 INFO L226 Difference]: Without dead ends: 44528 [2019-12-07 13:47:57,580 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:47:57,780 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44528 states. [2019-12-07 13:47:58,219 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44528 to 39179. [2019-12-07 13:47:58,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39179 states. [2019-12-07 13:47:58,289 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39179 states to 39179 states and 127862 transitions. [2019-12-07 13:47:58,290 INFO L78 Accepts]: Start accepts. Automaton has 39179 states and 127862 transitions. Word has length 13 [2019-12-07 13:47:58,290 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:47:58,290 INFO L462 AbstractCegarLoop]: Abstraction has 39179 states and 127862 transitions. [2019-12-07 13:47:58,290 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:47:58,290 INFO L276 IsEmpty]: Start isEmpty. Operand 39179 states and 127862 transitions. [2019-12-07 13:47:58,293 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 13:47:58,293 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:47:58,293 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:47:58,293 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:47:58,294 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:47:58,294 INFO L82 PathProgramCache]: Analyzing trace with hash -789449835, now seen corresponding path program 1 times [2019-12-07 13:47:58,294 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:47:58,294 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1650704454] [2019-12-07 13:47:58,294 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:47:58,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:47:58,353 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:47:58,354 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1650704454] [2019-12-07 13:47:58,354 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:47:58,354 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:47:58,354 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2036713271] [2019-12-07 13:47:58,354 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:47:58,354 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:47:58,354 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:47:58,355 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:47:58,355 INFO L87 Difference]: Start difference. First operand 39179 states and 127862 transitions. Second operand 5 states. [2019-12-07 13:47:58,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:47:58,839 INFO L93 Difference]: Finished difference Result 52446 states and 167747 transitions. [2019-12-07 13:47:58,839 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 13:47:58,839 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 13:47:58,840 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:47:58,928 INFO L225 Difference]: With dead ends: 52446 [2019-12-07 13:47:58,929 INFO L226 Difference]: Without dead ends: 52433 [2019-12-07 13:47:58,929 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:47:59,480 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52433 states. [2019-12-07 13:47:59,904 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52433 to 39607. [2019-12-07 13:47:59,905 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39607 states. [2019-12-07 13:47:59,974 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39607 states to 39607 states and 129076 transitions. [2019-12-07 13:47:59,974 INFO L78 Accepts]: Start accepts. Automaton has 39607 states and 129076 transitions. Word has length 19 [2019-12-07 13:47:59,974 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:47:59,974 INFO L462 AbstractCegarLoop]: Abstraction has 39607 states and 129076 transitions. [2019-12-07 13:47:59,974 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:47:59,974 INFO L276 IsEmpty]: Start isEmpty. Operand 39607 states and 129076 transitions. [2019-12-07 13:47:59,986 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 13:47:59,986 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:47:59,986 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:47:59,986 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:47:59,986 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:47:59,986 INFO L82 PathProgramCache]: Analyzing trace with hash -2013302827, now seen corresponding path program 1 times [2019-12-07 13:47:59,987 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:47:59,987 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1880922872] [2019-12-07 13:47:59,987 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:48:00,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:48:00,066 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:48:00,066 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1880922872] [2019-12-07 13:48:00,066 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:48:00,066 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:48:00,067 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [78696629] [2019-12-07 13:48:00,067 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:48:00,067 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:48:00,067 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:48:00,067 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:48:00,068 INFO L87 Difference]: Start difference. First operand 39607 states and 129076 transitions. Second operand 5 states. [2019-12-07 13:48:00,462 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:48:00,462 INFO L93 Difference]: Finished difference Result 53629 states and 171295 transitions. [2019-12-07 13:48:00,463 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 13:48:00,463 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 13:48:00,463 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:48:00,544 INFO L225 Difference]: With dead ends: 53629 [2019-12-07 13:48:00,544 INFO L226 Difference]: Without dead ends: 53629 [2019-12-07 13:48:00,544 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:48:00,768 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53629 states. [2019-12-07 13:48:01,254 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53629 to 43513. [2019-12-07 13:48:01,254 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43513 states. [2019-12-07 13:48:01,330 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43513 states to 43513 states and 140924 transitions. [2019-12-07 13:48:01,330 INFO L78 Accepts]: Start accepts. Automaton has 43513 states and 140924 transitions. Word has length 25 [2019-12-07 13:48:01,330 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:48:01,331 INFO L462 AbstractCegarLoop]: Abstraction has 43513 states and 140924 transitions. [2019-12-07 13:48:01,331 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:48:01,331 INFO L276 IsEmpty]: Start isEmpty. Operand 43513 states and 140924 transitions. [2019-12-07 13:48:01,338 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 13:48:01,338 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:48:01,338 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:48:01,338 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:48:01,338 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:48:01,338 INFO L82 PathProgramCache]: Analyzing trace with hash 1410541457, now seen corresponding path program 1 times [2019-12-07 13:48:01,339 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:48:01,339 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [177912572] [2019-12-07 13:48:01,339 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:48:01,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:48:01,394 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:48:01,394 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [177912572] [2019-12-07 13:48:01,394 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:48:01,395 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:48:01,395 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1030129299] [2019-12-07 13:48:01,395 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:48:01,395 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:48:01,395 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:48:01,395 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:48:01,395 INFO L87 Difference]: Start difference. First operand 43513 states and 140924 transitions. Second operand 5 states. [2019-12-07 13:48:01,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:48:01,765 INFO L93 Difference]: Finished difference Result 57722 states and 183883 transitions. [2019-12-07 13:48:01,766 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 13:48:01,766 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 13:48:01,766 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:48:01,849 INFO L225 Difference]: With dead ends: 57722 [2019-12-07 13:48:01,849 INFO L226 Difference]: Without dead ends: 57722 [2019-12-07 13:48:01,849 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:48:02,079 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57722 states. [2019-12-07 13:48:02,850 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57722 to 45805. [2019-12-07 13:48:02,850 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45805 states. [2019-12-07 13:48:02,925 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45805 states to 45805 states and 148106 transitions. [2019-12-07 13:48:02,925 INFO L78 Accepts]: Start accepts. Automaton has 45805 states and 148106 transitions. Word has length 25 [2019-12-07 13:48:02,926 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:48:02,926 INFO L462 AbstractCegarLoop]: Abstraction has 45805 states and 148106 transitions. [2019-12-07 13:48:02,926 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:48:02,926 INFO L276 IsEmpty]: Start isEmpty. Operand 45805 states and 148106 transitions. [2019-12-07 13:48:02,939 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 13:48:02,940 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:48:02,940 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:48:02,940 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:48:02,940 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:48:02,940 INFO L82 PathProgramCache]: Analyzing trace with hash -875122230, now seen corresponding path program 1 times [2019-12-07 13:48:02,940 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:48:02,940 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [99971089] [2019-12-07 13:48:02,940 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:48:02,957 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:48:03,019 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:48:03,019 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [99971089] [2019-12-07 13:48:03,019 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:48:03,019 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:48:03,019 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1417666668] [2019-12-07 13:48:03,020 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:48:03,020 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:48:03,020 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:48:03,020 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:48:03,020 INFO L87 Difference]: Start difference. First operand 45805 states and 148106 transitions. Second operand 6 states. [2019-12-07 13:48:03,691 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:48:03,691 INFO L93 Difference]: Finished difference Result 56485 states and 180313 transitions. [2019-12-07 13:48:03,691 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 13:48:03,691 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 31 [2019-12-07 13:48:03,692 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:48:03,775 INFO L225 Difference]: With dead ends: 56485 [2019-12-07 13:48:03,775 INFO L226 Difference]: Without dead ends: 56472 [2019-12-07 13:48:03,775 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 0 SyntacticMatches, 5 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=57, Invalid=153, Unknown=0, NotChecked=0, Total=210 [2019-12-07 13:48:04,004 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56472 states. [2019-12-07 13:48:04,493 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56472 to 42435. [2019-12-07 13:48:04,494 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42435 states. [2019-12-07 13:48:04,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42435 states to 42435 states and 137810 transitions. [2019-12-07 13:48:04,569 INFO L78 Accepts]: Start accepts. Automaton has 42435 states and 137810 transitions. Word has length 31 [2019-12-07 13:48:04,569 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:48:04,569 INFO L462 AbstractCegarLoop]: Abstraction has 42435 states and 137810 transitions. [2019-12-07 13:48:04,569 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:48:04,569 INFO L276 IsEmpty]: Start isEmpty. Operand 42435 states and 137810 transitions. [2019-12-07 13:48:04,595 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 13:48:04,595 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:48:04,595 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:48:04,595 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:48:04,595 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:48:04,595 INFO L82 PathProgramCache]: Analyzing trace with hash 1432226341, now seen corresponding path program 1 times [2019-12-07 13:48:04,596 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:48:04,596 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1474373987] [2019-12-07 13:48:04,596 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:48:04,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:48:04,628 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:48:04,629 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1474373987] [2019-12-07 13:48:04,629 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:48:04,629 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:48:04,629 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [821698988] [2019-12-07 13:48:04,629 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:48:04,630 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:48:04,630 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:48:04,630 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:48:04,630 INFO L87 Difference]: Start difference. First operand 42435 states and 137810 transitions. Second operand 3 states. [2019-12-07 13:48:04,796 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:48:04,796 INFO L93 Difference]: Finished difference Result 49881 states and 162523 transitions. [2019-12-07 13:48:04,796 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:48:04,796 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 39 [2019-12-07 13:48:04,797 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:48:04,874 INFO L225 Difference]: With dead ends: 49881 [2019-12-07 13:48:04,874 INFO L226 Difference]: Without dead ends: 49881 [2019-12-07 13:48:04,874 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:48:05,084 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49881 states. [2019-12-07 13:48:05,568 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49881 to 47329. [2019-12-07 13:48:05,568 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47329 states. [2019-12-07 13:48:05,653 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47329 states to 47329 states and 154738 transitions. [2019-12-07 13:48:05,653 INFO L78 Accepts]: Start accepts. Automaton has 47329 states and 154738 transitions. Word has length 39 [2019-12-07 13:48:05,654 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:48:05,654 INFO L462 AbstractCegarLoop]: Abstraction has 47329 states and 154738 transitions. [2019-12-07 13:48:05,654 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:48:05,654 INFO L276 IsEmpty]: Start isEmpty. Operand 47329 states and 154738 transitions. [2019-12-07 13:48:05,681 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 13:48:05,681 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:48:05,681 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:48:05,682 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:48:05,682 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:48:05,682 INFO L82 PathProgramCache]: Analyzing trace with hash 1588539718, now seen corresponding path program 1 times [2019-12-07 13:48:05,682 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:48:05,682 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1256824268] [2019-12-07 13:48:05,682 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:48:05,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:48:05,723 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:48:05,723 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1256824268] [2019-12-07 13:48:05,723 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:48:05,723 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:48:05,723 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2052286993] [2019-12-07 13:48:05,723 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 13:48:05,724 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:48:05,724 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 13:48:05,724 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:48:05,724 INFO L87 Difference]: Start difference. First operand 47329 states and 154738 transitions. Second operand 4 states. [2019-12-07 13:48:05,755 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:48:05,755 INFO L93 Difference]: Finished difference Result 8308 states and 22374 transitions. [2019-12-07 13:48:05,756 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 13:48:05,756 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 39 [2019-12-07 13:48:05,756 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:48:05,766 INFO L225 Difference]: With dead ends: 8308 [2019-12-07 13:48:05,766 INFO L226 Difference]: Without dead ends: 8308 [2019-12-07 13:48:05,766 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 13:48:05,797 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8308 states. [2019-12-07 13:48:05,858 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8308 to 8196. [2019-12-07 13:48:05,859 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8196 states. [2019-12-07 13:48:05,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8196 states to 8196 states and 22054 transitions. [2019-12-07 13:48:05,869 INFO L78 Accepts]: Start accepts. Automaton has 8196 states and 22054 transitions. Word has length 39 [2019-12-07 13:48:05,869 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:48:05,869 INFO L462 AbstractCegarLoop]: Abstraction has 8196 states and 22054 transitions. [2019-12-07 13:48:05,869 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 13:48:05,869 INFO L276 IsEmpty]: Start isEmpty. Operand 8196 states and 22054 transitions. [2019-12-07 13:48:05,875 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-12-07 13:48:05,875 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:48:05,876 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:48:05,876 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:48:05,876 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:48:05,876 INFO L82 PathProgramCache]: Analyzing trace with hash -1840840309, now seen corresponding path program 1 times [2019-12-07 13:48:05,876 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:48:05,876 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [203122744] [2019-12-07 13:48:05,876 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:48:05,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:48:06,002 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:48:06,003 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [203122744] [2019-12-07 13:48:06,003 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:48:06,003 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 13:48:06,003 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [168879645] [2019-12-07 13:48:06,003 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:48:06,003 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:48:06,004 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:48:06,004 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:48:06,004 INFO L87 Difference]: Start difference. First operand 8196 states and 22054 transitions. Second operand 5 states. [2019-12-07 13:48:06,033 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:48:06,033 INFO L93 Difference]: Finished difference Result 5338 states and 15301 transitions. [2019-12-07 13:48:06,033 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 13:48:06,033 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 51 [2019-12-07 13:48:06,033 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:48:06,038 INFO L225 Difference]: With dead ends: 5338 [2019-12-07 13:48:06,038 INFO L226 Difference]: Without dead ends: 5338 [2019-12-07 13:48:06,039 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:48:06,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5338 states. [2019-12-07 13:48:06,098 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5338 to 4974. [2019-12-07 13:48:06,098 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4974 states. [2019-12-07 13:48:06,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4974 states to 4974 states and 14317 transitions. [2019-12-07 13:48:06,104 INFO L78 Accepts]: Start accepts. Automaton has 4974 states and 14317 transitions. Word has length 51 [2019-12-07 13:48:06,104 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:48:06,104 INFO L462 AbstractCegarLoop]: Abstraction has 4974 states and 14317 transitions. [2019-12-07 13:48:06,105 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:48:06,105 INFO L276 IsEmpty]: Start isEmpty. Operand 4974 states and 14317 transitions. [2019-12-07 13:48:06,108 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 13:48:06,109 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:48:06,109 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:48:06,109 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:48:06,109 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:48:06,109 INFO L82 PathProgramCache]: Analyzing trace with hash 873301269, now seen corresponding path program 1 times [2019-12-07 13:48:06,109 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:48:06,109 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [565106854] [2019-12-07 13:48:06,109 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:48:06,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:48:06,156 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:48:06,156 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [565106854] [2019-12-07 13:48:06,156 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:48:06,156 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:48:06,156 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1378553290] [2019-12-07 13:48:06,157 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:48:06,157 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:48:06,157 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:48:06,157 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:48:06,157 INFO L87 Difference]: Start difference. First operand 4974 states and 14317 transitions. Second operand 5 states. [2019-12-07 13:48:06,349 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:48:06,349 INFO L93 Difference]: Finished difference Result 7565 states and 21582 transitions. [2019-12-07 13:48:06,349 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 13:48:06,350 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 65 [2019-12-07 13:48:06,350 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:48:06,356 INFO L225 Difference]: With dead ends: 7565 [2019-12-07 13:48:06,356 INFO L226 Difference]: Without dead ends: 7565 [2019-12-07 13:48:06,356 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:48:06,379 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7565 states. [2019-12-07 13:48:06,434 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7565 to 6666. [2019-12-07 13:48:06,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6666 states. [2019-12-07 13:48:06,443 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6666 states to 6666 states and 19103 transitions. [2019-12-07 13:48:06,443 INFO L78 Accepts]: Start accepts. Automaton has 6666 states and 19103 transitions. Word has length 65 [2019-12-07 13:48:06,443 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:48:06,443 INFO L462 AbstractCegarLoop]: Abstraction has 6666 states and 19103 transitions. [2019-12-07 13:48:06,443 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:48:06,443 INFO L276 IsEmpty]: Start isEmpty. Operand 6666 states and 19103 transitions. [2019-12-07 13:48:06,448 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 13:48:06,449 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:48:06,449 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:48:06,449 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:48:06,449 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:48:06,449 INFO L82 PathProgramCache]: Analyzing trace with hash -127580537, now seen corresponding path program 2 times [2019-12-07 13:48:06,449 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:48:06,449 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1647885868] [2019-12-07 13:48:06,449 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:48:06,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:48:06,506 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:48:06,506 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1647885868] [2019-12-07 13:48:06,506 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:48:06,506 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 13:48:06,506 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1002242752] [2019-12-07 13:48:06,507 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:48:06,507 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:48:06,507 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:48:06,507 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:48:06,507 INFO L87 Difference]: Start difference. First operand 6666 states and 19103 transitions. Second operand 6 states. [2019-12-07 13:48:06,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:48:06,812 INFO L93 Difference]: Finished difference Result 11203 states and 31987 transitions. [2019-12-07 13:48:06,812 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 13:48:06,812 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 65 [2019-12-07 13:48:06,813 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:48:06,822 INFO L225 Difference]: With dead ends: 11203 [2019-12-07 13:48:06,822 INFO L226 Difference]: Without dead ends: 11203 [2019-12-07 13:48:06,822 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 13:48:06,852 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11203 states. [2019-12-07 13:48:06,924 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11203 to 7631. [2019-12-07 13:48:06,924 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7631 states. [2019-12-07 13:48:06,934 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7631 states to 7631 states and 21937 transitions. [2019-12-07 13:48:06,934 INFO L78 Accepts]: Start accepts. Automaton has 7631 states and 21937 transitions. Word has length 65 [2019-12-07 13:48:06,935 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:48:06,935 INFO L462 AbstractCegarLoop]: Abstraction has 7631 states and 21937 transitions. [2019-12-07 13:48:06,935 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:48:06,935 INFO L276 IsEmpty]: Start isEmpty. Operand 7631 states and 21937 transitions. [2019-12-07 13:48:06,941 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2019-12-07 13:48:06,941 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:48:06,941 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:48:06,941 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:48:06,941 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:48:06,941 INFO L82 PathProgramCache]: Analyzing trace with hash 1928895531, now seen corresponding path program 3 times [2019-12-07 13:48:06,941 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:48:06,941 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1478632662] [2019-12-07 13:48:06,942 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:48:06,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:48:07,003 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:48:07,004 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1478632662] [2019-12-07 13:48:07,004 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:48:07,004 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:48:07,004 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [200058550] [2019-12-07 13:48:07,005 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:48:07,005 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:48:07,005 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:48:07,005 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:48:07,005 INFO L87 Difference]: Start difference. First operand 7631 states and 21937 transitions. Second operand 3 states. [2019-12-07 13:48:07,043 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:48:07,044 INFO L93 Difference]: Finished difference Result 7631 states and 21936 transitions. [2019-12-07 13:48:07,044 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:48:07,044 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 65 [2019-12-07 13:48:07,044 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:48:07,053 INFO L225 Difference]: With dead ends: 7631 [2019-12-07 13:48:07,053 INFO L226 Difference]: Without dead ends: 7631 [2019-12-07 13:48:07,054 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:48:07,084 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7631 states. [2019-12-07 13:48:07,138 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7631 to 6308. [2019-12-07 13:48:07,138 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6308 states. [2019-12-07 13:48:07,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6308 states to 6308 states and 18265 transitions. [2019-12-07 13:48:07,146 INFO L78 Accepts]: Start accepts. Automaton has 6308 states and 18265 transitions. Word has length 65 [2019-12-07 13:48:07,146 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:48:07,146 INFO L462 AbstractCegarLoop]: Abstraction has 6308 states and 18265 transitions. [2019-12-07 13:48:07,146 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:48:07,146 INFO L276 IsEmpty]: Start isEmpty. Operand 6308 states and 18265 transitions. [2019-12-07 13:48:07,151 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 13:48:07,151 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:48:07,151 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:48:07,152 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:48:07,152 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:48:07,152 INFO L82 PathProgramCache]: Analyzing trace with hash 796962561, now seen corresponding path program 1 times [2019-12-07 13:48:07,152 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:48:07,152 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1315561030] [2019-12-07 13:48:07,152 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:48:07,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:48:07,188 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:48:07,189 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1315561030] [2019-12-07 13:48:07,189 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:48:07,189 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:48:07,189 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1864861920] [2019-12-07 13:48:07,189 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:48:07,189 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:48:07,189 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:48:07,189 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:48:07,189 INFO L87 Difference]: Start difference. First operand 6308 states and 18265 transitions. Second operand 3 states. [2019-12-07 13:48:07,207 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:48:07,207 INFO L93 Difference]: Finished difference Result 5484 states and 15541 transitions. [2019-12-07 13:48:07,207 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:48:07,208 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 13:48:07,208 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:48:07,212 INFO L225 Difference]: With dead ends: 5484 [2019-12-07 13:48:07,212 INFO L226 Difference]: Without dead ends: 5484 [2019-12-07 13:48:07,213 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:48:07,231 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5484 states. [2019-12-07 13:48:07,272 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5484 to 5236. [2019-12-07 13:48:07,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5236 states. [2019-12-07 13:48:07,279 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5236 states to 5236 states and 14843 transitions. [2019-12-07 13:48:07,279 INFO L78 Accepts]: Start accepts. Automaton has 5236 states and 14843 transitions. Word has length 66 [2019-12-07 13:48:07,279 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:48:07,279 INFO L462 AbstractCegarLoop]: Abstraction has 5236 states and 14843 transitions. [2019-12-07 13:48:07,279 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:48:07,279 INFO L276 IsEmpty]: Start isEmpty. Operand 5236 states and 14843 transitions. [2019-12-07 13:48:07,283 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:48:07,284 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:48:07,284 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:48:07,284 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:48:07,284 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:48:07,284 INFO L82 PathProgramCache]: Analyzing trace with hash -129319907, now seen corresponding path program 1 times [2019-12-07 13:48:07,284 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:48:07,284 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1961304618] [2019-12-07 13:48:07,284 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:48:07,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:48:07,340 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:48:07,340 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1961304618] [2019-12-07 13:48:07,340 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:48:07,341 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 13:48:07,341 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1079149761] [2019-12-07 13:48:07,341 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 13:48:07,341 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:48:07,341 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 13:48:07,341 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 13:48:07,341 INFO L87 Difference]: Start difference. First operand 5236 states and 14843 transitions. Second operand 6 states. [2019-12-07 13:48:07,645 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:48:07,645 INFO L93 Difference]: Finished difference Result 8386 states and 23438 transitions. [2019-12-07 13:48:07,645 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 13:48:07,646 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 67 [2019-12-07 13:48:07,646 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:48:07,652 INFO L225 Difference]: With dead ends: 8386 [2019-12-07 13:48:07,652 INFO L226 Difference]: Without dead ends: 8386 [2019-12-07 13:48:07,653 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-07 13:48:07,676 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8386 states. [2019-12-07 13:48:07,726 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8386 to 5260. [2019-12-07 13:48:07,727 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5260 states. [2019-12-07 13:48:07,733 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5260 states to 5260 states and 14911 transitions. [2019-12-07 13:48:07,733 INFO L78 Accepts]: Start accepts. Automaton has 5260 states and 14911 transitions. Word has length 67 [2019-12-07 13:48:07,733 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:48:07,733 INFO L462 AbstractCegarLoop]: Abstraction has 5260 states and 14911 transitions. [2019-12-07 13:48:07,733 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 13:48:07,733 INFO L276 IsEmpty]: Start isEmpty. Operand 5260 states and 14911 transitions. [2019-12-07 13:48:07,737 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 13:48:07,737 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:48:07,737 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:48:07,737 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:48:07,737 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:48:07,737 INFO L82 PathProgramCache]: Analyzing trace with hash 392783873, now seen corresponding path program 2 times [2019-12-07 13:48:07,737 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:48:07,738 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [664466582] [2019-12-07 13:48:07,738 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:48:07,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:48:07,765 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:48:07,765 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [664466582] [2019-12-07 13:48:07,765 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:48:07,765 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:48:07,765 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [860607069] [2019-12-07 13:48:07,765 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:48:07,765 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:48:07,766 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:48:07,766 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:48:07,766 INFO L87 Difference]: Start difference. First operand 5260 states and 14911 transitions. Second operand 3 states. [2019-12-07 13:48:07,782 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:48:07,782 INFO L93 Difference]: Finished difference Result 5008 states and 13976 transitions. [2019-12-07 13:48:07,783 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:48:07,783 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 67 [2019-12-07 13:48:07,783 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:48:07,787 INFO L225 Difference]: With dead ends: 5008 [2019-12-07 13:48:07,787 INFO L226 Difference]: Without dead ends: 5008 [2019-12-07 13:48:07,787 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:48:07,804 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5008 states. [2019-12-07 13:48:07,837 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5008 to 4434. [2019-12-07 13:48:07,837 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4434 states. [2019-12-07 13:48:07,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4434 states to 4434 states and 12374 transitions. [2019-12-07 13:48:07,842 INFO L78 Accepts]: Start accepts. Automaton has 4434 states and 12374 transitions. Word has length 67 [2019-12-07 13:48:07,842 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:48:07,842 INFO L462 AbstractCegarLoop]: Abstraction has 4434 states and 12374 transitions. [2019-12-07 13:48:07,842 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:48:07,842 INFO L276 IsEmpty]: Start isEmpty. Operand 4434 states and 12374 transitions. [2019-12-07 13:48:07,846 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 13:48:07,846 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:48:07,846 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:48:07,846 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:48:07,846 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:48:07,846 INFO L82 PathProgramCache]: Analyzing trace with hash -857460709, now seen corresponding path program 1 times [2019-12-07 13:48:07,846 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:48:07,846 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1509375612] [2019-12-07 13:48:07,846 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:48:07,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:48:08,029 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:48:08,029 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1509375612] [2019-12-07 13:48:08,029 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:48:08,029 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 13:48:08,029 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [587232245] [2019-12-07 13:48:08,030 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 13:48:08,030 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:48:08,030 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 13:48:08,030 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2019-12-07 13:48:08,030 INFO L87 Difference]: Start difference. First operand 4434 states and 12374 transitions. Second operand 12 states. [2019-12-07 13:48:08,280 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:48:08,280 INFO L93 Difference]: Finished difference Result 8454 states and 23687 transitions. [2019-12-07 13:48:08,280 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 13:48:08,280 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 68 [2019-12-07 13:48:08,280 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:48:08,286 INFO L225 Difference]: With dead ends: 8454 [2019-12-07 13:48:08,286 INFO L226 Difference]: Without dead ends: 7687 [2019-12-07 13:48:08,287 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 79 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=107, Invalid=399, Unknown=0, NotChecked=0, Total=506 [2019-12-07 13:48:08,308 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7687 states. [2019-12-07 13:48:08,354 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7687 to 5642. [2019-12-07 13:48:08,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5642 states. [2019-12-07 13:48:08,360 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5642 states to 5642 states and 15655 transitions. [2019-12-07 13:48:08,360 INFO L78 Accepts]: Start accepts. Automaton has 5642 states and 15655 transitions. Word has length 68 [2019-12-07 13:48:08,361 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:48:08,361 INFO L462 AbstractCegarLoop]: Abstraction has 5642 states and 15655 transitions. [2019-12-07 13:48:08,361 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 13:48:08,361 INFO L276 IsEmpty]: Start isEmpty. Operand 5642 states and 15655 transitions. [2019-12-07 13:48:08,364 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2019-12-07 13:48:08,364 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:48:08,365 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:48:08,365 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:48:08,365 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:48:08,365 INFO L82 PathProgramCache]: Analyzing trace with hash 1442657587, now seen corresponding path program 2 times [2019-12-07 13:48:08,365 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:48:08,365 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1541319904] [2019-12-07 13:48:08,365 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:48:08,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 13:48:08,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 13:48:08,436 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 13:48:08,436 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 13:48:08,439 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] ULTIMATE.startENTRY-->L803: Formula: (let ((.cse0 (store |v_#valid_58| 0 0))) (and (= v_~z$w_buff1~0_188 0) (= v_~weak$$choice2~0_132 0) (= v_~main$tmp_guard0~0_18 0) (= |v_#NULL.offset_6| 0) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t2501~0.base_22|) (= |v_ULTIMATE.start_main_~#t2501~0.offset_17| 0) (= v_~z$r_buff0_thd1~0_211 0) (= v_~main$tmp_guard1~0_26 0) (= v_~z~0_153 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t2501~0.base_22| 4)) (= 0 v_~z$r_buff0_thd3~0_107) (= v_~z$read_delayed_var~0.offset_7 0) (< 0 |v_#StackHeapBarrier_15|) (= v_~z$mem_tmp~0_39 0) (= v_~z$r_buff0_thd2~0_110 0) (= |v_#memory_int_19| (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t2501~0.base_22| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t2501~0.base_22|) |v_ULTIMATE.start_main_~#t2501~0.offset_17| 0))) (= v_~z$r_buff1_thd1~0_172 0) (= 0 v_~z$flush_delayed~0_55) (= 0 |v_#NULL.base_6|) (= v_~z$read_delayed_var~0.base_7 0) (= v_~z$read_delayed~0_7 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t2501~0.base_22|) 0) (= v_~y~0_40 0) (= 0 v_~x~0_132) (= |v_#valid_56| (store .cse0 |v_ULTIMATE.start_main_~#t2501~0.base_22| 1)) (= v_~__unbuffered_cnt~0_139 0) (= v_~z$w_buff1_used~0_438 0) (= v_~z$w_buff0~0_198 0) (= v_~z$r_buff1_thd0~0_288 0) (= 0 v_~weak$$choice0~0_34) (= v_~z$w_buff0_used~0_699 0) (= 0 v_~z$r_buff1_thd3~0_190) (= v_~z$r_buff1_thd2~0_178 0) (= v_~z$r_buff0_thd0~0_338 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_58|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_59|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_25|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_178, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_25|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_27|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_135|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_42|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_37|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_23|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_44|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_34|, ULTIMATE.start_main_~#t2502~0.offset=|v_ULTIMATE.start_main_~#t2502~0.offset_17|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_338, #length=|v_#length_21|, ULTIMATE.start_main_~#t2501~0.base=|v_ULTIMATE.start_main_~#t2501~0.base_22|, ~z$mem_tmp~0=v_~z$mem_tmp~0_39, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_7|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_27|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_48|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_438, ULTIMATE.start_main_~#t2503~0.base=|v_ULTIMATE.start_main_~#t2503~0.base_19|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_38|, ~z$flush_delayed~0=v_~z$flush_delayed~0_55, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_29|, ~weak$$choice0~0=v_~weak$$choice0~0_34, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_26|, ULTIMATE.start_main_~#t2502~0.base=|v_ULTIMATE.start_main_~#t2502~0.base_21|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_172, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_107, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_139, ~x~0=v_~x~0_132, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_59|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_71|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_29|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_27|, ~z$w_buff1~0=v_~z$w_buff1~0_188, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_26, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_195|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_15|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_23|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_39|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_32|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_288, ULTIMATE.start_main_~#t2503~0.offset=|v_ULTIMATE.start_main_~#t2503~0.offset_14|, ~y~0=v_~y~0_40, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_110, ULTIMATE.start_main_~#t2501~0.offset=|v_ULTIMATE.start_main_~#t2501~0.offset_17|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_7|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_17|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_699, ~z$w_buff0~0=v_~z$w_buff0~0_198, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_190, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_39|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_56|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_18, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_23|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_44|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_30|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, #valid=|v_#valid_56|, #memory_int=|v_#memory_int_19|, ~z~0=v_~z~0_153, ~weak$$choice2~0=v_~weak$$choice2~0_132, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_211} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ULTIMATE.start_main_#t~ite28, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ULTIMATE.start_main_~#t2502~0.offset, ~z$r_buff0_thd0~0, #length, ULTIMATE.start_main_~#t2501~0.base, ~z$mem_tmp~0, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ~z$w_buff1_used~0, ULTIMATE.start_main_~#t2503~0.base, ULTIMATE.start_main_#t~ite37, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_~#t2502~0.base, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_#t~nondet31, ULTIMATE.start_main_#t~ite29, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t2503~0.offset, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t2501~0.offset, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ~z$w_buff0_used~0, ~z$w_buff0~0, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 13:48:08,439 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] P0ENTRY-->L4-3: Formula: (and (= |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_5| (ite (not (and (not (= 0 (mod v_~z$w_buff0_used~0_114 256))) (not (= 0 (mod v_~z$w_buff1_used~0_60 256))))) 1 0)) (= v_~z$w_buff0_used~0_115 v_~z$w_buff1_used~0_60) (= v_P0Thread1of1ForFork0_~arg.offset_5 |v_P0Thread1of1ForFork0_#in~arg.offset_7|) (= v_~z$w_buff0~0_27 v_~z$w_buff1~0_20) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_7 0)) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_7 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_5|) (= v_~z$w_buff0_used~0_114 1) (= v_P0Thread1of1ForFork0_~arg.base_5 |v_P0Thread1of1ForFork0_#in~arg.base_7|) (= 2 v_~z$w_buff0~0_26)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_7|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_115, ~z$w_buff0~0=v_~z$w_buff0~0_27, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_7|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_7|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_114, ~z$w_buff0~0=v_~z$w_buff0~0_26, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_7, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_60, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_7|, ~z$w_buff1~0=v_~z$w_buff1~0_20, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_5, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_5|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_5} AuxVars[] AssignedVars[~z$w_buff0_used~0, ~z$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~z$w_buff1_used~0, ~z$w_buff1~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 13:48:08,440 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [754] [754] L741-->L741-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In1231597935 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In1231597935 256)))) (or (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork0_#t~ite5_Out1231597935| 0)) (and (= |P0Thread1of1ForFork0_#t~ite5_Out1231597935| ~z$w_buff0_used~0_In1231597935) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1231597935, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1231597935} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out1231597935|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1231597935, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1231597935} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 13:48:08,440 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L803-1-->L805: Formula: (and (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t2502~0.base_9|) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t2502~0.base_9| 4)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2502~0.base_9| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2502~0.base_9|) |v_ULTIMATE.start_main_~#t2502~0.offset_9| 1)) |v_#memory_int_11|) (not (= |v_ULTIMATE.start_main_~#t2502~0.base_9| 0)) (= 0 |v_ULTIMATE.start_main_~#t2502~0.offset_9|) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t2502~0.base_9| 1)) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t2502~0.base_9|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t2502~0.offset=|v_ULTIMATE.start_main_~#t2502~0.offset_9|, #StackHeapBarrier=|v_#StackHeapBarrier_8|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_4|, ULTIMATE.start_main_~#t2502~0.base=|v_ULTIMATE.start_main_~#t2502~0.base_9|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2502~0.offset, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_~#t2502~0.base, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 13:48:08,441 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [802] [802] L805-1-->L807: Formula: (and (= 0 (select |v_#valid_39| |v_ULTIMATE.start_main_~#t2503~0.base_13|)) (= (store |v_#valid_39| |v_ULTIMATE.start_main_~#t2503~0.base_13| 1) |v_#valid_38|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2503~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2503~0.base_13|) |v_ULTIMATE.start_main_~#t2503~0.offset_11| 2)) |v_#memory_int_15|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t2503~0.base_13| 4)) (= |v_ULTIMATE.start_main_~#t2503~0.offset_11| 0) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2503~0.base_13|) (not (= 0 |v_ULTIMATE.start_main_~#t2503~0.base_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t2503~0.base=|v_ULTIMATE.start_main_~#t2503~0.base_13|, #length=|v_#length_17|, ULTIMATE.start_main_~#t2503~0.offset=|v_ULTIMATE.start_main_~#t2503~0.offset_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet22, #valid, #memory_int, ULTIMATE.start_main_~#t2503~0.base, #length, ULTIMATE.start_main_~#t2503~0.offset] because there is no mapped edge [2019-12-07 13:48:08,441 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L760-2-->L760-4: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd2~0_In-1457795909 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1457795909 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite9_Out-1457795909| ~z$w_buff1~0_In-1457795909) (not .cse1)) (and (= |P1Thread1of1ForFork1_#t~ite9_Out-1457795909| ~z~0_In-1457795909) (or .cse0 .cse1)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1457795909, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1457795909, ~z$w_buff1~0=~z$w_buff1~0_In-1457795909, ~z~0=~z~0_In-1457795909} OutVars{P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out-1457795909|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1457795909, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1457795909, ~z$w_buff1~0=~z$w_buff1~0_In-1457795909, ~z~0=~z~0_In-1457795909} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9] because there is no mapped edge [2019-12-07 13:48:08,442 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [706] [706] L760-4-->L761: Formula: (= |v_P1Thread1of1ForFork1_#t~ite9_8| v_~z~0_37) InVars {P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_8|} OutVars{P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_7|, P1Thread1of1ForFork1_#t~ite10=|v_P1Thread1of1ForFork1_#t~ite10_11|, ~z~0=v_~z~0_37} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10, ~z~0] because there is no mapped edge [2019-12-07 13:48:08,442 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L761-->L761-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd2~0_In323989016 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In323989016 256) 0))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out323989016|) (not .cse1)) (and (= ~z$w_buff0_used~0_In323989016 |P1Thread1of1ForFork1_#t~ite11_Out323989016|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In323989016, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In323989016} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In323989016, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out323989016|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In323989016} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 13:48:08,442 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L780-2-->L780-4: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In320321837 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In320321837 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite15_Out320321837| ~z$w_buff1~0_In320321837) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite15_Out320321837| ~z~0_In320321837)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In320321837, ~z$w_buff1_used~0=~z$w_buff1_used~0_In320321837, ~z$w_buff1~0=~z$w_buff1~0_In320321837, ~z~0=~z~0_In320321837} OutVars{P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out320321837|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In320321837, ~z$w_buff1_used~0=~z$w_buff1_used~0_In320321837, ~z$w_buff1~0=~z$w_buff1~0_In320321837, ~z~0=~z~0_In320321837} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 13:48:08,442 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [707] [707] L780-4-->L781: Formula: (= |v_P2Thread1of1ForFork2_#t~ite15_8| v_~z~0_41) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_8|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_7|, ~z~0=v_~z~0_41, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_13|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, ~z~0, P2Thread1of1ForFork2_#t~ite16] because there is no mapped edge [2019-12-07 13:48:08,442 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L781-->L781-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1155815033 256))) (.cse1 (= (mod ~z$r_buff0_thd3~0_In1155815033 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite17_Out1155815033| 0) (not .cse0) (not .cse1)) (and (= |P2Thread1of1ForFork2_#t~ite17_Out1155815033| ~z$w_buff0_used~0_In1155815033) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1155815033, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1155815033} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1155815033, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1155815033, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out1155815033|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 13:48:08,443 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L782-->L782-2: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In-360730082 256) 0)) (.cse0 (= (mod ~z$r_buff1_thd3~0_In-360730082 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd3~0_In-360730082 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-360730082 256)))) (or (and (= ~z$w_buff1_used~0_In-360730082 |P2Thread1of1ForFork2_#t~ite18_Out-360730082|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork2_#t~ite18_Out-360730082| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-360730082, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-360730082, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-360730082, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-360730082} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-360730082, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-360730082, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-360730082, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-360730082, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out-360730082|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 13:48:08,443 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L762-->L762-2: Formula: (let ((.cse3 (= (mod ~z$w_buff0_used~0_In-418598319 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd2~0_In-418598319 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In-418598319 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In-418598319 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In-418598319 |P1Thread1of1ForFork1_#t~ite12_Out-418598319|) (or .cse2 .cse3)) (and (= 0 |P1Thread1of1ForFork1_#t~ite12_Out-418598319|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-418598319, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-418598319, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-418598319, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-418598319} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-418598319, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-418598319, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-418598319, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-418598319|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-418598319} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 13:48:08,443 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L783-->L783-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In2008910382 256))) (.cse1 (= (mod ~z$r_buff0_thd3~0_In2008910382 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite19_Out2008910382| 0)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite19_Out2008910382| ~z$r_buff0_thd3~0_In2008910382)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2008910382, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2008910382} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2008910382, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2008910382, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out2008910382|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 13:48:08,443 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L763-->L763-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-861566914 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd2~0_In-861566914 256) 0))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite13_Out-861566914|) (not .cse1)) (and (or .cse1 .cse0) (= ~z$r_buff0_thd2~0_In-861566914 |P1Thread1of1ForFork1_#t~ite13_Out-861566914|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-861566914, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-861566914} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-861566914, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-861566914|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-861566914} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 13:48:08,444 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L764-->L764-2: Formula: (let ((.cse3 (= (mod ~z$r_buff1_thd2~0_In-254036009 256) 0)) (.cse2 (= (mod ~z$w_buff1_used~0_In-254036009 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In-254036009 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-254036009 256) 0))) (or (and (= ~z$r_buff1_thd2~0_In-254036009 |P1Thread1of1ForFork1_#t~ite14_Out-254036009|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= 0 |P1Thread1of1ForFork1_#t~ite14_Out-254036009|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-254036009, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-254036009, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-254036009, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-254036009} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-254036009, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-254036009, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-254036009, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-254036009|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-254036009} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 13:48:08,444 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L764-2-->P1EXIT: Formula: (and (= v_~z$r_buff1_thd2~0_130 |v_P1Thread1of1ForFork1_#t~ite14_38|) (= (+ v_~__unbuffered_cnt~0_70 1) v_~__unbuffered_cnt~0_69) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_38|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_130, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_37|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 13:48:08,444 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] L784-->L784-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-229793340 256))) (.cse0 (= (mod ~z$r_buff0_thd3~0_In-229793340 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd3~0_In-229793340 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-229793340 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd3~0_In-229793340 |P2Thread1of1ForFork2_#t~ite20_Out-229793340|)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |P2Thread1of1ForFork2_#t~ite20_Out-229793340| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-229793340, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-229793340, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-229793340, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-229793340} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-229793340, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out-229793340|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-229793340, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-229793340, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-229793340} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 13:48:08,444 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L784-2-->P2EXIT: Formula: (and (= v_~z$r_buff1_thd3~0_148 |v_P2Thread1of1ForFork2_#t~ite20_34|) (= (+ v_~__unbuffered_cnt~0_80 1) v_~__unbuffered_cnt~0_79) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0)) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_80} OutVars{P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_33|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_148, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, ~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 13:48:08,444 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L742-->L742-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In-242904203 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-242904203 256) 0)) (.cse2 (= (mod ~z$w_buff1_used~0_In-242904203 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd1~0_In-242904203 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite6_Out-242904203| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$w_buff1_used~0_In-242904203 |P0Thread1of1ForFork0_#t~ite6_Out-242904203|) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-242904203, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-242904203, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-242904203, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-242904203} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-242904203|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-242904203, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-242904203, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-242904203, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-242904203} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 13:48:08,444 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L743-->L744: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In346650962 256))) (.cse0 (= ~z$r_buff0_thd1~0_In346650962 ~z$r_buff0_thd1~0_Out346650962)) (.cse2 (= (mod ~z$w_buff0_used~0_In346650962 256) 0))) (or (and .cse0 .cse1) (and (= 0 ~z$r_buff0_thd1~0_Out346650962) (not .cse2) (not .cse1)) (and .cse0 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In346650962, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In346650962} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In346650962, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out346650962|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out346650962} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 13:48:08,445 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L744-->L744-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In-999654839 256))) (.cse3 (= (mod ~z$w_buff0_used~0_In-999654839 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In-999654839 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd1~0_In-999654839 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite8_Out-999654839| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse0 .cse1) (= ~z$r_buff1_thd1~0_In-999654839 |P0Thread1of1ForFork0_#t~ite8_Out-999654839|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-999654839, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-999654839, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-999654839, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-999654839} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-999654839, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-999654839|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-999654839, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-999654839, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-999654839} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 13:48:08,445 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [792] [792] L744-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~z$r_buff1_thd1~0_118 |v_P0Thread1of1ForFork0_#t~ite8_36|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_64 1) v_~__unbuffered_cnt~0_63)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_64} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_35|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_118, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, ~z$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 13:48:08,445 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [705] [705] L807-1-->L813: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 13:48:08,445 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [753] [753] L813-2-->L813-5: Formula: (let ((.cse2 (= |ULTIMATE.start_main_#t~ite25_Out-1357544543| |ULTIMATE.start_main_#t~ite24_Out-1357544543|)) (.cse1 (= (mod ~z$r_buff1_thd0~0_In-1357544543 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1357544543 256)))) (or (and (or .cse0 .cse1) .cse2 (= ~z~0_In-1357544543 |ULTIMATE.start_main_#t~ite24_Out-1357544543|)) (and .cse2 (= ~z$w_buff1~0_In-1357544543 |ULTIMATE.start_main_#t~ite24_Out-1357544543|) (not .cse1) (not .cse0)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1357544543, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1357544543, ~z$w_buff1~0=~z$w_buff1~0_In-1357544543, ~z~0=~z~0_In-1357544543} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1357544543, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out-1357544543|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1357544543, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out-1357544543|, ~z$w_buff1~0=~z$w_buff1~0_In-1357544543, ~z~0=~z~0_In-1357544543} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 13:48:08,445 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L814-->L814-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In1922740660 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1922740660 256)))) (or (and (= ~z$w_buff0_used~0_In1922740660 |ULTIMATE.start_main_#t~ite26_Out1922740660|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite26_Out1922740660|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1922740660, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1922740660} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1922740660, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1922740660, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out1922740660|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 13:48:08,446 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L815-->L815-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In-1875131632 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1875131632 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1875131632 256))) (.cse3 (= (mod ~z$r_buff0_thd0~0_In-1875131632 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite27_Out-1875131632| 0)) (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite27_Out-1875131632| ~z$w_buff1_used~0_In-1875131632)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1875131632, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1875131632, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1875131632, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1875131632} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1875131632, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1875131632, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1875131632, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1875131632, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out-1875131632|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 13:48:08,446 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L816-->L816-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-924216434 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-924216434 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite28_Out-924216434| ~z$r_buff0_thd0~0_In-924216434) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite28_Out-924216434| 0) (not .cse0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-924216434, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-924216434} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-924216434, ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out-924216434|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-924216434} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 13:48:08,446 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L817-->L817-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In-1263106093 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In-1263106093 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In-1263106093 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-1263106093 256)))) (or (and (= ~z$r_buff1_thd0~0_In-1263106093 |ULTIMATE.start_main_#t~ite29_Out-1263106093|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite29_Out-1263106093|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1263106093, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1263106093, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1263106093, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1263106093} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1263106093, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out-1263106093|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1263106093, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1263106093, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1263106093} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 13:48:08,449 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [751] [751] L829-->L830: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_46 256))) (= v_~z$r_buff0_thd0~0_162 v_~z$r_buff0_thd0~0_161)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_162, ~weak$$choice2~0=v_~weak$$choice2~0_46} OutVars{~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_161, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_10|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_17|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_7|, ~weak$$choice2~0=v_~weak$$choice2~0_46} AuxVars[] AssignedVars[~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 13:48:08,449 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L832-->L4: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8| (mod v_~main$tmp_guard1~0_15 256)) (not (= (mod v_~z$flush_delayed~0_47 256) 0)) (= 0 v_~z$flush_delayed~0_46) (= v_~z$mem_tmp~0_33 v_~z~0_120)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_33, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_15, ~z$flush_delayed~0=v_~z$flush_delayed~0_47} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_33, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_28|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_15, ~z$flush_delayed~0=v_~z$flush_delayed~0_46, ~z~0=v_~z~0_120, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 13:48:08,449 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [780] [780] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_8 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_8 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_8, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 13:48:08,499 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 01:48:08 BasicIcfg [2019-12-07 13:48:08,499 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 13:48:08,499 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 13:48:08,500 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 13:48:08,500 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 13:48:08,500 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:47:19" (3/4) ... [2019-12-07 13:48:08,501 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 13:48:08,502 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [820] [820] ULTIMATE.startENTRY-->L803: Formula: (let ((.cse0 (store |v_#valid_58| 0 0))) (and (= v_~z$w_buff1~0_188 0) (= v_~weak$$choice2~0_132 0) (= v_~main$tmp_guard0~0_18 0) (= |v_#NULL.offset_6| 0) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t2501~0.base_22|) (= |v_ULTIMATE.start_main_~#t2501~0.offset_17| 0) (= v_~z$r_buff0_thd1~0_211 0) (= v_~main$tmp_guard1~0_26 0) (= v_~z~0_153 0) (= |v_#length_21| (store |v_#length_22| |v_ULTIMATE.start_main_~#t2501~0.base_22| 4)) (= 0 v_~z$r_buff0_thd3~0_107) (= v_~z$read_delayed_var~0.offset_7 0) (< 0 |v_#StackHeapBarrier_15|) (= v_~z$mem_tmp~0_39 0) (= v_~z$r_buff0_thd2~0_110 0) (= |v_#memory_int_19| (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t2501~0.base_22| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t2501~0.base_22|) |v_ULTIMATE.start_main_~#t2501~0.offset_17| 0))) (= v_~z$r_buff1_thd1~0_172 0) (= 0 v_~z$flush_delayed~0_55) (= 0 |v_#NULL.base_6|) (= v_~z$read_delayed_var~0.base_7 0) (= v_~z$read_delayed~0_7 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t2501~0.base_22|) 0) (= v_~y~0_40 0) (= 0 v_~x~0_132) (= |v_#valid_56| (store .cse0 |v_ULTIMATE.start_main_~#t2501~0.base_22| 1)) (= v_~__unbuffered_cnt~0_139 0) (= v_~z$w_buff1_used~0_438 0) (= v_~z$w_buff0~0_198 0) (= v_~z$r_buff1_thd0~0_288 0) (= 0 v_~weak$$choice0~0_34) (= v_~z$w_buff0_used~0_699 0) (= 0 v_~z$r_buff1_thd3~0_190) (= v_~z$r_buff1_thd2~0_178 0) (= v_~z$r_buff0_thd0~0_338 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_58|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_#t~nondet30=|v_ULTIMATE.start_main_#t~nondet30_59|, ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_25|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_178, ULTIMATE.start_main_#t~ite24=|v_ULTIMATE.start_main_#t~ite24_25|, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_27|, #NULL.offset=|v_#NULL.offset_6|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_135|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_42|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_37|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_23|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_44|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_34|, ULTIMATE.start_main_~#t2502~0.offset=|v_ULTIMATE.start_main_~#t2502~0.offset_17|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_338, #length=|v_#length_21|, ULTIMATE.start_main_~#t2501~0.base=|v_ULTIMATE.start_main_~#t2501~0.base_22|, ~z$mem_tmp~0=v_~z$mem_tmp~0_39, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_7|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_27|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_48|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_438, ULTIMATE.start_main_~#t2503~0.base=|v_ULTIMATE.start_main_~#t2503~0.base_19|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_38|, ~z$flush_delayed~0=v_~z$flush_delayed~0_55, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_29|, ~weak$$choice0~0=v_~weak$$choice0~0_34, #StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_26|, ULTIMATE.start_main_~#t2502~0.base=|v_ULTIMATE.start_main_~#t2502~0.base_21|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_172, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_7, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_107, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_139, ~x~0=v_~x~0_132, ULTIMATE.start_main_#t~nondet31=|v_ULTIMATE.start_main_#t~nondet31_59|, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_71|, ~z$read_delayed~0=v_~z$read_delayed~0_7, ULTIMATE.start_main_#t~ite25=|v_ULTIMATE.start_main_#t~ite25_29|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_27|, ~z$w_buff1~0=v_~z$w_buff1~0_188, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_26, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_195|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_15|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_7, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_23|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_39|, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_32|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_288, ULTIMATE.start_main_~#t2503~0.offset=|v_ULTIMATE.start_main_~#t2503~0.offset_14|, ~y~0=v_~y~0_40, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_110, ULTIMATE.start_main_~#t2501~0.offset=|v_ULTIMATE.start_main_~#t2501~0.offset_17|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_7|, ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_17|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_699, ~z$w_buff0~0=v_~z$w_buff0~0_198, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_190, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_39|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_56|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_18, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_23|, #NULL.base=|v_#NULL.base_6|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_44|, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_30|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, #valid=|v_#valid_56|, #memory_int=|v_#memory_int_19|, ~z~0=v_~z~0_153, ~weak$$choice2~0=v_~weak$$choice2~0_132, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_211} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet30, ULTIMATE.start_main_#t~ite28, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ULTIMATE.start_main_~#t2502~0.offset, ~z$r_buff0_thd0~0, #length, ULTIMATE.start_main_~#t2501~0.base, ~z$mem_tmp~0, ULTIMATE.start_main_#t~nondet22, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite35, ~z$w_buff1_used~0, ULTIMATE.start_main_~#t2503~0.base, ULTIMATE.start_main_#t~ite37, ~z$flush_delayed~0, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ULTIMATE.start_main_~#t2502~0.base, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_#t~nondet31, ULTIMATE.start_main_#t~ite29, ~z$read_delayed~0, ULTIMATE.start_main_#t~ite25, ULTIMATE.start_main_#t~ite46, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite44, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ULTIMATE.start_main_~#t2503~0.offset, ~y~0, ~z$r_buff0_thd2~0, ULTIMATE.start_main_~#t2501~0.offset, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_#t~nondet23, ~z$w_buff0_used~0, ~z$w_buff0~0, ~z$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 13:48:08,502 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] P0ENTRY-->L4-3: Formula: (and (= |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_5| (ite (not (and (not (= 0 (mod v_~z$w_buff0_used~0_114 256))) (not (= 0 (mod v_~z$w_buff1_used~0_60 256))))) 1 0)) (= v_~z$w_buff0_used~0_115 v_~z$w_buff1_used~0_60) (= v_P0Thread1of1ForFork0_~arg.offset_5 |v_P0Thread1of1ForFork0_#in~arg.offset_7|) (= v_~z$w_buff0~0_27 v_~z$w_buff1~0_20) (not (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_7 0)) (= v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_7 |v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_5|) (= v_~z$w_buff0_used~0_114 1) (= v_P0Thread1of1ForFork0_~arg.base_5 |v_P0Thread1of1ForFork0_#in~arg.base_7|) (= 2 v_~z$w_buff0~0_26)) InVars {P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_7|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_115, ~z$w_buff0~0=v_~z$w_buff0~0_27, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_7|} OutVars{P0Thread1of1ForFork0_#in~arg.offset=|v_P0Thread1of1ForFork0_#in~arg.offset_7|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_114, ~z$w_buff0~0=v_~z$w_buff0~0_26, P0Thread1of1ForFork0___VERIFIER_assert_~expression=v_P0Thread1of1ForFork0___VERIFIER_assert_~expression_7, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_60, P0Thread1of1ForFork0_#in~arg.base=|v_P0Thread1of1ForFork0_#in~arg.base_7|, ~z$w_buff1~0=v_~z$w_buff1~0_20, P0Thread1of1ForFork0_~arg.base=v_P0Thread1of1ForFork0_~arg.base_5, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork0___VERIFIER_assert_#in~expression_5|, P0Thread1of1ForFork0_~arg.offset=v_P0Thread1of1ForFork0_~arg.offset_5} AuxVars[] AssignedVars[~z$w_buff0_used~0, ~z$w_buff0~0, P0Thread1of1ForFork0___VERIFIER_assert_~expression, ~z$w_buff1_used~0, ~z$w_buff1~0, P0Thread1of1ForFork0_~arg.base, P0Thread1of1ForFork0___VERIFIER_assert_#in~expression, P0Thread1of1ForFork0_~arg.offset] because there is no mapped edge [2019-12-07 13:48:08,503 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [754] [754] L741-->L741-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In1231597935 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In1231597935 256)))) (or (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork0_#t~ite5_Out1231597935| 0)) (and (= |P0Thread1of1ForFork0_#t~ite5_Out1231597935| ~z$w_buff0_used~0_In1231597935) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1231597935, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1231597935} OutVars{P0Thread1of1ForFork0_#t~ite5=|P0Thread1of1ForFork0_#t~ite5_Out1231597935|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1231597935, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1231597935} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite5] because there is no mapped edge [2019-12-07 13:48:08,503 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [783] [783] L803-1-->L805: Formula: (and (< |v_#StackHeapBarrier_8| |v_ULTIMATE.start_main_~#t2502~0.base_9|) (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t2502~0.base_9| 4)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2502~0.base_9| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t2502~0.base_9|) |v_ULTIMATE.start_main_~#t2502~0.offset_9| 1)) |v_#memory_int_11|) (not (= |v_ULTIMATE.start_main_~#t2502~0.base_9| 0)) (= 0 |v_ULTIMATE.start_main_~#t2502~0.offset_9|) (= |v_#valid_27| (store |v_#valid_28| |v_ULTIMATE.start_main_~#t2502~0.base_9| 1)) (= 0 (select |v_#valid_28| |v_ULTIMATE.start_main_~#t2502~0.base_9|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_8|, #valid=|v_#valid_28|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t2502~0.offset=|v_ULTIMATE.start_main_~#t2502~0.offset_9|, #StackHeapBarrier=|v_#StackHeapBarrier_8|, ULTIMATE.start_main_#t~nondet21=|v_ULTIMATE.start_main_#t~nondet21_4|, ULTIMATE.start_main_~#t2502~0.base=|v_ULTIMATE.start_main_~#t2502~0.base_9|, #valid=|v_#valid_27|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2502~0.offset, ULTIMATE.start_main_#t~nondet21, ULTIMATE.start_main_~#t2502~0.base, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 13:48:08,503 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [802] [802] L805-1-->L807: Formula: (and (= 0 (select |v_#valid_39| |v_ULTIMATE.start_main_~#t2503~0.base_13|)) (= (store |v_#valid_39| |v_ULTIMATE.start_main_~#t2503~0.base_13| 1) |v_#valid_38|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2503~0.base_13| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2503~0.base_13|) |v_ULTIMATE.start_main_~#t2503~0.offset_11| 2)) |v_#memory_int_15|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t2503~0.base_13| 4)) (= |v_ULTIMATE.start_main_~#t2503~0.offset_11| 0) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2503~0.base_13|) (not (= 0 |v_ULTIMATE.start_main_~#t2503~0.base_13|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet22=|v_ULTIMATE.start_main_#t~nondet22_5|, #valid=|v_#valid_38|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t2503~0.base=|v_ULTIMATE.start_main_~#t2503~0.base_13|, #length=|v_#length_17|, ULTIMATE.start_main_~#t2503~0.offset=|v_ULTIMATE.start_main_~#t2503~0.offset_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet22, #valid, #memory_int, ULTIMATE.start_main_~#t2503~0.base, #length, ULTIMATE.start_main_~#t2503~0.offset] because there is no mapped edge [2019-12-07 13:48:08,504 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L760-2-->L760-4: Formula: (let ((.cse0 (= (mod ~z$r_buff1_thd2~0_In-1457795909 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1457795909 256)))) (or (and (not .cse0) (= |P1Thread1of1ForFork1_#t~ite9_Out-1457795909| ~z$w_buff1~0_In-1457795909) (not .cse1)) (and (= |P1Thread1of1ForFork1_#t~ite9_Out-1457795909| ~z~0_In-1457795909) (or .cse0 .cse1)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1457795909, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1457795909, ~z$w_buff1~0=~z$w_buff1~0_In-1457795909, ~z~0=~z~0_In-1457795909} OutVars{P1Thread1of1ForFork1_#t~ite9=|P1Thread1of1ForFork1_#t~ite9_Out-1457795909|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1457795909, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1457795909, ~z$w_buff1~0=~z$w_buff1~0_In-1457795909, ~z~0=~z~0_In-1457795909} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9] because there is no mapped edge [2019-12-07 13:48:08,504 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [706] [706] L760-4-->L761: Formula: (= |v_P1Thread1of1ForFork1_#t~ite9_8| v_~z~0_37) InVars {P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_8|} OutVars{P1Thread1of1ForFork1_#t~ite9=|v_P1Thread1of1ForFork1_#t~ite9_7|, P1Thread1of1ForFork1_#t~ite10=|v_P1Thread1of1ForFork1_#t~ite10_11|, ~z~0=v_~z~0_37} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite9, P1Thread1of1ForFork1_#t~ite10, ~z~0] because there is no mapped edge [2019-12-07 13:48:08,504 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [772] [772] L761-->L761-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd2~0_In323989016 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In323989016 256) 0))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite11_Out323989016|) (not .cse1)) (and (= ~z$w_buff0_used~0_In323989016 |P1Thread1of1ForFork1_#t~ite11_Out323989016|) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In323989016, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In323989016} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In323989016, P1Thread1of1ForFork1_#t~ite11=|P1Thread1of1ForFork1_#t~ite11_Out323989016|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In323989016} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 13:48:08,505 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L780-2-->L780-4: Formula: (let ((.cse0 (= (mod ~z$w_buff1_used~0_In320321837 256) 0)) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In320321837 256)))) (or (and (= |P2Thread1of1ForFork2_#t~ite15_Out320321837| ~z$w_buff1~0_In320321837) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite15_Out320321837| ~z~0_In320321837)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In320321837, ~z$w_buff1_used~0=~z$w_buff1_used~0_In320321837, ~z$w_buff1~0=~z$w_buff1~0_In320321837, ~z~0=~z~0_In320321837} OutVars{P2Thread1of1ForFork2_#t~ite15=|P2Thread1of1ForFork2_#t~ite15_Out320321837|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In320321837, ~z$w_buff1_used~0=~z$w_buff1_used~0_In320321837, ~z$w_buff1~0=~z$w_buff1~0_In320321837, ~z~0=~z~0_In320321837} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15] because there is no mapped edge [2019-12-07 13:48:08,505 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [707] [707] L780-4-->L781: Formula: (= |v_P2Thread1of1ForFork2_#t~ite15_8| v_~z~0_41) InVars {P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_8|} OutVars{P2Thread1of1ForFork2_#t~ite15=|v_P2Thread1of1ForFork2_#t~ite15_7|, ~z~0=v_~z~0_41, P2Thread1of1ForFork2_#t~ite16=|v_P2Thread1of1ForFork2_#t~ite16_13|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite15, ~z~0, P2Thread1of1ForFork2_#t~ite16] because there is no mapped edge [2019-12-07 13:48:08,505 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [776] [776] L781-->L781-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In1155815033 256))) (.cse1 (= (mod ~z$r_buff0_thd3~0_In1155815033 256) 0))) (or (and (= |P2Thread1of1ForFork2_#t~ite17_Out1155815033| 0) (not .cse0) (not .cse1)) (and (= |P2Thread1of1ForFork2_#t~ite17_Out1155815033| ~z$w_buff0_used~0_In1155815033) (or .cse0 .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1155815033, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1155815033} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1155815033, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1155815033, P2Thread1of1ForFork2_#t~ite17=|P2Thread1of1ForFork2_#t~ite17_Out1155815033|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite17] because there is no mapped edge [2019-12-07 13:48:08,505 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L782-->L782-2: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In-360730082 256) 0)) (.cse0 (= (mod ~z$r_buff1_thd3~0_In-360730082 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd3~0_In-360730082 256))) (.cse3 (= 0 (mod ~z$w_buff0_used~0_In-360730082 256)))) (or (and (= ~z$w_buff1_used~0_In-360730082 |P2Thread1of1ForFork2_#t~ite18_Out-360730082|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork2_#t~ite18_Out-360730082| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-360730082, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-360730082, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-360730082, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-360730082} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-360730082, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-360730082, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-360730082, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-360730082, P2Thread1of1ForFork2_#t~ite18=|P2Thread1of1ForFork2_#t~ite18_Out-360730082|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite18] because there is no mapped edge [2019-12-07 13:48:08,505 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L762-->L762-2: Formula: (let ((.cse3 (= (mod ~z$w_buff0_used~0_In-418598319 256) 0)) (.cse2 (= 0 (mod ~z$r_buff0_thd2~0_In-418598319 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In-418598319 256))) (.cse1 (= (mod ~z$w_buff1_used~0_In-418598319 256) 0))) (or (and (or .cse0 .cse1) (= ~z$w_buff1_used~0_In-418598319 |P1Thread1of1ForFork1_#t~ite12_Out-418598319|) (or .cse2 .cse3)) (and (= 0 |P1Thread1of1ForFork1_#t~ite12_Out-418598319|) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-418598319, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-418598319, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-418598319, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-418598319} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-418598319, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-418598319, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-418598319, P1Thread1of1ForFork1_#t~ite12=|P1Thread1of1ForFork1_#t~ite12_Out-418598319|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-418598319} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 13:48:08,505 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [773] [773] L783-->L783-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In2008910382 256))) (.cse1 (= (mod ~z$r_buff0_thd3~0_In2008910382 256) 0))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork2_#t~ite19_Out2008910382| 0)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork2_#t~ite19_Out2008910382| ~z$r_buff0_thd3~0_In2008910382)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2008910382, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2008910382} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2008910382, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2008910382, P2Thread1of1ForFork2_#t~ite19=|P2Thread1of1ForFork2_#t~ite19_Out2008910382|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite19] because there is no mapped edge [2019-12-07 13:48:08,506 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [779] [779] L763-->L763-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-861566914 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd2~0_In-861566914 256) 0))) (or (and (not .cse0) (= 0 |P1Thread1of1ForFork1_#t~ite13_Out-861566914|) (not .cse1)) (and (or .cse1 .cse0) (= ~z$r_buff0_thd2~0_In-861566914 |P1Thread1of1ForFork1_#t~ite13_Out-861566914|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-861566914, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-861566914} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-861566914, P1Thread1of1ForFork1_#t~ite13=|P1Thread1of1ForFork1_#t~ite13_Out-861566914|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-861566914} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite13] because there is no mapped edge [2019-12-07 13:48:08,506 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L764-->L764-2: Formula: (let ((.cse3 (= (mod ~z$r_buff1_thd2~0_In-254036009 256) 0)) (.cse2 (= (mod ~z$w_buff1_used~0_In-254036009 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In-254036009 256))) (.cse0 (= (mod ~z$w_buff0_used~0_In-254036009 256) 0))) (or (and (= ~z$r_buff1_thd2~0_In-254036009 |P1Thread1of1ForFork1_#t~ite14_Out-254036009|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= 0 |P1Thread1of1ForFork1_#t~ite14_Out-254036009|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-254036009, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-254036009, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-254036009, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-254036009} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-254036009, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-254036009, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-254036009, P1Thread1of1ForFork1_#t~ite14=|P1Thread1of1ForFork1_#t~ite14_Out-254036009|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-254036009} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#t~ite14] because there is no mapped edge [2019-12-07 13:48:08,506 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L764-2-->P1EXIT: Formula: (and (= v_~z$r_buff1_thd2~0_130 |v_P1Thread1of1ForFork1_#t~ite14_38|) (= (+ v_~__unbuffered_cnt~0_70 1) v_~__unbuffered_cnt~0_69) (= 0 |v_P1Thread1of1ForFork1_#res.base_3|) (= |v_P1Thread1of1ForFork1_#res.offset_3| 0)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_38|} OutVars{P1Thread1of1ForFork1_#res.offset=|v_P1Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_130, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69, P1Thread1of1ForFork1_#t~ite14=|v_P1Thread1of1ForFork1_#t~ite14_37|, P1Thread1of1ForFork1_#res.base=|v_P1Thread1of1ForFork1_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork1_#t~ite14, P1Thread1of1ForFork1_#res.base] because there is no mapped edge [2019-12-07 13:48:08,506 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [756] [756] L784-->L784-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-229793340 256))) (.cse0 (= (mod ~z$r_buff0_thd3~0_In-229793340 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd3~0_In-229793340 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-229793340 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$r_buff1_thd3~0_In-229793340 |P2Thread1of1ForFork2_#t~ite20_Out-229793340|)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= |P2Thread1of1ForFork2_#t~ite20_Out-229793340| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-229793340, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-229793340, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-229793340, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-229793340} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-229793340, P2Thread1of1ForFork2_#t~ite20=|P2Thread1of1ForFork2_#t~ite20_Out-229793340|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-229793340, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-229793340, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-229793340} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20] because there is no mapped edge [2019-12-07 13:48:08,506 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [803] [803] L784-2-->P2EXIT: Formula: (and (= v_~z$r_buff1_thd3~0_148 |v_P2Thread1of1ForFork2_#t~ite20_34|) (= (+ v_~__unbuffered_cnt~0_80 1) v_~__unbuffered_cnt~0_79) (= 0 |v_P2Thread1of1ForFork2_#res.base_3|) (= |v_P2Thread1of1ForFork2_#res.offset_3| 0)) InVars {P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_80} OutVars{P2Thread1of1ForFork2_#t~ite20=|v_P2Thread1of1ForFork2_#t~ite20_33|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_148, P2Thread1of1ForFork2_#res.base=|v_P2Thread1of1ForFork2_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79, P2Thread1of1ForFork2_#res.offset=|v_P2Thread1of1ForFork2_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork2_#t~ite20, ~z$r_buff1_thd3~0, P2Thread1of1ForFork2_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork2_#res.offset] because there is no mapped edge [2019-12-07 13:48:08,506 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [767] [767] L742-->L742-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In-242904203 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-242904203 256) 0)) (.cse2 (= (mod ~z$w_buff1_used~0_In-242904203 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd1~0_In-242904203 256)))) (or (and (= |P0Thread1of1ForFork0_#t~ite6_Out-242904203| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$w_buff1_used~0_In-242904203 |P0Thread1of1ForFork0_#t~ite6_Out-242904203|) (or .cse0 .cse1) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-242904203, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-242904203, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-242904203, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-242904203} OutVars{P0Thread1of1ForFork0_#t~ite6=|P0Thread1of1ForFork0_#t~ite6_Out-242904203|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-242904203, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-242904203, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-242904203, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-242904203} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite6] because there is no mapped edge [2019-12-07 13:48:08,507 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [768] [768] L743-->L744: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd1~0_In346650962 256))) (.cse0 (= ~z$r_buff0_thd1~0_In346650962 ~z$r_buff0_thd1~0_Out346650962)) (.cse2 (= (mod ~z$w_buff0_used~0_In346650962 256) 0))) (or (and .cse0 .cse1) (and (= 0 ~z$r_buff0_thd1~0_Out346650962) (not .cse2) (not .cse1)) (and .cse0 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In346650962, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In346650962} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In346650962, P0Thread1of1ForFork0_#t~ite7=|P0Thread1of1ForFork0_#t~ite7_Out346650962|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out346650962} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 13:48:08,507 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L744-->L744-2: Formula: (let ((.cse2 (= 0 (mod ~z$r_buff0_thd1~0_In-999654839 256))) (.cse3 (= (mod ~z$w_buff0_used~0_In-999654839 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In-999654839 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd1~0_In-999654839 256) 0))) (or (and (= |P0Thread1of1ForFork0_#t~ite8_Out-999654839| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse0 .cse1) (= ~z$r_buff1_thd1~0_In-999654839 |P0Thread1of1ForFork0_#t~ite8_Out-999654839|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-999654839, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-999654839, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-999654839, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-999654839} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-999654839, P0Thread1of1ForFork0_#t~ite8=|P0Thread1of1ForFork0_#t~ite8_Out-999654839|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In-999654839, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-999654839, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-999654839} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#t~ite8] because there is no mapped edge [2019-12-07 13:48:08,507 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [792] [792] L744-2-->P0EXIT: Formula: (and (= |v_P0Thread1of1ForFork0_#res.offset_3| 0) (= v_~z$r_buff1_thd1~0_118 |v_P0Thread1of1ForFork0_#t~ite8_36|) (= 0 |v_P0Thread1of1ForFork0_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_64 1) v_~__unbuffered_cnt~0_63)) InVars {P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_64} OutVars{P0Thread1of1ForFork0_#res.offset=|v_P0Thread1of1ForFork0_#res.offset_3|, P0Thread1of1ForFork0_#t~ite8=|v_P0Thread1of1ForFork0_#t~ite8_35|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_118, P0Thread1of1ForFork0_#res.base=|v_P0Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63} AuxVars[] AssignedVars[P0Thread1of1ForFork0_#res.offset, P0Thread1of1ForFork0_#t~ite8, ~z$r_buff1_thd1~0, P0Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 13:48:08,507 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [705] [705] L807-1-->L813: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet23=|v_ULTIMATE.start_main_#t~nondet23_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet23, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 13:48:08,507 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [753] [753] L813-2-->L813-5: Formula: (let ((.cse2 (= |ULTIMATE.start_main_#t~ite25_Out-1357544543| |ULTIMATE.start_main_#t~ite24_Out-1357544543|)) (.cse1 (= (mod ~z$r_buff1_thd0~0_In-1357544543 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1357544543 256)))) (or (and (or .cse0 .cse1) .cse2 (= ~z~0_In-1357544543 |ULTIMATE.start_main_#t~ite24_Out-1357544543|)) (and .cse2 (= ~z$w_buff1~0_In-1357544543 |ULTIMATE.start_main_#t~ite24_Out-1357544543|) (not .cse1) (not .cse0)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1357544543, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1357544543, ~z$w_buff1~0=~z$w_buff1~0_In-1357544543, ~z~0=~z~0_In-1357544543} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1357544543, ULTIMATE.start_main_#t~ite24=|ULTIMATE.start_main_#t~ite24_Out-1357544543|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1357544543, ULTIMATE.start_main_#t~ite25=|ULTIMATE.start_main_#t~ite25_Out-1357544543|, ~z$w_buff1~0=~z$w_buff1~0_In-1357544543, ~z~0=~z~0_In-1357544543} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite24, ULTIMATE.start_main_#t~ite25] because there is no mapped edge [2019-12-07 13:48:08,507 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L814-->L814-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In1922740660 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1922740660 256)))) (or (and (= ~z$w_buff0_used~0_In1922740660 |ULTIMATE.start_main_#t~ite26_Out1922740660|) (or .cse0 .cse1)) (and (not .cse1) (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite26_Out1922740660|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1922740660, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1922740660} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1922740660, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1922740660, ULTIMATE.start_main_#t~ite26=|ULTIMATE.start_main_#t~ite26_Out1922740660|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite26] because there is no mapped edge [2019-12-07 13:48:08,508 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [764] [764] L815-->L815-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In-1875131632 256))) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In-1875131632 256))) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In-1875131632 256))) (.cse3 (= (mod ~z$r_buff0_thd0~0_In-1875131632 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite27_Out-1875131632| 0)) (and (or .cse0 .cse1) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite27_Out-1875131632| ~z$w_buff1_used~0_In-1875131632)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1875131632, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1875131632, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1875131632, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1875131632} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1875131632, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1875131632, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1875131632, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1875131632, ULTIMATE.start_main_#t~ite27=|ULTIMATE.start_main_#t~ite27_Out-1875131632|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite27] because there is no mapped edge [2019-12-07 13:48:08,508 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [758] [758] L816-->L816-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd0~0_In-924216434 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-924216434 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite28_Out-924216434| ~z$r_buff0_thd0~0_In-924216434) (or .cse0 .cse1)) (and (= |ULTIMATE.start_main_#t~ite28_Out-924216434| 0) (not .cse0) (not .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-924216434, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-924216434} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-924216434, ULTIMATE.start_main_#t~ite28=|ULTIMATE.start_main_#t~ite28_Out-924216434|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-924216434} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28] because there is no mapped edge [2019-12-07 13:48:08,508 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [770] [770] L817-->L817-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In-1263106093 256) 0)) (.cse0 (= (mod ~z$w_buff0_used~0_In-1263106093 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd0~0_In-1263106093 256))) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In-1263106093 256)))) (or (and (= ~z$r_buff1_thd0~0_In-1263106093 |ULTIMATE.start_main_#t~ite29_Out-1263106093|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |ULTIMATE.start_main_#t~ite29_Out-1263106093|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1263106093, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1263106093, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1263106093, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1263106093} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1263106093, ULTIMATE.start_main_#t~ite29=|ULTIMATE.start_main_#t~ite29_Out-1263106093|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1263106093, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-1263106093, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1263106093} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite29] because there is no mapped edge [2019-12-07 13:48:08,511 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [751] [751] L829-->L830: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_46 256))) (= v_~z$r_buff0_thd0~0_162 v_~z$r_buff0_thd0~0_161)) InVars {~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_162, ~weak$$choice2~0=v_~weak$$choice2~0_46} OutVars{~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_161, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_10|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_17|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_7|, ~weak$$choice2~0=v_~weak$$choice2~0_46} AuxVars[] AssignedVars[~z$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite46, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 13:48:08,511 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L832-->L4: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_8| (mod v_~main$tmp_guard1~0_15 256)) (not (= (mod v_~z$flush_delayed~0_47 256) 0)) (= 0 v_~z$flush_delayed~0_46) (= v_~z$mem_tmp~0_33 v_~z~0_120)) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_33, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_15, ~z$flush_delayed~0=v_~z$flush_delayed~0_47} OutVars{~z$mem_tmp~0=v_~z$mem_tmp~0_33, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_28|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_12, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_15, ~z$flush_delayed~0=v_~z$flush_delayed~0_46, ~z~0=v_~z~0_120, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_8|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$flush_delayed~0, ~z~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 13:48:08,511 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [780] [780] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_8 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_8 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_8, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 13:48:08,567 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_831d22dc-e084-461c-9e9f-fd745810e9c8/bin/uautomizer/witness.graphml [2019-12-07 13:48:08,568 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 13:48:08,569 INFO L168 Benchmark]: Toolchain (without parser) took 49745.48 ms. Allocated memory was 1.0 GB in the beginning and 6.0 GB in the end (delta: 5.0 GB). Free memory was 938.0 MB in the beginning and 2.7 GB in the end (delta: -1.7 GB). Peak memory consumption was 3.2 GB. Max. memory is 11.5 GB. [2019-12-07 13:48:08,569 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 13:48:08,570 INFO L168 Benchmark]: CACSL2BoogieTranslator took 403.39 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 95.9 MB). Free memory was 938.0 MB in the beginning and 1.1 GB in the end (delta: -124.3 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. [2019-12-07 13:48:08,570 INFO L168 Benchmark]: Boogie Procedure Inliner took 53.77 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 13:48:08,570 INFO L168 Benchmark]: Boogie Preprocessor took 34.72 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 13:48:08,570 INFO L168 Benchmark]: RCFGBuilder took 436.59 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.0 MB). Peak memory consumption was 56.0 MB. Max. memory is 11.5 GB. [2019-12-07 13:48:08,570 INFO L168 Benchmark]: TraceAbstraction took 48744.86 ms. Allocated memory was 1.1 GB in the beginning and 6.0 GB in the end (delta: 4.9 GB). Free memory was 1.0 GB in the beginning and 2.7 GB in the end (delta: -1.7 GB). Peak memory consumption was 3.2 GB. Max. memory is 11.5 GB. [2019-12-07 13:48:08,571 INFO L168 Benchmark]: Witness Printer took 68.61 ms. Allocated memory is still 6.0 GB. Free memory was 2.7 GB in the beginning and 2.7 GB in the end (delta: 14.6 MB). Peak memory consumption was 14.6 MB. Max. memory is 11.5 GB. [2019-12-07 13:48:08,572 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 403.39 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 95.9 MB). Free memory was 938.0 MB in the beginning and 1.1 GB in the end (delta: -124.3 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 53.77 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 34.72 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 436.59 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.0 MB). Peak memory consumption was 56.0 MB. Max. memory is 11.5 GB. * TraceAbstraction took 48744.86 ms. Allocated memory was 1.1 GB in the beginning and 6.0 GB in the end (delta: 4.9 GB). Free memory was 1.0 GB in the beginning and 2.7 GB in the end (delta: -1.7 GB). Peak memory consumption was 3.2 GB. Max. memory is 11.5 GB. * Witness Printer took 68.61 ms. Allocated memory is still 6.0 GB. Free memory was 2.7 GB in the beginning and 2.7 GB in the end (delta: 14.6 MB). Peak memory consumption was 14.6 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 2.8s, 173 ProgramPointsBefore, 95 ProgramPointsAfterwards, 210 TransitionsBefore, 107 TransitionsAfterwards, 17114 CoEnabledTransitionPairs, 7 FixpointIterations, 30 TrivialSequentialCompositions, 42 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 38 ConcurrentYvCompositions, 29 ChoiceCompositions, 5611 VarBasedMoverChecksPositive, 231 VarBasedMoverChecksNegative, 69 SemBasedMoverChecksPositive, 225 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.7s, 0 MoverChecksTotal, 79634 CheckedPairsTotal, 110 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L803] FCALL, FORK 0 pthread_create(&t2501, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L730] 1 z$r_buff1_thd0 = z$r_buff0_thd0 [L731] 1 z$r_buff1_thd1 = z$r_buff0_thd1 [L732] 1 z$r_buff1_thd2 = z$r_buff0_thd2 [L733] 1 z$r_buff1_thd3 = z$r_buff0_thd3 [L734] 1 z$r_buff0_thd1 = (_Bool)1 [L737] 1 x = 1 VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L740] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L740] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L741] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L805] FCALL, FORK 0 pthread_create(&t2502, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L807] FCALL, FORK 0 pthread_create(&t2503, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L754] 2 x = 2 [L757] 2 y = 1 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L760] 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=1, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L774] 3 y = 2 [L777] 3 z = 1 VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z=2] [L780] 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, z=1, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0, z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z=2] [L761] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L781] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L762] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L782] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L763] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L783] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L742] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L813] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=2, y=2, z=2, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L813] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L814] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L815] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L816] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 [L817] 0 z$r_buff1_thd0 = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$r_buff1_thd0 [L820] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L821] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L822] 0 z$flush_delayed = weak$$choice2 [L823] 0 z$mem_tmp = z VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L824] EXPR 0 !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L824] 0 z = !z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff1) [L825] EXPR 0 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L825] 0 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : z$w_buff0)) [L826] EXPR 0 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L826] 0 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff1 : z$w_buff1)) [L827] EXPR 0 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L827] 0 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used)) [L828] EXPR 0 weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L828] 0 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L830] EXPR 0 weak$$choice2 ? z$r_buff1_thd0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$r_buff1_thd0 : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L830] 0 z$r_buff1_thd0 = weak$$choice2 ? z$r_buff1_thd0 : (!z$w_buff0_used || !z$r_buff0_thd0 && !z$w_buff1_used || !z$r_buff0_thd0 && !z$r_buff1_thd0 ? z$r_buff1_thd0 : (z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L831] 0 main$tmp_guard1 = !(x == 2 && y == 2 && z == 2) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=2, y=2, z=2, z$flush_delayed=1, z$mem_tmp=2, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=2, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 164 locations, 2 error locations. Result: UNSAFE, OverallTime: 48.6s, OverallIterations: 19, TraceHistogramMax: 1, AutomataDifference: 7.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 3323 SDtfs, 2695 SDslu, 6122 SDs, 0 SdLazy, 3436 SolverSat, 138 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 2.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 133 GetRequests, 23 SyntacticMatches, 21 SemanticMatches, 89 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 135 ImplicationChecksByTransitivity, 0.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=162745occurred in iteration=2, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 23.2s AutomataMinimizationTime, 18 MinimizatonAttempts, 82876 StatesRemovedByMinimization, 16 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.8s InterpolantComputationTime, 800 NumberOfCodeBlocks, 800 NumberOfCodeBlocksAsserted, 19 NumberOfCheckSat, 714 ConstructedInterpolants, 0 QuantifiedInterpolants, 140670 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 18 InterpolantComputations, 18 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...