./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/safe031_pso.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_fb0ed9d7-d9b9-4999-a06e-ad246baea4b5/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_fb0ed9d7-d9b9-4999-a06e-ad246baea4b5/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_fb0ed9d7-d9b9-4999-a06e-ad246baea4b5/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_fb0ed9d7-d9b9-4999-a06e-ad246baea4b5/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/safe031_pso.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_fb0ed9d7-d9b9-4999-a06e-ad246baea4b5/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_fb0ed9d7-d9b9-4999-a06e-ad246baea4b5/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash e9c308ebb550e1fb0f7b53d2bde00a7623abfa26 ...................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 17:51:31,171 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 17:51:31,172 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 17:51:31,180 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 17:51:31,180 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 17:51:31,181 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 17:51:31,182 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 17:51:31,183 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 17:51:31,184 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 17:51:31,185 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 17:51:31,186 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 17:51:31,186 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 17:51:31,187 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 17:51:31,187 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 17:51:31,188 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 17:51:31,189 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 17:51:31,189 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 17:51:31,190 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 17:51:31,191 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 17:51:31,192 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 17:51:31,193 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 17:51:31,194 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 17:51:31,195 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 17:51:31,195 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 17:51:31,197 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 17:51:31,197 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 17:51:31,197 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 17:51:31,198 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 17:51:31,198 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 17:51:31,198 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 17:51:31,199 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 17:51:31,199 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 17:51:31,199 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 17:51:31,200 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 17:51:31,200 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 17:51:31,201 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 17:51:31,201 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 17:51:31,201 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 17:51:31,201 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 17:51:31,202 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 17:51:31,202 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 17:51:31,203 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_fb0ed9d7-d9b9-4999-a06e-ad246baea4b5/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 17:51:31,212 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 17:51:31,212 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 17:51:31,213 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 17:51:31,213 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 17:51:31,213 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 17:51:31,213 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 17:51:31,213 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 17:51:31,214 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 17:51:31,214 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 17:51:31,214 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 17:51:31,214 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 17:51:31,214 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 17:51:31,214 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 17:51:31,214 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 17:51:31,214 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 17:51:31,215 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 17:51:31,215 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 17:51:31,215 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 17:51:31,215 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 17:51:31,215 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 17:51:31,215 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 17:51:31,215 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:51:31,216 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 17:51:31,216 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 17:51:31,216 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 17:51:31,216 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 17:51:31,216 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 17:51:31,216 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 17:51:31,216 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 17:51:31,216 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_fb0ed9d7-d9b9-4999-a06e-ad246baea4b5/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> e9c308ebb550e1fb0f7b53d2bde00a7623abfa26 [2019-12-07 17:51:31,315 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 17:51:31,325 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 17:51:31,327 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 17:51:31,328 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 17:51:31,329 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 17:51:31,329 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_fb0ed9d7-d9b9-4999-a06e-ad246baea4b5/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/safe031_pso.opt.i [2019-12-07 17:51:31,376 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_fb0ed9d7-d9b9-4999-a06e-ad246baea4b5/bin/uautomizer/data/339c8bb3f/dcdd41061ee046e582f826e23cdec9ce/FLAGc01ce09a8 [2019-12-07 17:51:31,808 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 17:51:31,809 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_fb0ed9d7-d9b9-4999-a06e-ad246baea4b5/sv-benchmarks/c/pthread-wmm/safe031_pso.opt.i [2019-12-07 17:51:31,818 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_fb0ed9d7-d9b9-4999-a06e-ad246baea4b5/bin/uautomizer/data/339c8bb3f/dcdd41061ee046e582f826e23cdec9ce/FLAGc01ce09a8 [2019-12-07 17:51:32,153 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_fb0ed9d7-d9b9-4999-a06e-ad246baea4b5/bin/uautomizer/data/339c8bb3f/dcdd41061ee046e582f826e23cdec9ce [2019-12-07 17:51:32,155 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 17:51:32,156 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 17:51:32,157 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 17:51:32,157 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 17:51:32,160 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 17:51:32,160 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:51:32" (1/1) ... [2019-12-07 17:51:32,162 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@296938c1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:51:32, skipping insertion in model container [2019-12-07 17:51:32,162 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:51:32" (1/1) ... [2019-12-07 17:51:32,168 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 17:51:32,196 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 17:51:32,434 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:51:32,442 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 17:51:32,483 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:51:32,528 INFO L208 MainTranslator]: Completed translation [2019-12-07 17:51:32,528 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:51:32 WrapperNode [2019-12-07 17:51:32,528 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 17:51:32,529 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 17:51:32,529 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 17:51:32,529 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 17:51:32,534 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:51:32" (1/1) ... [2019-12-07 17:51:32,547 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:51:32" (1/1) ... [2019-12-07 17:51:32,567 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 17:51:32,568 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 17:51:32,568 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 17:51:32,568 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 17:51:32,574 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:51:32" (1/1) ... [2019-12-07 17:51:32,574 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:51:32" (1/1) ... [2019-12-07 17:51:32,577 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:51:32" (1/1) ... [2019-12-07 17:51:32,577 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:51:32" (1/1) ... [2019-12-07 17:51:32,584 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:51:32" (1/1) ... [2019-12-07 17:51:32,587 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:51:32" (1/1) ... [2019-12-07 17:51:32,590 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:51:32" (1/1) ... [2019-12-07 17:51:32,593 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 17:51:32,593 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 17:51:32,593 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 17:51:32,593 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 17:51:32,594 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:51:32" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_fb0ed9d7-d9b9-4999-a06e-ad246baea4b5/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:51:32,633 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 17:51:32,633 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 17:51:32,633 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 17:51:32,633 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 17:51:32,634 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 17:51:32,634 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 17:51:32,634 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 17:51:32,634 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 17:51:32,634 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 17:51:32,634 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 17:51:32,634 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 17:51:32,634 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 17:51:32,635 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 17:51:32,636 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 17:51:32,974 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 17:51:32,974 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 17:51:32,975 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:51:32 BoogieIcfgContainer [2019-12-07 17:51:32,975 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 17:51:32,976 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 17:51:32,976 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 17:51:32,978 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 17:51:32,978 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 05:51:32" (1/3) ... [2019-12-07 17:51:32,978 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@63e70e4d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:51:32, skipping insertion in model container [2019-12-07 17:51:32,978 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:51:32" (2/3) ... [2019-12-07 17:51:32,979 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@63e70e4d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:51:32, skipping insertion in model container [2019-12-07 17:51:32,979 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:51:32" (3/3) ... [2019-12-07 17:51:32,980 INFO L109 eAbstractionObserver]: Analyzing ICFG safe031_pso.opt.i [2019-12-07 17:51:32,986 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 17:51:32,986 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 17:51:32,991 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 17:51:32,992 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 17:51:33,015 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,015 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,015 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,015 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,016 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,016 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,016 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,016 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,016 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,016 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,017 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,017 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,017 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,017 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,017 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,017 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,017 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,018 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,018 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,018 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,018 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,018 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,018 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,018 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,018 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,018 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,019 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,019 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,019 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,019 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,019 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,019 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,020 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,020 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,020 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,020 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,021 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,021 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,021 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,022 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,022 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,022 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,022 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,022 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,023 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,023 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,023 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,023 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,023 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,024 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,024 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,024 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,024 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,024 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,024 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,025 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,025 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,025 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,025 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,025 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,025 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,025 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,026 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,026 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,026 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,026 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,026 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,026 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,027 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,027 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 17:51:33,041 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 17:51:33,056 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 17:51:33,057 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 17:51:33,057 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 17:51:33,057 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 17:51:33,057 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 17:51:33,057 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 17:51:33,057 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 17:51:33,057 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 17:51:33,068 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 162 places, 193 transitions [2019-12-07 17:51:33,069 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 162 places, 193 transitions [2019-12-07 17:51:33,130 INFO L134 PetriNetUnfolder]: 41/190 cut-off events. [2019-12-07 17:51:33,131 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:51:33,142 INFO L76 FinitePrefix]: Finished finitePrefix Result has 200 conditions, 190 events. 41/190 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 476 event pairs. 9/156 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 17:51:33,152 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 162 places, 193 transitions [2019-12-07 17:51:33,182 INFO L134 PetriNetUnfolder]: 41/190 cut-off events. [2019-12-07 17:51:33,182 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 17:51:33,187 INFO L76 FinitePrefix]: Finished finitePrefix Result has 200 conditions, 190 events. 41/190 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 9. Compared 476 event pairs. 9/156 useless extension candidates. Maximal degree in co-relation 161. Up to 2 conditions per place. [2019-12-07 17:51:33,198 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 11490 [2019-12-07 17:51:33,199 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 17:51:35,872 WARN L192 SmtUtils]: Spent 139.00 ms on a formula simplification. DAG size of input: 87 DAG size of output: 85 [2019-12-07 17:51:35,966 INFO L206 etLargeBlockEncoding]: Checked pairs total: 48124 [2019-12-07 17:51:35,967 INFO L214 etLargeBlockEncoding]: Total number of compositions: 111 [2019-12-07 17:51:35,969 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 83 places, 94 transitions [2019-12-07 17:51:36,665 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 15710 states. [2019-12-07 17:51:36,666 INFO L276 IsEmpty]: Start isEmpty. Operand 15710 states. [2019-12-07 17:51:36,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2019-12-07 17:51:36,671 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:51:36,672 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:51:36,672 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:51:36,676 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:51:36,676 INFO L82 PathProgramCache]: Analyzing trace with hash 2126234855, now seen corresponding path program 1 times [2019-12-07 17:51:36,682 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:51:36,682 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1551919386] [2019-12-07 17:51:36,683 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:51:36,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:51:36,850 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:51:36,851 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1551919386] [2019-12-07 17:51:36,851 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:51:36,851 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 17:51:36,852 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [173560851] [2019-12-07 17:51:36,855 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:51:36,855 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:51:36,864 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:51:36,865 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:51:36,866 INFO L87 Difference]: Start difference. First operand 15710 states. Second operand 3 states. [2019-12-07 17:51:37,092 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:51:37,092 INFO L93 Difference]: Finished difference Result 15638 states and 59348 transitions. [2019-12-07 17:51:37,093 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:51:37,094 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2019-12-07 17:51:37,094 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:51:37,206 INFO L225 Difference]: With dead ends: 15638 [2019-12-07 17:51:37,206 INFO L226 Difference]: Without dead ends: 15326 [2019-12-07 17:51:37,207 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:51:37,332 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15326 states. [2019-12-07 17:51:37,654 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15326 to 15326. [2019-12-07 17:51:37,655 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15326 states. [2019-12-07 17:51:37,757 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15326 states to 15326 states and 58230 transitions. [2019-12-07 17:51:37,758 INFO L78 Accepts]: Start accepts. Automaton has 15326 states and 58230 transitions. Word has length 7 [2019-12-07 17:51:37,759 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:51:37,759 INFO L462 AbstractCegarLoop]: Abstraction has 15326 states and 58230 transitions. [2019-12-07 17:51:37,759 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:51:37,760 INFO L276 IsEmpty]: Start isEmpty. Operand 15326 states and 58230 transitions. [2019-12-07 17:51:37,762 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 17:51:37,762 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:51:37,762 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:51:37,763 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:51:37,763 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:51:37,763 INFO L82 PathProgramCache]: Analyzing trace with hash -380072381, now seen corresponding path program 1 times [2019-12-07 17:51:37,763 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:51:37,763 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [753859788] [2019-12-07 17:51:37,763 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:51:37,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:51:37,820 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:51:37,820 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [753859788] [2019-12-07 17:51:37,820 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:51:37,821 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:51:37,821 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1299589349] [2019-12-07 17:51:37,822 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:51:37,822 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:51:37,822 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:51:37,822 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:51:37,822 INFO L87 Difference]: Start difference. First operand 15326 states and 58230 transitions. Second operand 4 states. [2019-12-07 17:51:38,144 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:51:38,145 INFO L93 Difference]: Finished difference Result 24490 states and 89350 transitions. [2019-12-07 17:51:38,145 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:51:38,145 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 17:51:38,145 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:51:38,202 INFO L225 Difference]: With dead ends: 24490 [2019-12-07 17:51:38,202 INFO L226 Difference]: Without dead ends: 24476 [2019-12-07 17:51:38,203 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:51:38,317 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24476 states. [2019-12-07 17:51:38,681 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24476 to 22206. [2019-12-07 17:51:38,682 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22206 states. [2019-12-07 17:51:38,724 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22206 states to 22206 states and 82052 transitions. [2019-12-07 17:51:38,724 INFO L78 Accepts]: Start accepts. Automaton has 22206 states and 82052 transitions. Word has length 13 [2019-12-07 17:51:38,724 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:51:38,724 INFO L462 AbstractCegarLoop]: Abstraction has 22206 states and 82052 transitions. [2019-12-07 17:51:38,724 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:51:38,724 INFO L276 IsEmpty]: Start isEmpty. Operand 22206 states and 82052 transitions. [2019-12-07 17:51:38,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 17:51:38,727 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:51:38,727 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:51:38,727 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:51:38,727 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:51:38,727 INFO L82 PathProgramCache]: Analyzing trace with hash 691839138, now seen corresponding path program 1 times [2019-12-07 17:51:38,727 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:51:38,727 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [176707490] [2019-12-07 17:51:38,728 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:51:38,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:51:38,773 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:51:38,774 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [176707490] [2019-12-07 17:51:38,774 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:51:38,774 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:51:38,774 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2083004597] [2019-12-07 17:51:38,775 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:51:38,775 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:51:38,775 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:51:38,775 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:51:38,775 INFO L87 Difference]: Start difference. First operand 22206 states and 82052 transitions. Second operand 4 states. [2019-12-07 17:51:38,960 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:51:38,960 INFO L93 Difference]: Finished difference Result 27876 states and 102039 transitions. [2019-12-07 17:51:38,960 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:51:38,960 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 17:51:38,960 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:51:39,021 INFO L225 Difference]: With dead ends: 27876 [2019-12-07 17:51:39,021 INFO L226 Difference]: Without dead ends: 27876 [2019-12-07 17:51:39,021 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:51:39,207 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27876 states. [2019-12-07 17:51:39,468 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27876 to 24582. [2019-12-07 17:51:39,468 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24582 states. [2019-12-07 17:51:39,516 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24582 states to 24582 states and 90664 transitions. [2019-12-07 17:51:39,516 INFO L78 Accepts]: Start accepts. Automaton has 24582 states and 90664 transitions. Word has length 13 [2019-12-07 17:51:39,517 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:51:39,517 INFO L462 AbstractCegarLoop]: Abstraction has 24582 states and 90664 transitions. [2019-12-07 17:51:39,517 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:51:39,517 INFO L276 IsEmpty]: Start isEmpty. Operand 24582 states and 90664 transitions. [2019-12-07 17:51:39,521 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 17:51:39,521 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:51:39,521 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:51:39,522 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:51:39,522 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:51:39,522 INFO L82 PathProgramCache]: Analyzing trace with hash -165939970, now seen corresponding path program 1 times [2019-12-07 17:51:39,522 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:51:39,522 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1021710939] [2019-12-07 17:51:39,522 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:51:39,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:51:39,578 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:51:39,578 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1021710939] [2019-12-07 17:51:39,578 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:51:39,578 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:51:39,578 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [34908489] [2019-12-07 17:51:39,579 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:51:39,579 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:51:39,579 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:51:39,579 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:51:39,579 INFO L87 Difference]: Start difference. First operand 24582 states and 90664 transitions. Second operand 5 states. [2019-12-07 17:51:39,916 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:51:39,917 INFO L93 Difference]: Finished difference Result 33300 states and 120391 transitions. [2019-12-07 17:51:39,917 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 17:51:39,917 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 17:51:39,917 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:51:39,985 INFO L225 Difference]: With dead ends: 33300 [2019-12-07 17:51:39,985 INFO L226 Difference]: Without dead ends: 33286 [2019-12-07 17:51:39,985 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:51:40,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33286 states. [2019-12-07 17:51:40,502 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33286 to 24486. [2019-12-07 17:51:40,502 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24486 states. [2019-12-07 17:51:40,549 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24486 states to 24486 states and 90098 transitions. [2019-12-07 17:51:40,549 INFO L78 Accepts]: Start accepts. Automaton has 24486 states and 90098 transitions. Word has length 19 [2019-12-07 17:51:40,549 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:51:40,549 INFO L462 AbstractCegarLoop]: Abstraction has 24486 states and 90098 transitions. [2019-12-07 17:51:40,549 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:51:40,549 INFO L276 IsEmpty]: Start isEmpty. Operand 24486 states and 90098 transitions. [2019-12-07 17:51:40,566 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 17:51:40,566 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:51:40,566 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:51:40,566 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:51:40,566 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:51:40,567 INFO L82 PathProgramCache]: Analyzing trace with hash -1278693284, now seen corresponding path program 1 times [2019-12-07 17:51:40,567 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:51:40,567 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [675737295] [2019-12-07 17:51:40,567 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:51:40,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:51:40,603 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:51:40,604 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [675737295] [2019-12-07 17:51:40,604 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:51:40,604 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:51:40,604 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [345965110] [2019-12-07 17:51:40,604 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:51:40,604 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:51:40,604 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:51:40,605 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:51:40,605 INFO L87 Difference]: Start difference. First operand 24486 states and 90098 transitions. Second operand 3 states. [2019-12-07 17:51:40,724 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:51:40,724 INFO L93 Difference]: Finished difference Result 29936 states and 108805 transitions. [2019-12-07 17:51:40,724 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:51:40,725 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 17:51:40,725 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:51:40,777 INFO L225 Difference]: With dead ends: 29936 [2019-12-07 17:51:40,777 INFO L226 Difference]: Without dead ends: 29936 [2019-12-07 17:51:40,778 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:51:40,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29936 states. [2019-12-07 17:51:41,250 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29936 to 26410. [2019-12-07 17:51:41,251 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26410 states. [2019-12-07 17:51:41,303 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26410 states to 26410 states and 96908 transitions. [2019-12-07 17:51:41,303 INFO L78 Accepts]: Start accepts. Automaton has 26410 states and 96908 transitions. Word has length 27 [2019-12-07 17:51:41,303 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:51:41,303 INFO L462 AbstractCegarLoop]: Abstraction has 26410 states and 96908 transitions. [2019-12-07 17:51:41,304 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:51:41,304 INFO L276 IsEmpty]: Start isEmpty. Operand 26410 states and 96908 transitions. [2019-12-07 17:51:41,316 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 17:51:41,316 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:51:41,316 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:51:41,317 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:51:41,317 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:51:41,317 INFO L82 PathProgramCache]: Analyzing trace with hash -1374888423, now seen corresponding path program 1 times [2019-12-07 17:51:41,317 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:51:41,317 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [221223428] [2019-12-07 17:51:41,317 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:51:41,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:51:41,350 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:51:41,351 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [221223428] [2019-12-07 17:51:41,351 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:51:41,351 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:51:41,351 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1798892276] [2019-12-07 17:51:41,352 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:51:41,352 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:51:41,352 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:51:41,352 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:51:41,352 INFO L87 Difference]: Start difference. First operand 26410 states and 96908 transitions. Second operand 3 states. [2019-12-07 17:51:41,394 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:51:41,395 INFO L93 Difference]: Finished difference Result 15137 states and 48090 transitions. [2019-12-07 17:51:41,395 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:51:41,395 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 17:51:41,395 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:51:41,413 INFO L225 Difference]: With dead ends: 15137 [2019-12-07 17:51:41,413 INFO L226 Difference]: Without dead ends: 15137 [2019-12-07 17:51:41,413 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:51:41,464 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15137 states. [2019-12-07 17:51:41,595 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15137 to 15137. [2019-12-07 17:51:41,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15137 states. [2019-12-07 17:51:41,622 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15137 states to 15137 states and 48090 transitions. [2019-12-07 17:51:41,622 INFO L78 Accepts]: Start accepts. Automaton has 15137 states and 48090 transitions. Word has length 27 [2019-12-07 17:51:41,622 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:51:41,622 INFO L462 AbstractCegarLoop]: Abstraction has 15137 states and 48090 transitions. [2019-12-07 17:51:41,622 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:51:41,622 INFO L276 IsEmpty]: Start isEmpty. Operand 15137 states and 48090 transitions. [2019-12-07 17:51:41,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 17:51:41,629 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:51:41,629 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:51:41,629 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:51:41,629 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:51:41,629 INFO L82 PathProgramCache]: Analyzing trace with hash 783683513, now seen corresponding path program 1 times [2019-12-07 17:51:41,629 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:51:41,629 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [509245109] [2019-12-07 17:51:41,629 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:51:41,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:51:41,672 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:51:41,672 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [509245109] [2019-12-07 17:51:41,672 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:51:41,672 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:51:41,673 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [730693507] [2019-12-07 17:51:41,673 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 17:51:41,673 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:51:41,673 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 17:51:41,673 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:51:41,673 INFO L87 Difference]: Start difference. First operand 15137 states and 48090 transitions. Second operand 4 states. [2019-12-07 17:51:41,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:51:41,687 INFO L93 Difference]: Finished difference Result 2291 states and 5311 transitions. [2019-12-07 17:51:41,687 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 17:51:41,687 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 28 [2019-12-07 17:51:41,687 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:51:41,688 INFO L225 Difference]: With dead ends: 2291 [2019-12-07 17:51:41,689 INFO L226 Difference]: Without dead ends: 2291 [2019-12-07 17:51:41,689 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 17:51:41,692 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2291 states. [2019-12-07 17:51:41,705 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2291 to 2291. [2019-12-07 17:51:41,705 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2291 states. [2019-12-07 17:51:41,707 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2291 states to 2291 states and 5311 transitions. [2019-12-07 17:51:41,707 INFO L78 Accepts]: Start accepts. Automaton has 2291 states and 5311 transitions. Word has length 28 [2019-12-07 17:51:41,708 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:51:41,708 INFO L462 AbstractCegarLoop]: Abstraction has 2291 states and 5311 transitions. [2019-12-07 17:51:41,708 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 17:51:41,708 INFO L276 IsEmpty]: Start isEmpty. Operand 2291 states and 5311 transitions. [2019-12-07 17:51:41,711 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 17:51:41,711 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:51:41,711 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:51:41,711 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:51:41,711 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:51:41,711 INFO L82 PathProgramCache]: Analyzing trace with hash 1644769556, now seen corresponding path program 1 times [2019-12-07 17:51:41,712 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:51:41,712 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1470387863] [2019-12-07 17:51:41,712 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:51:41,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:51:41,763 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:51:41,764 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1470387863] [2019-12-07 17:51:41,764 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:51:41,764 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 17:51:41,764 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [634906634] [2019-12-07 17:51:41,764 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:51:41,764 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:51:41,764 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:51:41,765 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:51:41,765 INFO L87 Difference]: Start difference. First operand 2291 states and 5311 transitions. Second operand 5 states. [2019-12-07 17:51:41,780 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:51:41,780 INFO L93 Difference]: Finished difference Result 653 states and 1502 transitions. [2019-12-07 17:51:41,780 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 17:51:41,781 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2019-12-07 17:51:41,781 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:51:41,781 INFO L225 Difference]: With dead ends: 653 [2019-12-07 17:51:41,782 INFO L226 Difference]: Without dead ends: 653 [2019-12-07 17:51:41,782 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:51:41,783 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 653 states. [2019-12-07 17:51:41,788 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 653 to 597. [2019-12-07 17:51:41,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 597 states. [2019-12-07 17:51:41,789 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 597 states to 597 states and 1370 transitions. [2019-12-07 17:51:41,789 INFO L78 Accepts]: Start accepts. Automaton has 597 states and 1370 transitions. Word has length 40 [2019-12-07 17:51:41,789 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:51:41,789 INFO L462 AbstractCegarLoop]: Abstraction has 597 states and 1370 transitions. [2019-12-07 17:51:41,790 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:51:41,790 INFO L276 IsEmpty]: Start isEmpty. Operand 597 states and 1370 transitions. [2019-12-07 17:51:41,791 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 17:51:41,791 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:51:41,792 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:51:41,792 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:51:41,792 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:51:41,792 INFO L82 PathProgramCache]: Analyzing trace with hash -922835002, now seen corresponding path program 1 times [2019-12-07 17:51:41,792 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:51:41,792 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [347962087] [2019-12-07 17:51:41,793 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:51:41,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:51:41,900 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:51:41,901 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [347962087] [2019-12-07 17:51:41,901 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:51:41,901 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:51:41,901 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1073082812] [2019-12-07 17:51:41,902 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:51:41,902 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:51:41,902 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:51:41,902 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:51:41,902 INFO L87 Difference]: Start difference. First operand 597 states and 1370 transitions. Second operand 6 states. [2019-12-07 17:51:41,956 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:51:41,957 INFO L93 Difference]: Finished difference Result 909 states and 1946 transitions. [2019-12-07 17:51:41,957 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:51:41,957 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 55 [2019-12-07 17:51:41,957 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:51:41,958 INFO L225 Difference]: With dead ends: 909 [2019-12-07 17:51:41,958 INFO L226 Difference]: Without dead ends: 568 [2019-12-07 17:51:41,958 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2019-12-07 17:51:41,959 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 568 states. [2019-12-07 17:51:41,961 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 568 to 535. [2019-12-07 17:51:41,962 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 535 states. [2019-12-07 17:51:41,962 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 535 states to 535 states and 1190 transitions. [2019-12-07 17:51:41,962 INFO L78 Accepts]: Start accepts. Automaton has 535 states and 1190 transitions. Word has length 55 [2019-12-07 17:51:41,962 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:51:41,962 INFO L462 AbstractCegarLoop]: Abstraction has 535 states and 1190 transitions. [2019-12-07 17:51:41,962 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:51:41,963 INFO L276 IsEmpty]: Start isEmpty. Operand 535 states and 1190 transitions. [2019-12-07 17:51:41,963 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 17:51:41,963 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:51:41,963 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:51:41,964 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:51:41,964 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:51:41,964 INFO L82 PathProgramCache]: Analyzing trace with hash 1111852252, now seen corresponding path program 2 times [2019-12-07 17:51:41,964 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:51:41,964 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1335066807] [2019-12-07 17:51:41,964 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:51:41,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:51:42,033 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:51:42,033 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1335066807] [2019-12-07 17:51:42,033 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:51:42,033 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:51:42,033 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [821102455] [2019-12-07 17:51:42,034 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:51:42,034 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:51:42,034 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:51:42,034 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:51:42,034 INFO L87 Difference]: Start difference. First operand 535 states and 1190 transitions. Second operand 6 states. [2019-12-07 17:51:42,087 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:51:42,087 INFO L93 Difference]: Finished difference Result 713 states and 1514 transitions. [2019-12-07 17:51:42,087 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:51:42,088 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 55 [2019-12-07 17:51:42,088 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:51:42,088 INFO L225 Difference]: With dead ends: 713 [2019-12-07 17:51:42,088 INFO L226 Difference]: Without dead ends: 209 [2019-12-07 17:51:42,089 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 17:51:42,089 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 209 states. [2019-12-07 17:51:42,091 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 209 to 209. [2019-12-07 17:51:42,091 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 209 states. [2019-12-07 17:51:42,091 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209 states to 209 states and 377 transitions. [2019-12-07 17:51:42,091 INFO L78 Accepts]: Start accepts. Automaton has 209 states and 377 transitions. Word has length 55 [2019-12-07 17:51:42,092 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:51:42,092 INFO L462 AbstractCegarLoop]: Abstraction has 209 states and 377 transitions. [2019-12-07 17:51:42,092 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:51:42,092 INFO L276 IsEmpty]: Start isEmpty. Operand 209 states and 377 transitions. [2019-12-07 17:51:42,092 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2019-12-07 17:51:42,092 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:51:42,093 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:51:42,093 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:51:42,093 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:51:42,093 INFO L82 PathProgramCache]: Analyzing trace with hash -1096795634, now seen corresponding path program 3 times [2019-12-07 17:51:42,093 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:51:42,093 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1925562835] [2019-12-07 17:51:42,093 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:51:42,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:51:42,143 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:51:42,143 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1925562835] [2019-12-07 17:51:42,143 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:51:42,143 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:51:42,143 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1858899620] [2019-12-07 17:51:42,144 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:51:42,144 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:51:42,144 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:51:42,144 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:51:42,144 INFO L87 Difference]: Start difference. First operand 209 states and 377 transitions. Second operand 3 states. [2019-12-07 17:51:42,172 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:51:42,173 INFO L93 Difference]: Finished difference Result 209 states and 376 transitions. [2019-12-07 17:51:42,173 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:51:42,173 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 55 [2019-12-07 17:51:42,173 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:51:42,173 INFO L225 Difference]: With dead ends: 209 [2019-12-07 17:51:42,174 INFO L226 Difference]: Without dead ends: 209 [2019-12-07 17:51:42,174 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:51:42,174 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 209 states. [2019-12-07 17:51:42,176 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 209 to 209. [2019-12-07 17:51:42,176 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 209 states. [2019-12-07 17:51:42,176 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209 states to 209 states and 376 transitions. [2019-12-07 17:51:42,177 INFO L78 Accepts]: Start accepts. Automaton has 209 states and 376 transitions. Word has length 55 [2019-12-07 17:51:42,177 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:51:42,177 INFO L462 AbstractCegarLoop]: Abstraction has 209 states and 376 transitions. [2019-12-07 17:51:42,177 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:51:42,177 INFO L276 IsEmpty]: Start isEmpty. Operand 209 states and 376 transitions. [2019-12-07 17:51:42,178 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2019-12-07 17:51:42,178 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:51:42,178 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:51:42,178 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:51:42,178 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:51:42,178 INFO L82 PathProgramCache]: Analyzing trace with hash 341094135, now seen corresponding path program 1 times [2019-12-07 17:51:42,179 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:51:42,179 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1169894460] [2019-12-07 17:51:42,179 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:51:42,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:51:42,226 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:51:42,226 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1169894460] [2019-12-07 17:51:42,226 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:51:42,226 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:51:42,227 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1742870075] [2019-12-07 17:51:42,227 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:51:42,227 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:51:42,227 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:51:42,227 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:51:42,227 INFO L87 Difference]: Start difference. First operand 209 states and 376 transitions. Second operand 3 states. [2019-12-07 17:51:42,235 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:51:42,236 INFO L93 Difference]: Finished difference Result 209 states and 365 transitions. [2019-12-07 17:51:42,236 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:51:42,236 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 56 [2019-12-07 17:51:42,236 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:51:42,236 INFO L225 Difference]: With dead ends: 209 [2019-12-07 17:51:42,237 INFO L226 Difference]: Without dead ends: 209 [2019-12-07 17:51:42,237 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:51:42,237 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 209 states. [2019-12-07 17:51:42,239 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 209 to 209. [2019-12-07 17:51:42,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 209 states. [2019-12-07 17:51:42,239 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209 states to 209 states and 365 transitions. [2019-12-07 17:51:42,240 INFO L78 Accepts]: Start accepts. Automaton has 209 states and 365 transitions. Word has length 56 [2019-12-07 17:51:42,240 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:51:42,240 INFO L462 AbstractCegarLoop]: Abstraction has 209 states and 365 transitions. [2019-12-07 17:51:42,240 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:51:42,240 INFO L276 IsEmpty]: Start isEmpty. Operand 209 states and 365 transitions. [2019-12-07 17:51:42,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 17:51:42,241 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:51:42,241 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:51:42,241 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:51:42,241 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:51:42,241 INFO L82 PathProgramCache]: Analyzing trace with hash -431408076, now seen corresponding path program 1 times [2019-12-07 17:51:42,241 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:51:42,241 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [106701432] [2019-12-07 17:51:42,241 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:51:42,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:51:42,467 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:51:42,468 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [106701432] [2019-12-07 17:51:42,468 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:51:42,468 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 17:51:42,468 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1911372220] [2019-12-07 17:51:42,468 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 17:51:42,468 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:51:42,468 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 17:51:42,469 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=149, Unknown=0, NotChecked=0, Total=182 [2019-12-07 17:51:42,469 INFO L87 Difference]: Start difference. First operand 209 states and 365 transitions. Second operand 14 states. [2019-12-07 17:51:42,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:51:42,804 INFO L93 Difference]: Finished difference Result 370 states and 629 transitions. [2019-12-07 17:51:42,804 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 17:51:42,804 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 57 [2019-12-07 17:51:42,804 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:51:42,805 INFO L225 Difference]: With dead ends: 370 [2019-12-07 17:51:42,805 INFO L226 Difference]: Without dead ends: 335 [2019-12-07 17:51:42,805 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 85 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=107, Invalid=493, Unknown=0, NotChecked=0, Total=600 [2019-12-07 17:51:42,806 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 335 states. [2019-12-07 17:51:42,807 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 335 to 305. [2019-12-07 17:51:42,807 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 305 states. [2019-12-07 17:51:42,808 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 305 states to 305 states and 529 transitions. [2019-12-07 17:51:42,808 INFO L78 Accepts]: Start accepts. Automaton has 305 states and 529 transitions. Word has length 57 [2019-12-07 17:51:42,808 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:51:42,808 INFO L462 AbstractCegarLoop]: Abstraction has 305 states and 529 transitions. [2019-12-07 17:51:42,808 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 17:51:42,808 INFO L276 IsEmpty]: Start isEmpty. Operand 305 states and 529 transitions. [2019-12-07 17:51:42,809 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 17:51:42,809 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:51:42,809 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:51:42,809 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:51:42,809 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:51:42,809 INFO L82 PathProgramCache]: Analyzing trace with hash 42803636, now seen corresponding path program 2 times [2019-12-07 17:51:42,810 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:51:42,810 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [767010408] [2019-12-07 17:51:42,810 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:51:42,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:51:43,071 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:51:43,071 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [767010408] [2019-12-07 17:51:43,071 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:51:43,071 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 17:51:43,071 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [743892369] [2019-12-07 17:51:43,072 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 17:51:43,072 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:51:43,072 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 17:51:43,072 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=174, Unknown=0, NotChecked=0, Total=210 [2019-12-07 17:51:43,072 INFO L87 Difference]: Start difference. First operand 305 states and 529 transitions. Second operand 15 states. [2019-12-07 17:51:43,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:51:43,445 INFO L93 Difference]: Finished difference Result 426 states and 715 transitions. [2019-12-07 17:51:43,445 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 17:51:43,445 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 57 [2019-12-07 17:51:43,445 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:51:43,446 INFO L225 Difference]: With dead ends: 426 [2019-12-07 17:51:43,446 INFO L226 Difference]: Without dead ends: 391 [2019-12-07 17:51:43,446 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 108 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=119, Invalid=583, Unknown=0, NotChecked=0, Total=702 [2019-12-07 17:51:43,447 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 391 states. [2019-12-07 17:51:43,448 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 391 to 309. [2019-12-07 17:51:43,448 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 309 states. [2019-12-07 17:51:43,449 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 309 states to 309 states and 536 transitions. [2019-12-07 17:51:43,449 INFO L78 Accepts]: Start accepts. Automaton has 309 states and 536 transitions. Word has length 57 [2019-12-07 17:51:43,449 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:51:43,449 INFO L462 AbstractCegarLoop]: Abstraction has 309 states and 536 transitions. [2019-12-07 17:51:43,449 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 17:51:43,449 INFO L276 IsEmpty]: Start isEmpty. Operand 309 states and 536 transitions. [2019-12-07 17:51:43,450 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 17:51:43,450 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:51:43,450 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:51:43,450 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:51:43,450 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:51:43,450 INFO L82 PathProgramCache]: Analyzing trace with hash -1239613688, now seen corresponding path program 3 times [2019-12-07 17:51:43,450 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:51:43,450 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [873740558] [2019-12-07 17:51:43,450 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:51:43,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:51:43,794 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:51:43,794 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [873740558] [2019-12-07 17:51:43,794 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:51:43,794 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [16] imperfect sequences [] total 16 [2019-12-07 17:51:43,795 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [779745269] [2019-12-07 17:51:43,795 INFO L442 AbstractCegarLoop]: Interpolant automaton has 18 states [2019-12-07 17:51:43,795 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:51:43,795 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 17:51:43,795 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=255, Unknown=0, NotChecked=0, Total=306 [2019-12-07 17:51:43,795 INFO L87 Difference]: Start difference. First operand 309 states and 536 transitions. Second operand 18 states. [2019-12-07 17:51:44,634 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:51:44,634 INFO L93 Difference]: Finished difference Result 782 states and 1337 transitions. [2019-12-07 17:51:44,635 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 17:51:44,635 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 57 [2019-12-07 17:51:44,635 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:51:44,635 INFO L225 Difference]: With dead ends: 782 [2019-12-07 17:51:44,635 INFO L226 Difference]: Without dead ends: 747 [2019-12-07 17:51:44,636 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 1 SyntacticMatches, 4 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 263 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=215, Invalid=1117, Unknown=0, NotChecked=0, Total=1332 [2019-12-07 17:51:44,637 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 747 states. [2019-12-07 17:51:44,639 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 747 to 333. [2019-12-07 17:51:44,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 333 states. [2019-12-07 17:51:44,640 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 333 states to 333 states and 582 transitions. [2019-12-07 17:51:44,640 INFO L78 Accepts]: Start accepts. Automaton has 333 states and 582 transitions. Word has length 57 [2019-12-07 17:51:44,640 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:51:44,640 INFO L462 AbstractCegarLoop]: Abstraction has 333 states and 582 transitions. [2019-12-07 17:51:44,640 INFO L463 AbstractCegarLoop]: Interpolant automaton has 18 states. [2019-12-07 17:51:44,640 INFO L276 IsEmpty]: Start isEmpty. Operand 333 states and 582 transitions. [2019-12-07 17:51:44,641 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 17:51:44,641 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:51:44,641 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:51:44,641 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:51:44,641 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:51:44,641 INFO L82 PathProgramCache]: Analyzing trace with hash 21415560, now seen corresponding path program 4 times [2019-12-07 17:51:44,641 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:51:44,642 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [922040011] [2019-12-07 17:51:44,642 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:51:44,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:51:44,824 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:51:44,824 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [922040011] [2019-12-07 17:51:44,824 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:51:44,824 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 17:51:44,824 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [787978563] [2019-12-07 17:51:44,824 INFO L442 AbstractCegarLoop]: Interpolant automaton has 14 states [2019-12-07 17:51:44,825 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:51:44,825 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 17:51:44,825 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=150, Unknown=0, NotChecked=0, Total=182 [2019-12-07 17:51:44,825 INFO L87 Difference]: Start difference. First operand 333 states and 582 transitions. Second operand 14 states. [2019-12-07 17:51:45,202 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:51:45,202 INFO L93 Difference]: Finished difference Result 438 states and 740 transitions. [2019-12-07 17:51:45,202 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 17:51:45,202 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 57 [2019-12-07 17:51:45,202 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:51:45,203 INFO L225 Difference]: With dead ends: 438 [2019-12-07 17:51:45,203 INFO L226 Difference]: Without dead ends: 403 [2019-12-07 17:51:45,203 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 86 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=123, Invalid=527, Unknown=0, NotChecked=0, Total=650 [2019-12-07 17:51:45,203 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 403 states. [2019-12-07 17:51:45,205 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 403 to 317. [2019-12-07 17:51:45,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 317 states. [2019-12-07 17:51:45,205 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 317 states to 317 states and 550 transitions. [2019-12-07 17:51:45,205 INFO L78 Accepts]: Start accepts. Automaton has 317 states and 550 transitions. Word has length 57 [2019-12-07 17:51:45,206 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:51:45,206 INFO L462 AbstractCegarLoop]: Abstraction has 317 states and 550 transitions. [2019-12-07 17:51:45,206 INFO L463 AbstractCegarLoop]: Interpolant automaton has 14 states. [2019-12-07 17:51:45,206 INFO L276 IsEmpty]: Start isEmpty. Operand 317 states and 550 transitions. [2019-12-07 17:51:45,206 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2019-12-07 17:51:45,206 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:51:45,206 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:51:45,206 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P2Err0ASSERT_VIOLATIONERROR_FUNCTION, P2Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:51:45,207 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:51:45,207 INFO L82 PathProgramCache]: Analyzing trace with hash -97225810, now seen corresponding path program 5 times [2019-12-07 17:51:45,207 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:51:45,207 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1413431517] [2019-12-07 17:51:45,207 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:51:45,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:51:45,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:51:45,283 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 17:51:45,283 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 17:51:45,286 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [740] [740] ULTIMATE.startENTRY-->L802: Formula: (let ((.cse0 (store |v_#valid_55| 0 0))) (and (= v_~y$w_buff1~0_198 0) (= v_~x~0_55 0) (= 0 v_~y$read_delayed_var~0.offset_7) (= v_~weak$$choice2~0_120 0) (= v_~main$tmp_guard1~0_31 0) (= v_~y$r_buff1_thd0~0_279 0) (= 0 v_~y$r_buff1_thd2~0_191) (= v_~y$read_delayed~0_7 0) (= 0 v_~y$w_buff0~0_215) (= 0 |v_ULTIMATE.start_main_~#t2522~0.offset_17|) (= 0 v_~y$r_buff0_thd3~0_201) (< 0 |v_#StackHeapBarrier_17|) (= v_~y$r_buff0_thd0~0_331 0) (= v_~y$r_buff0_thd1~0_37 0) (= v_~y$w_buff0_used~0_623 0) (= |v_#valid_53| (store .cse0 |v_ULTIMATE.start_main_~#t2522~0.base_22| 1)) (= 0 |v_#NULL.base_4|) (= v_~y~0_147 0) (= 0 v_~__unbuffered_p0_EAX~0_42) (= 0 v_~y$read_delayed_var~0.base_7) (= v_~y$mem_tmp~0_20 0) (= 0 v_~weak$$choice0~0_16) (= 0 v_~y$flush_delayed~0_42) (= 0 v_~y$r_buff0_thd2~0_116) (= v_~y$w_buff1_used~0_397 0) (= |v_#NULL.offset_4| 0) (= v_~main$tmp_guard0~0_26 0) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t2522~0.base_22| 4) |v_#length_21|) (= 0 v_~y$r_buff1_thd3~0_162) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t2522~0.base_22|)) (= v_~z~0_148 0) (= 0 v_~__unbuffered_cnt~0_97) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t2522~0.base_22|) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t2522~0.base_22| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t2522~0.base_22|) |v_ULTIMATE.start_main_~#t2522~0.offset_17| 0)) |v_#memory_int_19|) (= v_~y$r_buff1_thd1~0_116 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_55|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_40|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_23|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_23|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_46|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_25|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_40|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ~y$mem_tmp~0=v_~y$mem_tmp~0_20, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_42, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_162, ULTIMATE.start_main_~#t2522~0.base=|v_ULTIMATE.start_main_~#t2522~0.base_22|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_37, ~y$flush_delayed~0=v_~y$flush_delayed~0_42, ULTIMATE.start_main_~#t2522~0.offset=|v_ULTIMATE.start_main_~#t2522~0.offset_17|, #length=|v_#length_21|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_27|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_31|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_23|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_28|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_35|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_60|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_65|, ~weak$$choice0~0=v_~weak$$choice0~0_16, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_27|, ~y$w_buff1~0=v_~y$w_buff1~0_198, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_116, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_7|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_23|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_97, ULTIMATE.start_main_~#t2524~0.offset=|v_ULTIMATE.start_main_~#t2524~0.offset_15|, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_279, ~x~0=v_~x~0_55, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_623, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_44|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_36|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_31, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_31|, ULTIMATE.start_main_~#t2523~0.offset=|v_ULTIMATE.start_main_~#t2523~0.offset_15|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_129|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_28|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_37|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_50|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_116, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_25|, ~y$w_buff0~0=v_~y$w_buff0~0_215, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_201, ULTIMATE.start_main_~#t2524~0.base=|v_ULTIMATE.start_main_~#t2524~0.base_18|, ~y~0=v_~y~0_147, ULTIMATE.start_main_~#t2523~0.base=|v_ULTIMATE.start_main_~#t2523~0.base_19|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_31|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_23|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_19|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_34|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_26, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_64|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_24|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_191, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_33|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_331, #valid=|v_#valid_53|, #memory_int=|v_#memory_int_19|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_8|, ~z~0=v_~z~0_148, ~weak$$choice2~0=v_~weak$$choice2~0_120, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_397} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~y$mem_tmp~0, ~__unbuffered_p0_EAX~0, ~y$r_buff1_thd3~0, ULTIMATE.start_main_~#t2522~0.base, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, ULTIMATE.start_main_~#t2522~0.offset, #length, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t2524~0.offset, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_~#t2523~0.offset, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ULTIMATE.start_main_~#t2524~0.base, ~y~0, ULTIMATE.start_main_~#t2523~0.base, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 17:51:45,286 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L802-1-->L804: Formula: (and (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t2523~0.base_11|) (= (store |v_#valid_34| |v_ULTIMATE.start_main_~#t2523~0.base_11| 1) |v_#valid_33|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2523~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2523~0.base_11|) |v_ULTIMATE.start_main_~#t2523~0.offset_10| 1)) |v_#memory_int_15|) (= (select |v_#valid_34| |v_ULTIMATE.start_main_~#t2523~0.base_11|) 0) (= 0 |v_ULTIMATE.start_main_~#t2523~0.offset_10|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t2523~0.base_11| 4)) (not (= 0 |v_ULTIMATE.start_main_~#t2523~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t2523~0.base=|v_ULTIMATE.start_main_~#t2523~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_17|, ULTIMATE.start_main_~#t2523~0.offset=|v_ULTIMATE.start_main_~#t2523~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2523~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t2523~0.offset] because there is no mapped edge [2019-12-07 17:51:45,286 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [702] [702] L804-1-->L806: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t2524~0.offset_10|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t2524~0.base_10| 4)) (= (store |v_#valid_30| |v_ULTIMATE.start_main_~#t2524~0.base_10| 1) |v_#valid_29|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2524~0.base_10|) (= 0 (select |v_#valid_30| |v_ULTIMATE.start_main_~#t2524~0.base_10|)) (not (= |v_ULTIMATE.start_main_~#t2524~0.base_10| 0)) (= |v_#memory_int_13| (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2524~0.base_10| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2524~0.base_10|) |v_ULTIMATE.start_main_~#t2524~0.offset_10| 2)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_29|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t2524~0.base=|v_ULTIMATE.start_main_~#t2524~0.base_10|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_6|, #length=|v_#length_15|, ULTIMATE.start_main_~#t2524~0.offset=|v_ULTIMATE.start_main_~#t2524~0.offset_10|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_~#t2524~0.base, ULTIMATE.start_main_#t~nondet16, #length, ULTIMATE.start_main_~#t2524~0.offset] because there is no mapped edge [2019-12-07 17:51:45,287 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [616] [616] P2ENTRY-->L4-3: Formula: (and (= v_~y$w_buff0~0_29 v_~y$w_buff1~0_24) (= v_P2Thread1of1ForFork0_~arg.base_9 |v_P2Thread1of1ForFork0_#in~arg.base_11|) (= 2 v_~y$w_buff0~0_28) (= (ite (not (and (not (= 0 (mod v_~y$w_buff1_used~0_54 256))) (not (= (mod v_~y$w_buff0_used~0_103 256) 0)))) 1 0) |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_9|) (= v_~y$w_buff0_used~0_103 1) (= v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_11 |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_9|) (not (= 0 v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_11)) (= v_~y$w_buff1_used~0_54 v_~y$w_buff0_used~0_104) (= |v_P2Thread1of1ForFork0_#in~arg.offset_11| v_P2Thread1of1ForFork0_~arg.offset_9)) InVars {P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_11|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_104, ~y$w_buff0~0=v_~y$w_buff0~0_29, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_11|} OutVars{P2Thread1of1ForFork0_~arg.base=v_P2Thread1of1ForFork0_~arg.base_9, P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_11|, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_9|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_103, ~y$w_buff1~0=v_~y$w_buff1~0_24, ~y$w_buff0~0=v_~y$w_buff0~0_28, P2Thread1of1ForFork0_~arg.offset=v_P2Thread1of1ForFork0_~arg.offset_9, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_11|, P2Thread1of1ForFork0___VERIFIER_assert_~expression=v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_11, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_54} AuxVars[] AssignedVars[P2Thread1of1ForFork0_~arg.base, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P2Thread1of1ForFork0_~arg.offset, P2Thread1of1ForFork0___VERIFIER_assert_~expression, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 17:51:45,287 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] P0ENTRY-->P0EXIT: Formula: (and (= v_~x~0_47 v_~__unbuffered_p0_EAX~0_32) (= 0 |v_P0Thread1of1ForFork1_#res.offset_13|) (= (+ v_~__unbuffered_cnt~0_81 1) v_~__unbuffered_cnt~0_80) (= v_~z~0_109 2) (= v_P0Thread1of1ForFork1_~arg.offset_19 |v_P0Thread1of1ForFork1_#in~arg.offset_21|) (= |v_P0Thread1of1ForFork1_#in~arg.base_21| v_P0Thread1of1ForFork1_~arg.base_19) (= |v_P0Thread1of1ForFork1_#res.base_13| 0)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_21|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_81, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_21|, ~x~0=v_~x~0_47} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_32, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_13|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_21|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_13|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_19, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_80, ~z~0=v_~z~0_109, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_21|, ~x~0=v_~x~0_47, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_19} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, ~z~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 17:51:45,288 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] L780-->L780-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In-24977062 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-24977062 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-24977062 |P2Thread1of1ForFork0_#t~ite11_Out-24977062|)) (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite11_Out-24977062|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-24977062, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-24977062} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-24977062, P2Thread1of1ForFork0_#t~ite11=|P2Thread1of1ForFork0_#t~ite11_Out-24977062|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-24977062} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite11] because there is no mapped edge [2019-12-07 17:51:45,288 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [678] [678] L750-2-->L750-5: Formula: (let ((.cse0 (= |P1Thread1of1ForFork2_#t~ite3_Out-705899353| |P1Thread1of1ForFork2_#t~ite4_Out-705899353|)) (.cse1 (= (mod ~y$r_buff1_thd2~0_In-705899353 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In-705899353 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite3_Out-705899353| ~y$w_buff1~0_In-705899353) .cse0 (not .cse1) (not .cse2)) (and (= |P1Thread1of1ForFork2_#t~ite3_Out-705899353| ~y~0_In-705899353) .cse0 (or .cse1 .cse2)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-705899353, ~y$w_buff1~0=~y$w_buff1~0_In-705899353, ~y~0=~y~0_In-705899353, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-705899353} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-705899353, ~y$w_buff1~0=~y$w_buff1~0_In-705899353, P1Thread1of1ForFork2_#t~ite4=|P1Thread1of1ForFork2_#t~ite4_Out-705899353|, ~y~0=~y~0_In-705899353, P1Thread1of1ForFork2_#t~ite3=|P1Thread1of1ForFork2_#t~ite3_Out-705899353|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-705899353} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite4, P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 17:51:45,289 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [694] [694] L751-->L751-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In2005253206 256))) (.cse0 (= (mod ~y$r_buff0_thd2~0_In2005253206 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite5_Out2005253206|)) (and (= ~y$w_buff0_used~0_In2005253206 |P1Thread1of1ForFork2_#t~ite5_Out2005253206|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In2005253206, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2005253206} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In2005253206, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2005253206, P1Thread1of1ForFork2_#t~ite5=|P1Thread1of1ForFork2_#t~ite5_Out2005253206|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 17:51:45,289 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L781-->L781-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd3~0_In-1000728090 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1000728090 256))) (.cse3 (= 0 (mod ~y$r_buff1_thd3~0_In-1000728090 256))) (.cse2 (= (mod ~y$w_buff1_used~0_In-1000728090 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork0_#t~ite12_Out-1000728090| ~y$w_buff1_used~0_In-1000728090)) (and (= |P2Thread1of1ForFork0_#t~ite12_Out-1000728090| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1000728090, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1000728090, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1000728090, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1000728090} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1000728090, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1000728090, P2Thread1of1ForFork0_#t~ite12=|P2Thread1of1ForFork0_#t~ite12_Out-1000728090|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1000728090, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1000728090} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-12-07 17:51:45,289 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L752-->L752-2: Formula: (let ((.cse2 (= 0 (mod ~y$w_buff1_used~0_In386598775 256))) (.cse3 (= (mod ~y$r_buff1_thd2~0_In386598775 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In386598775 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In386598775 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite6_Out386598775| ~y$w_buff1_used~0_In386598775) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork2_#t~ite6_Out386598775| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In386598775, ~y$w_buff0_used~0=~y$w_buff0_used~0_In386598775, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In386598775, ~y$w_buff1_used~0=~y$w_buff1_used~0_In386598775} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In386598775, ~y$w_buff0_used~0=~y$w_buff0_used~0_In386598775, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In386598775, P1Thread1of1ForFork2_#t~ite6=|P1Thread1of1ForFork2_#t~ite6_Out386598775|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In386598775} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 17:51:45,289 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [693] [693] L753-->L753-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-16581287 256))) (.cse1 (= (mod ~y$r_buff0_thd2~0_In-16581287 256) 0))) (or (and (= ~y$r_buff0_thd2~0_In-16581287 |P1Thread1of1ForFork2_#t~ite7_Out-16581287|) (or .cse0 .cse1)) (and (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite7_Out-16581287|) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-16581287, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-16581287} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-16581287, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-16581287, P1Thread1of1ForFork2_#t~ite7=|P1Thread1of1ForFork2_#t~ite7_Out-16581287|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 17:51:45,290 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [690] [690] L754-->L754-2: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In984766544 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd2~0_In984766544 256))) (.cse2 (= (mod ~y$r_buff0_thd2~0_In984766544 256) 0)) (.cse3 (= (mod ~y$w_buff0_used~0_In984766544 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite8_Out984766544| ~y$r_buff1_thd2~0_In984766544) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite8_Out984766544| 0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In984766544, ~y$w_buff0_used~0=~y$w_buff0_used~0_In984766544, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In984766544, ~y$w_buff1_used~0=~y$w_buff1_used~0_In984766544} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In984766544, ~y$w_buff0_used~0=~y$w_buff0_used~0_In984766544, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_Out984766544|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In984766544, ~y$w_buff1_used~0=~y$w_buff1_used~0_In984766544} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 17:51:45,290 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L754-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite8_24| v_~y$r_buff1_thd2~0_103) (= v_~__unbuffered_cnt~0_54 (+ v_~__unbuffered_cnt~0_55 1))) InVars {P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_24|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_103, P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_23|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork2_#res.offset, P1Thread1of1ForFork2_#t~ite8, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 17:51:45,290 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L782-->L783: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-254870859 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd3~0_In-254870859 256))) (.cse1 (= ~y$r_buff0_thd3~0_Out-254870859 ~y$r_buff0_thd3~0_In-254870859))) (or (and .cse0 .cse1) (and (not .cse0) (not .cse2) (= 0 ~y$r_buff0_thd3~0_Out-254870859)) (and .cse2 .cse1))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-254870859, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-254870859} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-254870859, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-254870859, P2Thread1of1ForFork0_#t~ite13=|P2Thread1of1ForFork0_#t~ite13_Out-254870859|} AuxVars[] AssignedVars[~y$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite13] because there is no mapped edge [2019-12-07 17:51:45,290 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L783-->L783-2: Formula: (let ((.cse1 (= (mod ~y$r_buff1_thd3~0_In1825162012 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In1825162012 256))) (.cse3 (= 0 (mod ~y$r_buff0_thd3~0_In1825162012 256))) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In1825162012 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite14_Out1825162012| ~y$r_buff1_thd3~0_In1825162012) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork0_#t~ite14_Out1825162012| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1825162012, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1825162012, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1825162012, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1825162012} OutVars{P2Thread1of1ForFork0_#t~ite14=|P2Thread1of1ForFork0_#t~ite14_Out1825162012|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1825162012, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1825162012, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1825162012, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1825162012} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-12-07 17:51:45,290 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L783-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= |v_P2Thread1of1ForFork0_#t~ite14_24| v_~y$r_buff1_thd3~0_99) (= (+ v_~__unbuffered_cnt~0_67 1) v_~__unbuffered_cnt~0_66) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_24|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67} OutVars{P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_23|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_99, P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 17:51:45,290 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [614] [614] L806-1-->L812: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_5|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet17, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 17:51:45,291 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [692] [692] L812-2-->L812-5: Formula: (let ((.cse1 (= |ULTIMATE.start_main_#t~ite19_Out260823075| |ULTIMATE.start_main_#t~ite18_Out260823075|)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In260823075 256))) (.cse2 (= (mod ~y$r_buff1_thd0~0_In260823075 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite18_Out260823075| ~y$w_buff1~0_In260823075) .cse1 (not .cse2)) (and (= |ULTIMATE.start_main_#t~ite18_Out260823075| ~y~0_In260823075) .cse1 (or .cse0 .cse2)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In260823075, ~y~0=~y~0_In260823075, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In260823075, ~y$w_buff1_used~0=~y$w_buff1_used~0_In260823075} OutVars{~y$w_buff1~0=~y$w_buff1~0_In260823075, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out260823075|, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out260823075|, ~y~0=~y~0_In260823075, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In260823075, ~y$w_buff1_used~0=~y$w_buff1_used~0_In260823075} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 17:51:45,291 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [676] [676] L813-->L813-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In1375098561 256))) (.cse0 (= (mod ~y$r_buff0_thd0~0_In1375098561 256) 0))) (or (and (= ~y$w_buff0_used~0_In1375098561 |ULTIMATE.start_main_#t~ite20_Out1375098561|) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite20_Out1375098561|) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1375098561, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1375098561} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1375098561, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1375098561, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out1375098561|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 17:51:45,291 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] L814-->L814-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In-872037224 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In-872037224 256) 0)) (.cse3 (= (mod ~y$r_buff1_thd0~0_In-872037224 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In-872037224 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In-872037224 |ULTIMATE.start_main_#t~ite21_Out-872037224|) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |ULTIMATE.start_main_#t~ite21_Out-872037224|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-872037224, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-872037224, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-872037224, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-872037224} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-872037224, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-872037224, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-872037224|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-872037224, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-872037224} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 17:51:45,292 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L815-->L815-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In1041155812 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In1041155812 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite22_Out1041155812| ~y$r_buff0_thd0~0_In1041155812)) (and (= 0 |ULTIMATE.start_main_#t~ite22_Out1041155812|) (not .cse0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1041155812, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1041155812} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1041155812, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1041155812, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out1041155812|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 17:51:45,292 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L816-->L816-2: Formula: (let ((.cse2 (= (mod ~y$w_buff1_used~0_In-1799265621 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd0~0_In-1799265621 256))) (.cse0 (= (mod ~y$r_buff0_thd0~0_In-1799265621 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In-1799265621 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$r_buff1_thd0~0_In-1799265621 |ULTIMATE.start_main_#t~ite23_Out-1799265621|)) (and (= 0 |ULTIMATE.start_main_#t~ite23_Out-1799265621|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1799265621, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1799265621, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1799265621, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1799265621} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1799265621, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1799265621, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1799265621, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out-1799265621|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1799265621} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 17:51:45,294 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L827-->L827-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-902533001 256) 0))) (or (and (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-902533001 256)))) (or (= 0 (mod ~y$w_buff0_used~0_In-902533001 256)) (and .cse0 (= (mod ~y$r_buff1_thd0~0_In-902533001 256) 0)) (and .cse0 (= 0 (mod ~y$w_buff1_used~0_In-902533001 256))))) (= |ULTIMATE.start_main_#t~ite39_Out-902533001| |ULTIMATE.start_main_#t~ite38_Out-902533001|) (= ~y$w_buff1_used~0_In-902533001 |ULTIMATE.start_main_#t~ite38_Out-902533001|) .cse1) (and (= |ULTIMATE.start_main_#t~ite38_In-902533001| |ULTIMATE.start_main_#t~ite38_Out-902533001|) (= |ULTIMATE.start_main_#t~ite39_Out-902533001| ~y$w_buff1_used~0_In-902533001) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-902533001, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-902533001, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In-902533001|, ~weak$$choice2~0=~weak$$choice2~0_In-902533001, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-902533001, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-902533001} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-902533001, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out-902533001|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-902533001, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out-902533001|, ~weak$$choice2~0=~weak$$choice2~0_In-902533001, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-902533001, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-902533001} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-12-07 17:51:45,294 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [649] [649] L828-->L829: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_25 256))) (= v_~y$r_buff0_thd0~0_98 v_~y$r_buff0_thd0~0_97)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_98, ~weak$$choice2~0=v_~weak$$choice2~0_25} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_8|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_97, ~weak$$choice2~0=v_~weak$$choice2~0_25, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 17:51:45,295 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [706] [706] L831-->L4: Formula: (and (= v_~y~0_99 v_~y$mem_tmp~0_10) (not (= (mod v_~y$flush_delayed~0_27 256) 0)) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4| (mod v_~main$tmp_guard1~0_12 256)) (= 0 v_~y$flush_delayed~0_26)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_10, ~y$flush_delayed~0=v_~y$flush_delayed~0_27, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_10, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_9, ~y$flush_delayed~0=v_~y$flush_delayed~0_26, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_24|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12, ~y~0=v_~y~0_99, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ULTIMATE.start_main_#t~ite46, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:51:45,295 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 17:51:45,349 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 05:51:45 BasicIcfg [2019-12-07 17:51:45,349 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 17:51:45,349 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 17:51:45,349 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 17:51:45,349 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 17:51:45,350 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:51:32" (3/4) ... [2019-12-07 17:51:45,351 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 17:51:45,351 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [740] [740] ULTIMATE.startENTRY-->L802: Formula: (let ((.cse0 (store |v_#valid_55| 0 0))) (and (= v_~y$w_buff1~0_198 0) (= v_~x~0_55 0) (= 0 v_~y$read_delayed_var~0.offset_7) (= v_~weak$$choice2~0_120 0) (= v_~main$tmp_guard1~0_31 0) (= v_~y$r_buff1_thd0~0_279 0) (= 0 v_~y$r_buff1_thd2~0_191) (= v_~y$read_delayed~0_7 0) (= 0 v_~y$w_buff0~0_215) (= 0 |v_ULTIMATE.start_main_~#t2522~0.offset_17|) (= 0 v_~y$r_buff0_thd3~0_201) (< 0 |v_#StackHeapBarrier_17|) (= v_~y$r_buff0_thd0~0_331 0) (= v_~y$r_buff0_thd1~0_37 0) (= v_~y$w_buff0_used~0_623 0) (= |v_#valid_53| (store .cse0 |v_ULTIMATE.start_main_~#t2522~0.base_22| 1)) (= 0 |v_#NULL.base_4|) (= v_~y~0_147 0) (= 0 v_~__unbuffered_p0_EAX~0_42) (= 0 v_~y$read_delayed_var~0.base_7) (= v_~y$mem_tmp~0_20 0) (= 0 v_~weak$$choice0~0_16) (= 0 v_~y$flush_delayed~0_42) (= 0 v_~y$r_buff0_thd2~0_116) (= v_~y$w_buff1_used~0_397 0) (= |v_#NULL.offset_4| 0) (= v_~main$tmp_guard0~0_26 0) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t2522~0.base_22| 4) |v_#length_21|) (= 0 v_~y$r_buff1_thd3~0_162) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t2522~0.base_22|)) (= v_~z~0_148 0) (= 0 v_~__unbuffered_cnt~0_97) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t2522~0.base_22|) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t2522~0.base_22| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t2522~0.base_22|) |v_ULTIMATE.start_main_~#t2522~0.offset_17| 0)) |v_#memory_int_19|) (= v_~y$r_buff1_thd1~0_116 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_55|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{ULTIMATE.start_main_#t~ite28=|v_ULTIMATE.start_main_#t~ite28_40|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite26=|v_ULTIMATE.start_main_#t~ite26_23|, ULTIMATE.start_main_#t~ite20=|v_ULTIMATE.start_main_#t~ite20_23|, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_46|, ULTIMATE.start_main_#t~ite22=|v_ULTIMATE.start_main_#t~ite22_25|, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_40|, ~y$read_delayed~0=v_~y$read_delayed~0_7, ~y$mem_tmp~0=v_~y$mem_tmp~0_20, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_42, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_162, ULTIMATE.start_main_~#t2522~0.base=|v_ULTIMATE.start_main_~#t2522~0.base_22|, ~y$r_buff0_thd1~0=v_~y$r_buff0_thd1~0_37, ~y$flush_delayed~0=v_~y$flush_delayed~0_42, ULTIMATE.start_main_~#t2522~0.offset=|v_ULTIMATE.start_main_~#t2522~0.offset_17|, #length=|v_#length_21|, ULTIMATE.start_main_#t~ite18=|v_ULTIMATE.start_main_#t~ite18_27|, ULTIMATE.start_main_#t~ite39=|v_ULTIMATE.start_main_#t~ite39_31|, ULTIMATE.start_main_#t~nondet24=|v_ULTIMATE.start_main_#t~nondet24_23|, ULTIMATE.start_main_#t~ite35=|v_ULTIMATE.start_main_#t~ite35_28|, ULTIMATE.start_main_#t~ite37=|v_ULTIMATE.start_main_#t~ite37_35|, ULTIMATE.start_main_#t~ite31=|v_ULTIMATE.start_main_#t~ite31_60|, ULTIMATE.start_main_#t~ite33=|v_ULTIMATE.start_main_#t~ite33_65|, ~weak$$choice0~0=v_~weak$$choice0~0_16, #StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_27|, ~y$w_buff1~0=v_~y$w_buff1~0_198, ~y$read_delayed_var~0.base=v_~y$read_delayed_var~0.base_7, ~y$r_buff0_thd2~0=v_~y$r_buff0_thd2~0_116, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_7|, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_23|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_97, ULTIMATE.start_main_~#t2524~0.offset=|v_ULTIMATE.start_main_~#t2524~0.offset_15|, ~y$r_buff1_thd0~0=v_~y$r_buff1_thd0~0_279, ~x~0=v_~x~0_55, ~y$read_delayed_var~0.offset=v_~y$read_delayed_var~0.offset_7, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_623, ULTIMATE.start_main_#t~ite29=|v_ULTIMATE.start_main_#t~ite29_44|, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_36|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_31, ULTIMATE.start_main_#t~ite27=|v_ULTIMATE.start_main_#t~ite27_31|, ULTIMATE.start_main_~#t2523~0.offset=|v_ULTIMATE.start_main_~#t2523~0.offset_15|, ULTIMATE.start_main_#t~ite21=|v_ULTIMATE.start_main_#t~ite21_129|, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_28|, ULTIMATE.start_main_#t~ite23=|v_ULTIMATE.start_main_#t~ite23_37|, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_50|, ~y$r_buff1_thd1~0=v_~y$r_buff1_thd1~0_116, ULTIMATE.start_main_#t~ite30=|v_ULTIMATE.start_main_#t~ite30_25|, ~y$w_buff0~0=v_~y$w_buff0~0_215, ~y$r_buff0_thd3~0=v_~y$r_buff0_thd3~0_201, ULTIMATE.start_main_~#t2524~0.base=|v_ULTIMATE.start_main_~#t2524~0.base_18|, ~y~0=v_~y~0_147, ULTIMATE.start_main_~#t2523~0.base=|v_ULTIMATE.start_main_~#t2523~0.base_19|, ULTIMATE.start_main_#t~ite19=|v_ULTIMATE.start_main_#t~ite19_31|, ULTIMATE.start_main_#t~nondet25=|v_ULTIMATE.start_main_#t~nondet25_23|, ULTIMATE.start_main_#t~ite36=|v_ULTIMATE.start_main_#t~ite36_19|, ULTIMATE.start_main_#t~ite38=|v_ULTIMATE.start_main_#t~ite38_34|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_26, ULTIMATE.start_main_#t~ite32=|v_ULTIMATE.start_main_#t~ite32_64|, #NULL.base=|v_#NULL.base_4|, ULTIMATE.start_main_#t~ite34=|v_ULTIMATE.start_main_#t~ite34_24|, ~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_191, ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_33|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_20|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_331, #valid=|v_#valid_53|, #memory_int=|v_#memory_int_19|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_8|, ~z~0=v_~z~0_148, ~weak$$choice2~0=v_~weak$$choice2~0_120, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_397} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite28, #NULL.offset, ULTIMATE.start_main_#t~ite26, ULTIMATE.start_main_#t~ite20, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite22, ULTIMATE.start_main_#t~ite45, ~y$read_delayed~0, ~y$mem_tmp~0, ~__unbuffered_p0_EAX~0, ~y$r_buff1_thd3~0, ULTIMATE.start_main_~#t2522~0.base, ~y$r_buff0_thd1~0, ~y$flush_delayed~0, ULTIMATE.start_main_~#t2522~0.offset, #length, ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~nondet24, ULTIMATE.start_main_#t~ite35, ULTIMATE.start_main_#t~ite37, ULTIMATE.start_main_#t~ite31, ULTIMATE.start_main_#t~ite33, ~weak$$choice0~0, ULTIMATE.start_main_#t~ite40, ~y$w_buff1~0, ~y$read_delayed_var~0.base, ~y$r_buff0_thd2~0, ULTIMATE.start_main_#t~nondet15, ULTIMATE.start_main_#t~nondet17, ~__unbuffered_cnt~0, ULTIMATE.start_main_~#t2524~0.offset, ~y$r_buff1_thd0~0, ~x~0, ~y$read_delayed_var~0.offset, ~y$w_buff0_used~0, ULTIMATE.start_main_#t~ite29, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite27, ULTIMATE.start_main_~#t2523~0.offset, ULTIMATE.start_main_#t~ite21, ULTIMATE.start_main_#t~ite42, ULTIMATE.start_main_#t~ite23, ULTIMATE.start_main_#t~ite44, ~y$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite30, ~y$w_buff0~0, ~y$r_buff0_thd3~0, ULTIMATE.start_main_~#t2524~0.base, ~y~0, ULTIMATE.start_main_~#t2523~0.base, ULTIMATE.start_main_#t~ite19, ULTIMATE.start_main_#t~nondet25, ULTIMATE.start_main_#t~ite36, ULTIMATE.start_main_#t~ite38, ~main$tmp_guard0~0, ULTIMATE.start_main_#t~ite32, #NULL.base, ULTIMATE.start_main_#t~ite34, ~y$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#res, ~y$r_buff0_thd0~0, #valid, #memory_int, ULTIMATE.start_main_#t~nondet16, ~z~0, ~weak$$choice2~0, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 17:51:45,352 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [713] [713] L802-1-->L804: Formula: (and (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t2523~0.base_11|) (= (store |v_#valid_34| |v_ULTIMATE.start_main_~#t2523~0.base_11| 1) |v_#valid_33|) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2523~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t2523~0.base_11|) |v_ULTIMATE.start_main_~#t2523~0.offset_10| 1)) |v_#memory_int_15|) (= (select |v_#valid_34| |v_ULTIMATE.start_main_~#t2523~0.base_11|) 0) (= 0 |v_ULTIMATE.start_main_~#t2523~0.offset_10|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t2523~0.base_11| 4)) (not (= 0 |v_ULTIMATE.start_main_~#t2523~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t2523~0.base=|v_ULTIMATE.start_main_~#t2523~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_#t~nondet15=|v_ULTIMATE.start_main_#t~nondet15_5|, #length=|v_#length_17|, ULTIMATE.start_main_~#t2523~0.offset=|v_ULTIMATE.start_main_~#t2523~0.offset_10|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2523~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet15, #length, ULTIMATE.start_main_~#t2523~0.offset] because there is no mapped edge [2019-12-07 17:51:45,352 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [702] [702] L804-1-->L806: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t2524~0.offset_10|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t2524~0.base_10| 4)) (= (store |v_#valid_30| |v_ULTIMATE.start_main_~#t2524~0.base_10| 1) |v_#valid_29|) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t2524~0.base_10|) (= 0 (select |v_#valid_30| |v_ULTIMATE.start_main_~#t2524~0.base_10|)) (not (= |v_ULTIMATE.start_main_~#t2524~0.base_10| 0)) (= |v_#memory_int_13| (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2524~0.base_10| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t2524~0.base_10|) |v_ULTIMATE.start_main_~#t2524~0.offset_10| 2)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_30|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_29|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t2524~0.base=|v_ULTIMATE.start_main_~#t2524~0.base_10|, ULTIMATE.start_main_#t~nondet16=|v_ULTIMATE.start_main_#t~nondet16_6|, #length=|v_#length_15|, ULTIMATE.start_main_~#t2524~0.offset=|v_ULTIMATE.start_main_~#t2524~0.offset_10|} AuxVars[] AssignedVars[#valid, #memory_int, ULTIMATE.start_main_~#t2524~0.base, ULTIMATE.start_main_#t~nondet16, #length, ULTIMATE.start_main_~#t2524~0.offset] because there is no mapped edge [2019-12-07 17:51:45,352 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [616] [616] P2ENTRY-->L4-3: Formula: (and (= v_~y$w_buff0~0_29 v_~y$w_buff1~0_24) (= v_P2Thread1of1ForFork0_~arg.base_9 |v_P2Thread1of1ForFork0_#in~arg.base_11|) (= 2 v_~y$w_buff0~0_28) (= (ite (not (and (not (= 0 (mod v_~y$w_buff1_used~0_54 256))) (not (= (mod v_~y$w_buff0_used~0_103 256) 0)))) 1 0) |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_9|) (= v_~y$w_buff0_used~0_103 1) (= v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_11 |v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_9|) (not (= 0 v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_11)) (= v_~y$w_buff1_used~0_54 v_~y$w_buff0_used~0_104) (= |v_P2Thread1of1ForFork0_#in~arg.offset_11| v_P2Thread1of1ForFork0_~arg.offset_9)) InVars {P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_11|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_104, ~y$w_buff0~0=v_~y$w_buff0~0_29, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_11|} OutVars{P2Thread1of1ForFork0_~arg.base=v_P2Thread1of1ForFork0_~arg.base_9, P2Thread1of1ForFork0_#in~arg.offset=|v_P2Thread1of1ForFork0_#in~arg.offset_11|, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression=|v_P2Thread1of1ForFork0___VERIFIER_assert_#in~expression_9|, ~y$w_buff0_used~0=v_~y$w_buff0_used~0_103, ~y$w_buff1~0=v_~y$w_buff1~0_24, ~y$w_buff0~0=v_~y$w_buff0~0_28, P2Thread1of1ForFork0_~arg.offset=v_P2Thread1of1ForFork0_~arg.offset_9, P2Thread1of1ForFork0_#in~arg.base=|v_P2Thread1of1ForFork0_#in~arg.base_11|, P2Thread1of1ForFork0___VERIFIER_assert_~expression=v_P2Thread1of1ForFork0___VERIFIER_assert_~expression_11, ~y$w_buff1_used~0=v_~y$w_buff1_used~0_54} AuxVars[] AssignedVars[P2Thread1of1ForFork0_~arg.base, P2Thread1of1ForFork0___VERIFIER_assert_#in~expression, ~y$w_buff0_used~0, ~y$w_buff1~0, ~y$w_buff0~0, P2Thread1of1ForFork0_~arg.offset, P2Thread1of1ForFork0___VERIFIER_assert_~expression, ~y$w_buff1_used~0] because there is no mapped edge [2019-12-07 17:51:45,352 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [720] [720] P0ENTRY-->P0EXIT: Formula: (and (= v_~x~0_47 v_~__unbuffered_p0_EAX~0_32) (= 0 |v_P0Thread1of1ForFork1_#res.offset_13|) (= (+ v_~__unbuffered_cnt~0_81 1) v_~__unbuffered_cnt~0_80) (= v_~z~0_109 2) (= v_P0Thread1of1ForFork1_~arg.offset_19 |v_P0Thread1of1ForFork1_#in~arg.offset_21|) (= |v_P0Thread1of1ForFork1_#in~arg.base_21| v_P0Thread1of1ForFork1_~arg.base_19) (= |v_P0Thread1of1ForFork1_#res.base_13| 0)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_21|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_81, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_21|, ~x~0=v_~x~0_47} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_32, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_13|, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_21|, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_13|, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_19, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_80, ~z~0=v_~z~0_109, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_21|, ~x~0=v_~x~0_47, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_19} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, P0Thread1of1ForFork1_#res.offset, P0Thread1of1ForFork1_#res.base, P0Thread1of1ForFork1_~arg.offset, ~__unbuffered_cnt~0, ~z~0, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 17:51:45,353 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [691] [691] L780-->L780-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In-24977062 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd3~0_In-24977062 256)))) (or (and (or .cse0 .cse1) (= ~y$w_buff0_used~0_In-24977062 |P2Thread1of1ForFork0_#t~ite11_Out-24977062|)) (and (not .cse0) (not .cse1) (= 0 |P2Thread1of1ForFork0_#t~ite11_Out-24977062|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-24977062, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-24977062} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-24977062, P2Thread1of1ForFork0_#t~ite11=|P2Thread1of1ForFork0_#t~ite11_Out-24977062|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-24977062} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite11] because there is no mapped edge [2019-12-07 17:51:45,353 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [678] [678] L750-2-->L750-5: Formula: (let ((.cse0 (= |P1Thread1of1ForFork2_#t~ite3_Out-705899353| |P1Thread1of1ForFork2_#t~ite4_Out-705899353|)) (.cse1 (= (mod ~y$r_buff1_thd2~0_In-705899353 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In-705899353 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite3_Out-705899353| ~y$w_buff1~0_In-705899353) .cse0 (not .cse1) (not .cse2)) (and (= |P1Thread1of1ForFork2_#t~ite3_Out-705899353| ~y~0_In-705899353) .cse0 (or .cse1 .cse2)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-705899353, ~y$w_buff1~0=~y$w_buff1~0_In-705899353, ~y~0=~y~0_In-705899353, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-705899353} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In-705899353, ~y$w_buff1~0=~y$w_buff1~0_In-705899353, P1Thread1of1ForFork2_#t~ite4=|P1Thread1of1ForFork2_#t~ite4_Out-705899353|, ~y~0=~y~0_In-705899353, P1Thread1of1ForFork2_#t~ite3=|P1Thread1of1ForFork2_#t~ite3_Out-705899353|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-705899353} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite4, P1Thread1of1ForFork2_#t~ite3] because there is no mapped edge [2019-12-07 17:51:45,354 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [694] [694] L751-->L751-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In2005253206 256))) (.cse0 (= (mod ~y$r_buff0_thd2~0_In2005253206 256) 0))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite5_Out2005253206|)) (and (= ~y$w_buff0_used~0_In2005253206 |P1Thread1of1ForFork2_#t~ite5_Out2005253206|) (or .cse1 .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In2005253206, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2005253206} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In2005253206, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In2005253206, P1Thread1of1ForFork2_#t~ite5=|P1Thread1of1ForFork2_#t~ite5_Out2005253206|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite5] because there is no mapped edge [2019-12-07 17:51:45,354 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [684] [684] L781-->L781-2: Formula: (let ((.cse0 (= 0 (mod ~y$r_buff0_thd3~0_In-1000728090 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In-1000728090 256))) (.cse3 (= 0 (mod ~y$r_buff1_thd3~0_In-1000728090 256))) (.cse2 (= (mod ~y$w_buff1_used~0_In-1000728090 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork0_#t~ite12_Out-1000728090| ~y$w_buff1_used~0_In-1000728090)) (and (= |P2Thread1of1ForFork0_#t~ite12_Out-1000728090| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1000728090, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1000728090, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1000728090, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1000728090} OutVars{~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In-1000728090, ~y$w_buff0_used~0=~y$w_buff0_used~0_In-1000728090, P2Thread1of1ForFork0_#t~ite12=|P2Thread1of1ForFork0_#t~ite12_Out-1000728090|, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-1000728090, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1000728090} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite12] because there is no mapped edge [2019-12-07 17:51:45,354 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [685] [685] L752-->L752-2: Formula: (let ((.cse2 (= 0 (mod ~y$w_buff1_used~0_In386598775 256))) (.cse3 (= (mod ~y$r_buff1_thd2~0_In386598775 256) 0)) (.cse0 (= 0 (mod ~y$r_buff0_thd2~0_In386598775 256))) (.cse1 (= 0 (mod ~y$w_buff0_used~0_In386598775 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite6_Out386598775| ~y$w_buff1_used~0_In386598775) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P1Thread1of1ForFork2_#t~ite6_Out386598775| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In386598775, ~y$w_buff0_used~0=~y$w_buff0_used~0_In386598775, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In386598775, ~y$w_buff1_used~0=~y$w_buff1_used~0_In386598775} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In386598775, ~y$w_buff0_used~0=~y$w_buff0_used~0_In386598775, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In386598775, P1Thread1of1ForFork2_#t~ite6=|P1Thread1of1ForFork2_#t~ite6_Out386598775|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In386598775} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite6] because there is no mapped edge [2019-12-07 17:51:45,354 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [693] [693] L753-->L753-2: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-16581287 256))) (.cse1 (= (mod ~y$r_buff0_thd2~0_In-16581287 256) 0))) (or (and (= ~y$r_buff0_thd2~0_In-16581287 |P1Thread1of1ForFork2_#t~ite7_Out-16581287|) (or .cse0 .cse1)) (and (not .cse0) (= 0 |P1Thread1of1ForFork2_#t~ite7_Out-16581287|) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-16581287, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-16581287} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-16581287, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In-16581287, P1Thread1of1ForFork2_#t~ite7=|P1Thread1of1ForFork2_#t~ite7_Out-16581287|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite7] because there is no mapped edge [2019-12-07 17:51:45,355 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [690] [690] L754-->L754-2: Formula: (let ((.cse0 (= (mod ~y$w_buff1_used~0_In984766544 256) 0)) (.cse1 (= 0 (mod ~y$r_buff1_thd2~0_In984766544 256))) (.cse2 (= (mod ~y$r_buff0_thd2~0_In984766544 256) 0)) (.cse3 (= (mod ~y$w_buff0_used~0_In984766544 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite8_Out984766544| ~y$r_buff1_thd2~0_In984766544) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite8_Out984766544| 0)))) InVars {~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In984766544, ~y$w_buff0_used~0=~y$w_buff0_used~0_In984766544, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In984766544, ~y$w_buff1_used~0=~y$w_buff1_used~0_In984766544} OutVars{~y$r_buff1_thd2~0=~y$r_buff1_thd2~0_In984766544, ~y$w_buff0_used~0=~y$w_buff0_used~0_In984766544, P1Thread1of1ForFork2_#t~ite8=|P1Thread1of1ForFork2_#t~ite8_Out984766544|, ~y$r_buff0_thd2~0=~y$r_buff0_thd2~0_In984766544, ~y$w_buff1_used~0=~y$w_buff1_used~0_In984766544} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite8] because there is no mapped edge [2019-12-07 17:51:45,355 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [712] [712] L754-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= |v_P1Thread1of1ForFork2_#t~ite8_24| v_~y$r_buff1_thd2~0_103) (= v_~__unbuffered_cnt~0_54 (+ v_~__unbuffered_cnt~0_55 1))) InVars {P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_24|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_55} OutVars{~y$r_buff1_thd2~0=v_~y$r_buff1_thd2~0_103, P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, P1Thread1of1ForFork2_#t~ite8=|v_P1Thread1of1ForFork2_#t~ite8_23|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[~y$r_buff1_thd2~0, P1Thread1of1ForFork2_#res.offset, P1Thread1of1ForFork2_#t~ite8, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 17:51:45,355 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [688] [688] L782-->L783: Formula: (let ((.cse0 (= 0 (mod ~y$w_buff0_used~0_In-254870859 256))) (.cse2 (= 0 (mod ~y$r_buff0_thd3~0_In-254870859 256))) (.cse1 (= ~y$r_buff0_thd3~0_Out-254870859 ~y$r_buff0_thd3~0_In-254870859))) (or (and .cse0 .cse1) (and (not .cse0) (not .cse2) (= 0 ~y$r_buff0_thd3~0_Out-254870859)) (and .cse2 .cse1))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-254870859, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In-254870859} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-254870859, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_Out-254870859, P2Thread1of1ForFork0_#t~ite13=|P2Thread1of1ForFork0_#t~ite13_Out-254870859|} AuxVars[] AssignedVars[~y$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite13] because there is no mapped edge [2019-12-07 17:51:45,355 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [689] [689] L783-->L783-2: Formula: (let ((.cse1 (= (mod ~y$r_buff1_thd3~0_In1825162012 256) 0)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In1825162012 256))) (.cse3 (= 0 (mod ~y$r_buff0_thd3~0_In1825162012 256))) (.cse2 (= 0 (mod ~y$w_buff0_used~0_In1825162012 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite14_Out1825162012| ~y$r_buff1_thd3~0_In1825162012) (or .cse2 .cse3)) (and (= |P2Thread1of1ForFork0_#t~ite14_Out1825162012| 0) (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2)))))) InVars {~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1825162012, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1825162012, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1825162012, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1825162012} OutVars{P2Thread1of1ForFork0_#t~ite14=|P2Thread1of1ForFork0_#t~ite14_Out1825162012|, ~y$r_buff1_thd3~0=~y$r_buff1_thd3~0_In1825162012, ~y$w_buff0_used~0=~y$w_buff0_used~0_In1825162012, ~y$r_buff0_thd3~0=~y$r_buff0_thd3~0_In1825162012, ~y$w_buff1_used~0=~y$w_buff1_used~0_In1825162012} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14] because there is no mapped edge [2019-12-07 17:51:45,355 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [716] [716] L783-2-->P2EXIT: Formula: (and (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= |v_P2Thread1of1ForFork0_#t~ite14_24| v_~y$r_buff1_thd3~0_99) (= (+ v_~__unbuffered_cnt~0_67 1) v_~__unbuffered_cnt~0_66) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_24|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67} OutVars{P2Thread1of1ForFork0_#t~ite14=|v_P2Thread1of1ForFork0_#t~ite14_23|, ~y$r_buff1_thd3~0=v_~y$r_buff1_thd3~0_99, P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite14, ~y$r_buff1_thd3~0, P2Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 17:51:45,355 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [614] [614] L806-1-->L812: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ULTIMATE.start_main_#t~nondet17=|v_ULTIMATE.start_main_#t~nondet17_5|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet17, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 17:51:45,355 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [692] [692] L812-2-->L812-5: Formula: (let ((.cse1 (= |ULTIMATE.start_main_#t~ite19_Out260823075| |ULTIMATE.start_main_#t~ite18_Out260823075|)) (.cse0 (= 0 (mod ~y$w_buff1_used~0_In260823075 256))) (.cse2 (= (mod ~y$r_buff1_thd0~0_In260823075 256) 0))) (or (and (not .cse0) (= |ULTIMATE.start_main_#t~ite18_Out260823075| ~y$w_buff1~0_In260823075) .cse1 (not .cse2)) (and (= |ULTIMATE.start_main_#t~ite18_Out260823075| ~y~0_In260823075) .cse1 (or .cse0 .cse2)))) InVars {~y$w_buff1~0=~y$w_buff1~0_In260823075, ~y~0=~y~0_In260823075, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In260823075, ~y$w_buff1_used~0=~y$w_buff1_used~0_In260823075} OutVars{~y$w_buff1~0=~y$w_buff1~0_In260823075, ULTIMATE.start_main_#t~ite18=|ULTIMATE.start_main_#t~ite18_Out260823075|, ULTIMATE.start_main_#t~ite19=|ULTIMATE.start_main_#t~ite19_Out260823075|, ~y~0=~y~0_In260823075, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In260823075, ~y$w_buff1_used~0=~y$w_buff1_used~0_In260823075} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite18, ULTIMATE.start_main_#t~ite19] because there is no mapped edge [2019-12-07 17:51:45,356 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [676] [676] L813-->L813-2: Formula: (let ((.cse1 (= 0 (mod ~y$w_buff0_used~0_In1375098561 256))) (.cse0 (= (mod ~y$r_buff0_thd0~0_In1375098561 256) 0))) (or (and (= ~y$w_buff0_used~0_In1375098561 |ULTIMATE.start_main_#t~ite20_Out1375098561|) (or .cse0 .cse1)) (and (= 0 |ULTIMATE.start_main_#t~ite20_Out1375098561|) (not .cse1) (not .cse0)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1375098561, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1375098561} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1375098561, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1375098561, ULTIMATE.start_main_#t~ite20=|ULTIMATE.start_main_#t~ite20_Out1375098561|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite20] because there is no mapped edge [2019-12-07 17:51:45,356 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [683] [683] L814-->L814-2: Formula: (let ((.cse0 (= (mod ~y$r_buff0_thd0~0_In-872037224 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In-872037224 256) 0)) (.cse3 (= (mod ~y$r_buff1_thd0~0_In-872037224 256) 0)) (.cse2 (= (mod ~y$w_buff1_used~0_In-872037224 256) 0))) (or (and (or .cse0 .cse1) (= ~y$w_buff1_used~0_In-872037224 |ULTIMATE.start_main_#t~ite21_Out-872037224|) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |ULTIMATE.start_main_#t~ite21_Out-872037224|)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-872037224, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-872037224, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-872037224, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-872037224} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-872037224, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-872037224, ULTIMATE.start_main_#t~ite21=|ULTIMATE.start_main_#t~ite21_Out-872037224|, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-872037224, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-872037224} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite21] because there is no mapped edge [2019-12-07 17:51:45,356 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [680] [680] L815-->L815-2: Formula: (let ((.cse0 (= (mod ~y$w_buff0_used~0_In1041155812 256) 0)) (.cse1 (= 0 (mod ~y$r_buff0_thd0~0_In1041155812 256)))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite22_Out1041155812| ~y$r_buff0_thd0~0_In1041155812)) (and (= 0 |ULTIMATE.start_main_#t~ite22_Out1041155812|) (not .cse0) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In1041155812, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1041155812} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In1041155812, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In1041155812, ULTIMATE.start_main_#t~ite22=|ULTIMATE.start_main_#t~ite22_Out1041155812|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite22] because there is no mapped edge [2019-12-07 17:51:45,356 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [686] [686] L816-->L816-2: Formula: (let ((.cse2 (= (mod ~y$w_buff1_used~0_In-1799265621 256) 0)) (.cse3 (= 0 (mod ~y$r_buff1_thd0~0_In-1799265621 256))) (.cse0 (= (mod ~y$r_buff0_thd0~0_In-1799265621 256) 0)) (.cse1 (= (mod ~y$w_buff0_used~0_In-1799265621 256) 0))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~y$r_buff1_thd0~0_In-1799265621 |ULTIMATE.start_main_#t~ite23_Out-1799265621|)) (and (= 0 |ULTIMATE.start_main_#t~ite23_Out-1799265621|) (or (and (not .cse2) (not .cse3)) (and (not .cse0) (not .cse1)))))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-1799265621, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1799265621, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1799265621, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1799265621} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-1799265621, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-1799265621, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-1799265621, ULTIMATE.start_main_#t~ite23=|ULTIMATE.start_main_#t~ite23_Out-1799265621|, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-1799265621} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite23] because there is no mapped edge [2019-12-07 17:51:45,358 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L827-->L827-8: Formula: (let ((.cse1 (= (mod ~weak$$choice2~0_In-902533001 256) 0))) (or (and (let ((.cse0 (= 0 (mod ~y$r_buff0_thd0~0_In-902533001 256)))) (or (= 0 (mod ~y$w_buff0_used~0_In-902533001 256)) (and .cse0 (= (mod ~y$r_buff1_thd0~0_In-902533001 256) 0)) (and .cse0 (= 0 (mod ~y$w_buff1_used~0_In-902533001 256))))) (= |ULTIMATE.start_main_#t~ite39_Out-902533001| |ULTIMATE.start_main_#t~ite38_Out-902533001|) (= ~y$w_buff1_used~0_In-902533001 |ULTIMATE.start_main_#t~ite38_Out-902533001|) .cse1) (and (= |ULTIMATE.start_main_#t~ite38_In-902533001| |ULTIMATE.start_main_#t~ite38_Out-902533001|) (= |ULTIMATE.start_main_#t~ite39_Out-902533001| ~y$w_buff1_used~0_In-902533001) (not .cse1)))) InVars {~y$w_buff0_used~0=~y$w_buff0_used~0_In-902533001, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-902533001, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_In-902533001|, ~weak$$choice2~0=~weak$$choice2~0_In-902533001, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-902533001, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-902533001} OutVars{~y$w_buff0_used~0=~y$w_buff0_used~0_In-902533001, ULTIMATE.start_main_#t~ite39=|ULTIMATE.start_main_#t~ite39_Out-902533001|, ~y$r_buff0_thd0~0=~y$r_buff0_thd0~0_In-902533001, ULTIMATE.start_main_#t~ite38=|ULTIMATE.start_main_#t~ite38_Out-902533001|, ~weak$$choice2~0=~weak$$choice2~0_In-902533001, ~y$r_buff1_thd0~0=~y$r_buff1_thd0~0_In-902533001, ~y$w_buff1_used~0=~y$w_buff1_used~0_In-902533001} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite39, ULTIMATE.start_main_#t~ite38] because there is no mapped edge [2019-12-07 17:51:45,359 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [649] [649] L828-->L829: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_25 256))) (= v_~y$r_buff0_thd0~0_98 v_~y$r_buff0_thd0~0_97)) InVars {~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_98, ~weak$$choice2~0=v_~weak$$choice2~0_25} OutVars{ULTIMATE.start_main_#t~ite41=|v_ULTIMATE.start_main_#t~ite41_13|, ULTIMATE.start_main_#t~ite40=|v_ULTIMATE.start_main_#t~ite40_8|, ~y$r_buff0_thd0~0=v_~y$r_buff0_thd0~0_97, ~weak$$choice2~0=v_~weak$$choice2~0_25, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_9|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite41, ULTIMATE.start_main_#t~ite40, ~y$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 17:51:45,359 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [706] [706] L831-->L4: Formula: (and (= v_~y~0_99 v_~y$mem_tmp~0_10) (not (= (mod v_~y$flush_delayed~0_27 256) 0)) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4| (mod v_~main$tmp_guard1~0_12 256)) (= 0 v_~y$flush_delayed~0_26)) InVars {~y$mem_tmp~0=v_~y$mem_tmp~0_10, ~y$flush_delayed~0=v_~y$flush_delayed~0_27, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12} OutVars{~y$mem_tmp~0=v_~y$mem_tmp~0_10, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_9, ~y$flush_delayed~0=v_~y$flush_delayed~0_26, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_24|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12, ~y~0=v_~y~0_99, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression, ~y$flush_delayed~0, ULTIMATE.start_main_#t~ite46, ~y~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 17:51:45,359 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [709] [709] L4-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|) (= v_ULTIMATE.start___VERIFIER_assert_~expression_11 0)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 17:51:45,414 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_fb0ed9d7-d9b9-4999-a06e-ad246baea4b5/bin/uautomizer/witness.graphml [2019-12-07 17:51:45,415 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 17:51:45,416 INFO L168 Benchmark]: Toolchain (without parser) took 13259.68 ms. Allocated memory was 1.0 GB in the beginning and 1.8 GB in the end (delta: 796.9 MB). Free memory was 940.8 MB in the beginning and 1.0 GB in the end (delta: -71.4 MB). Peak memory consumption was 725.5 MB. Max. memory is 11.5 GB. [2019-12-07 17:51:45,416 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:51:45,416 INFO L168 Benchmark]: CACSL2BoogieTranslator took 371.53 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 95.9 MB). Free memory was 940.8 MB in the beginning and 1.1 GB in the end (delta: -127.1 MB). Peak memory consumption was 23.6 MB. Max. memory is 11.5 GB. [2019-12-07 17:51:45,416 INFO L168 Benchmark]: Boogie Procedure Inliner took 38.83 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:51:45,416 INFO L168 Benchmark]: Boogie Preprocessor took 25.46 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:51:45,417 INFO L168 Benchmark]: RCFGBuilder took 382.00 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.2 MB). Peak memory consumption was 54.2 MB. Max. memory is 11.5 GB. [2019-12-07 17:51:45,417 INFO L168 Benchmark]: TraceAbstraction took 12373.09 ms. Allocated memory was 1.1 GB in the beginning and 1.8 GB in the end (delta: 701.0 MB). Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: -25.1 MB). Peak memory consumption was 675.9 MB. Max. memory is 11.5 GB. [2019-12-07 17:51:45,417 INFO L168 Benchmark]: Witness Printer took 65.54 ms. Allocated memory is still 1.8 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 21.1 MB). Peak memory consumption was 21.1 MB. Max. memory is 11.5 GB. [2019-12-07 17:51:45,419 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 371.53 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 95.9 MB). Free memory was 940.8 MB in the beginning and 1.1 GB in the end (delta: -127.1 MB). Peak memory consumption was 23.6 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 38.83 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.46 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 382.00 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.2 MB). Peak memory consumption was 54.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 12373.09 ms. Allocated memory was 1.1 GB in the beginning and 1.8 GB in the end (delta: 701.0 MB). Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: -25.1 MB). Peak memory consumption was 675.9 MB. Max. memory is 11.5 GB. * Witness Printer took 65.54 ms. Allocated memory is still 1.8 GB. Free memory was 1.0 GB in the beginning and 1.0 GB in the end (delta: 21.1 MB). Peak memory consumption was 21.1 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 2.8s, 162 ProgramPointsBefore, 83 ProgramPointsAfterwards, 193 TransitionsBefore, 94 TransitionsAfterwards, 11490 CoEnabledTransitionPairs, 7 FixpointIterations, 31 TrivialSequentialCompositions, 43 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 37 ConcurrentYvCompositions, 24 ChoiceCompositions, 4225 VarBasedMoverChecksPositive, 199 VarBasedMoverChecksNegative, 61 SemBasedMoverChecksPositive, 194 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.6s, 0 MoverChecksTotal, 48124 CheckedPairsTotal, 111 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L802] FCALL, FORK 0 pthread_create(&t2522, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L804] FCALL, FORK 0 pthread_create(&t2523, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L806] FCALL, FORK 0 pthread_create(&t2524, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=0, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=0, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=0] [L769] 3 y$r_buff1_thd0 = y$r_buff0_thd0 [L770] 3 y$r_buff1_thd1 = y$r_buff0_thd1 [L771] 3 y$r_buff1_thd2 = y$r_buff0_thd2 [L772] 3 y$r_buff1_thd3 = y$r_buff0_thd3 [L773] 3 y$r_buff0_thd3 = (_Bool)1 [L776] 3 z = 1 VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=1] [L779] EXPR 3 y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L744] 2 x = 1 [L747] 2 y = 1 VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L779] 3 y = y$w_buff0_used && y$r_buff0_thd3 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd3 ? y$w_buff1 : y) [L750] EXPR 2 y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) VAL [\result={0:0}, __unbuffered_cnt=1, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=1, y$w_buff1=0, y$w_buff1_used=0, z=2] [L780] 3 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd3 ? (_Bool)0 : y$w_buff0_used [L750] 2 y = y$w_buff0_used && y$r_buff0_thd2 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd2 ? y$w_buff1 : y) [L751] 2 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$w_buff0_used [L752] 2 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd2 || y$w_buff1_used && y$r_buff1_thd2 ? (_Bool)0 : y$w_buff1_used [L753] 2 y$r_buff0_thd2 = y$w_buff0_used && y$r_buff0_thd2 ? (_Bool)0 : y$r_buff0_thd2 [L781] 3 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd3 || y$w_buff1_used && y$r_buff1_thd3 ? (_Bool)0 : y$w_buff1_used [L812] EXPR 0 y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=2, y$flush_delayed=0, y$mem_tmp=0, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L812] 0 y = y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : (y$w_buff1_used && y$r_buff1_thd0 ? y$w_buff1 : y) [L813] 0 y$w_buff0_used = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used [L814] 0 y$w_buff1_used = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$w_buff1_used [L815] 0 y$r_buff0_thd0 = y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$r_buff0_thd0 [L816] 0 y$r_buff1_thd0 = y$w_buff0_used && y$r_buff0_thd0 || y$w_buff1_used && y$r_buff1_thd0 ? (_Bool)0 : y$r_buff1_thd0 [L819] 0 weak$$choice0 = __VERIFIER_nondet_bool() [L820] 0 weak$$choice2 = __VERIFIER_nondet_bool() [L821] 0 y$flush_delayed = weak$$choice2 [L822] 0 y$mem_tmp = y VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L823] EXPR 0 !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L823] 0 y = !y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff1) [L824] EXPR 0 weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L824] 0 y$w_buff0 = weak$$choice2 ? y$w_buff0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff0 : y$w_buff0)) [L825] EXPR 0 weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L825] 0 y$w_buff1 = weak$$choice2 ? y$w_buff1 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1 : (y$w_buff0_used && y$r_buff0_thd0 ? y$w_buff1 : y$w_buff1)) [L826] EXPR 0 weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L826] 0 y$w_buff0_used = weak$$choice2 ? y$w_buff0_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff0_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : y$w_buff0_used)) [L827] 0 y$w_buff1_used = weak$$choice2 ? y$w_buff1_used : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$w_buff1_used : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L829] EXPR 0 weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] [L829] 0 y$r_buff1_thd0 = weak$$choice2 ? y$r_buff1_thd0 : (!y$w_buff0_used || !y$r_buff0_thd0 && !y$w_buff1_used || !y$r_buff0_thd0 && !y$r_buff1_thd0 ? y$r_buff1_thd0 : (y$w_buff0_used && y$r_buff0_thd0 ? (_Bool)0 : (_Bool)0)) [L830] 0 main$tmp_guard1 = !(y == 2 && z == 2 && __unbuffered_p0_EAX == 0) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=2, y$flush_delayed=1, y$mem_tmp=2, y$r_buff0_thd0=0, y$r_buff0_thd1=0, y$r_buff0_thd2=0, y$r_buff0_thd3=1, y$r_buff1_thd0=0, y$r_buff1_thd1=0, y$r_buff1_thd2=0, y$r_buff1_thd3=0, y$read_delayed=0, y$read_delayed_var={0:0}, y$w_buff0=2, y$w_buff0_used=0, y$w_buff1=0, y$w_buff1_used=0, z=2] - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 153 locations, 2 error locations. Result: UNSAFE, OverallTime: 12.2s, OverallIterations: 17, TraceHistogramMax: 1, AutomataDifference: 3.7s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 1688 SDtfs, 2069 SDslu, 4417 SDs, 0 SdLazy, 3016 SolverSat, 198 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 167 GetRequests, 14 SyntacticMatches, 10 SemanticMatches, 143 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 548 ImplicationChecksByTransitivity, 1.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=26410occurred in iteration=5, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 2.9s AutomataMinimizationTime, 16 MinimizatonAttempts, 18591 StatesRemovedByMinimization, 10 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.3s InterpolantComputationTime, 680 NumberOfCodeBlocks, 680 NumberOfCodeBlocksAsserted, 17 NumberOfCheckSat, 607 ConstructedInterpolants, 0 QuantifiedInterpolants, 148177 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 16 InterpolantComputations, 16 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...