./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/thin002_rmo.opt.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_6f554ac5-3310-48ef-b73d-91839375f593/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_6f554ac5-3310-48ef-b73d-91839375f593/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_6f554ac5-3310-48ef-b73d-91839375f593/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_6f554ac5-3310-48ef-b73d-91839375f593/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/pthread-wmm/thin002_rmo.opt.i -s /tmp/vcloud-vcloud-master/worker/run_dir_6f554ac5-3310-48ef-b73d-91839375f593/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_6f554ac5-3310-48ef-b73d-91839375f593/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 9944ea8cc0f1aae944fe3366f1c213cc341b49ae ..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 15:28:21,119 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 15:28:21,121 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 15:28:21,128 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 15:28:21,128 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 15:28:21,129 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 15:28:21,130 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 15:28:21,131 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 15:28:21,133 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 15:28:21,134 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 15:28:21,134 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 15:28:21,135 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 15:28:21,135 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 15:28:21,136 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 15:28:21,137 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 15:28:21,137 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 15:28:21,138 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 15:28:21,139 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 15:28:21,140 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 15:28:21,142 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 15:28:21,143 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 15:28:21,143 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 15:28:21,144 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 15:28:21,145 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 15:28:21,146 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 15:28:21,146 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 15:28:21,146 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 15:28:21,147 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 15:28:21,147 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 15:28:21,148 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 15:28:21,148 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 15:28:21,149 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 15:28:21,149 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 15:28:21,150 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 15:28:21,151 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 15:28:21,151 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 15:28:21,151 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 15:28:21,151 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 15:28:21,152 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 15:28:21,152 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 15:28:21,153 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 15:28:21,154 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_6f554ac5-3310-48ef-b73d-91839375f593/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 15:28:21,166 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 15:28:21,166 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 15:28:21,167 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 15:28:21,167 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 15:28:21,167 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 15:28:21,168 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 15:28:21,168 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 15:28:21,168 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 15:28:21,168 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 15:28:21,168 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 15:28:21,169 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 15:28:21,169 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 15:28:21,169 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 15:28:21,169 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 15:28:21,169 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 15:28:21,169 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 15:28:21,170 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 15:28:21,170 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 15:28:21,170 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 15:28:21,170 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 15:28:21,170 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 15:28:21,171 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 15:28:21,171 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 15:28:21,171 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 15:28:21,171 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 15:28:21,171 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 15:28:21,172 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 15:28:21,172 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 15:28:21,172 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 15:28:21,172 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_6f554ac5-3310-48ef-b73d-91839375f593/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 9944ea8cc0f1aae944fe3366f1c213cc341b49ae [2019-12-07 15:28:21,279 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 15:28:21,287 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 15:28:21,290 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 15:28:21,291 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 15:28:21,291 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 15:28:21,291 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_6f554ac5-3310-48ef-b73d-91839375f593/bin/uautomizer/../../sv-benchmarks/c/pthread-wmm/thin002_rmo.opt.i [2019-12-07 15:28:21,330 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_6f554ac5-3310-48ef-b73d-91839375f593/bin/uautomizer/data/fff23988f/a75fbb7638e843acbb91fc454bdfe527/FLAG63698da6e [2019-12-07 15:28:21,710 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 15:28:21,710 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_6f554ac5-3310-48ef-b73d-91839375f593/sv-benchmarks/c/pthread-wmm/thin002_rmo.opt.i [2019-12-07 15:28:21,724 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_6f554ac5-3310-48ef-b73d-91839375f593/bin/uautomizer/data/fff23988f/a75fbb7638e843acbb91fc454bdfe527/FLAG63698da6e [2019-12-07 15:28:21,736 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_6f554ac5-3310-48ef-b73d-91839375f593/bin/uautomizer/data/fff23988f/a75fbb7638e843acbb91fc454bdfe527 [2019-12-07 15:28:21,738 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 15:28:21,739 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 15:28:21,740 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 15:28:21,740 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 15:28:21,743 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 15:28:21,743 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 03:28:21" (1/1) ... [2019-12-07 15:28:21,745 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@551fb3cf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:28:21, skipping insertion in model container [2019-12-07 15:28:21,745 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 03:28:21" (1/1) ... [2019-12-07 15:28:21,750 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 15:28:21,784 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 15:28:22,039 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 15:28:22,047 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 15:28:22,088 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 15:28:22,136 INFO L208 MainTranslator]: Completed translation [2019-12-07 15:28:22,136 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:28:22 WrapperNode [2019-12-07 15:28:22,136 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 15:28:22,137 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 15:28:22,137 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 15:28:22,137 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 15:28:22,142 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:28:22" (1/1) ... [2019-12-07 15:28:22,156 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:28:22" (1/1) ... [2019-12-07 15:28:22,174 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 15:28:22,174 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 15:28:22,175 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 15:28:22,175 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 15:28:22,181 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:28:22" (1/1) ... [2019-12-07 15:28:22,181 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:28:22" (1/1) ... [2019-12-07 15:28:22,185 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:28:22" (1/1) ... [2019-12-07 15:28:22,185 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:28:22" (1/1) ... [2019-12-07 15:28:22,192 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:28:22" (1/1) ... [2019-12-07 15:28:22,195 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:28:22" (1/1) ... [2019-12-07 15:28:22,197 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:28:22" (1/1) ... [2019-12-07 15:28:22,201 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 15:28:22,201 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 15:28:22,201 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 15:28:22,201 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 15:28:22,202 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:28:22" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_6f554ac5-3310-48ef-b73d-91839375f593/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 15:28:22,248 INFO L130 BoogieDeclarations]: Found specification of procedure read~int [2019-12-07 15:28:22,248 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 15:28:22,248 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 15:28:22,248 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 15:28:22,248 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 15:28:22,249 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 15:28:22,249 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 15:28:22,249 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 15:28:22,249 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 15:28:22,249 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 15:28:22,249 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 15:28:22,249 INFO L130 BoogieDeclarations]: Found specification of procedure P3 [2019-12-07 15:28:22,249 INFO L138 BoogieDeclarations]: Found implementation of procedure P3 [2019-12-07 15:28:22,250 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int [2019-12-07 15:28:22,250 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 15:28:22,250 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 15:28:22,250 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 15:28:22,251 WARN L205 CfgBuilder]: User set CodeBlockSize to SequenceOfStatements but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 15:28:22,610 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 15:28:22,610 INFO L287 CfgBuilder]: Removed 6 assume(true) statements. [2019-12-07 15:28:22,611 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:28:22 BoogieIcfgContainer [2019-12-07 15:28:22,611 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 15:28:22,612 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 15:28:22,612 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 15:28:22,614 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 15:28:22,614 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 03:28:21" (1/3) ... [2019-12-07 15:28:22,614 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7dcd752b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 03:28:22, skipping insertion in model container [2019-12-07 15:28:22,614 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:28:22" (2/3) ... [2019-12-07 15:28:22,615 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7dcd752b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 03:28:22, skipping insertion in model container [2019-12-07 15:28:22,615 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:28:22" (3/3) ... [2019-12-07 15:28:22,616 INFO L109 eAbstractionObserver]: Analyzing ICFG thin002_rmo.opt.i [2019-12-07 15:28:22,622 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 15:28:22,622 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 15:28:22,627 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-12-07 15:28:22,628 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 15:28:22,653 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,653 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,653 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,653 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,653 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,653 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,653 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~nondet3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,654 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~nondet4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,654 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,654 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,654 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,654 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,654 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,654 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,655 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,655 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,655 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,655 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,655 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,655 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,655 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,656 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,656 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,656 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,656 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,656 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,656 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,656 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,656 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,657 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,657 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,657 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,657 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,657 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,657 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,657 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,658 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,658 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,658 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,658 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,658 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,658 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,658 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,658 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,659 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,659 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,659 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,659 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,659 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,659 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,659 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,660 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,660 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,660 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,660 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,660 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,660 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,660 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,660 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,661 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,661 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,661 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,661 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,661 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,661 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,661 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,661 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,662 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,662 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,662 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,662 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,662 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,662 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,662 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,662 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,663 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,663 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,663 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,663 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,663 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,663 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,663 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,663 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,664 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,664 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,664 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,664 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,664 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,664 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,664 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,665 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,665 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,665 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,665 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,665 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~mem28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,665 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,665 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,665 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,666 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,666 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,666 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,666 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,666 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,666 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,666 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,666 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,667 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,667 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,667 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork3_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,667 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork3_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,667 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,667 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork3_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,667 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,668 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,668 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,668 WARN L315 ript$VariableManager]: TermVariabe P3Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,668 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,668 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,668 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,668 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,668 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~mem30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,669 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,669 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,669 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~mem30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,669 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,669 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,669 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,669 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,669 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,669 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,670 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,670 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,670 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,670 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,670 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,670 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,670 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,670 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,670 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,671 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,671 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,671 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,671 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,671 WARN L315 ript$VariableManager]: TermVariabe |P3Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 15:28:22,683 INFO L249 AbstractCegarLoop]: Starting to check reachability of 5 error locations. [2019-12-07 15:28:22,696 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 15:28:22,696 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 15:28:22,696 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 15:28:22,696 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 15:28:22,696 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 15:28:22,696 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 15:28:22,696 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 15:28:22,696 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 15:28:22,709 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 189 places, 212 transitions [2019-12-07 15:28:22,710 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 189 places, 212 transitions [2019-12-07 15:28:22,778 INFO L134 PetriNetUnfolder]: 36/208 cut-off events. [2019-12-07 15:28:22,778 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 15:28:22,789 INFO L76 FinitePrefix]: Finished finitePrefix Result has 221 conditions, 208 events. 36/208 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 12. Compared 524 event pairs. 12/183 useless extension candidates. Maximal degree in co-relation 155. Up to 2 conditions per place. [2019-12-07 15:28:22,801 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 189 places, 212 transitions [2019-12-07 15:28:22,839 INFO L134 PetriNetUnfolder]: 36/208 cut-off events. [2019-12-07 15:28:22,839 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 15:28:22,844 INFO L76 FinitePrefix]: Finished finitePrefix Result has 221 conditions, 208 events. 36/208 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 12. Compared 524 event pairs. 12/183 useless extension candidates. Maximal degree in co-relation 155. Up to 2 conditions per place. [2019-12-07 15:28:22,857 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 13674 [2019-12-07 15:28:22,857 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 15:28:26,371 WARN L192 SmtUtils]: Spent 186.00 ms on a formula simplification. DAG size of input: 105 DAG size of output: 103 [2019-12-07 15:28:26,836 WARN L192 SmtUtils]: Spent 371.00 ms on a formula simplification. DAG size of input: 150 DAG size of output: 148 [2019-12-07 15:28:27,011 WARN L192 SmtUtils]: Spent 173.00 ms on a formula simplification that was a NOOP. DAG size: 144 [2019-12-07 15:28:27,021 INFO L206 etLargeBlockEncoding]: Checked pairs total: 46543 [2019-12-07 15:28:27,022 INFO L214 etLargeBlockEncoding]: Total number of compositions: 151 [2019-12-07 15:28:27,024 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 72 places, 76 transitions [2019-12-07 15:28:28,010 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 20306 states. [2019-12-07 15:28:28,011 INFO L276 IsEmpty]: Start isEmpty. Operand 20306 states. [2019-12-07 15:28:28,039 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 15:28:28,040 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:28:28,040 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:28:28,040 INFO L410 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:28:28,044 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:28:28,044 INFO L82 PathProgramCache]: Analyzing trace with hash -569012922, now seen corresponding path program 1 times [2019-12-07 15:28:28,050 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:28:28,050 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [269133147] [2019-12-07 15:28:28,050 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:28:28,156 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:28:28,256 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:28:28,256 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [269133147] [2019-12-07 15:28:28,257 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:28:28,257 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:28:28,258 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1326736372] [2019-12-07 15:28:28,261 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:28:28,261 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:28:28,270 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:28:28,271 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:28:28,272 INFO L87 Difference]: Start difference. First operand 20306 states. Second operand 3 states. [2019-12-07 15:28:28,516 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:28:28,516 INFO L93 Difference]: Finished difference Result 19362 states and 83828 transitions. [2019-12-07 15:28:28,517 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:28:28,518 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 15:28:28,518 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:28:28,652 INFO L225 Difference]: With dead ends: 19362 [2019-12-07 15:28:28,652 INFO L226 Difference]: Without dead ends: 18114 [2019-12-07 15:28:28,653 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:28:28,792 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18114 states. [2019-12-07 15:28:29,193 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18114 to 18114. [2019-12-07 15:28:29,194 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18114 states. [2019-12-07 15:28:29,315 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18114 states to 18114 states and 78420 transitions. [2019-12-07 15:28:29,317 INFO L78 Accepts]: Start accepts. Automaton has 18114 states and 78420 transitions. Word has length 19 [2019-12-07 15:28:29,317 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:28:29,317 INFO L462 AbstractCegarLoop]: Abstraction has 18114 states and 78420 transitions. [2019-12-07 15:28:29,318 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:28:29,318 INFO L276 IsEmpty]: Start isEmpty. Operand 18114 states and 78420 transitions. [2019-12-07 15:28:29,324 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 15:28:29,324 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:28:29,324 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:28:29,324 INFO L410 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:28:29,325 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:28:29,325 INFO L82 PathProgramCache]: Analyzing trace with hash 692064053, now seen corresponding path program 1 times [2019-12-07 15:28:29,325 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:28:29,325 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1891146538] [2019-12-07 15:28:29,325 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:28:29,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:28:29,409 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:28:29,410 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1891146538] [2019-12-07 15:28:29,410 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:28:29,410 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:28:29,410 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [168767562] [2019-12-07 15:28:29,411 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 15:28:29,411 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:28:29,411 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 15:28:29,411 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 15:28:29,411 INFO L87 Difference]: Start difference. First operand 18114 states and 78420 transitions. Second operand 4 states. [2019-12-07 15:28:29,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:28:29,595 INFO L93 Difference]: Finished difference Result 15703 states and 62624 transitions. [2019-12-07 15:28:29,596 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 15:28:29,596 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 20 [2019-12-07 15:28:29,596 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:28:29,667 INFO L225 Difference]: With dead ends: 15703 [2019-12-07 15:28:29,667 INFO L226 Difference]: Without dead ends: 14603 [2019-12-07 15:28:29,668 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:28:29,746 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14603 states. [2019-12-07 15:28:29,936 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14603 to 14603. [2019-12-07 15:28:29,936 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14603 states. [2019-12-07 15:28:29,975 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14603 states to 14603 states and 58825 transitions. [2019-12-07 15:28:29,975 INFO L78 Accepts]: Start accepts. Automaton has 14603 states and 58825 transitions. Word has length 20 [2019-12-07 15:28:29,975 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:28:29,975 INFO L462 AbstractCegarLoop]: Abstraction has 14603 states and 58825 transitions. [2019-12-07 15:28:29,975 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 15:28:29,975 INFO L276 IsEmpty]: Start isEmpty. Operand 14603 states and 58825 transitions. [2019-12-07 15:28:29,980 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-12-07 15:28:29,981 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:28:29,981 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:28:29,981 INFO L410 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:28:29,981 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:28:29,981 INFO L82 PathProgramCache]: Analyzing trace with hash -99550596, now seen corresponding path program 1 times [2019-12-07 15:28:29,981 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:28:29,981 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [277390683] [2019-12-07 15:28:29,981 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:28:30,013 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:28:30,059 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:28:30,059 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [277390683] [2019-12-07 15:28:30,059 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:28:30,059 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 15:28:30,059 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1202729499] [2019-12-07 15:28:30,060 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:28:30,060 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:28:30,060 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:28:30,060 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:28:30,060 INFO L87 Difference]: Start difference. First operand 14603 states and 58825 transitions. Second operand 5 states. [2019-12-07 15:28:30,130 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:28:30,131 INFO L93 Difference]: Finished difference Result 7810 states and 26737 transitions. [2019-12-07 15:28:30,131 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 15:28:30,131 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2019-12-07 15:28:30,131 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:28:30,144 INFO L225 Difference]: With dead ends: 7810 [2019-12-07 15:28:30,144 INFO L226 Difference]: Without dead ends: 6937 [2019-12-07 15:28:30,144 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:28:30,175 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6937 states. [2019-12-07 15:28:30,306 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6937 to 6937. [2019-12-07 15:28:30,306 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6937 states. [2019-12-07 15:28:30,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6937 states to 6937 states and 23667 transitions. [2019-12-07 15:28:30,318 INFO L78 Accepts]: Start accepts. Automaton has 6937 states and 23667 transitions. Word has length 21 [2019-12-07 15:28:30,318 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:28:30,318 INFO L462 AbstractCegarLoop]: Abstraction has 6937 states and 23667 transitions. [2019-12-07 15:28:30,318 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:28:30,318 INFO L276 IsEmpty]: Start isEmpty. Operand 6937 states and 23667 transitions. [2019-12-07 15:28:30,320 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 15:28:30,321 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:28:30,321 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:28:30,321 INFO L410 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:28:30,321 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:28:30,321 INFO L82 PathProgramCache]: Analyzing trace with hash 1084685323, now seen corresponding path program 1 times [2019-12-07 15:28:30,321 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:28:30,321 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [927522872] [2019-12-07 15:28:30,321 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:28:30,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:28:30,381 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:28:30,381 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [927522872] [2019-12-07 15:28:30,382 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:28:30,382 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:28:30,382 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1039748045] [2019-12-07 15:28:30,382 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 15:28:30,382 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:28:30,382 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 15:28:30,382 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 15:28:30,383 INFO L87 Difference]: Start difference. First operand 6937 states and 23667 transitions. Second operand 6 states. [2019-12-07 15:28:30,453 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:28:30,453 INFO L93 Difference]: Finished difference Result 2483 states and 7480 transitions. [2019-12-07 15:28:30,453 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 15:28:30,453 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-12-07 15:28:30,453 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:28:30,456 INFO L225 Difference]: With dead ends: 2483 [2019-12-07 15:28:30,456 INFO L226 Difference]: Without dead ends: 2110 [2019-12-07 15:28:30,456 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2019-12-07 15:28:30,461 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2110 states. [2019-12-07 15:28:30,479 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2110 to 2110. [2019-12-07 15:28:30,480 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2110 states. [2019-12-07 15:28:30,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2110 states to 2110 states and 6300 transitions. [2019-12-07 15:28:30,483 INFO L78 Accepts]: Start accepts. Automaton has 2110 states and 6300 transitions. Word has length 22 [2019-12-07 15:28:30,483 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:28:30,483 INFO L462 AbstractCegarLoop]: Abstraction has 2110 states and 6300 transitions. [2019-12-07 15:28:30,483 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 15:28:30,483 INFO L276 IsEmpty]: Start isEmpty. Operand 2110 states and 6300 transitions. [2019-12-07 15:28:30,485 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2019-12-07 15:28:30,486 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:28:30,486 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:28:30,486 INFO L410 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:28:30,486 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:28:30,486 INFO L82 PathProgramCache]: Analyzing trace with hash -244829385, now seen corresponding path program 1 times [2019-12-07 15:28:30,486 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:28:30,486 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [394263844] [2019-12-07 15:28:30,486 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:28:30,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:28:30,531 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:28:30,531 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [394263844] [2019-12-07 15:28:30,531 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:28:30,531 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:28:30,531 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [972473630] [2019-12-07 15:28:30,532 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:28:30,532 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:28:30,532 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:28:30,532 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:28:30,532 INFO L87 Difference]: Start difference. First operand 2110 states and 6300 transitions. Second operand 3 states. [2019-12-07 15:28:30,545 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:28:30,545 INFO L93 Difference]: Finished difference Result 2110 states and 6248 transitions. [2019-12-07 15:28:30,545 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:28:30,545 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 32 [2019-12-07 15:28:30,546 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:28:30,548 INFO L225 Difference]: With dead ends: 2110 [2019-12-07 15:28:30,548 INFO L226 Difference]: Without dead ends: 2110 [2019-12-07 15:28:30,548 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:28:30,553 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2110 states. [2019-12-07 15:28:30,570 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2110 to 2110. [2019-12-07 15:28:30,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2110 states. [2019-12-07 15:28:30,573 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2110 states to 2110 states and 6248 transitions. [2019-12-07 15:28:30,573 INFO L78 Accepts]: Start accepts. Automaton has 2110 states and 6248 transitions. Word has length 32 [2019-12-07 15:28:30,573 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:28:30,574 INFO L462 AbstractCegarLoop]: Abstraction has 2110 states and 6248 transitions. [2019-12-07 15:28:30,574 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:28:30,574 INFO L276 IsEmpty]: Start isEmpty. Operand 2110 states and 6248 transitions. [2019-12-07 15:28:30,576 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 15:28:30,576 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:28:30,576 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:28:30,576 INFO L410 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:28:30,576 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:28:30,577 INFO L82 PathProgramCache]: Analyzing trace with hash -2143148188, now seen corresponding path program 1 times [2019-12-07 15:28:30,577 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:28:30,577 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1287636771] [2019-12-07 15:28:30,577 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:28:30,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:28:30,639 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:28:30,639 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1287636771] [2019-12-07 15:28:30,639 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:28:30,640 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 15:28:30,640 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1337676341] [2019-12-07 15:28:30,640 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 15:28:30,640 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:28:30,640 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 15:28:30,640 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:28:30,640 INFO L87 Difference]: Start difference. First operand 2110 states and 6248 transitions. Second operand 7 states. [2019-12-07 15:28:30,723 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:28:30,723 INFO L93 Difference]: Finished difference Result 1462 states and 4574 transitions. [2019-12-07 15:28:30,723 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 15:28:30,723 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2019-12-07 15:28:30,723 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:28:30,725 INFO L225 Difference]: With dead ends: 1462 [2019-12-07 15:28:30,725 INFO L226 Difference]: Without dead ends: 1410 [2019-12-07 15:28:30,725 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=65, Unknown=0, NotChecked=0, Total=110 [2019-12-07 15:28:30,729 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1410 states. [2019-12-07 15:28:30,741 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1410 to 1410. [2019-12-07 15:28:30,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1410 states. [2019-12-07 15:28:30,743 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1410 states to 1410 states and 4448 transitions. [2019-12-07 15:28:30,744 INFO L78 Accepts]: Start accepts. Automaton has 1410 states and 4448 transitions. Word has length 33 [2019-12-07 15:28:30,744 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:28:30,744 INFO L462 AbstractCegarLoop]: Abstraction has 1410 states and 4448 transitions. [2019-12-07 15:28:30,744 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 15:28:30,744 INFO L276 IsEmpty]: Start isEmpty. Operand 1410 states and 4448 transitions. [2019-12-07 15:28:30,746 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-12-07 15:28:30,746 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:28:30,746 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:28:30,746 INFO L410 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:28:30,746 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:28:30,747 INFO L82 PathProgramCache]: Analyzing trace with hash -1362760326, now seen corresponding path program 1 times [2019-12-07 15:28:30,747 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:28:30,747 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1205754987] [2019-12-07 15:28:30,747 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:28:30,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:28:30,772 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:28:30,772 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1205754987] [2019-12-07 15:28:30,772 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:28:30,773 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:28:30,773 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1412959218] [2019-12-07 15:28:30,773 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:28:30,773 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:28:30,773 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:28:30,773 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:28:30,773 INFO L87 Difference]: Start difference. First operand 1410 states and 4448 transitions. Second operand 3 states. [2019-12-07 15:28:30,820 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:28:30,820 INFO L93 Difference]: Finished difference Result 2152 states and 6578 transitions. [2019-12-07 15:28:30,820 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:28:30,820 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 44 [2019-12-07 15:28:30,821 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:28:30,824 INFO L225 Difference]: With dead ends: 2152 [2019-12-07 15:28:30,824 INFO L226 Difference]: Without dead ends: 2152 [2019-12-07 15:28:30,824 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:28:30,830 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2152 states. [2019-12-07 15:28:30,859 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2152 to 1860. [2019-12-07 15:28:30,859 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1860 states. [2019-12-07 15:28:30,863 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1860 states to 1860 states and 5758 transitions. [2019-12-07 15:28:30,864 INFO L78 Accepts]: Start accepts. Automaton has 1860 states and 5758 transitions. Word has length 44 [2019-12-07 15:28:30,864 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:28:30,864 INFO L462 AbstractCegarLoop]: Abstraction has 1860 states and 5758 transitions. [2019-12-07 15:28:30,864 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:28:30,864 INFO L276 IsEmpty]: Start isEmpty. Operand 1860 states and 5758 transitions. [2019-12-07 15:28:30,868 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2019-12-07 15:28:30,868 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:28:30,868 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:28:30,868 INFO L410 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:28:30,868 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:28:30,868 INFO L82 PathProgramCache]: Analyzing trace with hash 761494872, now seen corresponding path program 1 times [2019-12-07 15:28:30,868 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:28:30,869 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1400674143] [2019-12-07 15:28:30,869 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:28:30,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:28:30,924 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:28:30,924 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1400674143] [2019-12-07 15:28:30,924 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:28:30,924 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:28:30,924 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [891664099] [2019-12-07 15:28:30,925 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:28:30,925 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:28:30,925 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:28:30,925 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:28:30,925 INFO L87 Difference]: Start difference. First operand 1860 states and 5758 transitions. Second operand 3 states. [2019-12-07 15:28:30,936 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:28:30,936 INFO L93 Difference]: Finished difference Result 1858 states and 5753 transitions. [2019-12-07 15:28:30,936 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:28:30,936 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 44 [2019-12-07 15:28:30,937 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:28:30,939 INFO L225 Difference]: With dead ends: 1858 [2019-12-07 15:28:30,939 INFO L226 Difference]: Without dead ends: 1858 [2019-12-07 15:28:30,939 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:28:30,943 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1858 states. [2019-12-07 15:28:30,959 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1858 to 1858. [2019-12-07 15:28:30,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1858 states. [2019-12-07 15:28:30,962 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1858 states to 1858 states and 5753 transitions. [2019-12-07 15:28:30,962 INFO L78 Accepts]: Start accepts. Automaton has 1858 states and 5753 transitions. Word has length 44 [2019-12-07 15:28:30,963 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:28:30,963 INFO L462 AbstractCegarLoop]: Abstraction has 1858 states and 5753 transitions. [2019-12-07 15:28:30,963 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:28:30,963 INFO L276 IsEmpty]: Start isEmpty. Operand 1858 states and 5753 transitions. [2019-12-07 15:28:30,965 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2019-12-07 15:28:30,965 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:28:30,965 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:28:30,965 INFO L410 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:28:30,965 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:28:30,966 INFO L82 PathProgramCache]: Analyzing trace with hash 2130278516, now seen corresponding path program 1 times [2019-12-07 15:28:30,966 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:28:30,966 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [830692914] [2019-12-07 15:28:30,966 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:28:30,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:28:31,008 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:28:31,009 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [830692914] [2019-12-07 15:28:31,009 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:28:31,009 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:28:31,009 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1669437679] [2019-12-07 15:28:31,009 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:28:31,009 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:28:31,010 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:28:31,010 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:28:31,010 INFO L87 Difference]: Start difference. First operand 1858 states and 5753 transitions. Second operand 3 states. [2019-12-07 15:28:31,020 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:28:31,020 INFO L93 Difference]: Finished difference Result 1798 states and 5501 transitions. [2019-12-07 15:28:31,020 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:28:31,020 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 45 [2019-12-07 15:28:31,020 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:28:31,022 INFO L225 Difference]: With dead ends: 1798 [2019-12-07 15:28:31,022 INFO L226 Difference]: Without dead ends: 1798 [2019-12-07 15:28:31,023 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:28:31,026 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1798 states. [2019-12-07 15:28:31,042 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1798 to 1798. [2019-12-07 15:28:31,042 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1798 states. [2019-12-07 15:28:31,045 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1798 states to 1798 states and 5501 transitions. [2019-12-07 15:28:31,045 INFO L78 Accepts]: Start accepts. Automaton has 1798 states and 5501 transitions. Word has length 45 [2019-12-07 15:28:31,045 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:28:31,045 INFO L462 AbstractCegarLoop]: Abstraction has 1798 states and 5501 transitions. [2019-12-07 15:28:31,045 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:28:31,045 INFO L276 IsEmpty]: Start isEmpty. Operand 1798 states and 5501 transitions. [2019-12-07 15:28:31,048 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2019-12-07 15:28:31,048 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:28:31,048 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:28:31,048 INFO L410 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:28:31,048 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:28:31,048 INFO L82 PathProgramCache]: Analyzing trace with hash 192616460, now seen corresponding path program 1 times [2019-12-07 15:28:31,048 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:28:31,048 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1900781999] [2019-12-07 15:28:31,048 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:28:31,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:28:31,139 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:28:31,139 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1900781999] [2019-12-07 15:28:31,139 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:28:31,139 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:28:31,139 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1349507331] [2019-12-07 15:28:31,139 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 15:28:31,140 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:28:31,140 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 15:28:31,140 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:28:31,140 INFO L87 Difference]: Start difference. First operand 1798 states and 5501 transitions. Second operand 7 states. [2019-12-07 15:28:31,253 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:28:31,253 INFO L93 Difference]: Finished difference Result 2653 states and 7268 transitions. [2019-12-07 15:28:31,253 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 15:28:31,253 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 46 [2019-12-07 15:28:31,253 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:28:31,255 INFO L225 Difference]: With dead ends: 2653 [2019-12-07 15:28:31,255 INFO L226 Difference]: Without dead ends: 1000 [2019-12-07 15:28:31,255 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=63, Invalid=147, Unknown=0, NotChecked=0, Total=210 [2019-12-07 15:28:31,257 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1000 states. [2019-12-07 15:28:31,264 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1000 to 1000. [2019-12-07 15:28:31,265 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1000 states. [2019-12-07 15:28:31,266 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1000 states to 1000 states and 2575 transitions. [2019-12-07 15:28:31,266 INFO L78 Accepts]: Start accepts. Automaton has 1000 states and 2575 transitions. Word has length 46 [2019-12-07 15:28:31,266 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:28:31,266 INFO L462 AbstractCegarLoop]: Abstraction has 1000 states and 2575 transitions. [2019-12-07 15:28:31,266 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 15:28:31,266 INFO L276 IsEmpty]: Start isEmpty. Operand 1000 states and 2575 transitions. [2019-12-07 15:28:31,267 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2019-12-07 15:28:31,267 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:28:31,267 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:28:31,268 INFO L410 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr3INUSE_VIOLATION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:28:31,268 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:28:31,268 INFO L82 PathProgramCache]: Analyzing trace with hash 933257892, now seen corresponding path program 2 times [2019-12-07 15:28:31,268 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:28:31,268 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1217965595] [2019-12-07 15:28:31,268 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:28:31,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 15:28:31,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 15:28:31,360 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 15:28:31,360 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 15:28:31,363 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] ULTIMATE.startENTRY-->L847: Formula: (let ((.cse1 (store |v_#valid_99| 0 0))) (let ((.cse0 (store .cse1 |v_~#a~0.base_137| 1))) (and (= 0 v_~a$w_buff1~0_71) (= 0 v_~__unbuffered_p0_EAX$w_buff0_used~0_8) (= 0 v_~__unbuffered_p0_EAX$r_buff1_thd4~0_9) (= 0 v_~a$w_buff1_used~0_265) (= 0 v_~__unbuffered_p0_EAX$r_buff1_thd3~0_9) (= 0 v_~a$read_delayed_var~0.base_7) (= |v_~#a~0.offset_137| 0) (= |v_#NULL.offset_6| 0) (= 0 v_~__unbuffered_p0_EAX$read_delayed~0_48) (= v_~a$flush_delayed~0_68 0) (= 0 v_~a$r_buff0_thd1~0_194) (< 0 |v_#StackHeapBarrier_32|) (= |v_#memory_int_243| (store |v_#memory_int_244| |v_ULTIMATE.start_main_~#t2725~0.base_21| (store (select |v_#memory_int_244| |v_ULTIMATE.start_main_~#t2725~0.base_21|) |v_ULTIMATE.start_main_~#t2725~0.offset_17| 0))) (= 0 v_~__unbuffered_p0_EAX$r_buff0_thd0~0_9) (< |v_#StackHeapBarrier_32| |v_~#a~0.base_137|) (= (store (store |v_#length_59| |v_~#a~0.base_137| 4) |v_ULTIMATE.start_main_~#t2725~0.base_21| 4) |v_#length_57|) (= v_~a$mem_tmp~0_33 0) (= 0 v_~a$r_buff1_thd3~0_7) (= v_~__unbuffered_cnt~0_200 0) (= 0 v_~weak$$choice1~0_29) (= 0 v_~__unbuffered_p0_EAX$r_buff1_thd0~0_8) (= 0 v_~weak$$choice0~0_24) (= 0 v_~a$r_buff1_thd4~0_91) (= 0 v_~__unbuffered_p1_EAX~0_47) (= v_~a$r_buff0_thd4~0_99 0) (= 0 v_~__unbuffered_p0_EAX$w_buff1~0_8) (= v_~y~0_58 0) (= 0 v_~__unbuffered_p0_EAX$r_buff0_thd2~0_9) (= v_~__unbuffered_p0_EAX$read_delayed_var~0.offset_34 0) (= (select (select |v_#memory_int_244| |v_~#a~0.base_137|) |v_~#a~0.offset_137|) 0) (= 0 v_~__unbuffered_p0_EAX$w_buff0~0_8) (= v_~__unbuffered_p0_EAX$flush_delayed~0_8 0) (= 0 v_~__unbuffered_p0_EAX$r_buff0_thd3~0_9) (= 0 v_~a$w_buff0~0_68) (= v_~a$r_buff0_thd2~0_8 0) (= 0 v_~__unbuffered_p3_EAX~0_31) (= 0 v_~__unbuffered_p0_EAX$w_buff1_used~0_9) (= 0 v_~a$r_buff1_thd0~0_69) (= 0 v_~__unbuffered_p0_EAX$read_delayed_var~0.base_34) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t2725~0.base_21|)) (= 0 v_~a$read_delayed~0_7) (= |v_ULTIMATE.start_main_~#t2725~0.offset_17| 0) (= v_~a$read_delayed_var~0.offset_7 0) (= 0 v_~__unbuffered_p0_EAX~0_60) (= v_~a$r_buff0_thd3~0_8 0) (= v_~main$tmp_guard1~0_26 0) (= v_~x~0_59 0) (= v_~a$r_buff0_thd0~0_86 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t2725~0.base_21| 1) |v_#valid_97|) (= 0 v_~__unbuffered_p0_EAX$r_buff1_thd1~0_8) (= 0 v_~__unbuffered_p2_EAX~0_53) (= 0 v_~__unbuffered_p0_EAX$r_buff0_thd4~0_9) (= 0 |v_#NULL.base_6|) (= v_~__unbuffered_p0_EAX$mem_tmp~0_9 0) (< |v_#StackHeapBarrier_32| |v_ULTIMATE.start_main_~#t2725~0.base_21|) (= v_~z~0_40 0) (= 0 v_~a$r_buff1_thd2~0_8) (= 0 v_~weak$$choice2~0_99) (= 0 v_~__unbuffered_p0_EAX$r_buff1_thd2~0_7) (= (select .cse1 |v_~#a~0.base_137|) 0) (= 0 v_~__unbuffered_p0_EAX$r_buff0_thd1~0_9) (= 0 v_~a$w_buff0_used~0_447) (= v_~main$tmp_guard0~0_37 0) (= 0 v_~a$r_buff1_thd1~0_126)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_32|, #valid=|v_#valid_99|, #memory_int=|v_#memory_int_244|, #length=|v_#length_59|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_8, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_28|, ~__unbuffered_p0_EAX$r_buff0_thd1~0=v_~__unbuffered_p0_EAX$r_buff0_thd1~0_9, #NULL.offset=|v_#NULL.offset_6|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_86, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_32|, ~a$r_buff0_thd4~0=v_~a$r_buff0_thd4~0_99, ~__unbuffered_p0_EAX$r_buff1_thd3~0=v_~__unbuffered_p0_EAX$r_buff1_thd3~0_9, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_151|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_40|, ~weak$$choice1~0=v_~weak$$choice1~0_29, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_60, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_47, ULTIMATE.start_main_~#t2727~0.offset=|v_ULTIMATE.start_main_~#t2727~0.offset_31|, ULTIMATE.start_main_~#t2728~0.base=|v_ULTIMATE.start_main_~#t2728~0.base_27|, ~__unbuffered_p0_EAX$r_buff0_thd4~0=v_~__unbuffered_p0_EAX$r_buff0_thd4~0_9, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_31, #length=|v_#length_57|, ULTIMATE.start_main_#t~nondet48=|v_ULTIMATE.start_main_#t~nondet48_33|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_53, ~__unbuffered_p0_EAX$w_buff1~0=v_~__unbuffered_p0_EAX$w_buff1~0_8, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_7, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_447, ~#a~0.base=|v_~#a~0.base_137|, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_194, ~__unbuffered_p0_EAX$r_buff0_thd0~0=v_~__unbuffered_p0_EAX$r_buff0_thd0~0_9, ~__unbuffered_p0_EAX$r_buff1_thd2~0=v_~__unbuffered_p0_EAX$r_buff1_thd2~0_7, ~__unbuffered_p0_EAX$w_buff1_used~0=v_~__unbuffered_p0_EAX$w_buff1_used~0_9, ~weak$$choice0~0=v_~weak$$choice0~0_24, #StackHeapBarrier=|v_#StackHeapBarrier_32|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_7, ULTIMATE.start_main_~#t2725~0.offset=|v_ULTIMATE.start_main_~#t2725~0.offset_17|, ~__unbuffered_p0_EAX$mem_tmp~0=v_~__unbuffered_p0_EAX$mem_tmp~0_9, ~a$w_buff0~0=v_~a$w_buff0~0_68, ~__unbuffered_p0_EAX$r_buff0_thd3~0=v_~__unbuffered_p0_EAX$r_buff0_thd3~0_9, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_8|, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_69, ~#a~0.offset=|v_~#a~0.offset_137|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_200, ULTIMATE.start_main_#t~mem49=|v_ULTIMATE.start_main_#t~mem49_33|, ~x~0=v_~x~0_59, ULTIMATE.start_main_~#t2727~0.base=|v_ULTIMATE.start_main_~#t2727~0.base_37|, ULTIMATE.start_main_#t~mem41=|v_ULTIMATE.start_main_#t~mem41_28|, ~a$read_delayed~0=v_~a$read_delayed~0_7, ULTIMATE.start_main_~#t2726~0.offset=|v_ULTIMATE.start_main_~#t2726~0.offset_16|, ~a$r_buff1_thd4~0=v_~a$r_buff1_thd4~0_91, ULTIMATE.start_main_~#t2726~0.base=|v_ULTIMATE.start_main_~#t2726~0.base_22|, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_8, ~__unbuffered_p0_EAX$w_buff0~0=v_~__unbuffered_p0_EAX$w_buff0~0_8, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_21|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_26, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_25|, ~__unbuffered_p0_EAX$r_buff1_thd1~0=v_~__unbuffered_p0_EAX$r_buff1_thd1~0_8, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_55|, ~a$mem_tmp~0=v_~a$mem_tmp~0_33, ~__unbuffered_p0_EAX$r_buff1_thd4~0=v_~__unbuffered_p0_EAX$r_buff1_thd4~0_9, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_51|, ~a$w_buff1~0=v_~a$w_buff1~0_71, ~__unbuffered_p0_EAX$flush_delayed~0=v_~__unbuffered_p0_EAX$flush_delayed~0_8, ~__unbuffered_p0_EAX$read_delayed~0=v_~__unbuffered_p0_EAX$read_delayed~0_48, ~y~0=v_~y~0_58, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_16|, ULTIMATE.start_main_~#t2728~0.offset=|v_ULTIMATE.start_main_~#t2728~0.offset_22|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_126, ULTIMATE.start_main_~#t2725~0.base=|v_ULTIMATE.start_main_~#t2725~0.base_21|, ~__unbuffered_p0_EAX$w_buff0_used~0=v_~__unbuffered_p0_EAX$w_buff0_used~0_8, ~__unbuffered_p0_EAX$r_buff0_thd2~0=v_~__unbuffered_p0_EAX$r_buff0_thd2~0_9, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_8, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_37, ~__unbuffered_p0_EAX$read_delayed_var~0.base=v_~__unbuffered_p0_EAX$read_delayed_var~0.base_34, #NULL.base=|v_#NULL.base_6|, ~__unbuffered_p0_EAX$r_buff1_thd0~0=v_~__unbuffered_p0_EAX$r_buff1_thd0~0_8, ~a$flush_delayed~0=v_~a$flush_delayed~0_68, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, #valid=|v_#valid_97|, #memory_int=|v_#memory_int_243|, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=v_~__unbuffered_p0_EAX$read_delayed_var~0.offset_34, ULTIMATE.start_main_#t~nondet37=|v_ULTIMATE.start_main_#t~nondet37_7|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_15|, ~z~0=v_~z~0_40, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_265, ~weak$$choice2~0=v_~weak$$choice2~0_99, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_7} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, ~__unbuffered_p0_EAX$r_buff0_thd1~0, #NULL.offset, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ~a$r_buff0_thd4~0, ~__unbuffered_p0_EAX$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ~weak$$choice1~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t2727~0.offset, ULTIMATE.start_main_~#t2728~0.base, ~__unbuffered_p0_EAX$r_buff0_thd4~0, ~__unbuffered_p3_EAX~0, #length, ULTIMATE.start_main_#t~nondet48, ~__unbuffered_p2_EAX~0, ~__unbuffered_p0_EAX$w_buff1~0, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~#a~0.base, ~a$r_buff0_thd1~0, ~__unbuffered_p0_EAX$r_buff0_thd0~0, ~__unbuffered_p0_EAX$r_buff1_thd2~0, ~__unbuffered_p0_EAX$w_buff1_used~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ULTIMATE.start_main_~#t2725~0.offset, ~__unbuffered_p0_EAX$mem_tmp~0, ~a$w_buff0~0, ~__unbuffered_p0_EAX$r_buff0_thd3~0, ULTIMATE.start_main_#t~nondet38, ~a$r_buff1_thd0~0, ~#a~0.offset, ~__unbuffered_cnt~0, ULTIMATE.start_main_#t~mem49, ~x~0, ULTIMATE.start_main_~#t2727~0.base, ULTIMATE.start_main_#t~mem41, ~a$read_delayed~0, ULTIMATE.start_main_~#t2726~0.offset, ~a$r_buff1_thd4~0, ULTIMATE.start_main_~#t2726~0.base, ~a$r_buff0_thd2~0, ~__unbuffered_p0_EAX$w_buff0~0, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite42, ~__unbuffered_p0_EAX$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite44, ~a$mem_tmp~0, ~__unbuffered_p0_EAX$r_buff1_thd4~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~__unbuffered_p0_EAX$flush_delayed~0, ~__unbuffered_p0_EAX$read_delayed~0, ~y~0, ULTIMATE.start_main_#t~nondet40, ULTIMATE.start_main_~#t2728~0.offset, ~a$r_buff1_thd1~0, ULTIMATE.start_main_~#t2725~0.base, ~__unbuffered_p0_EAX$w_buff0_used~0, ~__unbuffered_p0_EAX$r_buff0_thd2~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, ~__unbuffered_p0_EAX$read_delayed_var~0.base, #NULL.base, ~__unbuffered_p0_EAX$r_buff1_thd0~0, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~__unbuffered_p0_EAX$read_delayed_var~0.offset, ULTIMATE.start_main_#t~nondet37, ULTIMATE.start_main_#t~nondet39, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 15:28:31,365 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [710] [710] L763-->L764: Formula: (and (= v_~a$w_buff0~0_17 v_~a$w_buff0~0_16) (not (= (mod v_~weak$$choice2~0_23 256) 0))) InVars {~a$w_buff0~0=v_~a$w_buff0~0_17, ~weak$$choice2~0=v_~weak$$choice2~0_23} OutVars{P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_7|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_7|, ~a$w_buff0~0=v_~a$w_buff0~0_16, ~weak$$choice2~0=v_~weak$$choice2~0_23, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_9|} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite10, P0Thread1of1ForFork1_#t~ite9, ~a$w_buff0~0, P0Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 15:28:31,365 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L847-1-->L849: Formula: (and (= |v_#length_27| (store |v_#length_28| |v_ULTIMATE.start_main_~#t2726~0.base_12| 4)) (= (store |v_#memory_int_138| |v_ULTIMATE.start_main_~#t2726~0.base_12| (store (select |v_#memory_int_138| |v_ULTIMATE.start_main_~#t2726~0.base_12|) |v_ULTIMATE.start_main_~#t2726~0.offset_10| 1)) |v_#memory_int_137|) (= |v_ULTIMATE.start_main_~#t2726~0.offset_10| 0) (= (select |v_#valid_51| |v_ULTIMATE.start_main_~#t2726~0.base_12|) 0) (= (store |v_#valid_51| |v_ULTIMATE.start_main_~#t2726~0.base_12| 1) |v_#valid_50|) (< |v_#StackHeapBarrier_16| |v_ULTIMATE.start_main_~#t2726~0.base_12|) (not (= |v_ULTIMATE.start_main_~#t2726~0.base_12| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_16|, #valid=|v_#valid_51|, #memory_int=|v_#memory_int_138|, #length=|v_#length_28|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_16|, ULTIMATE.start_main_~#t2726~0.offset=|v_ULTIMATE.start_main_~#t2726~0.offset_10|, ULTIMATE.start_main_~#t2726~0.base=|v_ULTIMATE.start_main_~#t2726~0.base_12|, #valid=|v_#valid_50|, #memory_int=|v_#memory_int_137|, ULTIMATE.start_main_#t~nondet37=|v_ULTIMATE.start_main_#t~nondet37_5|, #length=|v_#length_27|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2726~0.offset, ULTIMATE.start_main_~#t2726~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet37, #length] because there is no mapped edge [2019-12-07 15:28:31,366 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [734] [734] L764-->L765: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_30 256))) (= v_~a$w_buff1~0_20 v_~a$w_buff1~0_19)) InVars {~a$w_buff1~0=v_~a$w_buff1~0_20, ~weak$$choice2~0=v_~weak$$choice2~0_30} OutVars{~a$w_buff1~0=v_~a$w_buff1~0_19, P0Thread1of1ForFork1_#t~ite14=|v_P0Thread1of1ForFork1_#t~ite14_6|, ~weak$$choice2~0=v_~weak$$choice2~0_30, P0Thread1of1ForFork1_#t~ite13=|v_P0Thread1of1ForFork1_#t~ite13_7|, P0Thread1of1ForFork1_#t~ite12=|v_P0Thread1of1ForFork1_#t~ite12_6|} AuxVars[] AssignedVars[~a$w_buff1~0, P0Thread1of1ForFork1_#t~ite14, P0Thread1of1ForFork1_#t~ite13, P0Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 15:28:31,366 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [811] [811] L765-->L765-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1994303936 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite16_Out1994303936| ~a$w_buff0_used~0_In1994303936) (= |P0Thread1of1ForFork1_#t~ite16_Out1994303936| |P0Thread1of1ForFork1_#t~ite17_Out1994303936|) .cse0 (let ((.cse1 (= (mod ~a$r_buff0_thd1~0_In1994303936 256) 0))) (or (and (= 0 (mod ~a$r_buff1_thd1~0_In1994303936 256)) .cse1) (and (= (mod ~a$w_buff1_used~0_In1994303936 256) 0) .cse1) (= (mod ~a$w_buff0_used~0_In1994303936 256) 0)))) (and (= |P0Thread1of1ForFork1_#t~ite17_Out1994303936| ~a$w_buff0_used~0_In1994303936) (not .cse0) (= |P0Thread1of1ForFork1_#t~ite16_In1994303936| |P0Thread1of1ForFork1_#t~ite16_Out1994303936|)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1994303936, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1994303936, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1994303936, P0Thread1of1ForFork1_#t~ite16=|P0Thread1of1ForFork1_#t~ite16_In1994303936|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1994303936, ~weak$$choice2~0=~weak$$choice2~0_In1994303936} OutVars{~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1994303936, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1994303936, P0Thread1of1ForFork1_#t~ite17=|P0Thread1of1ForFork1_#t~ite17_Out1994303936|, P0Thread1of1ForFork1_#t~ite16=|P0Thread1of1ForFork1_#t~ite16_Out1994303936|, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1994303936, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1994303936, ~weak$$choice2~0=~weak$$choice2~0_In1994303936} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite17, P0Thread1of1ForFork1_#t~ite16] because there is no mapped edge [2019-12-07 15:28:31,366 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [812] [812] L766-->L766-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-343227259 256)))) (or (and (= |P0Thread1of1ForFork1_#t~ite20_Out-343227259| ~a$w_buff1_used~0_In-343227259) (not .cse0) (= |P0Thread1of1ForFork1_#t~ite19_In-343227259| |P0Thread1of1ForFork1_#t~ite19_Out-343227259|)) (and (let ((.cse1 (= (mod ~a$r_buff0_thd1~0_In-343227259 256) 0))) (or (= 0 (mod ~a$w_buff0_used~0_In-343227259 256)) (and (= 0 (mod ~a$r_buff1_thd1~0_In-343227259 256)) .cse1) (and (= (mod ~a$w_buff1_used~0_In-343227259 256) 0) .cse1))) (= |P0Thread1of1ForFork1_#t~ite19_Out-343227259| ~a$w_buff1_used~0_In-343227259) .cse0 (= |P0Thread1of1ForFork1_#t~ite20_Out-343227259| |P0Thread1of1ForFork1_#t~ite19_Out-343227259|)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-343227259, P0Thread1of1ForFork1_#t~ite19=|P0Thread1of1ForFork1_#t~ite19_In-343227259|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-343227259, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-343227259, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-343227259, ~weak$$choice2~0=~weak$$choice2~0_In-343227259} OutVars{P0Thread1of1ForFork1_#t~ite20=|P0Thread1of1ForFork1_#t~ite20_Out-343227259|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-343227259, P0Thread1of1ForFork1_#t~ite19=|P0Thread1of1ForFork1_#t~ite19_Out-343227259|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-343227259, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-343227259, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-343227259, ~weak$$choice2~0=~weak$$choice2~0_In-343227259} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite20, P0Thread1of1ForFork1_#t~ite19] because there is no mapped edge [2019-12-07 15:28:31,367 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [813] [813] L767-->L768: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff0_thd1~0_In-1356164905 256))) (.cse1 (= ~a$r_buff0_thd1~0_In-1356164905 ~a$r_buff0_thd1~0_Out-1356164905)) (.cse0 (= 0 (mod ~weak$$choice2~0_In-1356164905 256)))) (or (and (not .cse0) .cse1) (and .cse1 (= (mod ~a$w_buff0_used~0_In-1356164905 256) 0) .cse0) (and .cse2 .cse1 (= (mod ~a$w_buff1_used~0_In-1356164905 256) 0) .cse0) (and .cse2 (= (mod ~a$r_buff1_thd1~0_In-1356164905 256) 0) .cse1 .cse0))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1356164905, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1356164905, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1356164905, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1356164905, ~weak$$choice2~0=~weak$$choice2~0_In-1356164905} OutVars{P0Thread1of1ForFork1_#t~ite21=|P0Thread1of1ForFork1_#t~ite21_Out-1356164905|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1356164905, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1356164905, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-1356164905, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1356164905, ~weak$$choice2~0=~weak$$choice2~0_In-1356164905, P0Thread1of1ForFork1_#t~ite23=|P0Thread1of1ForFork1_#t~ite23_Out-1356164905|, P0Thread1of1ForFork1_#t~ite22=|P0Thread1of1ForFork1_#t~ite22_Out-1356164905|} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite21, ~a$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite23, P0Thread1of1ForFork1_#t~ite22] because there is no mapped edge [2019-12-07 15:28:31,367 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [744] [744] L768-->L772: Formula: (and (= 1 v_~__unbuffered_p0_EAX$read_delayed~0_16) (= (select (select |v_#memory_int_76| |v_~#a~0.base_42|) |v_~#a~0.offset_42|) v_~__unbuffered_p0_EAX~0_18) (not (= 0 (mod v_~weak$$choice2~0_33 256))) (= v_~a$r_buff1_thd1~0_46 v_~a$r_buff1_thd1~0_45) (= |v_~#a~0.offset_42| v_~__unbuffered_p0_EAX$read_delayed_var~0.offset_12) (= |v_~#a~0.base_42| v_~__unbuffered_p0_EAX$read_delayed_var~0.base_12)) InVars {~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_46, #memory_int=|v_#memory_int_76|, ~#a~0.base=|v_~#a~0.base_42|, ~#a~0.offset=|v_~#a~0.offset_42|, ~weak$$choice2~0=v_~weak$$choice2~0_33} OutVars{P0Thread1of1ForFork1_#t~ite25=|v_P0Thread1of1ForFork1_#t~ite25_14|, P0Thread1of1ForFork1_#t~ite26=|v_P0Thread1of1ForFork1_#t~ite26_17|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_45, ~#a~0.base=|v_~#a~0.base_42|, ~__unbuffered_p0_EAX$read_delayed_var~0.base=v_~__unbuffered_p0_EAX$read_delayed_var~0.base_12, P0Thread1of1ForFork1_#t~mem27=|v_P0Thread1of1ForFork1_#t~mem27_8|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_18, #memory_int=|v_#memory_int_76|, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=v_~__unbuffered_p0_EAX$read_delayed_var~0.offset_12, ~#a~0.offset=|v_~#a~0.offset_42|, ~__unbuffered_p0_EAX$read_delayed~0=v_~__unbuffered_p0_EAX$read_delayed~0_16, ~weak$$choice2~0=v_~weak$$choice2~0_33, P0Thread1of1ForFork1_#t~ite24=|v_P0Thread1of1ForFork1_#t~ite24_17|} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~mem27, ~__unbuffered_p0_EAX~0, P0Thread1of1ForFork1_#t~ite25, P0Thread1of1ForFork1_#t~ite26, ~a$r_buff1_thd1~0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset, ~__unbuffered_p0_EAX$read_delayed~0, P0Thread1of1ForFork1_#t~ite24, ~__unbuffered_p0_EAX$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 15:28:31,367 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L772-->L783: Formula: (and (= (store |v_#memory_int_51| |v_~#a~0.base_26| (store (select |v_#memory_int_51| |v_~#a~0.base_26|) |v_~#a~0.offset_26| v_~a$mem_tmp~0_6)) |v_#memory_int_50|) (= v_~a$flush_delayed~0_12 0) (= (+ v_~__unbuffered_cnt~0_49 1) v_~__unbuffered_cnt~0_48) (= v_~x~0_13 1) (not (= (mod v_~a$flush_delayed~0_13 256) 0))) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_13, #memory_int=|v_#memory_int_51|, ~#a~0.base=|v_~#a~0.base_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49, ~#a~0.offset=|v_~#a~0.offset_26|} OutVars{P0Thread1of1ForFork1_#t~mem28=|v_P0Thread1of1ForFork1_#t~mem28_7|, ~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_12, P0Thread1of1ForFork1_#t~ite29=|v_P0Thread1of1ForFork1_#t~ite29_13|, #memory_int=|v_#memory_int_50|, ~#a~0.base=|v_~#a~0.base_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, ~#a~0.offset=|v_~#a~0.offset_26|, ~x~0=v_~x~0_13} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~mem28, ~a$flush_delayed~0, P0Thread1of1ForFork1_#t~ite29, #memory_int, ~__unbuffered_cnt~0, ~x~0] because there is no mapped edge [2019-12-07 15:28:31,367 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] P1ENTRY-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~x~0_29 v_~__unbuffered_p1_EAX~0_20) (= |v_P1Thread1of1ForFork2_#in~arg.offset_14| v_P1Thread1of1ForFork2_~arg.offset_12) (= |v_P1Thread1of1ForFork2_#in~arg.base_14| v_P1Thread1of1ForFork2_~arg.base_12) (= v_~__unbuffered_cnt~0_94 (+ v_~__unbuffered_cnt~0_95 1)) (= v_~y~0_27 1)) InVars {P1Thread1of1ForFork2_#in~arg.base=|v_P1Thread1of1ForFork2_#in~arg.base_14|, P1Thread1of1ForFork2_#in~arg.offset=|v_P1Thread1of1ForFork2_#in~arg.offset_14|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_95, ~x~0=v_~x~0_29} OutVars{P1Thread1of1ForFork2_#in~arg.base=|v_P1Thread1of1ForFork2_#in~arg.base_14|, P1Thread1of1ForFork2_~arg.offset=v_P1Thread1of1ForFork2_~arg.offset_12, P1Thread1of1ForFork2_~arg.base=v_P1Thread1of1ForFork2_~arg.base_12, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_20, P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, P1Thread1of1ForFork2_#in~arg.offset=|v_P1Thread1of1ForFork2_#in~arg.offset_14|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_94, ~y~0=v_~y~0_27, ~x~0=v_~x~0_29, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_~arg.offset, P1Thread1of1ForFork2_~arg.base, ~__unbuffered_p1_EAX~0, P1Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, ~y~0, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 15:28:31,367 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] L849-1-->L851: Formula: (and (= 0 (select |v_#valid_53| |v_ULTIMATE.start_main_~#t2727~0.base_21|)) (= (store |v_#valid_53| |v_ULTIMATE.start_main_~#t2727~0.base_21| 1) |v_#valid_52|) (= |v_#memory_int_149| (store |v_#memory_int_150| |v_ULTIMATE.start_main_~#t2727~0.base_21| (store (select |v_#memory_int_150| |v_ULTIMATE.start_main_~#t2727~0.base_21|) |v_ULTIMATE.start_main_~#t2727~0.offset_19| 2))) (= |v_ULTIMATE.start_main_~#t2727~0.offset_19| 0) (= (store |v_#length_30| |v_ULTIMATE.start_main_~#t2727~0.base_21| 4) |v_#length_29|) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t2727~0.base_21|) (not (= 0 |v_ULTIMATE.start_main_~#t2727~0.base_21|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_53|, #memory_int=|v_#memory_int_150|, #length=|v_#length_30|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_~#t2727~0.offset=|v_ULTIMATE.start_main_~#t2727~0.offset_19|, #valid=|v_#valid_52|, #memory_int=|v_#memory_int_149|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_6|, #length=|v_#length_29|, ULTIMATE.start_main_~#t2727~0.base=|v_ULTIMATE.start_main_~#t2727~0.base_21|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2727~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length, ULTIMATE.start_main_~#t2727~0.base] because there is no mapped edge [2019-12-07 15:28:31,368 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [769] [769] P2ENTRY-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork3_#res.base_7|) (= |v_P2Thread1of1ForFork3_#in~arg.offset_15| v_P2Thread1of1ForFork3_~arg.offset_13) (= |v_P2Thread1of1ForFork3_#res.offset_7| 0) (= v_P2Thread1of1ForFork3_~arg.base_13 |v_P2Thread1of1ForFork3_#in~arg.base_15|) (= v_~y~0_20 v_~__unbuffered_p2_EAX~0_19) (= (+ v_~__unbuffered_cnt~0_67 1) v_~__unbuffered_cnt~0_66) (= v_~z~0_18 1)) InVars {P2Thread1of1ForFork3_#in~arg.base=|v_P2Thread1of1ForFork3_#in~arg.base_15|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67, ~y~0=v_~y~0_20, P2Thread1of1ForFork3_#in~arg.offset=|v_P2Thread1of1ForFork3_#in~arg.offset_15|} OutVars{P2Thread1of1ForFork3_~arg.base=v_P2Thread1of1ForFork3_~arg.base_13, P2Thread1of1ForFork3_#in~arg.base=|v_P2Thread1of1ForFork3_#in~arg.base_15|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_19, P2Thread1of1ForFork3_~arg.offset=v_P2Thread1of1ForFork3_~arg.offset_13, P2Thread1of1ForFork3_#res.base=|v_P2Thread1of1ForFork3_#res.base_7|, ~z~0=v_~z~0_18, P2Thread1of1ForFork3_#res.offset=|v_P2Thread1of1ForFork3_#res.offset_7|, ~y~0=v_~y~0_20, P2Thread1of1ForFork3_#in~arg.offset=|v_P2Thread1of1ForFork3_#in~arg.offset_15|} AuxVars[] AssignedVars[P2Thread1of1ForFork3_~arg.base, ~__unbuffered_cnt~0, ~__unbuffered_p2_EAX~0, P2Thread1of1ForFork3_~arg.offset, P2Thread1of1ForFork3_#res.base, ~z~0, P2Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 15:28:31,368 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L851-1-->L853: Formula: (and (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t2728~0.base_11| 4)) (= 0 (select |v_#valid_49| |v_ULTIMATE.start_main_~#t2728~0.base_11|)) (= |v_#memory_int_135| (store |v_#memory_int_136| |v_ULTIMATE.start_main_~#t2728~0.base_11| (store (select |v_#memory_int_136| |v_ULTIMATE.start_main_~#t2728~0.base_11|) |v_ULTIMATE.start_main_~#t2728~0.offset_10| 3))) (= |v_#valid_48| (store |v_#valid_49| |v_ULTIMATE.start_main_~#t2728~0.base_11| 1)) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t2728~0.base_11|) (not (= 0 |v_ULTIMATE.start_main_~#t2728~0.base_11|)) (= |v_ULTIMATE.start_main_~#t2728~0.offset_10| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_49|, #memory_int=|v_#memory_int_136|, #length=|v_#length_26|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_~#t2728~0.offset=|v_ULTIMATE.start_main_~#t2728~0.offset_10|, ULTIMATE.start_main_~#t2728~0.base=|v_ULTIMATE.start_main_~#t2728~0.base_11|, #valid=|v_#valid_48|, #memory_int=|v_#memory_int_135|, #length=|v_#length_25|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2728~0.offset, ULTIMATE.start_main_~#t2728~0.base, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet39] because there is no mapped edge [2019-12-07 15:28:31,369 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] L824-2-->L824-4: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In-1945436983 256))) (.cse1 (= (mod ~a$r_buff1_thd4~0_In-1945436983 256) 0))) (or (and (= |P3Thread1of1ForFork0_#t~mem30_In-1945436983| |P3Thread1of1ForFork0_#t~mem30_Out-1945436983|) (not .cse0) (not .cse1) (= ~a$w_buff1~0_In-1945436983 |P3Thread1of1ForFork0_#t~ite31_Out-1945436983|)) (and (= |P3Thread1of1ForFork0_#t~mem30_Out-1945436983| (select (select |#memory_int_In-1945436983| |~#a~0.base_In-1945436983|) |~#a~0.offset_In-1945436983|)) (or .cse0 .cse1) (= |P3Thread1of1ForFork0_#t~mem30_Out-1945436983| |P3Thread1of1ForFork0_#t~ite31_Out-1945436983|)))) InVars {~a$w_buff1~0=~a$w_buff1~0_In-1945436983, ~a$r_buff1_thd4~0=~a$r_buff1_thd4~0_In-1945436983, #memory_int=|#memory_int_In-1945436983|, ~#a~0.base=|~#a~0.base_In-1945436983|, ~#a~0.offset=|~#a~0.offset_In-1945436983|, P3Thread1of1ForFork0_#t~mem30=|P3Thread1of1ForFork0_#t~mem30_In-1945436983|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1945436983} OutVars{~a$w_buff1~0=~a$w_buff1~0_In-1945436983, ~a$r_buff1_thd4~0=~a$r_buff1_thd4~0_In-1945436983, #memory_int=|#memory_int_In-1945436983|, ~#a~0.base=|~#a~0.base_In-1945436983|, P3Thread1of1ForFork0_#t~mem30=|P3Thread1of1ForFork0_#t~mem30_Out-1945436983|, ~#a~0.offset=|~#a~0.offset_In-1945436983|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1945436983, P3Thread1of1ForFork0_#t~ite31=|P3Thread1of1ForFork0_#t~ite31_Out-1945436983|} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~mem30, P3Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 15:28:31,369 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [707] [707] L824-4-->L825: Formula: (= (store |v_#memory_int_38| |v_~#a~0.base_20| (store (select |v_#memory_int_38| |v_~#a~0.base_20|) |v_~#a~0.offset_20| |v_P3Thread1of1ForFork0_#t~ite31_8|)) |v_#memory_int_37|) InVars {#memory_int=|v_#memory_int_38|, ~#a~0.base=|v_~#a~0.base_20|, ~#a~0.offset=|v_~#a~0.offset_20|, P3Thread1of1ForFork0_#t~ite31=|v_P3Thread1of1ForFork0_#t~ite31_8|} OutVars{#memory_int=|v_#memory_int_37|, ~#a~0.base=|v_~#a~0.base_20|, P3Thread1of1ForFork0_#t~mem30=|v_P3Thread1of1ForFork0_#t~mem30_3|, ~#a~0.offset=|v_~#a~0.offset_20|, P3Thread1of1ForFork0_#t~ite32=|v_P3Thread1of1ForFork0_#t~ite32_5|, P3Thread1of1ForFork0_#t~ite31=|v_P3Thread1of1ForFork0_#t~ite31_7|} AuxVars[] AssignedVars[#memory_int, P3Thread1of1ForFork0_#t~mem30, P3Thread1of1ForFork0_#t~ite32, P3Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 15:28:31,369 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [754] [754] L825-->L825-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In42448830 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd4~0_In42448830 256) 0))) (or (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In42448830 |P3Thread1of1ForFork0_#t~ite33_Out42448830|)) (and (= 0 |P3Thread1of1ForFork0_#t~ite33_Out42448830|) (not .cse1) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In42448830, ~a$r_buff0_thd4~0=~a$r_buff0_thd4~0_In42448830} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In42448830, P3Thread1of1ForFork0_#t~ite33=|P3Thread1of1ForFork0_#t~ite33_Out42448830|, ~a$r_buff0_thd4~0=~a$r_buff0_thd4~0_In42448830} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite33] because there is no mapped edge [2019-12-07 15:28:31,370 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L826-->L826-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff1_used~0_In556857188 256))) (.cse0 (= (mod ~a$r_buff1_thd4~0_In556857188 256) 0)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In556857188 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd4~0_In556857188 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~a$w_buff1_used~0_In556857188 |P3Thread1of1ForFork0_#t~ite34_Out556857188|)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |P3Thread1of1ForFork0_#t~ite34_Out556857188|)))) InVars {~a$r_buff1_thd4~0=~a$r_buff1_thd4~0_In556857188, ~a$w_buff0_used~0=~a$w_buff0_used~0_In556857188, ~a$w_buff1_used~0=~a$w_buff1_used~0_In556857188, ~a$r_buff0_thd4~0=~a$r_buff0_thd4~0_In556857188} OutVars{~a$r_buff1_thd4~0=~a$r_buff1_thd4~0_In556857188, ~a$w_buff0_used~0=~a$w_buff0_used~0_In556857188, ~a$w_buff1_used~0=~a$w_buff1_used~0_In556857188, P3Thread1of1ForFork0_#t~ite34=|P3Thread1of1ForFork0_#t~ite34_Out556857188|, ~a$r_buff0_thd4~0=~a$r_buff0_thd4~0_In556857188} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite34] because there is no mapped edge [2019-12-07 15:28:31,371 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L827-->L828: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In689926640 256) 0)) (.cse2 (= ~a$r_buff0_thd4~0_In689926640 ~a$r_buff0_thd4~0_Out689926640)) (.cse1 (= (mod ~a$r_buff0_thd4~0_In689926640 256) 0))) (or (and (not .cse0) (= 0 ~a$r_buff0_thd4~0_Out689926640) (not .cse1)) (and .cse2 .cse0) (and .cse2 .cse1))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In689926640, ~a$r_buff0_thd4~0=~a$r_buff0_thd4~0_In689926640} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In689926640, P3Thread1of1ForFork0_#t~ite35=|P3Thread1of1ForFork0_#t~ite35_Out689926640|, ~a$r_buff0_thd4~0=~a$r_buff0_thd4~0_Out689926640} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite35, ~a$r_buff0_thd4~0] because there is no mapped edge [2019-12-07 15:28:31,371 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [751] [751] L828-->L828-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-372639813 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd4~0_In-372639813 256) 0)) (.cse2 (= (mod ~a$r_buff1_thd4~0_In-372639813 256) 0)) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In-372639813 256)))) (or (and (or .cse0 .cse1) (= ~a$r_buff1_thd4~0_In-372639813 |P3Thread1of1ForFork0_#t~ite36_Out-372639813|) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P3Thread1of1ForFork0_#t~ite36_Out-372639813| 0)))) InVars {~a$r_buff1_thd4~0=~a$r_buff1_thd4~0_In-372639813, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-372639813, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-372639813, ~a$r_buff0_thd4~0=~a$r_buff0_thd4~0_In-372639813} OutVars{~a$r_buff1_thd4~0=~a$r_buff1_thd4~0_In-372639813, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-372639813, P3Thread1of1ForFork0_#t~ite36=|P3Thread1of1ForFork0_#t~ite36_Out-372639813|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-372639813, ~a$r_buff0_thd4~0=~a$r_buff0_thd4~0_In-372639813} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite36] because there is no mapped edge [2019-12-07 15:28:31,371 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L828-2-->P3EXIT: Formula: (and (= v_~a$r_buff1_thd4~0_64 |v_P3Thread1of1ForFork0_#t~ite36_58|) (= |v_P3Thread1of1ForFork0_#res.base_3| 0) (= 0 |v_P3Thread1of1ForFork0_#res.offset_3|) (= v_~__unbuffered_cnt~0_136 (+ v_~__unbuffered_cnt~0_137 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_137, P3Thread1of1ForFork0_#t~ite36=|v_P3Thread1of1ForFork0_#t~ite36_58|} OutVars{~a$r_buff1_thd4~0=v_~a$r_buff1_thd4~0_64, P3Thread1of1ForFork0_#res.offset=|v_P3Thread1of1ForFork0_#res.offset_3|, P3Thread1of1ForFork0_#res.base=|v_P3Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_136, P3Thread1of1ForFork0_#t~ite36=|v_P3Thread1of1ForFork0_#t~ite36_57|} AuxVars[] AssignedVars[~a$r_buff1_thd4~0, P3Thread1of1ForFork0_#res.offset, P3Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork0_#t~ite36] because there is no mapped edge [2019-12-07 15:28:31,371 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L857-->L859-2: Formula: (and (or (= 0 (mod v_~a$r_buff0_thd0~0_23 256)) (= 0 (mod v_~a$w_buff0_used~0_75 256))) (not (= 0 (mod v_~main$tmp_guard0~0_5 256)))) InVars {~a$w_buff0_used~0=v_~a$w_buff0_used~0_75, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_23, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5} OutVars{~a$w_buff0_used~0=v_~a$w_buff0_used~0_75, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_23, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 15:28:31,372 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L859-2-->L859-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite43_Out-1997062575| |ULTIMATE.start_main_#t~ite42_Out-1997062575|)) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In-1997062575 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In-1997062575 256)))) (or (and (= |ULTIMATE.start_main_#t~mem41_Out-1997062575| |ULTIMATE.start_main_#t~ite42_Out-1997062575|) .cse0 (or .cse1 .cse2) (= |ULTIMATE.start_main_#t~mem41_Out-1997062575| (select (select |#memory_int_In-1997062575| |~#a~0.base_In-1997062575|) |~#a~0.offset_In-1997062575|))) (and .cse0 (not .cse2) (= |ULTIMATE.start_main_#t~ite42_Out-1997062575| ~a$w_buff1~0_In-1997062575) (not .cse1) (= |ULTIMATE.start_main_#t~mem41_In-1997062575| |ULTIMATE.start_main_#t~mem41_Out-1997062575|)))) InVars {~a$w_buff1~0=~a$w_buff1~0_In-1997062575, ULTIMATE.start_main_#t~mem41=|ULTIMATE.start_main_#t~mem41_In-1997062575|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1997062575, #memory_int=|#memory_int_In-1997062575|, ~#a~0.base=|~#a~0.base_In-1997062575|, ~#a~0.offset=|~#a~0.offset_In-1997062575|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1997062575} OutVars{~a$w_buff1~0=~a$w_buff1~0_In-1997062575, ULTIMATE.start_main_#t~mem41=|ULTIMATE.start_main_#t~mem41_Out-1997062575|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1997062575, #memory_int=|#memory_int_In-1997062575|, ~#a~0.base=|~#a~0.base_In-1997062575|, ~#a~0.offset=|~#a~0.offset_In-1997062575|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1997062575, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out-1997062575|, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out-1997062575|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem41, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 15:28:31,372 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L860-->L860-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In655280818 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In655280818 256)))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite44_Out655280818|)) (and (or .cse1 .cse0) (= ~a$w_buff0_used~0_In655280818 |ULTIMATE.start_main_#t~ite44_Out655280818|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In655280818, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In655280818} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In655280818, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In655280818, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out655280818|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 15:28:31,373 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L861-->L861-2: Formula: (let ((.cse3 (= (mod ~a$r_buff1_thd0~0_In-1122202244 256) 0)) (.cse2 (= (mod ~a$w_buff1_used~0_In-1122202244 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In-1122202244 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In-1122202244 256)))) (or (and (or .cse0 .cse1) (= ~a$w_buff1_used~0_In-1122202244 |ULTIMATE.start_main_#t~ite45_Out-1122202244|) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |ULTIMATE.start_main_#t~ite45_Out-1122202244|)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1122202244, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1122202244, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1122202244, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1122202244} OutVars{~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1122202244, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1122202244, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1122202244, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1122202244, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-1122202244|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 15:28:31,373 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L862-->L863: Formula: (let ((.cse1 (= ~a$r_buff0_thd0~0_Out1889337322 ~a$r_buff0_thd0~0_In1889337322)) (.cse0 (= (mod ~a$r_buff0_thd0~0_In1889337322 256) 0)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In1889337322 256)))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (not .cse0) (= ~a$r_buff0_thd0~0_Out1889337322 0) (not .cse2)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1889337322, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1889337322} OutVars{ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out1889337322|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1889337322, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_Out1889337322} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46, ~a$r_buff0_thd0~0] because there is no mapped edge [2019-12-07 15:28:31,373 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L863-->L867: Formula: (let ((.cse1 (= ~a$r_buff1_thd0~0_Out1399349445 ~a$r_buff1_thd0~0_In1399349445)) (.cse4 (= 0 (mod ~a$w_buff0_used~0_In1399349445 256))) (.cse0 (= (mod ~a$r_buff0_thd0~0_In1399349445 256) 0)) (.cse6 (= ~a$r_buff1_thd0~0_Out1399349445 0)) (.cse3 (= (mod ~a$w_buff1_used~0_In1399349445 256) 0)) (.cse2 (= |ULTIMATE.start_main_#t~nondet48_In1399349445| ~weak$$choice1~0_Out1399349445)) (.cse5 (= 0 (mod ~a$r_buff1_thd0~0_In1399349445 256)))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse1 .cse2 .cse4 .cse5) (and .cse1 .cse2 .cse4 .cse3) (and .cse0 .cse1 .cse2 .cse5) (and (not .cse4) .cse6 (not .cse0) .cse2) (and .cse6 (not .cse3) .cse2 (not .cse5)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1399349445, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1399349445, ULTIMATE.start_main_#t~nondet48=|ULTIMATE.start_main_#t~nondet48_In1399349445|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1399349445, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1399349445} OutVars{~weak$$choice1~0=~weak$$choice1~0_Out1399349445, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1399349445|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_Out1399349445, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1399349445, ULTIMATE.start_main_#t~nondet48=|ULTIMATE.start_main_#t~nondet48_Out1399349445|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1399349445, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1399349445} AuxVars[] AssignedVars[~weak$$choice1~0, ULTIMATE.start_main_#t~ite47, ~a$r_buff1_thd0~0, ULTIMATE.start_main_#t~nondet48] because there is no mapped edge [2019-12-07 15:28:31,374 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L867-->L867-3: Formula: (let ((.cse1 (= (mod ~weak$$choice1~0_In1115251168 256) 0)) (.cse0 (not (= (mod ~__unbuffered_p0_EAX$read_delayed~0_In1115251168 256) 0)))) (or (and .cse0 (= |ULTIMATE.start_main_#t~ite50_Out1115251168| |ULTIMATE.start_main_#t~mem49_Out1115251168|) (not .cse1) (= |ULTIMATE.start_main_#t~mem49_Out1115251168| (select (select |#memory_int_In1115251168| ~__unbuffered_p0_EAX$read_delayed_var~0.base_In1115251168) ~__unbuffered_p0_EAX$read_delayed_var~0.offset_In1115251168))) (and (= |ULTIMATE.start_main_#t~ite50_Out1115251168| ~__unbuffered_p0_EAX~0_In1115251168) .cse1 .cse0 (= |ULTIMATE.start_main_#t~mem49_In1115251168| |ULTIMATE.start_main_#t~mem49_Out1115251168|)))) InVars {~weak$$choice1~0=~weak$$choice1~0_In1115251168, ~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_In1115251168, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=~__unbuffered_p0_EAX$read_delayed_var~0.offset_In1115251168, #memory_int=|#memory_int_In1115251168|, ~__unbuffered_p0_EAX$read_delayed~0=~__unbuffered_p0_EAX$read_delayed~0_In1115251168, ULTIMATE.start_main_#t~mem49=|ULTIMATE.start_main_#t~mem49_In1115251168|, ~__unbuffered_p0_EAX$read_delayed_var~0.base=~__unbuffered_p0_EAX$read_delayed_var~0.base_In1115251168} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1115251168|, ~weak$$choice1~0=~weak$$choice1~0_In1115251168, ~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_In1115251168, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=~__unbuffered_p0_EAX$read_delayed_var~0.offset_In1115251168, #memory_int=|#memory_int_In1115251168|, ~__unbuffered_p0_EAX$read_delayed~0=~__unbuffered_p0_EAX$read_delayed~0_In1115251168, ULTIMATE.start_main_#t~mem49=|ULTIMATE.start_main_#t~mem49_Out1115251168|, ~__unbuffered_p0_EAX$read_delayed_var~0.base=~__unbuffered_p0_EAX$read_delayed_var~0.base_In1115251168} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~mem49] because there is no mapped edge [2019-12-07 15:28:31,374 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L867-3-->L5: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6| (mod v_~main$tmp_guard1~0_15 256)) (let ((.cse3 (= 1 v_~__unbuffered_p3_EAX~0_16)) (.cse0 (= 1 v_~__unbuffered_p0_EAX~0_40)) (.cse4 (= 1 v_~__unbuffered_p2_EAX~0_28)) (.cse5 (= 1 v_~__unbuffered_p1_EAX~0_27)) (.cse1 (= v_~main$tmp_guard1~0_15 1)) (.cse2 (= |v_ULTIMATE.start_main_#t~ite50_29| v_~__unbuffered_p0_EAX~0_40))) (or (and (not .cse0) .cse1 .cse2) (and (not .cse3) .cse1 .cse2) (and (not .cse4) .cse1 .cse2) (and (= v_~main$tmp_guard1~0_15 0) .cse3 .cse0 .cse5 .cse4 .cse2) (and (not .cse5) .cse1 .cse2)))) InVars {ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_29|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_27, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_16, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_28} OutVars{ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_28|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_40, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_31|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_27, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_16, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_15, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_28, ULTIMATE.start_main_#t~mem49=|v_ULTIMATE.start_main_#t~mem49_24|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50, ~__unbuffered_p0_EAX~0, ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite51, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~mem49, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 15:28:31,374 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L5-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_9 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_9 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_9, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 15:28:31,424 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 03:28:31 BasicIcfg [2019-12-07 15:28:31,424 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 15:28:31,425 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 15:28:31,425 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 15:28:31,425 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 15:28:31,425 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:28:22" (3/4) ... [2019-12-07 15:28:31,427 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 15:28:31,427 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] ULTIMATE.startENTRY-->L847: Formula: (let ((.cse1 (store |v_#valid_99| 0 0))) (let ((.cse0 (store .cse1 |v_~#a~0.base_137| 1))) (and (= 0 v_~a$w_buff1~0_71) (= 0 v_~__unbuffered_p0_EAX$w_buff0_used~0_8) (= 0 v_~__unbuffered_p0_EAX$r_buff1_thd4~0_9) (= 0 v_~a$w_buff1_used~0_265) (= 0 v_~__unbuffered_p0_EAX$r_buff1_thd3~0_9) (= 0 v_~a$read_delayed_var~0.base_7) (= |v_~#a~0.offset_137| 0) (= |v_#NULL.offset_6| 0) (= 0 v_~__unbuffered_p0_EAX$read_delayed~0_48) (= v_~a$flush_delayed~0_68 0) (= 0 v_~a$r_buff0_thd1~0_194) (< 0 |v_#StackHeapBarrier_32|) (= |v_#memory_int_243| (store |v_#memory_int_244| |v_ULTIMATE.start_main_~#t2725~0.base_21| (store (select |v_#memory_int_244| |v_ULTIMATE.start_main_~#t2725~0.base_21|) |v_ULTIMATE.start_main_~#t2725~0.offset_17| 0))) (= 0 v_~__unbuffered_p0_EAX$r_buff0_thd0~0_9) (< |v_#StackHeapBarrier_32| |v_~#a~0.base_137|) (= (store (store |v_#length_59| |v_~#a~0.base_137| 4) |v_ULTIMATE.start_main_~#t2725~0.base_21| 4) |v_#length_57|) (= v_~a$mem_tmp~0_33 0) (= 0 v_~a$r_buff1_thd3~0_7) (= v_~__unbuffered_cnt~0_200 0) (= 0 v_~weak$$choice1~0_29) (= 0 v_~__unbuffered_p0_EAX$r_buff1_thd0~0_8) (= 0 v_~weak$$choice0~0_24) (= 0 v_~a$r_buff1_thd4~0_91) (= 0 v_~__unbuffered_p1_EAX~0_47) (= v_~a$r_buff0_thd4~0_99 0) (= 0 v_~__unbuffered_p0_EAX$w_buff1~0_8) (= v_~y~0_58 0) (= 0 v_~__unbuffered_p0_EAX$r_buff0_thd2~0_9) (= v_~__unbuffered_p0_EAX$read_delayed_var~0.offset_34 0) (= (select (select |v_#memory_int_244| |v_~#a~0.base_137|) |v_~#a~0.offset_137|) 0) (= 0 v_~__unbuffered_p0_EAX$w_buff0~0_8) (= v_~__unbuffered_p0_EAX$flush_delayed~0_8 0) (= 0 v_~__unbuffered_p0_EAX$r_buff0_thd3~0_9) (= 0 v_~a$w_buff0~0_68) (= v_~a$r_buff0_thd2~0_8 0) (= 0 v_~__unbuffered_p3_EAX~0_31) (= 0 v_~__unbuffered_p0_EAX$w_buff1_used~0_9) (= 0 v_~a$r_buff1_thd0~0_69) (= 0 v_~__unbuffered_p0_EAX$read_delayed_var~0.base_34) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t2725~0.base_21|)) (= 0 v_~a$read_delayed~0_7) (= |v_ULTIMATE.start_main_~#t2725~0.offset_17| 0) (= v_~a$read_delayed_var~0.offset_7 0) (= 0 v_~__unbuffered_p0_EAX~0_60) (= v_~a$r_buff0_thd3~0_8 0) (= v_~main$tmp_guard1~0_26 0) (= v_~x~0_59 0) (= v_~a$r_buff0_thd0~0_86 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t2725~0.base_21| 1) |v_#valid_97|) (= 0 v_~__unbuffered_p0_EAX$r_buff1_thd1~0_8) (= 0 v_~__unbuffered_p2_EAX~0_53) (= 0 v_~__unbuffered_p0_EAX$r_buff0_thd4~0_9) (= 0 |v_#NULL.base_6|) (= v_~__unbuffered_p0_EAX$mem_tmp~0_9 0) (< |v_#StackHeapBarrier_32| |v_ULTIMATE.start_main_~#t2725~0.base_21|) (= v_~z~0_40 0) (= 0 v_~a$r_buff1_thd2~0_8) (= 0 v_~weak$$choice2~0_99) (= 0 v_~__unbuffered_p0_EAX$r_buff1_thd2~0_7) (= (select .cse1 |v_~#a~0.base_137|) 0) (= 0 v_~__unbuffered_p0_EAX$r_buff0_thd1~0_9) (= 0 v_~a$w_buff0_used~0_447) (= v_~main$tmp_guard0~0_37 0) (= 0 v_~a$r_buff1_thd1~0_126)))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_32|, #valid=|v_#valid_99|, #memory_int=|v_#memory_int_244|, #length=|v_#length_59|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_8, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_28|, ~__unbuffered_p0_EAX$r_buff0_thd1~0=v_~__unbuffered_p0_EAX$r_buff0_thd1~0_9, #NULL.offset=|v_#NULL.offset_6|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_86, ULTIMATE.start_main_#t~ite43=|v_ULTIMATE.start_main_#t~ite43_32|, ~a$r_buff0_thd4~0=v_~a$r_buff0_thd4~0_99, ~__unbuffered_p0_EAX$r_buff1_thd3~0=v_~__unbuffered_p0_EAX$r_buff1_thd3~0_9, ULTIMATE.start_main_#t~ite45=|v_ULTIMATE.start_main_#t~ite45_151|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_40|, ~weak$$choice1~0=v_~weak$$choice1~0_29, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_60, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_47, ULTIMATE.start_main_~#t2727~0.offset=|v_ULTIMATE.start_main_~#t2727~0.offset_31|, ULTIMATE.start_main_~#t2728~0.base=|v_ULTIMATE.start_main_~#t2728~0.base_27|, ~__unbuffered_p0_EAX$r_buff0_thd4~0=v_~__unbuffered_p0_EAX$r_buff0_thd4~0_9, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_31, #length=|v_#length_57|, ULTIMATE.start_main_#t~nondet48=|v_ULTIMATE.start_main_#t~nondet48_33|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_53, ~__unbuffered_p0_EAX$w_buff1~0=v_~__unbuffered_p0_EAX$w_buff1~0_8, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_7, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_447, ~#a~0.base=|v_~#a~0.base_137|, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_194, ~__unbuffered_p0_EAX$r_buff0_thd0~0=v_~__unbuffered_p0_EAX$r_buff0_thd0~0_9, ~__unbuffered_p0_EAX$r_buff1_thd2~0=v_~__unbuffered_p0_EAX$r_buff1_thd2~0_7, ~__unbuffered_p0_EAX$w_buff1_used~0=v_~__unbuffered_p0_EAX$w_buff1_used~0_9, ~weak$$choice0~0=v_~weak$$choice0~0_24, #StackHeapBarrier=|v_#StackHeapBarrier_32|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_7, ULTIMATE.start_main_~#t2725~0.offset=|v_ULTIMATE.start_main_~#t2725~0.offset_17|, ~__unbuffered_p0_EAX$mem_tmp~0=v_~__unbuffered_p0_EAX$mem_tmp~0_9, ~a$w_buff0~0=v_~a$w_buff0~0_68, ~__unbuffered_p0_EAX$r_buff0_thd3~0=v_~__unbuffered_p0_EAX$r_buff0_thd3~0_9, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_8|, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_69, ~#a~0.offset=|v_~#a~0.offset_137|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_200, ULTIMATE.start_main_#t~mem49=|v_ULTIMATE.start_main_#t~mem49_33|, ~x~0=v_~x~0_59, ULTIMATE.start_main_~#t2727~0.base=|v_ULTIMATE.start_main_~#t2727~0.base_37|, ULTIMATE.start_main_#t~mem41=|v_ULTIMATE.start_main_#t~mem41_28|, ~a$read_delayed~0=v_~a$read_delayed~0_7, ULTIMATE.start_main_~#t2726~0.offset=|v_ULTIMATE.start_main_~#t2726~0.offset_16|, ~a$r_buff1_thd4~0=v_~a$r_buff1_thd4~0_91, ULTIMATE.start_main_~#t2726~0.base=|v_ULTIMATE.start_main_~#t2726~0.base_22|, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_8, ~__unbuffered_p0_EAX$w_buff0~0=v_~__unbuffered_p0_EAX$w_buff0~0_8, ULTIMATE.start_main_#t~ite46=|v_ULTIMATE.start_main_#t~ite46_21|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_26, ULTIMATE.start_main_#t~ite42=|v_ULTIMATE.start_main_#t~ite42_25|, ~__unbuffered_p0_EAX$r_buff1_thd1~0=v_~__unbuffered_p0_EAX$r_buff1_thd1~0_8, ULTIMATE.start_main_#t~ite44=|v_ULTIMATE.start_main_#t~ite44_55|, ~a$mem_tmp~0=v_~a$mem_tmp~0_33, ~__unbuffered_p0_EAX$r_buff1_thd4~0=v_~__unbuffered_p0_EAX$r_buff1_thd4~0_9, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_51|, ~a$w_buff1~0=v_~a$w_buff1~0_71, ~__unbuffered_p0_EAX$flush_delayed~0=v_~__unbuffered_p0_EAX$flush_delayed~0_8, ~__unbuffered_p0_EAX$read_delayed~0=v_~__unbuffered_p0_EAX$read_delayed~0_48, ~y~0=v_~y~0_58, ULTIMATE.start_main_#t~nondet40=|v_ULTIMATE.start_main_#t~nondet40_16|, ULTIMATE.start_main_~#t2728~0.offset=|v_ULTIMATE.start_main_~#t2728~0.offset_22|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_126, ULTIMATE.start_main_~#t2725~0.base=|v_ULTIMATE.start_main_~#t2725~0.base_21|, ~__unbuffered_p0_EAX$w_buff0_used~0=v_~__unbuffered_p0_EAX$w_buff0_used~0_8, ~__unbuffered_p0_EAX$r_buff0_thd2~0=v_~__unbuffered_p0_EAX$r_buff0_thd2~0_9, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_8, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_37, ~__unbuffered_p0_EAX$read_delayed_var~0.base=v_~__unbuffered_p0_EAX$read_delayed_var~0.base_34, #NULL.base=|v_#NULL.base_6|, ~__unbuffered_p0_EAX$r_buff1_thd0~0=v_~__unbuffered_p0_EAX$r_buff1_thd0~0_8, ~a$flush_delayed~0=v_~a$flush_delayed~0_68, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_18|, #valid=|v_#valid_97|, #memory_int=|v_#memory_int_243|, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=v_~__unbuffered_p0_EAX$read_delayed_var~0.offset_34, ULTIMATE.start_main_#t~nondet37=|v_ULTIMATE.start_main_#t~nondet37_7|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_15|, ~z~0=v_~z~0_40, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_265, ~weak$$choice2~0=v_~weak$$choice2~0_99, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_7} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, ~__unbuffered_p0_EAX$r_buff0_thd1~0, #NULL.offset, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite43, ~a$r_buff0_thd4~0, ~__unbuffered_p0_EAX$r_buff1_thd3~0, ULTIMATE.start_main_#t~ite45, ULTIMATE.start_main_#t~ite50, ~weak$$choice1~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t2727~0.offset, ULTIMATE.start_main_~#t2728~0.base, ~__unbuffered_p0_EAX$r_buff0_thd4~0, ~__unbuffered_p3_EAX~0, #length, ULTIMATE.start_main_#t~nondet48, ~__unbuffered_p2_EAX~0, ~__unbuffered_p0_EAX$w_buff1~0, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~#a~0.base, ~a$r_buff0_thd1~0, ~__unbuffered_p0_EAX$r_buff0_thd0~0, ~__unbuffered_p0_EAX$r_buff1_thd2~0, ~__unbuffered_p0_EAX$w_buff1_used~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ULTIMATE.start_main_~#t2725~0.offset, ~__unbuffered_p0_EAX$mem_tmp~0, ~a$w_buff0~0, ~__unbuffered_p0_EAX$r_buff0_thd3~0, ULTIMATE.start_main_#t~nondet38, ~a$r_buff1_thd0~0, ~#a~0.offset, ~__unbuffered_cnt~0, ULTIMATE.start_main_#t~mem49, ~x~0, ULTIMATE.start_main_~#t2727~0.base, ULTIMATE.start_main_#t~mem41, ~a$read_delayed~0, ULTIMATE.start_main_~#t2726~0.offset, ~a$r_buff1_thd4~0, ULTIMATE.start_main_~#t2726~0.base, ~a$r_buff0_thd2~0, ~__unbuffered_p0_EAX$w_buff0~0, ULTIMATE.start_main_#t~ite46, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite42, ~__unbuffered_p0_EAX$r_buff1_thd1~0, ULTIMATE.start_main_#t~ite44, ~a$mem_tmp~0, ~__unbuffered_p0_EAX$r_buff1_thd4~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~__unbuffered_p0_EAX$flush_delayed~0, ~__unbuffered_p0_EAX$read_delayed~0, ~y~0, ULTIMATE.start_main_#t~nondet40, ULTIMATE.start_main_~#t2728~0.offset, ~a$r_buff1_thd1~0, ULTIMATE.start_main_~#t2725~0.base, ~__unbuffered_p0_EAX$w_buff0_used~0, ~__unbuffered_p0_EAX$r_buff0_thd2~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, ~__unbuffered_p0_EAX$read_delayed_var~0.base, #NULL.base, ~__unbuffered_p0_EAX$r_buff1_thd0~0, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ~__unbuffered_p0_EAX$read_delayed_var~0.offset, ULTIMATE.start_main_#t~nondet37, ULTIMATE.start_main_#t~nondet39, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 15:28:31,428 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [710] [710] L763-->L764: Formula: (and (= v_~a$w_buff0~0_17 v_~a$w_buff0~0_16) (not (= (mod v_~weak$$choice2~0_23 256) 0))) InVars {~a$w_buff0~0=v_~a$w_buff0~0_17, ~weak$$choice2~0=v_~weak$$choice2~0_23} OutVars{P0Thread1of1ForFork1_#t~ite10=|v_P0Thread1of1ForFork1_#t~ite10_7|, P0Thread1of1ForFork1_#t~ite9=|v_P0Thread1of1ForFork1_#t~ite9_7|, ~a$w_buff0~0=v_~a$w_buff0~0_16, ~weak$$choice2~0=v_~weak$$choice2~0_23, P0Thread1of1ForFork1_#t~ite11=|v_P0Thread1of1ForFork1_#t~ite11_9|} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite10, P0Thread1of1ForFork1_#t~ite9, ~a$w_buff0~0, P0Thread1of1ForFork1_#t~ite11] because there is no mapped edge [2019-12-07 15:28:31,429 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [796] [796] L847-1-->L849: Formula: (and (= |v_#length_27| (store |v_#length_28| |v_ULTIMATE.start_main_~#t2726~0.base_12| 4)) (= (store |v_#memory_int_138| |v_ULTIMATE.start_main_~#t2726~0.base_12| (store (select |v_#memory_int_138| |v_ULTIMATE.start_main_~#t2726~0.base_12|) |v_ULTIMATE.start_main_~#t2726~0.offset_10| 1)) |v_#memory_int_137|) (= |v_ULTIMATE.start_main_~#t2726~0.offset_10| 0) (= (select |v_#valid_51| |v_ULTIMATE.start_main_~#t2726~0.base_12|) 0) (= (store |v_#valid_51| |v_ULTIMATE.start_main_~#t2726~0.base_12| 1) |v_#valid_50|) (< |v_#StackHeapBarrier_16| |v_ULTIMATE.start_main_~#t2726~0.base_12|) (not (= |v_ULTIMATE.start_main_~#t2726~0.base_12| 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_16|, #valid=|v_#valid_51|, #memory_int=|v_#memory_int_138|, #length=|v_#length_28|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_16|, ULTIMATE.start_main_~#t2726~0.offset=|v_ULTIMATE.start_main_~#t2726~0.offset_10|, ULTIMATE.start_main_~#t2726~0.base=|v_ULTIMATE.start_main_~#t2726~0.base_12|, #valid=|v_#valid_50|, #memory_int=|v_#memory_int_137|, ULTIMATE.start_main_#t~nondet37=|v_ULTIMATE.start_main_#t~nondet37_5|, #length=|v_#length_27|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2726~0.offset, ULTIMATE.start_main_~#t2726~0.base, #valid, #memory_int, ULTIMATE.start_main_#t~nondet37, #length] because there is no mapped edge [2019-12-07 15:28:31,429 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [734] [734] L764-->L765: Formula: (and (not (= 0 (mod v_~weak$$choice2~0_30 256))) (= v_~a$w_buff1~0_20 v_~a$w_buff1~0_19)) InVars {~a$w_buff1~0=v_~a$w_buff1~0_20, ~weak$$choice2~0=v_~weak$$choice2~0_30} OutVars{~a$w_buff1~0=v_~a$w_buff1~0_19, P0Thread1of1ForFork1_#t~ite14=|v_P0Thread1of1ForFork1_#t~ite14_6|, ~weak$$choice2~0=v_~weak$$choice2~0_30, P0Thread1of1ForFork1_#t~ite13=|v_P0Thread1of1ForFork1_#t~ite13_7|, P0Thread1of1ForFork1_#t~ite12=|v_P0Thread1of1ForFork1_#t~ite12_6|} AuxVars[] AssignedVars[~a$w_buff1~0, P0Thread1of1ForFork1_#t~ite14, P0Thread1of1ForFork1_#t~ite13, P0Thread1of1ForFork1_#t~ite12] because there is no mapped edge [2019-12-07 15:28:31,429 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [811] [811] L765-->L765-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In1994303936 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite16_Out1994303936| ~a$w_buff0_used~0_In1994303936) (= |P0Thread1of1ForFork1_#t~ite16_Out1994303936| |P0Thread1of1ForFork1_#t~ite17_Out1994303936|) .cse0 (let ((.cse1 (= (mod ~a$r_buff0_thd1~0_In1994303936 256) 0))) (or (and (= 0 (mod ~a$r_buff1_thd1~0_In1994303936 256)) .cse1) (and (= (mod ~a$w_buff1_used~0_In1994303936 256) 0) .cse1) (= (mod ~a$w_buff0_used~0_In1994303936 256) 0)))) (and (= |P0Thread1of1ForFork1_#t~ite17_Out1994303936| ~a$w_buff0_used~0_In1994303936) (not .cse0) (= |P0Thread1of1ForFork1_#t~ite16_In1994303936| |P0Thread1of1ForFork1_#t~ite16_Out1994303936|)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1994303936, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1994303936, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1994303936, P0Thread1of1ForFork1_#t~ite16=|P0Thread1of1ForFork1_#t~ite16_In1994303936|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1994303936, ~weak$$choice2~0=~weak$$choice2~0_In1994303936} OutVars{~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In1994303936, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1994303936, P0Thread1of1ForFork1_#t~ite17=|P0Thread1of1ForFork1_#t~ite17_Out1994303936|, P0Thread1of1ForFork1_#t~ite16=|P0Thread1of1ForFork1_#t~ite16_Out1994303936|, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In1994303936, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1994303936, ~weak$$choice2~0=~weak$$choice2~0_In1994303936} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite17, P0Thread1of1ForFork1_#t~ite16] because there is no mapped edge [2019-12-07 15:28:31,430 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [812] [812] L766-->L766-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-343227259 256)))) (or (and (= |P0Thread1of1ForFork1_#t~ite20_Out-343227259| ~a$w_buff1_used~0_In-343227259) (not .cse0) (= |P0Thread1of1ForFork1_#t~ite19_In-343227259| |P0Thread1of1ForFork1_#t~ite19_Out-343227259|)) (and (let ((.cse1 (= (mod ~a$r_buff0_thd1~0_In-343227259 256) 0))) (or (= 0 (mod ~a$w_buff0_used~0_In-343227259 256)) (and (= 0 (mod ~a$r_buff1_thd1~0_In-343227259 256)) .cse1) (and (= (mod ~a$w_buff1_used~0_In-343227259 256) 0) .cse1))) (= |P0Thread1of1ForFork1_#t~ite19_Out-343227259| ~a$w_buff1_used~0_In-343227259) .cse0 (= |P0Thread1of1ForFork1_#t~ite20_Out-343227259| |P0Thread1of1ForFork1_#t~ite19_Out-343227259|)))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-343227259, P0Thread1of1ForFork1_#t~ite19=|P0Thread1of1ForFork1_#t~ite19_In-343227259|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-343227259, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-343227259, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-343227259, ~weak$$choice2~0=~weak$$choice2~0_In-343227259} OutVars{P0Thread1of1ForFork1_#t~ite20=|P0Thread1of1ForFork1_#t~ite20_Out-343227259|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-343227259, P0Thread1of1ForFork1_#t~ite19=|P0Thread1of1ForFork1_#t~ite19_Out-343227259|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-343227259, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-343227259, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-343227259, ~weak$$choice2~0=~weak$$choice2~0_In-343227259} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite20, P0Thread1of1ForFork1_#t~ite19] because there is no mapped edge [2019-12-07 15:28:31,430 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [813] [813] L767-->L768: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff0_thd1~0_In-1356164905 256))) (.cse1 (= ~a$r_buff0_thd1~0_In-1356164905 ~a$r_buff0_thd1~0_Out-1356164905)) (.cse0 (= 0 (mod ~weak$$choice2~0_In-1356164905 256)))) (or (and (not .cse0) .cse1) (and .cse1 (= (mod ~a$w_buff0_used~0_In-1356164905 256) 0) .cse0) (and .cse2 .cse1 (= (mod ~a$w_buff1_used~0_In-1356164905 256) 0) .cse0) (and .cse2 (= (mod ~a$r_buff1_thd1~0_In-1356164905 256) 0) .cse1 .cse0))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1356164905, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1356164905, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1356164905, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1356164905, ~weak$$choice2~0=~weak$$choice2~0_In-1356164905} OutVars{P0Thread1of1ForFork1_#t~ite21=|P0Thread1of1ForFork1_#t~ite21_Out-1356164905|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1356164905, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1356164905, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-1356164905, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1356164905, ~weak$$choice2~0=~weak$$choice2~0_In-1356164905, P0Thread1of1ForFork1_#t~ite23=|P0Thread1of1ForFork1_#t~ite23_Out-1356164905|, P0Thread1of1ForFork1_#t~ite22=|P0Thread1of1ForFork1_#t~ite22_Out-1356164905|} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite21, ~a$r_buff0_thd1~0, P0Thread1of1ForFork1_#t~ite23, P0Thread1of1ForFork1_#t~ite22] because there is no mapped edge [2019-12-07 15:28:31,430 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [744] [744] L768-->L772: Formula: (and (= 1 v_~__unbuffered_p0_EAX$read_delayed~0_16) (= (select (select |v_#memory_int_76| |v_~#a~0.base_42|) |v_~#a~0.offset_42|) v_~__unbuffered_p0_EAX~0_18) (not (= 0 (mod v_~weak$$choice2~0_33 256))) (= v_~a$r_buff1_thd1~0_46 v_~a$r_buff1_thd1~0_45) (= |v_~#a~0.offset_42| v_~__unbuffered_p0_EAX$read_delayed_var~0.offset_12) (= |v_~#a~0.base_42| v_~__unbuffered_p0_EAX$read_delayed_var~0.base_12)) InVars {~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_46, #memory_int=|v_#memory_int_76|, ~#a~0.base=|v_~#a~0.base_42|, ~#a~0.offset=|v_~#a~0.offset_42|, ~weak$$choice2~0=v_~weak$$choice2~0_33} OutVars{P0Thread1of1ForFork1_#t~ite25=|v_P0Thread1of1ForFork1_#t~ite25_14|, P0Thread1of1ForFork1_#t~ite26=|v_P0Thread1of1ForFork1_#t~ite26_17|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_45, ~#a~0.base=|v_~#a~0.base_42|, ~__unbuffered_p0_EAX$read_delayed_var~0.base=v_~__unbuffered_p0_EAX$read_delayed_var~0.base_12, P0Thread1of1ForFork1_#t~mem27=|v_P0Thread1of1ForFork1_#t~mem27_8|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_18, #memory_int=|v_#memory_int_76|, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=v_~__unbuffered_p0_EAX$read_delayed_var~0.offset_12, ~#a~0.offset=|v_~#a~0.offset_42|, ~__unbuffered_p0_EAX$read_delayed~0=v_~__unbuffered_p0_EAX$read_delayed~0_16, ~weak$$choice2~0=v_~weak$$choice2~0_33, P0Thread1of1ForFork1_#t~ite24=|v_P0Thread1of1ForFork1_#t~ite24_17|} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~mem27, ~__unbuffered_p0_EAX~0, P0Thread1of1ForFork1_#t~ite25, P0Thread1of1ForFork1_#t~ite26, ~a$r_buff1_thd1~0, ~__unbuffered_p0_EAX$read_delayed_var~0.offset, ~__unbuffered_p0_EAX$read_delayed~0, P0Thread1of1ForFork1_#t~ite24, ~__unbuffered_p0_EAX$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 15:28:31,430 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [723] [723] L772-->L783: Formula: (and (= (store |v_#memory_int_51| |v_~#a~0.base_26| (store (select |v_#memory_int_51| |v_~#a~0.base_26|) |v_~#a~0.offset_26| v_~a$mem_tmp~0_6)) |v_#memory_int_50|) (= v_~a$flush_delayed~0_12 0) (= (+ v_~__unbuffered_cnt~0_49 1) v_~__unbuffered_cnt~0_48) (= v_~x~0_13 1) (not (= (mod v_~a$flush_delayed~0_13 256) 0))) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_13, #memory_int=|v_#memory_int_51|, ~#a~0.base=|v_~#a~0.base_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_49, ~#a~0.offset=|v_~#a~0.offset_26|} OutVars{P0Thread1of1ForFork1_#t~mem28=|v_P0Thread1of1ForFork1_#t~mem28_7|, ~a$mem_tmp~0=v_~a$mem_tmp~0_6, ~a$flush_delayed~0=v_~a$flush_delayed~0_12, P0Thread1of1ForFork1_#t~ite29=|v_P0Thread1of1ForFork1_#t~ite29_13|, #memory_int=|v_#memory_int_50|, ~#a~0.base=|v_~#a~0.base_26|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_48, ~#a~0.offset=|v_~#a~0.offset_26|, ~x~0=v_~x~0_13} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~mem28, ~a$flush_delayed~0, P0Thread1of1ForFork1_#t~ite29, #memory_int, ~__unbuffered_cnt~0, ~x~0] because there is no mapped edge [2019-12-07 15:28:31,430 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] P1ENTRY-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~x~0_29 v_~__unbuffered_p1_EAX~0_20) (= |v_P1Thread1of1ForFork2_#in~arg.offset_14| v_P1Thread1of1ForFork2_~arg.offset_12) (= |v_P1Thread1of1ForFork2_#in~arg.base_14| v_P1Thread1of1ForFork2_~arg.base_12) (= v_~__unbuffered_cnt~0_94 (+ v_~__unbuffered_cnt~0_95 1)) (= v_~y~0_27 1)) InVars {P1Thread1of1ForFork2_#in~arg.base=|v_P1Thread1of1ForFork2_#in~arg.base_14|, P1Thread1of1ForFork2_#in~arg.offset=|v_P1Thread1of1ForFork2_#in~arg.offset_14|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_95, ~x~0=v_~x~0_29} OutVars{P1Thread1of1ForFork2_#in~arg.base=|v_P1Thread1of1ForFork2_#in~arg.base_14|, P1Thread1of1ForFork2_~arg.offset=v_P1Thread1of1ForFork2_~arg.offset_12, P1Thread1of1ForFork2_~arg.base=v_P1Thread1of1ForFork2_~arg.base_12, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_20, P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, P1Thread1of1ForFork2_#in~arg.offset=|v_P1Thread1of1ForFork2_#in~arg.offset_14|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_94, ~y~0=v_~y~0_27, ~x~0=v_~x~0_29, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_~arg.offset, P1Thread1of1ForFork2_~arg.base, ~__unbuffered_p1_EAX~0, P1Thread1of1ForFork2_#res.offset, ~__unbuffered_cnt~0, ~y~0, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 15:28:31,430 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [798] [798] L849-1-->L851: Formula: (and (= 0 (select |v_#valid_53| |v_ULTIMATE.start_main_~#t2727~0.base_21|)) (= (store |v_#valid_53| |v_ULTIMATE.start_main_~#t2727~0.base_21| 1) |v_#valid_52|) (= |v_#memory_int_149| (store |v_#memory_int_150| |v_ULTIMATE.start_main_~#t2727~0.base_21| (store (select |v_#memory_int_150| |v_ULTIMATE.start_main_~#t2727~0.base_21|) |v_ULTIMATE.start_main_~#t2727~0.offset_19| 2))) (= |v_ULTIMATE.start_main_~#t2727~0.offset_19| 0) (= (store |v_#length_30| |v_ULTIMATE.start_main_~#t2727~0.base_21| 4) |v_#length_29|) (< |v_#StackHeapBarrier_17| |v_ULTIMATE.start_main_~#t2727~0.base_21|) (not (= 0 |v_ULTIMATE.start_main_~#t2727~0.base_21|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_17|, #valid=|v_#valid_53|, #memory_int=|v_#memory_int_150|, #length=|v_#length_30|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_17|, ULTIMATE.start_main_~#t2727~0.offset=|v_ULTIMATE.start_main_~#t2727~0.offset_19|, #valid=|v_#valid_52|, #memory_int=|v_#memory_int_149|, ULTIMATE.start_main_#t~nondet38=|v_ULTIMATE.start_main_#t~nondet38_6|, #length=|v_#length_29|, ULTIMATE.start_main_~#t2727~0.base=|v_ULTIMATE.start_main_~#t2727~0.base_21|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2727~0.offset, #valid, #memory_int, ULTIMATE.start_main_#t~nondet38, #length, ULTIMATE.start_main_~#t2727~0.base] because there is no mapped edge [2019-12-07 15:28:31,431 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [769] [769] P2ENTRY-->P2EXIT: Formula: (and (= 0 |v_P2Thread1of1ForFork3_#res.base_7|) (= |v_P2Thread1of1ForFork3_#in~arg.offset_15| v_P2Thread1of1ForFork3_~arg.offset_13) (= |v_P2Thread1of1ForFork3_#res.offset_7| 0) (= v_P2Thread1of1ForFork3_~arg.base_13 |v_P2Thread1of1ForFork3_#in~arg.base_15|) (= v_~y~0_20 v_~__unbuffered_p2_EAX~0_19) (= (+ v_~__unbuffered_cnt~0_67 1) v_~__unbuffered_cnt~0_66) (= v_~z~0_18 1)) InVars {P2Thread1of1ForFork3_#in~arg.base=|v_P2Thread1of1ForFork3_#in~arg.base_15|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_67, ~y~0=v_~y~0_20, P2Thread1of1ForFork3_#in~arg.offset=|v_P2Thread1of1ForFork3_#in~arg.offset_15|} OutVars{P2Thread1of1ForFork3_~arg.base=v_P2Thread1of1ForFork3_~arg.base_13, P2Thread1of1ForFork3_#in~arg.base=|v_P2Thread1of1ForFork3_#in~arg.base_15|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_66, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_19, P2Thread1of1ForFork3_~arg.offset=v_P2Thread1of1ForFork3_~arg.offset_13, P2Thread1of1ForFork3_#res.base=|v_P2Thread1of1ForFork3_#res.base_7|, ~z~0=v_~z~0_18, P2Thread1of1ForFork3_#res.offset=|v_P2Thread1of1ForFork3_#res.offset_7|, ~y~0=v_~y~0_20, P2Thread1of1ForFork3_#in~arg.offset=|v_P2Thread1of1ForFork3_#in~arg.offset_15|} AuxVars[] AssignedVars[P2Thread1of1ForFork3_~arg.base, ~__unbuffered_cnt~0, ~__unbuffered_p2_EAX~0, P2Thread1of1ForFork3_~arg.offset, P2Thread1of1ForFork3_#res.base, ~z~0, P2Thread1of1ForFork3_#res.offset] because there is no mapped edge [2019-12-07 15:28:31,431 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L851-1-->L853: Formula: (and (= |v_#length_25| (store |v_#length_26| |v_ULTIMATE.start_main_~#t2728~0.base_11| 4)) (= 0 (select |v_#valid_49| |v_ULTIMATE.start_main_~#t2728~0.base_11|)) (= |v_#memory_int_135| (store |v_#memory_int_136| |v_ULTIMATE.start_main_~#t2728~0.base_11| (store (select |v_#memory_int_136| |v_ULTIMATE.start_main_~#t2728~0.base_11|) |v_ULTIMATE.start_main_~#t2728~0.offset_10| 3))) (= |v_#valid_48| (store |v_#valid_49| |v_ULTIMATE.start_main_~#t2728~0.base_11| 1)) (< |v_#StackHeapBarrier_15| |v_ULTIMATE.start_main_~#t2728~0.base_11|) (not (= 0 |v_ULTIMATE.start_main_~#t2728~0.base_11|)) (= |v_ULTIMATE.start_main_~#t2728~0.offset_10| 0)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_15|, #valid=|v_#valid_49|, #memory_int=|v_#memory_int_136|, #length=|v_#length_26|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_15|, ULTIMATE.start_main_~#t2728~0.offset=|v_ULTIMATE.start_main_~#t2728~0.offset_10|, ULTIMATE.start_main_~#t2728~0.base=|v_ULTIMATE.start_main_~#t2728~0.base_11|, #valid=|v_#valid_48|, #memory_int=|v_#memory_int_135|, #length=|v_#length_25|, ULTIMATE.start_main_#t~nondet39=|v_ULTIMATE.start_main_#t~nondet39_5|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t2728~0.offset, ULTIMATE.start_main_~#t2728~0.base, #valid, #memory_int, #length, ULTIMATE.start_main_#t~nondet39] because there is no mapped edge [2019-12-07 15:28:31,432 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [757] [757] L824-2-->L824-4: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff1_used~0_In-1945436983 256))) (.cse1 (= (mod ~a$r_buff1_thd4~0_In-1945436983 256) 0))) (or (and (= |P3Thread1of1ForFork0_#t~mem30_In-1945436983| |P3Thread1of1ForFork0_#t~mem30_Out-1945436983|) (not .cse0) (not .cse1) (= ~a$w_buff1~0_In-1945436983 |P3Thread1of1ForFork0_#t~ite31_Out-1945436983|)) (and (= |P3Thread1of1ForFork0_#t~mem30_Out-1945436983| (select (select |#memory_int_In-1945436983| |~#a~0.base_In-1945436983|) |~#a~0.offset_In-1945436983|)) (or .cse0 .cse1) (= |P3Thread1of1ForFork0_#t~mem30_Out-1945436983| |P3Thread1of1ForFork0_#t~ite31_Out-1945436983|)))) InVars {~a$w_buff1~0=~a$w_buff1~0_In-1945436983, ~a$r_buff1_thd4~0=~a$r_buff1_thd4~0_In-1945436983, #memory_int=|#memory_int_In-1945436983|, ~#a~0.base=|~#a~0.base_In-1945436983|, ~#a~0.offset=|~#a~0.offset_In-1945436983|, P3Thread1of1ForFork0_#t~mem30=|P3Thread1of1ForFork0_#t~mem30_In-1945436983|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1945436983} OutVars{~a$w_buff1~0=~a$w_buff1~0_In-1945436983, ~a$r_buff1_thd4~0=~a$r_buff1_thd4~0_In-1945436983, #memory_int=|#memory_int_In-1945436983|, ~#a~0.base=|~#a~0.base_In-1945436983|, P3Thread1of1ForFork0_#t~mem30=|P3Thread1of1ForFork0_#t~mem30_Out-1945436983|, ~#a~0.offset=|~#a~0.offset_In-1945436983|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1945436983, P3Thread1of1ForFork0_#t~ite31=|P3Thread1of1ForFork0_#t~ite31_Out-1945436983|} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~mem30, P3Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 15:28:31,433 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [707] [707] L824-4-->L825: Formula: (= (store |v_#memory_int_38| |v_~#a~0.base_20| (store (select |v_#memory_int_38| |v_~#a~0.base_20|) |v_~#a~0.offset_20| |v_P3Thread1of1ForFork0_#t~ite31_8|)) |v_#memory_int_37|) InVars {#memory_int=|v_#memory_int_38|, ~#a~0.base=|v_~#a~0.base_20|, ~#a~0.offset=|v_~#a~0.offset_20|, P3Thread1of1ForFork0_#t~ite31=|v_P3Thread1of1ForFork0_#t~ite31_8|} OutVars{#memory_int=|v_#memory_int_37|, ~#a~0.base=|v_~#a~0.base_20|, P3Thread1of1ForFork0_#t~mem30=|v_P3Thread1of1ForFork0_#t~mem30_3|, ~#a~0.offset=|v_~#a~0.offset_20|, P3Thread1of1ForFork0_#t~ite32=|v_P3Thread1of1ForFork0_#t~ite32_5|, P3Thread1of1ForFork0_#t~ite31=|v_P3Thread1of1ForFork0_#t~ite31_7|} AuxVars[] AssignedVars[#memory_int, P3Thread1of1ForFork0_#t~mem30, P3Thread1of1ForFork0_#t~ite32, P3Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 15:28:31,433 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [754] [754] L825-->L825-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In42448830 256) 0)) (.cse0 (= (mod ~a$r_buff0_thd4~0_In42448830 256) 0))) (or (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In42448830 |P3Thread1of1ForFork0_#t~ite33_Out42448830|)) (and (= 0 |P3Thread1of1ForFork0_#t~ite33_Out42448830|) (not .cse1) (not .cse0)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In42448830, ~a$r_buff0_thd4~0=~a$r_buff0_thd4~0_In42448830} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In42448830, P3Thread1of1ForFork0_#t~ite33=|P3Thread1of1ForFork0_#t~ite33_Out42448830|, ~a$r_buff0_thd4~0=~a$r_buff0_thd4~0_In42448830} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite33] because there is no mapped edge [2019-12-07 15:28:31,433 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L826-->L826-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff1_used~0_In556857188 256))) (.cse0 (= (mod ~a$r_buff1_thd4~0_In556857188 256) 0)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In556857188 256))) (.cse3 (= 0 (mod ~a$r_buff0_thd4~0_In556857188 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~a$w_buff1_used~0_In556857188 |P3Thread1of1ForFork0_#t~ite34_Out556857188|)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |P3Thread1of1ForFork0_#t~ite34_Out556857188|)))) InVars {~a$r_buff1_thd4~0=~a$r_buff1_thd4~0_In556857188, ~a$w_buff0_used~0=~a$w_buff0_used~0_In556857188, ~a$w_buff1_used~0=~a$w_buff1_used~0_In556857188, ~a$r_buff0_thd4~0=~a$r_buff0_thd4~0_In556857188} OutVars{~a$r_buff1_thd4~0=~a$r_buff1_thd4~0_In556857188, ~a$w_buff0_used~0=~a$w_buff0_used~0_In556857188, ~a$w_buff1_used~0=~a$w_buff1_used~0_In556857188, P3Thread1of1ForFork0_#t~ite34=|P3Thread1of1ForFork0_#t~ite34_Out556857188|, ~a$r_buff0_thd4~0=~a$r_buff0_thd4~0_In556857188} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite34] because there is no mapped edge [2019-12-07 15:28:31,434 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [755] [755] L827-->L828: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In689926640 256) 0)) (.cse2 (= ~a$r_buff0_thd4~0_In689926640 ~a$r_buff0_thd4~0_Out689926640)) (.cse1 (= (mod ~a$r_buff0_thd4~0_In689926640 256) 0))) (or (and (not .cse0) (= 0 ~a$r_buff0_thd4~0_Out689926640) (not .cse1)) (and .cse2 .cse0) (and .cse2 .cse1))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In689926640, ~a$r_buff0_thd4~0=~a$r_buff0_thd4~0_In689926640} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In689926640, P3Thread1of1ForFork0_#t~ite35=|P3Thread1of1ForFork0_#t~ite35_Out689926640|, ~a$r_buff0_thd4~0=~a$r_buff0_thd4~0_Out689926640} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite35, ~a$r_buff0_thd4~0] because there is no mapped edge [2019-12-07 15:28:31,434 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [751] [751] L828-->L828-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-372639813 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd4~0_In-372639813 256) 0)) (.cse2 (= (mod ~a$r_buff1_thd4~0_In-372639813 256) 0)) (.cse3 (= 0 (mod ~a$w_buff1_used~0_In-372639813 256)))) (or (and (or .cse0 .cse1) (= ~a$r_buff1_thd4~0_In-372639813 |P3Thread1of1ForFork0_#t~ite36_Out-372639813|) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P3Thread1of1ForFork0_#t~ite36_Out-372639813| 0)))) InVars {~a$r_buff1_thd4~0=~a$r_buff1_thd4~0_In-372639813, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-372639813, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-372639813, ~a$r_buff0_thd4~0=~a$r_buff0_thd4~0_In-372639813} OutVars{~a$r_buff1_thd4~0=~a$r_buff1_thd4~0_In-372639813, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-372639813, P3Thread1of1ForFork0_#t~ite36=|P3Thread1of1ForFork0_#t~ite36_Out-372639813|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-372639813, ~a$r_buff0_thd4~0=~a$r_buff0_thd4~0_In-372639813} AuxVars[] AssignedVars[P3Thread1of1ForFork0_#t~ite36] because there is no mapped edge [2019-12-07 15:28:31,434 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [805] [805] L828-2-->P3EXIT: Formula: (and (= v_~a$r_buff1_thd4~0_64 |v_P3Thread1of1ForFork0_#t~ite36_58|) (= |v_P3Thread1of1ForFork0_#res.base_3| 0) (= 0 |v_P3Thread1of1ForFork0_#res.offset_3|) (= v_~__unbuffered_cnt~0_136 (+ v_~__unbuffered_cnt~0_137 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_137, P3Thread1of1ForFork0_#t~ite36=|v_P3Thread1of1ForFork0_#t~ite36_58|} OutVars{~a$r_buff1_thd4~0=v_~a$r_buff1_thd4~0_64, P3Thread1of1ForFork0_#res.offset=|v_P3Thread1of1ForFork0_#res.offset_3|, P3Thread1of1ForFork0_#res.base=|v_P3Thread1of1ForFork0_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_136, P3Thread1of1ForFork0_#t~ite36=|v_P3Thread1of1ForFork0_#t~ite36_57|} AuxVars[] AssignedVars[~a$r_buff1_thd4~0, P3Thread1of1ForFork0_#res.offset, P3Thread1of1ForFork0_#res.base, ~__unbuffered_cnt~0, P3Thread1of1ForFork0_#t~ite36] because there is no mapped edge [2019-12-07 15:28:31,434 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [681] [681] L857-->L859-2: Formula: (and (or (= 0 (mod v_~a$r_buff0_thd0~0_23 256)) (= 0 (mod v_~a$w_buff0_used~0_75 256))) (not (= 0 (mod v_~main$tmp_guard0~0_5 256)))) InVars {~a$w_buff0_used~0=v_~a$w_buff0_used~0_75, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_23, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5} OutVars{~a$w_buff0_used~0=v_~a$w_buff0_used~0_75, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_23, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_5} AuxVars[] AssignedVars[] because there is no mapped edge [2019-12-07 15:28:31,435 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [752] [752] L859-2-->L859-5: Formula: (let ((.cse0 (= |ULTIMATE.start_main_#t~ite43_Out-1997062575| |ULTIMATE.start_main_#t~ite42_Out-1997062575|)) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In-1997062575 256))) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In-1997062575 256)))) (or (and (= |ULTIMATE.start_main_#t~mem41_Out-1997062575| |ULTIMATE.start_main_#t~ite42_Out-1997062575|) .cse0 (or .cse1 .cse2) (= |ULTIMATE.start_main_#t~mem41_Out-1997062575| (select (select |#memory_int_In-1997062575| |~#a~0.base_In-1997062575|) |~#a~0.offset_In-1997062575|))) (and .cse0 (not .cse2) (= |ULTIMATE.start_main_#t~ite42_Out-1997062575| ~a$w_buff1~0_In-1997062575) (not .cse1) (= |ULTIMATE.start_main_#t~mem41_In-1997062575| |ULTIMATE.start_main_#t~mem41_Out-1997062575|)))) InVars {~a$w_buff1~0=~a$w_buff1~0_In-1997062575, ULTIMATE.start_main_#t~mem41=|ULTIMATE.start_main_#t~mem41_In-1997062575|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1997062575, #memory_int=|#memory_int_In-1997062575|, ~#a~0.base=|~#a~0.base_In-1997062575|, ~#a~0.offset=|~#a~0.offset_In-1997062575|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1997062575} OutVars{~a$w_buff1~0=~a$w_buff1~0_In-1997062575, ULTIMATE.start_main_#t~mem41=|ULTIMATE.start_main_#t~mem41_Out-1997062575|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1997062575, #memory_int=|#memory_int_In-1997062575|, ~#a~0.base=|~#a~0.base_In-1997062575|, ~#a~0.offset=|~#a~0.offset_In-1997062575|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1997062575, ULTIMATE.start_main_#t~ite43=|ULTIMATE.start_main_#t~ite43_Out-1997062575|, ULTIMATE.start_main_#t~ite42=|ULTIMATE.start_main_#t~ite42_Out-1997062575|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~mem41, ULTIMATE.start_main_#t~ite43, ULTIMATE.start_main_#t~ite42] because there is no mapped edge [2019-12-07 15:28:31,435 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [763] [763] L860-->L860-2: Formula: (let ((.cse1 (= (mod ~a$w_buff0_used~0_In655280818 256) 0)) (.cse0 (= 0 (mod ~a$r_buff0_thd0~0_In655280818 256)))) (or (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite44_Out655280818|)) (and (or .cse1 .cse0) (= ~a$w_buff0_used~0_In655280818 |ULTIMATE.start_main_#t~ite44_Out655280818|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In655280818, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In655280818} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In655280818, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In655280818, ULTIMATE.start_main_#t~ite44=|ULTIMATE.start_main_#t~ite44_Out655280818|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite44] because there is no mapped edge [2019-12-07 15:28:31,436 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [759] [759] L861-->L861-2: Formula: (let ((.cse3 (= (mod ~a$r_buff1_thd0~0_In-1122202244 256) 0)) (.cse2 (= (mod ~a$w_buff1_used~0_In-1122202244 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In-1122202244 256) 0)) (.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In-1122202244 256)))) (or (and (or .cse0 .cse1) (= ~a$w_buff1_used~0_In-1122202244 |ULTIMATE.start_main_#t~ite45_Out-1122202244|) (or .cse2 .cse3)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1))) (= 0 |ULTIMATE.start_main_#t~ite45_Out-1122202244|)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1122202244, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1122202244, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1122202244, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1122202244} OutVars{~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1122202244, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1122202244, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1122202244, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1122202244, ULTIMATE.start_main_#t~ite45=|ULTIMATE.start_main_#t~ite45_Out-1122202244|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite45] because there is no mapped edge [2019-12-07 15:28:31,436 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [766] [766] L862-->L863: Formula: (let ((.cse1 (= ~a$r_buff0_thd0~0_Out1889337322 ~a$r_buff0_thd0~0_In1889337322)) (.cse0 (= (mod ~a$r_buff0_thd0~0_In1889337322 256) 0)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In1889337322 256)))) (or (and .cse0 .cse1) (and .cse2 .cse1) (and (not .cse0) (= ~a$r_buff0_thd0~0_Out1889337322 0) (not .cse2)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1889337322, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1889337322} OutVars{ULTIMATE.start_main_#t~ite46=|ULTIMATE.start_main_#t~ite46_Out1889337322|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1889337322, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_Out1889337322} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite46, ~a$r_buff0_thd0~0] because there is no mapped edge [2019-12-07 15:28:31,436 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [760] [760] L863-->L867: Formula: (let ((.cse1 (= ~a$r_buff1_thd0~0_Out1399349445 ~a$r_buff1_thd0~0_In1399349445)) (.cse4 (= 0 (mod ~a$w_buff0_used~0_In1399349445 256))) (.cse0 (= (mod ~a$r_buff0_thd0~0_In1399349445 256) 0)) (.cse6 (= ~a$r_buff1_thd0~0_Out1399349445 0)) (.cse3 (= (mod ~a$w_buff1_used~0_In1399349445 256) 0)) (.cse2 (= |ULTIMATE.start_main_#t~nondet48_In1399349445| ~weak$$choice1~0_Out1399349445)) (.cse5 (= 0 (mod ~a$r_buff1_thd0~0_In1399349445 256)))) (or (and .cse0 .cse1 .cse2 .cse3) (and .cse1 .cse2 .cse4 .cse5) (and .cse1 .cse2 .cse4 .cse3) (and .cse0 .cse1 .cse2 .cse5) (and (not .cse4) .cse6 (not .cse0) .cse2) (and .cse6 (not .cse3) .cse2 (not .cse5)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In1399349445, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1399349445, ULTIMATE.start_main_#t~nondet48=|ULTIMATE.start_main_#t~nondet48_In1399349445|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1399349445, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1399349445} OutVars{~weak$$choice1~0=~weak$$choice1~0_Out1399349445, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1399349445|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_Out1399349445, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1399349445, ULTIMATE.start_main_#t~nondet48=|ULTIMATE.start_main_#t~nondet48_Out1399349445|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1399349445, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1399349445} AuxVars[] AssignedVars[~weak$$choice1~0, ULTIMATE.start_main_#t~ite47, ~a$r_buff1_thd0~0, ULTIMATE.start_main_#t~nondet48] because there is no mapped edge [2019-12-07 15:28:31,436 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [765] [765] L867-->L867-3: Formula: (let ((.cse1 (= (mod ~weak$$choice1~0_In1115251168 256) 0)) (.cse0 (not (= (mod ~__unbuffered_p0_EAX$read_delayed~0_In1115251168 256) 0)))) (or (and .cse0 (= |ULTIMATE.start_main_#t~ite50_Out1115251168| |ULTIMATE.start_main_#t~mem49_Out1115251168|) (not .cse1) (= |ULTIMATE.start_main_#t~mem49_Out1115251168| (select (select |#memory_int_In1115251168| ~__unbuffered_p0_EAX$read_delayed_var~0.base_In1115251168) ~__unbuffered_p0_EAX$read_delayed_var~0.offset_In1115251168))) (and (= |ULTIMATE.start_main_#t~ite50_Out1115251168| ~__unbuffered_p0_EAX~0_In1115251168) .cse1 .cse0 (= |ULTIMATE.start_main_#t~mem49_In1115251168| |ULTIMATE.start_main_#t~mem49_Out1115251168|)))) InVars {~weak$$choice1~0=~weak$$choice1~0_In1115251168, ~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_In1115251168, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=~__unbuffered_p0_EAX$read_delayed_var~0.offset_In1115251168, #memory_int=|#memory_int_In1115251168|, ~__unbuffered_p0_EAX$read_delayed~0=~__unbuffered_p0_EAX$read_delayed~0_In1115251168, ULTIMATE.start_main_#t~mem49=|ULTIMATE.start_main_#t~mem49_In1115251168|, ~__unbuffered_p0_EAX$read_delayed_var~0.base=~__unbuffered_p0_EAX$read_delayed_var~0.base_In1115251168} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1115251168|, ~weak$$choice1~0=~weak$$choice1~0_In1115251168, ~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_In1115251168, ~__unbuffered_p0_EAX$read_delayed_var~0.offset=~__unbuffered_p0_EAX$read_delayed_var~0.offset_In1115251168, #memory_int=|#memory_int_In1115251168|, ~__unbuffered_p0_EAX$read_delayed~0=~__unbuffered_p0_EAX$read_delayed~0_In1115251168, ULTIMATE.start_main_#t~mem49=|ULTIMATE.start_main_#t~mem49_Out1115251168|, ~__unbuffered_p0_EAX$read_delayed_var~0.base=~__unbuffered_p0_EAX$read_delayed_var~0.base_In1115251168} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~mem49] because there is no mapped edge [2019-12-07 15:28:31,437 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L867-3-->L5: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_6| (mod v_~main$tmp_guard1~0_15 256)) (let ((.cse3 (= 1 v_~__unbuffered_p3_EAX~0_16)) (.cse0 (= 1 v_~__unbuffered_p0_EAX~0_40)) (.cse4 (= 1 v_~__unbuffered_p2_EAX~0_28)) (.cse5 (= 1 v_~__unbuffered_p1_EAX~0_27)) (.cse1 (= v_~main$tmp_guard1~0_15 1)) (.cse2 (= |v_ULTIMATE.start_main_#t~ite50_29| v_~__unbuffered_p0_EAX~0_40))) (or (and (not .cse0) .cse1 .cse2) (and (not .cse3) .cse1 .cse2) (and (not .cse4) .cse1 .cse2) (and (= v_~main$tmp_guard1~0_15 0) .cse3 .cse0 .cse5 .cse4 .cse2) (and (not .cse5) .cse1 .cse2)))) InVars {ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_29|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_27, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_16, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_28} OutVars{ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_28|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_40, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_11, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_31|, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_27, ~__unbuffered_p3_EAX~0=v_~__unbuffered_p3_EAX~0_16, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_15, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_28, ULTIMATE.start_main_#t~mem49=|v_ULTIMATE.start_main_#t~mem49_24|, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_6|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50, ~__unbuffered_p0_EAX~0, ULTIMATE.start___VERIFIER_assert_~expression, ULTIMATE.start_main_#t~ite51, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~mem49, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 15:28:31,437 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [789] [789] L5-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_9 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_9 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|)) InVars {ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} OutVars{ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_9, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_4|} AuxVars[] AssignedVars[ULTIMATE.start___VERIFIER_assert_~expression] because there is no mapped edge [2019-12-07 15:28:31,489 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_6f554ac5-3310-48ef-b73d-91839375f593/bin/uautomizer/witness.graphml [2019-12-07 15:28:31,489 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 15:28:31,490 INFO L168 Benchmark]: Toolchain (without parser) took 9751.08 ms. Allocated memory was 1.0 GB in the beginning and 1.4 GB in the end (delta: 351.3 MB). Free memory was 937.1 MB in the beginning and 669.2 MB in the end (delta: 267.9 MB). Peak memory consumption was 619.1 MB. Max. memory is 11.5 GB. [2019-12-07 15:28:31,490 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 15:28:31,491 INFO L168 Benchmark]: CACSL2BoogieTranslator took 396.42 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 100.7 MB). Free memory was 937.1 MB in the beginning and 1.1 GB in the end (delta: -125.9 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. [2019-12-07 15:28:31,491 INFO L168 Benchmark]: Boogie Procedure Inliner took 37.57 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 15:28:31,491 INFO L168 Benchmark]: Boogie Preprocessor took 26.50 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 15:28:31,491 INFO L168 Benchmark]: RCFGBuilder took 409.94 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 60.6 MB). Peak memory consumption was 60.6 MB. Max. memory is 11.5 GB. [2019-12-07 15:28:31,491 INFO L168 Benchmark]: TraceAbstraction took 8812.80 ms. Allocated memory was 1.1 GB in the beginning and 1.4 GB in the end (delta: 250.6 MB). Free memory was 1.0 GB in the beginning and 699.4 MB in the end (delta: 302.9 MB). Peak memory consumption was 553.5 MB. Max. memory is 11.5 GB. [2019-12-07 15:28:31,492 INFO L168 Benchmark]: Witness Printer took 64.47 ms. Allocated memory is still 1.4 GB. Free memory was 699.4 MB in the beginning and 669.2 MB in the end (delta: 30.2 MB). Peak memory consumption was 30.2 MB. Max. memory is 11.5 GB. [2019-12-07 15:28:31,493 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 396.42 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 100.7 MB). Free memory was 937.1 MB in the beginning and 1.1 GB in the end (delta: -125.9 MB). Peak memory consumption was 18.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 37.57 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 26.50 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 409.94 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 60.6 MB). Peak memory consumption was 60.6 MB. Max. memory is 11.5 GB. * TraceAbstraction took 8812.80 ms. Allocated memory was 1.1 GB in the beginning and 1.4 GB in the end (delta: 250.6 MB). Free memory was 1.0 GB in the beginning and 699.4 MB in the end (delta: 302.9 MB). Peak memory consumption was 553.5 MB. Max. memory is 11.5 GB. * Witness Printer took 64.47 ms. Allocated memory is still 1.4 GB. Free memory was 699.4 MB in the beginning and 669.2 MB in the end (delta: 30.2 MB). Peak memory consumption was 30.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 4.3s, 189 ProgramPointsBefore, 72 ProgramPointsAfterwards, 212 TransitionsBefore, 76 TransitionsAfterwards, 13674 CoEnabledTransitionPairs, 9 FixpointIterations, 57 TrivialSequentialCompositions, 52 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 42 ConcurrentYvCompositions, 24 ChoiceCompositions, 5624 VarBasedMoverChecksPositive, 153 VarBasedMoverChecksNegative, 29 SemBasedMoverChecksPositive, 174 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.6s, 0 MoverChecksTotal, 46543 CheckedPairsTotal, 151 TotalNumberOfCompositions - CounterExampleResult [Line: 5]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L847] FCALL, FORK 0 pthread_create(&t2725, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a={7:0}, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice1=0, weak$$choice2=0, x=0, y=0, z=0] [L758] 1 weak$$choice0 = __VERIFIER_nondet_bool() [L759] 1 weak$$choice2 = __VERIFIER_nondet_bool() [L760] 1 a$flush_delayed = weak$$choice2 [L761] EXPR 1 \read(a) [L761] 1 a$mem_tmp = a [L762] EXPR 1 !a$w_buff0_used || !a$r_buff0_thd1 && !a$w_buff1_used || !a$r_buff0_thd1 && !a$r_buff1_thd1 ? a : (a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : a$w_buff1) [L762] EXPR 1 \read(a) [L762] EXPR 1 !a$w_buff0_used || !a$r_buff0_thd1 && !a$w_buff1_used || !a$r_buff0_thd1 && !a$r_buff1_thd1 ? a : (a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : a$w_buff1) VAL [!a$w_buff0_used || !a$r_buff0_thd1 && !a$w_buff1_used || !a$r_buff0_thd1 && !a$r_buff1_thd1 ? a : (a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : a$w_buff1)=0, \read(a)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a={7:0}, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=0, y=0, z=0] [L762] 1 a = !a$w_buff0_used || !a$r_buff0_thd1 && !a$w_buff1_used || !a$r_buff0_thd1 && !a$r_buff1_thd1 ? a : (a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : a$w_buff1) [L849] FCALL, FORK 0 pthread_create(&t2726, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=0, __unbuffered_p0_EAX$read_delayed_var={0:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=0, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a={7:0}, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=0, y=0, z=0] [L765] 1 a$w_buff0_used = weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd1 && !a$w_buff1_used || !a$r_buff0_thd1 && !a$r_buff1_thd1 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : a$w_buff0_used)) [L766] 1 a$w_buff1_used = weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd1 && !a$w_buff1_used || !a$r_buff0_thd1 && !a$r_buff1_thd1 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : (_Bool)0)) [L851] FCALL, FORK 0 pthread_create(&t2727, ((void *)0), P2, ((void *)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={7:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=0, __unbuffered_p3_EAX=0, a={7:0}, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z=0] [L853] FCALL, FORK 0 pthread_create(&t2728, ((void *)0), P3, ((void *)0)) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={7:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p3_EAX=0, a={7:0}, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z=1] [L818] 4 __unbuffered_p3_EAX = z [L821] 4 a = 1 VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={7:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p3_EAX=1, a={7:0}, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z=1] [L824] 4 a$w_buff0_used && a$r_buff0_thd4 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd4 ? a$w_buff1 : a) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={7:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p3_EAX=1, a={7:0}, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z=1] [L825] 4 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd4 ? (_Bool)0 : a$w_buff0_used [L826] 4 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd4 || a$w_buff1_used && a$r_buff1_thd4 ? (_Bool)0 : a$w_buff1_used [L855] 0 main$tmp_guard0 = __unbuffered_cnt == 4 VAL [\result={0:0}, \result={0:0}, \result={0:0}, __unbuffered_cnt=4, __unbuffered_p0_EAX=0, __unbuffered_p0_EAX$flush_delayed=0, __unbuffered_p0_EAX$mem_tmp=0, __unbuffered_p0_EAX$r_buff0_thd0=0, __unbuffered_p0_EAX$r_buff0_thd1=0, __unbuffered_p0_EAX$r_buff0_thd2=0, __unbuffered_p0_EAX$r_buff0_thd3=0, __unbuffered_p0_EAX$r_buff0_thd4=0, __unbuffered_p0_EAX$r_buff1_thd0=0, __unbuffered_p0_EAX$r_buff1_thd1=0, __unbuffered_p0_EAX$r_buff1_thd2=0, __unbuffered_p0_EAX$r_buff1_thd3=0, __unbuffered_p0_EAX$r_buff1_thd4=0, __unbuffered_p0_EAX$read_delayed=1, __unbuffered_p0_EAX$read_delayed_var={7:0}, __unbuffered_p0_EAX$w_buff0=0, __unbuffered_p0_EAX$w_buff0_used=0, __unbuffered_p0_EAX$w_buff1=0, __unbuffered_p0_EAX$w_buff1_used=0, __unbuffered_p1_EAX=1, __unbuffered_p2_EAX=1, __unbuffered_p3_EAX=1, a={7:0}, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff0_thd4=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$r_buff1_thd4=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=2, weak$$choice1=0, weak$$choice2=1, x=1, y=1, z=1] [L859] 0 a = a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) [L860] 0 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$w_buff0_used [L861] 0 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$w_buff1_used - StatisticsResult: Ultimate Automizer benchmark data CFG has 5 procedures, 177 locations, 1 error locations. Result: UNSAFE, OverallTime: 8.6s, OverallIterations: 11, TraceHistogramMax: 1, AutomataDifference: 1.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 801 SDtfs, 1650 SDslu, 1449 SDs, 0 SdLazy, 203 SolverSat, 118 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 56 GetRequests, 11 SyntacticMatches, 3 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=20306occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 1.2s AutomataMinimizationTime, 10 MinimizatonAttempts, 292 StatesRemovedByMinimization, 1 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.4s InterpolantComputationTime, 372 NumberOfCodeBlocks, 372 NumberOfCodeBlocksAsserted, 11 NumberOfCheckSat, 316 ConstructedInterpolants, 0 QuantifiedInterpolants, 38422 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 10 InterpolantComputations, 10 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...