./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/systemc/token_ring.03.cil-1.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_eaece430-2a93-48f9-a54f-86a017aca8db/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_eaece430-2a93-48f9-a54f-86a017aca8db/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_eaece430-2a93-48f9-a54f-86a017aca8db/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_eaece430-2a93-48f9-a54f-86a017aca8db/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/systemc/token_ring.03.cil-1.c -s /tmp/vcloud-vcloud-master/worker/run_dir_eaece430-2a93-48f9-a54f-86a017aca8db/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_eaece430-2a93-48f9-a54f-86a017aca8db/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 69fb30bd96659b6c61b59030d7ea8c3053fedc35 ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 17:49:34,575 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 17:49:34,576 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 17:49:34,583 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 17:49:34,584 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 17:49:34,584 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 17:49:34,585 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 17:49:34,587 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 17:49:34,588 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 17:49:34,588 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 17:49:34,589 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 17:49:34,590 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 17:49:34,590 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 17:49:34,591 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 17:49:34,591 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 17:49:34,592 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 17:49:34,593 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 17:49:34,593 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 17:49:34,595 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 17:49:34,596 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 17:49:34,597 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 17:49:34,598 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 17:49:34,599 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 17:49:34,599 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 17:49:34,601 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 17:49:34,601 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 17:49:34,601 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 17:49:34,602 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 17:49:34,602 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 17:49:34,602 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 17:49:34,603 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 17:49:34,603 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 17:49:34,603 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 17:49:34,604 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 17:49:34,604 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 17:49:34,605 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 17:49:34,605 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 17:49:34,605 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 17:49:34,605 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 17:49:34,606 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 17:49:34,606 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 17:49:34,607 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_eaece430-2a93-48f9-a54f-86a017aca8db/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 17:49:34,616 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 17:49:34,616 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 17:49:34,617 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 17:49:34,617 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 17:49:34,617 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 17:49:34,618 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 17:49:34,618 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 17:49:34,618 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 17:49:34,618 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 17:49:34,618 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 17:49:34,618 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 17:49:34,618 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 17:49:34,618 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 17:49:34,619 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 17:49:34,619 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 17:49:34,619 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 17:49:34,619 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 17:49:34,619 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 17:49:34,619 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 17:49:34,619 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 17:49:34,620 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 17:49:34,620 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:49:34,620 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 17:49:34,620 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 17:49:34,620 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 17:49:34,620 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 17:49:34,620 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 17:49:34,621 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 17:49:34,621 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 17:49:34,621 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_eaece430-2a93-48f9-a54f-86a017aca8db/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 69fb30bd96659b6c61b59030d7ea8c3053fedc35 [2019-12-07 17:49:34,720 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 17:49:34,728 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 17:49:34,730 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 17:49:34,731 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 17:49:34,731 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 17:49:34,732 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_eaece430-2a93-48f9-a54f-86a017aca8db/bin/uautomizer/../../sv-benchmarks/c/systemc/token_ring.03.cil-1.c [2019-12-07 17:49:34,769 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_eaece430-2a93-48f9-a54f-86a017aca8db/bin/uautomizer/data/174b70d6b/39f5fd9470d24b17a38fe7133aff2596/FLAG90cc6a969 [2019-12-07 17:49:35,229 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 17:49:35,230 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_eaece430-2a93-48f9-a54f-86a017aca8db/sv-benchmarks/c/systemc/token_ring.03.cil-1.c [2019-12-07 17:49:35,237 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_eaece430-2a93-48f9-a54f-86a017aca8db/bin/uautomizer/data/174b70d6b/39f5fd9470d24b17a38fe7133aff2596/FLAG90cc6a969 [2019-12-07 17:49:35,245 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_eaece430-2a93-48f9-a54f-86a017aca8db/bin/uautomizer/data/174b70d6b/39f5fd9470d24b17a38fe7133aff2596 [2019-12-07 17:49:35,247 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 17:49:35,248 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 17:49:35,249 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 17:49:35,249 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 17:49:35,251 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 17:49:35,252 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:49:35" (1/1) ... [2019-12-07 17:49:35,254 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6d97e9b8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:49:35, skipping insertion in model container [2019-12-07 17:49:35,254 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 05:49:35" (1/1) ... [2019-12-07 17:49:35,259 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 17:49:35,281 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 17:49:35,452 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:49:35,455 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 17:49:35,486 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 17:49:35,499 INFO L208 MainTranslator]: Completed translation [2019-12-07 17:49:35,499 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:49:35 WrapperNode [2019-12-07 17:49:35,499 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 17:49:35,500 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 17:49:35,500 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 17:49:35,500 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 17:49:35,505 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:49:35" (1/1) ... [2019-12-07 17:49:35,511 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:49:35" (1/1) ... [2019-12-07 17:49:35,540 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 17:49:35,540 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 17:49:35,540 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 17:49:35,541 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 17:49:35,547 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:49:35" (1/1) ... [2019-12-07 17:49:35,547 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:49:35" (1/1) ... [2019-12-07 17:49:35,551 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:49:35" (1/1) ... [2019-12-07 17:49:35,551 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:49:35" (1/1) ... [2019-12-07 17:49:35,560 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:49:35" (1/1) ... [2019-12-07 17:49:35,572 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:49:35" (1/1) ... [2019-12-07 17:49:35,575 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:49:35" (1/1) ... [2019-12-07 17:49:35,579 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 17:49:35,580 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 17:49:35,580 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 17:49:35,580 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 17:49:35,580 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:49:35" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_eaece430-2a93-48f9-a54f-86a017aca8db/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 17:49:35,621 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 17:49:35,621 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 17:49:36,115 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 17:49:36,115 INFO L287 CfgBuilder]: Removed 132 assume(true) statements. [2019-12-07 17:49:36,116 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:49:36 BoogieIcfgContainer [2019-12-07 17:49:36,116 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 17:49:36,117 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 17:49:36,117 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 17:49:36,119 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 17:49:36,119 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 05:49:35" (1/3) ... [2019-12-07 17:49:36,120 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@df71ac0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:49:36, skipping insertion in model container [2019-12-07 17:49:36,120 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 05:49:35" (2/3) ... [2019-12-07 17:49:36,120 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@df71ac0 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 05:49:36, skipping insertion in model container [2019-12-07 17:49:36,120 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:49:36" (3/3) ... [2019-12-07 17:49:36,121 INFO L109 eAbstractionObserver]: Analyzing ICFG token_ring.03.cil-1.c [2019-12-07 17:49:36,127 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 17:49:36,132 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 17:49:36,139 INFO L249 AbstractCegarLoop]: Starting to check reachability of 2 error locations. [2019-12-07 17:49:36,159 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 17:49:36,160 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 17:49:36,160 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 17:49:36,160 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 17:49:36,160 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 17:49:36,160 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 17:49:36,160 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 17:49:36,160 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 17:49:36,177 INFO L276 IsEmpty]: Start isEmpty. Operand 316 states. [2019-12-07 17:49:36,182 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2019-12-07 17:49:36,183 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:36,183 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:36,183 INFO L410 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:36,187 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:36,187 INFO L82 PathProgramCache]: Analyzing trace with hash -1976596934, now seen corresponding path program 1 times [2019-12-07 17:49:36,193 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:36,193 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [673384116] [2019-12-07 17:49:36,193 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:36,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:36,297 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:36,298 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [673384116] [2019-12-07 17:49:36,298 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:36,298 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:49:36,299 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2093114240] [2019-12-07 17:49:36,302 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:49:36,302 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:36,310 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:49:36,311 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:36,312 INFO L87 Difference]: Start difference. First operand 316 states. Second operand 3 states. [2019-12-07 17:49:36,355 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:36,355 INFO L93 Difference]: Finished difference Result 627 states and 979 transitions. [2019-12-07 17:49:36,356 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:49:36,357 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2019-12-07 17:49:36,357 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:36,366 INFO L225 Difference]: With dead ends: 627 [2019-12-07 17:49:36,367 INFO L226 Difference]: Without dead ends: 312 [2019-12-07 17:49:36,370 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:36,382 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 312 states. [2019-12-07 17:49:36,407 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 312 to 312. [2019-12-07 17:49:36,408 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 312 states. [2019-12-07 17:49:36,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 312 states to 312 states and 474 transitions. [2019-12-07 17:49:36,410 INFO L78 Accepts]: Start accepts. Automaton has 312 states and 474 transitions. Word has length 61 [2019-12-07 17:49:36,410 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:36,411 INFO L462 AbstractCegarLoop]: Abstraction has 312 states and 474 transitions. [2019-12-07 17:49:36,411 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:49:36,411 INFO L276 IsEmpty]: Start isEmpty. Operand 312 states and 474 transitions. [2019-12-07 17:49:36,412 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2019-12-07 17:49:36,412 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:36,412 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:36,413 INFO L410 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:36,413 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:36,413 INFO L82 PathProgramCache]: Analyzing trace with hash 1057453112, now seen corresponding path program 1 times [2019-12-07 17:49:36,413 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:36,413 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [291784996] [2019-12-07 17:49:36,413 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:36,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:36,448 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:36,448 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [291784996] [2019-12-07 17:49:36,448 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:36,448 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:49:36,448 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1299533067] [2019-12-07 17:49:36,449 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:49:36,449 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:36,450 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:49:36,450 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:36,450 INFO L87 Difference]: Start difference. First operand 312 states and 474 transitions. Second operand 3 states. [2019-12-07 17:49:36,491 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:36,491 INFO L93 Difference]: Finished difference Result 848 states and 1286 transitions. [2019-12-07 17:49:36,491 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:49:36,491 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2019-12-07 17:49:36,491 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:36,494 INFO L225 Difference]: With dead ends: 848 [2019-12-07 17:49:36,495 INFO L226 Difference]: Without dead ends: 544 [2019-12-07 17:49:36,496 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:36,497 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 544 states. [2019-12-07 17:49:36,522 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 544 to 540. [2019-12-07 17:49:36,522 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 540 states. [2019-12-07 17:49:36,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 540 states to 540 states and 818 transitions. [2019-12-07 17:49:36,524 INFO L78 Accepts]: Start accepts. Automaton has 540 states and 818 transitions. Word has length 61 [2019-12-07 17:49:36,524 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:36,524 INFO L462 AbstractCegarLoop]: Abstraction has 540 states and 818 transitions. [2019-12-07 17:49:36,524 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:49:36,525 INFO L276 IsEmpty]: Start isEmpty. Operand 540 states and 818 transitions. [2019-12-07 17:49:36,526 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2019-12-07 17:49:36,526 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:36,526 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:36,526 INFO L410 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:36,526 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:36,526 INFO L82 PathProgramCache]: Analyzing trace with hash 1933472118, now seen corresponding path program 1 times [2019-12-07 17:49:36,526 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:36,527 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2093215130] [2019-12-07 17:49:36,527 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:36,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:36,557 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:36,558 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2093215130] [2019-12-07 17:49:36,558 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:36,558 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:49:36,558 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [709508746] [2019-12-07 17:49:36,559 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:49:36,559 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:36,559 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:49:36,559 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:36,560 INFO L87 Difference]: Start difference. First operand 540 states and 818 transitions. Second operand 3 states. [2019-12-07 17:49:36,589 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:36,589 INFO L93 Difference]: Finished difference Result 1071 states and 1623 transitions. [2019-12-07 17:49:36,589 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:49:36,589 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2019-12-07 17:49:36,589 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:36,592 INFO L225 Difference]: With dead ends: 1071 [2019-12-07 17:49:36,593 INFO L226 Difference]: Without dead ends: 540 [2019-12-07 17:49:36,594 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:36,595 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 540 states. [2019-12-07 17:49:36,615 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 540 to 540. [2019-12-07 17:49:36,615 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 540 states. [2019-12-07 17:49:36,617 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 540 states to 540 states and 810 transitions. [2019-12-07 17:49:36,617 INFO L78 Accepts]: Start accepts. Automaton has 540 states and 810 transitions. Word has length 61 [2019-12-07 17:49:36,617 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:36,617 INFO L462 AbstractCegarLoop]: Abstraction has 540 states and 810 transitions. [2019-12-07 17:49:36,617 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:49:36,617 INFO L276 IsEmpty]: Start isEmpty. Operand 540 states and 810 transitions. [2019-12-07 17:49:36,618 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2019-12-07 17:49:36,618 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:36,618 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:36,618 INFO L410 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:36,619 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:36,619 INFO L82 PathProgramCache]: Analyzing trace with hash -1494892678, now seen corresponding path program 1 times [2019-12-07 17:49:36,619 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:36,619 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1839970834] [2019-12-07 17:49:36,619 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:36,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:36,644 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:36,645 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1839970834] [2019-12-07 17:49:36,645 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:36,645 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:49:36,645 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [477278451] [2019-12-07 17:49:36,646 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:49:36,646 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:36,646 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:49:36,646 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:36,646 INFO L87 Difference]: Start difference. First operand 540 states and 810 transitions. Second operand 3 states. [2019-12-07 17:49:36,672 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:36,672 INFO L93 Difference]: Finished difference Result 1070 states and 1606 transitions. [2019-12-07 17:49:36,673 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:49:36,673 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2019-12-07 17:49:36,673 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:36,675 INFO L225 Difference]: With dead ends: 1070 [2019-12-07 17:49:36,676 INFO L226 Difference]: Without dead ends: 540 [2019-12-07 17:49:36,676 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:36,678 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 540 states. [2019-12-07 17:49:36,693 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 540 to 540. [2019-12-07 17:49:36,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 540 states. [2019-12-07 17:49:36,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 540 states to 540 states and 802 transitions. [2019-12-07 17:49:36,695 INFO L78 Accepts]: Start accepts. Automaton has 540 states and 802 transitions. Word has length 61 [2019-12-07 17:49:36,696 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:36,696 INFO L462 AbstractCegarLoop]: Abstraction has 540 states and 802 transitions. [2019-12-07 17:49:36,696 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:49:36,696 INFO L276 IsEmpty]: Start isEmpty. Operand 540 states and 802 transitions. [2019-12-07 17:49:36,697 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2019-12-07 17:49:36,697 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:36,697 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:36,697 INFO L410 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:36,697 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:36,697 INFO L82 PathProgramCache]: Analyzing trace with hash -774201098, now seen corresponding path program 1 times [2019-12-07 17:49:36,698 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:36,698 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [102487046] [2019-12-07 17:49:36,698 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:36,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:36,722 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:36,722 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [102487046] [2019-12-07 17:49:36,722 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:36,722 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:49:36,722 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1671752893] [2019-12-07 17:49:36,723 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:49:36,723 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:36,723 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:49:36,723 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:36,723 INFO L87 Difference]: Start difference. First operand 540 states and 802 transitions. Second operand 3 states. [2019-12-07 17:49:36,750 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:36,751 INFO L93 Difference]: Finished difference Result 1069 states and 1589 transitions. [2019-12-07 17:49:36,751 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:49:36,751 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2019-12-07 17:49:36,751 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:36,754 INFO L225 Difference]: With dead ends: 1069 [2019-12-07 17:49:36,754 INFO L226 Difference]: Without dead ends: 540 [2019-12-07 17:49:36,755 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:36,756 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 540 states. [2019-12-07 17:49:36,772 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 540 to 540. [2019-12-07 17:49:36,772 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 540 states. [2019-12-07 17:49:36,774 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 540 states to 540 states and 794 transitions. [2019-12-07 17:49:36,774 INFO L78 Accepts]: Start accepts. Automaton has 540 states and 794 transitions. Word has length 61 [2019-12-07 17:49:36,774 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:36,774 INFO L462 AbstractCegarLoop]: Abstraction has 540 states and 794 transitions. [2019-12-07 17:49:36,774 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:49:36,775 INFO L276 IsEmpty]: Start isEmpty. Operand 540 states and 794 transitions. [2019-12-07 17:49:36,775 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2019-12-07 17:49:36,775 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:36,776 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:36,776 INFO L410 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:36,776 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:36,776 INFO L82 PathProgramCache]: Analyzing trace with hash -196763654, now seen corresponding path program 1 times [2019-12-07 17:49:36,776 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:36,776 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [304193163] [2019-12-07 17:49:36,777 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:36,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:36,799 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:36,800 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [304193163] [2019-12-07 17:49:36,800 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:36,800 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:49:36,800 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [126572184] [2019-12-07 17:49:36,800 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:49:36,801 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:36,801 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:49:36,801 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:36,801 INFO L87 Difference]: Start difference. First operand 540 states and 794 transitions. Second operand 3 states. [2019-12-07 17:49:36,845 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:36,845 INFO L93 Difference]: Finished difference Result 1068 states and 1572 transitions. [2019-12-07 17:49:36,846 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:49:36,846 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2019-12-07 17:49:36,846 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:36,849 INFO L225 Difference]: With dead ends: 1068 [2019-12-07 17:49:36,849 INFO L226 Difference]: Without dead ends: 540 [2019-12-07 17:49:36,850 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:36,852 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 540 states. [2019-12-07 17:49:36,874 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 540 to 540. [2019-12-07 17:49:36,874 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 540 states. [2019-12-07 17:49:36,876 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 540 states to 540 states and 776 transitions. [2019-12-07 17:49:36,877 INFO L78 Accepts]: Start accepts. Automaton has 540 states and 776 transitions. Word has length 61 [2019-12-07 17:49:36,877 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:36,877 INFO L462 AbstractCegarLoop]: Abstraction has 540 states and 776 transitions. [2019-12-07 17:49:36,877 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:49:36,877 INFO L276 IsEmpty]: Start isEmpty. Operand 540 states and 776 transitions. [2019-12-07 17:49:36,878 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2019-12-07 17:49:36,878 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:36,878 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:36,879 INFO L410 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:36,879 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:36,879 INFO L82 PathProgramCache]: Analyzing trace with hash 749500983, now seen corresponding path program 1 times [2019-12-07 17:49:36,879 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:36,879 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1737921427] [2019-12-07 17:49:36,880 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:36,886 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:36,912 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:36,913 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1737921427] [2019-12-07 17:49:36,913 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:36,913 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:49:36,913 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2051788343] [2019-12-07 17:49:36,913 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:49:36,914 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:36,914 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:49:36,914 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:36,914 INFO L87 Difference]: Start difference. First operand 540 states and 776 transitions. Second operand 3 states. [2019-12-07 17:49:36,954 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:36,954 INFO L93 Difference]: Finished difference Result 1066 states and 1533 transitions. [2019-12-07 17:49:36,955 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:49:36,955 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2019-12-07 17:49:36,955 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:36,958 INFO L225 Difference]: With dead ends: 1066 [2019-12-07 17:49:36,958 INFO L226 Difference]: Without dead ends: 540 [2019-12-07 17:49:36,959 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:36,960 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 540 states. [2019-12-07 17:49:36,977 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 540 to 540. [2019-12-07 17:49:36,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 540 states. [2019-12-07 17:49:36,979 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 540 states to 540 states and 758 transitions. [2019-12-07 17:49:36,979 INFO L78 Accepts]: Start accepts. Automaton has 540 states and 758 transitions. Word has length 61 [2019-12-07 17:49:36,979 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:36,979 INFO L462 AbstractCegarLoop]: Abstraction has 540 states and 758 transitions. [2019-12-07 17:49:36,979 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:49:36,979 INFO L276 IsEmpty]: Start isEmpty. Operand 540 states and 758 transitions. [2019-12-07 17:49:36,980 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2019-12-07 17:49:36,980 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:36,980 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:36,980 INFO L410 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:36,980 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:36,980 INFO L82 PathProgramCache]: Analyzing trace with hash 91036916, now seen corresponding path program 1 times [2019-12-07 17:49:36,980 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:36,981 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [952971782] [2019-12-07 17:49:36,981 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:36,988 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:37,003 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:37,003 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [952971782] [2019-12-07 17:49:37,003 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:37,003 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:49:37,004 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2140958599] [2019-12-07 17:49:37,004 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:49:37,004 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:37,004 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:49:37,004 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:37,005 INFO L87 Difference]: Start difference. First operand 540 states and 758 transitions. Second operand 3 states. [2019-12-07 17:49:37,040 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:37,040 INFO L93 Difference]: Finished difference Result 1065 states and 1496 transitions. [2019-12-07 17:49:37,040 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:49:37,040 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2019-12-07 17:49:37,041 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:37,043 INFO L225 Difference]: With dead ends: 1065 [2019-12-07 17:49:37,043 INFO L226 Difference]: Without dead ends: 540 [2019-12-07 17:49:37,044 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:37,044 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 540 states. [2019-12-07 17:49:37,057 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 540 to 540. [2019-12-07 17:49:37,057 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 540 states. [2019-12-07 17:49:37,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 540 states to 540 states and 740 transitions. [2019-12-07 17:49:37,059 INFO L78 Accepts]: Start accepts. Automaton has 540 states and 740 transitions. Word has length 61 [2019-12-07 17:49:37,059 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:37,059 INFO L462 AbstractCegarLoop]: Abstraction has 540 states and 740 transitions. [2019-12-07 17:49:37,059 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:49:37,060 INFO L276 IsEmpty]: Start isEmpty. Operand 540 states and 740 transitions. [2019-12-07 17:49:37,060 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2019-12-07 17:49:37,060 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:37,060 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:37,060 INFO L410 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:37,061 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:37,061 INFO L82 PathProgramCache]: Analyzing trace with hash 1080534521, now seen corresponding path program 1 times [2019-12-07 17:49:37,061 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:37,061 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [501344897] [2019-12-07 17:49:37,061 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:37,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:37,090 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:37,090 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [501344897] [2019-12-07 17:49:37,090 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:37,090 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:49:37,090 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1803591063] [2019-12-07 17:49:37,091 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:49:37,091 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:37,091 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:49:37,091 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:37,091 INFO L87 Difference]: Start difference. First operand 540 states and 740 transitions. Second operand 3 states. [2019-12-07 17:49:37,124 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:37,125 INFO L93 Difference]: Finished difference Result 1067 states and 1463 transitions. [2019-12-07 17:49:37,125 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:49:37,125 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2019-12-07 17:49:37,126 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:37,128 INFO L225 Difference]: With dead ends: 1067 [2019-12-07 17:49:37,128 INFO L226 Difference]: Without dead ends: 540 [2019-12-07 17:49:37,129 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:37,129 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 540 states. [2019-12-07 17:49:37,142 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 540 to 540. [2019-12-07 17:49:37,142 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 540 states. [2019-12-07 17:49:37,144 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 540 states to 540 states and 722 transitions. [2019-12-07 17:49:37,144 INFO L78 Accepts]: Start accepts. Automaton has 540 states and 722 transitions. Word has length 61 [2019-12-07 17:49:37,144 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:37,144 INFO L462 AbstractCegarLoop]: Abstraction has 540 states and 722 transitions. [2019-12-07 17:49:37,144 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:49:37,144 INFO L276 IsEmpty]: Start isEmpty. Operand 540 states and 722 transitions. [2019-12-07 17:49:37,144 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2019-12-07 17:49:37,145 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:37,145 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:37,145 INFO L410 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:37,145 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:37,145 INFO L82 PathProgramCache]: Analyzing trace with hash -507813381, now seen corresponding path program 1 times [2019-12-07 17:49:37,145 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:37,145 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [529409829] [2019-12-07 17:49:37,145 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:37,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:37,170 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:37,170 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [529409829] [2019-12-07 17:49:37,170 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:37,170 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:49:37,170 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1279881371] [2019-12-07 17:49:37,171 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:49:37,171 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:37,171 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:49:37,171 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:37,171 INFO L87 Difference]: Start difference. First operand 540 states and 722 transitions. Second operand 3 states. [2019-12-07 17:49:37,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:37,224 INFO L93 Difference]: Finished difference Result 1522 states and 2039 transitions. [2019-12-07 17:49:37,224 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:49:37,224 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 61 [2019-12-07 17:49:37,224 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:37,228 INFO L225 Difference]: With dead ends: 1522 [2019-12-07 17:49:37,228 INFO L226 Difference]: Without dead ends: 999 [2019-12-07 17:49:37,229 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:37,230 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 999 states. [2019-12-07 17:49:37,254 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 999 to 947. [2019-12-07 17:49:37,254 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 947 states. [2019-12-07 17:49:37,257 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 947 states to 947 states and 1256 transitions. [2019-12-07 17:49:37,257 INFO L78 Accepts]: Start accepts. Automaton has 947 states and 1256 transitions. Word has length 61 [2019-12-07 17:49:37,257 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:37,257 INFO L462 AbstractCegarLoop]: Abstraction has 947 states and 1256 transitions. [2019-12-07 17:49:37,257 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:49:37,257 INFO L276 IsEmpty]: Start isEmpty. Operand 947 states and 1256 transitions. [2019-12-07 17:49:37,258 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2019-12-07 17:49:37,258 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:37,258 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:37,258 INFO L410 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:37,259 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:37,259 INFO L82 PathProgramCache]: Analyzing trace with hash -624063038, now seen corresponding path program 1 times [2019-12-07 17:49:37,259 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:37,259 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [113011084] [2019-12-07 17:49:37,259 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:37,269 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:37,296 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:37,296 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [113011084] [2019-12-07 17:49:37,296 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:37,296 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:49:37,296 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [536317064] [2019-12-07 17:49:37,296 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:49:37,297 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:37,297 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:49:37,297 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:37,297 INFO L87 Difference]: Start difference. First operand 947 states and 1256 transitions. Second operand 3 states. [2019-12-07 17:49:37,379 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:37,379 INFO L93 Difference]: Finished difference Result 2713 states and 3613 transitions. [2019-12-07 17:49:37,379 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:49:37,379 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 99 [2019-12-07 17:49:37,380 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:37,387 INFO L225 Difference]: With dead ends: 2713 [2019-12-07 17:49:37,387 INFO L226 Difference]: Without dead ends: 1789 [2019-12-07 17:49:37,388 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:37,390 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1789 states. [2019-12-07 17:49:37,431 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1789 to 1701. [2019-12-07 17:49:37,431 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1701 states. [2019-12-07 17:49:37,435 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1701 states to 1701 states and 2254 transitions. [2019-12-07 17:49:37,436 INFO L78 Accepts]: Start accepts. Automaton has 1701 states and 2254 transitions. Word has length 99 [2019-12-07 17:49:37,436 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:37,436 INFO L462 AbstractCegarLoop]: Abstraction has 1701 states and 2254 transitions. [2019-12-07 17:49:37,436 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:49:37,436 INFO L276 IsEmpty]: Start isEmpty. Operand 1701 states and 2254 transitions. [2019-12-07 17:49:37,437 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2019-12-07 17:49:37,437 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:37,437 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:37,438 INFO L410 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:37,438 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:37,438 INFO L82 PathProgramCache]: Analyzing trace with hash 2094346499, now seen corresponding path program 1 times [2019-12-07 17:49:37,438 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:37,438 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1242119254] [2019-12-07 17:49:37,438 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:37,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:37,473 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:37,474 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1242119254] [2019-12-07 17:49:37,474 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:37,474 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:49:37,474 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [696778172] [2019-12-07 17:49:37,474 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:49:37,474 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:37,474 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:49:37,475 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:49:37,475 INFO L87 Difference]: Start difference. First operand 1701 states and 2254 transitions. Second operand 5 states. [2019-12-07 17:49:37,629 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:37,629 INFO L93 Difference]: Finished difference Result 3741 states and 4988 transitions. [2019-12-07 17:49:37,630 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:49:37,630 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 99 [2019-12-07 17:49:37,630 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:37,638 INFO L225 Difference]: With dead ends: 3741 [2019-12-07 17:49:37,638 INFO L226 Difference]: Without dead ends: 2067 [2019-12-07 17:49:37,640 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:49:37,643 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2067 states. [2019-12-07 17:49:37,696 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2067 to 1707. [2019-12-07 17:49:37,696 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1707 states. [2019-12-07 17:49:37,700 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1707 states to 1707 states and 2225 transitions. [2019-12-07 17:49:37,700 INFO L78 Accepts]: Start accepts. Automaton has 1707 states and 2225 transitions. Word has length 99 [2019-12-07 17:49:37,701 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:37,701 INFO L462 AbstractCegarLoop]: Abstraction has 1707 states and 2225 transitions. [2019-12-07 17:49:37,701 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:49:37,701 INFO L276 IsEmpty]: Start isEmpty. Operand 1707 states and 2225 transitions. [2019-12-07 17:49:37,702 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2019-12-07 17:49:37,702 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:37,702 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:37,703 INFO L410 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:37,703 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:37,703 INFO L82 PathProgramCache]: Analyzing trace with hash 1569507335, now seen corresponding path program 1 times [2019-12-07 17:49:37,703 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:37,703 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [715428972] [2019-12-07 17:49:37,703 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:37,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:37,734 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:37,735 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [715428972] [2019-12-07 17:49:37,735 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:37,735 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:49:37,735 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2010933817] [2019-12-07 17:49:37,735 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:49:37,735 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:37,735 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:49:37,736 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:49:37,736 INFO L87 Difference]: Start difference. First operand 1707 states and 2225 transitions. Second operand 5 states. [2019-12-07 17:49:37,908 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:37,908 INFO L93 Difference]: Finished difference Result 4182 states and 5468 transitions. [2019-12-07 17:49:37,908 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:49:37,908 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 99 [2019-12-07 17:49:37,909 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:37,918 INFO L225 Difference]: With dead ends: 4182 [2019-12-07 17:49:37,918 INFO L226 Difference]: Without dead ends: 2509 [2019-12-07 17:49:37,920 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:49:37,923 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2509 states. [2019-12-07 17:49:37,979 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2509 to 1719. [2019-12-07 17:49:37,979 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1719 states. [2019-12-07 17:49:37,983 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1719 states to 1719 states and 2204 transitions. [2019-12-07 17:49:37,983 INFO L78 Accepts]: Start accepts. Automaton has 1719 states and 2204 transitions. Word has length 99 [2019-12-07 17:49:37,983 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:37,983 INFO L462 AbstractCegarLoop]: Abstraction has 1719 states and 2204 transitions. [2019-12-07 17:49:37,984 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:49:37,984 INFO L276 IsEmpty]: Start isEmpty. Operand 1719 states and 2204 transitions. [2019-12-07 17:49:37,985 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2019-12-07 17:49:37,985 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:37,985 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:37,985 INFO L410 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:37,985 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:37,985 INFO L82 PathProgramCache]: Analyzing trace with hash -1452084725, now seen corresponding path program 1 times [2019-12-07 17:49:37,986 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:37,986 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [566960556] [2019-12-07 17:49:37,986 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:37,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:38,014 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:38,014 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [566960556] [2019-12-07 17:49:38,014 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:38,014 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:49:38,015 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1300727018] [2019-12-07 17:49:38,015 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:49:38,015 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:38,015 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:49:38,015 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:49:38,015 INFO L87 Difference]: Start difference. First operand 1719 states and 2204 transitions. Second operand 5 states. [2019-12-07 17:49:38,196 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:38,196 INFO L93 Difference]: Finished difference Result 4879 states and 6330 transitions. [2019-12-07 17:49:38,197 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:49:38,197 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 99 [2019-12-07 17:49:38,197 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:38,209 INFO L225 Difference]: With dead ends: 4879 [2019-12-07 17:49:38,209 INFO L226 Difference]: Without dead ends: 3201 [2019-12-07 17:49:38,211 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:49:38,227 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3201 states. [2019-12-07 17:49:38,297 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3201 to 1743. [2019-12-07 17:49:38,297 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1743 states. [2019-12-07 17:49:38,300 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1743 states to 1743 states and 2199 transitions. [2019-12-07 17:49:38,301 INFO L78 Accepts]: Start accepts. Automaton has 1743 states and 2199 transitions. Word has length 99 [2019-12-07 17:49:38,301 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:38,301 INFO L462 AbstractCegarLoop]: Abstraction has 1743 states and 2199 transitions. [2019-12-07 17:49:38,301 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:49:38,301 INFO L276 IsEmpty]: Start isEmpty. Operand 1743 states and 2199 transitions. [2019-12-07 17:49:38,302 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2019-12-07 17:49:38,302 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:38,302 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:38,302 INFO L410 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:38,302 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:38,302 INFO L82 PathProgramCache]: Analyzing trace with hash -1078857969, now seen corresponding path program 1 times [2019-12-07 17:49:38,303 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:38,303 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1785845205] [2019-12-07 17:49:38,303 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:38,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:38,330 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:38,331 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1785845205] [2019-12-07 17:49:38,331 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:38,331 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:49:38,331 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [370336988] [2019-12-07 17:49:38,331 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:49:38,331 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:38,331 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:49:38,332 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:38,332 INFO L87 Difference]: Start difference. First operand 1743 states and 2199 transitions. Second operand 3 states. [2019-12-07 17:49:38,456 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:38,456 INFO L93 Difference]: Finished difference Result 4925 states and 6187 transitions. [2019-12-07 17:49:38,457 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:49:38,457 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 99 [2019-12-07 17:49:38,457 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:38,468 INFO L225 Difference]: With dead ends: 4925 [2019-12-07 17:49:38,468 INFO L226 Difference]: Without dead ends: 3231 [2019-12-07 17:49:38,470 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:38,474 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3231 states. [2019-12-07 17:49:38,582 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3231 to 3227. [2019-12-07 17:49:38,582 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3227 states. [2019-12-07 17:49:38,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3227 states to 3227 states and 4009 transitions. [2019-12-07 17:49:38,589 INFO L78 Accepts]: Start accepts. Automaton has 3227 states and 4009 transitions. Word has length 99 [2019-12-07 17:49:38,589 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:38,589 INFO L462 AbstractCegarLoop]: Abstraction has 3227 states and 4009 transitions. [2019-12-07 17:49:38,589 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:49:38,589 INFO L276 IsEmpty]: Start isEmpty. Operand 3227 states and 4009 transitions. [2019-12-07 17:49:38,590 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2019-12-07 17:49:38,590 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:38,591 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:38,591 INFO L410 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:38,591 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:38,591 INFO L82 PathProgramCache]: Analyzing trace with hash -1872181795, now seen corresponding path program 1 times [2019-12-07 17:49:38,591 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:38,591 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1263175516] [2019-12-07 17:49:38,591 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:38,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:38,619 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:38,619 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1263175516] [2019-12-07 17:49:38,619 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:38,619 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:49:38,619 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [136983533] [2019-12-07 17:49:38,619 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:49:38,619 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:38,620 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:49:38,620 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:38,620 INFO L87 Difference]: Start difference. First operand 3227 states and 4009 transitions. Second operand 3 states. [2019-12-07 17:49:38,846 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:38,846 INFO L93 Difference]: Finished difference Result 9026 states and 11196 transitions. [2019-12-07 17:49:38,847 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:49:38,847 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 100 [2019-12-07 17:49:38,847 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:38,867 INFO L225 Difference]: With dead ends: 9026 [2019-12-07 17:49:38,867 INFO L226 Difference]: Without dead ends: 5848 [2019-12-07 17:49:38,871 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:38,877 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5848 states. [2019-12-07 17:49:39,066 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5848 to 5844. [2019-12-07 17:49:39,066 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5844 states. [2019-12-07 17:49:39,079 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5844 states to 5844 states and 7200 transitions. [2019-12-07 17:49:39,079 INFO L78 Accepts]: Start accepts. Automaton has 5844 states and 7200 transitions. Word has length 100 [2019-12-07 17:49:39,080 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:39,080 INFO L462 AbstractCegarLoop]: Abstraction has 5844 states and 7200 transitions. [2019-12-07 17:49:39,080 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:49:39,080 INFO L276 IsEmpty]: Start isEmpty. Operand 5844 states and 7200 transitions. [2019-12-07 17:49:39,082 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2019-12-07 17:49:39,082 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:39,082 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:39,082 INFO L410 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:39,083 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:39,083 INFO L82 PathProgramCache]: Analyzing trace with hash -520796577, now seen corresponding path program 1 times [2019-12-07 17:49:39,083 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:39,083 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1812914523] [2019-12-07 17:49:39,083 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:39,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:39,097 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2019-12-07 17:49:39,097 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1812914523] [2019-12-07 17:49:39,097 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:39,098 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:49:39,098 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [769046743] [2019-12-07 17:49:39,098 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:49:39,098 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:39,098 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:49:39,098 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:39,098 INFO L87 Difference]: Start difference. First operand 5844 states and 7200 transitions. Second operand 3 states. [2019-12-07 17:49:39,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:39,359 INFO L93 Difference]: Finished difference Result 11596 states and 14298 transitions. [2019-12-07 17:49:39,359 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:49:39,359 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 100 [2019-12-07 17:49:39,360 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:39,383 INFO L225 Difference]: With dead ends: 11596 [2019-12-07 17:49:39,383 INFO L226 Difference]: Without dead ends: 5801 [2019-12-07 17:49:39,390 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:39,398 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5801 states. [2019-12-07 17:49:39,644 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5801 to 5801. [2019-12-07 17:49:39,644 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5801 states. [2019-12-07 17:49:39,650 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5801 states to 5801 states and 7152 transitions. [2019-12-07 17:49:39,650 INFO L78 Accepts]: Start accepts. Automaton has 5801 states and 7152 transitions. Word has length 100 [2019-12-07 17:49:39,650 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:39,650 INFO L462 AbstractCegarLoop]: Abstraction has 5801 states and 7152 transitions. [2019-12-07 17:49:39,650 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:49:39,650 INFO L276 IsEmpty]: Start isEmpty. Operand 5801 states and 7152 transitions. [2019-12-07 17:49:39,652 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2019-12-07 17:49:39,652 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:39,652 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:39,653 INFO L410 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:39,653 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:39,653 INFO L82 PathProgramCache]: Analyzing trace with hash 1349787928, now seen corresponding path program 1 times [2019-12-07 17:49:39,653 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:39,653 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1764707500] [2019-12-07 17:49:39,653 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:39,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:39,682 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:39,683 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1764707500] [2019-12-07 17:49:39,683 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:39,683 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:49:39,683 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2021353716] [2019-12-07 17:49:39,683 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:49:39,683 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:39,683 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:49:39,684 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:39,684 INFO L87 Difference]: Start difference. First operand 5801 states and 7152 transitions. Second operand 3 states. [2019-12-07 17:49:40,011 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:40,012 INFO L93 Difference]: Finished difference Result 16291 states and 20097 transitions. [2019-12-07 17:49:40,012 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:49:40,012 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 101 [2019-12-07 17:49:40,012 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:40,025 INFO L225 Difference]: With dead ends: 16291 [2019-12-07 17:49:40,025 INFO L226 Difference]: Without dead ends: 10539 [2019-12-07 17:49:40,030 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:40,041 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10539 states. [2019-12-07 17:49:40,342 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10539 to 10535. [2019-12-07 17:49:40,342 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10535 states. [2019-12-07 17:49:40,350 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10535 states to 10535 states and 12941 transitions. [2019-12-07 17:49:40,350 INFO L78 Accepts]: Start accepts. Automaton has 10535 states and 12941 transitions. Word has length 101 [2019-12-07 17:49:40,351 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:40,351 INFO L462 AbstractCegarLoop]: Abstraction has 10535 states and 12941 transitions. [2019-12-07 17:49:40,351 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:49:40,351 INFO L276 IsEmpty]: Start isEmpty. Operand 10535 states and 12941 transitions. [2019-12-07 17:49:40,354 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2019-12-07 17:49:40,354 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:40,354 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:40,354 INFO L410 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:40,355 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:40,355 INFO L82 PathProgramCache]: Analyzing trace with hash -1593794150, now seen corresponding path program 1 times [2019-12-07 17:49:40,355 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:40,355 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1019032118] [2019-12-07 17:49:40,355 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:40,358 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:40,371 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2019-12-07 17:49:40,371 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1019032118] [2019-12-07 17:49:40,372 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:40,372 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:49:40,372 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1986595639] [2019-12-07 17:49:40,372 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:49:40,373 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:40,373 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:49:40,373 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:40,373 INFO L87 Difference]: Start difference. First operand 10535 states and 12941 transitions. Second operand 3 states. [2019-12-07 17:49:40,753 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:40,754 INFO L93 Difference]: Finished difference Result 20979 states and 25783 transitions. [2019-12-07 17:49:40,754 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:49:40,754 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 101 [2019-12-07 17:49:40,754 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:40,769 INFO L225 Difference]: With dead ends: 20979 [2019-12-07 17:49:40,770 INFO L226 Difference]: Without dead ends: 10493 [2019-12-07 17:49:40,780 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:40,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10493 states. [2019-12-07 17:49:41,085 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10493 to 10493. [2019-12-07 17:49:41,085 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10493 states. [2019-12-07 17:49:41,093 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10493 states to 10493 states and 12895 transitions. [2019-12-07 17:49:41,093 INFO L78 Accepts]: Start accepts. Automaton has 10493 states and 12895 transitions. Word has length 101 [2019-12-07 17:49:41,093 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:41,093 INFO L462 AbstractCegarLoop]: Abstraction has 10493 states and 12895 transitions. [2019-12-07 17:49:41,093 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:49:41,093 INFO L276 IsEmpty]: Start isEmpty. Operand 10493 states and 12895 transitions. [2019-12-07 17:49:41,096 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2019-12-07 17:49:41,096 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:41,096 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:41,096 INFO L410 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:41,096 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:41,096 INFO L82 PathProgramCache]: Analyzing trace with hash 988555220, now seen corresponding path program 1 times [2019-12-07 17:49:41,096 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:41,096 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1306787332] [2019-12-07 17:49:41,097 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:41,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:41,118 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:41,118 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1306787332] [2019-12-07 17:49:41,119 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:41,119 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:49:41,119 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1648141886] [2019-12-07 17:49:41,119 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:49:41,119 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:41,119 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:49:41,119 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:41,119 INFO L87 Difference]: Start difference. First operand 10493 states and 12895 transitions. Second operand 3 states. [2019-12-07 17:49:41,714 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:41,714 INFO L93 Difference]: Finished difference Result 29982 states and 36689 transitions. [2019-12-07 17:49:41,715 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:49:41,715 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 102 [2019-12-07 17:49:41,715 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:41,733 INFO L225 Difference]: With dead ends: 29982 [2019-12-07 17:49:41,733 INFO L226 Difference]: Without dead ends: 19538 [2019-12-07 17:49:41,743 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:41,756 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19538 states. [2019-12-07 17:49:42,397 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19538 to 19538. [2019-12-07 17:49:42,397 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19538 states. [2019-12-07 17:49:42,412 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19538 states to 19538 states and 23591 transitions. [2019-12-07 17:49:42,412 INFO L78 Accepts]: Start accepts. Automaton has 19538 states and 23591 transitions. Word has length 102 [2019-12-07 17:49:42,413 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:42,413 INFO L462 AbstractCegarLoop]: Abstraction has 19538 states and 23591 transitions. [2019-12-07 17:49:42,413 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:49:42,413 INFO L276 IsEmpty]: Start isEmpty. Operand 19538 states and 23591 transitions. [2019-12-07 17:49:42,420 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2019-12-07 17:49:42,420 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:42,420 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:42,420 INFO L410 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:42,420 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:42,421 INFO L82 PathProgramCache]: Analyzing trace with hash 490924073, now seen corresponding path program 1 times [2019-12-07 17:49:42,421 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:42,421 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1243531875] [2019-12-07 17:49:42,421 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:42,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:42,452 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:42,452 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1243531875] [2019-12-07 17:49:42,452 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:42,452 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:49:42,452 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1115340875] [2019-12-07 17:49:42,453 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:49:42,453 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:42,453 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:49:42,453 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:42,453 INFO L87 Difference]: Start difference. First operand 19538 states and 23591 transitions. Second operand 3 states. [2019-12-07 17:49:43,320 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:43,320 INFO L93 Difference]: Finished difference Result 47674 states and 57563 transitions. [2019-12-07 17:49:43,321 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:49:43,321 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 131 [2019-12-07 17:49:43,321 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:43,344 INFO L225 Difference]: With dead ends: 47674 [2019-12-07 17:49:43,344 INFO L226 Difference]: Without dead ends: 28204 [2019-12-07 17:49:43,361 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:43,379 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28204 states. [2019-12-07 17:49:44,317 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28204 to 28072. [2019-12-07 17:49:44,317 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28072 states. [2019-12-07 17:49:44,340 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28072 states to 28072 states and 33691 transitions. [2019-12-07 17:49:44,340 INFO L78 Accepts]: Start accepts. Automaton has 28072 states and 33691 transitions. Word has length 131 [2019-12-07 17:49:44,340 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:44,340 INFO L462 AbstractCegarLoop]: Abstraction has 28072 states and 33691 transitions. [2019-12-07 17:49:44,340 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:49:44,340 INFO L276 IsEmpty]: Start isEmpty. Operand 28072 states and 33691 transitions. [2019-12-07 17:49:44,349 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2019-12-07 17:49:44,349 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:44,350 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:44,350 INFO L410 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:44,350 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:44,350 INFO L82 PathProgramCache]: Analyzing trace with hash 293838688, now seen corresponding path program 1 times [2019-12-07 17:49:44,350 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:44,350 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [22780064] [2019-12-07 17:49:44,350 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:44,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:44,381 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:44,381 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [22780064] [2019-12-07 17:49:44,381 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:44,381 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 17:49:44,382 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1838905073] [2019-12-07 17:49:44,382 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:49:44,382 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:44,382 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:49:44,382 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:44,382 INFO L87 Difference]: Start difference. First operand 28072 states and 33691 transitions. Second operand 3 states. [2019-12-07 17:49:45,615 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:45,615 INFO L93 Difference]: Finished difference Result 68432 states and 82087 transitions. [2019-12-07 17:49:45,615 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:49:45,615 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 131 [2019-12-07 17:49:45,616 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:45,644 INFO L225 Difference]: With dead ends: 68432 [2019-12-07 17:49:45,645 INFO L226 Difference]: Without dead ends: 40414 [2019-12-07 17:49:45,658 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:45,689 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40414 states. [2019-12-07 17:49:47,027 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40414 to 40218. [2019-12-07 17:49:47,027 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40218 states. [2019-12-07 17:49:47,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40218 states to 40218 states and 47939 transitions. [2019-12-07 17:49:47,060 INFO L78 Accepts]: Start accepts. Automaton has 40218 states and 47939 transitions. Word has length 131 [2019-12-07 17:49:47,060 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:47,060 INFO L462 AbstractCegarLoop]: Abstraction has 40218 states and 47939 transitions. [2019-12-07 17:49:47,060 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:49:47,060 INFO L276 IsEmpty]: Start isEmpty. Operand 40218 states and 47939 transitions. [2019-12-07 17:49:47,077 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 148 [2019-12-07 17:49:47,077 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:47,077 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:47,077 INFO L410 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:47,077 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:47,078 INFO L82 PathProgramCache]: Analyzing trace with hash 477376696, now seen corresponding path program 1 times [2019-12-07 17:49:47,078 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:47,078 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1540238797] [2019-12-07 17:49:47,078 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:47,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:47,109 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2019-12-07 17:49:47,109 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1540238797] [2019-12-07 17:49:47,109 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:47,109 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:49:47,109 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1945198745] [2019-12-07 17:49:47,110 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:49:47,110 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:47,110 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:49:47,110 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:47,110 INFO L87 Difference]: Start difference. First operand 40218 states and 47939 transitions. Second operand 3 states. [2019-12-07 17:49:48,416 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:48,417 INFO L93 Difference]: Finished difference Result 72088 states and 85999 transitions. [2019-12-07 17:49:48,417 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:49:48,418 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 147 [2019-12-07 17:49:48,418 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:48,446 INFO L225 Difference]: With dead ends: 72088 [2019-12-07 17:49:48,447 INFO L226 Difference]: Without dead ends: 41106 [2019-12-07 17:49:48,462 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:48,485 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41106 states. [2019-12-07 17:49:49,681 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41106 to 39498. [2019-12-07 17:49:49,681 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39498 states. [2019-12-07 17:49:49,714 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39498 states to 39498 states and 46331 transitions. [2019-12-07 17:49:49,714 INFO L78 Accepts]: Start accepts. Automaton has 39498 states and 46331 transitions. Word has length 147 [2019-12-07 17:49:49,714 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:49,714 INFO L462 AbstractCegarLoop]: Abstraction has 39498 states and 46331 transitions. [2019-12-07 17:49:49,714 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:49:49,714 INFO L276 IsEmpty]: Start isEmpty. Operand 39498 states and 46331 transitions. [2019-12-07 17:49:49,731 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 149 [2019-12-07 17:49:49,731 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:49,732 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:49,732 INFO L410 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:49,732 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:49,732 INFO L82 PathProgramCache]: Analyzing trace with hash 1845088335, now seen corresponding path program 1 times [2019-12-07 17:49:49,732 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:49,732 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [668409817] [2019-12-07 17:49:49,732 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:49,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:49,774 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 32 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:49,774 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [668409817] [2019-12-07 17:49:49,775 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:49,775 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:49:49,775 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [761395323] [2019-12-07 17:49:49,775 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:49:49,775 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:49,776 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:49:49,776 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:49,776 INFO L87 Difference]: Start difference. First operand 39498 states and 46331 transitions. Second operand 3 states. [2019-12-07 17:49:51,028 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:51,029 INFO L93 Difference]: Finished difference Result 62310 states and 73339 transitions. [2019-12-07 17:49:51,029 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:49:51,029 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 148 [2019-12-07 17:49:51,030 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:51,058 INFO L225 Difference]: With dead ends: 62310 [2019-12-07 17:49:51,058 INFO L226 Difference]: Without dead ends: 34906 [2019-12-07 17:49:51,072 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:51,095 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34906 states. [2019-12-07 17:49:52,156 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34906 to 34902. [2019-12-07 17:49:52,156 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34902 states. [2019-12-07 17:49:52,184 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34902 states to 34902 states and 40863 transitions. [2019-12-07 17:49:52,184 INFO L78 Accepts]: Start accepts. Automaton has 34902 states and 40863 transitions. Word has length 148 [2019-12-07 17:49:52,184 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:52,185 INFO L462 AbstractCegarLoop]: Abstraction has 34902 states and 40863 transitions. [2019-12-07 17:49:52,185 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:49:52,185 INFO L276 IsEmpty]: Start isEmpty. Operand 34902 states and 40863 transitions. [2019-12-07 17:49:52,194 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 149 [2019-12-07 17:49:52,194 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:52,194 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:52,194 INFO L410 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:52,195 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:52,195 INFO L82 PathProgramCache]: Analyzing trace with hash 1363817295, now seen corresponding path program 1 times [2019-12-07 17:49:52,195 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:52,195 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1082234799] [2019-12-07 17:49:52,195 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:52,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:52,226 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 32 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:52,226 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1082234799] [2019-12-07 17:49:52,226 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:52,226 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:49:52,226 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [816873744] [2019-12-07 17:49:52,227 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:49:52,227 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:52,227 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:49:52,227 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:52,227 INFO L87 Difference]: Start difference. First operand 34902 states and 40863 transitions. Second operand 3 states. [2019-12-07 17:49:53,352 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:53,352 INFO L93 Difference]: Finished difference Result 62382 states and 73243 transitions. [2019-12-07 17:49:53,353 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:49:53,353 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 148 [2019-12-07 17:49:53,353 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:53,383 INFO L225 Difference]: With dead ends: 62382 [2019-12-07 17:49:53,383 INFO L226 Difference]: Without dead ends: 34906 [2019-12-07 17:49:53,399 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:53,422 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34906 states. [2019-12-07 17:49:54,520 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34906 to 34902. [2019-12-07 17:49:54,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34902 states. [2019-12-07 17:49:54,557 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34902 states to 34902 states and 40695 transitions. [2019-12-07 17:49:54,557 INFO L78 Accepts]: Start accepts. Automaton has 34902 states and 40695 transitions. Word has length 148 [2019-12-07 17:49:54,557 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:54,557 INFO L462 AbstractCegarLoop]: Abstraction has 34902 states and 40695 transitions. [2019-12-07 17:49:54,558 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:49:54,558 INFO L276 IsEmpty]: Start isEmpty. Operand 34902 states and 40695 transitions. [2019-12-07 17:49:54,564 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 149 [2019-12-07 17:49:54,564 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:54,564 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:54,564 INFO L410 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:54,565 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:54,565 INFO L82 PathProgramCache]: Analyzing trace with hash -1576151473, now seen corresponding path program 1 times [2019-12-07 17:49:54,565 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:54,565 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1601649817] [2019-12-07 17:49:54,565 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:54,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:54,603 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 28 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2019-12-07 17:49:54,604 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1601649817] [2019-12-07 17:49:54,604 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:54,604 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:49:54,604 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1914676321] [2019-12-07 17:49:54,604 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:49:54,604 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:54,605 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:49:54,605 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:54,605 INFO L87 Difference]: Start difference. First operand 34902 states and 40695 transitions. Second operand 3 states. [2019-12-07 17:49:55,491 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:55,491 INFO L93 Difference]: Finished difference Result 58470 states and 68303 transitions. [2019-12-07 17:49:55,492 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:49:55,492 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 148 [2019-12-07 17:49:55,492 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:55,508 INFO L225 Difference]: With dead ends: 58470 [2019-12-07 17:49:55,508 INFO L226 Difference]: Without dead ends: 23658 [2019-12-07 17:49:55,523 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:55,538 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23658 states. [2019-12-07 17:49:56,268 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23658 to 23654. [2019-12-07 17:49:56,268 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23654 states. [2019-12-07 17:49:56,286 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23654 states to 23654 states and 27459 transitions. [2019-12-07 17:49:56,286 INFO L78 Accepts]: Start accepts. Automaton has 23654 states and 27459 transitions. Word has length 148 [2019-12-07 17:49:56,286 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:56,286 INFO L462 AbstractCegarLoop]: Abstraction has 23654 states and 27459 transitions. [2019-12-07 17:49:56,286 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:49:56,286 INFO L276 IsEmpty]: Start isEmpty. Operand 23654 states and 27459 transitions. [2019-12-07 17:49:56,289 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 149 [2019-12-07 17:49:56,289 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:56,289 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:56,289 INFO L410 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:56,289 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:56,290 INFO L82 PathProgramCache]: Analyzing trace with hash -954570, now seen corresponding path program 1 times [2019-12-07 17:49:56,290 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:56,290 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1172150438] [2019-12-07 17:49:56,290 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:56,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:56,323 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2019-12-07 17:49:56,323 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1172150438] [2019-12-07 17:49:56,323 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:56,323 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:49:56,323 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1730243875] [2019-12-07 17:49:56,323 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:49:56,323 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:56,324 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:49:56,324 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:56,324 INFO L87 Difference]: Start difference. First operand 23654 states and 27459 transitions. Second operand 3 states. [2019-12-07 17:49:57,105 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:57,105 INFO L93 Difference]: Finished difference Result 43106 states and 50305 transitions. [2019-12-07 17:49:57,105 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:49:57,106 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 148 [2019-12-07 17:49:57,106 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:57,122 INFO L225 Difference]: With dead ends: 43106 [2019-12-07 17:49:57,122 INFO L226 Difference]: Without dead ends: 24254 [2019-12-07 17:49:57,136 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:57,151 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24254 states. [2019-12-07 17:49:57,935 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24254 to 23534. [2019-12-07 17:49:57,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23534 states. [2019-12-07 17:49:57,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23534 states to 23534 states and 26843 transitions. [2019-12-07 17:49:57,952 INFO L78 Accepts]: Start accepts. Automaton has 23534 states and 26843 transitions. Word has length 148 [2019-12-07 17:49:57,952 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:57,952 INFO L462 AbstractCegarLoop]: Abstraction has 23534 states and 26843 transitions. [2019-12-07 17:49:57,953 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:49:57,953 INFO L276 IsEmpty]: Start isEmpty. Operand 23534 states and 26843 transitions. [2019-12-07 17:49:57,955 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 150 [2019-12-07 17:49:57,955 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:57,956 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:57,956 INFO L410 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:57,956 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:57,956 INFO L82 PathProgramCache]: Analyzing trace with hash 823641312, now seen corresponding path program 1 times [2019-12-07 17:49:57,956 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:57,956 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [91229417] [2019-12-07 17:49:57,956 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:57,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:57,989 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 23 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2019-12-07 17:49:57,989 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [91229417] [2019-12-07 17:49:57,990 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:57,990 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 17:49:57,990 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [765331341] [2019-12-07 17:49:57,990 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 17:49:57,990 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:57,990 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 17:49:57,990 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 17:49:57,991 INFO L87 Difference]: Start difference. First operand 23534 states and 26843 transitions. Second operand 5 states. [2019-12-07 17:49:58,481 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:58,481 INFO L93 Difference]: Finished difference Result 32626 states and 36969 transitions. [2019-12-07 17:49:58,482 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:49:58,482 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 149 [2019-12-07 17:49:58,482 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:58,485 INFO L225 Difference]: With dead ends: 32626 [2019-12-07 17:49:58,485 INFO L226 Difference]: Without dead ends: 4731 [2019-12-07 17:49:58,494 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 17:49:58,496 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4731 states. [2019-12-07 17:49:58,653 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4731 to 4595. [2019-12-07 17:49:58,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4595 states. [2019-12-07 17:49:58,656 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4595 states to 4595 states and 4976 transitions. [2019-12-07 17:49:58,656 INFO L78 Accepts]: Start accepts. Automaton has 4595 states and 4976 transitions. Word has length 149 [2019-12-07 17:49:58,656 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:58,657 INFO L462 AbstractCegarLoop]: Abstraction has 4595 states and 4976 transitions. [2019-12-07 17:49:58,657 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 17:49:58,657 INFO L276 IsEmpty]: Start isEmpty. Operand 4595 states and 4976 transitions. [2019-12-07 17:49:58,658 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 215 [2019-12-07 17:49:58,659 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:58,659 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:58,659 INFO L410 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:58,659 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:58,659 INFO L82 PathProgramCache]: Analyzing trace with hash 1473194168, now seen corresponding path program 1 times [2019-12-07 17:49:58,659 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:58,659 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1318800638] [2019-12-07 17:49:58,659 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:58,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:58,701 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 40 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:58,701 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1318800638] [2019-12-07 17:49:58,701 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:58,702 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:49:58,702 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1763816475] [2019-12-07 17:49:58,702 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:49:58,702 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:58,702 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:49:58,702 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:58,702 INFO L87 Difference]: Start difference. First operand 4595 states and 4976 transitions. Second operand 3 states. [2019-12-07 17:49:58,879 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:58,879 INFO L93 Difference]: Finished difference Result 7852 states and 8519 transitions. [2019-12-07 17:49:58,880 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:49:58,880 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 214 [2019-12-07 17:49:58,880 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:58,883 INFO L225 Difference]: With dead ends: 7852 [2019-12-07 17:49:58,883 INFO L226 Difference]: Without dead ends: 4595 [2019-12-07 17:49:58,884 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:58,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4595 states. [2019-12-07 17:49:59,046 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4595 to 4595. [2019-12-07 17:49:59,046 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4595 states. [2019-12-07 17:49:59,049 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4595 states to 4595 states and 4922 transitions. [2019-12-07 17:49:59,049 INFO L78 Accepts]: Start accepts. Automaton has 4595 states and 4922 transitions. Word has length 214 [2019-12-07 17:49:59,050 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:59,050 INFO L462 AbstractCegarLoop]: Abstraction has 4595 states and 4922 transitions. [2019-12-07 17:49:59,050 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:49:59,050 INFO L276 IsEmpty]: Start isEmpty. Operand 4595 states and 4922 transitions. [2019-12-07 17:49:59,052 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 218 [2019-12-07 17:49:59,052 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:59,052 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:59,052 INFO L410 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:59,052 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:59,052 INFO L82 PathProgramCache]: Analyzing trace with hash 1279770330, now seen corresponding path program 1 times [2019-12-07 17:49:59,052 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:59,052 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [227700345] [2019-12-07 17:49:59,052 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:59,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:59,089 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 40 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:59,089 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [227700345] [2019-12-07 17:49:59,090 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:59,090 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:49:59,090 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1851018187] [2019-12-07 17:49:59,090 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:49:59,090 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:59,090 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:49:59,090 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:59,090 INFO L87 Difference]: Start difference. First operand 4595 states and 4922 transitions. Second operand 3 states. [2019-12-07 17:49:59,286 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:59,286 INFO L93 Difference]: Finished difference Result 7385 states and 7926 transitions. [2019-12-07 17:49:59,286 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:49:59,286 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 217 [2019-12-07 17:49:59,287 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:59,289 INFO L225 Difference]: With dead ends: 7385 [2019-12-07 17:49:59,290 INFO L226 Difference]: Without dead ends: 4595 [2019-12-07 17:49:59,291 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:59,293 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4595 states. [2019-12-07 17:49:59,459 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4595 to 4595. [2019-12-07 17:49:59,460 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4595 states. [2019-12-07 17:49:59,463 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4595 states to 4595 states and 4876 transitions. [2019-12-07 17:49:59,463 INFO L78 Accepts]: Start accepts. Automaton has 4595 states and 4876 transitions. Word has length 217 [2019-12-07 17:49:59,463 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:59,463 INFO L462 AbstractCegarLoop]: Abstraction has 4595 states and 4876 transitions. [2019-12-07 17:49:59,463 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:49:59,463 INFO L276 IsEmpty]: Start isEmpty. Operand 4595 states and 4876 transitions. [2019-12-07 17:49:59,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 221 [2019-12-07 17:49:59,466 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:59,466 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:59,466 INFO L410 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:59,467 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:59,467 INFO L82 PathProgramCache]: Analyzing trace with hash -928723252, now seen corresponding path program 1 times [2019-12-07 17:49:59,467 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:59,467 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1019273115] [2019-12-07 17:49:59,467 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:59,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:49:59,508 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 40 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 17:49:59,508 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1019273115] [2019-12-07 17:49:59,508 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:49:59,508 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:49:59,509 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1723644915] [2019-12-07 17:49:59,509 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:49:59,509 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:49:59,509 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:49:59,509 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:59,509 INFO L87 Difference]: Start difference. First operand 4595 states and 4876 transitions. Second operand 3 states. [2019-12-07 17:49:59,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:49:59,662 INFO L93 Difference]: Finished difference Result 5891 states and 6255 transitions. [2019-12-07 17:49:59,662 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:49:59,662 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 220 [2019-12-07 17:49:59,662 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:49:59,665 INFO L225 Difference]: With dead ends: 5891 [2019-12-07 17:49:59,665 INFO L226 Difference]: Without dead ends: 3680 [2019-12-07 17:49:59,667 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:49:59,668 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3680 states. [2019-12-07 17:49:59,836 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3680 to 3680. [2019-12-07 17:49:59,836 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3680 states. [2019-12-07 17:49:59,840 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3680 states to 3680 states and 3894 transitions. [2019-12-07 17:49:59,840 INFO L78 Accepts]: Start accepts. Automaton has 3680 states and 3894 transitions. Word has length 220 [2019-12-07 17:49:59,840 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:49:59,840 INFO L462 AbstractCegarLoop]: Abstraction has 3680 states and 3894 transitions. [2019-12-07 17:49:59,840 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:49:59,840 INFO L276 IsEmpty]: Start isEmpty. Operand 3680 states and 3894 transitions. [2019-12-07 17:49:59,843 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 224 [2019-12-07 17:49:59,843 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:49:59,843 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:49:59,844 INFO L410 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:49:59,844 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:49:59,844 INFO L82 PathProgramCache]: Analyzing trace with hash -1613896568, now seen corresponding path program 1 times [2019-12-07 17:49:59,844 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:49:59,844 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [862760078] [2019-12-07 17:49:59,844 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:49:59,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:00,040 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 32 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2019-12-07 17:50:00,040 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [862760078] [2019-12-07 17:50:00,040 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:50:00,041 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 17:50:00,041 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1692808482] [2019-12-07 17:50:00,041 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 17:50:00,041 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:00,041 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 17:50:00,042 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:50:00,042 INFO L87 Difference]: Start difference. First operand 3680 states and 3894 transitions. Second operand 6 states. [2019-12-07 17:50:00,267 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:00,268 INFO L93 Difference]: Finished difference Result 3680 states and 3894 transitions. [2019-12-07 17:50:00,268 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 17:50:00,268 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 223 [2019-12-07 17:50:00,268 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:00,270 INFO L225 Difference]: With dead ends: 3680 [2019-12-07 17:50:00,270 INFO L226 Difference]: Without dead ends: 3678 [2019-12-07 17:50:00,271 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 17:50:00,272 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3678 states. [2019-12-07 17:50:00,413 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3678 to 3678. [2019-12-07 17:50:00,413 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3678 states. [2019-12-07 17:50:00,416 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3678 states to 3678 states and 3891 transitions. [2019-12-07 17:50:00,416 INFO L78 Accepts]: Start accepts. Automaton has 3678 states and 3891 transitions. Word has length 223 [2019-12-07 17:50:00,416 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:00,416 INFO L462 AbstractCegarLoop]: Abstraction has 3678 states and 3891 transitions. [2019-12-07 17:50:00,416 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 17:50:00,417 INFO L276 IsEmpty]: Start isEmpty. Operand 3678 states and 3891 transitions. [2019-12-07 17:50:00,418 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 228 [2019-12-07 17:50:00,418 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:00,418 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:00,419 INFO L410 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:00,419 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:00,419 INFO L82 PathProgramCache]: Analyzing trace with hash -1852984938, now seen corresponding path program 1 times [2019-12-07 17:50:00,419 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:00,419 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [722710294] [2019-12-07 17:50:00,419 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:00,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 17:50:00,462 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 40 trivial. 0 not checked. [2019-12-07 17:50:00,462 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [722710294] [2019-12-07 17:50:00,462 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 17:50:00,463 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 17:50:00,463 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1836125217] [2019-12-07 17:50:00,463 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 17:50:00,463 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 17:50:00,463 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 17:50:00,463 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:50:00,463 INFO L87 Difference]: Start difference. First operand 3678 states and 3891 transitions. Second operand 3 states. [2019-12-07 17:50:00,653 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 17:50:00,653 INFO L93 Difference]: Finished difference Result 5766 states and 6078 transitions. [2019-12-07 17:50:00,654 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 17:50:00,654 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 227 [2019-12-07 17:50:00,654 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 17:50:00,657 INFO L225 Difference]: With dead ends: 5766 [2019-12-07 17:50:00,657 INFO L226 Difference]: Without dead ends: 4714 [2019-12-07 17:50:00,658 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 17:50:00,660 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4714 states. [2019-12-07 17:50:00,810 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4714 to 3680. [2019-12-07 17:50:00,810 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3680 states. [2019-12-07 17:50:00,813 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3680 states to 3680 states and 3893 transitions. [2019-12-07 17:50:00,813 INFO L78 Accepts]: Start accepts. Automaton has 3680 states and 3893 transitions. Word has length 227 [2019-12-07 17:50:00,813 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 17:50:00,813 INFO L462 AbstractCegarLoop]: Abstraction has 3680 states and 3893 transitions. [2019-12-07 17:50:00,813 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 17:50:00,813 INFO L276 IsEmpty]: Start isEmpty. Operand 3680 states and 3893 transitions. [2019-12-07 17:50:00,815 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 229 [2019-12-07 17:50:00,815 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 17:50:00,815 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 17:50:00,815 INFO L410 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 17:50:00,815 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 17:50:00,815 INFO L82 PathProgramCache]: Analyzing trace with hash -1845395018, now seen corresponding path program 1 times [2019-12-07 17:50:00,815 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 17:50:00,816 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [134168053] [2019-12-07 17:50:00,816 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 17:50:00,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:50:00,847 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 17:50:00,899 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 17:50:00,899 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 17:50:01,010 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 05:50:01 BoogieIcfgContainer [2019-12-07 17:50:01,011 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 17:50:01,011 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 17:50:01,011 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 17:50:01,011 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 17:50:01,011 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 05:49:36" (3/4) ... [2019-12-07 17:50:01,013 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 17:50:01,112 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_eaece430-2a93-48f9-a54f-86a017aca8db/bin/uautomizer/witness.graphml [2019-12-07 17:50:01,112 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 17:50:01,114 INFO L168 Benchmark]: Toolchain (without parser) took 25865.07 ms. Allocated memory was 1.0 GB in the beginning and 4.1 GB in the end (delta: 3.0 GB). Free memory was 943.5 MB in the beginning and 2.9 GB in the end (delta: -2.0 GB). Peak memory consumption was 1.0 GB. Max. memory is 11.5 GB. [2019-12-07 17:50:01,114 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:50:01,114 INFO L168 Benchmark]: CACSL2BoogieTranslator took 250.77 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 101.2 MB). Free memory was 943.5 MB in the beginning and 1.1 GB in the end (delta: -147.1 MB). Peak memory consumption was 23.2 MB. Max. memory is 11.5 GB. [2019-12-07 17:50:01,114 INFO L168 Benchmark]: Boogie Procedure Inliner took 40.22 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 17:50:01,114 INFO L168 Benchmark]: Boogie Preprocessor took 39.16 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:50:01,115 INFO L168 Benchmark]: RCFGBuilder took 536.81 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 77.8 MB). Peak memory consumption was 77.8 MB. Max. memory is 11.5 GB. [2019-12-07 17:50:01,115 INFO L168 Benchmark]: TraceAbstraction took 24893.39 ms. Allocated memory was 1.1 GB in the beginning and 4.1 GB in the end (delta: 2.9 GB). Free memory was 1.0 GB in the beginning and 3.0 GB in the end (delta: -1.9 GB). Peak memory consumption was 992.4 MB. Max. memory is 11.5 GB. [2019-12-07 17:50:01,115 INFO L168 Benchmark]: Witness Printer took 101.44 ms. Allocated memory is still 4.1 GB. Free memory was 3.0 GB in the beginning and 2.9 GB in the end (delta: 20.3 MB). Peak memory consumption was 20.3 MB. Max. memory is 11.5 GB. [2019-12-07 17:50:01,117 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 250.77 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 101.2 MB). Free memory was 943.5 MB in the beginning and 1.1 GB in the end (delta: -147.1 MB). Peak memory consumption was 23.2 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 40.22 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 39.16 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 536.81 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 77.8 MB). Peak memory consumption was 77.8 MB. Max. memory is 11.5 GB. * TraceAbstraction took 24893.39 ms. Allocated memory was 1.1 GB in the beginning and 4.1 GB in the end (delta: 2.9 GB). Free memory was 1.0 GB in the beginning and 3.0 GB in the end (delta: -1.9 GB). Peak memory consumption was 992.4 MB. Max. memory is 11.5 GB. * Witness Printer took 101.44 ms. Allocated memory is still 4.1 GB. Free memory was 3.0 GB in the beginning and 2.9 GB in the end (delta: 20.3 MB). Peak memory consumption was 20.3 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 10]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L14] int m_pc = 0; [L15] int t1_pc = 0; [L16] int t2_pc = 0; [L17] int t3_pc = 0; [L18] int m_st ; [L19] int t1_st ; [L20] int t2_st ; [L21] int t3_st ; [L22] int m_i ; [L23] int t1_i ; [L24] int t2_i ; [L25] int t3_i ; [L26] int M_E = 2; [L27] int T1_E = 2; [L28] int T2_E = 2; [L29] int T3_E = 2; [L30] int E_M = 2; [L31] int E_1 = 2; [L32] int E_2 = 2; [L33] int E_3 = 2; [L39] int token ; [L41] int local ; VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0, T3_E=2, t3_i=0, t3_pc=0, t3_st=0, token=0] [L725] int __retres1 ; [L638] m_i = 1 [L639] t1_i = 1 [L640] t2_i = 1 [L641] t3_i = 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L666] int kernel_st ; [L667] int tmp ; [L668] int tmp___0 ; [L672] kernel_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L294] COND TRUE m_i == 1 [L295] m_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L299] COND TRUE t1_i == 1 [L300] t1_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L304] COND TRUE t2_i == 1 [L305] t2_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L309] COND TRUE t3_i == 1 [L310] t3_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L431] COND FALSE !(M_E == 0) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L436] COND FALSE !(T1_E == 0) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L441] COND FALSE !(T2_E == 0) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L446] COND FALSE !(T3_E == 0) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L451] COND FALSE !(E_M == 0) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L456] COND FALSE !(E_1 == 0) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L461] COND FALSE !(E_2 == 0) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L466] COND FALSE !(E_3 == 0) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L524] int tmp ; [L525] int tmp___0 ; [L526] int tmp___1 ; [L527] int tmp___2 ; [L207] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L210] COND FALSE !(m_pc == 1) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L220] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L222] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L531] tmp = is_master_triggered() [L533] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L226] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L229] COND FALSE !(t1_pc == 1) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L239] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L241] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L539] tmp___0 = is_transmit1_triggered() [L541] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L245] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L248] COND FALSE !(t2_pc == 1) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L258] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L260] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L547] tmp___1 = is_transmit2_triggered() [L549] COND FALSE !(\read(tmp___1)) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L264] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L267] COND FALSE !(t3_pc == 1) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L277] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L279] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L555] tmp___2 = is_transmit3_triggered() [L557] COND FALSE !(\read(tmp___2)) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L479] COND FALSE !(M_E == 1) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L484] COND FALSE !(T1_E == 1) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L489] COND FALSE !(T2_E == 1) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L494] COND FALSE !(T3_E == 1) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L499] COND FALSE !(E_M == 1) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L504] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L509] COND FALSE !(E_2 == 1) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L514] COND FALSE !(E_3 == 1) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L680] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L683] kernel_st = 1 [L350] int tmp ; VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L354] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L319] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L322] COND TRUE m_st == 0 [L323] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L345] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L357] tmp = exists_runnable_thread() [L359] COND TRUE \read(tmp) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L364] COND TRUE m_st == 0 [L365] int tmp_ndt_1; [L366] tmp_ndt_1 = __VERIFIER_nondet_int() [L367] COND FALSE !(\read(tmp_ndt_1)) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L378] COND TRUE t1_st == 0 [L379] int tmp_ndt_2; [L380] tmp_ndt_2 = __VERIFIER_nondet_int() [L381] COND TRUE \read(tmp_ndt_2) [L383] t1_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L102] COND TRUE t1_pc == 0 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L113] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L115] t1_pc = 1 [L116] t1_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L392] COND TRUE t2_st == 0 [L393] int tmp_ndt_3; [L394] tmp_ndt_3 = __VERIFIER_nondet_int() [L395] COND TRUE \read(tmp_ndt_3) [L397] t2_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L138] COND TRUE t2_pc == 0 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L149] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L151] t2_pc = 1 [L152] t2_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, token=0] [L406] COND TRUE t3_st == 0 [L407] int tmp_ndt_4; [L408] tmp_ndt_4 = __VERIFIER_nondet_int() [L409] COND TRUE \read(tmp_ndt_4) [L411] t3_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1, token=0] [L174] COND TRUE t3_pc == 0 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1, token=0] [L185] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1, token=0] [L187] t3_pc = 1 [L188] t3_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L354] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L319] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L322] COND TRUE m_st == 0 [L323] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L345] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L357] tmp = exists_runnable_thread() [L359] COND TRUE \read(tmp) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L364] COND TRUE m_st == 0 [L365] int tmp_ndt_1; [L366] tmp_ndt_1 = __VERIFIER_nondet_int() [L367] COND TRUE \read(tmp_ndt_1) [L369] m_st = 1 [L44] int tmp_var = __VERIFIER_nondet_int(); [L46] COND TRUE m_pc == 0 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L57] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L60] token = __VERIFIER_nondet_int() [L61] local = token [L62] E_1 = 1 [L524] int tmp ; [L525] int tmp___0 ; [L526] int tmp___1 ; [L527] int tmp___2 ; [L207] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L210] COND FALSE !(m_pc == 1) VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L220] __retres1 = 0 VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L222] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L531] tmp = is_master_triggered() [L533] COND FALSE !(\read(tmp)) VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L226] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L229] COND TRUE t1_pc == 1 VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L230] COND TRUE E_1 == 1 [L231] __retres1 = 1 VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L241] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L539] tmp___0 = is_transmit1_triggered() [L541] COND TRUE \read(tmp___0) [L542] t1_st = 0 VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L245] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L248] COND TRUE t2_pc == 1 VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L249] COND FALSE !(E_2 == 1) VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L258] __retres1 = 0 VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L260] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L547] tmp___1 = is_transmit2_triggered() [L549] COND FALSE !(\read(tmp___1)) VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L264] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L267] COND TRUE t3_pc == 1 VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L268] COND FALSE !(E_3 == 1) VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L277] __retres1 = 0 VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L279] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L555] tmp___2 = is_transmit3_triggered() [L557] COND FALSE !(\read(tmp___2)) VAL [E_1=1, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L64] E_1 = 2 [L65] m_pc = 1 [L66] m_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L378] COND TRUE t1_st == 0 [L379] int tmp_ndt_2; [L380] tmp_ndt_2 = __VERIFIER_nondet_int() [L381] COND TRUE \read(tmp_ndt_2) [L383] t1_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L102] COND FALSE !(t1_pc == 0) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L105] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-3] [L121] token += 1 [L122] E_2 = 1 [L524] int tmp ; [L525] int tmp___0 ; [L526] int tmp___1 ; [L527] int tmp___2 ; [L207] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L210] COND TRUE m_pc == 1 VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L211] COND FALSE !(E_M == 1) VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L220] __retres1 = 0 VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L222] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L531] tmp = is_master_triggered() [L533] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L226] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L229] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L230] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L239] __retres1 = 0 VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L241] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L539] tmp___0 = is_transmit1_triggered() [L541] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L245] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L248] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L249] COND TRUE E_2 == 1 [L250] __retres1 = 1 VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L260] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L547] tmp___1 = is_transmit2_triggered() [L549] COND TRUE \read(tmp___1) [L550] t2_st = 0 VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L264] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L267] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L268] COND FALSE !(E_3 == 1) VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L277] __retres1 = 0 VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L279] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L555] tmp___2 = is_transmit3_triggered() [L557] COND FALSE !(\read(tmp___2)) VAL [E_1=2, E_2=1, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L124] E_2 = 2 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L113] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L115] t1_pc = 1 [L116] t1_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L392] COND TRUE t2_st == 0 [L393] int tmp_ndt_3; [L394] tmp_ndt_3 = __VERIFIER_nondet_int() [L395] COND TRUE \read(tmp_ndt_3) [L397] t2_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L138] COND FALSE !(t2_pc == 0) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L141] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-2] [L157] token += 1 [L158] E_3 = 1 [L524] int tmp ; [L525] int tmp___0 ; [L526] int tmp___1 ; [L527] int tmp___2 ; [L207] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L210] COND TRUE m_pc == 1 VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L211] COND FALSE !(E_M == 1) VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L220] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L222] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L531] tmp = is_master_triggered() [L533] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L226] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L229] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L230] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L239] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L241] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L539] tmp___0 = is_transmit1_triggered() [L541] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L245] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L248] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L249] COND FALSE !(E_2 == 1) VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L258] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L260] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L547] tmp___1 = is_transmit2_triggered() [L549] COND FALSE !(\read(tmp___1)) VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L264] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L267] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L268] COND TRUE E_3 == 1 [L269] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L279] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=-1] [L555] tmp___2 = is_transmit3_triggered() [L557] COND TRUE \read(tmp___2) [L558] t3_st = 0 VAL [E_1=2, E_2=2, E_3=1, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, token=-1] [L160] E_3 = 2 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, token=-1] [L149] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, token=-1] [L151] t2_pc = 1 [L152] t2_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, token=-1] [L406] COND TRUE t3_st == 0 [L407] int tmp_ndt_4; [L408] tmp_ndt_4 = __VERIFIER_nondet_int() [L409] COND TRUE \read(tmp_ndt_4) [L411] t3_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=-1] [L174] COND FALSE !(t3_pc == 0) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=-1] [L177] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=-1] [L193] token += 1 [L194] E_M = 1 [L524] int tmp ; [L525] int tmp___0 ; [L526] int tmp___1 ; [L527] int tmp___2 ; [L207] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L210] COND TRUE m_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L211] COND TRUE E_M == 1 [L212] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L222] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L531] tmp = is_master_triggered() [L533] COND TRUE \read(tmp) [L534] m_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L226] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L229] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L230] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L239] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L241] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L539] tmp___0 = is_transmit1_triggered() [L541] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L245] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L248] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L249] COND FALSE !(E_2 == 1) VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L258] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L260] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L547] tmp___1 = is_transmit2_triggered() [L549] COND FALSE !(\read(tmp___1)) VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L264] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L267] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L268] COND FALSE !(E_3 == 1) VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L277] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L279] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L555] tmp___2 = is_transmit3_triggered() [L557] COND FALSE !(\read(tmp___2)) VAL [E_1=2, E_2=2, E_3=2, E_M=1, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L196] E_M = 2 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L185] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, token=0] [L187] t3_pc = 1 [L188] t3_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L354] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L319] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L322] COND TRUE m_st == 0 [L323] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L345] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L357] tmp = exists_runnable_thread() [L359] COND TRUE \read(tmp) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L364] COND TRUE m_st == 0 [L365] int tmp_ndt_1; [L366] tmp_ndt_1 = __VERIFIER_nondet_int() [L367] COND TRUE \read(tmp_ndt_1) [L369] m_st = 1 [L44] int tmp_var = __VERIFIER_nondet_int(); [L46] COND FALSE !(m_pc == 0) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L49] COND TRUE m_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L71] COND FALSE !(token != local + 3) VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L76] COND TRUE tmp_var <= 5 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L77] COND TRUE tmp_var >= 5 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L82] COND TRUE tmp_var <= 5 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L83] COND TRUE tmp_var >= 5 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L84] COND TRUE tmp_var == 5 VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] [L10] __VERIFIER_error() VAL [E_1=2, E_2=2, E_3=2, E_M=2, local=-3, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, token=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 316 locations, 2 error locations. Result: UNSAFE, OverallTime: 24.7s, OverallIterations: 34, TraceHistogramMax: 3, AutomataDifference: 12.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 15598 SDtfs, 13593 SDslu, 11009 SDs, 0 SdLazy, 596 SolverSat, 276 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 115 GetRequests, 63 SyntacticMatches, 0 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=40218occurred in iteration=22, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 10.8s AutomataMinimizationTime, 33 MinimizatonAttempts, 6602 StatesRemovedByMinimization, 18 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.1s SatisfiabilityAnalysisTime, 0.5s InterpolantComputationTime, 4088 NumberOfCodeBlocks, 4088 NumberOfCodeBlocksAsserted, 34 NumberOfCheckSat, 3827 ConstructedInterpolants, 0 QuantifiedInterpolants, 1000323 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 33 InterpolantComputations, 33 PerfectInterpolantSequences, 504/504 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...