./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/systemc/token_ring.04.cil-2.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_a0e9f75b-13ed-4935-ab2d-a4c9e1b632d9/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_a0e9f75b-13ed-4935-ab2d-a4c9e1b632d9/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_a0e9f75b-13ed-4935-ab2d-a4c9e1b632d9/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_a0e9f75b-13ed-4935-ab2d-a4c9e1b632d9/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/systemc/token_ring.04.cil-2.c -s /tmp/vcloud-vcloud-master/worker/run_dir_a0e9f75b-13ed-4935-ab2d-a4c9e1b632d9/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_a0e9f75b-13ed-4935-ab2d-a4c9e1b632d9/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 5e27a879cb97b2b6600a7b4379c4e090f4fa709a .............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 13:04:22,903 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 13:04:22,905 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 13:04:22,912 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 13:04:22,912 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 13:04:22,913 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 13:04:22,914 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 13:04:22,915 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 13:04:22,917 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 13:04:22,917 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 13:04:22,918 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 13:04:22,919 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 13:04:22,919 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 13:04:22,919 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 13:04:22,920 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 13:04:22,921 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 13:04:22,921 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 13:04:22,922 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 13:04:22,923 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 13:04:22,925 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 13:04:22,926 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 13:04:22,926 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 13:04:22,927 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 13:04:22,927 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 13:04:22,929 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 13:04:22,929 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 13:04:22,930 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 13:04:22,930 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 13:04:22,930 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 13:04:22,931 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 13:04:22,931 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 13:04:22,931 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 13:04:22,932 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 13:04:22,932 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 13:04:22,933 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 13:04:22,933 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 13:04:22,933 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 13:04:22,933 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 13:04:22,934 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 13:04:22,934 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 13:04:22,934 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 13:04:22,935 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_a0e9f75b-13ed-4935-ab2d-a4c9e1b632d9/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 13:04:22,944 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 13:04:22,944 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 13:04:22,945 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 13:04:22,945 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 13:04:22,945 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 13:04:22,945 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 13:04:22,945 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 13:04:22,945 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 13:04:22,946 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 13:04:22,946 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 13:04:22,946 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 13:04:22,946 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 13:04:22,946 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 13:04:22,946 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 13:04:22,946 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 13:04:22,946 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 13:04:22,946 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 13:04:22,947 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 13:04:22,947 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 13:04:22,947 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 13:04:22,947 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 13:04:22,947 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 13:04:22,947 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 13:04:22,947 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 13:04:22,948 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 13:04:22,948 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 13:04:22,948 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 13:04:22,948 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 13:04:22,948 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 13:04:22,948 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_a0e9f75b-13ed-4935-ab2d-a4c9e1b632d9/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 5e27a879cb97b2b6600a7b4379c4e090f4fa709a [2019-12-07 13:04:23,045 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 13:04:23,053 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 13:04:23,055 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 13:04:23,056 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 13:04:23,056 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 13:04:23,057 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_a0e9f75b-13ed-4935-ab2d-a4c9e1b632d9/bin/uautomizer/../../sv-benchmarks/c/systemc/token_ring.04.cil-2.c [2019-12-07 13:04:23,094 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_a0e9f75b-13ed-4935-ab2d-a4c9e1b632d9/bin/uautomizer/data/27097c176/c88af49bf42240afb8b1284aa4cbc74e/FLAG31e30b28f [2019-12-07 13:04:23,569 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 13:04:23,569 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_a0e9f75b-13ed-4935-ab2d-a4c9e1b632d9/sv-benchmarks/c/systemc/token_ring.04.cil-2.c [2019-12-07 13:04:23,576 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_a0e9f75b-13ed-4935-ab2d-a4c9e1b632d9/bin/uautomizer/data/27097c176/c88af49bf42240afb8b1284aa4cbc74e/FLAG31e30b28f [2019-12-07 13:04:23,585 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_a0e9f75b-13ed-4935-ab2d-a4c9e1b632d9/bin/uautomizer/data/27097c176/c88af49bf42240afb8b1284aa4cbc74e [2019-12-07 13:04:23,587 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 13:04:23,588 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 13:04:23,588 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 13:04:23,588 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 13:04:23,591 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 13:04:23,591 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 01:04:23" (1/1) ... [2019-12-07 13:04:23,593 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@8a8f29 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:04:23, skipping insertion in model container [2019-12-07 13:04:23,593 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 01:04:23" (1/1) ... [2019-12-07 13:04:23,597 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 13:04:23,620 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 13:04:23,793 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 13:04:23,796 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 13:04:23,829 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 13:04:23,843 INFO L208 MainTranslator]: Completed translation [2019-12-07 13:04:23,843 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:04:23 WrapperNode [2019-12-07 13:04:23,843 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 13:04:23,844 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 13:04:23,844 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 13:04:23,844 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 13:04:23,849 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:04:23" (1/1) ... [2019-12-07 13:04:23,855 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:04:23" (1/1) ... [2019-12-07 13:04:23,886 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 13:04:23,887 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 13:04:23,887 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 13:04:23,887 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 13:04:23,893 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:04:23" (1/1) ... [2019-12-07 13:04:23,893 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:04:23" (1/1) ... [2019-12-07 13:04:23,896 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:04:23" (1/1) ... [2019-12-07 13:04:23,896 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:04:23" (1/1) ... [2019-12-07 13:04:23,907 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:04:23" (1/1) ... [2019-12-07 13:04:23,920 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:04:23" (1/1) ... [2019-12-07 13:04:23,923 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:04:23" (1/1) ... [2019-12-07 13:04:23,929 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 13:04:23,929 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 13:04:23,929 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 13:04:23,929 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 13:04:23,930 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:04:23" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_a0e9f75b-13ed-4935-ab2d-a4c9e1b632d9/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 13:04:23,976 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 13:04:23,976 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 13:04:24,593 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 13:04:24,594 INFO L287 CfgBuilder]: Removed 163 assume(true) statements. [2019-12-07 13:04:24,595 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:04:24 BoogieIcfgContainer [2019-12-07 13:04:24,595 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 13:04:24,595 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 13:04:24,595 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 13:04:24,597 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 13:04:24,598 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 01:04:23" (1/3) ... [2019-12-07 13:04:24,598 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1add9a70 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 01:04:24, skipping insertion in model container [2019-12-07 13:04:24,598 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 01:04:23" (2/3) ... [2019-12-07 13:04:24,598 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1add9a70 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 01:04:24, skipping insertion in model container [2019-12-07 13:04:24,599 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:04:24" (3/3) ... [2019-12-07 13:04:24,600 INFO L109 eAbstractionObserver]: Analyzing ICFG token_ring.04.cil-2.c [2019-12-07 13:04:24,606 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 13:04:24,611 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 13:04:24,619 INFO L249 AbstractCegarLoop]: Starting to check reachability of 2 error locations. [2019-12-07 13:04:24,637 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 13:04:24,637 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 13:04:24,637 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 13:04:24,637 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 13:04:24,638 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 13:04:24,638 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 13:04:24,638 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 13:04:24,638 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 13:04:24,655 INFO L276 IsEmpty]: Start isEmpty. Operand 421 states. [2019-12-07 13:04:24,661 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 13:04:24,661 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:04:24,662 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:04:24,662 INFO L410 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:04:24,665 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:04:24,666 INFO L82 PathProgramCache]: Analyzing trace with hash 1090379614, now seen corresponding path program 1 times [2019-12-07 13:04:24,672 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:04:24,672 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1210138817] [2019-12-07 13:04:24,672 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:04:24,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:04:24,785 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:04:24,786 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1210138817] [2019-12-07 13:04:24,786 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:04:24,786 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:04:24,788 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1923453315] [2019-12-07 13:04:24,791 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:04:24,791 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:04:24,799 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:04:24,799 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:24,801 INFO L87 Difference]: Start difference. First operand 421 states. Second operand 3 states. [2019-12-07 13:04:24,850 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:04:24,851 INFO L93 Difference]: Finished difference Result 837 states and 1301 transitions. [2019-12-07 13:04:24,851 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:04:24,852 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 72 [2019-12-07 13:04:24,852 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:04:24,863 INFO L225 Difference]: With dead ends: 837 [2019-12-07 13:04:24,863 INFO L226 Difference]: Without dead ends: 417 [2019-12-07 13:04:24,867 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:24,879 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 417 states. [2019-12-07 13:04:24,908 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 417 to 417. [2019-12-07 13:04:24,909 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 417 states. [2019-12-07 13:04:24,911 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 417 states to 417 states and 633 transitions. [2019-12-07 13:04:24,912 INFO L78 Accepts]: Start accepts. Automaton has 417 states and 633 transitions. Word has length 72 [2019-12-07 13:04:24,912 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:04:24,912 INFO L462 AbstractCegarLoop]: Abstraction has 417 states and 633 transitions. [2019-12-07 13:04:24,912 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:04:24,912 INFO L276 IsEmpty]: Start isEmpty. Operand 417 states and 633 transitions. [2019-12-07 13:04:24,914 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 13:04:24,914 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:04:24,914 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:04:24,915 INFO L410 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:04:24,915 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:04:24,915 INFO L82 PathProgramCache]: Analyzing trace with hash 136439456, now seen corresponding path program 1 times [2019-12-07 13:04:24,915 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:04:24,915 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1071375581] [2019-12-07 13:04:24,915 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:04:24,927 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:04:24,955 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:04:24,955 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1071375581] [2019-12-07 13:04:24,955 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:04:24,955 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:04:24,956 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1155698693] [2019-12-07 13:04:24,957 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:04:24,957 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:04:24,957 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:04:24,957 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:24,957 INFO L87 Difference]: Start difference. First operand 417 states and 633 transitions. Second operand 3 states. [2019-12-07 13:04:24,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:04:24,999 INFO L93 Difference]: Finished difference Result 1143 states and 1731 transitions. [2019-12-07 13:04:24,999 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:04:24,999 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 72 [2019-12-07 13:04:24,999 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:04:25,004 INFO L225 Difference]: With dead ends: 1143 [2019-12-07 13:04:25,004 INFO L226 Difference]: Without dead ends: 735 [2019-12-07 13:04:25,006 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:25,008 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 735 states. [2019-12-07 13:04:25,041 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 735 to 731. [2019-12-07 13:04:25,041 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 731 states. [2019-12-07 13:04:25,044 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 731 states to 731 states and 1106 transitions. [2019-12-07 13:04:25,044 INFO L78 Accepts]: Start accepts. Automaton has 731 states and 1106 transitions. Word has length 72 [2019-12-07 13:04:25,044 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:04:25,044 INFO L462 AbstractCegarLoop]: Abstraction has 731 states and 1106 transitions. [2019-12-07 13:04:25,044 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:04:25,044 INFO L276 IsEmpty]: Start isEmpty. Operand 731 states and 1106 transitions. [2019-12-07 13:04:25,046 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 13:04:25,046 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:04:25,046 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:04:25,047 INFO L410 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:04:25,047 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:04:25,047 INFO L82 PathProgramCache]: Analyzing trace with hash -51966948, now seen corresponding path program 1 times [2019-12-07 13:04:25,047 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:04:25,047 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [20512039] [2019-12-07 13:04:25,048 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:04:25,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:04:25,089 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:04:25,089 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [20512039] [2019-12-07 13:04:25,089 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:04:25,089 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:04:25,090 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1849849182] [2019-12-07 13:04:25,090 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:04:25,090 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:04:25,090 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:04:25,090 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:25,091 INFO L87 Difference]: Start difference. First operand 731 states and 1106 transitions. Second operand 3 states. [2019-12-07 13:04:25,129 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:04:25,129 INFO L93 Difference]: Finished difference Result 1452 states and 2197 transitions. [2019-12-07 13:04:25,130 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:04:25,130 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 72 [2019-12-07 13:04:25,130 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:04:25,134 INFO L225 Difference]: With dead ends: 1452 [2019-12-07 13:04:25,134 INFO L226 Difference]: Without dead ends: 731 [2019-12-07 13:04:25,135 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:25,136 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 731 states. [2019-12-07 13:04:25,157 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 731 to 731. [2019-12-07 13:04:25,157 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 731 states. [2019-12-07 13:04:25,159 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 731 states to 731 states and 1098 transitions. [2019-12-07 13:04:25,160 INFO L78 Accepts]: Start accepts. Automaton has 731 states and 1098 transitions. Word has length 72 [2019-12-07 13:04:25,160 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:04:25,160 INFO L462 AbstractCegarLoop]: Abstraction has 731 states and 1098 transitions. [2019-12-07 13:04:25,160 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:04:25,160 INFO L276 IsEmpty]: Start isEmpty. Operand 731 states and 1098 transitions. [2019-12-07 13:04:25,161 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 13:04:25,161 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:04:25,162 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:04:25,162 INFO L410 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:04:25,162 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:04:25,162 INFO L82 PathProgramCache]: Analyzing trace with hash -469363554, now seen corresponding path program 1 times [2019-12-07 13:04:25,163 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:04:25,163 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [854612493] [2019-12-07 13:04:25,163 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:04:25,174 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:04:25,203 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:04:25,203 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [854612493] [2019-12-07 13:04:25,203 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:04:25,203 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:04:25,203 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [227728663] [2019-12-07 13:04:25,204 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:04:25,204 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:04:25,204 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:04:25,204 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:25,205 INFO L87 Difference]: Start difference. First operand 731 states and 1098 transitions. Second operand 3 states. [2019-12-07 13:04:25,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:04:25,245 INFO L93 Difference]: Finished difference Result 1451 states and 2180 transitions. [2019-12-07 13:04:25,246 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:04:25,246 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 72 [2019-12-07 13:04:25,246 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:04:25,250 INFO L225 Difference]: With dead ends: 1451 [2019-12-07 13:04:25,250 INFO L226 Difference]: Without dead ends: 731 [2019-12-07 13:04:25,252 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:25,254 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 731 states. [2019-12-07 13:04:25,275 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 731 to 731. [2019-12-07 13:04:25,276 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 731 states. [2019-12-07 13:04:25,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 731 states to 731 states and 1090 transitions. [2019-12-07 13:04:25,278 INFO L78 Accepts]: Start accepts. Automaton has 731 states and 1090 transitions. Word has length 72 [2019-12-07 13:04:25,278 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:04:25,278 INFO L462 AbstractCegarLoop]: Abstraction has 731 states and 1090 transitions. [2019-12-07 13:04:25,278 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:04:25,279 INFO L276 IsEmpty]: Start isEmpty. Operand 731 states and 1090 transitions. [2019-12-07 13:04:25,280 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 13:04:25,280 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:04:25,280 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:04:25,280 INFO L410 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:04:25,280 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:04:25,281 INFO L82 PathProgramCache]: Analyzing trace with hash 428763418, now seen corresponding path program 1 times [2019-12-07 13:04:25,281 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:04:25,281 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1115101586] [2019-12-07 13:04:25,281 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:04:25,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:04:25,316 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:04:25,317 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1115101586] [2019-12-07 13:04:25,317 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:04:25,317 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:04:25,317 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [599006472] [2019-12-07 13:04:25,317 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:04:25,318 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:04:25,318 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:04:25,318 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:25,318 INFO L87 Difference]: Start difference. First operand 731 states and 1090 transitions. Second operand 3 states. [2019-12-07 13:04:25,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:04:25,359 INFO L93 Difference]: Finished difference Result 1450 states and 2163 transitions. [2019-12-07 13:04:25,360 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:04:25,360 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 72 [2019-12-07 13:04:25,360 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:04:25,363 INFO L225 Difference]: With dead ends: 1450 [2019-12-07 13:04:25,363 INFO L226 Difference]: Without dead ends: 731 [2019-12-07 13:04:25,364 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:25,365 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 731 states. [2019-12-07 13:04:25,381 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 731 to 731. [2019-12-07 13:04:25,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 731 states. [2019-12-07 13:04:25,383 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 731 states to 731 states and 1082 transitions. [2019-12-07 13:04:25,383 INFO L78 Accepts]: Start accepts. Automaton has 731 states and 1082 transitions. Word has length 72 [2019-12-07 13:04:25,383 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:04:25,383 INFO L462 AbstractCegarLoop]: Abstraction has 731 states and 1082 transitions. [2019-12-07 13:04:25,383 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:04:25,384 INFO L276 IsEmpty]: Start isEmpty. Operand 731 states and 1082 transitions. [2019-12-07 13:04:25,384 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 13:04:25,384 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:04:25,384 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:04:25,385 INFO L410 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:04:25,385 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:04:25,385 INFO L82 PathProgramCache]: Analyzing trace with hash -1481927394, now seen corresponding path program 1 times [2019-12-07 13:04:25,385 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:04:25,385 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2045937033] [2019-12-07 13:04:25,385 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:04:25,392 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:04:25,414 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:04:25,415 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2045937033] [2019-12-07 13:04:25,415 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:04:25,415 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:04:25,415 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [140138902] [2019-12-07 13:04:25,416 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:04:25,416 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:04:25,416 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:04:25,416 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:25,416 INFO L87 Difference]: Start difference. First operand 731 states and 1082 transitions. Second operand 3 states. [2019-12-07 13:04:25,466 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:04:25,466 INFO L93 Difference]: Finished difference Result 1448 states and 2144 transitions. [2019-12-07 13:04:25,466 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:04:25,466 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 72 [2019-12-07 13:04:25,466 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:04:25,470 INFO L225 Difference]: With dead ends: 1448 [2019-12-07 13:04:25,470 INFO L226 Difference]: Without dead ends: 731 [2019-12-07 13:04:25,472 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:25,473 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 731 states. [2019-12-07 13:04:25,496 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 731 to 731. [2019-12-07 13:04:25,497 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 731 states. [2019-12-07 13:04:25,499 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 731 states to 731 states and 1062 transitions. [2019-12-07 13:04:25,499 INFO L78 Accepts]: Start accepts. Automaton has 731 states and 1062 transitions. Word has length 72 [2019-12-07 13:04:25,500 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:04:25,500 INFO L462 AbstractCegarLoop]: Abstraction has 731 states and 1062 transitions. [2019-12-07 13:04:25,500 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:04:25,500 INFO L276 IsEmpty]: Start isEmpty. Operand 731 states and 1062 transitions. [2019-12-07 13:04:25,500 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 13:04:25,501 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:04:25,501 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:04:25,501 INFO L410 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:04:25,501 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:04:25,501 INFO L82 PathProgramCache]: Analyzing trace with hash 1411017443, now seen corresponding path program 1 times [2019-12-07 13:04:25,501 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:04:25,502 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1907436918] [2019-12-07 13:04:25,502 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:04:25,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:04:25,533 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:04:25,533 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1907436918] [2019-12-07 13:04:25,533 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:04:25,533 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:04:25,533 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [513434058] [2019-12-07 13:04:25,534 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:04:25,534 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:04:25,534 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:04:25,534 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:25,534 INFO L87 Difference]: Start difference. First operand 731 states and 1062 transitions. Second operand 3 states. [2019-12-07 13:04:25,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:04:25,585 INFO L93 Difference]: Finished difference Result 1447 states and 2103 transitions. [2019-12-07 13:04:25,585 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:04:25,585 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 72 [2019-12-07 13:04:25,585 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:04:25,589 INFO L225 Difference]: With dead ends: 1447 [2019-12-07 13:04:25,589 INFO L226 Difference]: Without dead ends: 731 [2019-12-07 13:04:25,591 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:25,592 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 731 states. [2019-12-07 13:04:25,609 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 731 to 731. [2019-12-07 13:04:25,609 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 731 states. [2019-12-07 13:04:25,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 731 states to 731 states and 1042 transitions. [2019-12-07 13:04:25,611 INFO L78 Accepts]: Start accepts. Automaton has 731 states and 1042 transitions. Word has length 72 [2019-12-07 13:04:25,611 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:04:25,611 INFO L462 AbstractCegarLoop]: Abstraction has 731 states and 1042 transitions. [2019-12-07 13:04:25,611 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:04:25,611 INFO L276 IsEmpty]: Start isEmpty. Operand 731 states and 1042 transitions. [2019-12-07 13:04:25,612 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 13:04:25,612 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:04:25,612 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:04:25,612 INFO L410 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:04:25,612 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:04:25,612 INFO L82 PathProgramCache]: Analyzing trace with hash -149398177, now seen corresponding path program 1 times [2019-12-07 13:04:25,612 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:04:25,613 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2035115578] [2019-12-07 13:04:25,613 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:04:25,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:04:25,632 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:04:25,633 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2035115578] [2019-12-07 13:04:25,633 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:04:25,633 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:04:25,633 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [763080035] [2019-12-07 13:04:25,633 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:04:25,633 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:04:25,634 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:04:25,634 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:25,634 INFO L87 Difference]: Start difference. First operand 731 states and 1042 transitions. Second operand 3 states. [2019-12-07 13:04:25,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:04:25,686 INFO L93 Difference]: Finished difference Result 1446 states and 2062 transitions. [2019-12-07 13:04:25,687 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:04:25,687 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 72 [2019-12-07 13:04:25,687 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:04:25,691 INFO L225 Difference]: With dead ends: 1446 [2019-12-07 13:04:25,691 INFO L226 Difference]: Without dead ends: 731 [2019-12-07 13:04:25,692 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:25,694 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 731 states. [2019-12-07 13:04:25,716 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 731 to 731. [2019-12-07 13:04:25,716 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 731 states. [2019-12-07 13:04:25,718 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 731 states to 731 states and 1022 transitions. [2019-12-07 13:04:25,718 INFO L78 Accepts]: Start accepts. Automaton has 731 states and 1022 transitions. Word has length 72 [2019-12-07 13:04:25,718 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:04:25,718 INFO L462 AbstractCegarLoop]: Abstraction has 731 states and 1022 transitions. [2019-12-07 13:04:25,718 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:04:25,718 INFO L276 IsEmpty]: Start isEmpty. Operand 731 states and 1022 transitions. [2019-12-07 13:04:25,719 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 13:04:25,719 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:04:25,719 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:04:25,719 INFO L410 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:04:25,719 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:04:25,719 INFO L82 PathProgramCache]: Analyzing trace with hash -962003548, now seen corresponding path program 1 times [2019-12-07 13:04:25,720 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:04:25,720 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1243139418] [2019-12-07 13:04:25,720 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:04:25,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:04:25,740 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:04:25,740 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1243139418] [2019-12-07 13:04:25,740 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:04:25,740 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:04:25,740 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2069368733] [2019-12-07 13:04:25,741 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:04:25,741 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:04:25,741 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:04:25,741 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:25,741 INFO L87 Difference]: Start difference. First operand 731 states and 1022 transitions. Second operand 3 states. [2019-12-07 13:04:25,792 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:04:25,792 INFO L93 Difference]: Finished difference Result 1445 states and 2021 transitions. [2019-12-07 13:04:25,793 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:04:25,793 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 72 [2019-12-07 13:04:25,793 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:04:25,797 INFO L225 Difference]: With dead ends: 1445 [2019-12-07 13:04:25,797 INFO L226 Difference]: Without dead ends: 731 [2019-12-07 13:04:25,798 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:25,799 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 731 states. [2019-12-07 13:04:25,827 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 731 to 731. [2019-12-07 13:04:25,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 731 states. [2019-12-07 13:04:25,830 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 731 states to 731 states and 1002 transitions. [2019-12-07 13:04:25,830 INFO L78 Accepts]: Start accepts. Automaton has 731 states and 1002 transitions. Word has length 72 [2019-12-07 13:04:25,830 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:04:25,831 INFO L462 AbstractCegarLoop]: Abstraction has 731 states and 1002 transitions. [2019-12-07 13:04:25,831 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:04:25,831 INFO L276 IsEmpty]: Start isEmpty. Operand 731 states and 1002 transitions. [2019-12-07 13:04:25,831 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 13:04:25,831 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:04:25,831 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:04:25,832 INFO L410 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:04:25,832 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:04:25,832 INFO L82 PathProgramCache]: Analyzing trace with hash -1942397152, now seen corresponding path program 1 times [2019-12-07 13:04:25,832 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:04:25,832 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1581133439] [2019-12-07 13:04:25,832 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:04:25,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:04:25,855 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:04:25,855 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1581133439] [2019-12-07 13:04:25,856 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:04:25,856 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:04:25,856 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [166159239] [2019-12-07 13:04:25,856 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:04:25,856 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:04:25,857 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:04:25,857 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:25,857 INFO L87 Difference]: Start difference. First operand 731 states and 1002 transitions. Second operand 3 states. [2019-12-07 13:04:25,911 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:04:25,912 INFO L93 Difference]: Finished difference Result 1444 states and 1980 transitions. [2019-12-07 13:04:25,912 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:04:25,912 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 72 [2019-12-07 13:04:25,912 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:04:25,916 INFO L225 Difference]: With dead ends: 1444 [2019-12-07 13:04:25,916 INFO L226 Difference]: Without dead ends: 731 [2019-12-07 13:04:25,918 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:25,919 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 731 states. [2019-12-07 13:04:25,947 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 731 to 731. [2019-12-07 13:04:25,948 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 731 states. [2019-12-07 13:04:25,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 731 states to 731 states and 982 transitions. [2019-12-07 13:04:25,950 INFO L78 Accepts]: Start accepts. Automaton has 731 states and 982 transitions. Word has length 72 [2019-12-07 13:04:25,951 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:04:25,951 INFO L462 AbstractCegarLoop]: Abstraction has 731 states and 982 transitions. [2019-12-07 13:04:25,951 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:04:25,951 INFO L276 IsEmpty]: Start isEmpty. Operand 731 states and 982 transitions. [2019-12-07 13:04:25,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 13:04:25,952 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:04:25,952 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:04:25,952 INFO L410 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:04:25,952 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:04:25,952 INFO L82 PathProgramCache]: Analyzing trace with hash -1527286429, now seen corresponding path program 1 times [2019-12-07 13:04:25,952 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:04:25,953 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [998856971] [2019-12-07 13:04:25,953 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:04:25,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:04:25,985 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:04:25,985 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [998856971] [2019-12-07 13:04:25,985 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:04:25,985 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:04:25,985 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1540099928] [2019-12-07 13:04:25,986 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:04:25,986 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:04:25,986 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:04:25,986 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:25,986 INFO L87 Difference]: Start difference. First operand 731 states and 982 transitions. Second operand 3 states. [2019-12-07 13:04:26,022 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:04:26,023 INFO L93 Difference]: Finished difference Result 1449 states and 1946 transitions. [2019-12-07 13:04:26,023 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:04:26,023 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 72 [2019-12-07 13:04:26,024 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:04:26,027 INFO L225 Difference]: With dead ends: 1449 [2019-12-07 13:04:26,027 INFO L226 Difference]: Without dead ends: 731 [2019-12-07 13:04:26,028 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:26,030 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 731 states. [2019-12-07 13:04:26,069 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 731 to 731. [2019-12-07 13:04:26,069 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 731 states. [2019-12-07 13:04:26,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 731 states to 731 states and 974 transitions. [2019-12-07 13:04:26,071 INFO L78 Accepts]: Start accepts. Automaton has 731 states and 974 transitions. Word has length 72 [2019-12-07 13:04:26,071 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:04:26,071 INFO L462 AbstractCegarLoop]: Abstraction has 731 states and 974 transitions. [2019-12-07 13:04:26,071 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:04:26,071 INFO L276 IsEmpty]: Start isEmpty. Operand 731 states and 974 transitions. [2019-12-07 13:04:26,072 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2019-12-07 13:04:26,072 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:04:26,072 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:04:26,072 INFO L410 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:04:26,072 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:04:26,073 INFO L82 PathProgramCache]: Analyzing trace with hash 1950032417, now seen corresponding path program 1 times [2019-12-07 13:04:26,073 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:04:26,073 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2062600113] [2019-12-07 13:04:26,073 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:04:26,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:04:26,100 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:04:26,100 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2062600113] [2019-12-07 13:04:26,100 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:04:26,100 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:04:26,100 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1139977960] [2019-12-07 13:04:26,101 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:04:26,101 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:04:26,101 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:04:26,101 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:26,101 INFO L87 Difference]: Start difference. First operand 731 states and 974 transitions. Second operand 3 states. [2019-12-07 13:04:26,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:04:26,185 INFO L93 Difference]: Finished difference Result 2078 states and 2774 transitions. [2019-12-07 13:04:26,185 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:04:26,185 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 72 [2019-12-07 13:04:26,186 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:04:26,193 INFO L225 Difference]: With dead ends: 2078 [2019-12-07 13:04:26,193 INFO L226 Difference]: Without dead ends: 1367 [2019-12-07 13:04:26,194 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:26,196 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1367 states. [2019-12-07 13:04:26,254 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1367 to 1301. [2019-12-07 13:04:26,255 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1301 states. [2019-12-07 13:04:26,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1301 states to 1301 states and 1723 transitions. [2019-12-07 13:04:26,258 INFO L78 Accepts]: Start accepts. Automaton has 1301 states and 1723 transitions. Word has length 72 [2019-12-07 13:04:26,258 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:04:26,258 INFO L462 AbstractCegarLoop]: Abstraction has 1301 states and 1723 transitions. [2019-12-07 13:04:26,259 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:04:26,259 INFO L276 IsEmpty]: Start isEmpty. Operand 1301 states and 1723 transitions. [2019-12-07 13:04:26,260 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2019-12-07 13:04:26,260 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:04:26,260 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:04:26,260 INFO L410 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:04:26,260 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:04:26,260 INFO L82 PathProgramCache]: Analyzing trace with hash -1262693056, now seen corresponding path program 1 times [2019-12-07 13:04:26,260 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:04:26,260 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [314160606] [2019-12-07 13:04:26,260 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:04:26,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:04:26,308 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:04:26,308 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [314160606] [2019-12-07 13:04:26,308 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:04:26,308 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:04:26,309 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1656621747] [2019-12-07 13:04:26,309 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:04:26,309 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:04:26,309 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:04:26,309 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:04:26,310 INFO L87 Difference]: Start difference. First operand 1301 states and 1723 transitions. Second operand 5 states. [2019-12-07 13:04:26,464 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:04:26,464 INFO L93 Difference]: Finished difference Result 2968 states and 3967 transitions. [2019-12-07 13:04:26,465 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 13:04:26,465 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 117 [2019-12-07 13:04:26,465 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:04:26,472 INFO L225 Difference]: With dead ends: 2968 [2019-12-07 13:04:26,472 INFO L226 Difference]: Without dead ends: 1691 [2019-12-07 13:04:26,474 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:04:26,476 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1691 states. [2019-12-07 13:04:26,523 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1691 to 1307. [2019-12-07 13:04:26,524 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1307 states. [2019-12-07 13:04:26,527 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1307 states to 1307 states and 1706 transitions. [2019-12-07 13:04:26,527 INFO L78 Accepts]: Start accepts. Automaton has 1307 states and 1706 transitions. Word has length 117 [2019-12-07 13:04:26,527 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:04:26,527 INFO L462 AbstractCegarLoop]: Abstraction has 1307 states and 1706 transitions. [2019-12-07 13:04:26,527 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:04:26,527 INFO L276 IsEmpty]: Start isEmpty. Operand 1307 states and 1706 transitions. [2019-12-07 13:04:26,528 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2019-12-07 13:04:26,528 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:04:26,528 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:04:26,528 INFO L410 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:04:26,529 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:04:26,529 INFO L82 PathProgramCache]: Analyzing trace with hash 1661445820, now seen corresponding path program 1 times [2019-12-07 13:04:26,529 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:04:26,529 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [264161246] [2019-12-07 13:04:26,529 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:04:26,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:04:26,563 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:04:26,563 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [264161246] [2019-12-07 13:04:26,564 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:04:26,564 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:04:26,564 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2141990027] [2019-12-07 13:04:26,564 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:04:26,564 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:04:26,565 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:04:26,565 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:26,565 INFO L87 Difference]: Start difference. First operand 1307 states and 1706 transitions. Second operand 3 states. [2019-12-07 13:04:26,668 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:04:26,668 INFO L93 Difference]: Finished difference Result 3774 states and 4946 transitions. [2019-12-07 13:04:26,668 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:04:26,669 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 117 [2019-12-07 13:04:26,669 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:04:26,678 INFO L225 Difference]: With dead ends: 3774 [2019-12-07 13:04:26,678 INFO L226 Difference]: Without dead ends: 2493 [2019-12-07 13:04:26,680 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:26,682 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2493 states. [2019-12-07 13:04:26,763 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2493 to 2377. [2019-12-07 13:04:26,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2377 states. [2019-12-07 13:04:26,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2377 states to 2377 states and 3100 transitions. [2019-12-07 13:04:26,769 INFO L78 Accepts]: Start accepts. Automaton has 2377 states and 3100 transitions. Word has length 117 [2019-12-07 13:04:26,769 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:04:26,769 INFO L462 AbstractCegarLoop]: Abstraction has 2377 states and 3100 transitions. [2019-12-07 13:04:26,769 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:04:26,769 INFO L276 IsEmpty]: Start isEmpty. Operand 2377 states and 3100 transitions. [2019-12-07 13:04:26,771 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2019-12-07 13:04:26,771 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:04:26,771 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:04:26,771 INFO L410 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:04:26,771 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:04:26,771 INFO L82 PathProgramCache]: Analyzing trace with hash 2061437019, now seen corresponding path program 1 times [2019-12-07 13:04:26,771 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:04:26,772 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2120067959] [2019-12-07 13:04:26,772 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:04:26,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:04:26,818 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:04:26,818 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2120067959] [2019-12-07 13:04:26,818 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:04:26,819 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:04:26,819 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [459255760] [2019-12-07 13:04:26,819 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:04:26,819 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:04:26,819 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:04:26,819 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:04:26,820 INFO L87 Difference]: Start difference. First operand 2377 states and 3100 transitions. Second operand 5 states. [2019-12-07 13:04:27,010 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:04:27,011 INFO L93 Difference]: Finished difference Result 5178 states and 6787 transitions. [2019-12-07 13:04:27,011 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 13:04:27,011 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 117 [2019-12-07 13:04:27,011 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:04:27,021 INFO L225 Difference]: With dead ends: 5178 [2019-12-07 13:04:27,021 INFO L226 Difference]: Without dead ends: 2831 [2019-12-07 13:04:27,024 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:04:27,027 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2831 states. [2019-12-07 13:04:27,110 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2831 to 2383. [2019-12-07 13:04:27,110 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2383 states. [2019-12-07 13:04:27,115 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2383 states to 2383 states and 3063 transitions. [2019-12-07 13:04:27,115 INFO L78 Accepts]: Start accepts. Automaton has 2383 states and 3063 transitions. Word has length 117 [2019-12-07 13:04:27,115 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:04:27,115 INFO L462 AbstractCegarLoop]: Abstraction has 2383 states and 3063 transitions. [2019-12-07 13:04:27,116 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:04:27,116 INFO L276 IsEmpty]: Start isEmpty. Operand 2383 states and 3063 transitions. [2019-12-07 13:04:27,117 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2019-12-07 13:04:27,117 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:04:27,117 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:04:27,117 INFO L410 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:04:27,117 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:04:27,117 INFO L82 PathProgramCache]: Analyzing trace with hash 672376535, now seen corresponding path program 1 times [2019-12-07 13:04:27,118 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:04:27,118 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2022117817] [2019-12-07 13:04:27,118 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:04:27,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:04:27,147 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:04:27,148 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2022117817] [2019-12-07 13:04:27,148 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:04:27,148 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:04:27,148 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1702568363] [2019-12-07 13:04:27,148 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:04:27,148 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:04:27,149 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:04:27,149 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:04:27,149 INFO L87 Difference]: Start difference. First operand 2383 states and 3063 transitions. Second operand 5 states. [2019-12-07 13:04:27,355 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:04:27,356 INFO L93 Difference]: Finished difference Result 5747 states and 7403 transitions. [2019-12-07 13:04:27,356 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 13:04:27,356 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 117 [2019-12-07 13:04:27,356 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:04:27,368 INFO L225 Difference]: With dead ends: 5747 [2019-12-07 13:04:27,368 INFO L226 Difference]: Without dead ends: 3401 [2019-12-07 13:04:27,371 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:04:27,374 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3401 states. [2019-12-07 13:04:27,472 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3401 to 2395. [2019-12-07 13:04:27,472 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2395 states. [2019-12-07 13:04:27,477 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2395 states to 2395 states and 3034 transitions. [2019-12-07 13:04:27,477 INFO L78 Accepts]: Start accepts. Automaton has 2395 states and 3034 transitions. Word has length 117 [2019-12-07 13:04:27,477 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:04:27,477 INFO L462 AbstractCegarLoop]: Abstraction has 2395 states and 3034 transitions. [2019-12-07 13:04:27,477 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:04:27,478 INFO L276 IsEmpty]: Start isEmpty. Operand 2395 states and 3034 transitions. [2019-12-07 13:04:27,479 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2019-12-07 13:04:27,479 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:04:27,479 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:04:27,479 INFO L410 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:04:27,479 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:04:27,479 INFO L82 PathProgramCache]: Analyzing trace with hash -2033200557, now seen corresponding path program 1 times [2019-12-07 13:04:27,479 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:04:27,480 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1307281579] [2019-12-07 13:04:27,480 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:04:27,486 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:04:27,509 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:04:27,509 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1307281579] [2019-12-07 13:04:27,509 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:04:27,509 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:04:27,509 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [456241659] [2019-12-07 13:04:27,509 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:04:27,509 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:04:27,510 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:04:27,510 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:04:27,510 INFO L87 Difference]: Start difference. First operand 2395 states and 3034 transitions. Second operand 5 states. [2019-12-07 13:04:27,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:04:27,758 INFO L93 Difference]: Finished difference Result 6833 states and 8746 transitions. [2019-12-07 13:04:27,758 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 13:04:27,758 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 117 [2019-12-07 13:04:27,758 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:04:27,774 INFO L225 Difference]: With dead ends: 6833 [2019-12-07 13:04:27,774 INFO L226 Difference]: Without dead ends: 4489 [2019-12-07 13:04:27,777 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:04:27,782 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4489 states. [2019-12-07 13:04:27,884 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4489 to 2419. [2019-12-07 13:04:27,884 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2419 states. [2019-12-07 13:04:27,889 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2419 states to 2419 states and 3021 transitions. [2019-12-07 13:04:27,889 INFO L78 Accepts]: Start accepts. Automaton has 2419 states and 3021 transitions. Word has length 117 [2019-12-07 13:04:27,889 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:04:27,889 INFO L462 AbstractCegarLoop]: Abstraction has 2419 states and 3021 transitions. [2019-12-07 13:04:27,889 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:04:27,889 INFO L276 IsEmpty]: Start isEmpty. Operand 2419 states and 3021 transitions. [2019-12-07 13:04:27,890 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2019-12-07 13:04:27,891 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:04:27,891 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:04:27,891 INFO L410 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:04:27,891 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:04:27,891 INFO L82 PathProgramCache]: Analyzing trace with hash -2118887473, now seen corresponding path program 1 times [2019-12-07 13:04:27,891 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:04:27,891 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1287600050] [2019-12-07 13:04:27,891 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:04:27,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:04:27,922 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:04:27,922 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1287600050] [2019-12-07 13:04:27,922 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:04:27,922 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:04:27,922 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1971557274] [2019-12-07 13:04:27,922 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:04:27,922 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:04:27,923 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:04:27,923 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:27,923 INFO L87 Difference]: Start difference. First operand 2419 states and 3021 transitions. Second operand 3 states. [2019-12-07 13:04:28,152 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:04:28,152 INFO L93 Difference]: Finished difference Result 6877 states and 8545 transitions. [2019-12-07 13:04:28,153 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:04:28,153 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 117 [2019-12-07 13:04:28,153 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:04:28,169 INFO L225 Difference]: With dead ends: 6877 [2019-12-07 13:04:28,169 INFO L226 Difference]: Without dead ends: 4519 [2019-12-07 13:04:28,172 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:28,176 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4519 states. [2019-12-07 13:04:28,338 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4519 to 4515. [2019-12-07 13:04:28,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4515 states. [2019-12-07 13:04:28,345 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4515 states to 4515 states and 5559 transitions. [2019-12-07 13:04:28,346 INFO L78 Accepts]: Start accepts. Automaton has 4515 states and 5559 transitions. Word has length 117 [2019-12-07 13:04:28,346 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:04:28,346 INFO L462 AbstractCegarLoop]: Abstraction has 4515 states and 5559 transitions. [2019-12-07 13:04:28,346 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:04:28,346 INFO L276 IsEmpty]: Start isEmpty. Operand 4515 states and 5559 transitions. [2019-12-07 13:04:28,348 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2019-12-07 13:04:28,348 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:04:28,348 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:04:28,348 INFO L410 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:04:28,348 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:04:28,348 INFO L82 PathProgramCache]: Analyzing trace with hash 1555831778, now seen corresponding path program 1 times [2019-12-07 13:04:28,349 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:04:28,349 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2078008270] [2019-12-07 13:04:28,349 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:04:28,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:04:28,379 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:04:28,379 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2078008270] [2019-12-07 13:04:28,379 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:04:28,379 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:04:28,380 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1792573420] [2019-12-07 13:04:28,380 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:04:28,380 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:04:28,380 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:04:28,380 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:28,380 INFO L87 Difference]: Start difference. First operand 4515 states and 5559 transitions. Second operand 3 states. [2019-12-07 13:04:28,673 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:04:28,673 INFO L93 Difference]: Finished difference Result 12790 states and 15720 transitions. [2019-12-07 13:04:28,674 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:04:28,674 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 118 [2019-12-07 13:04:28,675 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:04:28,687 INFO L225 Difference]: With dead ends: 12790 [2019-12-07 13:04:28,687 INFO L226 Difference]: Without dead ends: 8336 [2019-12-07 13:04:28,692 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:28,702 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8336 states. [2019-12-07 13:04:28,977 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8336 to 8332. [2019-12-07 13:04:28,977 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8332 states. [2019-12-07 13:04:28,984 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8332 states to 8332 states and 10188 transitions. [2019-12-07 13:04:28,984 INFO L78 Accepts]: Start accepts. Automaton has 8332 states and 10188 transitions. Word has length 118 [2019-12-07 13:04:28,984 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:04:28,985 INFO L462 AbstractCegarLoop]: Abstraction has 8332 states and 10188 transitions. [2019-12-07 13:04:28,985 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:04:28,985 INFO L276 IsEmpty]: Start isEmpty. Operand 8332 states and 10188 transitions. [2019-12-07 13:04:28,988 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2019-12-07 13:04:28,988 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:04:28,988 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:04:28,988 INFO L410 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:04:28,988 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:04:28,988 INFO L82 PathProgramCache]: Analyzing trace with hash -1011990556, now seen corresponding path program 1 times [2019-12-07 13:04:28,988 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:04:28,988 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1194304556] [2019-12-07 13:04:28,988 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:04:28,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:04:29,006 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2019-12-07 13:04:29,006 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1194304556] [2019-12-07 13:04:29,006 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:04:29,006 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:04:29,007 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [755379900] [2019-12-07 13:04:29,007 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:04:29,007 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:04:29,007 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:04:29,007 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:29,008 INFO L87 Difference]: Start difference. First operand 8332 states and 10188 transitions. Second operand 3 states. [2019-12-07 13:04:29,356 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:04:29,356 INFO L93 Difference]: Finished difference Result 16548 states and 20246 transitions. [2019-12-07 13:04:29,356 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:04:29,356 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 118 [2019-12-07 13:04:29,356 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:04:29,364 INFO L225 Difference]: With dead ends: 16548 [2019-12-07 13:04:29,365 INFO L226 Difference]: Without dead ends: 8277 [2019-12-07 13:04:29,370 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:29,376 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8277 states. [2019-12-07 13:04:29,638 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8277 to 8277. [2019-12-07 13:04:29,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8277 states. [2019-12-07 13:04:29,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8277 states to 8277 states and 10126 transitions. [2019-12-07 13:04:29,645 INFO L78 Accepts]: Start accepts. Automaton has 8277 states and 10126 transitions. Word has length 118 [2019-12-07 13:04:29,645 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:04:29,645 INFO L462 AbstractCegarLoop]: Abstraction has 8277 states and 10126 transitions. [2019-12-07 13:04:29,645 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:04:29,645 INFO L276 IsEmpty]: Start isEmpty. Operand 8277 states and 10126 transitions. [2019-12-07 13:04:29,647 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2019-12-07 13:04:29,648 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:04:29,648 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:04:29,648 INFO L410 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:04:29,648 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:04:29,648 INFO L82 PathProgramCache]: Analyzing trace with hash -453804771, now seen corresponding path program 1 times [2019-12-07 13:04:29,648 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:04:29,648 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1074162424] [2019-12-07 13:04:29,648 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:04:29,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:04:29,679 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:04:29,680 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1074162424] [2019-12-07 13:04:29,680 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:04:29,680 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:04:29,680 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [286523339] [2019-12-07 13:04:29,681 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:04:29,681 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:04:29,681 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:04:29,681 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:29,681 INFO L87 Difference]: Start difference. First operand 8277 states and 10126 transitions. Second operand 3 states. [2019-12-07 13:04:30,215 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:04:30,215 INFO L93 Difference]: Finished difference Result 23779 states and 29069 transitions. [2019-12-07 13:04:30,216 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:04:30,216 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 119 [2019-12-07 13:04:30,216 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:04:30,233 INFO L225 Difference]: With dead ends: 23779 [2019-12-07 13:04:30,234 INFO L226 Difference]: Without dead ends: 15563 [2019-12-07 13:04:30,240 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:30,251 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15563 states. [2019-12-07 13:04:30,825 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15563 to 15143. [2019-12-07 13:04:30,825 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15143 states. [2019-12-07 13:04:30,836 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15143 states to 15143 states and 18441 transitions. [2019-12-07 13:04:30,837 INFO L78 Accepts]: Start accepts. Automaton has 15143 states and 18441 transitions. Word has length 119 [2019-12-07 13:04:30,837 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:04:30,837 INFO L462 AbstractCegarLoop]: Abstraction has 15143 states and 18441 transitions. [2019-12-07 13:04:30,837 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:04:30,837 INFO L276 IsEmpty]: Start isEmpty. Operand 15143 states and 18441 transitions. [2019-12-07 13:04:30,841 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2019-12-07 13:04:30,841 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:04:30,841 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:04:30,841 INFO L410 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:04:30,841 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:04:30,841 INFO L82 PathProgramCache]: Analyzing trace with hash 2112373853, now seen corresponding path program 1 times [2019-12-07 13:04:30,841 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:04:30,841 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1382405628] [2019-12-07 13:04:30,842 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:04:30,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:04:30,859 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2019-12-07 13:04:30,860 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1382405628] [2019-12-07 13:04:30,860 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:04:30,860 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:04:30,860 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1129929609] [2019-12-07 13:04:30,860 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:04:30,860 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:04:30,861 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:04:30,861 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:30,861 INFO L87 Difference]: Start difference. First operand 15143 states and 18441 transitions. Second operand 3 states. [2019-12-07 13:04:31,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:04:31,365 INFO L93 Difference]: Finished difference Result 30188 states and 36773 transitions. [2019-12-07 13:04:31,365 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:04:31,366 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 119 [2019-12-07 13:04:31,366 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:04:31,381 INFO L225 Difference]: With dead ends: 30188 [2019-12-07 13:04:31,381 INFO L226 Difference]: Without dead ends: 15089 [2019-12-07 13:04:31,395 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:31,404 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15089 states. [2019-12-07 13:04:31,941 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15089 to 15089. [2019-12-07 13:04:31,941 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15089 states. [2019-12-07 13:04:31,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15089 states to 15089 states and 18381 transitions. [2019-12-07 13:04:31,954 INFO L78 Accepts]: Start accepts. Automaton has 15089 states and 18381 transitions. Word has length 119 [2019-12-07 13:04:31,954 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:04:31,954 INFO L462 AbstractCegarLoop]: Abstraction has 15089 states and 18381 transitions. [2019-12-07 13:04:31,954 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:04:31,954 INFO L276 IsEmpty]: Start isEmpty. Operand 15089 states and 18381 transitions. [2019-12-07 13:04:31,957 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2019-12-07 13:04:31,957 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:04:31,957 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:04:31,958 INFO L410 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:04:31,958 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:04:31,958 INFO L82 PathProgramCache]: Analyzing trace with hash 564824724, now seen corresponding path program 1 times [2019-12-07 13:04:31,958 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:04:31,958 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [497593738] [2019-12-07 13:04:31,958 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:04:31,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:04:31,987 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:04:31,987 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [497593738] [2019-12-07 13:04:31,987 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:04:31,987 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:04:31,988 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1720335030] [2019-12-07 13:04:31,988 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:04:31,988 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:04:31,988 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:04:31,988 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:31,988 INFO L87 Difference]: Start difference. First operand 15089 states and 18381 transitions. Second operand 3 states. [2019-12-07 13:04:33,014 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:04:33,014 INFO L93 Difference]: Finished difference Result 42542 states and 51834 transitions. [2019-12-07 13:04:33,015 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:04:33,015 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 120 [2019-12-07 13:04:33,015 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:04:33,035 INFO L225 Difference]: With dead ends: 42542 [2019-12-07 13:04:33,035 INFO L226 Difference]: Without dead ends: 27514 [2019-12-07 13:04:33,045 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:33,062 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27514 states. [2019-12-07 13:04:34,011 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27514 to 27510. [2019-12-07 13:04:34,011 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27510 states. [2019-12-07 13:04:34,033 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27510 states to 27510 states and 33430 transitions. [2019-12-07 13:04:34,034 INFO L78 Accepts]: Start accepts. Automaton has 27510 states and 33430 transitions. Word has length 120 [2019-12-07 13:04:34,034 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:04:34,034 INFO L462 AbstractCegarLoop]: Abstraction has 27510 states and 33430 transitions. [2019-12-07 13:04:34,034 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:04:34,034 INFO L276 IsEmpty]: Start isEmpty. Operand 27510 states and 33430 transitions. [2019-12-07 13:04:34,039 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 121 [2019-12-07 13:04:34,039 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:04:34,040 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:04:34,040 INFO L410 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:04:34,040 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:04:34,040 INFO L82 PathProgramCache]: Analyzing trace with hash -2002997610, now seen corresponding path program 1 times [2019-12-07 13:04:34,040 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:04:34,040 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1690242621] [2019-12-07 13:04:34,040 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:04:34,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:04:34,057 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2019-12-07 13:04:34,057 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1690242621] [2019-12-07 13:04:34,058 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:04:34,058 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:04:34,058 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [96444658] [2019-12-07 13:04:34,058 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:04:34,058 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:04:34,058 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:04:34,059 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:34,059 INFO L87 Difference]: Start difference. First operand 27510 states and 33430 transitions. Second operand 3 states. [2019-12-07 13:04:35,072 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:04:35,073 INFO L93 Difference]: Finished difference Result 54906 states and 66736 transitions. [2019-12-07 13:04:35,073 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:04:35,073 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 120 [2019-12-07 13:04:35,073 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:04:35,099 INFO L225 Difference]: With dead ends: 54906 [2019-12-07 13:04:35,099 INFO L226 Difference]: Without dead ends: 27457 [2019-12-07 13:04:35,117 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:35,138 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27457 states. [2019-12-07 13:04:36,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27457 to 27457. [2019-12-07 13:04:36,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27457 states. [2019-12-07 13:04:36,170 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27457 states to 27457 states and 33372 transitions. [2019-12-07 13:04:36,171 INFO L78 Accepts]: Start accepts. Automaton has 27457 states and 33372 transitions. Word has length 120 [2019-12-07 13:04:36,171 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:04:36,171 INFO L462 AbstractCegarLoop]: Abstraction has 27457 states and 33372 transitions. [2019-12-07 13:04:36,171 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:04:36,171 INFO L276 IsEmpty]: Start isEmpty. Operand 27457 states and 33372 transitions. [2019-12-07 13:04:36,176 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2019-12-07 13:04:36,176 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:04:36,177 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:04:36,177 INFO L410 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:04:36,177 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:04:36,177 INFO L82 PathProgramCache]: Analyzing trace with hash 933474923, now seen corresponding path program 1 times [2019-12-07 13:04:36,177 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:04:36,177 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [840101091] [2019-12-07 13:04:36,177 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:04:36,185 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:04:36,206 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:04:36,206 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [840101091] [2019-12-07 13:04:36,206 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:04:36,206 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:04:36,206 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1772579991] [2019-12-07 13:04:36,207 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:04:36,207 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:04:36,207 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:04:36,207 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:36,207 INFO L87 Difference]: Start difference. First operand 27457 states and 33372 transitions. Second operand 3 states. [2019-12-07 13:04:37,995 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:04:37,996 INFO L93 Difference]: Finished difference Result 78974 states and 95659 transitions. [2019-12-07 13:04:37,996 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:04:37,996 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 121 [2019-12-07 13:04:37,996 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:04:38,028 INFO L225 Difference]: With dead ends: 78974 [2019-12-07 13:04:38,028 INFO L226 Difference]: Without dead ends: 39641 [2019-12-07 13:04:38,047 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:38,073 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39641 states. [2019-12-07 13:04:39,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39641 to 39641. [2019-12-07 13:04:39,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39641 states. [2019-12-07 13:04:39,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39641 states to 39641 states and 47863 transitions. [2019-12-07 13:04:39,631 INFO L78 Accepts]: Start accepts. Automaton has 39641 states and 47863 transitions. Word has length 121 [2019-12-07 13:04:39,631 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:04:39,631 INFO L462 AbstractCegarLoop]: Abstraction has 39641 states and 47863 transitions. [2019-12-07 13:04:39,631 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:04:39,631 INFO L276 IsEmpty]: Start isEmpty. Operand 39641 states and 47863 transitions. [2019-12-07 13:04:39,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 157 [2019-12-07 13:04:39,643 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:04:39,644 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:04:39,644 INFO L410 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:04:39,644 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:04:39,644 INFO L82 PathProgramCache]: Analyzing trace with hash 334867575, now seen corresponding path program 1 times [2019-12-07 13:04:39,644 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:04:39,644 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [630596521] [2019-12-07 13:04:39,644 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:04:39,650 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:04:39,682 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:04:39,682 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [630596521] [2019-12-07 13:04:39,683 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:04:39,683 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:04:39,683 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1224848739] [2019-12-07 13:04:39,683 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:04:39,683 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:04:39,684 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:04:39,684 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:39,684 INFO L87 Difference]: Start difference. First operand 39641 states and 47863 transitions. Second operand 3 states. [2019-12-07 13:04:41,522 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:04:41,522 INFO L93 Difference]: Finished difference Result 91203 states and 109883 transitions. [2019-12-07 13:04:41,523 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:04:41,523 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 156 [2019-12-07 13:04:41,523 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:04:41,571 INFO L225 Difference]: With dead ends: 91203 [2019-12-07 13:04:41,571 INFO L226 Difference]: Without dead ends: 51608 [2019-12-07 13:04:41,595 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:41,630 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51608 states. [2019-12-07 13:04:43,604 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51608 to 51416. [2019-12-07 13:04:43,604 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51416 states. [2019-12-07 13:04:43,649 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51416 states to 51416 states and 61605 transitions. [2019-12-07 13:04:43,649 INFO L78 Accepts]: Start accepts. Automaton has 51416 states and 61605 transitions. Word has length 156 [2019-12-07 13:04:43,650 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:04:43,650 INFO L462 AbstractCegarLoop]: Abstraction has 51416 states and 61605 transitions. [2019-12-07 13:04:43,650 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:04:43,650 INFO L276 IsEmpty]: Start isEmpty. Operand 51416 states and 61605 transitions. [2019-12-07 13:04:43,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 175 [2019-12-07 13:04:43,671 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:04:43,671 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:04:43,671 INFO L410 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:04:43,671 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:04:43,671 INFO L82 PathProgramCache]: Analyzing trace with hash -67611790, now seen corresponding path program 1 times [2019-12-07 13:04:43,671 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:04:43,672 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1240482837] [2019-12-07 13:04:43,672 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:04:43,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:04:43,703 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2019-12-07 13:04:43,704 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1240482837] [2019-12-07 13:04:43,704 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:04:43,704 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:04:43,704 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [621318094] [2019-12-07 13:04:43,704 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:04:43,704 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:04:43,704 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:04:43,704 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:43,704 INFO L87 Difference]: Start difference. First operand 51416 states and 61605 transitions. Second operand 3 states. [2019-12-07 13:04:45,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:04:45,654 INFO L93 Difference]: Finished difference Result 101872 states and 121803 transitions. [2019-12-07 13:04:45,655 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:04:45,655 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 174 [2019-12-07 13:04:45,655 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:04:45,698 INFO L225 Difference]: With dead ends: 101872 [2019-12-07 13:04:45,698 INFO L226 Difference]: Without dead ends: 50516 [2019-12-07 13:04:45,716 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:45,748 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50516 states. [2019-12-07 13:04:47,555 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50516 to 50516. [2019-12-07 13:04:47,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50516 states. [2019-12-07 13:04:47,603 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50516 states to 50516 states and 59621 transitions. [2019-12-07 13:04:47,603 INFO L78 Accepts]: Start accepts. Automaton has 50516 states and 59621 transitions. Word has length 174 [2019-12-07 13:04:47,604 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:04:47,604 INFO L462 AbstractCegarLoop]: Abstraction has 50516 states and 59621 transitions. [2019-12-07 13:04:47,604 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:04:47,604 INFO L276 IsEmpty]: Start isEmpty. Operand 50516 states and 59621 transitions. [2019-12-07 13:04:47,623 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 176 [2019-12-07 13:04:47,623 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:04:47,623 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:04:47,623 INFO L410 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:04:47,623 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:04:47,623 INFO L82 PathProgramCache]: Analyzing trace with hash -1145557634, now seen corresponding path program 1 times [2019-12-07 13:04:47,624 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:04:47,624 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1858769412] [2019-12-07 13:04:47,624 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:04:47,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:04:47,663 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 34 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:04:47,663 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1858769412] [2019-12-07 13:04:47,664 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:04:47,664 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:04:47,664 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [623681650] [2019-12-07 13:04:47,664 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:04:47,664 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:04:47,664 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:04:47,664 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:47,664 INFO L87 Difference]: Start difference. First operand 50516 states and 59621 transitions. Second operand 3 states. [2019-12-07 13:04:49,747 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:04:49,748 INFO L93 Difference]: Finished difference Result 89380 states and 105829 transitions. [2019-12-07 13:04:49,748 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:04:49,749 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 175 [2019-12-07 13:04:49,749 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:04:49,793 INFO L225 Difference]: With dead ends: 89380 [2019-12-07 13:04:49,793 INFO L226 Difference]: Without dead ends: 50520 [2019-12-07 13:04:49,810 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:49,841 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50520 states. [2019-12-07 13:04:52,438 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50520 to 50516. [2019-12-07 13:04:52,438 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50516 states. [2019-12-07 13:04:52,480 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50516 states to 50516 states and 59513 transitions. [2019-12-07 13:04:52,480 INFO L78 Accepts]: Start accepts. Automaton has 50516 states and 59513 transitions. Word has length 175 [2019-12-07 13:04:52,480 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:04:52,481 INFO L462 AbstractCegarLoop]: Abstraction has 50516 states and 59513 transitions. [2019-12-07 13:04:52,481 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:04:52,481 INFO L276 IsEmpty]: Start isEmpty. Operand 50516 states and 59513 transitions. [2019-12-07 13:04:52,496 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 211 [2019-12-07 13:04:52,496 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:04:52,497 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:04:52,497 INFO L410 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:04:52,497 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:04:52,497 INFO L82 PathProgramCache]: Analyzing trace with hash 2011308056, now seen corresponding path program 1 times [2019-12-07 13:04:52,497 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:04:52,497 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1127641308] [2019-12-07 13:04:52,497 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:04:52,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:04:52,555 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 21 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2019-12-07 13:04:52,555 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1127641308] [2019-12-07 13:04:52,555 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:04:52,555 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:04:52,555 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [113959027] [2019-12-07 13:04:52,556 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:04:52,556 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:04:52,556 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:04:52,556 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:52,556 INFO L87 Difference]: Start difference. First operand 50516 states and 59513 transitions. Second operand 3 states. [2019-12-07 13:04:54,805 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:04:54,805 INFO L93 Difference]: Finished difference Result 111624 states and 131256 transitions. [2019-12-07 13:04:54,806 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:04:54,806 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 210 [2019-12-07 13:04:54,806 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:04:54,861 INFO L225 Difference]: With dead ends: 111624 [2019-12-07 13:04:54,861 INFO L226 Difference]: Without dead ends: 61147 [2019-12-07 13:04:54,893 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:54,937 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61147 states. [2019-12-07 13:04:57,399 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61147 to 60891. [2019-12-07 13:04:57,399 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60891 states. [2019-12-07 13:04:57,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60891 states to 60891 states and 71287 transitions. [2019-12-07 13:04:57,453 INFO L78 Accepts]: Start accepts. Automaton has 60891 states and 71287 transitions. Word has length 210 [2019-12-07 13:04:57,453 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:04:57,453 INFO L462 AbstractCegarLoop]: Abstraction has 60891 states and 71287 transitions. [2019-12-07 13:04:57,453 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:04:57,453 INFO L276 IsEmpty]: Start isEmpty. Operand 60891 states and 71287 transitions. [2019-12-07 13:04:57,478 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 214 [2019-12-07 13:04:57,478 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:04:57,479 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:04:57,479 INFO L410 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:04:57,479 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:04:57,479 INFO L82 PathProgramCache]: Analyzing trace with hash -1782699020, now seen corresponding path program 1 times [2019-12-07 13:04:57,479 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:04:57,480 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [871160038] [2019-12-07 13:04:57,480 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:04:57,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:04:57,519 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 37 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:04:57,519 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [871160038] [2019-12-07 13:04:57,519 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:04:57,519 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:04:57,519 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [391697400] [2019-12-07 13:04:57,519 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:04:57,519 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:04:57,520 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:04:57,520 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:57,520 INFO L87 Difference]: Start difference. First operand 60891 states and 71287 transitions. Second operand 3 states. [2019-12-07 13:04:59,871 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:04:59,871 INFO L93 Difference]: Finished difference Result 111351 states and 130739 transitions. [2019-12-07 13:04:59,872 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:04:59,872 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 213 [2019-12-07 13:04:59,872 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:04:59,926 INFO L225 Difference]: With dead ends: 111351 [2019-12-07 13:04:59,926 INFO L226 Difference]: Without dead ends: 60895 [2019-12-07 13:04:59,948 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:04:59,986 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60895 states. [2019-12-07 13:05:02,199 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60895 to 60891. [2019-12-07 13:05:02,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60891 states. [2019-12-07 13:05:02,254 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60891 states to 60891 states and 71123 transitions. [2019-12-07 13:05:02,254 INFO L78 Accepts]: Start accepts. Automaton has 60891 states and 71123 transitions. Word has length 213 [2019-12-07 13:05:02,255 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:05:02,255 INFO L462 AbstractCegarLoop]: Abstraction has 60891 states and 71123 transitions. [2019-12-07 13:05:02,255 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:05:02,255 INFO L276 IsEmpty]: Start isEmpty. Operand 60891 states and 71123 transitions. [2019-12-07 13:05:02,278 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 214 [2019-12-07 13:05:02,278 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:05:02,279 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:05:02,279 INFO L410 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:05:02,279 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:05:02,279 INFO L82 PathProgramCache]: Analyzing trace with hash -1923880001, now seen corresponding path program 1 times [2019-12-07 13:05:02,279 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:05:02,279 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [698122562] [2019-12-07 13:05:02,280 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:05:02,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:05:02,319 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 39 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:05:02,319 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [698122562] [2019-12-07 13:05:02,319 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:05:02,319 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:05:02,319 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1520618061] [2019-12-07 13:05:02,319 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:05:02,320 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:05:02,320 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:05:02,320 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:05:02,320 INFO L87 Difference]: Start difference. First operand 60891 states and 71123 transitions. Second operand 3 states. [2019-12-07 13:05:04,700 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:05:04,700 INFO L93 Difference]: Finished difference Result 111475 states and 130537 transitions. [2019-12-07 13:05:04,701 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:05:04,701 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 213 [2019-12-07 13:05:04,701 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:05:04,755 INFO L225 Difference]: With dead ends: 111475 [2019-12-07 13:05:04,755 INFO L226 Difference]: Without dead ends: 61019 [2019-12-07 13:05:04,780 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:05:04,822 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61019 states. [2019-12-07 13:05:07,229 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61019 to 60891. [2019-12-07 13:05:07,229 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60891 states. [2019-12-07 13:05:07,280 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60891 states to 60891 states and 69971 transitions. [2019-12-07 13:05:07,280 INFO L78 Accepts]: Start accepts. Automaton has 60891 states and 69971 transitions. Word has length 213 [2019-12-07 13:05:07,280 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:05:07,280 INFO L462 AbstractCegarLoop]: Abstraction has 60891 states and 69971 transitions. [2019-12-07 13:05:07,280 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:05:07,281 INFO L276 IsEmpty]: Start isEmpty. Operand 60891 states and 69971 transitions. [2019-12-07 13:05:07,300 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 217 [2019-12-07 13:05:07,300 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:05:07,301 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:05:07,301 INFO L410 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:05:07,301 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:05:07,301 INFO L82 PathProgramCache]: Analyzing trace with hash -1073074581, now seen corresponding path program 1 times [2019-12-07 13:05:07,301 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:05:07,301 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1437863704] [2019-12-07 13:05:07,301 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:05:07,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:05:07,355 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 31 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2019-12-07 13:05:07,355 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1437863704] [2019-12-07 13:05:07,355 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:05:07,355 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 13:05:07,355 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2044143527] [2019-12-07 13:05:07,355 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 13:05:07,355 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:05:07,356 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 13:05:07,356 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 13:05:07,356 INFO L87 Difference]: Start difference. First operand 60891 states and 69971 transitions. Second operand 5 states. [2019-12-07 13:05:11,307 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:05:11,307 INFO L93 Difference]: Finished difference Result 154915 states and 179281 transitions. [2019-12-07 13:05:11,308 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 13:05:11,308 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 216 [2019-12-07 13:05:11,308 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:05:11,389 INFO L225 Difference]: With dead ends: 154915 [2019-12-07 13:05:11,389 INFO L226 Difference]: Without dead ends: 94067 [2019-12-07 13:05:11,416 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:05:11,481 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94067 states. [2019-12-07 13:05:14,105 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94067 to 61275. [2019-12-07 13:05:14,106 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61275 states. [2019-12-07 13:05:14,160 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61275 states to 61275 states and 69410 transitions. [2019-12-07 13:05:14,160 INFO L78 Accepts]: Start accepts. Automaton has 61275 states and 69410 transitions. Word has length 216 [2019-12-07 13:05:14,161 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:05:14,161 INFO L462 AbstractCegarLoop]: Abstraction has 61275 states and 69410 transitions. [2019-12-07 13:05:14,161 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 13:05:14,161 INFO L276 IsEmpty]: Start isEmpty. Operand 61275 states and 69410 transitions. [2019-12-07 13:05:14,185 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 251 [2019-12-07 13:05:14,185 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:05:14,185 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:05:14,185 INFO L410 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:05:14,186 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:05:14,186 INFO L82 PathProgramCache]: Analyzing trace with hash -1497272560, now seen corresponding path program 1 times [2019-12-07 13:05:14,186 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:05:14,186 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [934986581] [2019-12-07 13:05:14,186 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:05:14,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:05:14,246 INFO L134 CoverageAnalysis]: Checked inductivity of 37 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2019-12-07 13:05:14,246 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [934986581] [2019-12-07 13:05:14,247 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:05:14,247 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 13:05:14,247 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1726360886] [2019-12-07 13:05:14,247 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:05:14,247 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:05:14,247 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:05:14,247 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:05:14,247 INFO L87 Difference]: Start difference. First operand 61275 states and 69410 transitions. Second operand 3 states. [2019-12-07 13:05:17,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:05:17,257 INFO L93 Difference]: Finished difference Result 131965 states and 149290 transitions. [2019-12-07 13:05:17,257 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:05:17,257 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 250 [2019-12-07 13:05:17,258 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:05:17,321 INFO L225 Difference]: With dead ends: 131965 [2019-12-07 13:05:17,322 INFO L226 Difference]: Without dead ends: 70722 [2019-12-07 13:05:17,358 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:05:17,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70722 states. [2019-12-07 13:05:20,416 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70722 to 70402. [2019-12-07 13:05:20,416 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70402 states. [2019-12-07 13:05:20,478 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70402 states to 70402 states and 79384 transitions. [2019-12-07 13:05:20,479 INFO L78 Accepts]: Start accepts. Automaton has 70402 states and 79384 transitions. Word has length 250 [2019-12-07 13:05:20,479 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:05:20,479 INFO L462 AbstractCegarLoop]: Abstraction has 70402 states and 79384 transitions. [2019-12-07 13:05:20,479 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:05:20,479 INFO L276 IsEmpty]: Start isEmpty. Operand 70402 states and 79384 transitions. [2019-12-07 13:05:20,507 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 254 [2019-12-07 13:05:20,508 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:05:20,508 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:05:20,508 INFO L410 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:05:20,508 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:05:20,508 INFO L82 PathProgramCache]: Analyzing trace with hash 1211305274, now seen corresponding path program 1 times [2019-12-07 13:05:20,508 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:05:20,509 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [210879787] [2019-12-07 13:05:20,509 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:05:20,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:05:20,560 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 40 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:05:20,561 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [210879787] [2019-12-07 13:05:20,561 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:05:20,561 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:05:20,561 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2053628342] [2019-12-07 13:05:20,561 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:05:20,561 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:05:20,561 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:05:20,561 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:05:20,562 INFO L87 Difference]: Start difference. First operand 70402 states and 79384 transitions. Second operand 3 states. [2019-12-07 13:05:23,648 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:05:23,648 INFO L93 Difference]: Finished difference Result 131622 states and 148736 transitions. [2019-12-07 13:05:23,649 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:05:23,649 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 253 [2019-12-07 13:05:23,649 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:05:23,711 INFO L225 Difference]: With dead ends: 131622 [2019-12-07 13:05:23,711 INFO L226 Difference]: Without dead ends: 70406 [2019-12-07 13:05:23,744 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:05:23,796 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70406 states. [2019-12-07 13:05:26,831 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70406 to 70402. [2019-12-07 13:05:26,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70402 states. [2019-12-07 13:05:26,890 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70402 states to 70402 states and 79128 transitions. [2019-12-07 13:05:26,891 INFO L78 Accepts]: Start accepts. Automaton has 70402 states and 79128 transitions. Word has length 253 [2019-12-07 13:05:26,891 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:05:26,891 INFO L462 AbstractCegarLoop]: Abstraction has 70402 states and 79128 transitions. [2019-12-07 13:05:26,891 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:05:26,891 INFO L276 IsEmpty]: Start isEmpty. Operand 70402 states and 79128 transitions. [2019-12-07 13:05:26,917 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 293 [2019-12-07 13:05:26,917 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:05:26,917 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:05:26,918 INFO L410 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:05:26,918 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:05:26,918 INFO L82 PathProgramCache]: Analyzing trace with hash 78021096, now seen corresponding path program 1 times [2019-12-07 13:05:26,918 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:05:26,918 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [698165881] [2019-12-07 13:05:26,918 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:05:26,926 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:05:26,974 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 39 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2019-12-07 13:05:26,974 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [698165881] [2019-12-07 13:05:26,974 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:05:26,974 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:05:26,975 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [766189751] [2019-12-07 13:05:26,975 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:05:26,975 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:05:26,975 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:05:26,975 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:05:26,975 INFO L87 Difference]: Start difference. First operand 70402 states and 79128 transitions. Second operand 3 states. [2019-12-07 13:05:28,032 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:05:28,032 INFO L93 Difference]: Finished difference Result 91476 states and 102378 transitions. [2019-12-07 13:05:28,032 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:05:28,032 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 292 [2019-12-07 13:05:28,033 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:05:28,040 INFO L225 Difference]: With dead ends: 91476 [2019-12-07 13:05:28,040 INFO L226 Difference]: Without dead ends: 10928 [2019-12-07 13:05:28,075 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:05:28,082 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10928 states. [2019-12-07 13:05:28,530 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10928 to 10920. [2019-12-07 13:05:28,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10920 states. [2019-12-07 13:05:28,538 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10920 states to 10920 states and 11793 transitions. [2019-12-07 13:05:28,538 INFO L78 Accepts]: Start accepts. Automaton has 10920 states and 11793 transitions. Word has length 292 [2019-12-07 13:05:28,539 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:05:28,539 INFO L462 AbstractCegarLoop]: Abstraction has 10920 states and 11793 transitions. [2019-12-07 13:05:28,539 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:05:28,539 INFO L276 IsEmpty]: Start isEmpty. Operand 10920 states and 11793 transitions. [2019-12-07 13:05:28,543 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 294 [2019-12-07 13:05:28,544 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:05:28,544 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:05:28,544 INFO L410 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:05:28,544 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:05:28,544 INFO L82 PathProgramCache]: Analyzing trace with hash -394404878, now seen corresponding path program 1 times [2019-12-07 13:05:28,544 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:05:28,544 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [152489114] [2019-12-07 13:05:28,544 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:05:28,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:05:29,099 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:05:29,100 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [152489114] [2019-12-07 13:05:29,100 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:05:29,100 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:05:29,100 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [465652143] [2019-12-07 13:05:29,100 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:05:29,100 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:05:29,100 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:05:29,100 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:05:29,100 INFO L87 Difference]: Start difference. First operand 10920 states and 11793 transitions. Second operand 3 states. [2019-12-07 13:05:29,579 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:05:29,579 INFO L93 Difference]: Finished difference Result 18698 states and 20230 transitions. [2019-12-07 13:05:29,580 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:05:29,580 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 293 [2019-12-07 13:05:29,580 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:05:29,587 INFO L225 Difference]: With dead ends: 18698 [2019-12-07 13:05:29,587 INFO L226 Difference]: Without dead ends: 10920 [2019-12-07 13:05:29,591 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:05:29,595 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10920 states. [2019-12-07 13:05:30,037 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10920 to 10920. [2019-12-07 13:05:30,037 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10920 states. [2019-12-07 13:05:30,045 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10920 states to 10920 states and 11685 transitions. [2019-12-07 13:05:30,045 INFO L78 Accepts]: Start accepts. Automaton has 10920 states and 11685 transitions. Word has length 293 [2019-12-07 13:05:30,045 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:05:30,046 INFO L462 AbstractCegarLoop]: Abstraction has 10920 states and 11685 transitions. [2019-12-07 13:05:30,046 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:05:30,046 INFO L276 IsEmpty]: Start isEmpty. Operand 10920 states and 11685 transitions. [2019-12-07 13:05:30,050 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 298 [2019-12-07 13:05:30,050 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:05:30,051 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:05:30,051 INFO L410 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:05:30,051 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:05:30,051 INFO L82 PathProgramCache]: Analyzing trace with hash 526279388, now seen corresponding path program 1 times [2019-12-07 13:05:30,051 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:05:30,051 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [69142355] [2019-12-07 13:05:30,052 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:05:30,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:05:30,109 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:05:30,109 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [69142355] [2019-12-07 13:05:30,109 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:05:30,109 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:05:30,109 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1425647760] [2019-12-07 13:05:30,110 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:05:30,110 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:05:30,110 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:05:30,110 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:05:30,110 INFO L87 Difference]: Start difference. First operand 10920 states and 11685 transitions. Second operand 3 states. [2019-12-07 13:05:30,586 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:05:30,586 INFO L93 Difference]: Finished difference Result 16951 states and 18170 transitions. [2019-12-07 13:05:30,586 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:05:30,586 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 297 [2019-12-07 13:05:30,586 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:05:30,594 INFO L225 Difference]: With dead ends: 16951 [2019-12-07 13:05:30,594 INFO L226 Difference]: Without dead ends: 10920 [2019-12-07 13:05:30,598 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:05:30,602 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10920 states. [2019-12-07 13:05:31,050 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10920 to 10920. [2019-12-07 13:05:31,051 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10920 states. [2019-12-07 13:05:31,058 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10920 states to 10920 states and 11599 transitions. [2019-12-07 13:05:31,058 INFO L78 Accepts]: Start accepts. Automaton has 10920 states and 11599 transitions. Word has length 297 [2019-12-07 13:05:31,059 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:05:31,059 INFO L462 AbstractCegarLoop]: Abstraction has 10920 states and 11599 transitions. [2019-12-07 13:05:31,059 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:05:31,059 INFO L276 IsEmpty]: Start isEmpty. Operand 10920 states and 11599 transitions. [2019-12-07 13:05:31,064 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 302 [2019-12-07 13:05:31,064 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:05:31,064 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:05:31,064 INFO L410 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:05:31,064 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:05:31,064 INFO L82 PathProgramCache]: Analyzing trace with hash 1535852850, now seen corresponding path program 1 times [2019-12-07 13:05:31,064 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:05:31,065 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [521845607] [2019-12-07 13:05:31,065 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:05:31,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:05:31,126 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 37 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2019-12-07 13:05:31,126 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [521845607] [2019-12-07 13:05:31,126 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:05:31,126 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:05:31,126 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1043742447] [2019-12-07 13:05:31,127 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:05:31,127 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:05:31,127 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:05:31,127 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:05:31,127 INFO L87 Difference]: Start difference. First operand 10920 states and 11599 transitions. Second operand 3 states. [2019-12-07 13:05:31,611 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:05:31,612 INFO L93 Difference]: Finished difference Result 17684 states and 18802 transitions. [2019-12-07 13:05:31,612 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:05:31,612 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 301 [2019-12-07 13:05:31,612 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:05:31,619 INFO L225 Difference]: With dead ends: 17684 [2019-12-07 13:05:31,619 INFO L226 Difference]: Without dead ends: 10984 [2019-12-07 13:05:31,623 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:05:31,627 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10984 states. [2019-12-07 13:05:32,082 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10984 to 10920. [2019-12-07 13:05:32,082 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10920 states. [2019-12-07 13:05:32,090 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10920 states to 10920 states and 11501 transitions. [2019-12-07 13:05:32,090 INFO L78 Accepts]: Start accepts. Automaton has 10920 states and 11501 transitions. Word has length 301 [2019-12-07 13:05:32,090 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:05:32,090 INFO L462 AbstractCegarLoop]: Abstraction has 10920 states and 11501 transitions. [2019-12-07 13:05:32,090 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:05:32,090 INFO L276 IsEmpty]: Start isEmpty. Operand 10920 states and 11501 transitions. [2019-12-07 13:05:32,095 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 305 [2019-12-07 13:05:32,095 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:05:32,095 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:05:32,096 INFO L410 AbstractCegarLoop]: === Iteration 39 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:05:32,096 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:05:32,096 INFO L82 PathProgramCache]: Analyzing trace with hash 185562899, now seen corresponding path program 1 times [2019-12-07 13:05:32,096 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:05:32,096 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [402131421] [2019-12-07 13:05:32,096 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:05:32,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:05:32,165 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 13:05:32,165 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [402131421] [2019-12-07 13:05:32,165 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:05:32,165 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:05:32,166 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [884173266] [2019-12-07 13:05:32,166 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:05:32,166 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:05:32,166 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:05:32,166 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:05:32,166 INFO L87 Difference]: Start difference. First operand 10920 states and 11501 transitions. Second operand 3 states. [2019-12-07 13:05:32,583 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:05:32,584 INFO L93 Difference]: Finished difference Result 13691 states and 14419 transitions. [2019-12-07 13:05:32,584 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:05:32,584 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 304 [2019-12-07 13:05:32,584 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:05:32,589 INFO L225 Difference]: With dead ends: 13691 [2019-12-07 13:05:32,589 INFO L226 Difference]: Without dead ends: 8725 [2019-12-07 13:05:32,592 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:05:32,595 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8725 states. [2019-12-07 13:05:32,961 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8725 to 8725. [2019-12-07 13:05:32,961 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8725 states. [2019-12-07 13:05:32,967 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8725 states to 8725 states and 9171 transitions. [2019-12-07 13:05:32,968 INFO L78 Accepts]: Start accepts. Automaton has 8725 states and 9171 transitions. Word has length 304 [2019-12-07 13:05:32,968 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:05:32,968 INFO L462 AbstractCegarLoop]: Abstraction has 8725 states and 9171 transitions. [2019-12-07 13:05:32,968 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:05:32,968 INFO L276 IsEmpty]: Start isEmpty. Operand 8725 states and 9171 transitions. [2019-12-07 13:05:32,972 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 309 [2019-12-07 13:05:32,972 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:05:32,973 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:05:32,973 INFO L410 AbstractCegarLoop]: === Iteration 40 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:05:32,973 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:05:32,973 INFO L82 PathProgramCache]: Analyzing trace with hash 1149032847, now seen corresponding path program 1 times [2019-12-07 13:05:32,973 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:05:32,973 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1035674000] [2019-12-07 13:05:32,973 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:05:32,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:05:33,202 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 37 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2019-12-07 13:05:33,202 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1035674000] [2019-12-07 13:05:33,203 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:05:33,203 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 13:05:33,203 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [283118680] [2019-12-07 13:05:33,203 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 13:05:33,203 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:05:33,203 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 13:05:33,203 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:05:33,203 INFO L87 Difference]: Start difference. First operand 8725 states and 9171 transitions. Second operand 7 states. [2019-12-07 13:05:33,641 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:05:33,641 INFO L93 Difference]: Finished difference Result 8725 states and 9171 transitions. [2019-12-07 13:05:33,642 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 13:05:33,642 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 308 [2019-12-07 13:05:33,642 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:05:33,647 INFO L225 Difference]: With dead ends: 8725 [2019-12-07 13:05:33,647 INFO L226 Difference]: Without dead ends: 8723 [2019-12-07 13:05:33,649 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2019-12-07 13:05:33,652 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8723 states. [2019-12-07 13:05:34,039 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8723 to 8723. [2019-12-07 13:05:34,039 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8723 states. [2019-12-07 13:05:34,045 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8723 states to 8723 states and 9168 transitions. [2019-12-07 13:05:34,046 INFO L78 Accepts]: Start accepts. Automaton has 8723 states and 9168 transitions. Word has length 308 [2019-12-07 13:05:34,046 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:05:34,046 INFO L462 AbstractCegarLoop]: Abstraction has 8723 states and 9168 transitions. [2019-12-07 13:05:34,046 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 13:05:34,046 INFO L276 IsEmpty]: Start isEmpty. Operand 8723 states and 9168 transitions. [2019-12-07 13:05:34,050 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 313 [2019-12-07 13:05:34,050 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:05:34,051 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:05:34,051 INFO L410 AbstractCegarLoop]: === Iteration 41 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:05:34,051 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:05:34,051 INFO L82 PathProgramCache]: Analyzing trace with hash -1404905635, now seen corresponding path program 1 times [2019-12-07 13:05:34,051 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:05:34,051 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1918825028] [2019-12-07 13:05:34,051 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:05:34,067 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 13:05:34,126 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2019-12-07 13:05:34,126 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1918825028] [2019-12-07 13:05:34,126 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 13:05:34,126 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 13:05:34,127 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1795415285] [2019-12-07 13:05:34,127 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 13:05:34,127 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 13:05:34,127 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 13:05:34,127 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:05:34,128 INFO L87 Difference]: Start difference. First operand 8723 states and 9168 transitions. Second operand 3 states. [2019-12-07 13:05:34,598 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 13:05:34,598 INFO L93 Difference]: Finished difference Result 11851 states and 12417 transitions. [2019-12-07 13:05:34,598 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 13:05:34,598 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 312 [2019-12-07 13:05:34,598 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 13:05:34,605 INFO L225 Difference]: With dead ends: 11851 [2019-12-07 13:05:34,605 INFO L226 Difference]: Without dead ends: 10279 [2019-12-07 13:05:34,607 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 13:05:34,611 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10279 states. [2019-12-07 13:05:35,013 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10279 to 8725. [2019-12-07 13:05:35,013 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8725 states. [2019-12-07 13:05:35,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8725 states to 8725 states and 9170 transitions. [2019-12-07 13:05:35,019 INFO L78 Accepts]: Start accepts. Automaton has 8725 states and 9170 transitions. Word has length 312 [2019-12-07 13:05:35,020 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 13:05:35,020 INFO L462 AbstractCegarLoop]: Abstraction has 8725 states and 9170 transitions. [2019-12-07 13:05:35,020 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 13:05:35,020 INFO L276 IsEmpty]: Start isEmpty. Operand 8725 states and 9170 transitions. [2019-12-07 13:05:35,024 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 314 [2019-12-07 13:05:35,024 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 13:05:35,025 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 13:05:35,025 INFO L410 AbstractCegarLoop]: === Iteration 42 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 13:05:35,025 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 13:05:35,025 INFO L82 PathProgramCache]: Analyzing trace with hash -839838432, now seen corresponding path program 1 times [2019-12-07 13:05:35,025 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 13:05:35,025 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [800428547] [2019-12-07 13:05:35,025 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 13:05:35,046 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 13:05:35,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 13:05:35,170 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 13:05:35,170 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 13:05:35,315 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 01:05:35 BoogieIcfgContainer [2019-12-07 13:05:35,315 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 13:05:35,315 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 13:05:35,315 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 13:05:35,315 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 13:05:35,316 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 01:04:24" (3/4) ... [2019-12-07 13:05:35,317 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 13:05:35,448 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_a0e9f75b-13ed-4935-ab2d-a4c9e1b632d9/bin/uautomizer/witness.graphml [2019-12-07 13:05:35,448 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 13:05:35,450 INFO L168 Benchmark]: Toolchain (without parser) took 71862.00 ms. Allocated memory was 1.0 GB in the beginning and 5.8 GB in the end (delta: 4.7 GB). Free memory was 946.1 MB in the beginning and 2.4 GB in the end (delta: -1.4 GB). Peak memory consumption was 3.3 GB. Max. memory is 11.5 GB. [2019-12-07 13:05:35,450 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 960.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 13:05:35,451 INFO L168 Benchmark]: CACSL2BoogieTranslator took 255.00 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 99.1 MB). Free memory was 946.1 MB in the beginning and 1.1 GB in the end (delta: -142.3 MB). Peak memory consumption was 23.4 MB. Max. memory is 11.5 GB. [2019-12-07 13:05:35,451 INFO L168 Benchmark]: Boogie Procedure Inliner took 43.05 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 13:05:35,451 INFO L168 Benchmark]: Boogie Preprocessor took 42.08 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 10.7 MB). Peak memory consumption was 10.7 MB. Max. memory is 11.5 GB. [2019-12-07 13:05:35,451 INFO L168 Benchmark]: RCFGBuilder took 665.65 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 971.1 MB in the end (delta: 101.2 MB). Peak memory consumption was 101.2 MB. Max. memory is 11.5 GB. [2019-12-07 13:05:35,452 INFO L168 Benchmark]: TraceAbstraction took 70719.41 ms. Allocated memory was 1.1 GB in the beginning and 5.8 GB in the end (delta: 4.6 GB). Free memory was 971.1 MB in the beginning and 2.5 GB in the end (delta: -1.5 GB). Peak memory consumption was 3.1 GB. Max. memory is 11.5 GB. [2019-12-07 13:05:35,452 INFO L168 Benchmark]: Witness Printer took 133.48 ms. Allocated memory is still 5.8 GB. Free memory was 2.5 GB in the beginning and 2.4 GB in the end (delta: 101.9 MB). Peak memory consumption was 101.9 MB. Max. memory is 11.5 GB. [2019-12-07 13:05:35,453 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 960.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 255.00 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 99.1 MB). Free memory was 946.1 MB in the beginning and 1.1 GB in the end (delta: -142.3 MB). Peak memory consumption was 23.4 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 43.05 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 42.08 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 10.7 MB). Peak memory consumption was 10.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 665.65 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 971.1 MB in the end (delta: 101.2 MB). Peak memory consumption was 101.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 70719.41 ms. Allocated memory was 1.1 GB in the beginning and 5.8 GB in the end (delta: 4.6 GB). Free memory was 971.1 MB in the beginning and 2.5 GB in the end (delta: -1.5 GB). Peak memory consumption was 3.1 GB. Max. memory is 11.5 GB. * Witness Printer took 133.48 ms. Allocated memory is still 5.8 GB. Free memory was 2.5 GB in the beginning and 2.4 GB in the end (delta: 101.9 MB). Peak memory consumption was 101.9 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 10]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L14] int m_pc = 0; [L15] int t1_pc = 0; [L16] int t2_pc = 0; [L17] int t3_pc = 0; [L18] int t4_pc = 0; [L19] int m_st ; [L20] int t1_st ; [L21] int t2_st ; [L22] int t3_st ; [L23] int t4_st ; [L24] int m_i ; [L25] int t1_i ; [L26] int t2_i ; [L27] int t3_i ; [L28] int t4_i ; [L29] int M_E = 2; [L30] int T1_E = 2; [L31] int T2_E = 2; [L32] int T3_E = 2; [L33] int T4_E = 2; [L34] int E_M = 2; [L35] int E_1 = 2; [L36] int E_2 = 2; [L37] int E_3 = 2; [L38] int E_4 = 2; [L45] int token ; [L47] int local ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0, T3_E=2, t3_i=0, t3_pc=0, t3_st=0, T4_E=2, t4_i=0, t4_pc=0, t4_st=0, token=0] [L850] int __retres1 ; [L762] m_i = 1 [L763] t1_i = 1 [L764] t2_i = 1 [L765] t3_i = 1 [L766] t4_i = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L791] int kernel_st ; [L792] int tmp ; [L793] int tmp___0 ; [L797] kernel_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L355] COND TRUE m_i == 1 [L356] m_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L360] COND TRUE t1_i == 1 [L361] t1_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L365] COND TRUE t2_i == 1 [L366] t2_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L370] COND TRUE t3_i == 1 [L371] t3_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L375] COND TRUE t4_i == 1 [L376] t4_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L516] COND FALSE !(M_E == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L521] COND FALSE !(T1_E == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L526] COND FALSE !(T2_E == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L531] COND FALSE !(T3_E == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L536] COND FALSE !(T4_E == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L541] COND FALSE !(E_M == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L546] COND FALSE !(E_1 == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L551] COND FALSE !(E_2 == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L556] COND FALSE !(E_3 == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L561] COND FALSE !(E_4 == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L629] int tmp ; [L630] int tmp___0 ; [L631] int tmp___1 ; [L632] int tmp___2 ; [L633] int tmp___3 ; [L249] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L252] COND FALSE !(m_pc == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L262] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L264] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L637] tmp = is_master_triggered() [L639] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L268] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L271] COND FALSE !(t1_pc == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L281] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L283] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L645] tmp___0 = is_transmit1_triggered() [L647] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L287] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L290] COND FALSE !(t2_pc == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L300] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L302] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L653] tmp___1 = is_transmit2_triggered() [L655] COND FALSE !(\read(tmp___1)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L306] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L309] COND FALSE !(t3_pc == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L319] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L321] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L661] tmp___2 = is_transmit3_triggered() [L663] COND FALSE !(\read(tmp___2)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L325] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L328] COND FALSE !(t4_pc == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L338] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L340] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L669] tmp___3 = is_transmit4_triggered() [L671] COND FALSE !(\read(tmp___3)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L574] COND FALSE !(M_E == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L579] COND FALSE !(T1_E == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L584] COND FALSE !(T2_E == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L589] COND FALSE !(T3_E == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L594] COND FALSE !(T4_E == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L599] COND FALSE !(E_M == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L604] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L609] COND FALSE !(E_2 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L614] COND FALSE !(E_3 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L619] COND FALSE !(E_4 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L805] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L808] kernel_st = 1 [L421] int tmp ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L425] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L385] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L388] COND TRUE m_st == 0 [L389] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L416] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L428] tmp = exists_runnable_thread() [L430] COND TRUE \read(tmp) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L435] COND TRUE m_st == 0 [L436] int tmp_ndt_1; [L437] tmp_ndt_1 = __VERIFIER_nondet_int() [L438] COND FALSE !(\read(tmp_ndt_1)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L449] COND TRUE t1_st == 0 [L450] int tmp_ndt_2; [L451] tmp_ndt_2 = __VERIFIER_nondet_int() [L452] COND TRUE \read(tmp_ndt_2) [L454] t1_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L108] COND TRUE t1_pc == 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L119] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L121] t1_pc = 1 [L122] t1_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L463] COND TRUE t2_st == 0 [L464] int tmp_ndt_3; [L465] tmp_ndt_3 = __VERIFIER_nondet_int() [L466] COND TRUE \read(tmp_ndt_3) [L468] t2_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L144] COND TRUE t2_pc == 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L155] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L157] t2_pc = 1 [L158] t2_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L477] COND TRUE t3_st == 0 [L478] int tmp_ndt_4; [L479] tmp_ndt_4 = __VERIFIER_nondet_int() [L480] COND TRUE \read(tmp_ndt_4) [L482] t3_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L180] COND TRUE t3_pc == 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L191] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L193] t3_pc = 1 [L194] t3_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, token=0] [L491] COND TRUE t4_st == 0 [L492] int tmp_ndt_5; [L493] tmp_ndt_5 = __VERIFIER_nondet_int() [L494] COND TRUE \read(tmp_ndt_5) [L496] t4_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=0, t4_st=1, token=0] [L216] COND TRUE t4_pc == 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=0, t4_st=1, token=0] [L227] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=0, t4_st=1, token=0] [L229] t4_pc = 1 [L230] t4_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=0] [L425] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=0] [L385] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=0] [L388] COND TRUE m_st == 0 [L389] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=0] [L416] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=0] [L428] tmp = exists_runnable_thread() [L430] COND TRUE \read(tmp) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=0] [L435] COND TRUE m_st == 0 [L436] int tmp_ndt_1; [L437] tmp_ndt_1 = __VERIFIER_nondet_int() [L438] COND TRUE \read(tmp_ndt_1) [L440] m_st = 1 [L50] int tmp_var = __VERIFIER_nondet_int(); [L52] COND TRUE m_pc == 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=0] [L63] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=0] [L66] token = __VERIFIER_nondet_int() [L67] local = token [L68] E_1 = 1 [L629] int tmp ; [L630] int tmp___0 ; [L631] int tmp___1 ; [L632] int tmp___2 ; [L633] int tmp___3 ; [L249] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-4] [L252] COND FALSE !(m_pc == 1) VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-4] [L262] __retres1 = 0 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-4] [L264] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-4] [L637] tmp = is_master_triggered() [L639] COND FALSE !(\read(tmp)) VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-4] [L268] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-4] [L271] COND TRUE t1_pc == 1 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-4] [L272] COND TRUE E_1 == 1 [L273] __retres1 = 1 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-4] [L283] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-4] [L645] tmp___0 = is_transmit1_triggered() [L647] COND TRUE \read(tmp___0) [L648] t1_st = 0 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-4] [L287] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-4] [L290] COND TRUE t2_pc == 1 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-4] [L291] COND FALSE !(E_2 == 1) VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-4] [L300] __retres1 = 0 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-4] [L302] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-4] [L653] tmp___1 = is_transmit2_triggered() [L655] COND FALSE !(\read(tmp___1)) VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-4] [L306] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-4] [L309] COND TRUE t3_pc == 1 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-4] [L310] COND FALSE !(E_3 == 1) VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-4] [L319] __retres1 = 0 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-4] [L321] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-4] [L661] tmp___2 = is_transmit3_triggered() [L663] COND FALSE !(\read(tmp___2)) VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-4] [L325] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-4] [L328] COND TRUE t4_pc == 1 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-4] [L329] COND FALSE !(E_4 == 1) VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-4] [L338] __retres1 = 0 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-4] [L340] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-4] [L669] tmp___3 = is_transmit4_triggered() [L671] COND FALSE !(\read(tmp___3)) VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-4] [L70] E_1 = 2 [L71] m_pc = 1 [L72] m_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-4] [L449] COND TRUE t1_st == 0 [L450] int tmp_ndt_2; [L451] tmp_ndt_2 = __VERIFIER_nondet_int() [L452] COND TRUE \read(tmp_ndt_2) [L454] t1_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-4] [L108] COND FALSE !(t1_pc == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-4] [L111] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-4] [L127] token += 1 [L128] E_2 = 1 [L629] int tmp ; [L630] int tmp___0 ; [L631] int tmp___1 ; [L632] int tmp___2 ; [L633] int tmp___3 ; [L249] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-3] [L252] COND TRUE m_pc == 1 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-3] [L253] COND FALSE !(E_M == 1) VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-3] [L262] __retres1 = 0 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-3] [L264] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-3] [L637] tmp = is_master_triggered() [L639] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-3] [L268] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-3] [L271] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-3] [L272] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-3] [L281] __retres1 = 0 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-3] [L283] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-3] [L645] tmp___0 = is_transmit1_triggered() [L647] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-3] [L287] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-3] [L290] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-3] [L291] COND TRUE E_2 == 1 [L292] __retres1 = 1 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-3] [L302] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-3] [L653] tmp___1 = is_transmit2_triggered() [L655] COND TRUE \read(tmp___1) [L656] t2_st = 0 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-3] [L306] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-3] [L309] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-3] [L310] COND FALSE !(E_3 == 1) VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-3] [L319] __retres1 = 0 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-3] [L321] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-3] [L661] tmp___2 = is_transmit3_triggered() [L663] COND FALSE !(\read(tmp___2)) VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-3] [L325] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-3] [L328] COND TRUE t4_pc == 1 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-3] [L329] COND FALSE !(E_4 == 1) VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-3] [L338] __retres1 = 0 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-3] [L340] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-3] [L669] tmp___3 = is_transmit4_triggered() [L671] COND FALSE !(\read(tmp___3)) VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-3] [L130] E_2 = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-3] [L119] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-3] [L121] t1_pc = 1 [L122] t1_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-3] [L463] COND TRUE t2_st == 0 [L464] int tmp_ndt_3; [L465] tmp_ndt_3 = __VERIFIER_nondet_int() [L466] COND TRUE \read(tmp_ndt_3) [L468] t2_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-3] [L144] COND FALSE !(t2_pc == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-3] [L147] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-3] [L163] token += 1 [L164] E_3 = 1 [L629] int tmp ; [L630] int tmp___0 ; [L631] int tmp___1 ; [L632] int tmp___2 ; [L633] int tmp___3 ; [L249] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-2] [L252] COND TRUE m_pc == 1 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-2] [L253] COND FALSE !(E_M == 1) VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-2] [L262] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-2] [L264] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-2] [L637] tmp = is_master_triggered() [L639] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-2] [L268] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-2] [L271] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-2] [L272] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-2] [L281] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-2] [L283] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-2] [L645] tmp___0 = is_transmit1_triggered() [L647] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-2] [L287] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-2] [L290] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-2] [L291] COND FALSE !(E_2 == 1) VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-2] [L300] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-2] [L302] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-2] [L653] tmp___1 = is_transmit2_triggered() [L655] COND FALSE !(\read(tmp___1)) VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-2] [L306] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-2] [L309] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-2] [L310] COND TRUE E_3 == 1 [L311] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-2] [L321] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-2] [L661] tmp___2 = is_transmit3_triggered() [L663] COND TRUE \read(tmp___2) [L664] t3_st = 0 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-2] [L325] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-2] [L328] COND TRUE t4_pc == 1 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-2] [L329] COND FALSE !(E_4 == 1) VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-2] [L338] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-2] [L340] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-2] [L669] tmp___3 = is_transmit4_triggered() [L671] COND FALSE !(\read(tmp___3)) VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-2] [L166] E_3 = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-2] [L155] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-2] [L157] t2_pc = 1 [L158] t2_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-2] [L477] COND TRUE t3_st == 0 [L478] int tmp_ndt_4; [L479] tmp_ndt_4 = __VERIFIER_nondet_int() [L480] COND TRUE \read(tmp_ndt_4) [L482] t3_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-2] [L180] COND FALSE !(t3_pc == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-2] [L183] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-2] [L199] token += 1 [L200] E_4 = 1 [L629] int tmp ; [L630] int tmp___0 ; [L631] int tmp___1 ; [L632] int tmp___2 ; [L633] int tmp___3 ; [L249] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-1] [L252] COND TRUE m_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-1] [L253] COND FALSE !(E_M == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-1] [L262] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-1] [L264] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-1] [L637] tmp = is_master_triggered() [L639] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-1] [L268] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-1] [L271] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-1] [L272] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-1] [L281] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-1] [L283] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-1] [L645] tmp___0 = is_transmit1_triggered() [L647] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-1] [L287] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-1] [L290] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-1] [L291] COND FALSE !(E_2 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-1] [L300] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-1] [L302] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-1] [L653] tmp___1 = is_transmit2_triggered() [L655] COND FALSE !(\read(tmp___1)) VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-1] [L306] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-1] [L309] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-1] [L310] COND FALSE !(E_3 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-1] [L319] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-1] [L321] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-1] [L661] tmp___2 = is_transmit3_triggered() [L663] COND FALSE !(\read(tmp___2)) VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-1] [L325] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-1] [L328] COND TRUE t4_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-1] [L329] COND TRUE E_4 == 1 [L330] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-1] [L340] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=-1] [L669] tmp___3 = is_transmit4_triggered() [L671] COND TRUE \read(tmp___3) [L672] t4_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, token=-1] [L202] E_4 = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, token=-1] [L191] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, token=-1] [L193] t3_pc = 1 [L194] t3_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, token=-1] [L491] COND TRUE t4_st == 0 [L492] int tmp_ndt_5; [L493] tmp_ndt_5 = __VERIFIER_nondet_int() [L494] COND TRUE \read(tmp_ndt_5) [L496] t4_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, token=-1] [L216] COND FALSE !(t4_pc == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, token=-1] [L219] COND TRUE t4_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, token=-1] [L235] token += 1 [L236] E_M = 1 [L629] int tmp ; [L630] int tmp___0 ; [L631] int tmp___1 ; [L632] int tmp___2 ; [L633] int tmp___3 ; [L249] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=1, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, token=0] [L252] COND TRUE m_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=1, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, token=0] [L253] COND TRUE E_M == 1 [L254] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=1, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, token=0] [L264] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=1, local=-4, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, token=0] [L637] tmp = is_master_triggered() [L639] COND TRUE \read(tmp) [L640] m_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=1, local=-4, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, token=0] [L268] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=1, local=-4, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, token=0] [L271] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=1, local=-4, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, token=0] [L272] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=1, local=-4, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, token=0] [L281] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=1, local=-4, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, token=0] [L283] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=1, local=-4, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, token=0] [L645] tmp___0 = is_transmit1_triggered() [L647] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=1, local=-4, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, token=0] [L287] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=1, local=-4, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, token=0] [L290] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=1, local=-4, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, token=0] [L291] COND FALSE !(E_2 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=1, local=-4, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, token=0] [L300] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=1, local=-4, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, token=0] [L302] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=1, local=-4, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, token=0] [L653] tmp___1 = is_transmit2_triggered() [L655] COND FALSE !(\read(tmp___1)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=1, local=-4, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, token=0] [L306] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=1, local=-4, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, token=0] [L309] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=1, local=-4, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, token=0] [L310] COND FALSE !(E_3 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=1, local=-4, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, token=0] [L319] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=1, local=-4, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, token=0] [L321] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=1, local=-4, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, token=0] [L661] tmp___2 = is_transmit3_triggered() [L663] COND FALSE !(\read(tmp___2)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=1, local=-4, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, token=0] [L325] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=1, local=-4, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, token=0] [L328] COND TRUE t4_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=1, local=-4, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, token=0] [L329] COND FALSE !(E_4 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=1, local=-4, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, token=0] [L338] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=1, local=-4, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, token=0] [L340] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=1, local=-4, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, token=0] [L669] tmp___3 = is_transmit4_triggered() [L671] COND FALSE !(\read(tmp___3)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=1, local=-4, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, token=0] [L238] E_M = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, token=0] [L227] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, token=0] [L229] t4_pc = 1 [L230] t4_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=0] [L425] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=0] [L385] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=0] [L388] COND TRUE m_st == 0 [L389] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=0] [L416] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=0] [L428] tmp = exists_runnable_thread() [L430] COND TRUE \read(tmp) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=0] [L435] COND TRUE m_st == 0 [L436] int tmp_ndt_1; [L437] tmp_ndt_1 = __VERIFIER_nondet_int() [L438] COND TRUE \read(tmp_ndt_1) [L440] m_st = 1 [L50] int tmp_var = __VERIFIER_nondet_int(); [L52] COND FALSE !(m_pc == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=0] [L55] COND TRUE m_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=0] [L77] COND FALSE !(token != local + 4) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=0] [L82] COND TRUE tmp_var <= 5 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=0] [L83] COND TRUE tmp_var >= 5 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=0] [L88] COND TRUE tmp_var <= 5 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=0] [L89] COND TRUE tmp_var >= 5 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=0] [L90] COND TRUE tmp_var == 5 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=0] [L10] __VERIFIER_error() VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_M=2, local=-4, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, token=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 421 locations, 2 error locations. Result: UNSAFE, OverallTime: 70.5s, OverallIterations: 42, TraceHistogramMax: 3, AutomataDifference: 35.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 25645 SDtfs, 22698 SDslu, 18605 SDs, 0 SdLazy, 805 SolverSat, 374 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 143 GetRequests, 78 SyntacticMatches, 0 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=70402occurred in iteration=33, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 32.3s AutomataMinimizationTime, 41 MinimizatonAttempts, 39852 StatesRemovedByMinimization, 22 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 0.7s InterpolantComputationTime, 6681 NumberOfCodeBlocks, 6681 NumberOfCodeBlocksAsserted, 42 NumberOfCheckSat, 6327 ConstructedInterpolants, 0 QuantifiedInterpolants, 2308189 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 41 InterpolantComputations, 41 PerfectInterpolantSequences, 733/733 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...