./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/systemc/token_ring.05.cil-2.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_a76a9cd8-4de7-4c0c-bd27-9538d70e8156/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_a76a9cd8-4de7-4c0c-bd27-9538d70e8156/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_a76a9cd8-4de7-4c0c-bd27-9538d70e8156/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_a76a9cd8-4de7-4c0c-bd27-9538d70e8156/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/systemc/token_ring.05.cil-2.c -s /tmp/vcloud-vcloud-master/worker/run_dir_a76a9cd8-4de7-4c0c-bd27-9538d70e8156/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_a76a9cd8-4de7-4c0c-bd27-9538d70e8156/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 27d160802d278384ef6d8db395ef2d19702d5645 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 10:33:19,445 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 10:33:19,446 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 10:33:19,455 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 10:33:19,455 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 10:33:19,456 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 10:33:19,457 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 10:33:19,458 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 10:33:19,460 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 10:33:19,461 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 10:33:19,462 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 10:33:19,463 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 10:33:19,463 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 10:33:19,464 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 10:33:19,465 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 10:33:19,466 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 10:33:19,467 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 10:33:19,468 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 10:33:19,470 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 10:33:19,471 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 10:33:19,473 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 10:33:19,474 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 10:33:19,475 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 10:33:19,475 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 10:33:19,477 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 10:33:19,478 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 10:33:19,478 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 10:33:19,479 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 10:33:19,479 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 10:33:19,480 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 10:33:19,480 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 10:33:19,480 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 10:33:19,481 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 10:33:19,481 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 10:33:19,482 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 10:33:19,482 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 10:33:19,483 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 10:33:19,483 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 10:33:19,483 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 10:33:19,484 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 10:33:19,484 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 10:33:19,485 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_a76a9cd8-4de7-4c0c-bd27-9538d70e8156/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 10:33:19,496 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 10:33:19,496 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 10:33:19,497 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 10:33:19,497 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 10:33:19,497 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 10:33:19,497 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 10:33:19,497 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 10:33:19,498 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 10:33:19,498 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 10:33:19,498 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 10:33:19,498 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 10:33:19,498 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 10:33:19,498 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 10:33:19,498 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 10:33:19,499 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 10:33:19,499 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 10:33:19,499 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 10:33:19,499 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 10:33:19,499 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 10:33:19,499 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 10:33:19,499 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 10:33:19,499 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 10:33:19,500 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 10:33:19,500 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 10:33:19,500 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 10:33:19,500 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 10:33:19,500 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 10:33:19,500 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 10:33:19,500 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 10:33:19,500 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_a76a9cd8-4de7-4c0c-bd27-9538d70e8156/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 27d160802d278384ef6d8db395ef2d19702d5645 [2019-12-07 10:33:19,609 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 10:33:19,619 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 10:33:19,622 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 10:33:19,623 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 10:33:19,624 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 10:33:19,624 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_a76a9cd8-4de7-4c0c-bd27-9538d70e8156/bin/uautomizer/../../sv-benchmarks/c/systemc/token_ring.05.cil-2.c [2019-12-07 10:33:19,663 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_a76a9cd8-4de7-4c0c-bd27-9538d70e8156/bin/uautomizer/data/a281a3e5a/b3e7d3e41f514aca83123efb2dd6ab31/FLAGdda4b62f1 [2019-12-07 10:33:20,032 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 10:33:20,032 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_a76a9cd8-4de7-4c0c-bd27-9538d70e8156/sv-benchmarks/c/systemc/token_ring.05.cil-2.c [2019-12-07 10:33:20,039 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_a76a9cd8-4de7-4c0c-bd27-9538d70e8156/bin/uautomizer/data/a281a3e5a/b3e7d3e41f514aca83123efb2dd6ab31/FLAGdda4b62f1 [2019-12-07 10:33:20,413 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_a76a9cd8-4de7-4c0c-bd27-9538d70e8156/bin/uautomizer/data/a281a3e5a/b3e7d3e41f514aca83123efb2dd6ab31 [2019-12-07 10:33:20,415 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 10:33:20,416 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 10:33:20,416 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 10:33:20,417 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 10:33:20,419 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 10:33:20,419 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 10:33:20" (1/1) ... [2019-12-07 10:33:20,421 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@17df66d9 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:33:20, skipping insertion in model container [2019-12-07 10:33:20,421 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 10:33:20" (1/1) ... [2019-12-07 10:33:20,426 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 10:33:20,450 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 10:33:20,627 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 10:33:20,631 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 10:33:20,667 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 10:33:20,681 INFO L208 MainTranslator]: Completed translation [2019-12-07 10:33:20,682 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:33:20 WrapperNode [2019-12-07 10:33:20,682 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 10:33:20,682 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 10:33:20,682 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 10:33:20,682 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 10:33:20,687 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:33:20" (1/1) ... [2019-12-07 10:33:20,694 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:33:20" (1/1) ... [2019-12-07 10:33:20,731 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 10:33:20,732 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 10:33:20,732 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 10:33:20,732 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 10:33:20,738 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:33:20" (1/1) ... [2019-12-07 10:33:20,738 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:33:20" (1/1) ... [2019-12-07 10:33:20,742 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:33:20" (1/1) ... [2019-12-07 10:33:20,742 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:33:20" (1/1) ... [2019-12-07 10:33:20,757 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:33:20" (1/1) ... [2019-12-07 10:33:20,773 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:33:20" (1/1) ... [2019-12-07 10:33:20,776 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:33:20" (1/1) ... [2019-12-07 10:33:20,784 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 10:33:20,784 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 10:33:20,784 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 10:33:20,785 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 10:33:20,785 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:33:20" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_a76a9cd8-4de7-4c0c-bd27-9538d70e8156/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 10:33:20,828 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 10:33:20,828 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 10:33:21,487 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 10:33:21,488 INFO L287 CfgBuilder]: Removed 198 assume(true) statements. [2019-12-07 10:33:21,489 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:33:21 BoogieIcfgContainer [2019-12-07 10:33:21,489 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 10:33:21,490 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 10:33:21,490 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 10:33:21,491 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 10:33:21,492 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 10:33:20" (1/3) ... [2019-12-07 10:33:21,492 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1efede30 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 10:33:21, skipping insertion in model container [2019-12-07 10:33:21,492 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:33:20" (2/3) ... [2019-12-07 10:33:21,493 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1efede30 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 10:33:21, skipping insertion in model container [2019-12-07 10:33:21,493 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:33:21" (3/3) ... [2019-12-07 10:33:21,494 INFO L109 eAbstractionObserver]: Analyzing ICFG token_ring.05.cil-2.c [2019-12-07 10:33:21,500 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 10:33:21,505 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 10:33:21,512 INFO L249 AbstractCegarLoop]: Starting to check reachability of 2 error locations. [2019-12-07 10:33:21,532 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 10:33:21,532 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 10:33:21,532 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 10:33:21,532 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 10:33:21,532 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 10:33:21,532 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 10:33:21,532 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 10:33:21,532 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 10:33:21,551 INFO L276 IsEmpty]: Start isEmpty. Operand 540 states. [2019-12-07 10:33:21,557 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-12-07 10:33:21,558 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:33:21,558 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:33:21,558 INFO L410 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:33:21,562 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:33:21,562 INFO L82 PathProgramCache]: Analyzing trace with hash -967631064, now seen corresponding path program 1 times [2019-12-07 10:33:21,568 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:33:21,569 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [295168348] [2019-12-07 10:33:21,569 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:33:21,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:33:21,684 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:33:21,685 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [295168348] [2019-12-07 10:33:21,685 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:33:21,685 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:33:21,686 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [221169582] [2019-12-07 10:33:21,690 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:33:21,690 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:33:21,698 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:33:21,699 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:21,700 INFO L87 Difference]: Start difference. First operand 540 states. Second operand 3 states. [2019-12-07 10:33:21,759 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:33:21,759 INFO L93 Difference]: Finished difference Result 1075 states and 1663 transitions. [2019-12-07 10:33:21,759 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:33:21,760 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 83 [2019-12-07 10:33:21,760 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:33:21,772 INFO L225 Difference]: With dead ends: 1075 [2019-12-07 10:33:21,772 INFO L226 Difference]: Without dead ends: 536 [2019-12-07 10:33:21,776 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:21,789 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 536 states. [2019-12-07 10:33:21,830 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 536 to 536. [2019-12-07 10:33:21,831 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 536 states. [2019-12-07 10:33:21,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 536 states to 536 states and 812 transitions. [2019-12-07 10:33:21,834 INFO L78 Accepts]: Start accepts. Automaton has 536 states and 812 transitions. Word has length 83 [2019-12-07 10:33:21,834 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:33:21,834 INFO L462 AbstractCegarLoop]: Abstraction has 536 states and 812 transitions. [2019-12-07 10:33:21,834 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:33:21,834 INFO L276 IsEmpty]: Start isEmpty. Operand 536 states and 812 transitions. [2019-12-07 10:33:21,837 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-12-07 10:33:21,837 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:33:21,837 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:33:21,838 INFO L410 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:33:21,838 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:33:21,838 INFO L82 PathProgramCache]: Analyzing trace with hash -1207870810, now seen corresponding path program 1 times [2019-12-07 10:33:21,838 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:33:21,839 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [857526170] [2019-12-07 10:33:21,839 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:33:21,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:33:21,896 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:33:21,897 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [857526170] [2019-12-07 10:33:21,897 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:33:21,897 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:33:21,897 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [219474514] [2019-12-07 10:33:21,898 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:33:21,899 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:33:21,899 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:33:21,899 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:21,899 INFO L87 Difference]: Start difference. First operand 536 states and 812 transitions. Second operand 3 states. [2019-12-07 10:33:21,953 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:33:21,954 INFO L93 Difference]: Finished difference Result 1480 states and 2236 transitions. [2019-12-07 10:33:21,954 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:33:21,954 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 83 [2019-12-07 10:33:21,954 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:33:21,961 INFO L225 Difference]: With dead ends: 1480 [2019-12-07 10:33:21,961 INFO L226 Difference]: Without dead ends: 954 [2019-12-07 10:33:21,962 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:21,964 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 954 states. [2019-12-07 10:33:21,998 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 954 to 950. [2019-12-07 10:33:21,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 950 states. [2019-12-07 10:33:22,002 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 950 states to 950 states and 1434 transitions. [2019-12-07 10:33:22,002 INFO L78 Accepts]: Start accepts. Automaton has 950 states and 1434 transitions. Word has length 83 [2019-12-07 10:33:22,002 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:33:22,002 INFO L462 AbstractCegarLoop]: Abstraction has 950 states and 1434 transitions. [2019-12-07 10:33:22,003 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:33:22,003 INFO L276 IsEmpty]: Start isEmpty. Operand 950 states and 1434 transitions. [2019-12-07 10:33:22,004 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-12-07 10:33:22,004 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:33:22,005 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:33:22,005 INFO L410 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:33:22,005 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:33:22,005 INFO L82 PathProgramCache]: Analyzing trace with hash -258608350, now seen corresponding path program 1 times [2019-12-07 10:33:22,006 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:33:22,006 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1698704804] [2019-12-07 10:33:22,006 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:33:22,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:33:22,055 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:33:22,055 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1698704804] [2019-12-07 10:33:22,055 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:33:22,056 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:33:22,056 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [628917662] [2019-12-07 10:33:22,056 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:33:22,056 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:33:22,057 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:33:22,057 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:22,057 INFO L87 Difference]: Start difference. First operand 950 states and 1434 transitions. Second operand 3 states. [2019-12-07 10:33:22,092 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:33:22,092 INFO L93 Difference]: Finished difference Result 1889 states and 2851 transitions. [2019-12-07 10:33:22,093 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:33:22,093 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 83 [2019-12-07 10:33:22,093 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:33:22,097 INFO L225 Difference]: With dead ends: 1889 [2019-12-07 10:33:22,097 INFO L226 Difference]: Without dead ends: 950 [2019-12-07 10:33:22,099 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:22,101 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 950 states. [2019-12-07 10:33:22,125 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 950 to 950. [2019-12-07 10:33:22,125 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 950 states. [2019-12-07 10:33:22,128 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 950 states to 950 states and 1426 transitions. [2019-12-07 10:33:22,128 INFO L78 Accepts]: Start accepts. Automaton has 950 states and 1426 transitions. Word has length 83 [2019-12-07 10:33:22,128 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:33:22,128 INFO L462 AbstractCegarLoop]: Abstraction has 950 states and 1426 transitions. [2019-12-07 10:33:22,128 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:33:22,129 INFO L276 IsEmpty]: Start isEmpty. Operand 950 states and 1426 transitions. [2019-12-07 10:33:22,130 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-12-07 10:33:22,130 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:33:22,130 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:33:22,131 INFO L410 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:33:22,131 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:33:22,131 INFO L82 PathProgramCache]: Analyzing trace with hash -2029102298, now seen corresponding path program 1 times [2019-12-07 10:33:22,131 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:33:22,131 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2125092109] [2019-12-07 10:33:22,132 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:33:22,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:33:22,185 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:33:22,185 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2125092109] [2019-12-07 10:33:22,185 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:33:22,186 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:33:22,186 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2111987701] [2019-12-07 10:33:22,186 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:33:22,186 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:33:22,187 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:33:22,187 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:22,187 INFO L87 Difference]: Start difference. First operand 950 states and 1426 transitions. Second operand 3 states. [2019-12-07 10:33:22,229 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:33:22,229 INFO L93 Difference]: Finished difference Result 1888 states and 2834 transitions. [2019-12-07 10:33:22,229 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:33:22,229 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 83 [2019-12-07 10:33:22,230 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:33:22,235 INFO L225 Difference]: With dead ends: 1888 [2019-12-07 10:33:22,235 INFO L226 Difference]: Without dead ends: 950 [2019-12-07 10:33:22,236 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:22,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 950 states. [2019-12-07 10:33:22,263 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 950 to 950. [2019-12-07 10:33:22,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 950 states. [2019-12-07 10:33:22,266 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 950 states to 950 states and 1418 transitions. [2019-12-07 10:33:22,266 INFO L78 Accepts]: Start accepts. Automaton has 950 states and 1418 transitions. Word has length 83 [2019-12-07 10:33:22,266 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:33:22,266 INFO L462 AbstractCegarLoop]: Abstraction has 950 states and 1418 transitions. [2019-12-07 10:33:22,266 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:33:22,266 INFO L276 IsEmpty]: Start isEmpty. Operand 950 states and 1418 transitions. [2019-12-07 10:33:22,267 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-12-07 10:33:22,267 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:33:22,267 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:33:22,267 INFO L410 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:33:22,268 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:33:22,268 INFO L82 PathProgramCache]: Analyzing trace with hash -2086215006, now seen corresponding path program 1 times [2019-12-07 10:33:22,268 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:33:22,268 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [51777376] [2019-12-07 10:33:22,268 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:33:22,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:33:22,303 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:33:22,303 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [51777376] [2019-12-07 10:33:22,303 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:33:22,303 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:33:22,304 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1667726217] [2019-12-07 10:33:22,304 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:33:22,304 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:33:22,304 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:33:22,304 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:22,305 INFO L87 Difference]: Start difference. First operand 950 states and 1418 transitions. Second operand 3 states. [2019-12-07 10:33:22,345 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:33:22,345 INFO L93 Difference]: Finished difference Result 1886 states and 2815 transitions. [2019-12-07 10:33:22,345 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:33:22,345 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 83 [2019-12-07 10:33:22,346 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:33:22,350 INFO L225 Difference]: With dead ends: 1886 [2019-12-07 10:33:22,351 INFO L226 Difference]: Without dead ends: 950 [2019-12-07 10:33:22,352 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:22,354 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 950 states. [2019-12-07 10:33:22,384 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 950 to 950. [2019-12-07 10:33:22,384 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 950 states. [2019-12-07 10:33:22,387 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 950 states to 950 states and 1410 transitions. [2019-12-07 10:33:22,387 INFO L78 Accepts]: Start accepts. Automaton has 950 states and 1410 transitions. Word has length 83 [2019-12-07 10:33:22,388 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:33:22,388 INFO L462 AbstractCegarLoop]: Abstraction has 950 states and 1410 transitions. [2019-12-07 10:33:22,388 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:33:22,388 INFO L276 IsEmpty]: Start isEmpty. Operand 950 states and 1410 transitions. [2019-12-07 10:33:22,388 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-12-07 10:33:22,388 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:33:22,389 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:33:22,389 INFO L410 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:33:22,389 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:33:22,389 INFO L82 PathProgramCache]: Analyzing trace with hash 41097502, now seen corresponding path program 1 times [2019-12-07 10:33:22,389 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:33:22,389 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1130317214] [2019-12-07 10:33:22,389 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:33:22,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:33:22,427 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:33:22,428 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1130317214] [2019-12-07 10:33:22,428 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:33:22,428 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:33:22,428 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1911490032] [2019-12-07 10:33:22,429 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:33:22,429 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:33:22,429 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:33:22,429 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:22,429 INFO L87 Difference]: Start difference. First operand 950 states and 1410 transitions. Second operand 3 states. [2019-12-07 10:33:22,472 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:33:22,472 INFO L93 Difference]: Finished difference Result 1885 states and 2798 transitions. [2019-12-07 10:33:22,473 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:33:22,473 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 83 [2019-12-07 10:33:22,473 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:33:22,478 INFO L225 Difference]: With dead ends: 1885 [2019-12-07 10:33:22,478 INFO L226 Difference]: Without dead ends: 950 [2019-12-07 10:33:22,480 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:22,482 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 950 states. [2019-12-07 10:33:22,514 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 950 to 950. [2019-12-07 10:33:22,515 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 950 states. [2019-12-07 10:33:22,518 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 950 states to 950 states and 1402 transitions. [2019-12-07 10:33:22,518 INFO L78 Accepts]: Start accepts. Automaton has 950 states and 1402 transitions. Word has length 83 [2019-12-07 10:33:22,518 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:33:22,519 INFO L462 AbstractCegarLoop]: Abstraction has 950 states and 1402 transitions. [2019-12-07 10:33:22,519 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:33:22,519 INFO L276 IsEmpty]: Start isEmpty. Operand 950 states and 1402 transitions. [2019-12-07 10:33:22,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-12-07 10:33:22,519 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:33:22,519 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:33:22,519 INFO L410 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:33:22,520 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:33:22,520 INFO L82 PathProgramCache]: Analyzing trace with hash -451528672, now seen corresponding path program 1 times [2019-12-07 10:33:22,520 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:33:22,520 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1587144137] [2019-12-07 10:33:22,520 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:33:22,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:33:22,550 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:33:22,551 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1587144137] [2019-12-07 10:33:22,551 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:33:22,551 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:33:22,551 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1996399569] [2019-12-07 10:33:22,551 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:33:22,551 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:33:22,551 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:33:22,552 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:22,552 INFO L87 Difference]: Start difference. First operand 950 states and 1402 transitions. Second operand 3 states. [2019-12-07 10:33:22,611 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:33:22,611 INFO L93 Difference]: Finished difference Result 1884 states and 2781 transitions. [2019-12-07 10:33:22,612 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:33:22,612 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 83 [2019-12-07 10:33:22,612 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:33:22,617 INFO L225 Difference]: With dead ends: 1884 [2019-12-07 10:33:22,617 INFO L226 Difference]: Without dead ends: 950 [2019-12-07 10:33:22,618 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:22,620 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 950 states. [2019-12-07 10:33:22,655 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 950 to 950. [2019-12-07 10:33:22,655 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 950 states. [2019-12-07 10:33:22,658 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 950 states to 950 states and 1380 transitions. [2019-12-07 10:33:22,658 INFO L78 Accepts]: Start accepts. Automaton has 950 states and 1380 transitions. Word has length 83 [2019-12-07 10:33:22,658 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:33:22,659 INFO L462 AbstractCegarLoop]: Abstraction has 950 states and 1380 transitions. [2019-12-07 10:33:22,659 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:33:22,659 INFO L276 IsEmpty]: Start isEmpty. Operand 950 states and 1380 transitions. [2019-12-07 10:33:22,659 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-12-07 10:33:22,659 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:33:22,660 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:33:22,660 INFO L410 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:33:22,660 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:33:22,660 INFO L82 PathProgramCache]: Analyzing trace with hash 713295197, now seen corresponding path program 1 times [2019-12-07 10:33:22,660 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:33:22,660 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1799202148] [2019-12-07 10:33:22,660 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:33:22,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:33:22,685 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:33:22,686 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1799202148] [2019-12-07 10:33:22,686 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:33:22,686 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:33:22,686 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1102761922] [2019-12-07 10:33:22,687 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:33:22,687 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:33:22,687 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:33:22,687 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:22,687 INFO L87 Difference]: Start difference. First operand 950 states and 1380 transitions. Second operand 3 states. [2019-12-07 10:33:22,749 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:33:22,749 INFO L93 Difference]: Finished difference Result 1883 states and 2736 transitions. [2019-12-07 10:33:22,749 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:33:22,749 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 83 [2019-12-07 10:33:22,749 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:33:22,754 INFO L225 Difference]: With dead ends: 1883 [2019-12-07 10:33:22,754 INFO L226 Difference]: Without dead ends: 950 [2019-12-07 10:33:22,756 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:22,758 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 950 states. [2019-12-07 10:33:22,783 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 950 to 950. [2019-12-07 10:33:22,784 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 950 states. [2019-12-07 10:33:22,786 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 950 states to 950 states and 1358 transitions. [2019-12-07 10:33:22,786 INFO L78 Accepts]: Start accepts. Automaton has 950 states and 1358 transitions. Word has length 83 [2019-12-07 10:33:22,786 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:33:22,786 INFO L462 AbstractCegarLoop]: Abstraction has 950 states and 1358 transitions. [2019-12-07 10:33:22,786 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:33:22,786 INFO L276 IsEmpty]: Start isEmpty. Operand 950 states and 1358 transitions. [2019-12-07 10:33:22,787 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-12-07 10:33:22,787 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:33:22,787 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:33:22,787 INFO L410 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:33:22,787 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:33:22,787 INFO L82 PathProgramCache]: Analyzing trace with hash 2103165025, now seen corresponding path program 1 times [2019-12-07 10:33:22,788 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:33:22,788 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1061897364] [2019-12-07 10:33:22,788 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:33:22,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:33:22,807 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:33:22,807 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1061897364] [2019-12-07 10:33:22,807 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:33:22,807 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:33:22,807 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1690242621] [2019-12-07 10:33:22,808 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:33:22,808 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:33:22,808 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:33:22,808 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:22,808 INFO L87 Difference]: Start difference. First operand 950 states and 1358 transitions. Second operand 3 states. [2019-12-07 10:33:22,872 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:33:22,872 INFO L93 Difference]: Finished difference Result 1882 states and 2691 transitions. [2019-12-07 10:33:22,873 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:33:22,873 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 83 [2019-12-07 10:33:22,873 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:33:22,878 INFO L225 Difference]: With dead ends: 1882 [2019-12-07 10:33:22,878 INFO L226 Difference]: Without dead ends: 950 [2019-12-07 10:33:22,880 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:22,881 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 950 states. [2019-12-07 10:33:22,935 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 950 to 950. [2019-12-07 10:33:22,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 950 states. [2019-12-07 10:33:22,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 950 states to 950 states and 1336 transitions. [2019-12-07 10:33:22,938 INFO L78 Accepts]: Start accepts. Automaton has 950 states and 1336 transitions. Word has length 83 [2019-12-07 10:33:22,939 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:33:22,939 INFO L462 AbstractCegarLoop]: Abstraction has 950 states and 1336 transitions. [2019-12-07 10:33:22,939 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:33:22,939 INFO L276 IsEmpty]: Start isEmpty. Operand 950 states and 1336 transitions. [2019-12-07 10:33:22,940 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-12-07 10:33:22,940 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:33:22,940 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:33:22,940 INFO L410 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:33:22,940 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:33:22,940 INFO L82 PathProgramCache]: Analyzing trace with hash 845256222, now seen corresponding path program 1 times [2019-12-07 10:33:22,941 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:33:22,941 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1284089622] [2019-12-07 10:33:22,941 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:33:22,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:33:22,959 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:33:22,959 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1284089622] [2019-12-07 10:33:22,959 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:33:22,959 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:33:22,959 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1320737252] [2019-12-07 10:33:22,960 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:33:22,960 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:33:22,960 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:33:22,960 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:22,960 INFO L87 Difference]: Start difference. First operand 950 states and 1336 transitions. Second operand 3 states. [2019-12-07 10:33:23,019 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:33:23,019 INFO L93 Difference]: Finished difference Result 1881 states and 2646 transitions. [2019-12-07 10:33:23,020 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:33:23,020 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 83 [2019-12-07 10:33:23,020 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:33:23,025 INFO L225 Difference]: With dead ends: 1881 [2019-12-07 10:33:23,025 INFO L226 Difference]: Without dead ends: 950 [2019-12-07 10:33:23,027 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:23,028 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 950 states. [2019-12-07 10:33:23,062 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 950 to 950. [2019-12-07 10:33:23,062 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 950 states. [2019-12-07 10:33:23,064 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 950 states to 950 states and 1314 transitions. [2019-12-07 10:33:23,065 INFO L78 Accepts]: Start accepts. Automaton has 950 states and 1314 transitions. Word has length 83 [2019-12-07 10:33:23,065 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:33:23,065 INFO L462 AbstractCegarLoop]: Abstraction has 950 states and 1314 transitions. [2019-12-07 10:33:23,065 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:33:23,065 INFO L276 IsEmpty]: Start isEmpty. Operand 950 states and 1314 transitions. [2019-12-07 10:33:23,066 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-12-07 10:33:23,066 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:33:23,066 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:33:23,066 INFO L410 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:33:23,066 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:33:23,066 INFO L82 PathProgramCache]: Analyzing trace with hash 1865695778, now seen corresponding path program 1 times [2019-12-07 10:33:23,066 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:33:23,067 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1074058546] [2019-12-07 10:33:23,067 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:33:23,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:33:23,083 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:33:23,083 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1074058546] [2019-12-07 10:33:23,083 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:33:23,083 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:33:23,083 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [906616126] [2019-12-07 10:33:23,084 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:33:23,084 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:33:23,084 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:33:23,084 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:23,084 INFO L87 Difference]: Start difference. First operand 950 states and 1314 transitions. Second operand 3 states. [2019-12-07 10:33:23,137 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:33:23,137 INFO L93 Difference]: Finished difference Result 1880 states and 2601 transitions. [2019-12-07 10:33:23,138 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:33:23,138 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 83 [2019-12-07 10:33:23,138 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:33:23,141 INFO L225 Difference]: With dead ends: 1880 [2019-12-07 10:33:23,141 INFO L226 Difference]: Without dead ends: 950 [2019-12-07 10:33:23,143 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:23,144 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 950 states. [2019-12-07 10:33:23,172 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 950 to 950. [2019-12-07 10:33:23,172 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 950 states. [2019-12-07 10:33:23,174 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 950 states to 950 states and 1292 transitions. [2019-12-07 10:33:23,174 INFO L78 Accepts]: Start accepts. Automaton has 950 states and 1292 transitions. Word has length 83 [2019-12-07 10:33:23,175 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:33:23,175 INFO L462 AbstractCegarLoop]: Abstraction has 950 states and 1292 transitions. [2019-12-07 10:33:23,175 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:33:23,175 INFO L276 IsEmpty]: Start isEmpty. Operand 950 states and 1292 transitions. [2019-12-07 10:33:23,175 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-12-07 10:33:23,175 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:33:23,175 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:33:23,176 INFO L410 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:33:23,176 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:33:23,176 INFO L82 PathProgramCache]: Analyzing trace with hash 1915494495, now seen corresponding path program 1 times [2019-12-07 10:33:23,176 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:33:23,176 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1861301272] [2019-12-07 10:33:23,176 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:33:23,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:33:23,202 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:33:23,203 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1861301272] [2019-12-07 10:33:23,203 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:33:23,203 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:33:23,203 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2055621957] [2019-12-07 10:33:23,203 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:33:23,203 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:33:23,204 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:33:23,204 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:23,204 INFO L87 Difference]: Start difference. First operand 950 states and 1292 transitions. Second operand 3 states. [2019-12-07 10:33:23,239 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:33:23,239 INFO L93 Difference]: Finished difference Result 1887 states and 2565 transitions. [2019-12-07 10:33:23,240 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:33:23,240 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 83 [2019-12-07 10:33:23,240 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:33:23,243 INFO L225 Difference]: With dead ends: 1887 [2019-12-07 10:33:23,244 INFO L226 Difference]: Without dead ends: 950 [2019-12-07 10:33:23,245 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:23,246 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 950 states. [2019-12-07 10:33:23,275 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 950 to 950. [2019-12-07 10:33:23,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 950 states. [2019-12-07 10:33:23,277 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 950 states to 950 states and 1284 transitions. [2019-12-07 10:33:23,277 INFO L78 Accepts]: Start accepts. Automaton has 950 states and 1284 transitions. Word has length 83 [2019-12-07 10:33:23,277 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:33:23,278 INFO L462 AbstractCegarLoop]: Abstraction has 950 states and 1284 transitions. [2019-12-07 10:33:23,278 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:33:23,278 INFO L276 IsEmpty]: Start isEmpty. Operand 950 states and 1284 transitions. [2019-12-07 10:33:23,278 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-12-07 10:33:23,278 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:33:23,278 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:33:23,279 INFO L410 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:33:23,279 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:33:23,279 INFO L82 PathProgramCache]: Analyzing trace with hash 110056161, now seen corresponding path program 1 times [2019-12-07 10:33:23,279 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:33:23,279 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1259110317] [2019-12-07 10:33:23,279 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:33:23,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:33:23,304 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:33:23,304 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1259110317] [2019-12-07 10:33:23,305 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:33:23,305 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:33:23,305 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [385612974] [2019-12-07 10:33:23,305 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:33:23,305 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:33:23,305 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:33:23,305 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:23,306 INFO L87 Difference]: Start difference. First operand 950 states and 1284 transitions. Second operand 3 states. [2019-12-07 10:33:23,363 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:33:23,363 INFO L93 Difference]: Finished difference Result 1879 states and 2541 transitions. [2019-12-07 10:33:23,364 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:33:23,364 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 83 [2019-12-07 10:33:23,364 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:33:23,367 INFO L225 Difference]: With dead ends: 1879 [2019-12-07 10:33:23,368 INFO L226 Difference]: Without dead ends: 950 [2019-12-07 10:33:23,369 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:23,370 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 950 states. [2019-12-07 10:33:23,397 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 950 to 950. [2019-12-07 10:33:23,398 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 950 states. [2019-12-07 10:33:23,399 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 950 states to 950 states and 1262 transitions. [2019-12-07 10:33:23,400 INFO L78 Accepts]: Start accepts. Automaton has 950 states and 1262 transitions. Word has length 83 [2019-12-07 10:33:23,400 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:33:23,400 INFO L462 AbstractCegarLoop]: Abstraction has 950 states and 1262 transitions. [2019-12-07 10:33:23,400 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:33:23,400 INFO L276 IsEmpty]: Start isEmpty. Operand 950 states and 1262 transitions. [2019-12-07 10:33:23,400 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2019-12-07 10:33:23,400 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:33:23,401 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:33:23,401 INFO L410 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:33:23,401 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:33:23,401 INFO L82 PathProgramCache]: Analyzing trace with hash -1169807517, now seen corresponding path program 1 times [2019-12-07 10:33:23,401 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:33:23,401 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1256629411] [2019-12-07 10:33:23,401 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:33:23,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:33:23,425 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:33:23,426 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1256629411] [2019-12-07 10:33:23,426 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:33:23,426 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:33:23,426 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [276635338] [2019-12-07 10:33:23,426 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:33:23,426 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:33:23,427 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:33:23,427 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:23,427 INFO L87 Difference]: Start difference. First operand 950 states and 1262 transitions. Second operand 3 states. [2019-12-07 10:33:23,521 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:33:23,521 INFO L93 Difference]: Finished difference Result 2718 states and 3617 transitions. [2019-12-07 10:33:23,522 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:33:23,522 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 83 [2019-12-07 10:33:23,522 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:33:23,529 INFO L225 Difference]: With dead ends: 2718 [2019-12-07 10:33:23,529 INFO L226 Difference]: Without dead ends: 1791 [2019-12-07 10:33:23,530 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:23,533 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1791 states. [2019-12-07 10:33:23,609 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1791 to 1711. [2019-12-07 10:33:23,609 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1711 states. [2019-12-07 10:33:23,612 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1711 states to 1711 states and 2262 transitions. [2019-12-07 10:33:23,612 INFO L78 Accepts]: Start accepts. Automaton has 1711 states and 2262 transitions. Word has length 83 [2019-12-07 10:33:23,613 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:33:23,613 INFO L462 AbstractCegarLoop]: Abstraction has 1711 states and 2262 transitions. [2019-12-07 10:33:23,613 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:33:23,613 INFO L276 IsEmpty]: Start isEmpty. Operand 1711 states and 2262 transitions. [2019-12-07 10:33:23,614 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2019-12-07 10:33:23,614 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:33:23,614 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:33:23,614 INFO L410 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:33:23,615 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:33:23,615 INFO L82 PathProgramCache]: Analyzing trace with hash 797868130, now seen corresponding path program 1 times [2019-12-07 10:33:23,615 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:33:23,615 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1225272512] [2019-12-07 10:33:23,615 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:33:23,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:33:23,658 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:33:23,659 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1225272512] [2019-12-07 10:33:23,659 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:33:23,659 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 10:33:23,659 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [398294116] [2019-12-07 10:33:23,660 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:33:23,660 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:33:23,660 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:33:23,660 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:33:23,660 INFO L87 Difference]: Start difference. First operand 1711 states and 2262 transitions. Second operand 5 states. [2019-12-07 10:33:23,827 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:33:23,827 INFO L93 Difference]: Finished difference Result 3853 states and 5137 transitions. [2019-12-07 10:33:23,827 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 10:33:23,827 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 135 [2019-12-07 10:33:23,827 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:33:23,835 INFO L225 Difference]: With dead ends: 3853 [2019-12-07 10:33:23,835 INFO L226 Difference]: Without dead ends: 2169 [2019-12-07 10:33:23,838 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:33:23,840 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2169 states. [2019-12-07 10:33:23,897 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2169 to 1717. [2019-12-07 10:33:23,897 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1717 states. [2019-12-07 10:33:23,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1717 states to 1717 states and 2241 transitions. [2019-12-07 10:33:23,901 INFO L78 Accepts]: Start accepts. Automaton has 1717 states and 2241 transitions. Word has length 135 [2019-12-07 10:33:23,901 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:33:23,901 INFO L462 AbstractCegarLoop]: Abstraction has 1717 states and 2241 transitions. [2019-12-07 10:33:23,901 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:33:23,901 INFO L276 IsEmpty]: Start isEmpty. Operand 1717 states and 2241 transitions. [2019-12-07 10:33:23,902 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2019-12-07 10:33:23,902 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:33:23,902 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:33:23,903 INFO L410 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:33:23,903 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:33:23,903 INFO L82 PathProgramCache]: Analyzing trace with hash -256235162, now seen corresponding path program 1 times [2019-12-07 10:33:23,903 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:33:23,903 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1550399054] [2019-12-07 10:33:23,903 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:33:23,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:33:23,943 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:33:23,943 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1550399054] [2019-12-07 10:33:23,943 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:33:23,943 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 10:33:23,944 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1207390094] [2019-12-07 10:33:23,944 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:33:23,944 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:33:23,944 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:33:23,944 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:33:23,944 INFO L87 Difference]: Start difference. First operand 1717 states and 2241 transitions. Second operand 5 states. [2019-12-07 10:33:24,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:33:24,104 INFO L93 Difference]: Finished difference Result 3936 states and 5175 transitions. [2019-12-07 10:33:24,104 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 10:33:24,105 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 135 [2019-12-07 10:33:24,105 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:33:24,112 INFO L225 Difference]: With dead ends: 3936 [2019-12-07 10:33:24,113 INFO L226 Difference]: Without dead ends: 2253 [2019-12-07 10:33:24,115 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:33:24,117 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2253 states. [2019-12-07 10:33:24,174 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2253 to 1723. [2019-12-07 10:33:24,174 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1723 states. [2019-12-07 10:33:24,178 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1723 states to 1723 states and 2220 transitions. [2019-12-07 10:33:24,178 INFO L78 Accepts]: Start accepts. Automaton has 1723 states and 2220 transitions. Word has length 135 [2019-12-07 10:33:24,178 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:33:24,178 INFO L462 AbstractCegarLoop]: Abstraction has 1723 states and 2220 transitions. [2019-12-07 10:33:24,178 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:33:24,178 INFO L276 IsEmpty]: Start isEmpty. Operand 1723 states and 2220 transitions. [2019-12-07 10:33:24,179 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2019-12-07 10:33:24,179 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:33:24,180 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:33:24,180 INFO L410 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:33:24,180 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:33:24,180 INFO L82 PathProgramCache]: Analyzing trace with hash -1153628440, now seen corresponding path program 1 times [2019-12-07 10:33:24,180 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:33:24,180 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1355054221] [2019-12-07 10:33:24,180 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:33:24,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:33:24,229 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:33:24,230 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1355054221] [2019-12-07 10:33:24,230 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:33:24,230 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 10:33:24,230 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1784033365] [2019-12-07 10:33:24,230 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:33:24,231 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:33:24,231 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:33:24,231 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:33:24,231 INFO L87 Difference]: Start difference. First operand 1723 states and 2220 transitions. Second operand 5 states. [2019-12-07 10:33:24,430 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:33:24,430 INFO L93 Difference]: Finished difference Result 4523 states and 5873 transitions. [2019-12-07 10:33:24,431 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 10:33:24,431 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 135 [2019-12-07 10:33:24,431 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:33:24,441 INFO L225 Difference]: With dead ends: 4523 [2019-12-07 10:33:24,441 INFO L226 Difference]: Without dead ends: 2841 [2019-12-07 10:33:24,443 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:33:24,446 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2841 states. [2019-12-07 10:33:24,513 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2841 to 1735. [2019-12-07 10:33:24,514 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1735 states. [2019-12-07 10:33:24,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1735 states to 1735 states and 2207 transitions. [2019-12-07 10:33:24,517 INFO L78 Accepts]: Start accepts. Automaton has 1735 states and 2207 transitions. Word has length 135 [2019-12-07 10:33:24,517 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:33:24,518 INFO L462 AbstractCegarLoop]: Abstraction has 1735 states and 2207 transitions. [2019-12-07 10:33:24,518 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:33:24,518 INFO L276 IsEmpty]: Start isEmpty. Operand 1735 states and 2207 transitions. [2019-12-07 10:33:24,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2019-12-07 10:33:24,519 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:33:24,519 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:33:24,519 INFO L410 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:33:24,519 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:33:24,520 INFO L82 PathProgramCache]: Analyzing trace with hash 1106974188, now seen corresponding path program 1 times [2019-12-07 10:33:24,520 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:33:24,520 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1611638809] [2019-12-07 10:33:24,520 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:33:24,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:33:24,553 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:33:24,553 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1611638809] [2019-12-07 10:33:24,553 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:33:24,553 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 10:33:24,553 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [661976939] [2019-12-07 10:33:24,554 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:33:24,554 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:33:24,554 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:33:24,554 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:33:24,554 INFO L87 Difference]: Start difference. First operand 1735 states and 2207 transitions. Second operand 5 states. [2019-12-07 10:33:24,745 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:33:24,746 INFO L93 Difference]: Finished difference Result 4678 states and 5995 transitions. [2019-12-07 10:33:24,746 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 10:33:24,746 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 135 [2019-12-07 10:33:24,746 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:33:24,757 INFO L225 Difference]: With dead ends: 4678 [2019-12-07 10:33:24,757 INFO L226 Difference]: Without dead ends: 2991 [2019-12-07 10:33:24,759 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:33:24,763 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2991 states. [2019-12-07 10:33:24,841 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2991 to 1747. [2019-12-07 10:33:24,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1747 states. [2019-12-07 10:33:24,845 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1747 states to 1747 states and 2194 transitions. [2019-12-07 10:33:24,845 INFO L78 Accepts]: Start accepts. Automaton has 1747 states and 2194 transitions. Word has length 135 [2019-12-07 10:33:24,845 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:33:24,845 INFO L462 AbstractCegarLoop]: Abstraction has 1747 states and 2194 transitions. [2019-12-07 10:33:24,845 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:33:24,845 INFO L276 IsEmpty]: Start isEmpty. Operand 1747 states and 2194 transitions. [2019-12-07 10:33:24,847 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2019-12-07 10:33:24,847 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:33:24,847 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:33:24,847 INFO L410 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:33:24,848 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:33:24,848 INFO L82 PathProgramCache]: Analyzing trace with hash -132007952, now seen corresponding path program 1 times [2019-12-07 10:33:24,848 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:33:24,848 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1241192250] [2019-12-07 10:33:24,848 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:33:24,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:33:24,888 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:33:24,888 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1241192250] [2019-12-07 10:33:24,888 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:33:24,889 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 10:33:24,889 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1677083506] [2019-12-07 10:33:24,889 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:33:24,889 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:33:24,889 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:33:24,889 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:33:24,890 INFO L87 Difference]: Start difference. First operand 1747 states and 2194 transitions. Second operand 5 states. [2019-12-07 10:33:25,120 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:33:25,120 INFO L93 Difference]: Finished difference Result 4952 states and 6274 transitions. [2019-12-07 10:33:25,121 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 10:33:25,121 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 135 [2019-12-07 10:33:25,121 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:33:25,133 INFO L225 Difference]: With dead ends: 4952 [2019-12-07 10:33:25,133 INFO L226 Difference]: Without dead ends: 3267 [2019-12-07 10:33:25,135 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:33:25,139 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3267 states. [2019-12-07 10:33:25,209 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3267 to 1759. [2019-12-07 10:33:25,209 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1759 states. [2019-12-07 10:33:25,211 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1759 states to 1759 states and 2181 transitions. [2019-12-07 10:33:25,211 INFO L78 Accepts]: Start accepts. Automaton has 1759 states and 2181 transitions. Word has length 135 [2019-12-07 10:33:25,211 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:33:25,211 INFO L462 AbstractCegarLoop]: Abstraction has 1759 states and 2181 transitions. [2019-12-07 10:33:25,211 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:33:25,212 INFO L276 IsEmpty]: Start isEmpty. Operand 1759 states and 2181 transitions. [2019-12-07 10:33:25,213 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2019-12-07 10:33:25,213 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:33:25,213 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:33:25,213 INFO L410 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:33:25,213 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:33:25,213 INFO L82 PathProgramCache]: Analyzing trace with hash -1580711948, now seen corresponding path program 1 times [2019-12-07 10:33:25,214 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:33:25,214 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [803244788] [2019-12-07 10:33:25,214 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:33:25,221 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:33:25,255 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:33:25,255 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [803244788] [2019-12-07 10:33:25,255 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:33:25,255 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:33:25,255 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1944573115] [2019-12-07 10:33:25,256 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:33:25,256 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:33:25,256 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:33:25,256 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:25,256 INFO L87 Difference]: Start difference. First operand 1759 states and 2181 transitions. Second operand 3 states. [2019-12-07 10:33:25,434 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:33:25,434 INFO L93 Difference]: Finished difference Result 4879 states and 6029 transitions. [2019-12-07 10:33:25,434 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:33:25,435 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 135 [2019-12-07 10:33:25,435 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:33:25,442 INFO L225 Difference]: With dead ends: 4879 [2019-12-07 10:33:25,442 INFO L226 Difference]: Without dead ends: 3194 [2019-12-07 10:33:25,445 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:25,448 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3194 states. [2019-12-07 10:33:25,570 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3194 to 3190. [2019-12-07 10:33:25,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3190 states. [2019-12-07 10:33:25,573 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3190 states to 3190 states and 3915 transitions. [2019-12-07 10:33:25,573 INFO L78 Accepts]: Start accepts. Automaton has 3190 states and 3915 transitions. Word has length 135 [2019-12-07 10:33:25,573 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:33:25,573 INFO L462 AbstractCegarLoop]: Abstraction has 3190 states and 3915 transitions. [2019-12-07 10:33:25,573 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:33:25,574 INFO L276 IsEmpty]: Start isEmpty. Operand 3190 states and 3915 transitions. [2019-12-07 10:33:25,575 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2019-12-07 10:33:25,575 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:33:25,576 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:33:25,576 INFO L410 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:33:25,576 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:33:25,576 INFO L82 PathProgramCache]: Analyzing trace with hash 1007923084, now seen corresponding path program 1 times [2019-12-07 10:33:25,576 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:33:25,576 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [54516937] [2019-12-07 10:33:25,576 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:33:25,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:33:25,620 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:33:25,621 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [54516937] [2019-12-07 10:33:25,621 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:33:25,621 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:33:25,621 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [584605401] [2019-12-07 10:33:25,621 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:33:25,622 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:33:25,622 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:33:25,622 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:25,622 INFO L87 Difference]: Start difference. First operand 3190 states and 3915 transitions. Second operand 3 states. [2019-12-07 10:33:25,874 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:33:25,875 INFO L93 Difference]: Finished difference Result 9050 states and 11084 transitions. [2019-12-07 10:33:25,875 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:33:25,875 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 136 [2019-12-07 10:33:25,875 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:33:25,883 INFO L225 Difference]: With dead ends: 9050 [2019-12-07 10:33:25,883 INFO L226 Difference]: Without dead ends: 5934 [2019-12-07 10:33:25,886 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:25,892 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5934 states. [2019-12-07 10:33:26,104 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5934 to 5930. [2019-12-07 10:33:26,104 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5930 states. [2019-12-07 10:33:26,109 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5930 states to 5930 states and 7232 transitions. [2019-12-07 10:33:26,109 INFO L78 Accepts]: Start accepts. Automaton has 5930 states and 7232 transitions. Word has length 136 [2019-12-07 10:33:26,109 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:33:26,109 INFO L462 AbstractCegarLoop]: Abstraction has 5930 states and 7232 transitions. [2019-12-07 10:33:26,110 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:33:26,110 INFO L276 IsEmpty]: Start isEmpty. Operand 5930 states and 7232 transitions. [2019-12-07 10:33:26,112 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 137 [2019-12-07 10:33:26,113 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:33:26,113 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:33:26,113 INFO L410 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:33:26,113 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:33:26,113 INFO L82 PathProgramCache]: Analyzing trace with hash 463050510, now seen corresponding path program 1 times [2019-12-07 10:33:26,113 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:33:26,113 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [466063085] [2019-12-07 10:33:26,114 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:33:26,117 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:33:26,132 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2019-12-07 10:33:26,132 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [466063085] [2019-12-07 10:33:26,132 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:33:26,132 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:33:26,132 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [288519798] [2019-12-07 10:33:26,133 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:33:26,133 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:33:26,133 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:33:26,133 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:26,133 INFO L87 Difference]: Start difference. First operand 5930 states and 7232 transitions. Second operand 3 states. [2019-12-07 10:33:26,422 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:33:26,422 INFO L93 Difference]: Finished difference Result 11718 states and 14302 transitions. [2019-12-07 10:33:26,422 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:33:26,422 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 136 [2019-12-07 10:33:26,422 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:33:26,431 INFO L225 Difference]: With dead ends: 11718 [2019-12-07 10:33:26,431 INFO L226 Difference]: Without dead ends: 5862 [2019-12-07 10:33:26,437 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:26,445 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5862 states. [2019-12-07 10:33:26,661 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5862 to 5862. [2019-12-07 10:33:26,662 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 5862 states. [2019-12-07 10:33:26,667 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5862 states to 5862 states and 7154 transitions. [2019-12-07 10:33:26,667 INFO L78 Accepts]: Start accepts. Automaton has 5862 states and 7154 transitions. Word has length 136 [2019-12-07 10:33:26,667 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:33:26,667 INFO L462 AbstractCegarLoop]: Abstraction has 5862 states and 7154 transitions. [2019-12-07 10:33:26,667 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:33:26,667 INFO L276 IsEmpty]: Start isEmpty. Operand 5862 states and 7154 transitions. [2019-12-07 10:33:26,670 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2019-12-07 10:33:26,670 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:33:26,670 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:33:26,670 INFO L410 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:33:26,670 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:33:26,671 INFO L82 PathProgramCache]: Analyzing trace with hash -622903665, now seen corresponding path program 1 times [2019-12-07 10:33:26,671 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:33:26,671 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1452465462] [2019-12-07 10:33:26,671 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:33:26,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:33:26,706 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:33:26,707 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1452465462] [2019-12-07 10:33:26,707 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:33:26,707 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:33:26,707 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [506862321] [2019-12-07 10:33:26,707 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:33:26,707 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:33:26,707 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:33:26,708 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:26,708 INFO L87 Difference]: Start difference. First operand 5862 states and 7154 transitions. Second operand 3 states. [2019-12-07 10:33:27,129 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:33:27,129 INFO L93 Difference]: Finished difference Result 16721 states and 20393 transitions. [2019-12-07 10:33:27,130 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:33:27,130 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 137 [2019-12-07 10:33:27,130 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:33:27,139 INFO L225 Difference]: With dead ends: 16721 [2019-12-07 10:33:27,139 INFO L226 Difference]: Without dead ends: 10933 [2019-12-07 10:33:27,144 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:27,152 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10933 states. [2019-12-07 10:33:27,574 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10933 to 10929. [2019-12-07 10:33:27,574 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10929 states. [2019-12-07 10:33:27,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10929 states to 10929 states and 13293 transitions. [2019-12-07 10:33:27,583 INFO L78 Accepts]: Start accepts. Automaton has 10929 states and 13293 transitions. Word has length 137 [2019-12-07 10:33:27,583 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:33:27,583 INFO L462 AbstractCegarLoop]: Abstraction has 10929 states and 13293 transitions. [2019-12-07 10:33:27,583 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:33:27,583 INFO L276 IsEmpty]: Start isEmpty. Operand 10929 states and 13293 transitions. [2019-12-07 10:33:27,588 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2019-12-07 10:33:27,588 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:33:27,588 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:33:27,588 INFO L410 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:33:27,589 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:33:27,589 INFO L82 PathProgramCache]: Analyzing trace with hash -1167776239, now seen corresponding path program 1 times [2019-12-07 10:33:27,589 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:33:27,589 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [671851869] [2019-12-07 10:33:27,589 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:33:27,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:33:27,614 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2019-12-07 10:33:27,614 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [671851869] [2019-12-07 10:33:27,614 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:33:27,615 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:33:27,615 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [21515933] [2019-12-07 10:33:27,615 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:33:27,615 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:33:27,615 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:33:27,615 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:27,616 INFO L87 Difference]: Start difference. First operand 10929 states and 13293 transitions. Second operand 3 states. [2019-12-07 10:33:28,114 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:33:28,114 INFO L93 Difference]: Finished difference Result 21717 states and 26427 transitions. [2019-12-07 10:33:28,115 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:33:28,115 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 137 [2019-12-07 10:33:28,115 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:33:28,124 INFO L225 Difference]: With dead ends: 21717 [2019-12-07 10:33:28,124 INFO L226 Difference]: Without dead ends: 10862 [2019-12-07 10:33:28,131 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:28,138 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10862 states. [2019-12-07 10:33:28,540 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10862 to 10862. [2019-12-07 10:33:28,540 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 10862 states. [2019-12-07 10:33:28,549 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10862 states to 10862 states and 13217 transitions. [2019-12-07 10:33:28,549 INFO L78 Accepts]: Start accepts. Automaton has 10862 states and 13217 transitions. Word has length 137 [2019-12-07 10:33:28,549 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:33:28,549 INFO L462 AbstractCegarLoop]: Abstraction has 10862 states and 13217 transitions. [2019-12-07 10:33:28,549 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:33:28,549 INFO L276 IsEmpty]: Start isEmpty. Operand 10862 states and 13217 transitions. [2019-12-07 10:33:28,552 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 139 [2019-12-07 10:33:28,552 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:33:28,552 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:33:28,552 INFO L410 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:33:28,552 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:33:28,552 INFO L82 PathProgramCache]: Analyzing trace with hash 1460610289, now seen corresponding path program 1 times [2019-12-07 10:33:28,553 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:33:28,553 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [798406604] [2019-12-07 10:33:28,553 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:33:28,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:33:28,591 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:33:28,591 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [798406604] [2019-12-07 10:33:28,591 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:33:28,591 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:33:28,592 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1801048064] [2019-12-07 10:33:28,592 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:33:28,592 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:33:28,592 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:33:28,592 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:28,592 INFO L87 Difference]: Start difference. First operand 10862 states and 13217 transitions. Second operand 3 states. [2019-12-07 10:33:29,399 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:33:29,400 INFO L93 Difference]: Finished difference Result 31292 states and 38062 transitions. [2019-12-07 10:33:29,400 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:33:29,400 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 138 [2019-12-07 10:33:29,401 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:33:29,417 INFO L225 Difference]: With dead ends: 31292 [2019-12-07 10:33:29,417 INFO L226 Difference]: Without dead ends: 20504 [2019-12-07 10:33:29,427 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:29,439 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20504 states. [2019-12-07 10:33:30,302 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20504 to 20084. [2019-12-07 10:33:30,302 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20084 states. [2019-12-07 10:33:30,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20084 states to 20084 states and 24370 transitions. [2019-12-07 10:33:30,318 INFO L78 Accepts]: Start accepts. Automaton has 20084 states and 24370 transitions. Word has length 138 [2019-12-07 10:33:30,318 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:33:30,318 INFO L462 AbstractCegarLoop]: Abstraction has 20084 states and 24370 transitions. [2019-12-07 10:33:30,318 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:33:30,318 INFO L276 IsEmpty]: Start isEmpty. Operand 20084 states and 24370 transitions. [2019-12-07 10:33:30,323 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 139 [2019-12-07 10:33:30,323 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:33:30,323 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:33:30,323 INFO L410 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:33:30,324 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:33:30,324 INFO L82 PathProgramCache]: Analyzing trace with hash -78955983, now seen corresponding path program 1 times [2019-12-07 10:33:30,324 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:33:30,324 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [566728405] [2019-12-07 10:33:30,324 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:33:30,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:33:30,342 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2019-12-07 10:33:30,342 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [566728405] [2019-12-07 10:33:30,342 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:33:30,342 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:33:30,342 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1074153842] [2019-12-07 10:33:30,342 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:33:30,342 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:33:30,343 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:33:30,343 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:30,343 INFO L87 Difference]: Start difference. First operand 20084 states and 24370 transitions. Second operand 3 states. [2019-12-07 10:33:31,168 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:33:31,168 INFO L93 Difference]: Finished difference Result 40047 states and 48604 transitions. [2019-12-07 10:33:31,169 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:33:31,169 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 138 [2019-12-07 10:33:31,169 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:33:31,182 INFO L225 Difference]: With dead ends: 40047 [2019-12-07 10:33:31,182 INFO L226 Difference]: Without dead ends: 20018 [2019-12-07 10:33:31,191 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:31,202 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20018 states. [2019-12-07 10:33:31,951 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20018 to 20018. [2019-12-07 10:33:31,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20018 states. [2019-12-07 10:33:31,967 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20018 states to 20018 states and 24296 transitions. [2019-12-07 10:33:31,967 INFO L78 Accepts]: Start accepts. Automaton has 20018 states and 24296 transitions. Word has length 138 [2019-12-07 10:33:31,967 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:33:31,967 INFO L462 AbstractCegarLoop]: Abstraction has 20018 states and 24296 transitions. [2019-12-07 10:33:31,967 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:33:31,967 INFO L276 IsEmpty]: Start isEmpty. Operand 20018 states and 24296 transitions. [2019-12-07 10:33:31,972 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2019-12-07 10:33:31,972 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:33:31,972 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:33:31,972 INFO L410 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:33:31,972 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:33:31,972 INFO L82 PathProgramCache]: Analyzing trace with hash 1660502314, now seen corresponding path program 1 times [2019-12-07 10:33:31,973 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:33:31,973 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1250978972] [2019-12-07 10:33:31,973 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:33:31,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:33:32,007 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:33:32,007 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1250978972] [2019-12-07 10:33:32,007 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:33:32,008 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:33:32,008 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1804475911] [2019-12-07 10:33:32,008 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:33:32,008 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:33:32,008 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:33:32,008 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:32,008 INFO L87 Difference]: Start difference. First operand 20018 states and 24296 transitions. Second operand 3 states. [2019-12-07 10:33:33,527 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:33:33,527 INFO L93 Difference]: Finished difference Result 56835 states and 68987 transitions. [2019-12-07 10:33:33,528 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:33:33,528 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 139 [2019-12-07 10:33:33,528 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:33:33,555 INFO L225 Difference]: With dead ends: 56835 [2019-12-07 10:33:33,555 INFO L226 Difference]: Without dead ends: 36891 [2019-12-07 10:33:33,568 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:33,595 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36891 states. [2019-12-07 10:33:35,063 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36891 to 36887. [2019-12-07 10:33:35,064 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36887 states. [2019-12-07 10:33:35,093 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36887 states to 36887 states and 44695 transitions. [2019-12-07 10:33:35,093 INFO L78 Accepts]: Start accepts. Automaton has 36887 states and 44695 transitions. Word has length 139 [2019-12-07 10:33:35,093 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:33:35,094 INFO L462 AbstractCegarLoop]: Abstraction has 36887 states and 44695 transitions. [2019-12-07 10:33:35,094 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:33:35,094 INFO L276 IsEmpty]: Start isEmpty. Operand 36887 states and 44695 transitions. [2019-12-07 10:33:35,102 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2019-12-07 10:33:35,102 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:33:35,103 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:33:35,103 INFO L410 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:33:35,103 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:33:35,103 INFO L82 PathProgramCache]: Analyzing trace with hash 1115629740, now seen corresponding path program 1 times [2019-12-07 10:33:35,103 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:33:35,103 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2016531870] [2019-12-07 10:33:35,103 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:33:35,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:33:35,120 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2019-12-07 10:33:35,121 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2016531870] [2019-12-07 10:33:35,121 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:33:35,121 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:33:35,121 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2908346] [2019-12-07 10:33:35,121 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:33:35,121 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:33:35,121 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:33:35,122 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:35,122 INFO L87 Difference]: Start difference. First operand 36887 states and 44695 transitions. Second operand 3 states. [2019-12-07 10:33:36,786 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:33:36,786 INFO L93 Difference]: Finished difference Result 73635 states and 89237 transitions. [2019-12-07 10:33:36,787 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:33:36,787 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 139 [2019-12-07 10:33:36,787 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:33:36,813 INFO L225 Difference]: With dead ends: 73635 [2019-12-07 10:33:36,813 INFO L226 Difference]: Without dead ends: 36822 [2019-12-07 10:33:36,831 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:36,854 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36822 states. [2019-12-07 10:33:38,394 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36822 to 36822. [2019-12-07 10:33:38,395 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36822 states. [2019-12-07 10:33:38,422 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36822 states to 36822 states and 44623 transitions. [2019-12-07 10:33:38,423 INFO L78 Accepts]: Start accepts. Automaton has 36822 states and 44623 transitions. Word has length 139 [2019-12-07 10:33:38,423 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:33:38,423 INFO L462 AbstractCegarLoop]: Abstraction has 36822 states and 44623 transitions. [2019-12-07 10:33:38,423 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:33:38,423 INFO L276 IsEmpty]: Start isEmpty. Operand 36822 states and 44623 transitions. [2019-12-07 10:33:38,431 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 141 [2019-12-07 10:33:38,431 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:33:38,431 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:33:38,431 INFO L410 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:33:38,432 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:33:38,432 INFO L82 PathProgramCache]: Analyzing trace with hash -1562919338, now seen corresponding path program 1 times [2019-12-07 10:33:38,432 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:33:38,432 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [531706872] [2019-12-07 10:33:38,432 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:33:38,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:33:38,457 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:33:38,457 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [531706872] [2019-12-07 10:33:38,457 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:33:38,457 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:33:38,457 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1059841524] [2019-12-07 10:33:38,458 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:33:38,458 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:33:38,458 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:33:38,458 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:38,458 INFO L87 Difference]: Start difference. First operand 36822 states and 44623 transitions. Second operand 3 states. [2019-12-07 10:33:41,320 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:33:41,321 INFO L93 Difference]: Finished difference Result 106480 states and 128661 transitions. [2019-12-07 10:33:41,321 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:33:41,321 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 140 [2019-12-07 10:33:41,322 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:33:41,370 INFO L225 Difference]: With dead ends: 106480 [2019-12-07 10:33:41,370 INFO L226 Difference]: Without dead ends: 53418 [2019-12-07 10:33:41,392 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:41,427 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53418 states. [2019-12-07 10:33:43,600 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53418 to 53418. [2019-12-07 10:33:43,601 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53418 states. [2019-12-07 10:33:43,645 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53418 states to 53418 states and 64412 transitions. [2019-12-07 10:33:43,646 INFO L78 Accepts]: Start accepts. Automaton has 53418 states and 64412 transitions. Word has length 140 [2019-12-07 10:33:43,646 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:33:43,646 INFO L462 AbstractCegarLoop]: Abstraction has 53418 states and 64412 transitions. [2019-12-07 10:33:43,646 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:33:43,646 INFO L276 IsEmpty]: Start isEmpty. Operand 53418 states and 64412 transitions. [2019-12-07 10:33:43,664 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 182 [2019-12-07 10:33:43,664 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:33:43,664 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:33:43,664 INFO L410 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:33:43,664 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:33:43,664 INFO L82 PathProgramCache]: Analyzing trace with hash -1472853732, now seen corresponding path program 1 times [2019-12-07 10:33:43,665 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:33:43,665 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1410627705] [2019-12-07 10:33:43,665 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:33:43,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:33:43,714 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:33:43,714 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1410627705] [2019-12-07 10:33:43,714 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:33:43,714 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:33:43,714 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1779652155] [2019-12-07 10:33:43,715 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:33:43,715 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:33:43,715 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:33:43,715 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:43,715 INFO L87 Difference]: Start difference. First operand 53418 states and 64412 transitions. Second operand 3 states. [2019-12-07 10:33:46,724 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:33:46,725 INFO L93 Difference]: Finished difference Result 123134 states and 148256 transitions. [2019-12-07 10:33:46,725 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:33:46,725 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 181 [2019-12-07 10:33:46,726 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:33:46,783 INFO L225 Difference]: With dead ends: 123134 [2019-12-07 10:33:46,783 INFO L226 Difference]: Without dead ends: 69773 [2019-12-07 10:33:46,808 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:46,855 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69773 states. [2019-12-07 10:33:50,609 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69773 to 69581. [2019-12-07 10:33:50,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69581 states. [2019-12-07 10:33:50,669 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69581 states to 69581 states and 83394 transitions. [2019-12-07 10:33:50,670 INFO L78 Accepts]: Start accepts. Automaton has 69581 states and 83394 transitions. Word has length 181 [2019-12-07 10:33:50,670 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:33:50,670 INFO L462 AbstractCegarLoop]: Abstraction has 69581 states and 83394 transitions. [2019-12-07 10:33:50,670 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:33:50,670 INFO L276 IsEmpty]: Start isEmpty. Operand 69581 states and 83394 transitions. [2019-12-07 10:33:50,690 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 202 [2019-12-07 10:33:50,690 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:33:50,690 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:33:50,690 INFO L410 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:33:50,690 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:33:50,690 INFO L82 PathProgramCache]: Analyzing trace with hash 614314275, now seen corresponding path program 1 times [2019-12-07 10:33:50,690 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:33:50,690 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1495145452] [2019-12-07 10:33:50,691 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:33:50,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:33:50,729 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2019-12-07 10:33:50,729 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1495145452] [2019-12-07 10:33:50,729 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:33:50,729 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:33:50,729 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1959699162] [2019-12-07 10:33:50,729 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:33:50,730 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:33:50,730 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:33:50,730 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:50,730 INFO L87 Difference]: Start difference. First operand 69581 states and 83394 transitions. Second operand 3 states. [2019-12-07 10:33:53,578 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:33:53,578 INFO L93 Difference]: Finished difference Result 138159 states and 165318 transitions. [2019-12-07 10:33:53,579 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:33:53,579 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 201 [2019-12-07 10:33:53,579 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:33:53,647 INFO L225 Difference]: With dead ends: 138159 [2019-12-07 10:33:53,647 INFO L226 Difference]: Without dead ends: 68651 [2019-12-07 10:33:53,688 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:53,744 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68651 states. [2019-12-07 10:33:56,659 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68651 to 68651. [2019-12-07 10:33:56,659 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68651 states. [2019-12-07 10:33:56,719 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68651 states to 68651 states and 81362 transitions. [2019-12-07 10:33:56,719 INFO L78 Accepts]: Start accepts. Automaton has 68651 states and 81362 transitions. Word has length 201 [2019-12-07 10:33:56,720 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:33:56,720 INFO L462 AbstractCegarLoop]: Abstraction has 68651 states and 81362 transitions. [2019-12-07 10:33:56,720 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:33:56,720 INFO L276 IsEmpty]: Start isEmpty. Operand 68651 states and 81362 transitions. [2019-12-07 10:33:56,737 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 203 [2019-12-07 10:33:56,737 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:33:56,738 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:33:56,738 INFO L410 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:33:56,738 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:33:56,738 INFO L82 PathProgramCache]: Analyzing trace with hash -1781198288, now seen corresponding path program 1 times [2019-12-07 10:33:56,738 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:33:56,738 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [457795888] [2019-12-07 10:33:56,738 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:33:56,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:33:56,783 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 36 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:33:56,784 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [457795888] [2019-12-07 10:33:56,784 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:33:56,784 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:33:56,784 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [650661962] [2019-12-07 10:33:56,784 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:33:56,784 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:33:56,784 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:33:56,785 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:56,785 INFO L87 Difference]: Start difference. First operand 68651 states and 81362 transitions. Second operand 3 states. [2019-12-07 10:33:59,649 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:33:59,649 INFO L93 Difference]: Finished difference Result 121255 states and 144068 transitions. [2019-12-07 10:33:59,649 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:33:59,649 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 202 [2019-12-07 10:33:59,650 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:33:59,710 INFO L225 Difference]: With dead ends: 121255 [2019-12-07 10:33:59,711 INFO L226 Difference]: Without dead ends: 68655 [2019-12-07 10:33:59,740 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:33:59,791 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68655 states. [2019-12-07 10:34:02,695 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68655 to 68651. [2019-12-07 10:34:02,695 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68651 states. [2019-12-07 10:34:02,753 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68651 states to 68651 states and 81260 transitions. [2019-12-07 10:34:02,753 INFO L78 Accepts]: Start accepts. Automaton has 68651 states and 81260 transitions. Word has length 202 [2019-12-07 10:34:02,754 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:34:02,754 INFO L462 AbstractCegarLoop]: Abstraction has 68651 states and 81260 transitions. [2019-12-07 10:34:02,754 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:34:02,754 INFO L276 IsEmpty]: Start isEmpty. Operand 68651 states and 81260 transitions. [2019-12-07 10:34:02,777 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 244 [2019-12-07 10:34:02,778 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:34:02,778 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:34:02,778 INFO L410 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:34:02,778 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:34:02,778 INFO L82 PathProgramCache]: Analyzing trace with hash -1995337667, now seen corresponding path program 1 times [2019-12-07 10:34:02,778 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:34:02,779 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1523966467] [2019-12-07 10:34:02,779 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:34:02,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:34:02,842 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 21 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2019-12-07 10:34:02,843 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1523966467] [2019-12-07 10:34:02,843 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:34:02,843 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:34:02,843 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [997873998] [2019-12-07 10:34:02,843 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:34:02,843 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:34:02,843 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:34:02,843 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:34:02,844 INFO L87 Difference]: Start difference. First operand 68651 states and 81260 transitions. Second operand 3 states. [2019-12-07 10:34:06,349 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:34:06,349 INFO L93 Difference]: Finished difference Result 152007 states and 179689 transitions. [2019-12-07 10:34:06,350 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:34:06,350 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 243 [2019-12-07 10:34:06,350 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:34:06,422 INFO L225 Difference]: With dead ends: 152007 [2019-12-07 10:34:06,422 INFO L226 Difference]: Without dead ends: 83406 [2019-12-07 10:34:06,459 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:34:06,519 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83406 states. [2019-12-07 10:34:10,071 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83406 to 83150. [2019-12-07 10:34:10,071 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 83150 states. [2019-12-07 10:34:10,142 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83150 states to 83150 states and 97938 transitions. [2019-12-07 10:34:10,142 INFO L78 Accepts]: Start accepts. Automaton has 83150 states and 97938 transitions. Word has length 243 [2019-12-07 10:34:10,143 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:34:10,143 INFO L462 AbstractCegarLoop]: Abstraction has 83150 states and 97938 transitions. [2019-12-07 10:34:10,143 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:34:10,143 INFO L276 IsEmpty]: Start isEmpty. Operand 83150 states and 97938 transitions. [2019-12-07 10:34:10,171 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 247 [2019-12-07 10:34:10,171 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:34:10,171 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:34:10,171 INFO L410 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:34:10,171 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:34:10,172 INFO L82 PathProgramCache]: Analyzing trace with hash -92954994, now seen corresponding path program 1 times [2019-12-07 10:34:10,172 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:34:10,172 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1058375476] [2019-12-07 10:34:10,172 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:34:10,181 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:34:10,223 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 39 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:34:10,224 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1058375476] [2019-12-07 10:34:10,224 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:34:10,224 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:34:10,224 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [963684519] [2019-12-07 10:34:10,224 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:34:10,224 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:34:10,224 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:34:10,224 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:34:10,225 INFO L87 Difference]: Start difference. First operand 83150 states and 97938 transitions. Second operand 3 states. [2019-12-07 10:34:13,766 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:34:13,766 INFO L93 Difference]: Finished difference Result 151732 states and 179122 transitions. [2019-12-07 10:34:13,766 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:34:13,767 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 246 [2019-12-07 10:34:13,767 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:34:13,840 INFO L225 Difference]: With dead ends: 151732 [2019-12-07 10:34:13,840 INFO L226 Difference]: Without dead ends: 83154 [2019-12-07 10:34:13,878 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:34:13,937 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83154 states. [2019-12-07 10:34:17,467 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83154 to 83150. [2019-12-07 10:34:17,467 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 83150 states. [2019-12-07 10:34:17,538 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83150 states to 83150 states and 97792 transitions. [2019-12-07 10:34:17,538 INFO L78 Accepts]: Start accepts. Automaton has 83150 states and 97792 transitions. Word has length 246 [2019-12-07 10:34:17,539 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:34:17,539 INFO L462 AbstractCegarLoop]: Abstraction has 83150 states and 97792 transitions. [2019-12-07 10:34:17,539 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:34:17,539 INFO L276 IsEmpty]: Start isEmpty. Operand 83150 states and 97792 transitions. [2019-12-07 10:34:17,564 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 247 [2019-12-07 10:34:17,564 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:34:17,564 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:34:17,564 INFO L410 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:34:17,565 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:34:17,565 INFO L82 PathProgramCache]: Analyzing trace with hash -331946524, now seen corresponding path program 1 times [2019-12-07 10:34:17,565 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:34:17,565 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [284529445] [2019-12-07 10:34:17,565 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:34:17,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:34:17,616 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 41 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:34:17,617 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [284529445] [2019-12-07 10:34:17,617 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:34:17,617 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:34:17,617 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [949616940] [2019-12-07 10:34:17,617 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:34:17,617 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:34:17,617 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:34:17,617 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:34:17,617 INFO L87 Difference]: Start difference. First operand 83150 states and 97792 transitions. Second operand 3 states. [2019-12-07 10:34:21,204 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:34:21,204 INFO L93 Difference]: Finished difference Result 151856 states and 178956 transitions. [2019-12-07 10:34:21,205 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:34:21,205 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 246 [2019-12-07 10:34:21,205 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:34:21,280 INFO L225 Difference]: With dead ends: 151856 [2019-12-07 10:34:21,280 INFO L226 Difference]: Without dead ends: 83278 [2019-12-07 10:34:21,318 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:34:21,380 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83278 states. [2019-12-07 10:34:25,667 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83278 to 83150. [2019-12-07 10:34:25,667 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 83150 states. [2019-12-07 10:34:25,739 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83150 states to 83150 states and 96448 transitions. [2019-12-07 10:34:25,739 INFO L78 Accepts]: Start accepts. Automaton has 83150 states and 96448 transitions. Word has length 246 [2019-12-07 10:34:25,739 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:34:25,739 INFO L462 AbstractCegarLoop]: Abstraction has 83150 states and 96448 transitions. [2019-12-07 10:34:25,739 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:34:25,740 INFO L276 IsEmpty]: Start isEmpty. Operand 83150 states and 96448 transitions. [2019-12-07 10:34:25,766 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 250 [2019-12-07 10:34:25,766 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:34:25,766 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:34:25,766 INFO L410 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:34:25,767 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:34:25,767 INFO L82 PathProgramCache]: Analyzing trace with hash 1718247822, now seen corresponding path program 1 times [2019-12-07 10:34:25,767 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:34:25,767 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1308445320] [2019-12-07 10:34:25,767 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:34:25,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:34:25,820 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 33 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2019-12-07 10:34:25,820 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1308445320] [2019-12-07 10:34:25,820 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:34:25,820 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 10:34:25,820 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [124445506] [2019-12-07 10:34:25,820 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:34:25,820 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:34:25,820 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:34:25,821 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:34:25,821 INFO L87 Difference]: Start difference. First operand 83150 states and 96448 transitions. Second operand 5 states. [2019-12-07 10:34:31,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:34:31,850 INFO L93 Difference]: Finished difference Result 213778 states and 249756 transitions. [2019-12-07 10:34:31,850 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 10:34:31,850 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 249 [2019-12-07 10:34:31,850 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:34:31,981 INFO L225 Difference]: With dead ends: 213778 [2019-12-07 10:34:31,981 INFO L226 Difference]: Without dead ends: 130682 [2019-12-07 10:34:32,026 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:34:32,125 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130682 states. [2019-12-07 10:34:36,215 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130682 to 83534. [2019-12-07 10:34:36,215 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 83534 states. [2019-12-07 10:34:36,286 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83534 states to 83534 states and 95647 transitions. [2019-12-07 10:34:36,287 INFO L78 Accepts]: Start accepts. Automaton has 83534 states and 95647 transitions. Word has length 249 [2019-12-07 10:34:36,287 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:34:36,287 INFO L462 AbstractCegarLoop]: Abstraction has 83534 states and 95647 transitions. [2019-12-07 10:34:36,287 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:34:36,287 INFO L276 IsEmpty]: Start isEmpty. Operand 83534 states and 95647 transitions. [2019-12-07 10:34:36,316 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 290 [2019-12-07 10:34:36,316 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:34:36,317 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:34:36,317 INFO L410 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:34:36,317 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:34:36,317 INFO L82 PathProgramCache]: Analyzing trace with hash -582486225, now seen corresponding path program 1 times [2019-12-07 10:34:36,317 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:34:36,317 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [279059204] [2019-12-07 10:34:36,317 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:34:36,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:34:36,389 INFO L134 CoverageAnalysis]: Checked inductivity of 39 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2019-12-07 10:34:36,389 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [279059204] [2019-12-07 10:34:36,389 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:34:36,390 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:34:36,390 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [692501110] [2019-12-07 10:34:36,390 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:34:36,390 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:34:36,390 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:34:36,390 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:34:36,390 INFO L87 Difference]: Start difference. First operand 83534 states and 95647 transitions. Second operand 3 states. [2019-12-07 10:34:41,046 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:34:41,046 INFO L93 Difference]: Finished difference Result 180296 states and 206239 transitions. [2019-12-07 10:34:41,047 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:34:41,047 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 289 [2019-12-07 10:34:41,047 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:34:41,134 INFO L225 Difference]: With dead ends: 180296 [2019-12-07 10:34:41,135 INFO L226 Difference]: Without dead ends: 96805 [2019-12-07 10:34:41,170 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:34:41,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96805 states. [2019-12-07 10:34:45,827 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96805 to 96485. [2019-12-07 10:34:45,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96485 states. [2019-12-07 10:34:45,905 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96485 states to 96485 states and 110061 transitions. [2019-12-07 10:34:45,905 INFO L78 Accepts]: Start accepts. Automaton has 96485 states and 110061 transitions. Word has length 289 [2019-12-07 10:34:45,905 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:34:45,905 INFO L462 AbstractCegarLoop]: Abstraction has 96485 states and 110061 transitions. [2019-12-07 10:34:45,905 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:34:45,905 INFO L276 IsEmpty]: Start isEmpty. Operand 96485 states and 110061 transitions. [2019-12-07 10:34:45,949 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 293 [2019-12-07 10:34:45,949 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:34:45,949 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:34:45,949 INFO L410 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:34:45,949 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:34:45,950 INFO L82 PathProgramCache]: Analyzing trace with hash -423262633, now seen corresponding path program 1 times [2019-12-07 10:34:45,950 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:34:45,950 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2113295240] [2019-12-07 10:34:45,950 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:34:45,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:34:46,012 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 42 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:34:46,012 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2113295240] [2019-12-07 10:34:46,012 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:34:46,012 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:34:46,012 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [545327308] [2019-12-07 10:34:46,013 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:34:46,013 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:34:46,013 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:34:46,013 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:34:46,013 INFO L87 Difference]: Start difference. First operand 96485 states and 110061 transitions. Second operand 3 states. [2019-12-07 10:34:50,636 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:34:50,636 INFO L93 Difference]: Finished difference Result 179951 states and 205635 transitions. [2019-12-07 10:34:50,637 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:34:50,637 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 292 [2019-12-07 10:34:50,637 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:34:50,715 INFO L225 Difference]: With dead ends: 179951 [2019-12-07 10:34:50,715 INFO L226 Difference]: Without dead ends: 96489 [2019-12-07 10:34:50,758 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:34:50,832 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96489 states. [2019-12-07 10:34:55,516 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96489 to 96485. [2019-12-07 10:34:55,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96485 states. [2019-12-07 10:34:55,592 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96485 states to 96485 states and 109853 transitions. [2019-12-07 10:34:55,593 INFO L78 Accepts]: Start accepts. Automaton has 96485 states and 109853 transitions. Word has length 292 [2019-12-07 10:34:55,593 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:34:55,593 INFO L462 AbstractCegarLoop]: Abstraction has 96485 states and 109853 transitions. [2019-12-07 10:34:55,593 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:34:55,593 INFO L276 IsEmpty]: Start isEmpty. Operand 96485 states and 109853 transitions. [2019-12-07 10:34:55,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 335 [2019-12-07 10:34:55,634 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:34:55,634 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:34:55,634 INFO L410 AbstractCegarLoop]: === Iteration 39 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:34:55,634 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:34:55,634 INFO L82 PathProgramCache]: Analyzing trace with hash -1162176953, now seen corresponding path program 1 times [2019-12-07 10:34:55,635 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:34:55,635 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1967925671] [2019-12-07 10:34:55,635 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:34:55,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:34:55,724 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 31 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2019-12-07 10:34:55,724 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1967925671] [2019-12-07 10:34:55,724 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:34:55,724 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:34:55,724 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [279746505] [2019-12-07 10:34:55,725 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:34:55,725 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:34:55,725 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:34:55,725 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:34:55,725 INFO L87 Difference]: Start difference. First operand 96485 states and 109853 transitions. Second operand 3 states. [2019-12-07 10:35:00,886 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:35:00,886 INFO L93 Difference]: Finished difference Result 204741 states and 232803 transitions. [2019-12-07 10:35:00,887 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:35:00,887 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 334 [2019-12-07 10:35:00,887 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:35:00,986 INFO L225 Difference]: With dead ends: 204741 [2019-12-07 10:35:00,987 INFO L226 Difference]: Without dead ends: 108292 [2019-12-07 10:35:01,043 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:35:01,126 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 108292 states. [2019-12-07 10:35:07,217 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 108292 to 107908. [2019-12-07 10:35:07,217 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107908 states. [2019-12-07 10:35:07,312 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107908 states to 107908 states and 122379 transitions. [2019-12-07 10:35:07,312 INFO L78 Accepts]: Start accepts. Automaton has 107908 states and 122379 transitions. Word has length 334 [2019-12-07 10:35:07,313 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:35:07,313 INFO L462 AbstractCegarLoop]: Abstraction has 107908 states and 122379 transitions. [2019-12-07 10:35:07,313 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:35:07,313 INFO L276 IsEmpty]: Start isEmpty. Operand 107908 states and 122379 transitions. [2019-12-07 10:35:07,362 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 338 [2019-12-07 10:35:07,362 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:35:07,362 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:35:07,362 INFO L410 AbstractCegarLoop]: === Iteration 40 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:35:07,363 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:35:07,363 INFO L82 PathProgramCache]: Analyzing trace with hash -978666524, now seen corresponding path program 1 times [2019-12-07 10:35:07,363 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:35:07,363 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1518099493] [2019-12-07 10:35:07,363 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:35:07,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:35:07,438 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:35:07,438 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1518099493] [2019-12-07 10:35:07,438 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:35:07,438 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:35:07,438 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1023805076] [2019-12-07 10:35:07,439 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:35:07,439 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:35:07,439 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:35:07,439 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:35:07,439 INFO L87 Difference]: Start difference. First operand 107908 states and 122379 transitions. Second operand 3 states. [2019-12-07 10:35:12,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:35:12,667 INFO L93 Difference]: Finished difference Result 204326 states and 232161 transitions. [2019-12-07 10:35:12,668 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:35:12,668 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 337 [2019-12-07 10:35:12,668 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:35:12,765 INFO L225 Difference]: With dead ends: 204326 [2019-12-07 10:35:12,765 INFO L226 Difference]: Without dead ends: 107912 [2019-12-07 10:35:12,811 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:35:12,895 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107912 states. [2019-12-07 10:35:18,150 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107912 to 107908. [2019-12-07 10:35:18,151 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107908 states. [2019-12-07 10:35:18,243 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107908 states to 107908 states and 122067 transitions. [2019-12-07 10:35:18,244 INFO L78 Accepts]: Start accepts. Automaton has 107908 states and 122067 transitions. Word has length 337 [2019-12-07 10:35:18,244 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:35:18,244 INFO L462 AbstractCegarLoop]: Abstraction has 107908 states and 122067 transitions. [2019-12-07 10:35:18,244 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:35:18,244 INFO L276 IsEmpty]: Start isEmpty. Operand 107908 states and 122067 transitions. [2019-12-07 10:35:18,288 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 380 [2019-12-07 10:35:18,288 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:35:18,289 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:35:18,289 INFO L410 AbstractCegarLoop]: === Iteration 41 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:35:18,289 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:35:18,289 INFO L82 PathProgramCache]: Analyzing trace with hash 660132916, now seen corresponding path program 1 times [2019-12-07 10:35:18,289 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:35:18,289 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [518007401] [2019-12-07 10:35:18,289 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:35:18,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:35:18,393 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 36 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2019-12-07 10:35:18,393 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [518007401] [2019-12-07 10:35:18,393 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:35:18,393 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:35:18,393 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1496228857] [2019-12-07 10:35:18,394 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:35:18,394 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:35:18,394 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:35:18,394 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:35:18,394 INFO L87 Difference]: Start difference. First operand 107908 states and 122067 transitions. Second operand 3 states. [2019-12-07 10:35:24,091 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:35:24,091 INFO L93 Difference]: Finished difference Result 226138 states and 255399 transitions. [2019-12-07 10:35:24,092 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:35:24,092 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 379 [2019-12-07 10:35:24,092 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:35:24,198 INFO L225 Difference]: With dead ends: 226138 [2019-12-07 10:35:24,198 INFO L226 Difference]: Without dead ends: 118259 [2019-12-07 10:35:24,251 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:35:24,341 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118259 states. [2019-12-07 10:35:30,074 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118259 to 117811. [2019-12-07 10:35:30,075 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117811 states. [2019-12-07 10:35:30,179 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117811 states to 117811 states and 132721 transitions. [2019-12-07 10:35:30,179 INFO L78 Accepts]: Start accepts. Automaton has 117811 states and 132721 transitions. Word has length 379 [2019-12-07 10:35:30,179 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:35:30,179 INFO L462 AbstractCegarLoop]: Abstraction has 117811 states and 132721 transitions. [2019-12-07 10:35:30,179 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:35:30,179 INFO L276 IsEmpty]: Start isEmpty. Operand 117811 states and 132721 transitions. [2019-12-07 10:35:30,230 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 383 [2019-12-07 10:35:30,231 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:35:30,231 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:35:30,231 INFO L410 AbstractCegarLoop]: === Iteration 42 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:35:30,231 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:35:30,231 INFO L82 PathProgramCache]: Analyzing trace with hash 176006994, now seen corresponding path program 1 times [2019-12-07 10:35:30,232 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:35:30,232 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1598083402] [2019-12-07 10:35:30,232 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:35:30,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:35:30,340 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 44 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2019-12-07 10:35:30,340 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1598083402] [2019-12-07 10:35:30,340 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:35:30,341 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:35:30,341 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1264142432] [2019-12-07 10:35:30,341 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:35:30,341 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:35:30,341 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:35:30,341 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:35:30,341 INFO L87 Difference]: Start difference. First operand 117811 states and 132721 transitions. Second operand 3 states. [2019-12-07 10:35:32,251 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:35:32,251 INFO L93 Difference]: Finished difference Result 141218 states and 158629 transitions. [2019-12-07 10:35:32,252 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:35:32,252 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 382 [2019-12-07 10:35:32,252 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:35:32,268 INFO L225 Difference]: With dead ends: 141218 [2019-12-07 10:35:32,268 INFO L226 Difference]: Without dead ends: 20186 [2019-12-07 10:35:32,307 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:35:32,320 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20186 states. [2019-12-07 10:35:33,266 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20186 to 20186. [2019-12-07 10:35:33,266 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20186 states. [2019-12-07 10:35:33,281 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20186 states to 20186 states and 21827 transitions. [2019-12-07 10:35:33,281 INFO L78 Accepts]: Start accepts. Automaton has 20186 states and 21827 transitions. Word has length 382 [2019-12-07 10:35:33,281 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:35:33,281 INFO L462 AbstractCegarLoop]: Abstraction has 20186 states and 21827 transitions. [2019-12-07 10:35:33,281 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:35:33,281 INFO L276 IsEmpty]: Start isEmpty. Operand 20186 states and 21827 transitions. [2019-12-07 10:35:33,292 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 384 [2019-12-07 10:35:33,292 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:35:33,292 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:35:33,292 INFO L410 AbstractCegarLoop]: === Iteration 43 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:35:33,292 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:35:33,293 INFO L82 PathProgramCache]: Analyzing trace with hash 1861356732, now seen corresponding path program 1 times [2019-12-07 10:35:33,293 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:35:33,293 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2069068198] [2019-12-07 10:35:33,293 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:35:33,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:35:33,390 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 50 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:35:33,390 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2069068198] [2019-12-07 10:35:33,390 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:35:33,390 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:35:33,390 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1782112179] [2019-12-07 10:35:33,391 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:35:33,391 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:35:33,391 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:35:33,391 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:35:33,391 INFO L87 Difference]: Start difference. First operand 20186 states and 21827 transitions. Second operand 3 states. [2019-12-07 10:35:34,364 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:35:34,364 INFO L93 Difference]: Finished difference Result 33147 states and 35901 transitions. [2019-12-07 10:35:34,365 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:35:34,365 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 383 [2019-12-07 10:35:34,365 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:35:34,378 INFO L225 Difference]: With dead ends: 33147 [2019-12-07 10:35:34,378 INFO L226 Difference]: Without dead ends: 20186 [2019-12-07 10:35:34,386 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:35:34,398 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20186 states. [2019-12-07 10:35:35,427 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20186 to 20186. [2019-12-07 10:35:35,428 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20186 states. [2019-12-07 10:35:35,442 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20186 states to 20186 states and 21675 transitions. [2019-12-07 10:35:35,442 INFO L78 Accepts]: Start accepts. Automaton has 20186 states and 21675 transitions. Word has length 383 [2019-12-07 10:35:35,442 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:35:35,442 INFO L462 AbstractCegarLoop]: Abstraction has 20186 states and 21675 transitions. [2019-12-07 10:35:35,442 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:35:35,442 INFO L276 IsEmpty]: Start isEmpty. Operand 20186 states and 21675 transitions. [2019-12-07 10:35:35,454 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 389 [2019-12-07 10:35:35,454 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:35:35,454 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:35:35,454 INFO L410 AbstractCegarLoop]: === Iteration 44 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:35:35,454 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:35:35,454 INFO L82 PathProgramCache]: Analyzing trace with hash 914909407, now seen corresponding path program 1 times [2019-12-07 10:35:35,455 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:35:35,455 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [217272886] [2019-12-07 10:35:35,455 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:35:35,463 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:35:35,543 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 50 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:35:35,543 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [217272886] [2019-12-07 10:35:35,543 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:35:35,543 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:35:35,543 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [484166660] [2019-12-07 10:35:35,544 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:35:35,544 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:35:35,544 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:35:35,544 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:35:35,544 INFO L87 Difference]: Start difference. First operand 20186 states and 21675 transitions. Second operand 3 states. [2019-12-07 10:35:36,527 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:35:36,528 INFO L93 Difference]: Finished difference Result 31679 states and 34063 transitions. [2019-12-07 10:35:36,528 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:35:36,528 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 388 [2019-12-07 10:35:36,528 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:35:36,541 INFO L225 Difference]: With dead ends: 31679 [2019-12-07 10:35:36,542 INFO L226 Difference]: Without dead ends: 20186 [2019-12-07 10:35:36,549 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:35:36,560 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20186 states. [2019-12-07 10:35:37,525 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20186 to 20186. [2019-12-07 10:35:37,525 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20186 states. [2019-12-07 10:35:37,540 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20186 states to 20186 states and 21535 transitions. [2019-12-07 10:35:37,540 INFO L78 Accepts]: Start accepts. Automaton has 20186 states and 21535 transitions. Word has length 388 [2019-12-07 10:35:37,540 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:35:37,540 INFO L462 AbstractCegarLoop]: Abstraction has 20186 states and 21535 transitions. [2019-12-07 10:35:37,540 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:35:37,540 INFO L276 IsEmpty]: Start isEmpty. Operand 20186 states and 21535 transitions. [2019-12-07 10:35:37,551 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 394 [2019-12-07 10:35:37,551 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:35:37,551 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:35:37,551 INFO L410 AbstractCegarLoop]: === Iteration 45 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:35:37,551 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:35:37,552 INFO L82 PathProgramCache]: Analyzing trace with hash -946028452, now seen corresponding path program 1 times [2019-12-07 10:35:37,552 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:35:37,552 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1851716890] [2019-12-07 10:35:37,552 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:35:37,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:35:37,643 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 50 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:35:37,643 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1851716890] [2019-12-07 10:35:37,644 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:35:37,644 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:35:37,644 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [351255033] [2019-12-07 10:35:37,644 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:35:37,644 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:35:37,644 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:35:37,644 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:35:37,644 INFO L87 Difference]: Start difference. First operand 20186 states and 21535 transitions. Second operand 3 states. [2019-12-07 10:35:38,660 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:35:38,660 INFO L93 Difference]: Finished difference Result 30560 states and 32647 transitions. [2019-12-07 10:35:38,661 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:35:38,661 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 393 [2019-12-07 10:35:38,661 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:35:38,673 INFO L225 Difference]: With dead ends: 30560 [2019-12-07 10:35:38,673 INFO L226 Difference]: Without dead ends: 20186 [2019-12-07 10:35:38,678 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:35:38,687 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20186 states. [2019-12-07 10:35:39,658 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20186 to 20186. [2019-12-07 10:35:39,658 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20186 states. [2019-12-07 10:35:39,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20186 states to 20186 states and 21404 transitions. [2019-12-07 10:35:39,672 INFO L78 Accepts]: Start accepts. Automaton has 20186 states and 21404 transitions. Word has length 393 [2019-12-07 10:35:39,673 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:35:39,673 INFO L462 AbstractCegarLoop]: Abstraction has 20186 states and 21404 transitions. [2019-12-07 10:35:39,673 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:35:39,673 INFO L276 IsEmpty]: Start isEmpty. Operand 20186 states and 21404 transitions. [2019-12-07 10:35:39,683 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 399 [2019-12-07 10:35:39,684 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:35:39,684 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:35:39,684 INFO L410 AbstractCegarLoop]: === Iteration 46 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:35:39,684 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:35:39,684 INFO L82 PathProgramCache]: Analyzing trace with hash -1833719307, now seen corresponding path program 1 times [2019-12-07 10:35:39,684 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:35:39,684 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1593115913] [2019-12-07 10:35:39,684 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:35:39,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:35:39,769 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 42 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2019-12-07 10:35:39,769 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1593115913] [2019-12-07 10:35:39,769 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:35:39,769 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:35:39,769 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [739811048] [2019-12-07 10:35:39,769 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:35:39,770 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:35:39,770 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:35:39,770 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:35:39,770 INFO L87 Difference]: Start difference. First operand 20186 states and 21404 transitions. Second operand 3 states. [2019-12-07 10:35:40,770 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:35:40,770 INFO L93 Difference]: Finished difference Result 30625 states and 32533 transitions. [2019-12-07 10:35:40,770 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:35:40,770 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 398 [2019-12-07 10:35:40,771 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:35:40,784 INFO L225 Difference]: With dead ends: 30625 [2019-12-07 10:35:40,784 INFO L226 Difference]: Without dead ends: 20264 [2019-12-07 10:35:40,791 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:35:40,803 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20264 states. [2019-12-07 10:35:41,789 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20264 to 20186. [2019-12-07 10:35:41,790 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20186 states. [2019-12-07 10:35:41,804 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20186 states to 20186 states and 21272 transitions. [2019-12-07 10:35:41,804 INFO L78 Accepts]: Start accepts. Automaton has 20186 states and 21272 transitions. Word has length 398 [2019-12-07 10:35:41,804 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:35:41,804 INFO L462 AbstractCegarLoop]: Abstraction has 20186 states and 21272 transitions. [2019-12-07 10:35:41,805 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:35:41,805 INFO L276 IsEmpty]: Start isEmpty. Operand 20186 states and 21272 transitions. [2019-12-07 10:35:41,815 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 403 [2019-12-07 10:35:41,815 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:35:41,816 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:35:41,816 INFO L410 AbstractCegarLoop]: === Iteration 47 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:35:41,816 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:35:41,816 INFO L82 PathProgramCache]: Analyzing trace with hash 1021388863, now seen corresponding path program 1 times [2019-12-07 10:35:41,816 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:35:41,816 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1901116731] [2019-12-07 10:35:41,816 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:35:41,826 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:35:41,953 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 50 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:35:41,953 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1901116731] [2019-12-07 10:35:41,953 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:35:41,953 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:35:41,953 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1564064712] [2019-12-07 10:35:41,954 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:35:41,954 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:35:41,954 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:35:41,954 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:35:41,954 INFO L87 Difference]: Start difference. First operand 20186 states and 21272 transitions. Second operand 3 states. [2019-12-07 10:35:42,973 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:35:42,973 INFO L93 Difference]: Finished difference Result 35999 states and 37931 transitions. [2019-12-07 10:35:42,973 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:35:42,974 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 402 [2019-12-07 10:35:42,974 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:35:42,987 INFO L225 Difference]: With dead ends: 35999 [2019-12-07 10:35:42,987 INFO L226 Difference]: Without dead ends: 20186 [2019-12-07 10:35:42,996 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:35:43,008 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20186 states. [2019-12-07 10:35:44,008 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20186 to 20186. [2019-12-07 10:35:44,008 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20186 states. [2019-12-07 10:35:44,023 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20186 states to 20186 states and 21096 transitions. [2019-12-07 10:35:44,023 INFO L78 Accepts]: Start accepts. Automaton has 20186 states and 21096 transitions. Word has length 402 [2019-12-07 10:35:44,023 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:35:44,023 INFO L462 AbstractCegarLoop]: Abstraction has 20186 states and 21096 transitions. [2019-12-07 10:35:44,023 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:35:44,023 INFO L276 IsEmpty]: Start isEmpty. Operand 20186 states and 21096 transitions. [2019-12-07 10:35:44,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 408 [2019-12-07 10:35:44,034 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:35:44,034 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:35:44,034 INFO L410 AbstractCegarLoop]: === Iteration 48 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:35:44,034 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:35:44,035 INFO L82 PathProgramCache]: Analyzing trace with hash -846459542, now seen corresponding path program 1 times [2019-12-07 10:35:44,035 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:35:44,035 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [784702228] [2019-12-07 10:35:44,035 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:35:44,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:35:44,362 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 42 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2019-12-07 10:35:44,362 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [784702228] [2019-12-07 10:35:44,363 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:35:44,363 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 10:35:44,363 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1315778243] [2019-12-07 10:35:44,363 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 10:35:44,363 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:35:44,363 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 10:35:44,363 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2019-12-07 10:35:44,364 INFO L87 Difference]: Start difference. First operand 20186 states and 21096 transitions. Second operand 8 states. [2019-12-07 10:35:45,479 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:35:45,479 INFO L93 Difference]: Finished difference Result 20186 states and 21096 transitions. [2019-12-07 10:35:45,479 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 10:35:45,480 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 407 [2019-12-07 10:35:45,480 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:35:45,491 INFO L225 Difference]: With dead ends: 20186 [2019-12-07 10:35:45,491 INFO L226 Difference]: Without dead ends: 20184 [2019-12-07 10:35:45,493 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2019-12-07 10:35:45,502 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20184 states. [2019-12-07 10:35:46,545 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20184 to 20184. [2019-12-07 10:35:46,545 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20184 states. [2019-12-07 10:35:46,559 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20184 states to 20184 states and 21093 transitions. [2019-12-07 10:35:46,559 INFO L78 Accepts]: Start accepts. Automaton has 20184 states and 21093 transitions. Word has length 407 [2019-12-07 10:35:46,560 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:35:46,560 INFO L462 AbstractCegarLoop]: Abstraction has 20184 states and 21093 transitions. [2019-12-07 10:35:46,560 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 10:35:46,560 INFO L276 IsEmpty]: Start isEmpty. Operand 20184 states and 21093 transitions. [2019-12-07 10:35:46,570 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 412 [2019-12-07 10:35:46,571 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:35:46,571 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:35:46,571 INFO L410 AbstractCegarLoop]: === Iteration 49 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:35:46,571 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:35:46,571 INFO L82 PathProgramCache]: Analyzing trace with hash -256593416, now seen corresponding path program 1 times [2019-12-07 10:35:46,571 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:35:46,572 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [73049517] [2019-12-07 10:35:46,572 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:35:46,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:35:46,670 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 50 trivial. 0 not checked. [2019-12-07 10:35:46,670 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [73049517] [2019-12-07 10:35:46,670 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:35:46,670 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:35:46,670 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [182840618] [2019-12-07 10:35:46,671 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:35:46,671 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 10:35:46,671 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:35:46,671 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:35:46,671 INFO L87 Difference]: Start difference. First operand 20184 states and 21093 transitions. Second operand 3 states. [2019-12-07 10:35:47,813 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:35:47,813 INFO L93 Difference]: Finished difference Result 24560 states and 25612 transitions. [2019-12-07 10:35:47,814 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:35:47,814 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 411 [2019-12-07 10:35:47,814 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:35:47,828 INFO L225 Difference]: With dead ends: 24560 [2019-12-07 10:35:47,828 INFO L226 Difference]: Without dead ends: 22364 [2019-12-07 10:35:47,833 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:35:47,846 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22364 states. [2019-12-07 10:35:48,961 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22364 to 20186. [2019-12-07 10:35:48,961 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20186 states. [2019-12-07 10:35:48,975 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20186 states to 20186 states and 21095 transitions. [2019-12-07 10:35:48,975 INFO L78 Accepts]: Start accepts. Automaton has 20186 states and 21095 transitions. Word has length 411 [2019-12-07 10:35:48,975 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:35:48,975 INFO L462 AbstractCegarLoop]: Abstraction has 20186 states and 21095 transitions. [2019-12-07 10:35:48,975 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:35:48,975 INFO L276 IsEmpty]: Start isEmpty. Operand 20186 states and 21095 transitions. [2019-12-07 10:35:48,986 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 413 [2019-12-07 10:35:48,986 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:35:48,986 INFO L410 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:35:48,986 INFO L410 AbstractCegarLoop]: === Iteration 50 === [ULTIMATE.startErr1ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:35:48,986 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:35:48,986 INFO L82 PathProgramCache]: Analyzing trace with hash 398102070, now seen corresponding path program 1 times [2019-12-07 10:35:48,987 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 10:35:48,987 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1737795230] [2019-12-07 10:35:48,987 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:35:49,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 10:35:49,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 10:35:49,150 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 10:35:49,150 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 10:35:49,325 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 10:35:49 BoogieIcfgContainer [2019-12-07 10:35:49,325 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 10:35:49,326 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 10:35:49,326 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 10:35:49,326 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 10:35:49,326 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:33:21" (3/4) ... [2019-12-07 10:35:49,328 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 10:35:49,483 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_a76a9cd8-4de7-4c0c-bd27-9538d70e8156/bin/uautomizer/witness.graphml [2019-12-07 10:35:49,483 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 10:35:49,484 INFO L168 Benchmark]: Toolchain (without parser) took 149068.11 ms. Allocated memory was 1.0 GB in the beginning and 6.2 GB in the end (delta: 5.2 GB). Free memory was 939.3 MB in the beginning and 4.0 GB in the end (delta: -3.0 GB). Peak memory consumption was 2.1 GB. Max. memory is 11.5 GB. [2019-12-07 10:35:49,485 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 10:35:49,485 INFO L168 Benchmark]: CACSL2BoogieTranslator took 265.53 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 98.0 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -146.8 MB). Peak memory consumption was 23.3 MB. Max. memory is 11.5 GB. [2019-12-07 10:35:49,485 INFO L168 Benchmark]: Boogie Procedure Inliner took 49.37 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 10:35:49,485 INFO L168 Benchmark]: Boogie Preprocessor took 52.37 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 10:35:49,486 INFO L168 Benchmark]: RCFGBuilder took 704.59 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 954.7 MB in the end (delta: 120.7 MB). Peak memory consumption was 120.7 MB. Max. memory is 11.5 GB. [2019-12-07 10:35:49,486 INFO L168 Benchmark]: TraceAbstraction took 147835.92 ms. Allocated memory was 1.1 GB in the beginning and 6.2 GB in the end (delta: 5.1 GB). Free memory was 954.7 MB in the beginning and 4.1 GB in the end (delta: -3.1 GB). Peak memory consumption was 1.9 GB. Max. memory is 11.5 GB. [2019-12-07 10:35:49,486 INFO L168 Benchmark]: Witness Printer took 157.11 ms. Allocated memory is still 6.2 GB. Free memory was 4.1 GB in the beginning and 4.0 GB in the end (delta: 103.4 MB). Peak memory consumption was 103.4 MB. Max. memory is 11.5 GB. [2019-12-07 10:35:49,487 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 960.8 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 265.53 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 98.0 MB). Free memory was 939.3 MB in the beginning and 1.1 GB in the end (delta: -146.8 MB). Peak memory consumption was 23.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 49.37 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 52.37 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * RCFGBuilder took 704.59 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 954.7 MB in the end (delta: 120.7 MB). Peak memory consumption was 120.7 MB. Max. memory is 11.5 GB. * TraceAbstraction took 147835.92 ms. Allocated memory was 1.1 GB in the beginning and 6.2 GB in the end (delta: 5.1 GB). Free memory was 954.7 MB in the beginning and 4.1 GB in the end (delta: -3.1 GB). Peak memory consumption was 1.9 GB. Max. memory is 11.5 GB. * Witness Printer took 157.11 ms. Allocated memory is still 6.2 GB. Free memory was 4.1 GB in the beginning and 4.0 GB in the end (delta: 103.4 MB). Peak memory consumption was 103.4 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 10]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L14] int m_pc = 0; [L15] int t1_pc = 0; [L16] int t2_pc = 0; [L17] int t3_pc = 0; [L18] int t4_pc = 0; [L19] int t5_pc = 0; [L20] int m_st ; [L21] int t1_st ; [L22] int t2_st ; [L23] int t3_st ; [L24] int t4_st ; [L25] int t5_st ; [L26] int m_i ; [L27] int t1_i ; [L28] int t2_i ; [L29] int t3_i ; [L30] int t4_i ; [L31] int t5_i ; [L32] int M_E = 2; [L33] int T1_E = 2; [L34] int T2_E = 2; [L35] int T3_E = 2; [L36] int T4_E = 2; [L37] int T5_E = 2; [L38] int E_M = 2; [L39] int E_1 = 2; [L40] int E_2 = 2; [L41] int E_3 = 2; [L42] int E_4 = 2; [L43] int E_5 = 2; [L51] int token ; [L53] int local ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0, T3_E=2, t3_i=0, t3_pc=0, t3_st=0, T4_E=2, t4_i=0, t4_pc=0, t4_st=0, T5_E=2, t5_i=0, t5_pc=0, t5_st=0, token=0] [L975] int __retres1 ; [L886] m_i = 1 [L887] t1_i = 1 [L888] t2_i = 1 [L889] t3_i = 1 [L890] t4_i = 1 [L891] t5_i = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L916] int kernel_st ; [L917] int tmp ; [L918] int tmp___0 ; [L922] kernel_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L416] COND TRUE m_i == 1 [L417] m_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L421] COND TRUE t1_i == 1 [L422] t1_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L426] COND TRUE t2_i == 1 [L427] t2_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L431] COND TRUE t3_i == 1 [L432] t3_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L436] COND TRUE t4_i == 1 [L437] t4_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L441] COND TRUE t5_i == 1 [L442] t5_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L601] COND FALSE !(M_E == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L606] COND FALSE !(T1_E == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L611] COND FALSE !(T2_E == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L616] COND FALSE !(T3_E == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L621] COND FALSE !(T4_E == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L626] COND FALSE !(T5_E == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L631] COND FALSE !(E_M == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L636] COND FALSE !(E_1 == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L641] COND FALSE !(E_2 == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L646] COND FALSE !(E_3 == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L651] COND FALSE !(E_4 == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L656] COND FALSE !(E_5 == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L734] int tmp ; [L735] int tmp___0 ; [L736] int tmp___1 ; [L737] int tmp___2 ; [L738] int tmp___3 ; [L739] int tmp___4 ; [L291] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L294] COND FALSE !(m_pc == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L304] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L306] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L743] tmp = is_master_triggered() [L745] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L310] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L313] COND FALSE !(t1_pc == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L323] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L325] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L751] tmp___0 = is_transmit1_triggered() [L753] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L329] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L332] COND FALSE !(t2_pc == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L342] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L344] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L759] tmp___1 = is_transmit2_triggered() [L761] COND FALSE !(\read(tmp___1)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L348] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L351] COND FALSE !(t3_pc == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L361] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L363] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L767] tmp___2 = is_transmit3_triggered() [L769] COND FALSE !(\read(tmp___2)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L367] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L370] COND FALSE !(t4_pc == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L380] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L382] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L775] tmp___3 = is_transmit4_triggered() [L777] COND FALSE !(\read(tmp___3)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L386] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L389] COND FALSE !(t5_pc == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L399] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L401] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L783] tmp___4 = is_transmit5_triggered() [L785] COND FALSE !(\read(tmp___4)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L669] COND FALSE !(M_E == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L674] COND FALSE !(T1_E == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L679] COND FALSE !(T2_E == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L684] COND FALSE !(T3_E == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L689] COND FALSE !(T4_E == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L694] COND FALSE !(T5_E == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L699] COND FALSE !(E_M == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L704] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L709] COND FALSE !(E_2 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L714] COND FALSE !(E_3 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L719] COND FALSE !(E_4 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L724] COND FALSE !(E_5 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L930] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L933] kernel_st = 1 [L492] int tmp ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L496] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L451] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L454] COND TRUE m_st == 0 [L455] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L487] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L499] tmp = exists_runnable_thread() [L501] COND TRUE \read(tmp) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L506] COND TRUE m_st == 0 [L507] int tmp_ndt_1; [L508] tmp_ndt_1 = __VERIFIER_nondet_int() [L509] COND FALSE !(\read(tmp_ndt_1)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L520] COND TRUE t1_st == 0 [L521] int tmp_ndt_2; [L522] tmp_ndt_2 = __VERIFIER_nondet_int() [L523] COND TRUE \read(tmp_ndt_2) [L525] t1_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L114] COND TRUE t1_pc == 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L125] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L127] t1_pc = 1 [L128] t1_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=0, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L534] COND TRUE t2_st == 0 [L535] int tmp_ndt_3; [L536] tmp_ndt_3 = __VERIFIER_nondet_int() [L537] COND TRUE \read(tmp_ndt_3) [L539] t2_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L150] COND TRUE t2_pc == 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L161] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L163] t2_pc = 1 [L164] t2_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=0, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L548] COND TRUE t3_st == 0 [L549] int tmp_ndt_4; [L550] tmp_ndt_4 = __VERIFIER_nondet_int() [L551] COND TRUE \read(tmp_ndt_4) [L553] t3_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L186] COND TRUE t3_pc == 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L197] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=0, t3_st=1, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L199] t3_pc = 1 [L200] t3_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=0, t4_st=0, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L562] COND TRUE t4_st == 0 [L563] int tmp_ndt_5; [L564] tmp_ndt_5 = __VERIFIER_nondet_int() [L565] COND TRUE \read(tmp_ndt_5) [L567] t4_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=0, t4_st=1, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L222] COND TRUE t4_pc == 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=0, t4_st=1, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L233] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=0, t4_st=1, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L235] t4_pc = 1 [L236] t4_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=0, t5_st=0, token=0] [L576] COND TRUE t5_st == 0 [L577] int tmp_ndt_6; [L578] tmp_ndt_6 = __VERIFIER_nondet_int() [L579] COND TRUE \read(tmp_ndt_6) [L581] t5_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=0, t5_st=1, token=0] [L258] COND TRUE t5_pc == 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=0, t5_st=1, token=0] [L269] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=0, t5_st=1, token=0] [L271] t5_pc = 1 [L272] t5_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L496] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L451] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L454] COND TRUE m_st == 0 [L455] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L487] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L499] tmp = exists_runnable_thread() [L501] COND TRUE \read(tmp) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L506] COND TRUE m_st == 0 [L507] int tmp_ndt_1; [L508] tmp_ndt_1 = __VERIFIER_nondet_int() [L509] COND TRUE \read(tmp_ndt_1) [L511] m_st = 1 [L56] int tmp_var = __VERIFIER_nondet_int(); [L58] COND TRUE m_pc == 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L69] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=0, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L72] token = __VERIFIER_nondet_int() [L73] local = token [L74] E_1 = 1 [L734] int tmp ; [L735] int tmp___0 ; [L736] int tmp___1 ; [L737] int tmp___2 ; [L738] int tmp___3 ; [L739] int tmp___4 ; [L291] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L294] COND FALSE !(m_pc == 1) VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L304] __retres1 = 0 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L306] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L743] tmp = is_master_triggered() [L745] COND FALSE !(\read(tmp)) VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L310] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L313] COND TRUE t1_pc == 1 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L314] COND TRUE E_1 == 1 [L315] __retres1 = 1 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L325] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L751] tmp___0 = is_transmit1_triggered() [L753] COND TRUE \read(tmp___0) [L754] t1_st = 0 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L329] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L332] COND TRUE t2_pc == 1 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L333] COND FALSE !(E_2 == 1) VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L342] __retres1 = 0 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L344] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L759] tmp___1 = is_transmit2_triggered() [L761] COND FALSE !(\read(tmp___1)) VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L348] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L351] COND TRUE t3_pc == 1 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L352] COND FALSE !(E_3 == 1) VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L361] __retres1 = 0 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L363] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L767] tmp___2 = is_transmit3_triggered() [L769] COND FALSE !(\read(tmp___2)) VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L367] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L370] COND TRUE t4_pc == 1 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L371] COND FALSE !(E_4 == 1) VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L380] __retres1 = 0 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L382] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L775] tmp___3 = is_transmit4_triggered() [L777] COND FALSE !(\read(tmp___3)) VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L386] int __retres1 ; VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L389] COND TRUE t5_pc == 1 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L390] COND FALSE !(E_5 == 1) VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L399] __retres1 = 0 VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L401] return (__retres1); VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L783] tmp___4 = is_transmit5_triggered() [L785] COND FALSE !(\read(tmp___4)) VAL [E_1=1, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L76] E_1 = 2 [L77] m_pc = 1 [L78] m_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L520] COND TRUE t1_st == 0 [L521] int tmp_ndt_2; [L522] tmp_ndt_2 = __VERIFIER_nondet_int() [L523] COND TRUE \read(tmp_ndt_2) [L525] t1_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L114] COND FALSE !(t1_pc == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L117] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-5] [L133] token += 1 [L134] E_2 = 1 [L734] int tmp ; [L735] int tmp___0 ; [L736] int tmp___1 ; [L737] int tmp___2 ; [L738] int tmp___3 ; [L739] int tmp___4 ; [L291] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L294] COND TRUE m_pc == 1 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L295] COND FALSE !(E_M == 1) VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L304] __retres1 = 0 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L306] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L743] tmp = is_master_triggered() [L745] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L310] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L313] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L314] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L323] __retres1 = 0 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L325] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L751] tmp___0 = is_transmit1_triggered() [L753] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L329] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L332] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L333] COND TRUE E_2 == 1 [L334] __retres1 = 1 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L344] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L759] tmp___1 = is_transmit2_triggered() [L761] COND TRUE \read(tmp___1) [L762] t2_st = 0 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L348] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L351] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L352] COND FALSE !(E_3 == 1) VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L361] __retres1 = 0 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L363] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L767] tmp___2 = is_transmit3_triggered() [L769] COND FALSE !(\read(tmp___2)) VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L367] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L370] COND TRUE t4_pc == 1 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L371] COND FALSE !(E_4 == 1) VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L380] __retres1 = 0 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L382] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L775] tmp___3 = is_transmit4_triggered() [L777] COND FALSE !(\read(tmp___3)) VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L386] int __retres1 ; VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L389] COND TRUE t5_pc == 1 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L390] COND FALSE !(E_5 == 1) VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L399] __retres1 = 0 VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L401] return (__retres1); VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L783] tmp___4 = is_transmit5_triggered() [L785] COND FALSE !(\read(tmp___4)) VAL [E_1=2, E_2=1, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L136] E_2 = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L125] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L127] t1_pc = 1 [L128] t1_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=0, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L534] COND TRUE t2_st == 0 [L535] int tmp_ndt_3; [L536] tmp_ndt_3 = __VERIFIER_nondet_int() [L537] COND TRUE \read(tmp_ndt_3) [L539] t2_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L150] COND FALSE !(t2_pc == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L153] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-4] [L169] token += 1 [L170] E_3 = 1 [L734] int tmp ; [L735] int tmp___0 ; [L736] int tmp___1 ; [L737] int tmp___2 ; [L738] int tmp___3 ; [L739] int tmp___4 ; [L291] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L294] COND TRUE m_pc == 1 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L295] COND FALSE !(E_M == 1) VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L304] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L306] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L743] tmp = is_master_triggered() [L745] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L310] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L313] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L314] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L323] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L325] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L751] tmp___0 = is_transmit1_triggered() [L753] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L329] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L332] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L333] COND FALSE !(E_2 == 1) VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L342] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L344] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L759] tmp___1 = is_transmit2_triggered() [L761] COND FALSE !(\read(tmp___1)) VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L348] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L351] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L352] COND TRUE E_3 == 1 [L353] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L363] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L767] tmp___2 = is_transmit3_triggered() [L769] COND TRUE \read(tmp___2) [L770] t3_st = 0 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L367] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L370] COND TRUE t4_pc == 1 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L371] COND FALSE !(E_4 == 1) VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L380] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L382] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L775] tmp___3 = is_transmit4_triggered() [L777] COND FALSE !(\read(tmp___3)) VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L386] int __retres1 ; VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L389] COND TRUE t5_pc == 1 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L390] COND FALSE !(E_5 == 1) VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L399] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L401] return (__retres1); VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L783] tmp___4 = is_transmit5_triggered() [L785] COND FALSE !(\read(tmp___4)) VAL [E_1=2, E_2=2, E_3=1, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L172] E_3 = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L161] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L163] t2_pc = 1 [L164] t2_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=0, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L548] COND TRUE t3_st == 0 [L549] int tmp_ndt_4; [L550] tmp_ndt_4 = __VERIFIER_nondet_int() [L551] COND TRUE \read(tmp_ndt_4) [L553] t3_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L186] COND FALSE !(t3_pc == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L189] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-3] [L205] token += 1 [L206] E_4 = 1 [L734] int tmp ; [L735] int tmp___0 ; [L736] int tmp___1 ; [L737] int tmp___2 ; [L738] int tmp___3 ; [L739] int tmp___4 ; [L291] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L294] COND TRUE m_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L295] COND FALSE !(E_M == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L304] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L306] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L743] tmp = is_master_triggered() [L745] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L310] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L313] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L314] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L323] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L325] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L751] tmp___0 = is_transmit1_triggered() [L753] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L329] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L332] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L333] COND FALSE !(E_2 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L342] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L344] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L759] tmp___1 = is_transmit2_triggered() [L761] COND FALSE !(\read(tmp___1)) VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L348] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L351] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L352] COND FALSE !(E_3 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L361] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L363] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L767] tmp___2 = is_transmit3_triggered() [L769] COND FALSE !(\read(tmp___2)) VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L367] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L370] COND TRUE t4_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L371] COND TRUE E_4 == 1 [L372] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L382] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L775] tmp___3 = is_transmit4_triggered() [L777] COND TRUE \read(tmp___3) [L778] t4_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L386] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L389] COND TRUE t5_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L390] COND FALSE !(E_5 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L399] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L401] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L783] tmp___4 = is_transmit5_triggered() [L785] COND FALSE !(\read(tmp___4)) VAL [E_1=2, E_2=2, E_3=2, E_4=1, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L208] E_4 = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L197] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=1, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L199] t3_pc = 1 [L200] t3_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=0, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L562] COND TRUE t4_st == 0 [L563] int tmp_ndt_5; [L564] tmp_ndt_5 = __VERIFIER_nondet_int() [L565] COND TRUE \read(tmp_ndt_5) [L567] t4_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L222] COND FALSE !(t4_pc == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L225] COND TRUE t4_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-2] [L241] token += 1 [L242] E_5 = 1 [L734] int tmp ; [L735] int tmp___0 ; [L736] int tmp___1 ; [L737] int tmp___2 ; [L738] int tmp___3 ; [L739] int tmp___4 ; [L291] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L294] COND TRUE m_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L295] COND FALSE !(E_M == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L304] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L306] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L743] tmp = is_master_triggered() [L745] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L310] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L313] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L314] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L323] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L325] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L751] tmp___0 = is_transmit1_triggered() [L753] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L329] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L332] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L333] COND FALSE !(E_2 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L342] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L344] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L759] tmp___1 = is_transmit2_triggered() [L761] COND FALSE !(\read(tmp___1)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L348] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L351] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L352] COND FALSE !(E_3 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L361] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L363] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L767] tmp___2 = is_transmit3_triggered() [L769] COND FALSE !(\read(tmp___2)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L367] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L370] COND TRUE t4_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L371] COND FALSE !(E_4 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L380] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L382] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L775] tmp___3 = is_transmit4_triggered() [L777] COND FALSE !(\read(tmp___3)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L386] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L389] COND TRUE t5_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L390] COND TRUE E_5 == 1 [L391] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L401] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=-1] [L783] tmp___4 = is_transmit5_triggered() [L785] COND TRUE \read(tmp___4) [L786] t5_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=1, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=0, token=-1] [L244] E_5 = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=0, token=-1] [L233] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=1, T5_E=2, t5_i=1, t5_pc=1, t5_st=0, token=-1] [L235] t4_pc = 1 [L236] t4_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=0, token=-1] [L576] COND TRUE t5_st == 0 [L577] int tmp_ndt_6; [L578] tmp_ndt_6 = __VERIFIER_nondet_int() [L579] COND TRUE \read(tmp_ndt_6) [L581] t5_st = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=-1] [L258] COND FALSE !(t5_pc == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=-1] [L261] COND TRUE t5_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=-1] [L277] token += 1 [L278] E_M = 1 [L734] int tmp ; [L735] int tmp___0 ; [L736] int tmp___1 ; [L737] int tmp___2 ; [L738] int tmp___3 ; [L739] int tmp___4 ; [L291] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L294] COND TRUE m_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L295] COND TRUE E_M == 1 [L296] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L306] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L743] tmp = is_master_triggered() [L745] COND TRUE \read(tmp) [L746] m_st = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L310] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L313] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L314] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L323] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L325] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L751] tmp___0 = is_transmit1_triggered() [L753] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L329] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L332] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L333] COND FALSE !(E_2 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L342] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L344] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L759] tmp___1 = is_transmit2_triggered() [L761] COND FALSE !(\read(tmp___1)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L348] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L351] COND TRUE t3_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L352] COND FALSE !(E_3 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L361] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L363] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L767] tmp___2 = is_transmit3_triggered() [L769] COND FALSE !(\read(tmp___2)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L367] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L370] COND TRUE t4_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L371] COND FALSE !(E_4 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L380] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L382] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L775] tmp___3 = is_transmit4_triggered() [L777] COND FALSE !(\read(tmp___3)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L386] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L389] COND TRUE t5_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L390] COND FALSE !(E_5 == 1) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L399] __retres1 = 0 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L401] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L783] tmp___4 = is_transmit5_triggered() [L785] COND FALSE !(\read(tmp___4)) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=1, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L280] E_M = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L269] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=1, token=0] [L271] t5_pc = 1 [L272] t5_st = 2 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L496] COND TRUE 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L451] int __retres1 ; VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L454] COND TRUE m_st == 0 [L455] __retres1 = 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L487] return (__retres1); VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L499] tmp = exists_runnable_thread() [L501] COND TRUE \read(tmp) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L506] COND TRUE m_st == 0 [L507] int tmp_ndt_1; [L508] tmp_ndt_1 = __VERIFIER_nondet_int() [L509] COND TRUE \read(tmp_ndt_1) [L511] m_st = 1 [L56] int tmp_var = __VERIFIER_nondet_int(); [L58] COND FALSE !(m_pc == 0) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L61] COND TRUE m_pc == 1 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L83] COND FALSE !(token != local + 5) VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L88] COND TRUE tmp_var <= 5 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L89] COND TRUE tmp_var >= 5 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L94] COND TRUE tmp_var <= 5 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L95] COND TRUE tmp_var >= 5 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L96] COND TRUE tmp_var == 5 VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] [L10] __VERIFIER_error() VAL [E_1=2, E_2=2, E_3=2, E_4=2, E_5=2, E_M=2, local=-5, M_E=2, m_i=1, m_pc=1, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2, T3_E=2, t3_i=1, t3_pc=1, t3_st=2, T4_E=2, t4_i=1, t4_pc=1, t4_st=2, T5_E=2, t5_i=1, t5_pc=1, t5_st=2, token=0] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 540 locations, 2 error locations. Result: UNSAFE, OverallTime: 147.6s, OverallIterations: 50, TraceHistogramMax: 3, AutomataDifference: 73.1s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 39010 SDtfs, 34584 SDslu, 28927 SDs, 0 SdLazy, 1041 SolverSat, 476 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 171 GetRequests, 92 SyntacticMatches, 1 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=117811occurred in iteration=41, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 70.7s AutomataMinimizationTime, 49 MinimizatonAttempts, 56508 StatesRemovedByMinimization, 25 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.0s InterpolantComputationTime, 9987 NumberOfCodeBlocks, 9987 NumberOfCodeBlocksAsserted, 50 NumberOfCheckSat, 9526 ConstructedInterpolants, 0 QuantifiedInterpolants, 4457844 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 49 InterpolantComputations, 49 PerfectInterpolantSequences, 984/984 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...