./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/systemc/transmitter.02.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_4ee22f5a-a2fb-4c1f-b2c8-88e5f96f17a9/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_4ee22f5a-a2fb-4c1f-b2c8-88e5f96f17a9/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_4ee22f5a-a2fb-4c1f-b2c8-88e5f96f17a9/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_4ee22f5a-a2fb-4c1f-b2c8-88e5f96f17a9/bin/uautomizer/config/AutomizerReach.xml -i ../../sv-benchmarks/c/systemc/transmitter.02.cil.c -s /tmp/vcloud-vcloud-master/worker/run_dir_4ee22f5a-a2fb-4c1f-b2c8-88e5f96f17a9/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_4ee22f5a-a2fb-4c1f-b2c8-88e5f96f17a9/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 0c244c639ec9718adcbacffa967b748c52a23cd0 ..................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 15:00:53,804 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 15:00:53,805 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 15:00:53,812 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 15:00:53,813 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 15:00:53,813 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 15:00:53,814 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 15:00:53,815 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 15:00:53,817 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 15:00:53,818 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 15:00:53,819 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 15:00:53,819 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 15:00:53,820 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 15:00:53,820 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 15:00:53,821 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 15:00:53,822 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 15:00:53,822 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 15:00:53,823 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 15:00:53,825 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 15:00:53,826 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 15:00:53,827 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 15:00:53,828 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 15:00:53,828 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 15:00:53,829 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 15:00:53,831 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 15:00:53,831 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 15:00:53,831 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 15:00:53,831 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 15:00:53,831 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 15:00:53,832 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 15:00:53,832 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 15:00:53,833 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 15:00:53,833 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 15:00:53,834 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 15:00:53,835 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 15:00:53,835 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 15:00:53,835 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 15:00:53,836 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 15:00:53,836 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 15:00:53,836 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 15:00:53,837 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 15:00:53,838 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_4ee22f5a-a2fb-4c1f-b2c8-88e5f96f17a9/bin/uautomizer/config/svcomp-Reach-32bit-Automizer_Default.epf [2019-12-07 15:00:53,850 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 15:00:53,850 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 15:00:53,851 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 15:00:53,851 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 15:00:53,851 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 15:00:53,852 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 15:00:53,852 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 15:00:53,852 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 15:00:53,852 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 15:00:53,852 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 15:00:53,853 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 15:00:53,853 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 15:00:53,853 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 15:00:53,853 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 15:00:53,853 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 15:00:53,853 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 15:00:53,854 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 15:00:53,854 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 15:00:53,854 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 15:00:53,854 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 15:00:53,854 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 15:00:53,855 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 15:00:53,855 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 15:00:53,855 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 15:00:53,855 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 15:00:53,855 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 15:00:53,855 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 15:00:53,856 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 15:00:53,856 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 15:00:53,856 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_4ee22f5a-a2fb-4c1f-b2c8-88e5f96f17a9/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 0c244c639ec9718adcbacffa967b748c52a23cd0 [2019-12-07 15:00:53,958 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 15:00:53,968 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 15:00:53,971 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 15:00:53,972 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 15:00:53,972 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 15:00:53,973 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_4ee22f5a-a2fb-4c1f-b2c8-88e5f96f17a9/bin/uautomizer/../../sv-benchmarks/c/systemc/transmitter.02.cil.c [2019-12-07 15:00:54,018 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_4ee22f5a-a2fb-4c1f-b2c8-88e5f96f17a9/bin/uautomizer/data/421b35248/25f589b850544f6d9f889682132a070c/FLAGf7ec0ee56 [2019-12-07 15:00:54,404 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 15:00:54,404 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_4ee22f5a-a2fb-4c1f-b2c8-88e5f96f17a9/sv-benchmarks/c/systemc/transmitter.02.cil.c [2019-12-07 15:00:54,410 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_4ee22f5a-a2fb-4c1f-b2c8-88e5f96f17a9/bin/uautomizer/data/421b35248/25f589b850544f6d9f889682132a070c/FLAGf7ec0ee56 [2019-12-07 15:00:54,783 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_4ee22f5a-a2fb-4c1f-b2c8-88e5f96f17a9/bin/uautomizer/data/421b35248/25f589b850544f6d9f889682132a070c [2019-12-07 15:00:54,785 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 15:00:54,786 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 15:00:54,787 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 15:00:54,787 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 15:00:54,790 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 15:00:54,790 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 03:00:54" (1/1) ... [2019-12-07 15:00:54,793 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@75e5483 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:00:54, skipping insertion in model container [2019-12-07 15:00:54,793 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 03:00:54" (1/1) ... [2019-12-07 15:00:54,798 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 15:00:54,820 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 15:00:54,973 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 15:00:54,977 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 15:00:55,001 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 15:00:55,014 INFO L208 MainTranslator]: Completed translation [2019-12-07 15:00:55,015 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:00:55 WrapperNode [2019-12-07 15:00:55,015 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 15:00:55,015 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 15:00:55,015 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 15:00:55,015 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 15:00:55,021 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:00:55" (1/1) ... [2019-12-07 15:00:55,026 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:00:55" (1/1) ... [2019-12-07 15:00:55,050 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 15:00:55,051 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 15:00:55,051 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 15:00:55,051 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 15:00:55,057 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:00:55" (1/1) ... [2019-12-07 15:00:55,057 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:00:55" (1/1) ... [2019-12-07 15:00:55,059 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:00:55" (1/1) ... [2019-12-07 15:00:55,059 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:00:55" (1/1) ... [2019-12-07 15:00:55,064 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:00:55" (1/1) ... [2019-12-07 15:00:55,073 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:00:55" (1/1) ... [2019-12-07 15:00:55,075 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:00:55" (1/1) ... [2019-12-07 15:00:55,078 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 15:00:55,079 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 15:00:55,079 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 15:00:55,079 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 15:00:55,079 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:00:55" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_4ee22f5a-a2fb-4c1f-b2c8-88e5f96f17a9/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 15:00:55,118 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 15:00:55,118 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 15:00:55,474 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 15:00:55,474 INFO L287 CfgBuilder]: Removed 94 assume(true) statements. [2019-12-07 15:00:55,475 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:00:55 BoogieIcfgContainer [2019-12-07 15:00:55,475 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 15:00:55,476 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 15:00:55,476 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 15:00:55,478 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 15:00:55,478 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 03:00:54" (1/3) ... [2019-12-07 15:00:55,478 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5487f6b8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 03:00:55, skipping insertion in model container [2019-12-07 15:00:55,479 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 03:00:55" (2/3) ... [2019-12-07 15:00:55,479 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5487f6b8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 03:00:55, skipping insertion in model container [2019-12-07 15:00:55,479 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:00:55" (3/3) ... [2019-12-07 15:00:55,480 INFO L109 eAbstractionObserver]: Analyzing ICFG transmitter.02.cil.c [2019-12-07 15:00:55,486 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 15:00:55,491 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2019-12-07 15:00:55,498 INFO L249 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2019-12-07 15:00:55,515 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 15:00:55,515 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 15:00:55,515 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 15:00:55,515 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 15:00:55,515 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 15:00:55,515 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 15:00:55,515 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 15:00:55,515 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 15:00:55,529 INFO L276 IsEmpty]: Start isEmpty. Operand 192 states. [2019-12-07 15:00:55,534 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-12-07 15:00:55,534 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:55,535 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:55,535 INFO L410 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:55,538 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:55,539 INFO L82 PathProgramCache]: Analyzing trace with hash 550865253, now seen corresponding path program 1 times [2019-12-07 15:00:55,544 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:55,545 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1754552069] [2019-12-07 15:00:55,545 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:55,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:55,652 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:55,652 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1754552069] [2019-12-07 15:00:55,653 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:55,653 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:00:55,654 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1778844892] [2019-12-07 15:00:55,657 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:00:55,657 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:55,665 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:00:55,666 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:55,667 INFO L87 Difference]: Start difference. First operand 192 states. Second operand 3 states. [2019-12-07 15:00:55,703 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:55,703 INFO L93 Difference]: Finished difference Result 379 states and 595 transitions. [2019-12-07 15:00:55,703 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:00:55,704 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 49 [2019-12-07 15:00:55,704 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:55,713 INFO L225 Difference]: With dead ends: 379 [2019-12-07 15:00:55,713 INFO L226 Difference]: Without dead ends: 188 [2019-12-07 15:00:55,715 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:55,727 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188 states. [2019-12-07 15:00:55,747 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188 to 188. [2019-12-07 15:00:55,748 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 188 states. [2019-12-07 15:00:55,750 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 188 states to 188 states and 283 transitions. [2019-12-07 15:00:55,750 INFO L78 Accepts]: Start accepts. Automaton has 188 states and 283 transitions. Word has length 49 [2019-12-07 15:00:55,751 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:55,751 INFO L462 AbstractCegarLoop]: Abstraction has 188 states and 283 transitions. [2019-12-07 15:00:55,751 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:00:55,751 INFO L276 IsEmpty]: Start isEmpty. Operand 188 states and 283 transitions. [2019-12-07 15:00:55,752 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-12-07 15:00:55,752 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:55,752 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:55,753 INFO L410 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:55,753 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:55,753 INFO L82 PathProgramCache]: Analyzing trace with hash -342621085, now seen corresponding path program 1 times [2019-12-07 15:00:55,753 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:55,753 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1679993593] [2019-12-07 15:00:55,753 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:55,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:55,782 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:55,782 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1679993593] [2019-12-07 15:00:55,782 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:55,783 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:00:55,783 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1853266703] [2019-12-07 15:00:55,784 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:00:55,784 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:55,784 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:00:55,784 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:55,784 INFO L87 Difference]: Start difference. First operand 188 states and 283 transitions. Second operand 3 states. [2019-12-07 15:00:55,843 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:55,843 INFO L93 Difference]: Finished difference Result 498 states and 749 transitions. [2019-12-07 15:00:55,844 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:00:55,844 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 49 [2019-12-07 15:00:55,844 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:55,847 INFO L225 Difference]: With dead ends: 498 [2019-12-07 15:00:55,847 INFO L226 Difference]: Without dead ends: 317 [2019-12-07 15:00:55,849 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:55,850 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 317 states. [2019-12-07 15:00:55,868 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 317 to 315. [2019-12-07 15:00:55,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 315 states. [2019-12-07 15:00:55,870 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 315 states to 315 states and 467 transitions. [2019-12-07 15:00:55,870 INFO L78 Accepts]: Start accepts. Automaton has 315 states and 467 transitions. Word has length 49 [2019-12-07 15:00:55,870 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:55,870 INFO L462 AbstractCegarLoop]: Abstraction has 315 states and 467 transitions. [2019-12-07 15:00:55,870 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:00:55,870 INFO L276 IsEmpty]: Start isEmpty. Operand 315 states and 467 transitions. [2019-12-07 15:00:55,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-12-07 15:00:55,871 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:55,871 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:55,872 INFO L410 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:55,872 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:55,872 INFO L82 PathProgramCache]: Analyzing trace with hash -2057662813, now seen corresponding path program 1 times [2019-12-07 15:00:55,872 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:55,872 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [753693316] [2019-12-07 15:00:55,872 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:55,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:55,898 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:55,899 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [753693316] [2019-12-07 15:00:55,899 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:55,899 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:00:55,899 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1278012245] [2019-12-07 15:00:55,899 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:00:55,900 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:55,900 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:00:55,900 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:55,900 INFO L87 Difference]: Start difference. First operand 315 states and 467 transitions. Second operand 3 states. [2019-12-07 15:00:55,922 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:55,922 INFO L93 Difference]: Finished difference Result 622 states and 923 transitions. [2019-12-07 15:00:55,922 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:00:55,922 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 49 [2019-12-07 15:00:55,922 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:55,924 INFO L225 Difference]: With dead ends: 622 [2019-12-07 15:00:55,924 INFO L226 Difference]: Without dead ends: 315 [2019-12-07 15:00:55,925 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:55,925 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 315 states. [2019-12-07 15:00:55,940 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 315 to 315. [2019-12-07 15:00:55,940 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 315 states. [2019-12-07 15:00:55,941 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 315 states to 315 states and 459 transitions. [2019-12-07 15:00:55,942 INFO L78 Accepts]: Start accepts. Automaton has 315 states and 459 transitions. Word has length 49 [2019-12-07 15:00:55,942 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:55,942 INFO L462 AbstractCegarLoop]: Abstraction has 315 states and 459 transitions. [2019-12-07 15:00:55,942 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:00:55,942 INFO L276 IsEmpty]: Start isEmpty. Operand 315 states and 459 transitions. [2019-12-07 15:00:55,944 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-12-07 15:00:55,944 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:55,944 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:55,944 INFO L410 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:55,944 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:55,944 INFO L82 PathProgramCache]: Analyzing trace with hash 796507235, now seen corresponding path program 1 times [2019-12-07 15:00:55,945 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:55,945 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1581585214] [2019-12-07 15:00:55,945 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:55,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:55,968 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:55,969 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1581585214] [2019-12-07 15:00:55,969 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:55,969 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:00:55,969 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [459822025] [2019-12-07 15:00:55,969 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:00:55,969 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:55,969 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:00:55,970 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:55,970 INFO L87 Difference]: Start difference. First operand 315 states and 459 transitions. Second operand 3 states. [2019-12-07 15:00:55,990 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:55,990 INFO L93 Difference]: Finished difference Result 621 states and 906 transitions. [2019-12-07 15:00:55,990 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:00:55,990 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 49 [2019-12-07 15:00:55,990 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:55,992 INFO L225 Difference]: With dead ends: 621 [2019-12-07 15:00:55,992 INFO L226 Difference]: Without dead ends: 315 [2019-12-07 15:00:55,992 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:55,993 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 315 states. [2019-12-07 15:00:56,002 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 315 to 315. [2019-12-07 15:00:56,002 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 315 states. [2019-12-07 15:00:56,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 315 states to 315 states and 451 transitions. [2019-12-07 15:00:56,003 INFO L78 Accepts]: Start accepts. Automaton has 315 states and 451 transitions. Word has length 49 [2019-12-07 15:00:56,003 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:56,003 INFO L462 AbstractCegarLoop]: Abstraction has 315 states and 451 transitions. [2019-12-07 15:00:56,003 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:00:56,003 INFO L276 IsEmpty]: Start isEmpty. Operand 315 states and 451 transitions. [2019-12-07 15:00:56,004 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-12-07 15:00:56,004 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:56,004 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:56,004 INFO L410 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:56,004 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:56,004 INFO L82 PathProgramCache]: Analyzing trace with hash -773990749, now seen corresponding path program 1 times [2019-12-07 15:00:56,004 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:56,005 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [614290928] [2019-12-07 15:00:56,005 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:56,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:56,023 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:56,023 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [614290928] [2019-12-07 15:00:56,023 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:56,023 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:00:56,023 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [853869489] [2019-12-07 15:00:56,024 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:00:56,024 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:56,024 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:00:56,024 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:56,024 INFO L87 Difference]: Start difference. First operand 315 states and 451 transitions. Second operand 3 states. [2019-12-07 15:00:56,051 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:56,051 INFO L93 Difference]: Finished difference Result 620 states and 889 transitions. [2019-12-07 15:00:56,051 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:00:56,051 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 49 [2019-12-07 15:00:56,052 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:56,053 INFO L225 Difference]: With dead ends: 620 [2019-12-07 15:00:56,053 INFO L226 Difference]: Without dead ends: 315 [2019-12-07 15:00:56,054 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:56,054 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 315 states. [2019-12-07 15:00:56,063 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 315 to 315. [2019-12-07 15:00:56,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 315 states. [2019-12-07 15:00:56,064 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 315 states to 315 states and 437 transitions. [2019-12-07 15:00:56,064 INFO L78 Accepts]: Start accepts. Automaton has 315 states and 437 transitions. Word has length 49 [2019-12-07 15:00:56,064 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:56,064 INFO L462 AbstractCegarLoop]: Abstraction has 315 states and 437 transitions. [2019-12-07 15:00:56,064 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:00:56,064 INFO L276 IsEmpty]: Start isEmpty. Operand 315 states and 437 transitions. [2019-12-07 15:00:56,065 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-12-07 15:00:56,065 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:56,065 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:56,066 INFO L410 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:56,066 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:56,066 INFO L82 PathProgramCache]: Analyzing trace with hash -1210649628, now seen corresponding path program 1 times [2019-12-07 15:00:56,066 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:56,066 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [907754821] [2019-12-07 15:00:56,066 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:56,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:56,089 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:56,089 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [907754821] [2019-12-07 15:00:56,089 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:56,089 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:00:56,089 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1504251406] [2019-12-07 15:00:56,090 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:00:56,090 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:56,090 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:00:56,090 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:56,090 INFO L87 Difference]: Start difference. First operand 315 states and 437 transitions. Second operand 3 states. [2019-12-07 15:00:56,120 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:56,121 INFO L93 Difference]: Finished difference Result 619 states and 860 transitions. [2019-12-07 15:00:56,121 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:00:56,121 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 49 [2019-12-07 15:00:56,121 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:56,122 INFO L225 Difference]: With dead ends: 619 [2019-12-07 15:00:56,123 INFO L226 Difference]: Without dead ends: 315 [2019-12-07 15:00:56,123 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:56,124 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 315 states. [2019-12-07 15:00:56,133 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 315 to 315. [2019-12-07 15:00:56,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 315 states. [2019-12-07 15:00:56,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 315 states to 315 states and 423 transitions. [2019-12-07 15:00:56,135 INFO L78 Accepts]: Start accepts. Automaton has 315 states and 423 transitions. Word has length 49 [2019-12-07 15:00:56,135 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:56,135 INFO L462 AbstractCegarLoop]: Abstraction has 315 states and 423 transitions. [2019-12-07 15:00:56,135 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:00:56,135 INFO L276 IsEmpty]: Start isEmpty. Operand 315 states and 423 transitions. [2019-12-07 15:00:56,136 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2019-12-07 15:00:56,136 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:56,136 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:56,136 INFO L410 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:56,137 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:56,137 INFO L82 PathProgramCache]: Analyzing trace with hash 217882148, now seen corresponding path program 1 times [2019-12-07 15:00:56,137 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:56,137 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1865498607] [2019-12-07 15:00:56,137 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:56,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:56,169 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:56,170 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1865498607] [2019-12-07 15:00:56,170 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:56,170 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:00:56,170 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1496643843] [2019-12-07 15:00:56,171 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:00:56,171 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:56,171 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:00:56,171 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:56,171 INFO L87 Difference]: Start difference. First operand 315 states and 423 transitions. Second operand 3 states. [2019-12-07 15:00:56,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:56,222 INFO L93 Difference]: Finished difference Result 870 states and 1162 transitions. [2019-12-07 15:00:56,222 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:00:56,222 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 49 [2019-12-07 15:00:56,222 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:56,225 INFO L225 Difference]: With dead ends: 870 [2019-12-07 15:00:56,225 INFO L226 Difference]: Without dead ends: 592 [2019-12-07 15:00:56,226 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:56,226 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 592 states. [2019-12-07 15:00:56,244 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 592 to 556. [2019-12-07 15:00:56,245 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 556 states. [2019-12-07 15:00:56,246 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 556 states to 556 states and 731 transitions. [2019-12-07 15:00:56,247 INFO L78 Accepts]: Start accepts. Automaton has 556 states and 731 transitions. Word has length 49 [2019-12-07 15:00:56,247 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:56,247 INFO L462 AbstractCegarLoop]: Abstraction has 556 states and 731 transitions. [2019-12-07 15:00:56,247 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:00:56,247 INFO L276 IsEmpty]: Start isEmpty. Operand 556 states and 731 transitions. [2019-12-07 15:00:56,248 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2019-12-07 15:00:56,248 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:56,248 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:56,248 INFO L410 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:56,249 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:56,249 INFO L82 PathProgramCache]: Analyzing trace with hash -397727545, now seen corresponding path program 1 times [2019-12-07 15:00:56,249 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:56,249 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1410978054] [2019-12-07 15:00:56,249 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:56,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:56,274 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:56,274 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1410978054] [2019-12-07 15:00:56,275 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:56,275 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:00:56,275 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2315128] [2019-12-07 15:00:56,275 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:00:56,275 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:56,276 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:00:56,276 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:56,276 INFO L87 Difference]: Start difference. First operand 556 states and 731 transitions. Second operand 3 states. [2019-12-07 15:00:56,332 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:56,333 INFO L93 Difference]: Finished difference Result 1454 states and 1913 transitions. [2019-12-07 15:00:56,333 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:00:56,333 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 50 [2019-12-07 15:00:56,334 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:56,337 INFO L225 Difference]: With dead ends: 1454 [2019-12-07 15:00:56,338 INFO L226 Difference]: Without dead ends: 968 [2019-12-07 15:00:56,339 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:56,340 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 968 states. [2019-12-07 15:00:56,369 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 968 to 926. [2019-12-07 15:00:56,370 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 926 states. [2019-12-07 15:00:56,372 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 926 states to 926 states and 1204 transitions. [2019-12-07 15:00:56,373 INFO L78 Accepts]: Start accepts. Automaton has 926 states and 1204 transitions. Word has length 50 [2019-12-07 15:00:56,373 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:56,373 INFO L462 AbstractCegarLoop]: Abstraction has 926 states and 1204 transitions. [2019-12-07 15:00:56,373 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:00:56,373 INFO L276 IsEmpty]: Start isEmpty. Operand 926 states and 1204 transitions. [2019-12-07 15:00:56,374 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2019-12-07 15:00:56,374 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:56,374 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:56,374 INFO L410 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:56,374 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:56,383 INFO L82 PathProgramCache]: Analyzing trace with hash 765911831, now seen corresponding path program 1 times [2019-12-07 15:00:56,383 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:56,383 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [773517886] [2019-12-07 15:00:56,383 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:56,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:56,409 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:56,409 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [773517886] [2019-12-07 15:00:56,410 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:56,410 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 15:00:56,410 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1523916939] [2019-12-07 15:00:56,410 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:00:56,411 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:56,411 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:00:56,411 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:56,411 INFO L87 Difference]: Start difference. First operand 926 states and 1204 transitions. Second operand 3 states. [2019-12-07 15:00:56,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:56,487 INFO L93 Difference]: Finished difference Result 2626 states and 3421 transitions. [2019-12-07 15:00:56,488 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:00:56,488 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 51 [2019-12-07 15:00:56,488 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:56,495 INFO L225 Difference]: With dead ends: 2626 [2019-12-07 15:00:56,495 INFO L226 Difference]: Without dead ends: 1750 [2019-12-07 15:00:56,496 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:56,498 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1750 states. [2019-12-07 15:00:56,542 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1750 to 1734. [2019-12-07 15:00:56,543 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 1734 states. [2019-12-07 15:00:56,547 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1734 states to 1734 states and 2234 transitions. [2019-12-07 15:00:56,547 INFO L78 Accepts]: Start accepts. Automaton has 1734 states and 2234 transitions. Word has length 51 [2019-12-07 15:00:56,547 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:56,547 INFO L462 AbstractCegarLoop]: Abstraction has 1734 states and 2234 transitions. [2019-12-07 15:00:56,547 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:00:56,547 INFO L276 IsEmpty]: Start isEmpty. Operand 1734 states and 2234 transitions. [2019-12-07 15:00:56,548 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 15:00:56,548 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:56,549 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:56,549 INFO L410 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:56,549 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:56,549 INFO L82 PathProgramCache]: Analyzing trace with hash -1533277321, now seen corresponding path program 1 times [2019-12-07 15:00:56,549 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:56,549 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1449724753] [2019-12-07 15:00:56,549 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:56,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:56,577 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:56,577 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1449724753] [2019-12-07 15:00:56,577 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:56,577 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:00:56,578 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1638099347] [2019-12-07 15:00:56,578 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:00:56,578 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:56,578 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:00:56,578 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:56,578 INFO L87 Difference]: Start difference. First operand 1734 states and 2234 transitions. Second operand 3 states. [2019-12-07 15:00:56,691 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:56,692 INFO L93 Difference]: Finished difference Result 5068 states and 6521 transitions. [2019-12-07 15:00:56,692 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:00:56,692 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 15:00:56,692 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:56,705 INFO L225 Difference]: With dead ends: 5068 [2019-12-07 15:00:56,705 INFO L226 Difference]: Without dead ends: 3402 [2019-12-07 15:00:56,707 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:56,711 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3402 states. [2019-12-07 15:00:56,796 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3402 to 3402. [2019-12-07 15:00:56,796 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3402 states. [2019-12-07 15:00:56,805 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3402 states to 3402 states and 4340 transitions. [2019-12-07 15:00:56,805 INFO L78 Accepts]: Start accepts. Automaton has 3402 states and 4340 transitions. Word has length 66 [2019-12-07 15:00:56,805 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:56,805 INFO L462 AbstractCegarLoop]: Abstraction has 3402 states and 4340 transitions. [2019-12-07 15:00:56,805 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:00:56,805 INFO L276 IsEmpty]: Start isEmpty. Operand 3402 states and 4340 transitions. [2019-12-07 15:00:56,807 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2019-12-07 15:00:56,808 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:56,808 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:56,808 INFO L410 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:56,808 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:56,808 INFO L82 PathProgramCache]: Analyzing trace with hash -883662481, now seen corresponding path program 1 times [2019-12-07 15:00:56,808 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:56,808 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1776520216] [2019-12-07 15:00:56,808 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:56,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:56,848 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2019-12-07 15:00:56,849 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1776520216] [2019-12-07 15:00:56,849 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:56,849 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:00:56,849 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [238037286] [2019-12-07 15:00:56,849 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:00:56,849 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:56,849 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:00:56,850 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:00:56,850 INFO L87 Difference]: Start difference. First operand 3402 states and 4340 transitions. Second operand 5 states. [2019-12-07 15:00:57,148 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:57,149 INFO L93 Difference]: Finished difference Result 10802 states and 13699 transitions. [2019-12-07 15:00:57,149 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 15:00:57,149 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 89 [2019-12-07 15:00:57,149 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:57,178 INFO L225 Difference]: With dead ends: 10802 [2019-12-07 15:00:57,178 INFO L226 Difference]: Without dead ends: 7492 [2019-12-07 15:00:57,182 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:00:57,190 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7492 states. [2019-12-07 15:00:57,343 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7492 to 3546. [2019-12-07 15:00:57,343 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3546 states. [2019-12-07 15:00:57,353 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3546 states to 3546 states and 4448 transitions. [2019-12-07 15:00:57,353 INFO L78 Accepts]: Start accepts. Automaton has 3546 states and 4448 transitions. Word has length 89 [2019-12-07 15:00:57,353 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:57,353 INFO L462 AbstractCegarLoop]: Abstraction has 3546 states and 4448 transitions. [2019-12-07 15:00:57,354 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:00:57,354 INFO L276 IsEmpty]: Start isEmpty. Operand 3546 states and 4448 transitions. [2019-12-07 15:00:57,356 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2019-12-07 15:00:57,356 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:57,356 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:57,356 INFO L410 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:57,356 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:57,356 INFO L82 PathProgramCache]: Analyzing trace with hash -305176077, now seen corresponding path program 1 times [2019-12-07 15:00:57,356 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:57,356 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1392127221] [2019-12-07 15:00:57,357 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:57,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:57,387 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2019-12-07 15:00:57,387 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1392127221] [2019-12-07 15:00:57,388 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:57,388 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:00:57,388 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1086213591] [2019-12-07 15:00:57,388 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:00:57,388 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:57,388 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:00:57,388 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:57,388 INFO L87 Difference]: Start difference. First operand 3546 states and 4448 transitions. Second operand 3 states. [2019-12-07 15:00:57,643 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:57,643 INFO L93 Difference]: Finished difference Result 10194 states and 12806 transitions. [2019-12-07 15:00:57,643 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:00:57,643 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 89 [2019-12-07 15:00:57,644 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:57,668 INFO L225 Difference]: With dead ends: 10194 [2019-12-07 15:00:57,668 INFO L226 Difference]: Without dead ends: 6712 [2019-12-07 15:00:57,671 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:57,677 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6712 states. [2019-12-07 15:00:57,863 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6712 to 6494. [2019-12-07 15:00:57,863 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6494 states. [2019-12-07 15:00:57,872 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6494 states to 6494 states and 8084 transitions. [2019-12-07 15:00:57,872 INFO L78 Accepts]: Start accepts. Automaton has 6494 states and 8084 transitions. Word has length 89 [2019-12-07 15:00:57,872 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:57,872 INFO L462 AbstractCegarLoop]: Abstraction has 6494 states and 8084 transitions. [2019-12-07 15:00:57,872 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:00:57,873 INFO L276 IsEmpty]: Start isEmpty. Operand 6494 states and 8084 transitions. [2019-12-07 15:00:57,875 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2019-12-07 15:00:57,875 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:57,875 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:57,876 INFO L410 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:57,876 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:57,876 INFO L82 PathProgramCache]: Analyzing trace with hash -1278665036, now seen corresponding path program 1 times [2019-12-07 15:00:57,876 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:57,876 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1012625373] [2019-12-07 15:00:57,876 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:57,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:57,907 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2019-12-07 15:00:57,907 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1012625373] [2019-12-07 15:00:57,907 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:57,907 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:00:57,907 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [435977314] [2019-12-07 15:00:57,907 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:00:57,907 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:57,908 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:00:57,908 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:00:57,908 INFO L87 Difference]: Start difference. First operand 6494 states and 8084 transitions. Second operand 5 states. [2019-12-07 15:00:58,203 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:58,203 INFO L93 Difference]: Finished difference Result 15348 states and 19199 transitions. [2019-12-07 15:00:58,203 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 15:00:58,204 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 89 [2019-12-07 15:00:58,204 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:58,229 INFO L225 Difference]: With dead ends: 15348 [2019-12-07 15:00:58,230 INFO L226 Difference]: Without dead ends: 8934 [2019-12-07 15:00:58,236 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:00:58,244 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8934 states. [2019-12-07 15:00:58,439 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8934 to 6542. [2019-12-07 15:00:58,439 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6542 states. [2019-12-07 15:00:58,445 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6542 states to 6542 states and 8000 transitions. [2019-12-07 15:00:58,446 INFO L78 Accepts]: Start accepts. Automaton has 6542 states and 8000 transitions. Word has length 89 [2019-12-07 15:00:58,446 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:58,446 INFO L462 AbstractCegarLoop]: Abstraction has 6542 states and 8000 transitions. [2019-12-07 15:00:58,446 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:00:58,446 INFO L276 IsEmpty]: Start isEmpty. Operand 6542 states and 8000 transitions. [2019-12-07 15:00:58,448 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2019-12-07 15:00:58,449 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:58,449 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:58,449 INFO L410 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:58,449 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:58,449 INFO L82 PathProgramCache]: Analyzing trace with hash 211800632, now seen corresponding path program 1 times [2019-12-07 15:00:58,449 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:58,449 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1664329051] [2019-12-07 15:00:58,450 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:58,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:58,474 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:58,474 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1664329051] [2019-12-07 15:00:58,475 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:58,475 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:00:58,475 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [938771626] [2019-12-07 15:00:58,475 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:00:58,475 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:58,475 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:00:58,475 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:58,475 INFO L87 Difference]: Start difference. First operand 6542 states and 8000 transitions. Second operand 3 states. [2019-12-07 15:00:58,695 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:58,695 INFO L93 Difference]: Finished difference Result 9812 states and 12049 transitions. [2019-12-07 15:00:58,696 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:00:58,696 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 89 [2019-12-07 15:00:58,696 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:58,704 INFO L225 Difference]: With dead ends: 9812 [2019-12-07 15:00:58,704 INFO L226 Difference]: Without dead ends: 6542 [2019-12-07 15:00:58,708 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:58,715 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6542 states. [2019-12-07 15:00:58,884 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6542 to 6512. [2019-12-07 15:00:58,885 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6512 states. [2019-12-07 15:00:58,889 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6512 states to 6512 states and 7866 transitions. [2019-12-07 15:00:58,890 INFO L78 Accepts]: Start accepts. Automaton has 6512 states and 7866 transitions. Word has length 89 [2019-12-07 15:00:58,890 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:58,890 INFO L462 AbstractCegarLoop]: Abstraction has 6512 states and 7866 transitions. [2019-12-07 15:00:58,890 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:00:58,890 INFO L276 IsEmpty]: Start isEmpty. Operand 6512 states and 7866 transitions. [2019-12-07 15:00:58,892 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2019-12-07 15:00:58,892 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:58,893 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:58,893 INFO L410 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:58,893 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:58,893 INFO L82 PathProgramCache]: Analyzing trace with hash -974468191, now seen corresponding path program 1 times [2019-12-07 15:00:58,893 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:58,893 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [508095175] [2019-12-07 15:00:58,893 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:58,899 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:58,920 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2019-12-07 15:00:58,921 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [508095175] [2019-12-07 15:00:58,921 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:58,921 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 15:00:58,921 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1799813313] [2019-12-07 15:00:58,921 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 15:00:58,922 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:58,922 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 15:00:58,922 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 15:00:58,922 INFO L87 Difference]: Start difference. First operand 6512 states and 7866 transitions. Second operand 5 states. [2019-12-07 15:00:59,184 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:59,184 INFO L93 Difference]: Finished difference Result 12634 states and 15323 transitions. [2019-12-07 15:00:59,184 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 15:00:59,184 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 90 [2019-12-07 15:00:59,184 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:59,192 INFO L225 Difference]: With dead ends: 12634 [2019-12-07 15:00:59,192 INFO L226 Difference]: Without dead ends: 6178 [2019-12-07 15:00:59,197 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-12-07 15:00:59,202 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6178 states. [2019-12-07 15:00:59,351 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6178 to 4920. [2019-12-07 15:00:59,351 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4920 states. [2019-12-07 15:00:59,355 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4920 states to 4920 states and 5854 transitions. [2019-12-07 15:00:59,355 INFO L78 Accepts]: Start accepts. Automaton has 4920 states and 5854 transitions. Word has length 90 [2019-12-07 15:00:59,355 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:59,356 INFO L462 AbstractCegarLoop]: Abstraction has 4920 states and 5854 transitions. [2019-12-07 15:00:59,356 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 15:00:59,356 INFO L276 IsEmpty]: Start isEmpty. Operand 4920 states and 5854 transitions. [2019-12-07 15:00:59,357 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2019-12-07 15:00:59,357 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:59,357 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:59,358 INFO L410 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:59,358 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:59,358 INFO L82 PathProgramCache]: Analyzing trace with hash 724986355, now seen corresponding path program 1 times [2019-12-07 15:00:59,358 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:59,358 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [253143281] [2019-12-07 15:00:59,358 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:59,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:59,384 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 16 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:00:59,385 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [253143281] [2019-12-07 15:00:59,385 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:59,385 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:00:59,385 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [559476785] [2019-12-07 15:00:59,385 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:00:59,385 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:59,385 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:00:59,386 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:59,386 INFO L87 Difference]: Start difference. First operand 4920 states and 5854 transitions. Second operand 3 states. [2019-12-07 15:00:59,535 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:59,535 INFO L93 Difference]: Finished difference Result 9778 states and 11642 transitions. [2019-12-07 15:00:59,536 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:00:59,536 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 92 [2019-12-07 15:00:59,536 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:59,540 INFO L225 Difference]: With dead ends: 9778 [2019-12-07 15:00:59,540 INFO L226 Difference]: Without dead ends: 4190 [2019-12-07 15:00:59,544 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:59,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4190 states. [2019-12-07 15:00:59,665 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4190 to 4186. [2019-12-07 15:00:59,666 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 4186 states. [2019-12-07 15:00:59,669 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4186 states to 4186 states and 4930 transitions. [2019-12-07 15:00:59,669 INFO L78 Accepts]: Start accepts. Automaton has 4186 states and 4930 transitions. Word has length 92 [2019-12-07 15:00:59,669 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:00:59,669 INFO L462 AbstractCegarLoop]: Abstraction has 4186 states and 4930 transitions. [2019-12-07 15:00:59,669 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:00:59,669 INFO L276 IsEmpty]: Start isEmpty. Operand 4186 states and 4930 transitions. [2019-12-07 15:00:59,670 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2019-12-07 15:00:59,670 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:00:59,671 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:00:59,671 INFO L410 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:00:59,671 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:00:59,671 INFO L82 PathProgramCache]: Analyzing trace with hash 2141342848, now seen corresponding path program 1 times [2019-12-07 15:00:59,671 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:00:59,671 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [9199110] [2019-12-07 15:00:59,671 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:00:59,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:00:59,692 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2019-12-07 15:00:59,693 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [9199110] [2019-12-07 15:00:59,693 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:00:59,693 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:00:59,693 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1261206099] [2019-12-07 15:00:59,693 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:00:59,693 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:00:59,693 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:00:59,694 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:59,694 INFO L87 Difference]: Start difference. First operand 4186 states and 4930 transitions. Second operand 3 states. [2019-12-07 15:00:59,907 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:00:59,907 INFO L93 Difference]: Finished difference Result 8752 states and 10233 transitions. [2019-12-07 15:00:59,908 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:00:59,908 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 116 [2019-12-07 15:00:59,908 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:00:59,911 INFO L225 Difference]: With dead ends: 8752 [2019-12-07 15:00:59,911 INFO L226 Difference]: Without dead ends: 2868 [2019-12-07 15:00:59,916 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:00:59,919 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2868 states. [2019-12-07 15:01:00,037 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2868 to 2790. [2019-12-07 15:01:00,037 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2790 states. [2019-12-07 15:01:00,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2790 states to 2790 states and 3146 transitions. [2019-12-07 15:01:00,039 INFO L78 Accepts]: Start accepts. Automaton has 2790 states and 3146 transitions. Word has length 116 [2019-12-07 15:01:00,039 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:01:00,039 INFO L462 AbstractCegarLoop]: Abstraction has 2790 states and 3146 transitions. [2019-12-07 15:01:00,039 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:01:00,039 INFO L276 IsEmpty]: Start isEmpty. Operand 2790 states and 3146 transitions. [2019-12-07 15:01:00,041 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2019-12-07 15:01:00,041 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:01:00,041 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:01:00,041 INFO L410 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:01:00,041 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:01:00,041 INFO L82 PathProgramCache]: Analyzing trace with hash 1717534558, now seen corresponding path program 1 times [2019-12-07 15:01:00,041 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:01:00,041 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1474985112] [2019-12-07 15:01:00,041 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:01:00,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 15:01:00,067 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 16 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 15:01:00,067 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1474985112] [2019-12-07 15:01:00,067 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 15:01:00,067 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 15:01:00,067 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1914229624] [2019-12-07 15:01:00,067 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 15:01:00,067 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 15:01:00,068 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 15:01:00,068 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:01:00,068 INFO L87 Difference]: Start difference. First operand 2790 states and 3146 transitions. Second operand 3 states. [2019-12-07 15:01:00,151 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 15:01:00,151 INFO L93 Difference]: Finished difference Result 3172 states and 3583 transitions. [2019-12-07 15:01:00,152 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 15:01:00,152 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 117 [2019-12-07 15:01:00,152 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 15:01:00,154 INFO L225 Difference]: With dead ends: 3172 [2019-12-07 15:01:00,155 INFO L226 Difference]: Without dead ends: 2470 [2019-12-07 15:01:00,156 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 15:01:00,158 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2470 states. [2019-12-07 15:01:00,230 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2470 to 2470. [2019-12-07 15:01:00,230 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 2470 states. [2019-12-07 15:01:00,232 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2470 states to 2470 states and 2766 transitions. [2019-12-07 15:01:00,232 INFO L78 Accepts]: Start accepts. Automaton has 2470 states and 2766 transitions. Word has length 117 [2019-12-07 15:01:00,232 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 15:01:00,232 INFO L462 AbstractCegarLoop]: Abstraction has 2470 states and 2766 transitions. [2019-12-07 15:01:00,232 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 15:01:00,233 INFO L276 IsEmpty]: Start isEmpty. Operand 2470 states and 2766 transitions. [2019-12-07 15:01:00,234 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2019-12-07 15:01:00,234 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 15:01:00,234 INFO L410 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 15:01:00,234 INFO L410 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 15:01:00,234 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 15:01:00,234 INFO L82 PathProgramCache]: Analyzing trace with hash -692010475, now seen corresponding path program 1 times [2019-12-07 15:01:00,235 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 15:01:00,235 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [113841910] [2019-12-07 15:01:00,235 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 15:01:00,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 15:01:00,253 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 15:01:00,282 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 15:01:00,282 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 15:01:00,344 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 03:01:00 BoogieIcfgContainer [2019-12-07 15:01:00,345 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 15:01:00,345 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 15:01:00,345 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 15:01:00,345 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 15:01:00,345 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 03:00:55" (3/4) ... [2019-12-07 15:01:00,347 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 15:01:00,413 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_4ee22f5a-a2fb-4c1f-b2c8-88e5f96f17a9/bin/uautomizer/witness.graphml [2019-12-07 15:01:00,413 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 15:01:00,414 INFO L168 Benchmark]: Toolchain (without parser) took 5627.85 ms. Allocated memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: 477.1 MB). Free memory was 938.0 MB in the beginning and 1.2 GB in the end (delta: -214.6 MB). Peak memory consumption was 262.5 MB. Max. memory is 11.5 GB. [2019-12-07 15:01:00,415 INFO L168 Benchmark]: CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 955.4 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 15:01:00,415 INFO L168 Benchmark]: CACSL2BoogieTranslator took 227.80 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 125.3 MB). Free memory was 938.0 MB in the beginning and 1.1 GB in the end (delta: -182.2 MB). Peak memory consumption was 28.3 MB. Max. memory is 11.5 GB. [2019-12-07 15:01:00,415 INFO L168 Benchmark]: Boogie Procedure Inliner took 35.28 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. [2019-12-07 15:01:00,415 INFO L168 Benchmark]: Boogie Preprocessor took 27.86 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 15:01:00,416 INFO L168 Benchmark]: RCFGBuilder took 396.63 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 55.1 MB). Peak memory consumption was 55.1 MB. Max. memory is 11.5 GB. [2019-12-07 15:01:00,416 INFO L168 Benchmark]: TraceAbstraction took 4868.72 ms. Allocated memory was 1.2 GB in the beginning and 1.5 GB in the end (delta: 351.8 MB). Free memory was 1.1 GB in the beginning and 1.2 GB in the end (delta: -110.9 MB). Peak memory consumption was 240.9 MB. Max. memory is 11.5 GB. [2019-12-07 15:01:00,416 INFO L168 Benchmark]: Witness Printer took 68.36 ms. Allocated memory is still 1.5 GB. Free memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 16.7 MB). Peak memory consumption was 16.7 MB. Max. memory is 11.5 GB. [2019-12-07 15:01:00,417 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19 ms. Allocated memory is still 1.0 GB. Free memory is still 955.4 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 227.80 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 125.3 MB). Free memory was 938.0 MB in the beginning and 1.1 GB in the end (delta: -182.2 MB). Peak memory consumption was 28.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 35.28 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 6.7 MB). Peak memory consumption was 6.7 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 27.86 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 396.63 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 55.1 MB). Peak memory consumption was 55.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 4868.72 ms. Allocated memory was 1.2 GB in the beginning and 1.5 GB in the end (delta: 351.8 MB). Free memory was 1.1 GB in the beginning and 1.2 GB in the end (delta: -110.9 MB). Peak memory consumption was 240.9 MB. Max. memory is 11.5 GB. * Witness Printer took 68.36 ms. Allocated memory is still 1.5 GB. Free memory was 1.2 GB in the beginning and 1.2 GB in the end (delta: 16.7 MB). Peak memory consumption was 16.7 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 11]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L15] int m_pc = 0; [L16] int t1_pc = 0; [L17] int t2_pc = 0; [L18] int m_st ; [L19] int t1_st ; [L20] int t2_st ; [L21] int m_i ; [L22] int t1_i ; [L23] int t2_i ; [L24] int M_E = 2; [L25] int T1_E = 2; [L26] int T2_E = 2; [L27] int E_1 = 2; [L28] int E_2 = 2; VAL [E_1=2, E_2=2, M_E=2, m_i=0, m_pc=0, m_st=0, T1_E=2, t1_i=0, t1_pc=0, t1_st=0, T2_E=2, t2_i=0, t2_pc=0, t2_st=0] [L563] int __retres1 ; [L477] m_i = 1 [L478] t1_i = 1 [L479] t2_i = 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L504] int kernel_st ; [L505] int tmp ; [L506] int tmp___0 ; [L510] kernel_st = 0 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L211] COND TRUE m_i == 1 [L212] m_st = 0 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L216] COND TRUE t1_i == 1 [L217] t1_st = 0 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L221] COND TRUE t2_i == 1 [L222] t2_st = 0 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L324] COND FALSE !(M_E == 0) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L329] COND FALSE !(T1_E == 0) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L334] COND FALSE !(T2_E == 0) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L339] COND FALSE !(E_1 == 0) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L344] COND FALSE !(E_2 == 0) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L387] int tmp ; [L388] int tmp___0 ; [L389] int tmp___1 ; [L143] int __retres1 ; VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L146] COND FALSE !(m_pc == 1) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L156] __retres1 = 0 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L158] return (__retres1); VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L393] tmp = is_master_triggered() [L395] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L162] int __retres1 ; VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L165] COND FALSE !(t1_pc == 1) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L175] __retres1 = 0 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L177] return (__retres1); VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L401] tmp___0 = is_transmit1_triggered() [L403] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L181] int __retres1 ; VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L184] COND FALSE !(t2_pc == 1) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L194] __retres1 = 0 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L196] return (__retres1); VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L409] tmp___1 = is_transmit2_triggered() [L411] COND FALSE !(\read(tmp___1)) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L357] COND FALSE !(M_E == 1) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L362] COND FALSE !(T1_E == 1) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L367] COND FALSE !(T2_E == 1) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L372] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L377] COND FALSE !(E_2 == 1) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L518] COND TRUE 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L521] kernel_st = 1 [L257] int tmp ; VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L261] COND TRUE 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L231] int __retres1 ; VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L234] COND TRUE m_st == 0 [L235] __retres1 = 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L252] return (__retres1); VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L264] tmp = exists_runnable_thread() [L266] COND TRUE \read(tmp) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L271] COND TRUE m_st == 0 [L272] int tmp_ndt_1; [L273] tmp_ndt_1 = __VERIFIER_nondet_int() [L274] COND FALSE !(\read(tmp_ndt_1)) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=0, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L285] COND TRUE t1_st == 0 [L286] int tmp_ndt_2; [L287] tmp_ndt_2 = __VERIFIER_nondet_int() [L288] COND TRUE \read(tmp_ndt_2) [L290] t1_st = 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L78] COND TRUE t1_pc == 0 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L89] COND TRUE 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=0, t1_st=1, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L91] t1_pc = 1 [L92] t1_st = 2 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=0] [L299] COND TRUE t2_st == 0 [L300] int tmp_ndt_3; [L301] tmp_ndt_3 = __VERIFIER_nondet_int() [L302] COND TRUE \read(tmp_ndt_3) [L304] t2_st = 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1] [L113] COND TRUE t2_pc == 0 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1] [L124] COND TRUE 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=0, t2_st=1] [L126] t2_pc = 1 [L127] t2_st = 2 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L261] COND TRUE 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L231] int __retres1 ; VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L234] COND TRUE m_st == 0 [L235] __retres1 = 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L252] return (__retres1); VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L264] tmp = exists_runnable_thread() [L266] COND TRUE \read(tmp) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=0, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L271] COND TRUE m_st == 0 [L272] int tmp_ndt_1; [L273] tmp_ndt_1 = __VERIFIER_nondet_int() [L274] COND TRUE \read(tmp_ndt_1) [L276] m_st = 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L37] COND TRUE m_pc == 0 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L48] COND TRUE 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L51] E_1 = 1 [L387] int tmp ; [L388] int tmp___0 ; [L389] int tmp___1 ; [L143] int __retres1 ; VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L146] COND FALSE !(m_pc == 1) VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L156] __retres1 = 0 VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L158] return (__retres1); VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L393] tmp = is_master_triggered() [L395] COND FALSE !(\read(tmp)) VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L162] int __retres1 ; VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L165] COND TRUE t1_pc == 1 VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L166] COND TRUE E_1 == 1 [L167] __retres1 = 1 VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L177] return (__retres1); VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L401] tmp___0 = is_transmit1_triggered() [L403] COND TRUE \read(tmp___0) [L404] t1_st = 0 VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L181] int __retres1 ; VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L184] COND TRUE t2_pc == 1 VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L185] COND FALSE !(E_2 == 1) VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L194] __retres1 = 0 VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L196] return (__retres1); VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L409] tmp___1 = is_transmit2_triggered() [L411] COND FALSE !(\read(tmp___1)) VAL [E_1=1, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L53] E_1 = 2 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L56] COND TRUE 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=0, m_st=1, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L58] m_pc = 1 [L59] m_st = 2 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=0, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L285] COND TRUE t1_st == 0 [L286] int tmp_ndt_2; [L287] tmp_ndt_2 = __VERIFIER_nondet_int() [L288] COND TRUE \read(tmp_ndt_2) [L290] t1_st = 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L78] COND FALSE !(t1_pc == 0) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L81] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L97] E_2 = 1 [L387] int tmp ; [L388] int tmp___0 ; [L389] int tmp___1 ; [L143] int __retres1 ; VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L146] COND TRUE m_pc == 1 VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L147] COND FALSE !(M_E == 1) VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L156] __retres1 = 0 VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L158] return (__retres1); VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L393] tmp = is_master_triggered() [L395] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L162] int __retres1 ; VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L165] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L166] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L175] __retres1 = 0 VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L177] return (__retres1); VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L401] tmp___0 = is_transmit1_triggered() [L403] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L181] int __retres1 ; VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L184] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L185] COND TRUE E_2 == 1 [L186] __retres1 = 1 VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L196] return (__retres1); VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=2] [L409] tmp___1 = is_transmit2_triggered() [L411] COND TRUE \read(tmp___1) [L412] t2_st = 0 VAL [E_1=2, E_2=1, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0] [L99] E_2 = 2 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0] [L89] COND TRUE 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=1, T2_E=2, t2_i=1, t2_pc=1, t2_st=0] [L91] t1_pc = 1 [L92] t1_st = 2 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=0] [L299] COND TRUE t2_st == 0 [L300] int tmp_ndt_3; [L301] tmp_ndt_3 = __VERIFIER_nondet_int() [L302] COND TRUE \read(tmp_ndt_3) [L304] t2_st = 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1] [L113] COND FALSE !(t2_pc == 0) VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1] [L116] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1] [L11] __VERIFIER_error() VAL [E_1=2, E_2=2, M_E=2, m_i=1, m_pc=1, m_st=2, T1_E=2, t1_i=1, t1_pc=1, t1_st=2, T2_E=2, t2_i=1, t2_pc=1, t2_st=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 192 locations, 1 error locations. Result: UNSAFE, OverallTime: 4.7s, OverallIterations: 19, TraceHistogramMax: 2, AutomataDifference: 2.4s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 5274 SDtfs, 4949 SDslu, 4000 SDs, 0 SdLazy, 329 SolverSat, 161 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 66 GetRequests, 36 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=6542occurred in iteration=13, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 1.5s AutomataMinimizationTime, 18 MinimizatonAttempts, 8022 StatesRemovedByMinimization, 11 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.1s SatisfiabilityAnalysisTime, 0.3s InterpolantComputationTime, 1399 NumberOfCodeBlocks, 1399 NumberOfCodeBlocksAsserted, 19 NumberOfCheckSat, 1263 ConstructedInterpolants, 0 QuantifiedInterpolants, 148665 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 18 InterpolantComputations, 18 PerfectInterpolantSequences, 126/126 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...