./Ultimate.py --spec ../../sv-benchmarks/c/properties/termination.prp --file ../../sv-benchmarks/c/termination-restricted-15/NO_22.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/config/AutomizerTermination.xml -i ../../sv-benchmarks/c/termination-restricted-15/NO_22.c -s /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 4e32f3b75457895ed6b80ddc53a00ac44a497e1b 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Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM) --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 12:21:24,227 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 12:21:24,228 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 12:21:24,236 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 12:21:24,237 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 12:21:24,237 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 12:21:24,238 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 12:21:24,240 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 12:21:24,242 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 12:21:24,243 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 12:21:24,243 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 12:21:24,244 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 12:21:24,245 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 12:21:24,245 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 12:21:24,246 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 12:21:24,247 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 12:21:24,248 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 12:21:24,249 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 12:21:24,251 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 12:21:24,252 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 12:21:24,254 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 12:21:24,255 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 12:21:24,256 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 12:21:24,256 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 12:21:24,258 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 12:21:24,258 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 12:21:24,258 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 12:21:24,259 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 12:21:24,259 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 12:21:24,260 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 12:21:24,260 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 12:21:24,261 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 12:21:24,261 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 12:21:24,262 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 12:21:24,263 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 12:21:24,263 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 12:21:24,263 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 12:21:24,263 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 12:21:24,264 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 12:21:24,264 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 12:21:24,265 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 12:21:24,265 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/config/svcomp-Termination-64bit-Automizer_Default.epf [2019-12-07 12:21:24,277 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 12:21:24,277 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 12:21:24,278 INFO L136 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2019-12-07 12:21:24,278 INFO L138 SettingsManager]: * Create parallel compositions if possible=false [2019-12-07 12:21:24,278 INFO L138 SettingsManager]: * Use SBE=true [2019-12-07 12:21:24,278 INFO L136 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2019-12-07 12:21:24,278 INFO L138 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2019-12-07 12:21:24,278 INFO L138 SettingsManager]: * Use old map elimination=false [2019-12-07 12:21:24,278 INFO L138 SettingsManager]: * Use external solver (rank synthesis)=false [2019-12-07 12:21:24,278 INFO L138 SettingsManager]: * Use only trivial implications for array writes=true [2019-12-07 12:21:24,279 INFO L138 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2019-12-07 12:21:24,279 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 12:21:24,279 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2019-12-07 12:21:24,279 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 12:21:24,279 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 12:21:24,279 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2019-12-07 12:21:24,279 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2019-12-07 12:21:24,280 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2019-12-07 12:21:24,280 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 12:21:24,280 INFO L138 SettingsManager]: * Assume nondeterminstic values are in range=false [2019-12-07 12:21:24,280 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 12:21:24,280 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2019-12-07 12:21:24,280 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 12:21:24,280 INFO L138 SettingsManager]: * Size of a code block=SequenceOfStatements [2019-12-07 12:21:24,280 INFO L138 SettingsManager]: * To the following directory=/home/matthias/ultimate/dump [2019-12-07 12:21:24,281 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 12:21:24,281 INFO L138 SettingsManager]: * Trace refinement strategy=CAMEL [2019-12-07 12:21:24,281 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 12:21:24,281 INFO L138 SettingsManager]: * Dump automata to the following directory=/home/matthias/ultimate/dump/auto [2019-12-07 12:21:24,281 INFO L136 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2019-12-07 12:21:24,282 INFO L138 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 4e32f3b75457895ed6b80ddc53a00ac44a497e1b [2019-12-07 12:21:24,379 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 12:21:24,387 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 12:21:24,389 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 12:21:24,390 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 12:21:24,390 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 12:21:24,391 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/../../sv-benchmarks/c/termination-restricted-15/NO_22.c [2019-12-07 12:21:24,427 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/data/3a1e72a25/3cc8f5c63f174c549140595a01b5f460/FLAGd935b0348 [2019-12-07 12:21:24,751 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 12:21:24,752 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/sv-benchmarks/c/termination-restricted-15/NO_22.c [2019-12-07 12:21:24,755 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/data/3a1e72a25/3cc8f5c63f174c549140595a01b5f460/FLAGd935b0348 [2019-12-07 12:21:25,181 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/data/3a1e72a25/3cc8f5c63f174c549140595a01b5f460 [2019-12-07 12:21:25,183 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 12:21:25,185 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 12:21:25,185 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 12:21:25,186 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 12:21:25,189 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 12:21:25,189 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 12:21:25" (1/1) ... [2019-12-07 12:21:25,191 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@22ca5edf and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:21:25, skipping insertion in model container [2019-12-07 12:21:25,192 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 12:21:25" (1/1) ... [2019-12-07 12:21:25,197 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 12:21:25,208 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 12:21:25,301 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 12:21:25,304 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 12:21:25,312 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 12:21:25,352 INFO L208 MainTranslator]: Completed translation [2019-12-07 12:21:25,352 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:21:25 WrapperNode [2019-12-07 12:21:25,352 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 12:21:25,353 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 12:21:25,353 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 12:21:25,353 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 12:21:25,359 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:21:25" (1/1) ... [2019-12-07 12:21:25,362 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:21:25" (1/1) ... [2019-12-07 12:21:25,374 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 12:21:25,374 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 12:21:25,374 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 12:21:25,374 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 12:21:25,380 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:21:25" (1/1) ... [2019-12-07 12:21:25,380 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:21:25" (1/1) ... [2019-12-07 12:21:25,381 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:21:25" (1/1) ... [2019-12-07 12:21:25,381 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:21:25" (1/1) ... [2019-12-07 12:21:25,382 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:21:25" (1/1) ... [2019-12-07 12:21:25,385 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:21:25" (1/1) ... [2019-12-07 12:21:25,385 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:21:25" (1/1) ... [2019-12-07 12:21:25,386 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 12:21:25,386 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 12:21:25,386 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 12:21:25,386 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 12:21:25,387 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:21:25" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-12-07 12:21:25,427 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 12:21:25,427 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 12:21:25,510 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 12:21:25,511 INFO L287 CfgBuilder]: Removed 5 assume(true) statements. [2019-12-07 12:21:25,511 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:21:25 BoogieIcfgContainer [2019-12-07 12:21:25,511 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 12:21:25,512 INFO L113 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2019-12-07 12:21:25,512 INFO L271 PluginConnector]: Initializing BuchiAutomizer... [2019-12-07 12:21:25,514 INFO L275 PluginConnector]: BuchiAutomizer initialized [2019-12-07 12:21:25,515 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2019-12-07 12:21:25,515 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 07.12 12:21:25" (1/3) ... [2019-12-07 12:21:25,515 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4be8ad70 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 07.12 12:21:25, skipping insertion in model container [2019-12-07 12:21:25,515 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2019-12-07 12:21:25,516 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 12:21:25" (2/3) ... [2019-12-07 12:21:25,516 INFO L205 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4be8ad70 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 07.12 12:21:25, skipping insertion in model container [2019-12-07 12:21:25,516 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2019-12-07 12:21:25,516 INFO L185 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:21:25" (3/3) ... [2019-12-07 12:21:25,517 INFO L371 chiAutomizerObserver]: Analyzing ICFG NO_22.c [2019-12-07 12:21:25,547 INFO L356 BuchiCegarLoop]: Interprodecural is true [2019-12-07 12:21:25,547 INFO L357 BuchiCegarLoop]: Hoare is false [2019-12-07 12:21:25,547 INFO L358 BuchiCegarLoop]: Compute interpolants for ForwardPredicates [2019-12-07 12:21:25,547 INFO L359 BuchiCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 12:21:25,547 INFO L360 BuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 12:21:25,548 INFO L361 BuchiCegarLoop]: Difference is false [2019-12-07 12:21:25,548 INFO L362 BuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 12:21:25,548 INFO L365 BuchiCegarLoop]: ======== Iteration 0==of CEGAR loop == BuchiCegarLoop======== [2019-12-07 12:21:25,556 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 7 states. [2019-12-07 12:21:25,569 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2019-12-07 12:21:25,570 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:25,570 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:25,574 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1] [2019-12-07 12:21:25,574 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2019-12-07 12:21:25,574 INFO L424 BuchiCegarLoop]: ======== Iteration 1============ [2019-12-07 12:21:25,574 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 7 states. [2019-12-07 12:21:25,575 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2019-12-07 12:21:25,575 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:25,575 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:25,575 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1] [2019-12-07 12:21:25,575 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2019-12-07 12:21:25,580 INFO L794 eck$LassoCheckResult]: Stem: 4#ULTIMATE.startENTRYtrue havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 7#L10-2true [2019-12-07 12:21:25,580 INFO L796 eck$LassoCheckResult]: Loop: 7#L10-2true assume !!(main_~i~0 < 100); 3#L10true assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7#L10-2true [2019-12-07 12:21:25,584 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:25,584 INFO L82 PathProgramCache]: Analyzing trace with hash 32, now seen corresponding path program 1 times [2019-12-07 12:21:25,590 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:25,590 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1773274850] [2019-12-07 12:21:25,590 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:25,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:25,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:25,665 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:25,666 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:25,666 INFO L82 PathProgramCache]: Analyzing trace with hash 1284, now seen corresponding path program 1 times [2019-12-07 12:21:25,666 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:25,666 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1952080748] [2019-12-07 12:21:25,666 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:25,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:25,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:25,675 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:25,676 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:25,676 INFO L82 PathProgramCache]: Analyzing trace with hash 31075, now seen corresponding path program 1 times [2019-12-07 12:21:25,677 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:25,677 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [27312930] [2019-12-07 12:21:25,677 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:25,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:25,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:25,684 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:25,718 INFO L210 LassoAnalysis]: Preferences: [2019-12-07 12:21:25,719 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2019-12-07 12:21:25,719 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2019-12-07 12:21:25,719 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2019-12-07 12:21:25,719 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2019-12-07 12:21:25,719 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-12-07 12:21:25,719 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2019-12-07 12:21:25,719 INFO L132 ssoRankerPreferences]: Path of dumped script: [2019-12-07 12:21:25,720 INFO L133 ssoRankerPreferences]: Filename of dumped script: NO_22.c_Iteration1_Loop [2019-12-07 12:21:25,720 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2019-12-07 12:21:25,720 INFO L274 LassoAnalysis]: Starting lasso preprocessing... [2019-12-07 12:21:25,739 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-12-07 12:21:25,748 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-12-07 12:21:25,752 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-12-07 12:21:25,805 INFO L292 LassoAnalysis]: Preprocessing complete. [2019-12-07 12:21:25,806 INFO L404 LassoAnalysis]: Checking for nontermination... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 2 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-12-07 12:21:25,810 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2019-12-07 12:21:25,810 INFO L160 nArgumentSynthesizer]: Using integer mode. [2019-12-07 12:21:25,818 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2019-12-07 12:21:25,818 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {v_rep~unnamed0~0~true_1=1} Honda state: {v_rep~unnamed0~0~true_1=1} Generalized eigenvectors: [] Lambdas: [] Nus: [] No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 3 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-12-07 12:21:25,823 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2019-12-07 12:21:25,823 INFO L160 nArgumentSynthesizer]: Using integer mode. [2019-12-07 12:21:25,826 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2019-12-07 12:21:25,827 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {v_rep~unnamed0~0~false_1=0} Honda state: {v_rep~unnamed0~0~false_1=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 4 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-12-07 12:21:25,830 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2019-12-07 12:21:25,830 INFO L160 nArgumentSynthesizer]: Using integer mode. No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 5 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-12-07 12:21:25,837 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2019-12-07 12:21:25,837 INFO L160 nArgumentSynthesizer]: Using integer mode. [2019-12-07 12:21:25,844 INFO L444 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2019-12-07 12:21:25,845 INFO L210 LassoAnalysis]: Preferences: [2019-12-07 12:21:25,845 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2019-12-07 12:21:25,845 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2019-12-07 12:21:25,845 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2019-12-07 12:21:25,845 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2019-12-07 12:21:25,846 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-12-07 12:21:25,846 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2019-12-07 12:21:25,846 INFO L132 ssoRankerPreferences]: Path of dumped script: [2019-12-07 12:21:25,846 INFO L133 ssoRankerPreferences]: Filename of dumped script: NO_22.c_Iteration1_Loop [2019-12-07 12:21:25,846 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2019-12-07 12:21:25,846 INFO L274 LassoAnalysis]: Starting lasso preprocessing... [2019-12-07 12:21:25,847 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-12-07 12:21:25,850 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-12-07 12:21:25,857 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-12-07 12:21:25,890 INFO L292 LassoAnalysis]: Preprocessing complete. [2019-12-07 12:21:25,895 INFO L489 LassoAnalysis]: Using template 'affine'. No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 6 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-12-07 12:21:25,899 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2019-12-07 12:21:25,900 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2019-12-07 12:21:25,901 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2019-12-07 12:21:25,901 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2019-12-07 12:21:25,901 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2019-12-07 12:21:25,905 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2019-12-07 12:21:25,905 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2019-12-07 12:21:25,909 INFO L522 LassoAnalysis]: Proving termination failed for this template and these settings. No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 7 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-12-07 12:21:25,913 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2019-12-07 12:21:25,914 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2019-12-07 12:21:25,914 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2019-12-07 12:21:25,915 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2019-12-07 12:21:25,915 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2019-12-07 12:21:25,915 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2019-12-07 12:21:25,916 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2019-12-07 12:21:25,916 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2019-12-07 12:21:25,918 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2019-12-07 12:21:25,921 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2019-12-07 12:21:25,921 INFO L444 ModelExtractionUtils]: 0 out of 3 variables were initially zero. Simplification set additionally 0 variables to zero. No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 8 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-12-07 12:21:25,925 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2019-12-07 12:21:25,926 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2019-12-07 12:21:25,926 INFO L510 LassoAnalysis]: Proved termination. [2019-12-07 12:21:25,926 INFO L512 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0) = -2*ULTIMATE.start_main_~i~0 + 99 Supporting invariants [] [2019-12-07 12:21:25,929 INFO L297 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2019-12-07 12:21:25,950 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:25,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:25,957 WARN L262 TraceCheckSpWp]: Trace formula consists of 4 conjuncts, 2 conjunts are in the unsatisfiable core [2019-12-07 12:21:25,958 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:25,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:25,965 WARN L262 TraceCheckSpWp]: Trace formula consists of 6 conjuncts, 4 conjunts are in the unsatisfiable core [2019-12-07 12:21:25,965 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:25,967 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:21:25,977 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 1 loop predicates [2019-12-07 12:21:25,978 INFO L72 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 7 states. Second operand 3 states. [2019-12-07 12:21:26,006 INFO L76 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 7 states.. Second operand 3 states. Result 23 states and 30 transitions. Complement of second has 6 states. [2019-12-07 12:21:26,007 INFO L142 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2019-12-07 12:21:26,008 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2019-12-07 12:21:26,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 11 transitions. [2019-12-07 12:21:26,009 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 11 transitions. Stem has 1 letters. Loop has 2 letters. [2019-12-07 12:21:26,010 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2019-12-07 12:21:26,010 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 11 transitions. Stem has 3 letters. Loop has 2 letters. [2019-12-07 12:21:26,010 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2019-12-07 12:21:26,010 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 11 transitions. Stem has 1 letters. Loop has 4 letters. [2019-12-07 12:21:26,010 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2019-12-07 12:21:26,011 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 23 states and 30 transitions. [2019-12-07 12:21:26,012 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2019-12-07 12:21:26,015 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 23 states to 7 states and 10 transitions. [2019-12-07 12:21:26,015 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 4 [2019-12-07 12:21:26,015 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 5 [2019-12-07 12:21:26,016 INFO L73 IsDeterministic]: Start isDeterministic. Operand 7 states and 10 transitions. [2019-12-07 12:21:26,016 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:26,016 INFO L688 BuchiCegarLoop]: Abstraction has 7 states and 10 transitions. [2019-12-07 12:21:26,026 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7 states and 10 transitions. [2019-12-07 12:21:26,031 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7 to 7. [2019-12-07 12:21:26,032 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 7 states. [2019-12-07 12:21:26,032 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7 states to 7 states and 10 transitions. [2019-12-07 12:21:26,032 INFO L711 BuchiCegarLoop]: Abstraction has 7 states and 10 transitions. [2019-12-07 12:21:26,033 INFO L591 BuchiCegarLoop]: Abstraction has 7 states and 10 transitions. [2019-12-07 12:21:26,033 INFO L424 BuchiCegarLoop]: ======== Iteration 2============ [2019-12-07 12:21:26,033 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 7 states and 10 transitions. [2019-12-07 12:21:26,033 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2019-12-07 12:21:26,033 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:26,033 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:26,033 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [1, 1, 1] [2019-12-07 12:21:26,034 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2019-12-07 12:21:26,034 INFO L794 eck$LassoCheckResult]: Stem: 67#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 68#L10-2 assume !!(main_~i~0 < 100); 63#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 64#L10-2 [2019-12-07 12:21:26,034 INFO L796 eck$LassoCheckResult]: Loop: 64#L10-2 assume !!(main_~i~0 < 100); 69#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 64#L10-2 [2019-12-07 12:21:26,034 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:26,034 INFO L82 PathProgramCache]: Analyzing trace with hash 31077, now seen corresponding path program 1 times [2019-12-07 12:21:26,034 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:26,034 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1548818251] [2019-12-07 12:21:26,034 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:26,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:26,054 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:21:26,054 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1548818251] [2019-12-07 12:21:26,055 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 12:21:26,055 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 12:21:26,056 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [27661076] [2019-12-07 12:21:26,058 INFO L799 eck$LassoCheckResult]: stem already infeasible [2019-12-07 12:21:26,058 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:26,058 INFO L82 PathProgramCache]: Analyzing trace with hash 1284, now seen corresponding path program 2 times [2019-12-07 12:21:26,058 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:26,058 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1364503082] [2019-12-07 12:21:26,058 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:26,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:26,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:26,063 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:26,081 INFO L210 LassoAnalysis]: Preferences: [2019-12-07 12:21:26,081 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2019-12-07 12:21:26,081 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2019-12-07 12:21:26,081 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2019-12-07 12:21:26,081 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2019-12-07 12:21:26,081 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-12-07 12:21:26,081 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2019-12-07 12:21:26,082 INFO L132 ssoRankerPreferences]: Path of dumped script: [2019-12-07 12:21:26,082 INFO L133 ssoRankerPreferences]: Filename of dumped script: NO_22.c_Iteration2_Loop [2019-12-07 12:21:26,082 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2019-12-07 12:21:26,082 INFO L274 LassoAnalysis]: Starting lasso preprocessing... [2019-12-07 12:21:26,083 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-12-07 12:21:26,085 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-12-07 12:21:26,090 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-12-07 12:21:26,118 INFO L292 LassoAnalysis]: Preprocessing complete. [2019-12-07 12:21:26,119 INFO L404 LassoAnalysis]: Checking for nontermination... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 9 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-12-07 12:21:26,121 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2019-12-07 12:21:26,121 INFO L160 nArgumentSynthesizer]: Using integer mode. [2019-12-07 12:21:26,125 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2019-12-07 12:21:26,125 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {v_rep~unnamed0~0~false_3=0} Honda state: {v_rep~unnamed0~0~false_3=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 10 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-12-07 12:21:26,129 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2019-12-07 12:21:26,129 INFO L160 nArgumentSynthesizer]: Using integer mode. No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 11 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-12-07 12:21:26,136 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2019-12-07 12:21:26,136 INFO L160 nArgumentSynthesizer]: Using integer mode. [2019-12-07 12:21:26,143 INFO L444 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2019-12-07 12:21:26,144 INFO L210 LassoAnalysis]: Preferences: [2019-12-07 12:21:26,145 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2019-12-07 12:21:26,145 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2019-12-07 12:21:26,145 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2019-12-07 12:21:26,145 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2019-12-07 12:21:26,145 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-12-07 12:21:26,145 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2019-12-07 12:21:26,145 INFO L132 ssoRankerPreferences]: Path of dumped script: [2019-12-07 12:21:26,145 INFO L133 ssoRankerPreferences]: Filename of dumped script: NO_22.c_Iteration2_Loop [2019-12-07 12:21:26,146 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2019-12-07 12:21:26,146 INFO L274 LassoAnalysis]: Starting lasso preprocessing... [2019-12-07 12:21:26,147 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-12-07 12:21:26,152 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-12-07 12:21:26,155 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-12-07 12:21:26,183 INFO L292 LassoAnalysis]: Preprocessing complete. [2019-12-07 12:21:26,184 INFO L489 LassoAnalysis]: Using template 'affine'. No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 12 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-12-07 12:21:26,187 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2019-12-07 12:21:26,188 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2019-12-07 12:21:26,188 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2019-12-07 12:21:26,188 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2019-12-07 12:21:26,188 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2019-12-07 12:21:26,189 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2019-12-07 12:21:26,190 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2019-12-07 12:21:26,190 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2019-12-07 12:21:26,195 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2019-12-07 12:21:26,197 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2019-12-07 12:21:26,197 INFO L444 ModelExtractionUtils]: 0 out of 3 variables were initially zero. Simplification set additionally 0 variables to zero. No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 13 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-12-07 12:21:26,200 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2019-12-07 12:21:26,200 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2019-12-07 12:21:26,200 INFO L510 LassoAnalysis]: Proved termination. [2019-12-07 12:21:26,200 INFO L512 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0) = -2*ULTIMATE.start_main_~i~0 + 99 Supporting invariants [] [2019-12-07 12:21:26,202 INFO L297 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2019-12-07 12:21:26,218 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:26,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:26,221 INFO L264 TraceCheckSpWp]: Trace formula consists of 8 conjuncts, 2 conjunts are in the unsatisfiable core [2019-12-07 12:21:26,221 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:26,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:26,224 WARN L262 TraceCheckSpWp]: Trace formula consists of 6 conjuncts, 4 conjunts are in the unsatisfiable core [2019-12-07 12:21:26,224 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:26,225 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:21:26,225 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 1 loop predicates [2019-12-07 12:21:26,225 INFO L72 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 7 states and 10 transitions. cyclomatic complexity: 5 Second operand 3 states. [2019-12-07 12:21:26,234 INFO L76 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 7 states and 10 transitions. cyclomatic complexity: 5. Second operand 3 states. Result 11 states and 16 transitions. Complement of second has 5 states. [2019-12-07 12:21:26,234 INFO L142 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2019-12-07 12:21:26,235 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2019-12-07 12:21:26,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 6 transitions. [2019-12-07 12:21:26,235 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 6 transitions. Stem has 3 letters. Loop has 2 letters. [2019-12-07 12:21:26,235 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2019-12-07 12:21:26,235 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 6 transitions. Stem has 5 letters. Loop has 2 letters. [2019-12-07 12:21:26,236 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2019-12-07 12:21:26,236 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 6 transitions. Stem has 3 letters. Loop has 4 letters. [2019-12-07 12:21:26,236 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2019-12-07 12:21:26,236 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 11 states and 16 transitions. [2019-12-07 12:21:26,237 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2019-12-07 12:21:26,237 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 11 states to 11 states and 16 transitions. [2019-12-07 12:21:26,237 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6 [2019-12-07 12:21:26,238 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2019-12-07 12:21:26,238 INFO L73 IsDeterministic]: Start isDeterministic. Operand 11 states and 16 transitions. [2019-12-07 12:21:26,238 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:26,238 INFO L688 BuchiCegarLoop]: Abstraction has 11 states and 16 transitions. [2019-12-07 12:21:26,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11 states and 16 transitions. [2019-12-07 12:21:26,239 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11 to 11. [2019-12-07 12:21:26,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11 states. [2019-12-07 12:21:26,239 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 16 transitions. [2019-12-07 12:21:26,240 INFO L711 BuchiCegarLoop]: Abstraction has 11 states and 16 transitions. [2019-12-07 12:21:26,240 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:26,241 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 12:21:26,242 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 12:21:26,242 INFO L87 Difference]: Start difference. First operand 11 states and 16 transitions. Second operand 3 states. [2019-12-07 12:21:26,250 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:26,251 INFO L93 Difference]: Finished difference Result 13 states and 17 transitions. [2019-12-07 12:21:26,251 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 12:21:26,251 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 13 states and 17 transitions. [2019-12-07 12:21:26,252 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2019-12-07 12:21:26,252 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 13 states to 12 states and 16 transitions. [2019-12-07 12:21:26,252 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2019-12-07 12:21:26,252 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2019-12-07 12:21:26,252 INFO L73 IsDeterministic]: Start isDeterministic. Operand 12 states and 16 transitions. [2019-12-07 12:21:26,253 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:26,253 INFO L688 BuchiCegarLoop]: Abstraction has 12 states and 16 transitions. [2019-12-07 12:21:26,253 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12 states and 16 transitions. [2019-12-07 12:21:26,254 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12 to 11. [2019-12-07 12:21:26,254 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11 states. [2019-12-07 12:21:26,254 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 15 transitions. [2019-12-07 12:21:26,254 INFO L711 BuchiCegarLoop]: Abstraction has 11 states and 15 transitions. [2019-12-07 12:21:26,254 INFO L591 BuchiCegarLoop]: Abstraction has 11 states and 15 transitions. [2019-12-07 12:21:26,254 INFO L424 BuchiCegarLoop]: ======== Iteration 3============ [2019-12-07 12:21:26,255 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 11 states and 15 transitions. [2019-12-07 12:21:26,255 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2019-12-07 12:21:26,255 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:26,255 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:26,256 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [3, 2, 1, 1] [2019-12-07 12:21:26,256 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2019-12-07 12:21:26,256 INFO L794 eck$LassoCheckResult]: Stem: 143#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 144#L10-2 assume !!(main_~i~0 < 100); 145#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 149#L10-2 assume !!(main_~i~0 < 100); 139#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 140#L10-2 assume !!(main_~i~0 < 100); 146#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 148#L10-2 [2019-12-07 12:21:26,256 INFO L796 eck$LassoCheckResult]: Loop: 148#L10-2 assume !!(main_~i~0 < 100); 147#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 148#L10-2 [2019-12-07 12:21:26,256 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:26,256 INFO L82 PathProgramCache]: Analyzing trace with hash -1366043347, now seen corresponding path program 1 times [2019-12-07 12:21:26,256 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:26,257 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1561114898] [2019-12-07 12:21:26,257 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:26,261 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:26,274 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:21:26,274 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1561114898] [2019-12-07 12:21:26,274 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [805640722] [2019-12-07 12:21:26,274 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:26,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:26,291 INFO L264 TraceCheckSpWp]: Trace formula consists of 16 conjuncts, 3 conjunts are in the unsatisfiable core [2019-12-07 12:21:26,291 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:26,303 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:21:26,304 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:26,304 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3] total 3 [2019-12-07 12:21:26,304 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [166443183] [2019-12-07 12:21:26,305 INFO L799 eck$LassoCheckResult]: stem already infeasible [2019-12-07 12:21:26,305 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:26,305 INFO L82 PathProgramCache]: Analyzing trace with hash 1284, now seen corresponding path program 3 times [2019-12-07 12:21:26,305 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:26,305 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [961341266] [2019-12-07 12:21:26,305 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:26,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:26,310 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:26,311 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:26,322 INFO L210 LassoAnalysis]: Preferences: [2019-12-07 12:21:26,323 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2019-12-07 12:21:26,323 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2019-12-07 12:21:26,323 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2019-12-07 12:21:26,323 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2019-12-07 12:21:26,323 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-12-07 12:21:26,323 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2019-12-07 12:21:26,323 INFO L132 ssoRankerPreferences]: Path of dumped script: [2019-12-07 12:21:26,323 INFO L133 ssoRankerPreferences]: Filename of dumped script: NO_22.c_Iteration3_Loop [2019-12-07 12:21:26,323 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2019-12-07 12:21:26,323 INFO L274 LassoAnalysis]: Starting lasso preprocessing... [2019-12-07 12:21:26,324 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-12-07 12:21:26,327 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-12-07 12:21:26,330 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-12-07 12:21:26,352 INFO L292 LassoAnalysis]: Preprocessing complete. [2019-12-07 12:21:26,352 INFO L404 LassoAnalysis]: Checking for nontermination... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 15 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-12-07 12:21:26,355 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2019-12-07 12:21:26,355 INFO L160 nArgumentSynthesizer]: Using integer mode. [2019-12-07 12:21:26,360 INFO L437 LassoAnalysis]: Proved nontermination for one component. [2019-12-07 12:21:26,360 INFO L440 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {v_rep~unnamed0~0~true_5=1} Honda state: {v_rep~unnamed0~0~true_5=1} Generalized eigenvectors: [] Lambdas: [] Nus: [] No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 16 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-12-07 12:21:26,363 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2019-12-07 12:21:26,364 INFO L160 nArgumentSynthesizer]: Using integer mode. No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 17 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-12-07 12:21:26,370 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2019-12-07 12:21:26,370 INFO L160 nArgumentSynthesizer]: Using integer mode. [2019-12-07 12:21:26,375 INFO L444 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2019-12-07 12:21:26,376 INFO L210 LassoAnalysis]: Preferences: [2019-12-07 12:21:26,376 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2019-12-07 12:21:26,376 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2019-12-07 12:21:26,376 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2019-12-07 12:21:26,376 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2019-12-07 12:21:26,376 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-12-07 12:21:26,377 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2019-12-07 12:21:26,377 INFO L132 ssoRankerPreferences]: Path of dumped script: [2019-12-07 12:21:26,377 INFO L133 ssoRankerPreferences]: Filename of dumped script: NO_22.c_Iteration3_Loop [2019-12-07 12:21:26,377 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2019-12-07 12:21:26,377 INFO L274 LassoAnalysis]: Starting lasso preprocessing... [2019-12-07 12:21:26,378 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-12-07 12:21:26,383 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-12-07 12:21:26,385 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-12-07 12:21:26,413 INFO L292 LassoAnalysis]: Preprocessing complete. [2019-12-07 12:21:26,413 INFO L489 LassoAnalysis]: Using template 'affine'. No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 18 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-12-07 12:21:26,416 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2019-12-07 12:21:26,417 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2019-12-07 12:21:26,417 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2019-12-07 12:21:26,417 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2019-12-07 12:21:26,417 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2019-12-07 12:21:26,417 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2019-12-07 12:21:26,418 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2019-12-07 12:21:26,418 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2019-12-07 12:21:26,420 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2019-12-07 12:21:26,422 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2019-12-07 12:21:26,423 INFO L444 ModelExtractionUtils]: 0 out of 3 variables were initially zero. Simplification set additionally 0 variables to zero. No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 19 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-12-07 12:21:26,425 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2019-12-07 12:21:26,425 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2019-12-07 12:21:26,425 INFO L510 LassoAnalysis]: Proved termination. [2019-12-07 12:21:26,425 INFO L512 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0) = -2*ULTIMATE.start_main_~i~0 + 99 Supporting invariants [] [2019-12-07 12:21:26,427 INFO L297 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2019-12-07 12:21:26,438 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:26,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:26,443 INFO L264 TraceCheckSpWp]: Trace formula consists of 16 conjuncts, 2 conjunts are in the unsatisfiable core [2019-12-07 12:21:26,444 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:26,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:26,447 WARN L262 TraceCheckSpWp]: Trace formula consists of 6 conjuncts, 4 conjunts are in the unsatisfiable core [2019-12-07 12:21:26,448 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:26,448 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:21:26,448 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 1 loop predicates [2019-12-07 12:21:26,449 INFO L72 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 11 states and 15 transitions. cyclomatic complexity: 7 Second operand 3 states. [2019-12-07 12:21:26,458 INFO L76 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 11 states and 15 transitions. cyclomatic complexity: 7. Second operand 3 states. Result 13 states and 19 transitions. Complement of second has 5 states. [2019-12-07 12:21:26,458 INFO L142 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2019-12-07 12:21:26,459 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2019-12-07 12:21:26,459 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 6 transitions. [2019-12-07 12:21:26,459 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 6 transitions. Stem has 7 letters. Loop has 2 letters. [2019-12-07 12:21:26,459 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2019-12-07 12:21:26,459 INFO L639 RefineBuchi]: Bad chosen interpolant automaton: word not accepted [2019-12-07 12:21:26,470 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:26,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:26,474 INFO L264 TraceCheckSpWp]: Trace formula consists of 16 conjuncts, 2 conjunts are in the unsatisfiable core [2019-12-07 12:21:26,474 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:26,477 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:26,478 WARN L262 TraceCheckSpWp]: Trace formula consists of 6 conjuncts, 4 conjunts are in the unsatisfiable core [2019-12-07 12:21:26,478 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:26,478 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:21:26,478 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and with honda bouncer for loop.1 stem predicates 1 loop predicates [2019-12-07 12:21:26,478 INFO L72 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 11 states and 15 transitions. cyclomatic complexity: 7 Second operand 3 states. [2019-12-07 12:21:26,485 INFO L76 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 11 states and 15 transitions. cyclomatic complexity: 7. Second operand 3 states. Result 13 states and 19 transitions. Complement of second has 5 states. [2019-12-07 12:21:26,485 INFO L142 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2019-12-07 12:21:26,485 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2019-12-07 12:21:26,485 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 6 transitions. [2019-12-07 12:21:26,486 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 6 transitions. Stem has 7 letters. Loop has 2 letters. [2019-12-07 12:21:26,486 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2019-12-07 12:21:26,486 INFO L639 RefineBuchi]: Bad chosen interpolant automaton: word not accepted [2019-12-07 12:21:26,496 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:26,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:26,500 INFO L264 TraceCheckSpWp]: Trace formula consists of 16 conjuncts, 2 conjunts are in the unsatisfiable core [2019-12-07 12:21:26,500 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:26,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:26,503 WARN L262 TraceCheckSpWp]: Trace formula consists of 6 conjuncts, 4 conjunts are in the unsatisfiable core [2019-12-07 12:21:26,503 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:26,504 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:21:26,504 INFO L152 lantAutomatonBouncer]: Defining Buchi interpolant automaton with scrooge nondeterminism in stemwith honda bouncer for stem and without honda bouncer for loop.1 stem predicates 1 loop predicates [2019-12-07 12:21:26,504 INFO L72 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 11 states and 15 transitions. cyclomatic complexity: 7 Second operand 3 states. [2019-12-07 12:21:26,512 INFO L76 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 11 states and 15 transitions. cyclomatic complexity: 7. Second operand 3 states. Result 15 states and 22 transitions. Complement of second has 4 states. [2019-12-07 12:21:26,512 INFO L142 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2019-12-07 12:21:26,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2019-12-07 12:21:26,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 7 transitions. [2019-12-07 12:21:26,513 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 7 transitions. Stem has 7 letters. Loop has 2 letters. [2019-12-07 12:21:26,513 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2019-12-07 12:21:26,513 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 7 transitions. Stem has 9 letters. Loop has 2 letters. [2019-12-07 12:21:26,513 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2019-12-07 12:21:26,513 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 7 transitions. Stem has 7 letters. Loop has 4 letters. [2019-12-07 12:21:26,514 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2019-12-07 12:21:26,514 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 15 states and 22 transitions. [2019-12-07 12:21:26,515 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2019-12-07 12:21:26,515 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 15 states to 13 states and 18 transitions. [2019-12-07 12:21:26,515 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5 [2019-12-07 12:21:26,515 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2019-12-07 12:21:26,515 INFO L73 IsDeterministic]: Start isDeterministic. Operand 13 states and 18 transitions. [2019-12-07 12:21:26,515 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:26,516 INFO L688 BuchiCegarLoop]: Abstraction has 13 states and 18 transitions. [2019-12-07 12:21:26,516 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states and 18 transitions. [2019-12-07 12:21:26,516 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 6. [2019-12-07 12:21:26,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 6 states. [2019-12-07 12:21:26,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 8 transitions. [2019-12-07 12:21:26,517 INFO L711 BuchiCegarLoop]: Abstraction has 6 states and 8 transitions. [2019-12-07 12:21:26,517 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:26,517 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 12:21:26,517 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 12:21:26,517 INFO L87 Difference]: Start difference. First operand 6 states and 8 transitions. Second operand 4 states. [2019-12-07 12:21:26,527 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:26,527 INFO L93 Difference]: Finished difference Result 10 states and 12 transitions. [2019-12-07 12:21:26,528 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 12:21:26,528 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 10 states and 12 transitions. [2019-12-07 12:21:26,528 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2019-12-07 12:21:26,529 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 10 states to 9 states and 11 transitions. [2019-12-07 12:21:26,529 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 4 [2019-12-07 12:21:26,529 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 4 [2019-12-07 12:21:26,529 INFO L73 IsDeterministic]: Start isDeterministic. Operand 9 states and 11 transitions. [2019-12-07 12:21:26,529 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:26,530 INFO L688 BuchiCegarLoop]: Abstraction has 9 states and 11 transitions. [2019-12-07 12:21:26,530 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9 states and 11 transitions. [2019-12-07 12:21:26,530 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9 to 8. [2019-12-07 12:21:26,530 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 8 states. [2019-12-07 12:21:26,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8 states to 8 states and 10 transitions. [2019-12-07 12:21:26,531 INFO L711 BuchiCegarLoop]: Abstraction has 8 states and 10 transitions. [2019-12-07 12:21:26,531 INFO L591 BuchiCegarLoop]: Abstraction has 8 states and 10 transitions. [2019-12-07 12:21:26,531 INFO L424 BuchiCegarLoop]: ======== Iteration 4============ [2019-12-07 12:21:26,531 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 8 states and 10 transitions. [2019-12-07 12:21:26,532 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 4 [2019-12-07 12:21:26,532 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:26,532 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:26,532 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [3, 2, 1] [2019-12-07 12:21:26,532 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [1, 1] [2019-12-07 12:21:26,532 INFO L794 eck$LassoCheckResult]: Stem: 339#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 340#L10-2 assume !!(main_~i~0 < 100); 337#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 338#L10-2 assume !!(main_~i~0 < 100); 341#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 342#L10-2 assume !!(main_~i~0 < 100); 335#L10 [2019-12-07 12:21:26,532 INFO L796 eck$LassoCheckResult]: Loop: 335#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 336#L10-2 assume !!(main_~i~0 < 100); 335#L10 [2019-12-07 12:21:26,533 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:26,533 INFO L82 PathProgramCache]: Analyzing trace with hash 925765348, now seen corresponding path program 2 times [2019-12-07 12:21:26,533 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:26,533 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1695196100] [2019-12-07 12:21:26,533 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:26,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:26,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:26,540 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:26,540 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:26,540 INFO L82 PathProgramCache]: Analyzing trace with hash 1436, now seen corresponding path program 1 times [2019-12-07 12:21:26,540 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:26,541 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [411155771] [2019-12-07 12:21:26,541 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:26,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:26,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:26,545 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:26,546 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:26,546 INFO L82 PathProgramCache]: Analyzing trace with hash 602269631, now seen corresponding path program 2 times [2019-12-07 12:21:26,546 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:26,546 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [664679261] [2019-12-07 12:21:26,546 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:26,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:26,570 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 3 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:21:26,570 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [664679261] [2019-12-07 12:21:26,570 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [886907833] [2019-12-07 12:21:26,570 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:26,586 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2019-12-07 12:21:26,586 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:26,586 INFO L264 TraceCheckSpWp]: Trace formula consists of 17 conjuncts, 4 conjunts are in the unsatisfiable core [2019-12-07 12:21:26,587 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:26,590 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 3 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:21:26,590 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:26,590 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 4 [2019-12-07 12:21:26,590 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [369440310] [2019-12-07 12:21:26,600 INFO L210 LassoAnalysis]: Preferences: [2019-12-07 12:21:26,600 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2019-12-07 12:21:26,600 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2019-12-07 12:21:26,600 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2019-12-07 12:21:26,600 INFO L129 ssoRankerPreferences]: Use exernal solver: true [2019-12-07 12:21:26,600 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-12-07 12:21:26,600 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2019-12-07 12:21:26,600 INFO L132 ssoRankerPreferences]: Path of dumped script: [2019-12-07 12:21:26,600 INFO L133 ssoRankerPreferences]: Filename of dumped script: NO_22.c_Iteration4_Loop [2019-12-07 12:21:26,601 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2019-12-07 12:21:26,601 INFO L274 LassoAnalysis]: Starting lasso preprocessing... [2019-12-07 12:21:26,602 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-12-07 12:21:26,607 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-12-07 12:21:26,609 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-12-07 12:21:26,639 INFO L292 LassoAnalysis]: Preprocessing complete. [2019-12-07 12:21:26,640 INFO L404 LassoAnalysis]: Checking for nontermination... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 21 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-12-07 12:21:26,642 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2019-12-07 12:21:26,642 INFO L160 nArgumentSynthesizer]: Using integer mode. No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 22 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-12-07 12:21:26,648 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2019-12-07 12:21:26,648 INFO L160 nArgumentSynthesizer]: Using integer mode. [2019-12-07 12:21:26,654 INFO L444 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2019-12-07 12:21:26,655 INFO L210 LassoAnalysis]: Preferences: [2019-12-07 12:21:26,655 INFO L126 ssoRankerPreferences]: Compute integeral hull: false [2019-12-07 12:21:26,655 INFO L127 ssoRankerPreferences]: Enable LassoPartitioneer: true [2019-12-07 12:21:26,655 INFO L128 ssoRankerPreferences]: Term annotations enabled: false [2019-12-07 12:21:26,655 INFO L129 ssoRankerPreferences]: Use exernal solver: false [2019-12-07 12:21:26,655 INFO L130 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-12-07 12:21:26,655 INFO L131 ssoRankerPreferences]: Dump SMT script to file: false [2019-12-07 12:21:26,655 INFO L132 ssoRankerPreferences]: Path of dumped script: [2019-12-07 12:21:26,655 INFO L133 ssoRankerPreferences]: Filename of dumped script: NO_22.c_Iteration4_Loop [2019-12-07 12:21:26,655 INFO L134 ssoRankerPreferences]: MapElimAlgo: Frank [2019-12-07 12:21:26,656 INFO L274 LassoAnalysis]: Starting lasso preprocessing... [2019-12-07 12:21:26,656 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-12-07 12:21:26,663 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-12-07 12:21:26,665 INFO L141 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA XnfConversionTechnique=BOTTOM_UP_WITH_LOCAL_SIMPLIFICATION AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2019-12-07 12:21:26,691 INFO L292 LassoAnalysis]: Preprocessing complete. [2019-12-07 12:21:26,691 INFO L489 LassoAnalysis]: Using template 'affine'. No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 23 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-12-07 12:21:26,694 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSES Number of strict supporting invariants: 0 Number of non-strict supporting invariants: 1 Consider only non-deceasing supporting invariants: true Simplify termination arguments: true Simplify supporting invariants: trueOverapproximate stem: false [2019-12-07 12:21:26,696 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2019-12-07 12:21:26,696 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2019-12-07 12:21:26,696 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2019-12-07 12:21:26,696 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2019-12-07 12:21:26,696 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2019-12-07 12:21:26,697 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2019-12-07 12:21:26,697 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2019-12-07 12:21:26,699 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2019-12-07 12:21:26,703 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2019-12-07 12:21:26,703 INFO L444 ModelExtractionUtils]: 0 out of 3 variables were initially zero. Simplification set additionally 1 variables to zero. No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 24 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2019-12-07 12:21:26,715 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2019-12-07 12:21:26,715 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2019-12-07 12:21:26,715 INFO L510 LassoAnalysis]: Proved termination. [2019-12-07 12:21:26,715 INFO L512 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0) = 1*ULTIMATE.start_main_~i~0 Supporting invariants [] [2019-12-07 12:21:26,718 INFO L297 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2019-12-07 12:21:26,726 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:26,728 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:26,729 INFO L264 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 2 conjunts are in the unsatisfiable core [2019-12-07 12:21:26,729 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:26,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:26,731 WARN L262 TraceCheckSpWp]: Trace formula consists of 6 conjuncts, 4 conjunts are in the unsatisfiable core [2019-12-07 12:21:26,732 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:26,743 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:21:26,744 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2019-12-07 12:21:26,744 INFO L72 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 8 states and 10 transitions. cyclomatic complexity: 3 Second operand 3 states. [2019-12-07 12:21:26,747 INFO L76 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 8 states and 10 transitions. cyclomatic complexity: 3. Second operand 3 states. Result 8 states and 10 transitions. Complement of second has 3 states. [2019-12-07 12:21:26,747 INFO L142 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 2 states 1 stem states 0 non-accepting loop states 1 accepting loop states [2019-12-07 12:21:26,747 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2019-12-07 12:21:26,747 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 2 transitions. [2019-12-07 12:21:26,748 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 2 states and 2 transitions. Stem has 6 letters. Loop has 2 letters. [2019-12-07 12:21:26,748 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2019-12-07 12:21:26,748 INFO L639 RefineBuchi]: Bad chosen interpolant automaton: word not accepted [2019-12-07 12:21:26,755 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:26,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:26,758 INFO L264 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 2 conjunts are in the unsatisfiable core [2019-12-07 12:21:26,758 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:26,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:26,760 WARN L262 TraceCheckSpWp]: Trace formula consists of 6 conjuncts, 4 conjunts are in the unsatisfiable core [2019-12-07 12:21:26,760 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:26,767 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:21:26,767 INFO L152 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and with honda bouncer for loop.1 stem predicates 2 loop predicates [2019-12-07 12:21:26,768 INFO L72 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 8 states and 10 transitions. cyclomatic complexity: 3 Second operand 3 states. [2019-12-07 12:21:26,770 INFO L76 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 8 states and 10 transitions. cyclomatic complexity: 3. Second operand 3 states. Result 8 states and 10 transitions. Complement of second has 3 states. [2019-12-07 12:21:26,770 INFO L142 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 2 states 1 stem states 0 non-accepting loop states 1 accepting loop states [2019-12-07 12:21:26,771 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2019-12-07 12:21:26,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 2 transitions. [2019-12-07 12:21:26,771 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 2 states and 2 transitions. Stem has 6 letters. Loop has 2 letters. [2019-12-07 12:21:26,771 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2019-12-07 12:21:26,771 INFO L639 RefineBuchi]: Bad chosen interpolant automaton: word not accepted [2019-12-07 12:21:26,778 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:26,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:26,780 INFO L264 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 2 conjunts are in the unsatisfiable core [2019-12-07 12:21:26,781 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:26,783 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:26,783 WARN L262 TraceCheckSpWp]: Trace formula consists of 6 conjuncts, 4 conjunts are in the unsatisfiable core [2019-12-07 12:21:26,783 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:26,790 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 12:21:26,790 INFO L152 lantAutomatonBouncer]: Defining Buchi interpolant automaton with scrooge nondeterminism in stemwith honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2019-12-07 12:21:26,791 INFO L72 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 8 states and 10 transitions. cyclomatic complexity: 3 Second operand 3 states. [2019-12-07 12:21:26,796 INFO L76 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 8 states and 10 transitions. cyclomatic complexity: 3. Second operand 3 states. Result 12 states and 14 transitions. Complement of second has 4 states. [2019-12-07 12:21:26,797 INFO L142 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2019-12-07 12:21:26,797 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 3 states. [2019-12-07 12:21:26,797 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 8 transitions. [2019-12-07 12:21:26,797 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 8 transitions. Stem has 6 letters. Loop has 2 letters. [2019-12-07 12:21:26,797 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2019-12-07 12:21:26,797 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 8 transitions. Stem has 8 letters. Loop has 2 letters. [2019-12-07 12:21:26,798 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2019-12-07 12:21:26,798 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 8 transitions. Stem has 6 letters. Loop has 4 letters. [2019-12-07 12:21:26,798 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2019-12-07 12:21:26,798 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 12 states and 14 transitions. [2019-12-07 12:21:26,799 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 6 [2019-12-07 12:21:26,799 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 12 states to 10 states and 12 transitions. [2019-12-07 12:21:26,799 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:26,799 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:26,799 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10 states and 12 transitions. [2019-12-07 12:21:26,799 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:26,799 INFO L688 BuchiCegarLoop]: Abstraction has 10 states and 12 transitions. [2019-12-07 12:21:26,799 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10 states and 12 transitions. [2019-12-07 12:21:26,800 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10 to 9. [2019-12-07 12:21:26,800 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 9 states. [2019-12-07 12:21:26,800 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 11 transitions. [2019-12-07 12:21:26,800 INFO L711 BuchiCegarLoop]: Abstraction has 9 states and 11 transitions. [2019-12-07 12:21:26,800 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:26,800 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 12:21:26,800 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 12:21:26,801 INFO L87 Difference]: Start difference. First operand 9 states and 11 transitions. Second operand 5 states. [2019-12-07 12:21:26,809 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:26,809 INFO L93 Difference]: Finished difference Result 13 states and 15 transitions. [2019-12-07 12:21:26,810 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 12:21:26,810 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 13 states and 15 transitions. [2019-12-07 12:21:26,810 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:26,811 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 13 states to 12 states and 14 transitions. [2019-12-07 12:21:26,811 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:26,811 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:26,811 INFO L73 IsDeterministic]: Start isDeterministic. Operand 12 states and 14 transitions. [2019-12-07 12:21:26,811 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:26,811 INFO L688 BuchiCegarLoop]: Abstraction has 12 states and 14 transitions. [2019-12-07 12:21:26,811 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12 states and 14 transitions. [2019-12-07 12:21:26,812 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12 to 11. [2019-12-07 12:21:26,812 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 11 states. [2019-12-07 12:21:26,812 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 13 transitions. [2019-12-07 12:21:26,813 INFO L711 BuchiCegarLoop]: Abstraction has 11 states and 13 transitions. [2019-12-07 12:21:26,813 INFO L591 BuchiCegarLoop]: Abstraction has 11 states and 13 transitions. [2019-12-07 12:21:26,813 INFO L424 BuchiCegarLoop]: ======== Iteration 5============ [2019-12-07 12:21:26,813 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 11 states and 13 transitions. [2019-12-07 12:21:26,813 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:26,813 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:26,813 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:26,814 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [4, 3, 1] [2019-12-07 12:21:26,814 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:26,814 INFO L794 eck$LassoCheckResult]: Stem: 519#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 520#L10-2 assume !!(main_~i~0 < 100); 517#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 518#L10-2 assume !!(main_~i~0 < 100); 521#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 524#L10-2 assume !!(main_~i~0 < 100); 523#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 522#L10-2 assume !!(main_~i~0 < 100); 515#L10 [2019-12-07 12:21:26,814 INFO L796 eck$LassoCheckResult]: Loop: 515#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 516#L10-2 assume !!(main_~i~0 < 100); 523#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 522#L10-2 assume !!(main_~i~0 < 100); 515#L10 [2019-12-07 12:21:26,814 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:26,814 INFO L82 PathProgramCache]: Analyzing trace with hash 602269569, now seen corresponding path program 3 times [2019-12-07 12:21:26,814 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:26,815 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1405284162] [2019-12-07 12:21:26,815 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:26,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:26,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:26,824 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:26,824 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:26,824 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 1 times [2019-12-07 12:21:26,825 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:26,825 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1197851818] [2019-12-07 12:21:26,825 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:26,828 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:26,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:26,831 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:26,831 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:26,831 INFO L82 PathProgramCache]: Analyzing trace with hash 1740322745, now seen corresponding path program 3 times [2019-12-07 12:21:26,831 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:26,831 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1691162878] [2019-12-07 12:21:26,831 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:26,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:26,856 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 12 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:26,856 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1691162878] [2019-12-07 12:21:26,856 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [344941380] [2019-12-07 12:21:26,857 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:26,872 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2019-12-07 12:21:26,872 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:26,872 INFO L264 TraceCheckSpWp]: Trace formula consists of 25 conjuncts, 5 conjunts are in the unsatisfiable core [2019-12-07 12:21:26,872 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:26,875 INFO L134 CoverageAnalysis]: Checked inductivity of 25 backedges. 12 proven. 12 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:26,875 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:26,875 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2019-12-07 12:21:26,876 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [521534188] [2019-12-07 12:21:26,892 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:26,893 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 12:21:26,893 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2019-12-07 12:21:26,893 INFO L87 Difference]: Start difference. First operand 11 states and 13 transitions. cyclomatic complexity: 3 Second operand 6 states. [2019-12-07 12:21:26,903 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:26,903 INFO L93 Difference]: Finished difference Result 15 states and 17 transitions. [2019-12-07 12:21:26,904 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 12:21:26,904 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 15 states and 17 transitions. [2019-12-07 12:21:26,904 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:26,905 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 15 states to 14 states and 16 transitions. [2019-12-07 12:21:26,905 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:26,905 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:26,905 INFO L73 IsDeterministic]: Start isDeterministic. Operand 14 states and 16 transitions. [2019-12-07 12:21:26,905 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:26,905 INFO L688 BuchiCegarLoop]: Abstraction has 14 states and 16 transitions. [2019-12-07 12:21:26,905 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14 states and 16 transitions. [2019-12-07 12:21:26,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14 to 13. [2019-12-07 12:21:26,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13 states. [2019-12-07 12:21:26,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13 states to 13 states and 15 transitions. [2019-12-07 12:21:26,906 INFO L711 BuchiCegarLoop]: Abstraction has 13 states and 15 transitions. [2019-12-07 12:21:26,906 INFO L591 BuchiCegarLoop]: Abstraction has 13 states and 15 transitions. [2019-12-07 12:21:26,906 INFO L424 BuchiCegarLoop]: ======== Iteration 6============ [2019-12-07 12:21:26,906 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 13 states and 15 transitions. [2019-12-07 12:21:26,907 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:26,907 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:26,907 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:26,907 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [5, 4, 1] [2019-12-07 12:21:26,907 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:26,907 INFO L794 eck$LassoCheckResult]: Stem: 589#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 590#L10-2 assume !!(main_~i~0 < 100); 587#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 588#L10-2 assume !!(main_~i~0 < 100); 591#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 597#L10-2 assume !!(main_~i~0 < 100); 595#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 594#L10-2 assume !!(main_~i~0 < 100); 593#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 592#L10-2 assume !!(main_~i~0 < 100); 585#L10 [2019-12-07 12:21:26,907 INFO L796 eck$LassoCheckResult]: Loop: 585#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 586#L10-2 assume !!(main_~i~0 < 100); 593#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 592#L10-2 assume !!(main_~i~0 < 100); 585#L10 [2019-12-07 12:21:26,907 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:26,907 INFO L82 PathProgramCache]: Analyzing trace with hash -1039528738, now seen corresponding path program 4 times [2019-12-07 12:21:26,908 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:26,908 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1244158113] [2019-12-07 12:21:26,908 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:26,911 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:26,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:26,914 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:26,915 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:26,915 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 2 times [2019-12-07 12:21:26,915 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:26,915 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [300980248] [2019-12-07 12:21:26,915 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:26,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:26,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:26,919 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:26,919 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:26,919 INFO L82 PathProgramCache]: Analyzing trace with hash 1650681494, now seen corresponding path program 4 times [2019-12-07 12:21:26,919 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:26,920 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1436183682] [2019-12-07 12:21:26,920 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:26,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:26,944 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 15 proven. 20 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:26,944 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1436183682] [2019-12-07 12:21:26,944 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1364596402] [2019-12-07 12:21:26,944 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:26,959 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-12-07 12:21:26,959 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:26,960 INFO L264 TraceCheckSpWp]: Trace formula consists of 29 conjuncts, 6 conjunts are in the unsatisfiable core [2019-12-07 12:21:26,960 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:26,963 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 15 proven. 20 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:26,963 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:26,963 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2019-12-07 12:21:26,964 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1086223087] [2019-12-07 12:21:26,983 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:26,983 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 12:21:26,983 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2019-12-07 12:21:26,983 INFO L87 Difference]: Start difference. First operand 13 states and 15 transitions. cyclomatic complexity: 3 Second operand 7 states. [2019-12-07 12:21:26,993 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:26,993 INFO L93 Difference]: Finished difference Result 17 states and 19 transitions. [2019-12-07 12:21:26,993 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 12:21:26,993 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 17 states and 19 transitions. [2019-12-07 12:21:26,994 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:26,994 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 17 states to 16 states and 18 transitions. [2019-12-07 12:21:26,994 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:26,994 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:26,994 INFO L73 IsDeterministic]: Start isDeterministic. Operand 16 states and 18 transitions. [2019-12-07 12:21:26,994 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:26,994 INFO L688 BuchiCegarLoop]: Abstraction has 16 states and 18 transitions. [2019-12-07 12:21:26,994 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16 states and 18 transitions. [2019-12-07 12:21:26,995 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16 to 15. [2019-12-07 12:21:26,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15 states. [2019-12-07 12:21:26,995 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 17 transitions. [2019-12-07 12:21:26,996 INFO L711 BuchiCegarLoop]: Abstraction has 15 states and 17 transitions. [2019-12-07 12:21:26,996 INFO L591 BuchiCegarLoop]: Abstraction has 15 states and 17 transitions. [2019-12-07 12:21:26,996 INFO L424 BuchiCegarLoop]: ======== Iteration 7============ [2019-12-07 12:21:26,996 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 15 states and 17 transitions. [2019-12-07 12:21:26,996 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:26,996 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:26,996 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:26,996 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [6, 5, 1] [2019-12-07 12:21:26,996 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:26,997 INFO L794 eck$LassoCheckResult]: Stem: 670#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 671#L10-2 assume !!(main_~i~0 < 100); 668#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 669#L10-2 assume !!(main_~i~0 < 100); 672#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 680#L10-2 assume !!(main_~i~0 < 100); 679#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 678#L10-2 assume !!(main_~i~0 < 100); 676#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 675#L10-2 assume !!(main_~i~0 < 100); 674#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 673#L10-2 assume !!(main_~i~0 < 100); 666#L10 [2019-12-07 12:21:26,997 INFO L796 eck$LassoCheckResult]: Loop: 666#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 667#L10-2 assume !!(main_~i~0 < 100); 674#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 673#L10-2 assume !!(main_~i~0 < 100); 666#L10 [2019-12-07 12:21:26,997 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:26,997 INFO L82 PathProgramCache]: Analyzing trace with hash 1740263163, now seen corresponding path program 5 times [2019-12-07 12:21:26,997 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:26,997 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1091570917] [2019-12-07 12:21:26,997 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:27,000 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:27,003 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:27,004 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:27,004 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:27,004 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 3 times [2019-12-07 12:21:27,004 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:27,004 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1425666672] [2019-12-07 12:21:27,004 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:27,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:27,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:27,008 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:27,008 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:27,008 INFO L82 PathProgramCache]: Analyzing trace with hash 1404785203, now seen corresponding path program 5 times [2019-12-07 12:21:27,008 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:27,008 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1018106537] [2019-12-07 12:21:27,008 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:27,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:27,039 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 18 proven. 30 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:27,039 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1018106537] [2019-12-07 12:21:27,040 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1296139051] [2019-12-07 12:21:27,040 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:27,056 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 8 check-sat command(s) [2019-12-07 12:21:27,056 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:27,056 INFO L264 TraceCheckSpWp]: Trace formula consists of 33 conjuncts, 7 conjunts are in the unsatisfiable core [2019-12-07 12:21:27,057 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:27,060 INFO L134 CoverageAnalysis]: Checked inductivity of 49 backedges. 18 proven. 30 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:27,060 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:27,060 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2019-12-07 12:21:27,060 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2025222690] [2019-12-07 12:21:27,083 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:27,083 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 12:21:27,084 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2019-12-07 12:21:27,084 INFO L87 Difference]: Start difference. First operand 15 states and 17 transitions. cyclomatic complexity: 3 Second operand 8 states. [2019-12-07 12:21:27,097 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:27,097 INFO L93 Difference]: Finished difference Result 19 states and 21 transitions. [2019-12-07 12:21:27,098 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-12-07 12:21:27,098 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 19 states and 21 transitions. [2019-12-07 12:21:27,098 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:27,098 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 19 states to 18 states and 20 transitions. [2019-12-07 12:21:27,098 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:27,099 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:27,099 INFO L73 IsDeterministic]: Start isDeterministic. Operand 18 states and 20 transitions. [2019-12-07 12:21:27,099 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:27,099 INFO L688 BuchiCegarLoop]: Abstraction has 18 states and 20 transitions. [2019-12-07 12:21:27,099 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18 states and 20 transitions. [2019-12-07 12:21:27,100 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18 to 17. [2019-12-07 12:21:27,100 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17 states. [2019-12-07 12:21:27,100 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 19 transitions. [2019-12-07 12:21:27,100 INFO L711 BuchiCegarLoop]: Abstraction has 17 states and 19 transitions. [2019-12-07 12:21:27,100 INFO L591 BuchiCegarLoop]: Abstraction has 17 states and 19 transitions. [2019-12-07 12:21:27,100 INFO L424 BuchiCegarLoop]: ======== Iteration 8============ [2019-12-07 12:21:27,100 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 17 states and 19 transitions. [2019-12-07 12:21:27,101 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:27,101 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:27,101 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:27,101 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [7, 6, 1] [2019-12-07 12:21:27,101 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:27,101 INFO L794 eck$LassoCheckResult]: Stem: 762#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 763#L10-2 assume !!(main_~i~0 < 100); 764#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 765#L10-2 assume !!(main_~i~0 < 100); 760#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 761#L10-2 assume !!(main_~i~0 < 100); 774#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 773#L10-2 assume !!(main_~i~0 < 100); 772#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 771#L10-2 assume !!(main_~i~0 < 100); 769#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 768#L10-2 assume !!(main_~i~0 < 100); 767#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 766#L10-2 assume !!(main_~i~0 < 100); 758#L10 [2019-12-07 12:21:27,101 INFO L796 eck$LassoCheckResult]: Loop: 758#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 759#L10-2 assume !!(main_~i~0 < 100); 767#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 766#L10-2 assume !!(main_~i~0 < 100); 758#L10 [2019-12-07 12:21:27,101 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:27,101 INFO L82 PathProgramCache]: Analyzing trace with hash 1650621912, now seen corresponding path program 6 times [2019-12-07 12:21:27,102 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:27,102 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [741638255] [2019-12-07 12:21:27,102 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:27,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:27,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:27,109 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:27,109 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:27,109 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 4 times [2019-12-07 12:21:27,109 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:27,109 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [514947219] [2019-12-07 12:21:27,109 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:27,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:27,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:27,112 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:27,113 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:27,113 INFO L82 PathProgramCache]: Analyzing trace with hash 1321650832, now seen corresponding path program 6 times [2019-12-07 12:21:27,113 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:27,113 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [493882233] [2019-12-07 12:21:27,113 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:27,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:27,148 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 21 proven. 42 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:27,148 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [493882233] [2019-12-07 12:21:27,148 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [582712655] [2019-12-07 12:21:27,148 INFO L92 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:27,165 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 9 check-sat command(s) [2019-12-07 12:21:27,165 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:27,166 INFO L264 TraceCheckSpWp]: Trace formula consists of 37 conjuncts, 8 conjunts are in the unsatisfiable core [2019-12-07 12:21:27,166 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:27,170 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 21 proven. 42 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:27,170 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:27,170 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 8 [2019-12-07 12:21:27,170 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [274858557] [2019-12-07 12:21:27,185 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:27,185 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 12:21:27,185 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2019-12-07 12:21:27,185 INFO L87 Difference]: Start difference. First operand 17 states and 19 transitions. cyclomatic complexity: 3 Second operand 9 states. [2019-12-07 12:21:27,199 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:27,199 INFO L93 Difference]: Finished difference Result 21 states and 23 transitions. [2019-12-07 12:21:27,200 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 12:21:27,200 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 21 states and 23 transitions. [2019-12-07 12:21:27,200 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:27,201 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 21 states to 20 states and 22 transitions. [2019-12-07 12:21:27,201 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:27,201 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:27,201 INFO L73 IsDeterministic]: Start isDeterministic. Operand 20 states and 22 transitions. [2019-12-07 12:21:27,201 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:27,201 INFO L688 BuchiCegarLoop]: Abstraction has 20 states and 22 transitions. [2019-12-07 12:21:27,201 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states and 22 transitions. [2019-12-07 12:21:27,202 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 19. [2019-12-07 12:21:27,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2019-12-07 12:21:27,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 21 transitions. [2019-12-07 12:21:27,202 INFO L711 BuchiCegarLoop]: Abstraction has 19 states and 21 transitions. [2019-12-07 12:21:27,202 INFO L591 BuchiCegarLoop]: Abstraction has 19 states and 21 transitions. [2019-12-07 12:21:27,202 INFO L424 BuchiCegarLoop]: ======== Iteration 9============ [2019-12-07 12:21:27,202 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 19 states and 21 transitions. [2019-12-07 12:21:27,203 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:27,203 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:27,203 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:27,203 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [8, 7, 1] [2019-12-07 12:21:27,203 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:27,203 INFO L794 eck$LassoCheckResult]: Stem: 865#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 866#L10-2 assume !!(main_~i~0 < 100); 867#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 868#L10-2 assume !!(main_~i~0 < 100); 863#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 864#L10-2 assume !!(main_~i~0 < 100); 879#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 878#L10-2 assume !!(main_~i~0 < 100); 877#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 876#L10-2 assume !!(main_~i~0 < 100); 875#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 874#L10-2 assume !!(main_~i~0 < 100); 872#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 871#L10-2 assume !!(main_~i~0 < 100); 870#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 869#L10-2 assume !!(main_~i~0 < 100); 861#L10 [2019-12-07 12:21:27,203 INFO L796 eck$LassoCheckResult]: Loop: 861#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 862#L10-2 assume !!(main_~i~0 < 100); 870#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 869#L10-2 assume !!(main_~i~0 < 100); 861#L10 [2019-12-07 12:21:27,203 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:27,203 INFO L82 PathProgramCache]: Analyzing trace with hash 1404725621, now seen corresponding path program 7 times [2019-12-07 12:21:27,203 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:27,204 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1700259656] [2019-12-07 12:21:27,204 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:27,207 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:27,210 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:27,211 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:27,211 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:27,211 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 5 times [2019-12-07 12:21:27,211 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:27,211 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [196436065] [2019-12-07 12:21:27,211 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:27,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:27,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:27,214 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:27,214 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:27,214 INFO L82 PathProgramCache]: Analyzing trace with hash -1261068371, now seen corresponding path program 7 times [2019-12-07 12:21:27,214 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:27,214 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [570233645] [2019-12-07 12:21:27,215 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:27,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:27,254 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 24 proven. 56 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:27,254 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [570233645] [2019-12-07 12:21:27,254 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [95108051] [2019-12-07 12:21:27,254 INFO L92 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:27,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:27,273 INFO L264 TraceCheckSpWp]: Trace formula consists of 41 conjuncts, 9 conjunts are in the unsatisfiable core [2019-12-07 12:21:27,273 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:27,277 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 24 proven. 56 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:27,277 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:27,278 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 9 [2019-12-07 12:21:27,278 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1937909201] [2019-12-07 12:21:27,293 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:27,293 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 12:21:27,293 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2019-12-07 12:21:27,294 INFO L87 Difference]: Start difference. First operand 19 states and 21 transitions. cyclomatic complexity: 3 Second operand 10 states. [2019-12-07 12:21:27,310 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:27,310 INFO L93 Difference]: Finished difference Result 23 states and 25 transitions. [2019-12-07 12:21:27,310 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 12:21:27,310 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 23 states and 25 transitions. [2019-12-07 12:21:27,311 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:27,311 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 23 states to 22 states and 24 transitions. [2019-12-07 12:21:27,311 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:27,311 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:27,311 INFO L73 IsDeterministic]: Start isDeterministic. Operand 22 states and 24 transitions. [2019-12-07 12:21:27,311 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:27,311 INFO L688 BuchiCegarLoop]: Abstraction has 22 states and 24 transitions. [2019-12-07 12:21:27,312 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states and 24 transitions. [2019-12-07 12:21:27,312 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 21. [2019-12-07 12:21:27,312 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2019-12-07 12:21:27,313 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 23 transitions. [2019-12-07 12:21:27,313 INFO L711 BuchiCegarLoop]: Abstraction has 21 states and 23 transitions. [2019-12-07 12:21:27,313 INFO L591 BuchiCegarLoop]: Abstraction has 21 states and 23 transitions. [2019-12-07 12:21:27,313 INFO L424 BuchiCegarLoop]: ======== Iteration 10============ [2019-12-07 12:21:27,313 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 21 states and 23 transitions. [2019-12-07 12:21:27,313 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:27,313 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:27,313 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:27,314 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [9, 8, 1] [2019-12-07 12:21:27,314 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:27,314 INFO L794 eck$LassoCheckResult]: Stem: 979#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 980#L10-2 assume !!(main_~i~0 < 100); 981#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 982#L10-2 assume !!(main_~i~0 < 100); 977#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 978#L10-2 assume !!(main_~i~0 < 100); 995#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 994#L10-2 assume !!(main_~i~0 < 100); 993#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 992#L10-2 assume !!(main_~i~0 < 100); 991#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 990#L10-2 assume !!(main_~i~0 < 100); 989#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 988#L10-2 assume !!(main_~i~0 < 100); 986#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 985#L10-2 assume !!(main_~i~0 < 100); 984#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 983#L10-2 assume !!(main_~i~0 < 100); 975#L10 [2019-12-07 12:21:27,314 INFO L796 eck$LassoCheckResult]: Loop: 975#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 976#L10-2 assume !!(main_~i~0 < 100); 984#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 983#L10-2 assume !!(main_~i~0 < 100); 975#L10 [2019-12-07 12:21:27,314 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:27,314 INFO L82 PathProgramCache]: Analyzing trace with hash 1321591250, now seen corresponding path program 8 times [2019-12-07 12:21:27,314 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:27,314 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1992905934] [2019-12-07 12:21:27,314 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:27,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:27,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:27,321 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:27,321 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:27,321 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 6 times [2019-12-07 12:21:27,321 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:27,321 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [812636198] [2019-12-07 12:21:27,322 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:27,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:27,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:27,324 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:27,324 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:27,324 INFO L82 PathProgramCache]: Analyzing trace with hash -763125366, now seen corresponding path program 8 times [2019-12-07 12:21:27,324 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:27,325 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1335954833] [2019-12-07 12:21:27,325 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:27,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:27,368 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 27 proven. 72 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:27,368 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1335954833] [2019-12-07 12:21:27,369 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [453891729] [2019-12-07 12:21:27,369 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:27,384 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2019-12-07 12:21:27,385 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:27,385 INFO L264 TraceCheckSpWp]: Trace formula consists of 45 conjuncts, 10 conjunts are in the unsatisfiable core [2019-12-07 12:21:27,386 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:27,390 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 27 proven. 72 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:27,390 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:27,390 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 10 [2019-12-07 12:21:27,390 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [389737989] [2019-12-07 12:21:27,405 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:27,405 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 12:21:27,405 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2019-12-07 12:21:27,405 INFO L87 Difference]: Start difference. First operand 21 states and 23 transitions. cyclomatic complexity: 3 Second operand 11 states. [2019-12-07 12:21:27,424 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:27,424 INFO L93 Difference]: Finished difference Result 25 states and 27 transitions. [2019-12-07 12:21:27,425 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-12-07 12:21:27,425 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 25 states and 27 transitions. [2019-12-07 12:21:27,425 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:27,425 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 25 states to 24 states and 26 transitions. [2019-12-07 12:21:27,426 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:27,426 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:27,426 INFO L73 IsDeterministic]: Start isDeterministic. Operand 24 states and 26 transitions. [2019-12-07 12:21:27,426 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:27,426 INFO L688 BuchiCegarLoop]: Abstraction has 24 states and 26 transitions. [2019-12-07 12:21:27,426 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states and 26 transitions. [2019-12-07 12:21:27,427 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 23. [2019-12-07 12:21:27,427 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2019-12-07 12:21:27,427 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 25 transitions. [2019-12-07 12:21:27,428 INFO L711 BuchiCegarLoop]: Abstraction has 23 states and 25 transitions. [2019-12-07 12:21:27,428 INFO L591 BuchiCegarLoop]: Abstraction has 23 states and 25 transitions. [2019-12-07 12:21:27,428 INFO L424 BuchiCegarLoop]: ======== Iteration 11============ [2019-12-07 12:21:27,428 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 23 states and 25 transitions. [2019-12-07 12:21:27,428 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:27,428 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:27,428 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:27,429 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [10, 9, 1] [2019-12-07 12:21:27,429 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:27,429 INFO L794 eck$LassoCheckResult]: Stem: 1104#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 1105#L10-2 assume !!(main_~i~0 < 100); 1106#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1107#L10-2 assume !!(main_~i~0 < 100); 1102#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1103#L10-2 assume !!(main_~i~0 < 100); 1122#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1121#L10-2 assume !!(main_~i~0 < 100); 1120#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1119#L10-2 assume !!(main_~i~0 < 100); 1118#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1117#L10-2 assume !!(main_~i~0 < 100); 1116#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1115#L10-2 assume !!(main_~i~0 < 100); 1114#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1113#L10-2 assume !!(main_~i~0 < 100); 1111#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1110#L10-2 assume !!(main_~i~0 < 100); 1109#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1108#L10-2 assume !!(main_~i~0 < 100); 1100#L10 [2019-12-07 12:21:27,429 INFO L796 eck$LassoCheckResult]: Loop: 1100#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 1101#L10-2 assume !!(main_~i~0 < 100); 1109#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1108#L10-2 assume !!(main_~i~0 < 100); 1100#L10 [2019-12-07 12:21:27,429 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:27,429 INFO L82 PathProgramCache]: Analyzing trace with hash -1261127953, now seen corresponding path program 9 times [2019-12-07 12:21:27,429 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:27,429 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1002638096] [2019-12-07 12:21:27,429 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:27,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:27,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:27,435 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:27,435 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:27,436 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 7 times [2019-12-07 12:21:27,436 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:27,436 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [127339992] [2019-12-07 12:21:27,436 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:27,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:27,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:27,438 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:27,439 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:27,439 INFO L82 PathProgramCache]: Analyzing trace with hash 1018732583, now seen corresponding path program 9 times [2019-12-07 12:21:27,439 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:27,439 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1374076290] [2019-12-07 12:21:27,439 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:27,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:27,491 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 30 proven. 90 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:27,491 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1374076290] [2019-12-07 12:21:27,491 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [758171913] [2019-12-07 12:21:27,491 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:27,510 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 12 check-sat command(s) [2019-12-07 12:21:27,510 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:27,510 INFO L264 TraceCheckSpWp]: Trace formula consists of 49 conjuncts, 11 conjunts are in the unsatisfiable core [2019-12-07 12:21:27,511 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:27,516 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 30 proven. 90 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:27,516 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:27,516 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 11 [2019-12-07 12:21:27,516 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1125185047] [2019-12-07 12:21:27,530 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:27,530 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 12:21:27,531 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2019-12-07 12:21:27,531 INFO L87 Difference]: Start difference. First operand 23 states and 25 transitions. cyclomatic complexity: 3 Second operand 12 states. [2019-12-07 12:21:27,551 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:27,551 INFO L93 Difference]: Finished difference Result 27 states and 29 transitions. [2019-12-07 12:21:27,551 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 12:21:27,551 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 29 transitions. [2019-12-07 12:21:27,552 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:27,552 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 26 states and 28 transitions. [2019-12-07 12:21:27,552 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:27,552 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:27,552 INFO L73 IsDeterministic]: Start isDeterministic. Operand 26 states and 28 transitions. [2019-12-07 12:21:27,552 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:27,553 INFO L688 BuchiCegarLoop]: Abstraction has 26 states and 28 transitions. [2019-12-07 12:21:27,553 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states and 28 transitions. [2019-12-07 12:21:27,554 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 25. [2019-12-07 12:21:27,554 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2019-12-07 12:21:27,554 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 27 transitions. [2019-12-07 12:21:27,554 INFO L711 BuchiCegarLoop]: Abstraction has 25 states and 27 transitions. [2019-12-07 12:21:27,554 INFO L591 BuchiCegarLoop]: Abstraction has 25 states and 27 transitions. [2019-12-07 12:21:27,554 INFO L424 BuchiCegarLoop]: ======== Iteration 12============ [2019-12-07 12:21:27,554 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 25 states and 27 transitions. [2019-12-07 12:21:27,554 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:27,555 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:27,555 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:27,555 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [11, 10, 1] [2019-12-07 12:21:27,555 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:27,555 INFO L794 eck$LassoCheckResult]: Stem: 1240#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 1241#L10-2 assume !!(main_~i~0 < 100); 1242#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1243#L10-2 assume !!(main_~i~0 < 100); 1238#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1239#L10-2 assume !!(main_~i~0 < 100); 1260#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1259#L10-2 assume !!(main_~i~0 < 100); 1258#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1257#L10-2 assume !!(main_~i~0 < 100); 1256#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1255#L10-2 assume !!(main_~i~0 < 100); 1254#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1253#L10-2 assume !!(main_~i~0 < 100); 1252#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1251#L10-2 assume !!(main_~i~0 < 100); 1250#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1249#L10-2 assume !!(main_~i~0 < 100); 1247#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1246#L10-2 assume !!(main_~i~0 < 100); 1245#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1244#L10-2 assume !!(main_~i~0 < 100); 1236#L10 [2019-12-07 12:21:27,555 INFO L796 eck$LassoCheckResult]: Loop: 1236#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 1237#L10-2 assume !!(main_~i~0 < 100); 1245#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1244#L10-2 assume !!(main_~i~0 < 100); 1236#L10 [2019-12-07 12:21:27,555 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:27,556 INFO L82 PathProgramCache]: Analyzing trace with hash -763184948, now seen corresponding path program 10 times [2019-12-07 12:21:27,556 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:27,556 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1050056037] [2019-12-07 12:21:27,556 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:27,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:27,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:27,562 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:27,562 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:27,562 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 8 times [2019-12-07 12:21:27,562 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:27,562 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [761771992] [2019-12-07 12:21:27,563 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:27,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:27,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:27,565 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:27,565 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:27,565 INFO L82 PathProgramCache]: Analyzing trace with hash -307729532, now seen corresponding path program 10 times [2019-12-07 12:21:27,565 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:27,565 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1388022819] [2019-12-07 12:21:27,566 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:27,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:27,623 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 33 proven. 110 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:27,623 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1388022819] [2019-12-07 12:21:27,623 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1679841364] [2019-12-07 12:21:27,623 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:27,640 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-12-07 12:21:27,641 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:27,641 INFO L264 TraceCheckSpWp]: Trace formula consists of 53 conjuncts, 12 conjunts are in the unsatisfiable core [2019-12-07 12:21:27,642 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:27,647 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 33 proven. 110 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:27,647 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:27,647 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 12 [2019-12-07 12:21:27,648 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1786098872] [2019-12-07 12:21:27,666 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:27,667 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2019-12-07 12:21:27,667 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2019-12-07 12:21:27,667 INFO L87 Difference]: Start difference. First operand 25 states and 27 transitions. cyclomatic complexity: 3 Second operand 13 states. [2019-12-07 12:21:27,691 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:27,691 INFO L93 Difference]: Finished difference Result 29 states and 31 transitions. [2019-12-07 12:21:27,691 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 12:21:27,691 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 29 states and 31 transitions. [2019-12-07 12:21:27,692 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:27,692 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 29 states to 28 states and 30 transitions. [2019-12-07 12:21:27,692 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:27,692 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:27,693 INFO L73 IsDeterministic]: Start isDeterministic. Operand 28 states and 30 transitions. [2019-12-07 12:21:27,693 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:27,693 INFO L688 BuchiCegarLoop]: Abstraction has 28 states and 30 transitions. [2019-12-07 12:21:27,693 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states and 30 transitions. [2019-12-07 12:21:27,694 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 27. [2019-12-07 12:21:27,694 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2019-12-07 12:21:27,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 29 transitions. [2019-12-07 12:21:27,695 INFO L711 BuchiCegarLoop]: Abstraction has 27 states and 29 transitions. [2019-12-07 12:21:27,695 INFO L591 BuchiCegarLoop]: Abstraction has 27 states and 29 transitions. [2019-12-07 12:21:27,695 INFO L424 BuchiCegarLoop]: ======== Iteration 13============ [2019-12-07 12:21:27,695 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 29 transitions. [2019-12-07 12:21:27,695 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:27,695 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:27,695 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:27,696 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [12, 11, 1] [2019-12-07 12:21:27,696 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:27,696 INFO L794 eck$LassoCheckResult]: Stem: 1387#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 1388#L10-2 assume !!(main_~i~0 < 100); 1389#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1390#L10-2 assume !!(main_~i~0 < 100); 1385#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1386#L10-2 assume !!(main_~i~0 < 100); 1409#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1408#L10-2 assume !!(main_~i~0 < 100); 1407#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1406#L10-2 assume !!(main_~i~0 < 100); 1405#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1404#L10-2 assume !!(main_~i~0 < 100); 1403#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1402#L10-2 assume !!(main_~i~0 < 100); 1401#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1400#L10-2 assume !!(main_~i~0 < 100); 1399#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1398#L10-2 assume !!(main_~i~0 < 100); 1397#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1396#L10-2 assume !!(main_~i~0 < 100); 1394#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1393#L10-2 assume !!(main_~i~0 < 100); 1392#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1391#L10-2 assume !!(main_~i~0 < 100); 1383#L10 [2019-12-07 12:21:27,696 INFO L796 eck$LassoCheckResult]: Loop: 1383#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 1384#L10-2 assume !!(main_~i~0 < 100); 1392#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1391#L10-2 assume !!(main_~i~0 < 100); 1383#L10 [2019-12-07 12:21:27,696 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:27,696 INFO L82 PathProgramCache]: Analyzing trace with hash 1018673001, now seen corresponding path program 11 times [2019-12-07 12:21:27,697 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:27,697 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1762129069] [2019-12-07 12:21:27,697 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:27,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:27,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:27,705 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:27,705 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:27,705 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 9 times [2019-12-07 12:21:27,705 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:27,706 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2060799453] [2019-12-07 12:21:27,706 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:27,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:27,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:27,708 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:27,709 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:27,709 INFO L82 PathProgramCache]: Analyzing trace with hash 567464865, now seen corresponding path program 11 times [2019-12-07 12:21:27,709 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:27,709 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2026960637] [2019-12-07 12:21:27,709 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:27,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:27,787 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 36 proven. 132 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:27,787 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2026960637] [2019-12-07 12:21:27,787 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [915454978] [2019-12-07 12:21:27,787 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:27,808 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 14 check-sat command(s) [2019-12-07 12:21:27,808 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:27,808 INFO L264 TraceCheckSpWp]: Trace formula consists of 57 conjuncts, 13 conjunts are in the unsatisfiable core [2019-12-07 12:21:27,809 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:27,815 INFO L134 CoverageAnalysis]: Checked inductivity of 169 backedges. 36 proven. 132 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:27,815 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:27,815 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 13 [2019-12-07 12:21:27,815 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1240260433] [2019-12-07 12:21:27,831 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:27,831 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2019-12-07 12:21:27,831 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=91, Unknown=0, NotChecked=0, Total=182 [2019-12-07 12:21:27,831 INFO L87 Difference]: Start difference. First operand 27 states and 29 transitions. cyclomatic complexity: 3 Second operand 14 states. [2019-12-07 12:21:27,855 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:27,855 INFO L93 Difference]: Finished difference Result 31 states and 33 transitions. [2019-12-07 12:21:27,856 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2019-12-07 12:21:27,856 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 31 states and 33 transitions. [2019-12-07 12:21:27,856 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:27,856 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 31 states to 30 states and 32 transitions. [2019-12-07 12:21:27,856 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:27,857 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:27,857 INFO L73 IsDeterministic]: Start isDeterministic. Operand 30 states and 32 transitions. [2019-12-07 12:21:27,857 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:27,857 INFO L688 BuchiCegarLoop]: Abstraction has 30 states and 32 transitions. [2019-12-07 12:21:27,857 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states and 32 transitions. [2019-12-07 12:21:27,858 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 29. [2019-12-07 12:21:27,858 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2019-12-07 12:21:27,858 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 31 transitions. [2019-12-07 12:21:27,858 INFO L711 BuchiCegarLoop]: Abstraction has 29 states and 31 transitions. [2019-12-07 12:21:27,858 INFO L591 BuchiCegarLoop]: Abstraction has 29 states and 31 transitions. [2019-12-07 12:21:27,858 INFO L424 BuchiCegarLoop]: ======== Iteration 14============ [2019-12-07 12:21:27,858 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 29 states and 31 transitions. [2019-12-07 12:21:27,859 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:27,859 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:27,859 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:27,859 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [13, 12, 1] [2019-12-07 12:21:27,859 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:27,859 INFO L794 eck$LassoCheckResult]: Stem: 1545#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 1546#L10-2 assume !!(main_~i~0 < 100); 1547#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1548#L10-2 assume !!(main_~i~0 < 100); 1543#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1544#L10-2 assume !!(main_~i~0 < 100); 1569#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1568#L10-2 assume !!(main_~i~0 < 100); 1567#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1566#L10-2 assume !!(main_~i~0 < 100); 1565#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1564#L10-2 assume !!(main_~i~0 < 100); 1563#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1562#L10-2 assume !!(main_~i~0 < 100); 1561#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1560#L10-2 assume !!(main_~i~0 < 100); 1559#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1558#L10-2 assume !!(main_~i~0 < 100); 1557#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1556#L10-2 assume !!(main_~i~0 < 100); 1555#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1554#L10-2 assume !!(main_~i~0 < 100); 1552#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1551#L10-2 assume !!(main_~i~0 < 100); 1550#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1549#L10-2 assume !!(main_~i~0 < 100); 1541#L10 [2019-12-07 12:21:27,859 INFO L796 eck$LassoCheckResult]: Loop: 1541#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 1542#L10-2 assume !!(main_~i~0 < 100); 1550#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1549#L10-2 assume !!(main_~i~0 < 100); 1541#L10 [2019-12-07 12:21:27,860 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:27,860 INFO L82 PathProgramCache]: Analyzing trace with hash -307789114, now seen corresponding path program 12 times [2019-12-07 12:21:27,860 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:27,860 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [961159740] [2019-12-07 12:21:27,860 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:27,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:27,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:27,866 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:27,866 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:27,866 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 10 times [2019-12-07 12:21:27,866 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:27,866 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [561840192] [2019-12-07 12:21:27,866 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:27,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:27,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:27,869 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:27,869 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:27,869 INFO L82 PathProgramCache]: Analyzing trace with hash -184309634, now seen corresponding path program 12 times [2019-12-07 12:21:27,869 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:27,869 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1905547418] [2019-12-07 12:21:27,869 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:27,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:27,945 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 39 proven. 156 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:27,945 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1905547418] [2019-12-07 12:21:27,945 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [407707176] [2019-12-07 12:21:27,946 INFO L92 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:27,972 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 15 check-sat command(s) [2019-12-07 12:21:27,972 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:27,973 INFO L264 TraceCheckSpWp]: Trace formula consists of 61 conjuncts, 14 conjunts are in the unsatisfiable core [2019-12-07 12:21:27,974 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:27,982 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 39 proven. 156 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:27,982 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:27,982 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 14 [2019-12-07 12:21:27,982 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [834368506] [2019-12-07 12:21:28,001 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:28,001 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 12:21:28,001 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=105, Unknown=0, NotChecked=0, Total=210 [2019-12-07 12:21:28,001 INFO L87 Difference]: Start difference. First operand 29 states and 31 transitions. cyclomatic complexity: 3 Second operand 15 states. [2019-12-07 12:21:28,026 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:28,026 INFO L93 Difference]: Finished difference Result 33 states and 35 transitions. [2019-12-07 12:21:28,027 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 12:21:28,027 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 33 states and 35 transitions. [2019-12-07 12:21:28,027 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:28,027 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 33 states to 32 states and 34 transitions. [2019-12-07 12:21:28,028 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:28,028 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:28,028 INFO L73 IsDeterministic]: Start isDeterministic. Operand 32 states and 34 transitions. [2019-12-07 12:21:28,028 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:28,028 INFO L688 BuchiCegarLoop]: Abstraction has 32 states and 34 transitions. [2019-12-07 12:21:28,028 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states and 34 transitions. [2019-12-07 12:21:28,029 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 31. [2019-12-07 12:21:28,029 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2019-12-07 12:21:28,029 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 33 transitions. [2019-12-07 12:21:28,029 INFO L711 BuchiCegarLoop]: Abstraction has 31 states and 33 transitions. [2019-12-07 12:21:28,030 INFO L591 BuchiCegarLoop]: Abstraction has 31 states and 33 transitions. [2019-12-07 12:21:28,030 INFO L424 BuchiCegarLoop]: ======== Iteration 15============ [2019-12-07 12:21:28,030 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 31 states and 33 transitions. [2019-12-07 12:21:28,030 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:28,030 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:28,030 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:28,031 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [14, 13, 1] [2019-12-07 12:21:28,031 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:28,031 INFO L794 eck$LassoCheckResult]: Stem: 1714#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 1715#L10-2 assume !!(main_~i~0 < 100); 1716#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1717#L10-2 assume !!(main_~i~0 < 100); 1712#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1713#L10-2 assume !!(main_~i~0 < 100); 1740#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1739#L10-2 assume !!(main_~i~0 < 100); 1738#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1737#L10-2 assume !!(main_~i~0 < 100); 1736#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1735#L10-2 assume !!(main_~i~0 < 100); 1734#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1733#L10-2 assume !!(main_~i~0 < 100); 1732#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1731#L10-2 assume !!(main_~i~0 < 100); 1730#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1729#L10-2 assume !!(main_~i~0 < 100); 1728#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1727#L10-2 assume !!(main_~i~0 < 100); 1726#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1725#L10-2 assume !!(main_~i~0 < 100); 1724#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1723#L10-2 assume !!(main_~i~0 < 100); 1721#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1720#L10-2 assume !!(main_~i~0 < 100); 1719#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1718#L10-2 assume !!(main_~i~0 < 100); 1710#L10 [2019-12-07 12:21:28,031 INFO L796 eck$LassoCheckResult]: Loop: 1710#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 1711#L10-2 assume !!(main_~i~0 < 100); 1719#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1718#L10-2 assume !!(main_~i~0 < 100); 1710#L10 [2019-12-07 12:21:28,031 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:28,031 INFO L82 PathProgramCache]: Analyzing trace with hash 567405283, now seen corresponding path program 13 times [2019-12-07 12:21:28,031 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:28,031 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [144613989] [2019-12-07 12:21:28,031 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:28,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:28,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:28,037 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:28,037 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:28,037 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 11 times [2019-12-07 12:21:28,038 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:28,038 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [8352677] [2019-12-07 12:21:28,038 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:28,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:28,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:28,040 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:28,040 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:28,040 INFO L82 PathProgramCache]: Analyzing trace with hash -1085097445, now seen corresponding path program 13 times [2019-12-07 12:21:28,040 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:28,040 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [568868694] [2019-12-07 12:21:28,040 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:28,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:28,121 INFO L134 CoverageAnalysis]: Checked inductivity of 225 backedges. 42 proven. 182 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:28,121 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [568868694] [2019-12-07 12:21:28,121 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [115297945] [2019-12-07 12:21:28,122 INFO L92 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:28,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:28,140 INFO L264 TraceCheckSpWp]: Trace formula consists of 65 conjuncts, 15 conjunts are in the unsatisfiable core [2019-12-07 12:21:28,140 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:28,146 INFO L134 CoverageAnalysis]: Checked inductivity of 225 backedges. 42 proven. 182 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:28,146 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:28,146 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 15 [2019-12-07 12:21:28,147 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [461651673] [2019-12-07 12:21:28,161 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:28,162 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 12:21:28,162 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=120, Unknown=0, NotChecked=0, Total=240 [2019-12-07 12:21:28,162 INFO L87 Difference]: Start difference. First operand 31 states and 33 transitions. cyclomatic complexity: 3 Second operand 16 states. [2019-12-07 12:21:28,186 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:28,186 INFO L93 Difference]: Finished difference Result 35 states and 37 transitions. [2019-12-07 12:21:28,186 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-12-07 12:21:28,186 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 35 states and 37 transitions. [2019-12-07 12:21:28,187 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:28,187 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 35 states to 34 states and 36 transitions. [2019-12-07 12:21:28,187 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:28,188 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:28,188 INFO L73 IsDeterministic]: Start isDeterministic. Operand 34 states and 36 transitions. [2019-12-07 12:21:28,188 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:28,188 INFO L688 BuchiCegarLoop]: Abstraction has 34 states and 36 transitions. [2019-12-07 12:21:28,188 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states and 36 transitions. [2019-12-07 12:21:28,189 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 33. [2019-12-07 12:21:28,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2019-12-07 12:21:28,189 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 35 transitions. [2019-12-07 12:21:28,189 INFO L711 BuchiCegarLoop]: Abstraction has 33 states and 35 transitions. [2019-12-07 12:21:28,189 INFO L591 BuchiCegarLoop]: Abstraction has 33 states and 35 transitions. [2019-12-07 12:21:28,189 INFO L424 BuchiCegarLoop]: ======== Iteration 16============ [2019-12-07 12:21:28,190 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 33 states and 35 transitions. [2019-12-07 12:21:28,190 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:28,190 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:28,190 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:28,190 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [15, 14, 1] [2019-12-07 12:21:28,190 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:28,191 INFO L794 eck$LassoCheckResult]: Stem: 1894#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 1895#L10-2 assume !!(main_~i~0 < 100); 1896#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1897#L10-2 assume !!(main_~i~0 < 100); 1892#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1893#L10-2 assume !!(main_~i~0 < 100); 1922#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1921#L10-2 assume !!(main_~i~0 < 100); 1920#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1919#L10-2 assume !!(main_~i~0 < 100); 1918#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1917#L10-2 assume !!(main_~i~0 < 100); 1916#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1915#L10-2 assume !!(main_~i~0 < 100); 1914#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1913#L10-2 assume !!(main_~i~0 < 100); 1912#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1911#L10-2 assume !!(main_~i~0 < 100); 1910#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1909#L10-2 assume !!(main_~i~0 < 100); 1908#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1907#L10-2 assume !!(main_~i~0 < 100); 1906#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1905#L10-2 assume !!(main_~i~0 < 100); 1904#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1903#L10-2 assume !!(main_~i~0 < 100); 1901#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1900#L10-2 assume !!(main_~i~0 < 100); 1899#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1898#L10-2 assume !!(main_~i~0 < 100); 1890#L10 [2019-12-07 12:21:28,191 INFO L796 eck$LassoCheckResult]: Loop: 1890#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 1891#L10-2 assume !!(main_~i~0 < 100); 1899#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 1898#L10-2 assume !!(main_~i~0 < 100); 1890#L10 [2019-12-07 12:21:28,191 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:28,191 INFO L82 PathProgramCache]: Analyzing trace with hash -184369216, now seen corresponding path program 14 times [2019-12-07 12:21:28,191 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:28,191 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1642512123] [2019-12-07 12:21:28,191 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:28,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:28,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:28,199 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:28,199 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:28,200 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 12 times [2019-12-07 12:21:28,200 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:28,200 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1743808731] [2019-12-07 12:21:28,200 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:28,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:28,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:28,202 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:28,203 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:28,203 INFO L82 PathProgramCache]: Analyzing trace with hash 841209976, now seen corresponding path program 14 times [2019-12-07 12:21:28,203 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:28,203 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1770765168] [2019-12-07 12:21:28,203 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:28,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:28,295 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 45 proven. 210 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:28,296 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1770765168] [2019-12-07 12:21:28,296 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [276612769] [2019-12-07 12:21:28,296 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:28,313 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2019-12-07 12:21:28,313 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:28,314 INFO L264 TraceCheckSpWp]: Trace formula consists of 69 conjuncts, 16 conjunts are in the unsatisfiable core [2019-12-07 12:21:28,314 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:28,323 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 45 proven. 210 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:28,323 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:28,323 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 16 [2019-12-07 12:21:28,323 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [3851591] [2019-12-07 12:21:28,344 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:28,345 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2019-12-07 12:21:28,345 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=136, Invalid=136, Unknown=0, NotChecked=0, Total=272 [2019-12-07 12:21:28,345 INFO L87 Difference]: Start difference. First operand 33 states and 35 transitions. cyclomatic complexity: 3 Second operand 17 states. [2019-12-07 12:21:28,374 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:28,375 INFO L93 Difference]: Finished difference Result 37 states and 39 transitions. [2019-12-07 12:21:28,375 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 12:21:28,375 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 37 states and 39 transitions. [2019-12-07 12:21:28,375 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:28,376 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 37 states to 36 states and 38 transitions. [2019-12-07 12:21:28,376 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:28,376 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:28,376 INFO L73 IsDeterministic]: Start isDeterministic. Operand 36 states and 38 transitions. [2019-12-07 12:21:28,376 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:28,376 INFO L688 BuchiCegarLoop]: Abstraction has 36 states and 38 transitions. [2019-12-07 12:21:28,376 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states and 38 transitions. [2019-12-07 12:21:28,378 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 35. [2019-12-07 12:21:28,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2019-12-07 12:21:28,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 37 transitions. [2019-12-07 12:21:28,378 INFO L711 BuchiCegarLoop]: Abstraction has 35 states and 37 transitions. [2019-12-07 12:21:28,378 INFO L591 BuchiCegarLoop]: Abstraction has 35 states and 37 transitions. [2019-12-07 12:21:28,378 INFO L424 BuchiCegarLoop]: ======== Iteration 17============ [2019-12-07 12:21:28,378 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 35 states and 37 transitions. [2019-12-07 12:21:28,379 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:28,379 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:28,379 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:28,379 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [16, 15, 1] [2019-12-07 12:21:28,380 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:28,380 INFO L794 eck$LassoCheckResult]: Stem: 2085#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 2086#L10-2 assume !!(main_~i~0 < 100); 2087#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2088#L10-2 assume !!(main_~i~0 < 100); 2083#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2084#L10-2 assume !!(main_~i~0 < 100); 2115#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2114#L10-2 assume !!(main_~i~0 < 100); 2113#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2112#L10-2 assume !!(main_~i~0 < 100); 2111#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2110#L10-2 assume !!(main_~i~0 < 100); 2109#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2108#L10-2 assume !!(main_~i~0 < 100); 2107#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2106#L10-2 assume !!(main_~i~0 < 100); 2105#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2104#L10-2 assume !!(main_~i~0 < 100); 2103#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2102#L10-2 assume !!(main_~i~0 < 100); 2101#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2100#L10-2 assume !!(main_~i~0 < 100); 2099#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2098#L10-2 assume !!(main_~i~0 < 100); 2097#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2096#L10-2 assume !!(main_~i~0 < 100); 2095#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2094#L10-2 assume !!(main_~i~0 < 100); 2092#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2091#L10-2 assume !!(main_~i~0 < 100); 2090#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2089#L10-2 assume !!(main_~i~0 < 100); 2081#L10 [2019-12-07 12:21:28,380 INFO L796 eck$LassoCheckResult]: Loop: 2081#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 2082#L10-2 assume !!(main_~i~0 < 100); 2090#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2089#L10-2 assume !!(main_~i~0 < 100); 2081#L10 [2019-12-07 12:21:28,380 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:28,380 INFO L82 PathProgramCache]: Analyzing trace with hash -1085157027, now seen corresponding path program 15 times [2019-12-07 12:21:28,380 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:28,380 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1063004492] [2019-12-07 12:21:28,380 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:28,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:28,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:28,388 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:28,388 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:28,388 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 13 times [2019-12-07 12:21:28,388 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:28,388 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2071115999] [2019-12-07 12:21:28,388 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:28,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:28,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:28,390 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:28,390 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:28,391 INFO L82 PathProgramCache]: Analyzing trace with hash 891736981, now seen corresponding path program 15 times [2019-12-07 12:21:28,391 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:28,391 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1033281492] [2019-12-07 12:21:28,391 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:28,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:28,493 INFO L134 CoverageAnalysis]: Checked inductivity of 289 backedges. 48 proven. 240 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:28,493 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1033281492] [2019-12-07 12:21:28,493 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [245551679] [2019-12-07 12:21:28,493 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:28,515 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 18 check-sat command(s) [2019-12-07 12:21:28,515 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:28,516 INFO L264 TraceCheckSpWp]: Trace formula consists of 73 conjuncts, 17 conjunts are in the unsatisfiable core [2019-12-07 12:21:28,516 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:28,525 INFO L134 CoverageAnalysis]: Checked inductivity of 289 backedges. 48 proven. 240 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:28,525 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:28,525 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 17 [2019-12-07 12:21:28,525 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1832959040] [2019-12-07 12:21:28,540 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:28,540 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2019-12-07 12:21:28,540 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=153, Invalid=153, Unknown=0, NotChecked=0, Total=306 [2019-12-07 12:21:28,540 INFO L87 Difference]: Start difference. First operand 35 states and 37 transitions. cyclomatic complexity: 3 Second operand 18 states. [2019-12-07 12:21:28,571 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:28,572 INFO L93 Difference]: Finished difference Result 39 states and 41 transitions. [2019-12-07 12:21:28,572 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 12:21:28,572 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 39 states and 41 transitions. [2019-12-07 12:21:28,572 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:28,573 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 39 states to 38 states and 40 transitions. [2019-12-07 12:21:28,573 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:28,573 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:28,573 INFO L73 IsDeterministic]: Start isDeterministic. Operand 38 states and 40 transitions. [2019-12-07 12:21:28,573 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:28,573 INFO L688 BuchiCegarLoop]: Abstraction has 38 states and 40 transitions. [2019-12-07 12:21:28,573 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states and 40 transitions. [2019-12-07 12:21:28,575 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 37. [2019-12-07 12:21:28,575 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2019-12-07 12:21:28,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 39 transitions. [2019-12-07 12:21:28,575 INFO L711 BuchiCegarLoop]: Abstraction has 37 states and 39 transitions. [2019-12-07 12:21:28,576 INFO L591 BuchiCegarLoop]: Abstraction has 37 states and 39 transitions. [2019-12-07 12:21:28,576 INFO L424 BuchiCegarLoop]: ======== Iteration 18============ [2019-12-07 12:21:28,576 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 37 states and 39 transitions. [2019-12-07 12:21:28,576 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:28,576 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:28,576 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:28,577 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [17, 16, 1] [2019-12-07 12:21:28,577 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:28,577 INFO L794 eck$LassoCheckResult]: Stem: 2287#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 2288#L10-2 assume !!(main_~i~0 < 100); 2289#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2290#L10-2 assume !!(main_~i~0 < 100); 2285#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2286#L10-2 assume !!(main_~i~0 < 100); 2319#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2318#L10-2 assume !!(main_~i~0 < 100); 2317#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2316#L10-2 assume !!(main_~i~0 < 100); 2315#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2314#L10-2 assume !!(main_~i~0 < 100); 2313#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2312#L10-2 assume !!(main_~i~0 < 100); 2311#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2310#L10-2 assume !!(main_~i~0 < 100); 2309#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2308#L10-2 assume !!(main_~i~0 < 100); 2307#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2306#L10-2 assume !!(main_~i~0 < 100); 2305#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2304#L10-2 assume !!(main_~i~0 < 100); 2303#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2302#L10-2 assume !!(main_~i~0 < 100); 2301#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2300#L10-2 assume !!(main_~i~0 < 100); 2299#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2298#L10-2 assume !!(main_~i~0 < 100); 2297#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2296#L10-2 assume !!(main_~i~0 < 100); 2294#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2293#L10-2 assume !!(main_~i~0 < 100); 2292#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2291#L10-2 assume !!(main_~i~0 < 100); 2283#L10 [2019-12-07 12:21:28,577 INFO L796 eck$LassoCheckResult]: Loop: 2283#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 2284#L10-2 assume !!(main_~i~0 < 100); 2292#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2291#L10-2 assume !!(main_~i~0 < 100); 2283#L10 [2019-12-07 12:21:28,577 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:28,577 INFO L82 PathProgramCache]: Analyzing trace with hash 841150394, now seen corresponding path program 16 times [2019-12-07 12:21:28,578 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:28,578 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [309553673] [2019-12-07 12:21:28,578 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:28,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:28,583 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:28,584 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:28,584 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:28,584 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 14 times [2019-12-07 12:21:28,584 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:28,584 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1206775163] [2019-12-07 12:21:28,584 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:28,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:28,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:28,586 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:28,586 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:28,586 INFO L82 PathProgramCache]: Analyzing trace with hash -2091418766, now seen corresponding path program 16 times [2019-12-07 12:21:28,586 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:28,587 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [888369556] [2019-12-07 12:21:28,587 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:28,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:28,700 INFO L134 CoverageAnalysis]: Checked inductivity of 324 backedges. 51 proven. 272 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:28,701 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [888369556] [2019-12-07 12:21:28,701 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1633264596] [2019-12-07 12:21:28,701 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:28,722 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-12-07 12:21:28,722 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:28,723 INFO L264 TraceCheckSpWp]: Trace formula consists of 77 conjuncts, 18 conjunts are in the unsatisfiable core [2019-12-07 12:21:28,724 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:28,733 INFO L134 CoverageAnalysis]: Checked inductivity of 324 backedges. 51 proven. 272 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:28,733 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:28,733 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 18 [2019-12-07 12:21:28,734 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1685956225] [2019-12-07 12:21:28,755 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:28,756 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-07 12:21:28,756 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=171, Invalid=171, Unknown=0, NotChecked=0, Total=342 [2019-12-07 12:21:28,756 INFO L87 Difference]: Start difference. First operand 37 states and 39 transitions. cyclomatic complexity: 3 Second operand 19 states. [2019-12-07 12:21:28,796 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:28,797 INFO L93 Difference]: Finished difference Result 41 states and 43 transitions. [2019-12-07 12:21:28,797 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 12:21:28,797 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 41 states and 43 transitions. [2019-12-07 12:21:28,797 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:28,798 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 41 states to 40 states and 42 transitions. [2019-12-07 12:21:28,798 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:28,798 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:28,798 INFO L73 IsDeterministic]: Start isDeterministic. Operand 40 states and 42 transitions. [2019-12-07 12:21:28,798 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:28,798 INFO L688 BuchiCegarLoop]: Abstraction has 40 states and 42 transitions. [2019-12-07 12:21:28,798 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states and 42 transitions. [2019-12-07 12:21:28,800 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 39. [2019-12-07 12:21:28,800 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2019-12-07 12:21:28,800 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 41 transitions. [2019-12-07 12:21:28,800 INFO L711 BuchiCegarLoop]: Abstraction has 39 states and 41 transitions. [2019-12-07 12:21:28,800 INFO L591 BuchiCegarLoop]: Abstraction has 39 states and 41 transitions. [2019-12-07 12:21:28,800 INFO L424 BuchiCegarLoop]: ======== Iteration 19============ [2019-12-07 12:21:28,800 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 39 states and 41 transitions. [2019-12-07 12:21:28,801 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:28,801 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:28,801 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:28,801 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [18, 17, 1] [2019-12-07 12:21:28,801 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:28,801 INFO L794 eck$LassoCheckResult]: Stem: 2500#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 2501#L10-2 assume !!(main_~i~0 < 100); 2502#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2503#L10-2 assume !!(main_~i~0 < 100); 2498#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2499#L10-2 assume !!(main_~i~0 < 100); 2534#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2533#L10-2 assume !!(main_~i~0 < 100); 2532#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2531#L10-2 assume !!(main_~i~0 < 100); 2530#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2529#L10-2 assume !!(main_~i~0 < 100); 2528#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2527#L10-2 assume !!(main_~i~0 < 100); 2526#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2525#L10-2 assume !!(main_~i~0 < 100); 2524#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2523#L10-2 assume !!(main_~i~0 < 100); 2522#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2521#L10-2 assume !!(main_~i~0 < 100); 2520#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2519#L10-2 assume !!(main_~i~0 < 100); 2518#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2517#L10-2 assume !!(main_~i~0 < 100); 2516#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2515#L10-2 assume !!(main_~i~0 < 100); 2514#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2513#L10-2 assume !!(main_~i~0 < 100); 2512#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2511#L10-2 assume !!(main_~i~0 < 100); 2510#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2509#L10-2 assume !!(main_~i~0 < 100); 2507#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2506#L10-2 assume !!(main_~i~0 < 100); 2505#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2504#L10-2 assume !!(main_~i~0 < 100); 2496#L10 [2019-12-07 12:21:28,801 INFO L796 eck$LassoCheckResult]: Loop: 2496#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 2497#L10-2 assume !!(main_~i~0 < 100); 2505#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2504#L10-2 assume !!(main_~i~0 < 100); 2496#L10 [2019-12-07 12:21:28,801 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:28,802 INFO L82 PathProgramCache]: Analyzing trace with hash 891677399, now seen corresponding path program 17 times [2019-12-07 12:21:28,802 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:28,802 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1240717453] [2019-12-07 12:21:28,802 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:28,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:28,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:28,809 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:28,809 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:28,809 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 15 times [2019-12-07 12:21:28,809 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:28,809 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1677899590] [2019-12-07 12:21:28,810 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:28,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:28,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:28,812 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:28,812 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:28,812 INFO L82 PathProgramCache]: Analyzing trace with hash 134062095, now seen corresponding path program 17 times [2019-12-07 12:21:28,812 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:28,812 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1215798917] [2019-12-07 12:21:28,812 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:28,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:28,955 INFO L134 CoverageAnalysis]: Checked inductivity of 361 backedges. 54 proven. 306 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:28,955 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1215798917] [2019-12-07 12:21:28,955 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1273119066] [2019-12-07 12:21:28,955 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:28,977 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 20 check-sat command(s) [2019-12-07 12:21:28,978 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:28,978 INFO L264 TraceCheckSpWp]: Trace formula consists of 81 conjuncts, 19 conjunts are in the unsatisfiable core [2019-12-07 12:21:28,979 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:28,985 INFO L134 CoverageAnalysis]: Checked inductivity of 361 backedges. 54 proven. 306 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:28,985 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:28,985 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 19 [2019-12-07 12:21:28,985 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1533556539] [2019-12-07 12:21:29,008 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:29,008 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2019-12-07 12:21:29,008 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=190, Invalid=190, Unknown=0, NotChecked=0, Total=380 [2019-12-07 12:21:29,008 INFO L87 Difference]: Start difference. First operand 39 states and 41 transitions. cyclomatic complexity: 3 Second operand 20 states. [2019-12-07 12:21:29,041 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:29,041 INFO L93 Difference]: Finished difference Result 43 states and 45 transitions. [2019-12-07 12:21:29,041 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 12:21:29,041 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 43 states and 45 transitions. [2019-12-07 12:21:29,042 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:29,042 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 43 states to 42 states and 44 transitions. [2019-12-07 12:21:29,042 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:29,042 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:29,042 INFO L73 IsDeterministic]: Start isDeterministic. Operand 42 states and 44 transitions. [2019-12-07 12:21:29,042 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:29,043 INFO L688 BuchiCegarLoop]: Abstraction has 42 states and 44 transitions. [2019-12-07 12:21:29,043 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states and 44 transitions. [2019-12-07 12:21:29,044 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 41. [2019-12-07 12:21:29,044 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2019-12-07 12:21:29,044 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 43 transitions. [2019-12-07 12:21:29,044 INFO L711 BuchiCegarLoop]: Abstraction has 41 states and 43 transitions. [2019-12-07 12:21:29,044 INFO L591 BuchiCegarLoop]: Abstraction has 41 states and 43 transitions. [2019-12-07 12:21:29,044 INFO L424 BuchiCegarLoop]: ======== Iteration 20============ [2019-12-07 12:21:29,044 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 41 states and 43 transitions. [2019-12-07 12:21:29,044 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:29,044 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:29,045 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:29,045 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [19, 18, 1] [2019-12-07 12:21:29,045 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:29,045 INFO L794 eck$LassoCheckResult]: Stem: 2724#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 2725#L10-2 assume !!(main_~i~0 < 100); 2726#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2727#L10-2 assume !!(main_~i~0 < 100); 2722#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2723#L10-2 assume !!(main_~i~0 < 100); 2760#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2759#L10-2 assume !!(main_~i~0 < 100); 2758#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2757#L10-2 assume !!(main_~i~0 < 100); 2756#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2755#L10-2 assume !!(main_~i~0 < 100); 2754#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2753#L10-2 assume !!(main_~i~0 < 100); 2752#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2751#L10-2 assume !!(main_~i~0 < 100); 2750#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2749#L10-2 assume !!(main_~i~0 < 100); 2748#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2747#L10-2 assume !!(main_~i~0 < 100); 2746#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2745#L10-2 assume !!(main_~i~0 < 100); 2744#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2743#L10-2 assume !!(main_~i~0 < 100); 2742#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2741#L10-2 assume !!(main_~i~0 < 100); 2740#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2739#L10-2 assume !!(main_~i~0 < 100); 2738#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2737#L10-2 assume !!(main_~i~0 < 100); 2736#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2735#L10-2 assume !!(main_~i~0 < 100); 2734#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2733#L10-2 assume !!(main_~i~0 < 100); 2731#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2730#L10-2 assume !!(main_~i~0 < 100); 2729#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2728#L10-2 assume !!(main_~i~0 < 100); 2720#L10 [2019-12-07 12:21:29,045 INFO L796 eck$LassoCheckResult]: Loop: 2720#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 2721#L10-2 assume !!(main_~i~0 < 100); 2729#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2728#L10-2 assume !!(main_~i~0 < 100); 2720#L10 [2019-12-07 12:21:29,045 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:29,045 INFO L82 PathProgramCache]: Analyzing trace with hash -2091478348, now seen corresponding path program 18 times [2019-12-07 12:21:29,045 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:29,045 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1788571541] [2019-12-07 12:21:29,046 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:29,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:29,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:29,052 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:29,052 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:29,052 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 16 times [2019-12-07 12:21:29,052 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:29,052 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [818604316] [2019-12-07 12:21:29,052 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:29,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:29,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:29,054 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:29,054 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:29,054 INFO L82 PathProgramCache]: Analyzing trace with hash -72543892, now seen corresponding path program 18 times [2019-12-07 12:21:29,054 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:29,054 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [685845676] [2019-12-07 12:21:29,054 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:29,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:29,181 INFO L134 CoverageAnalysis]: Checked inductivity of 400 backedges. 57 proven. 342 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:29,181 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [685845676] [2019-12-07 12:21:29,182 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [297589888] [2019-12-07 12:21:29,182 INFO L92 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:29,205 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 21 check-sat command(s) [2019-12-07 12:21:29,205 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:29,206 INFO L264 TraceCheckSpWp]: Trace formula consists of 85 conjuncts, 20 conjunts are in the unsatisfiable core [2019-12-07 12:21:29,206 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:29,212 INFO L134 CoverageAnalysis]: Checked inductivity of 400 backedges. 57 proven. 342 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:29,213 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:29,213 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20] total 20 [2019-12-07 12:21:29,213 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1486455744] [2019-12-07 12:21:29,228 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:29,228 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2019-12-07 12:21:29,228 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=210, Invalid=210, Unknown=0, NotChecked=0, Total=420 [2019-12-07 12:21:29,229 INFO L87 Difference]: Start difference. First operand 41 states and 43 transitions. cyclomatic complexity: 3 Second operand 21 states. [2019-12-07 12:21:29,256 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:29,256 INFO L93 Difference]: Finished difference Result 45 states and 47 transitions. [2019-12-07 12:21:29,256 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 12:21:29,256 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 45 states and 47 transitions. [2019-12-07 12:21:29,257 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:29,257 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 45 states to 44 states and 46 transitions. [2019-12-07 12:21:29,257 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:29,257 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:29,257 INFO L73 IsDeterministic]: Start isDeterministic. Operand 44 states and 46 transitions. [2019-12-07 12:21:29,257 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:29,257 INFO L688 BuchiCegarLoop]: Abstraction has 44 states and 46 transitions. [2019-12-07 12:21:29,258 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states and 46 transitions. [2019-12-07 12:21:29,259 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 43. [2019-12-07 12:21:29,259 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2019-12-07 12:21:29,259 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 45 transitions. [2019-12-07 12:21:29,259 INFO L711 BuchiCegarLoop]: Abstraction has 43 states and 45 transitions. [2019-12-07 12:21:29,259 INFO L591 BuchiCegarLoop]: Abstraction has 43 states and 45 transitions. [2019-12-07 12:21:29,259 INFO L424 BuchiCegarLoop]: ======== Iteration 21============ [2019-12-07 12:21:29,259 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 43 states and 45 transitions. [2019-12-07 12:21:29,259 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:29,259 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:29,259 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:29,260 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [20, 19, 1] [2019-12-07 12:21:29,260 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:29,260 INFO L794 eck$LassoCheckResult]: Stem: 2959#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 2960#L10-2 assume !!(main_~i~0 < 100); 2961#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2962#L10-2 assume !!(main_~i~0 < 100); 2957#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2958#L10-2 assume !!(main_~i~0 < 100); 2997#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2996#L10-2 assume !!(main_~i~0 < 100); 2995#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2994#L10-2 assume !!(main_~i~0 < 100); 2993#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2992#L10-2 assume !!(main_~i~0 < 100); 2991#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2990#L10-2 assume !!(main_~i~0 < 100); 2989#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2988#L10-2 assume !!(main_~i~0 < 100); 2987#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2986#L10-2 assume !!(main_~i~0 < 100); 2985#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2984#L10-2 assume !!(main_~i~0 < 100); 2983#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2982#L10-2 assume !!(main_~i~0 < 100); 2981#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2980#L10-2 assume !!(main_~i~0 < 100); 2979#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2978#L10-2 assume !!(main_~i~0 < 100); 2977#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2976#L10-2 assume !!(main_~i~0 < 100); 2975#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2974#L10-2 assume !!(main_~i~0 < 100); 2973#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2972#L10-2 assume !!(main_~i~0 < 100); 2971#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2970#L10-2 assume !!(main_~i~0 < 100); 2969#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2968#L10-2 assume !!(main_~i~0 < 100); 2966#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2965#L10-2 assume !!(main_~i~0 < 100); 2964#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2963#L10-2 assume !!(main_~i~0 < 100); 2955#L10 [2019-12-07 12:21:29,260 INFO L796 eck$LassoCheckResult]: Loop: 2955#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 2956#L10-2 assume !!(main_~i~0 < 100); 2964#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 2963#L10-2 assume !!(main_~i~0 < 100); 2955#L10 [2019-12-07 12:21:29,260 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:29,260 INFO L82 PathProgramCache]: Analyzing trace with hash 134002513, now seen corresponding path program 19 times [2019-12-07 12:21:29,260 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:29,260 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1634226824] [2019-12-07 12:21:29,260 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:29,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:29,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:29,267 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:29,267 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:29,267 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 17 times [2019-12-07 12:21:29,267 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:29,267 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1595303339] [2019-12-07 12:21:29,267 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:29,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:29,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:29,269 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:29,269 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:29,269 INFO L82 PathProgramCache]: Analyzing trace with hash -1052401783, now seen corresponding path program 19 times [2019-12-07 12:21:29,269 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:29,269 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1085294083] [2019-12-07 12:21:29,269 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:29,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:29,409 INFO L134 CoverageAnalysis]: Checked inductivity of 441 backedges. 60 proven. 380 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:29,409 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1085294083] [2019-12-07 12:21:29,409 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [311268305] [2019-12-07 12:21:29,409 INFO L92 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:29,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:29,429 INFO L264 TraceCheckSpWp]: Trace formula consists of 89 conjuncts, 21 conjunts are in the unsatisfiable core [2019-12-07 12:21:29,430 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:29,436 INFO L134 CoverageAnalysis]: Checked inductivity of 441 backedges. 60 proven. 380 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:29,436 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:29,436 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21] total 21 [2019-12-07 12:21:29,436 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [621356974] [2019-12-07 12:21:29,454 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:29,454 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2019-12-07 12:21:29,454 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=231, Invalid=231, Unknown=0, NotChecked=0, Total=462 [2019-12-07 12:21:29,455 INFO L87 Difference]: Start difference. First operand 43 states and 45 transitions. cyclomatic complexity: 3 Second operand 22 states. [2019-12-07 12:21:29,491 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:29,491 INFO L93 Difference]: Finished difference Result 47 states and 49 transitions. [2019-12-07 12:21:29,491 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 12:21:29,491 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 47 states and 49 transitions. [2019-12-07 12:21:29,492 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:29,492 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 47 states to 46 states and 48 transitions. [2019-12-07 12:21:29,492 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:29,492 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:29,492 INFO L73 IsDeterministic]: Start isDeterministic. Operand 46 states and 48 transitions. [2019-12-07 12:21:29,492 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:29,492 INFO L688 BuchiCegarLoop]: Abstraction has 46 states and 48 transitions. [2019-12-07 12:21:29,493 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states and 48 transitions. [2019-12-07 12:21:29,493 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 45. [2019-12-07 12:21:29,494 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2019-12-07 12:21:29,494 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 47 transitions. [2019-12-07 12:21:29,494 INFO L711 BuchiCegarLoop]: Abstraction has 45 states and 47 transitions. [2019-12-07 12:21:29,494 INFO L591 BuchiCegarLoop]: Abstraction has 45 states and 47 transitions. [2019-12-07 12:21:29,494 INFO L424 BuchiCegarLoop]: ======== Iteration 22============ [2019-12-07 12:21:29,494 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 45 states and 47 transitions. [2019-12-07 12:21:29,494 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:29,494 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:29,494 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:29,495 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [21, 20, 1] [2019-12-07 12:21:29,495 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:29,495 INFO L794 eck$LassoCheckResult]: Stem: 3205#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 3206#L10-2 assume !!(main_~i~0 < 100); 3207#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3208#L10-2 assume !!(main_~i~0 < 100); 3203#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3204#L10-2 assume !!(main_~i~0 < 100); 3245#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3244#L10-2 assume !!(main_~i~0 < 100); 3243#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3242#L10-2 assume !!(main_~i~0 < 100); 3241#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3240#L10-2 assume !!(main_~i~0 < 100); 3239#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3238#L10-2 assume !!(main_~i~0 < 100); 3237#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3236#L10-2 assume !!(main_~i~0 < 100); 3235#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3234#L10-2 assume !!(main_~i~0 < 100); 3233#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3232#L10-2 assume !!(main_~i~0 < 100); 3231#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3230#L10-2 assume !!(main_~i~0 < 100); 3229#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3228#L10-2 assume !!(main_~i~0 < 100); 3227#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3226#L10-2 assume !!(main_~i~0 < 100); 3225#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3224#L10-2 assume !!(main_~i~0 < 100); 3223#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3222#L10-2 assume !!(main_~i~0 < 100); 3221#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3220#L10-2 assume !!(main_~i~0 < 100); 3219#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3218#L10-2 assume !!(main_~i~0 < 100); 3217#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3216#L10-2 assume !!(main_~i~0 < 100); 3215#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3214#L10-2 assume !!(main_~i~0 < 100); 3212#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3211#L10-2 assume !!(main_~i~0 < 100); 3210#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3209#L10-2 assume !!(main_~i~0 < 100); 3201#L10 [2019-12-07 12:21:29,495 INFO L796 eck$LassoCheckResult]: Loop: 3201#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 3202#L10-2 assume !!(main_~i~0 < 100); 3210#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3209#L10-2 assume !!(main_~i~0 < 100); 3201#L10 [2019-12-07 12:21:29,495 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:29,495 INFO L82 PathProgramCache]: Analyzing trace with hash -72603474, now seen corresponding path program 20 times [2019-12-07 12:21:29,495 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:29,495 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [450660778] [2019-12-07 12:21:29,495 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:29,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:29,501 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:29,502 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:29,502 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:29,502 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 18 times [2019-12-07 12:21:29,502 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:29,502 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [784460070] [2019-12-07 12:21:29,503 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:29,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:29,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:29,504 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:29,505 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:29,505 INFO L82 PathProgramCache]: Analyzing trace with hash -2097997210, now seen corresponding path program 20 times [2019-12-07 12:21:29,505 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:29,505 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [434936277] [2019-12-07 12:21:29,505 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:29,508 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:29,661 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 63 proven. 420 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:29,662 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [434936277] [2019-12-07 12:21:29,662 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [353039574] [2019-12-07 12:21:29,662 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:29,681 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2019-12-07 12:21:29,681 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:29,682 INFO L264 TraceCheckSpWp]: Trace formula consists of 93 conjuncts, 22 conjunts are in the unsatisfiable core [2019-12-07 12:21:29,682 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:29,690 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 63 proven. 420 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:29,690 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:29,690 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22] total 22 [2019-12-07 12:21:29,691 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1564865981] [2019-12-07 12:21:29,719 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:29,719 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2019-12-07 12:21:29,719 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=253, Invalid=253, Unknown=0, NotChecked=0, Total=506 [2019-12-07 12:21:29,719 INFO L87 Difference]: Start difference. First operand 45 states and 47 transitions. cyclomatic complexity: 3 Second operand 23 states. [2019-12-07 12:21:29,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:29,764 INFO L93 Difference]: Finished difference Result 49 states and 51 transitions. [2019-12-07 12:21:29,764 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-12-07 12:21:29,764 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 49 states and 51 transitions. [2019-12-07 12:21:29,764 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:29,765 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 49 states to 48 states and 50 transitions. [2019-12-07 12:21:29,765 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:29,765 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:29,765 INFO L73 IsDeterministic]: Start isDeterministic. Operand 48 states and 50 transitions. [2019-12-07 12:21:29,765 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:29,765 INFO L688 BuchiCegarLoop]: Abstraction has 48 states and 50 transitions. [2019-12-07 12:21:29,765 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states and 50 transitions. [2019-12-07 12:21:29,766 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 47. [2019-12-07 12:21:29,766 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47 states. [2019-12-07 12:21:29,766 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 49 transitions. [2019-12-07 12:21:29,766 INFO L711 BuchiCegarLoop]: Abstraction has 47 states and 49 transitions. [2019-12-07 12:21:29,766 INFO L591 BuchiCegarLoop]: Abstraction has 47 states and 49 transitions. [2019-12-07 12:21:29,766 INFO L424 BuchiCegarLoop]: ======== Iteration 23============ [2019-12-07 12:21:29,766 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 47 states and 49 transitions. [2019-12-07 12:21:29,767 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:29,767 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:29,767 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:29,767 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [22, 21, 1] [2019-12-07 12:21:29,767 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:29,767 INFO L794 eck$LassoCheckResult]: Stem: 3462#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 3463#L10-2 assume !!(main_~i~0 < 100); 3464#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3465#L10-2 assume !!(main_~i~0 < 100); 3460#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3461#L10-2 assume !!(main_~i~0 < 100); 3504#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3503#L10-2 assume !!(main_~i~0 < 100); 3502#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3501#L10-2 assume !!(main_~i~0 < 100); 3500#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3499#L10-2 assume !!(main_~i~0 < 100); 3498#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3497#L10-2 assume !!(main_~i~0 < 100); 3496#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3495#L10-2 assume !!(main_~i~0 < 100); 3494#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3493#L10-2 assume !!(main_~i~0 < 100); 3492#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3491#L10-2 assume !!(main_~i~0 < 100); 3490#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3489#L10-2 assume !!(main_~i~0 < 100); 3488#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3487#L10-2 assume !!(main_~i~0 < 100); 3486#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3485#L10-2 assume !!(main_~i~0 < 100); 3484#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3483#L10-2 assume !!(main_~i~0 < 100); 3482#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3481#L10-2 assume !!(main_~i~0 < 100); 3480#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3479#L10-2 assume !!(main_~i~0 < 100); 3478#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3477#L10-2 assume !!(main_~i~0 < 100); 3476#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3475#L10-2 assume !!(main_~i~0 < 100); 3474#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3473#L10-2 assume !!(main_~i~0 < 100); 3472#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3471#L10-2 assume !!(main_~i~0 < 100); 3469#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3468#L10-2 assume !!(main_~i~0 < 100); 3467#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3466#L10-2 assume !!(main_~i~0 < 100); 3458#L10 [2019-12-07 12:21:29,767 INFO L796 eck$LassoCheckResult]: Loop: 3458#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 3459#L10-2 assume !!(main_~i~0 < 100); 3467#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3466#L10-2 assume !!(main_~i~0 < 100); 3458#L10 [2019-12-07 12:21:29,767 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:29,767 INFO L82 PathProgramCache]: Analyzing trace with hash -1052461365, now seen corresponding path program 21 times [2019-12-07 12:21:29,768 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:29,768 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2110796878] [2019-12-07 12:21:29,768 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:29,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:29,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:29,774 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:29,774 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:29,774 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 19 times [2019-12-07 12:21:29,774 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:29,775 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1662092085] [2019-12-07 12:21:29,775 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:29,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:29,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:29,776 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:29,777 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:29,777 INFO L82 PathProgramCache]: Analyzing trace with hash -1892855293, now seen corresponding path program 21 times [2019-12-07 12:21:29,777 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:29,777 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [658029972] [2019-12-07 12:21:29,777 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:29,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:29,955 INFO L134 CoverageAnalysis]: Checked inductivity of 529 backedges. 66 proven. 462 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:29,955 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [658029972] [2019-12-07 12:21:29,956 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1776118703] [2019-12-07 12:21:29,956 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:29,984 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 24 check-sat command(s) [2019-12-07 12:21:29,984 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:29,985 INFO L264 TraceCheckSpWp]: Trace formula consists of 97 conjuncts, 23 conjunts are in the unsatisfiable core [2019-12-07 12:21:29,985 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:29,993 INFO L134 CoverageAnalysis]: Checked inductivity of 529 backedges. 66 proven. 462 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:29,993 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:29,993 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23] total 23 [2019-12-07 12:21:29,993 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1269809736] [2019-12-07 12:21:30,012 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:30,012 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2019-12-07 12:21:30,013 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=276, Invalid=276, Unknown=0, NotChecked=0, Total=552 [2019-12-07 12:21:30,013 INFO L87 Difference]: Start difference. First operand 47 states and 49 transitions. cyclomatic complexity: 3 Second operand 24 states. [2019-12-07 12:21:30,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:30,064 INFO L93 Difference]: Finished difference Result 51 states and 53 transitions. [2019-12-07 12:21:30,064 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 12:21:30,064 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 53 transitions. [2019-12-07 12:21:30,065 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:30,065 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 50 states and 52 transitions. [2019-12-07 12:21:30,065 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:30,065 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:30,065 INFO L73 IsDeterministic]: Start isDeterministic. Operand 50 states and 52 transitions. [2019-12-07 12:21:30,065 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:30,066 INFO L688 BuchiCegarLoop]: Abstraction has 50 states and 52 transitions. [2019-12-07 12:21:30,066 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states and 52 transitions. [2019-12-07 12:21:30,066 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 49. [2019-12-07 12:21:30,067 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2019-12-07 12:21:30,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 51 transitions. [2019-12-07 12:21:30,067 INFO L711 BuchiCegarLoop]: Abstraction has 49 states and 51 transitions. [2019-12-07 12:21:30,067 INFO L591 BuchiCegarLoop]: Abstraction has 49 states and 51 transitions. [2019-12-07 12:21:30,067 INFO L424 BuchiCegarLoop]: ======== Iteration 24============ [2019-12-07 12:21:30,067 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 49 states and 51 transitions. [2019-12-07 12:21:30,067 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:30,067 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:30,067 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:30,068 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [23, 22, 1] [2019-12-07 12:21:30,068 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:30,068 INFO L794 eck$LassoCheckResult]: Stem: 3730#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 3731#L10-2 assume !!(main_~i~0 < 100); 3732#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3733#L10-2 assume !!(main_~i~0 < 100); 3728#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3729#L10-2 assume !!(main_~i~0 < 100); 3774#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3773#L10-2 assume !!(main_~i~0 < 100); 3772#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3771#L10-2 assume !!(main_~i~0 < 100); 3770#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3769#L10-2 assume !!(main_~i~0 < 100); 3768#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3767#L10-2 assume !!(main_~i~0 < 100); 3766#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3765#L10-2 assume !!(main_~i~0 < 100); 3764#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3763#L10-2 assume !!(main_~i~0 < 100); 3762#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3761#L10-2 assume !!(main_~i~0 < 100); 3760#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3759#L10-2 assume !!(main_~i~0 < 100); 3758#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3757#L10-2 assume !!(main_~i~0 < 100); 3756#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3755#L10-2 assume !!(main_~i~0 < 100); 3754#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3753#L10-2 assume !!(main_~i~0 < 100); 3752#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3751#L10-2 assume !!(main_~i~0 < 100); 3750#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3749#L10-2 assume !!(main_~i~0 < 100); 3748#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3747#L10-2 assume !!(main_~i~0 < 100); 3746#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3745#L10-2 assume !!(main_~i~0 < 100); 3744#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3743#L10-2 assume !!(main_~i~0 < 100); 3742#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3741#L10-2 assume !!(main_~i~0 < 100); 3740#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3739#L10-2 assume !!(main_~i~0 < 100); 3737#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3736#L10-2 assume !!(main_~i~0 < 100); 3735#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3734#L10-2 assume !!(main_~i~0 < 100); 3726#L10 [2019-12-07 12:21:30,068 INFO L796 eck$LassoCheckResult]: Loop: 3726#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 3727#L10-2 assume !!(main_~i~0 < 100); 3735#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 3734#L10-2 assume !!(main_~i~0 < 100); 3726#L10 [2019-12-07 12:21:30,068 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:30,068 INFO L82 PathProgramCache]: Analyzing trace with hash -2098056792, now seen corresponding path program 22 times [2019-12-07 12:21:30,068 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:30,068 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1897088426] [2019-12-07 12:21:30,068 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:30,072 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:30,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:30,077 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:30,078 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:30,078 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 20 times [2019-12-07 12:21:30,078 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:30,078 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [490127490] [2019-12-07 12:21:30,078 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:30,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:30,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:30,080 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:30,081 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:30,081 INFO L82 PathProgramCache]: Analyzing trace with hash 1974998624, now seen corresponding path program 22 times [2019-12-07 12:21:30,081 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:30,081 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2066086988] [2019-12-07 12:21:30,081 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:30,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:30,279 INFO L134 CoverageAnalysis]: Checked inductivity of 576 backedges. 69 proven. 506 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:30,279 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2066086988] [2019-12-07 12:21:30,279 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [830561076] [2019-12-07 12:21:30,279 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:30,298 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-12-07 12:21:30,298 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:30,299 INFO L264 TraceCheckSpWp]: Trace formula consists of 101 conjuncts, 24 conjunts are in the unsatisfiable core [2019-12-07 12:21:30,299 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:30,305 INFO L134 CoverageAnalysis]: Checked inductivity of 576 backedges. 69 proven. 506 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:30,306 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:30,306 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24] total 24 [2019-12-07 12:21:30,306 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1952673457] [2019-12-07 12:21:30,319 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:30,320 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2019-12-07 12:21:30,320 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2019-12-07 12:21:30,320 INFO L87 Difference]: Start difference. First operand 49 states and 51 transitions. cyclomatic complexity: 3 Second operand 25 states. [2019-12-07 12:21:30,361 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:30,361 INFO L93 Difference]: Finished difference Result 53 states and 55 transitions. [2019-12-07 12:21:30,361 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 12:21:30,361 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 53 states and 55 transitions. [2019-12-07 12:21:30,362 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:30,362 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 53 states to 52 states and 54 transitions. [2019-12-07 12:21:30,362 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:30,362 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:30,362 INFO L73 IsDeterministic]: Start isDeterministic. Operand 52 states and 54 transitions. [2019-12-07 12:21:30,362 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:30,362 INFO L688 BuchiCegarLoop]: Abstraction has 52 states and 54 transitions. [2019-12-07 12:21:30,363 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states and 54 transitions. [2019-12-07 12:21:30,363 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 51. [2019-12-07 12:21:30,363 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2019-12-07 12:21:30,363 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 53 transitions. [2019-12-07 12:21:30,363 INFO L711 BuchiCegarLoop]: Abstraction has 51 states and 53 transitions. [2019-12-07 12:21:30,364 INFO L591 BuchiCegarLoop]: Abstraction has 51 states and 53 transitions. [2019-12-07 12:21:30,364 INFO L424 BuchiCegarLoop]: ======== Iteration 25============ [2019-12-07 12:21:30,364 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 51 states and 53 transitions. [2019-12-07 12:21:30,364 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:30,364 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:30,364 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:30,364 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [24, 23, 1] [2019-12-07 12:21:30,364 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:30,364 INFO L794 eck$LassoCheckResult]: Stem: 4009#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 4010#L10-2 assume !!(main_~i~0 < 100); 4011#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4012#L10-2 assume !!(main_~i~0 < 100); 4007#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4008#L10-2 assume !!(main_~i~0 < 100); 4055#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4054#L10-2 assume !!(main_~i~0 < 100); 4053#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4052#L10-2 assume !!(main_~i~0 < 100); 4051#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4050#L10-2 assume !!(main_~i~0 < 100); 4049#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4048#L10-2 assume !!(main_~i~0 < 100); 4047#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4046#L10-2 assume !!(main_~i~0 < 100); 4045#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4044#L10-2 assume !!(main_~i~0 < 100); 4043#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4042#L10-2 assume !!(main_~i~0 < 100); 4041#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4040#L10-2 assume !!(main_~i~0 < 100); 4039#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4038#L10-2 assume !!(main_~i~0 < 100); 4037#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4036#L10-2 assume !!(main_~i~0 < 100); 4035#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4034#L10-2 assume !!(main_~i~0 < 100); 4033#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4032#L10-2 assume !!(main_~i~0 < 100); 4031#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4030#L10-2 assume !!(main_~i~0 < 100); 4029#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4028#L10-2 assume !!(main_~i~0 < 100); 4027#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4026#L10-2 assume !!(main_~i~0 < 100); 4025#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4024#L10-2 assume !!(main_~i~0 < 100); 4023#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4022#L10-2 assume !!(main_~i~0 < 100); 4021#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4020#L10-2 assume !!(main_~i~0 < 100); 4019#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4018#L10-2 assume !!(main_~i~0 < 100); 4016#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4015#L10-2 assume !!(main_~i~0 < 100); 4014#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4013#L10-2 assume !!(main_~i~0 < 100); 4005#L10 [2019-12-07 12:21:30,365 INFO L796 eck$LassoCheckResult]: Loop: 4005#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 4006#L10-2 assume !!(main_~i~0 < 100); 4014#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4013#L10-2 assume !!(main_~i~0 < 100); 4005#L10 [2019-12-07 12:21:30,365 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:30,365 INFO L82 PathProgramCache]: Analyzing trace with hash -1892914875, now seen corresponding path program 23 times [2019-12-07 12:21:30,365 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:30,365 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [891132085] [2019-12-07 12:21:30,365 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:30,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:30,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:30,371 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:30,372 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:30,372 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 21 times [2019-12-07 12:21:30,372 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:30,372 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1437327382] [2019-12-07 12:21:30,372 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:30,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:30,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:30,374 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:30,374 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:30,374 INFO L82 PathProgramCache]: Analyzing trace with hash -459065475, now seen corresponding path program 23 times [2019-12-07 12:21:30,374 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:30,374 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [890158475] [2019-12-07 12:21:30,374 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:30,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:30,573 INFO L134 CoverageAnalysis]: Checked inductivity of 625 backedges. 72 proven. 552 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:30,573 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [890158475] [2019-12-07 12:21:30,573 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [79585647] [2019-12-07 12:21:30,573 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 45 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:30,601 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 26 check-sat command(s) [2019-12-07 12:21:30,601 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:30,602 INFO L264 TraceCheckSpWp]: Trace formula consists of 105 conjuncts, 25 conjunts are in the unsatisfiable core [2019-12-07 12:21:30,602 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:30,609 INFO L134 CoverageAnalysis]: Checked inductivity of 625 backedges. 72 proven. 552 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:30,609 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:30,609 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25] total 25 [2019-12-07 12:21:30,609 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [917198768] [2019-12-07 12:21:30,625 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:30,625 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2019-12-07 12:21:30,625 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=325, Invalid=325, Unknown=0, NotChecked=0, Total=650 [2019-12-07 12:21:30,625 INFO L87 Difference]: Start difference. First operand 51 states and 53 transitions. cyclomatic complexity: 3 Second operand 26 states. [2019-12-07 12:21:30,671 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:30,671 INFO L93 Difference]: Finished difference Result 55 states and 57 transitions. [2019-12-07 12:21:30,671 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2019-12-07 12:21:30,672 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 55 states and 57 transitions. [2019-12-07 12:21:30,672 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:30,673 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 55 states to 54 states and 56 transitions. [2019-12-07 12:21:30,673 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:30,673 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:30,673 INFO L73 IsDeterministic]: Start isDeterministic. Operand 54 states and 56 transitions. [2019-12-07 12:21:30,673 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:30,673 INFO L688 BuchiCegarLoop]: Abstraction has 54 states and 56 transitions. [2019-12-07 12:21:30,673 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states and 56 transitions. [2019-12-07 12:21:30,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 53. [2019-12-07 12:21:30,674 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2019-12-07 12:21:30,675 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 55 transitions. [2019-12-07 12:21:30,675 INFO L711 BuchiCegarLoop]: Abstraction has 53 states and 55 transitions. [2019-12-07 12:21:30,675 INFO L591 BuchiCegarLoop]: Abstraction has 53 states and 55 transitions. [2019-12-07 12:21:30,675 INFO L424 BuchiCegarLoop]: ======== Iteration 26============ [2019-12-07 12:21:30,675 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 53 states and 55 transitions. [2019-12-07 12:21:30,675 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:30,675 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:30,676 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:30,676 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [25, 24, 1] [2019-12-07 12:21:30,676 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:30,676 INFO L794 eck$LassoCheckResult]: Stem: 4299#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 4300#L10-2 assume !!(main_~i~0 < 100); 4301#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4302#L10-2 assume !!(main_~i~0 < 100); 4297#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4298#L10-2 assume !!(main_~i~0 < 100); 4347#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4346#L10-2 assume !!(main_~i~0 < 100); 4345#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4344#L10-2 assume !!(main_~i~0 < 100); 4343#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4342#L10-2 assume !!(main_~i~0 < 100); 4341#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4340#L10-2 assume !!(main_~i~0 < 100); 4339#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4338#L10-2 assume !!(main_~i~0 < 100); 4337#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4336#L10-2 assume !!(main_~i~0 < 100); 4335#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4334#L10-2 assume !!(main_~i~0 < 100); 4333#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4332#L10-2 assume !!(main_~i~0 < 100); 4331#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4330#L10-2 assume !!(main_~i~0 < 100); 4329#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4328#L10-2 assume !!(main_~i~0 < 100); 4327#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4326#L10-2 assume !!(main_~i~0 < 100); 4325#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4324#L10-2 assume !!(main_~i~0 < 100); 4323#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4322#L10-2 assume !!(main_~i~0 < 100); 4321#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4320#L10-2 assume !!(main_~i~0 < 100); 4319#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4318#L10-2 assume !!(main_~i~0 < 100); 4317#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4316#L10-2 assume !!(main_~i~0 < 100); 4315#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4314#L10-2 assume !!(main_~i~0 < 100); 4313#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4312#L10-2 assume !!(main_~i~0 < 100); 4311#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4310#L10-2 assume !!(main_~i~0 < 100); 4309#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4308#L10-2 assume !!(main_~i~0 < 100); 4306#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4305#L10-2 assume !!(main_~i~0 < 100); 4304#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4303#L10-2 assume !!(main_~i~0 < 100); 4295#L10 [2019-12-07 12:21:30,676 INFO L796 eck$LassoCheckResult]: Loop: 4295#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 4296#L10-2 assume !!(main_~i~0 < 100); 4304#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4303#L10-2 assume !!(main_~i~0 < 100); 4295#L10 [2019-12-07 12:21:30,677 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:30,677 INFO L82 PathProgramCache]: Analyzing trace with hash 1974939042, now seen corresponding path program 24 times [2019-12-07 12:21:30,677 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:30,677 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1810562493] [2019-12-07 12:21:30,677 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:30,680 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:30,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:30,685 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:30,685 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:30,685 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 22 times [2019-12-07 12:21:30,685 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:30,685 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1181516943] [2019-12-07 12:21:30,685 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:30,686 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:30,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:30,687 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:30,688 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:30,688 INFO L82 PathProgramCache]: Analyzing trace with hash 1162511706, now seen corresponding path program 24 times [2019-12-07 12:21:30,688 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:30,688 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [647553980] [2019-12-07 12:21:30,688 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:30,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:30,922 INFO L134 CoverageAnalysis]: Checked inductivity of 676 backedges. 75 proven. 600 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:30,922 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [647553980] [2019-12-07 12:21:30,922 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [643948862] [2019-12-07 12:21:30,922 INFO L92 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:30,950 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 27 check-sat command(s) [2019-12-07 12:21:30,951 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:30,951 INFO L264 TraceCheckSpWp]: Trace formula consists of 109 conjuncts, 26 conjunts are in the unsatisfiable core [2019-12-07 12:21:30,952 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:30,961 INFO L134 CoverageAnalysis]: Checked inductivity of 676 backedges. 75 proven. 600 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:30,962 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:30,962 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26] total 26 [2019-12-07 12:21:30,962 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1306965363] [2019-12-07 12:21:30,981 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:30,981 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2019-12-07 12:21:30,981 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=351, Invalid=351, Unknown=0, NotChecked=0, Total=702 [2019-12-07 12:21:30,981 INFO L87 Difference]: Start difference. First operand 53 states and 55 transitions. cyclomatic complexity: 3 Second operand 27 states. [2019-12-07 12:21:31,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:31,031 INFO L93 Difference]: Finished difference Result 57 states and 59 transitions. [2019-12-07 12:21:31,032 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2019-12-07 12:21:31,032 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 57 states and 59 transitions. [2019-12-07 12:21:31,032 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:31,033 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 57 states to 56 states and 58 transitions. [2019-12-07 12:21:31,033 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:31,033 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:31,033 INFO L73 IsDeterministic]: Start isDeterministic. Operand 56 states and 58 transitions. [2019-12-07 12:21:31,034 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:31,034 INFO L688 BuchiCegarLoop]: Abstraction has 56 states and 58 transitions. [2019-12-07 12:21:31,034 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states and 58 transitions. [2019-12-07 12:21:31,035 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 55. [2019-12-07 12:21:31,035 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55 states. [2019-12-07 12:21:31,035 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 57 transitions. [2019-12-07 12:21:31,035 INFO L711 BuchiCegarLoop]: Abstraction has 55 states and 57 transitions. [2019-12-07 12:21:31,035 INFO L591 BuchiCegarLoop]: Abstraction has 55 states and 57 transitions. [2019-12-07 12:21:31,036 INFO L424 BuchiCegarLoop]: ======== Iteration 27============ [2019-12-07 12:21:31,036 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 55 states and 57 transitions. [2019-12-07 12:21:31,036 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:31,036 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:31,036 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:31,037 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [26, 25, 1] [2019-12-07 12:21:31,037 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:31,037 INFO L794 eck$LassoCheckResult]: Stem: 4600#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 4601#L10-2 assume !!(main_~i~0 < 100); 4602#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4603#L10-2 assume !!(main_~i~0 < 100); 4598#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4599#L10-2 assume !!(main_~i~0 < 100); 4650#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4649#L10-2 assume !!(main_~i~0 < 100); 4648#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4647#L10-2 assume !!(main_~i~0 < 100); 4646#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4645#L10-2 assume !!(main_~i~0 < 100); 4644#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4643#L10-2 assume !!(main_~i~0 < 100); 4642#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4641#L10-2 assume !!(main_~i~0 < 100); 4640#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4639#L10-2 assume !!(main_~i~0 < 100); 4638#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4637#L10-2 assume !!(main_~i~0 < 100); 4636#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4635#L10-2 assume !!(main_~i~0 < 100); 4634#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4633#L10-2 assume !!(main_~i~0 < 100); 4632#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4631#L10-2 assume !!(main_~i~0 < 100); 4630#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4629#L10-2 assume !!(main_~i~0 < 100); 4628#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4627#L10-2 assume !!(main_~i~0 < 100); 4626#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4625#L10-2 assume !!(main_~i~0 < 100); 4624#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4623#L10-2 assume !!(main_~i~0 < 100); 4622#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4621#L10-2 assume !!(main_~i~0 < 100); 4620#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4619#L10-2 assume !!(main_~i~0 < 100); 4618#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4617#L10-2 assume !!(main_~i~0 < 100); 4616#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4615#L10-2 assume !!(main_~i~0 < 100); 4614#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4613#L10-2 assume !!(main_~i~0 < 100); 4612#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4611#L10-2 assume !!(main_~i~0 < 100); 4610#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4609#L10-2 assume !!(main_~i~0 < 100); 4607#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4606#L10-2 assume !!(main_~i~0 < 100); 4605#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4604#L10-2 assume !!(main_~i~0 < 100); 4596#L10 [2019-12-07 12:21:31,037 INFO L796 eck$LassoCheckResult]: Loop: 4596#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 4597#L10-2 assume !!(main_~i~0 < 100); 4605#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4604#L10-2 assume !!(main_~i~0 < 100); 4596#L10 [2019-12-07 12:21:31,037 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:31,037 INFO L82 PathProgramCache]: Analyzing trace with hash -459125057, now seen corresponding path program 25 times [2019-12-07 12:21:31,037 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:31,038 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [802994898] [2019-12-07 12:21:31,038 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:31,042 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:31,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:31,048 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:31,049 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:31,049 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 23 times [2019-12-07 12:21:31,049 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:31,049 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1849237137] [2019-12-07 12:21:31,049 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:31,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:31,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:31,052 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:31,052 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:31,052 INFO L82 PathProgramCache]: Analyzing trace with hash 425054199, now seen corresponding path program 25 times [2019-12-07 12:21:31,052 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:31,052 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [736766541] [2019-12-07 12:21:31,052 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:31,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:31,293 INFO L134 CoverageAnalysis]: Checked inductivity of 729 backedges. 78 proven. 650 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:31,293 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [736766541] [2019-12-07 12:21:31,293 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [573124462] [2019-12-07 12:21:31,293 INFO L92 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 47 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:31,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:31,313 INFO L264 TraceCheckSpWp]: Trace formula consists of 113 conjuncts, 27 conjunts are in the unsatisfiable core [2019-12-07 12:21:31,314 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:31,321 INFO L134 CoverageAnalysis]: Checked inductivity of 729 backedges. 78 proven. 650 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:31,321 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:31,321 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27] total 27 [2019-12-07 12:21:31,321 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1560986787] [2019-12-07 12:21:31,337 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:31,337 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2019-12-07 12:21:31,338 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=378, Invalid=378, Unknown=0, NotChecked=0, Total=756 [2019-12-07 12:21:31,338 INFO L87 Difference]: Start difference. First operand 55 states and 57 transitions. cyclomatic complexity: 3 Second operand 28 states. [2019-12-07 12:21:31,381 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:31,381 INFO L93 Difference]: Finished difference Result 59 states and 61 transitions. [2019-12-07 12:21:31,382 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-12-07 12:21:31,382 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 59 states and 61 transitions. [2019-12-07 12:21:31,382 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:31,382 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 59 states to 58 states and 60 transitions. [2019-12-07 12:21:31,382 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:31,383 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:31,383 INFO L73 IsDeterministic]: Start isDeterministic. Operand 58 states and 60 transitions. [2019-12-07 12:21:31,383 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:31,383 INFO L688 BuchiCegarLoop]: Abstraction has 58 states and 60 transitions. [2019-12-07 12:21:31,383 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states and 60 transitions. [2019-12-07 12:21:31,383 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 57. [2019-12-07 12:21:31,383 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2019-12-07 12:21:31,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 59 transitions. [2019-12-07 12:21:31,384 INFO L711 BuchiCegarLoop]: Abstraction has 57 states and 59 transitions. [2019-12-07 12:21:31,384 INFO L591 BuchiCegarLoop]: Abstraction has 57 states and 59 transitions. [2019-12-07 12:21:31,384 INFO L424 BuchiCegarLoop]: ======== Iteration 28============ [2019-12-07 12:21:31,384 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 57 states and 59 transitions. [2019-12-07 12:21:31,384 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:31,384 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:31,384 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:31,385 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [27, 26, 1] [2019-12-07 12:21:31,385 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:31,385 INFO L794 eck$LassoCheckResult]: Stem: 4912#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 4913#L10-2 assume !!(main_~i~0 < 100); 4914#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4915#L10-2 assume !!(main_~i~0 < 100); 4910#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4911#L10-2 assume !!(main_~i~0 < 100); 4964#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4963#L10-2 assume !!(main_~i~0 < 100); 4962#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4961#L10-2 assume !!(main_~i~0 < 100); 4960#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4959#L10-2 assume !!(main_~i~0 < 100); 4958#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4957#L10-2 assume !!(main_~i~0 < 100); 4956#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4955#L10-2 assume !!(main_~i~0 < 100); 4954#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4953#L10-2 assume !!(main_~i~0 < 100); 4952#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4951#L10-2 assume !!(main_~i~0 < 100); 4950#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4949#L10-2 assume !!(main_~i~0 < 100); 4948#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4947#L10-2 assume !!(main_~i~0 < 100); 4946#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4945#L10-2 assume !!(main_~i~0 < 100); 4944#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4943#L10-2 assume !!(main_~i~0 < 100); 4942#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4941#L10-2 assume !!(main_~i~0 < 100); 4940#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4939#L10-2 assume !!(main_~i~0 < 100); 4938#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4937#L10-2 assume !!(main_~i~0 < 100); 4936#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4935#L10-2 assume !!(main_~i~0 < 100); 4934#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4933#L10-2 assume !!(main_~i~0 < 100); 4932#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4931#L10-2 assume !!(main_~i~0 < 100); 4930#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4929#L10-2 assume !!(main_~i~0 < 100); 4928#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4927#L10-2 assume !!(main_~i~0 < 100); 4926#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4925#L10-2 assume !!(main_~i~0 < 100); 4924#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4923#L10-2 assume !!(main_~i~0 < 100); 4922#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4921#L10-2 assume !!(main_~i~0 < 100); 4919#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4918#L10-2 assume !!(main_~i~0 < 100); 4917#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4916#L10-2 assume !!(main_~i~0 < 100); 4908#L10 [2019-12-07 12:21:31,385 INFO L796 eck$LassoCheckResult]: Loop: 4908#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 4909#L10-2 assume !!(main_~i~0 < 100); 4917#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 4916#L10-2 assume !!(main_~i~0 < 100); 4908#L10 [2019-12-07 12:21:31,385 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:31,385 INFO L82 PathProgramCache]: Analyzing trace with hash 1162452124, now seen corresponding path program 26 times [2019-12-07 12:21:31,385 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:31,385 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [731456980] [2019-12-07 12:21:31,385 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:31,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:31,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:31,392 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:31,392 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:31,392 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 24 times [2019-12-07 12:21:31,393 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:31,393 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [210218056] [2019-12-07 12:21:31,393 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:31,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:31,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:31,394 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:31,395 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:31,395 INFO L82 PathProgramCache]: Analyzing trace with hash 397993812, now seen corresponding path program 26 times [2019-12-07 12:21:31,395 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:31,395 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1167133793] [2019-12-07 12:21:31,395 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:31,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:31,642 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 81 proven. 702 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:31,642 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1167133793] [2019-12-07 12:21:31,642 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [397303202] [2019-12-07 12:21:31,642 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:31,662 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2019-12-07 12:21:31,662 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:31,663 INFO L264 TraceCheckSpWp]: Trace formula consists of 117 conjuncts, 28 conjunts are in the unsatisfiable core [2019-12-07 12:21:31,664 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:31,671 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 81 proven. 702 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:31,671 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:31,671 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28] total 28 [2019-12-07 12:21:31,671 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1796978482] [2019-12-07 12:21:31,687 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:31,687 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2019-12-07 12:21:31,687 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=406, Invalid=406, Unknown=0, NotChecked=0, Total=812 [2019-12-07 12:21:31,687 INFO L87 Difference]: Start difference. First operand 57 states and 59 transitions. cyclomatic complexity: 3 Second operand 29 states. [2019-12-07 12:21:31,725 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:31,725 INFO L93 Difference]: Finished difference Result 61 states and 63 transitions. [2019-12-07 12:21:31,725 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2019-12-07 12:21:31,725 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 61 states and 63 transitions. [2019-12-07 12:21:31,726 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:31,726 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 61 states to 60 states and 62 transitions. [2019-12-07 12:21:31,726 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:31,726 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:31,726 INFO L73 IsDeterministic]: Start isDeterministic. Operand 60 states and 62 transitions. [2019-12-07 12:21:31,727 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:31,727 INFO L688 BuchiCegarLoop]: Abstraction has 60 states and 62 transitions. [2019-12-07 12:21:31,727 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states and 62 transitions. [2019-12-07 12:21:31,728 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 59. [2019-12-07 12:21:31,728 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59 states. [2019-12-07 12:21:31,728 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 61 transitions. [2019-12-07 12:21:31,728 INFO L711 BuchiCegarLoop]: Abstraction has 59 states and 61 transitions. [2019-12-07 12:21:31,728 INFO L591 BuchiCegarLoop]: Abstraction has 59 states and 61 transitions. [2019-12-07 12:21:31,728 INFO L424 BuchiCegarLoop]: ======== Iteration 29============ [2019-12-07 12:21:31,728 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 59 states and 61 transitions. [2019-12-07 12:21:31,728 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:31,729 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:31,729 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:31,729 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [28, 27, 1] [2019-12-07 12:21:31,729 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:31,729 INFO L794 eck$LassoCheckResult]: Stem: 5235#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 5236#L10-2 assume !!(main_~i~0 < 100); 5237#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5238#L10-2 assume !!(main_~i~0 < 100); 5233#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5234#L10-2 assume !!(main_~i~0 < 100); 5289#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5288#L10-2 assume !!(main_~i~0 < 100); 5287#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5286#L10-2 assume !!(main_~i~0 < 100); 5285#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5284#L10-2 assume !!(main_~i~0 < 100); 5283#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5282#L10-2 assume !!(main_~i~0 < 100); 5281#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5280#L10-2 assume !!(main_~i~0 < 100); 5279#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5278#L10-2 assume !!(main_~i~0 < 100); 5277#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5276#L10-2 assume !!(main_~i~0 < 100); 5275#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5274#L10-2 assume !!(main_~i~0 < 100); 5273#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5272#L10-2 assume !!(main_~i~0 < 100); 5271#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5270#L10-2 assume !!(main_~i~0 < 100); 5269#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5268#L10-2 assume !!(main_~i~0 < 100); 5267#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5266#L10-2 assume !!(main_~i~0 < 100); 5265#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5264#L10-2 assume !!(main_~i~0 < 100); 5263#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5262#L10-2 assume !!(main_~i~0 < 100); 5261#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5260#L10-2 assume !!(main_~i~0 < 100); 5259#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5258#L10-2 assume !!(main_~i~0 < 100); 5257#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5256#L10-2 assume !!(main_~i~0 < 100); 5255#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5254#L10-2 assume !!(main_~i~0 < 100); 5253#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5252#L10-2 assume !!(main_~i~0 < 100); 5251#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5250#L10-2 assume !!(main_~i~0 < 100); 5249#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5248#L10-2 assume !!(main_~i~0 < 100); 5247#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5246#L10-2 assume !!(main_~i~0 < 100); 5245#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5244#L10-2 assume !!(main_~i~0 < 100); 5242#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5241#L10-2 assume !!(main_~i~0 < 100); 5240#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5239#L10-2 assume !!(main_~i~0 < 100); 5231#L10 [2019-12-07 12:21:31,729 INFO L796 eck$LassoCheckResult]: Loop: 5231#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 5232#L10-2 assume !!(main_~i~0 < 100); 5240#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5239#L10-2 assume !!(main_~i~0 < 100); 5231#L10 [2019-12-07 12:21:31,729 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:31,729 INFO L82 PathProgramCache]: Analyzing trace with hash 424994617, now seen corresponding path program 27 times [2019-12-07 12:21:31,729 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:31,729 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1503684764] [2019-12-07 12:21:31,730 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:31,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:31,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:31,737 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:31,738 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:31,738 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 25 times [2019-12-07 12:21:31,738 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:31,738 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1506263460] [2019-12-07 12:21:31,738 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:31,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:31,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:31,740 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:31,740 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:31,740 INFO L82 PathProgramCache]: Analyzing trace with hash 162765681, now seen corresponding path program 27 times [2019-12-07 12:21:31,741 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:31,741 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1174342280] [2019-12-07 12:21:31,741 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:31,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:32,002 INFO L134 CoverageAnalysis]: Checked inductivity of 841 backedges. 84 proven. 756 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:32,002 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1174342280] [2019-12-07 12:21:32,003 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1779769932] [2019-12-07 12:21:32,003 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 49 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:32,032 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 30 check-sat command(s) [2019-12-07 12:21:32,032 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:32,033 INFO L264 TraceCheckSpWp]: Trace formula consists of 121 conjuncts, 29 conjunts are in the unsatisfiable core [2019-12-07 12:21:32,033 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:32,041 INFO L134 CoverageAnalysis]: Checked inductivity of 841 backedges. 84 proven. 756 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:32,041 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:32,041 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29] total 29 [2019-12-07 12:21:32,041 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [676248119] [2019-12-07 12:21:32,055 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:32,055 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2019-12-07 12:21:32,056 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=435, Invalid=435, Unknown=0, NotChecked=0, Total=870 [2019-12-07 12:21:32,056 INFO L87 Difference]: Start difference. First operand 59 states and 61 transitions. cyclomatic complexity: 3 Second operand 30 states. [2019-12-07 12:21:32,098 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:32,098 INFO L93 Difference]: Finished difference Result 63 states and 65 transitions. [2019-12-07 12:21:32,099 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2019-12-07 12:21:32,099 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 63 states and 65 transitions. [2019-12-07 12:21:32,099 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:32,099 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 63 states to 62 states and 64 transitions. [2019-12-07 12:21:32,099 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:32,100 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:32,100 INFO L73 IsDeterministic]: Start isDeterministic. Operand 62 states and 64 transitions. [2019-12-07 12:21:32,100 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:32,100 INFO L688 BuchiCegarLoop]: Abstraction has 62 states and 64 transitions. [2019-12-07 12:21:32,100 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states and 64 transitions. [2019-12-07 12:21:32,100 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 61. [2019-12-07 12:21:32,101 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61 states. [2019-12-07 12:21:32,101 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 63 transitions. [2019-12-07 12:21:32,101 INFO L711 BuchiCegarLoop]: Abstraction has 61 states and 63 transitions. [2019-12-07 12:21:32,101 INFO L591 BuchiCegarLoop]: Abstraction has 61 states and 63 transitions. [2019-12-07 12:21:32,101 INFO L424 BuchiCegarLoop]: ======== Iteration 30============ [2019-12-07 12:21:32,101 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 61 states and 63 transitions. [2019-12-07 12:21:32,101 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:32,101 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:32,101 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:32,102 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [29, 28, 1] [2019-12-07 12:21:32,102 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:32,102 INFO L794 eck$LassoCheckResult]: Stem: 5569#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 5570#L10-2 assume !!(main_~i~0 < 100); 5571#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5572#L10-2 assume !!(main_~i~0 < 100); 5567#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5568#L10-2 assume !!(main_~i~0 < 100); 5625#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5624#L10-2 assume !!(main_~i~0 < 100); 5623#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5622#L10-2 assume !!(main_~i~0 < 100); 5621#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5620#L10-2 assume !!(main_~i~0 < 100); 5619#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5618#L10-2 assume !!(main_~i~0 < 100); 5617#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5616#L10-2 assume !!(main_~i~0 < 100); 5615#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5614#L10-2 assume !!(main_~i~0 < 100); 5613#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5612#L10-2 assume !!(main_~i~0 < 100); 5611#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5610#L10-2 assume !!(main_~i~0 < 100); 5609#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5608#L10-2 assume !!(main_~i~0 < 100); 5607#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5606#L10-2 assume !!(main_~i~0 < 100); 5605#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5604#L10-2 assume !!(main_~i~0 < 100); 5603#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5602#L10-2 assume !!(main_~i~0 < 100); 5601#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5600#L10-2 assume !!(main_~i~0 < 100); 5599#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5598#L10-2 assume !!(main_~i~0 < 100); 5597#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5596#L10-2 assume !!(main_~i~0 < 100); 5595#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5594#L10-2 assume !!(main_~i~0 < 100); 5593#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5592#L10-2 assume !!(main_~i~0 < 100); 5591#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5590#L10-2 assume !!(main_~i~0 < 100); 5589#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5588#L10-2 assume !!(main_~i~0 < 100); 5587#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5586#L10-2 assume !!(main_~i~0 < 100); 5585#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5584#L10-2 assume !!(main_~i~0 < 100); 5583#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5582#L10-2 assume !!(main_~i~0 < 100); 5581#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5580#L10-2 assume !!(main_~i~0 < 100); 5579#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5578#L10-2 assume !!(main_~i~0 < 100); 5576#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5575#L10-2 assume !!(main_~i~0 < 100); 5574#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5573#L10-2 assume !!(main_~i~0 < 100); 5565#L10 [2019-12-07 12:21:32,102 INFO L796 eck$LassoCheckResult]: Loop: 5565#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 5566#L10-2 assume !!(main_~i~0 < 100); 5574#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5573#L10-2 assume !!(main_~i~0 < 100); 5565#L10 [2019-12-07 12:21:32,102 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:32,102 INFO L82 PathProgramCache]: Analyzing trace with hash 397934230, now seen corresponding path program 28 times [2019-12-07 12:21:32,102 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:32,102 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1569630227] [2019-12-07 12:21:32,102 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:32,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:32,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:32,112 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:32,112 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:32,112 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 26 times [2019-12-07 12:21:32,112 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:32,112 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1617316057] [2019-12-07 12:21:32,112 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:32,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:32,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:32,114 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:32,115 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:32,115 INFO L82 PathProgramCache]: Analyzing trace with hash 1741798478, now seen corresponding path program 28 times [2019-12-07 12:21:32,115 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:32,115 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [215740705] [2019-12-07 12:21:32,115 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:32,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:32,399 INFO L134 CoverageAnalysis]: Checked inductivity of 900 backedges. 87 proven. 812 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:32,399 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [215740705] [2019-12-07 12:21:32,399 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1538719651] [2019-12-07 12:21:32,400 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:32,420 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-12-07 12:21:32,421 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:32,421 INFO L264 TraceCheckSpWp]: Trace formula consists of 125 conjuncts, 30 conjunts are in the unsatisfiable core [2019-12-07 12:21:32,422 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:32,430 INFO L134 CoverageAnalysis]: Checked inductivity of 900 backedges. 87 proven. 812 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:32,430 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:32,430 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30] total 30 [2019-12-07 12:21:32,430 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1464365117] [2019-12-07 12:21:32,444 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:32,445 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2019-12-07 12:21:32,445 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=465, Invalid=465, Unknown=0, NotChecked=0, Total=930 [2019-12-07 12:21:32,445 INFO L87 Difference]: Start difference. First operand 61 states and 63 transitions. cyclomatic complexity: 3 Second operand 31 states. [2019-12-07 12:21:32,501 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:32,501 INFO L93 Difference]: Finished difference Result 65 states and 67 transitions. [2019-12-07 12:21:32,501 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2019-12-07 12:21:32,501 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 65 states and 67 transitions. [2019-12-07 12:21:32,502 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:32,502 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 65 states to 64 states and 66 transitions. [2019-12-07 12:21:32,502 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:32,502 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:32,502 INFO L73 IsDeterministic]: Start isDeterministic. Operand 64 states and 66 transitions. [2019-12-07 12:21:32,502 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:32,502 INFO L688 BuchiCegarLoop]: Abstraction has 64 states and 66 transitions. [2019-12-07 12:21:32,503 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states and 66 transitions. [2019-12-07 12:21:32,503 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 63. [2019-12-07 12:21:32,503 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. [2019-12-07 12:21:32,503 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 65 transitions. [2019-12-07 12:21:32,503 INFO L711 BuchiCegarLoop]: Abstraction has 63 states and 65 transitions. [2019-12-07 12:21:32,503 INFO L591 BuchiCegarLoop]: Abstraction has 63 states and 65 transitions. [2019-12-07 12:21:32,504 INFO L424 BuchiCegarLoop]: ======== Iteration 31============ [2019-12-07 12:21:32,504 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 63 states and 65 transitions. [2019-12-07 12:21:32,504 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:32,504 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:32,504 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:32,504 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [30, 29, 1] [2019-12-07 12:21:32,504 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:32,505 INFO L794 eck$LassoCheckResult]: Stem: 5914#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 5915#L10-2 assume !!(main_~i~0 < 100); 5916#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5917#L10-2 assume !!(main_~i~0 < 100); 5912#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5913#L10-2 assume !!(main_~i~0 < 100); 5972#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5971#L10-2 assume !!(main_~i~0 < 100); 5970#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5969#L10-2 assume !!(main_~i~0 < 100); 5968#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5967#L10-2 assume !!(main_~i~0 < 100); 5966#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5965#L10-2 assume !!(main_~i~0 < 100); 5964#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5963#L10-2 assume !!(main_~i~0 < 100); 5962#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5961#L10-2 assume !!(main_~i~0 < 100); 5960#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5959#L10-2 assume !!(main_~i~0 < 100); 5958#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5957#L10-2 assume !!(main_~i~0 < 100); 5956#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5955#L10-2 assume !!(main_~i~0 < 100); 5954#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5953#L10-2 assume !!(main_~i~0 < 100); 5952#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5951#L10-2 assume !!(main_~i~0 < 100); 5950#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5949#L10-2 assume !!(main_~i~0 < 100); 5948#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5947#L10-2 assume !!(main_~i~0 < 100); 5946#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5945#L10-2 assume !!(main_~i~0 < 100); 5944#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5943#L10-2 assume !!(main_~i~0 < 100); 5942#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5941#L10-2 assume !!(main_~i~0 < 100); 5940#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5939#L10-2 assume !!(main_~i~0 < 100); 5938#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5937#L10-2 assume !!(main_~i~0 < 100); 5936#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5935#L10-2 assume !!(main_~i~0 < 100); 5934#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5933#L10-2 assume !!(main_~i~0 < 100); 5932#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5931#L10-2 assume !!(main_~i~0 < 100); 5930#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5929#L10-2 assume !!(main_~i~0 < 100); 5928#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5927#L10-2 assume !!(main_~i~0 < 100); 5926#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5925#L10-2 assume !!(main_~i~0 < 100); 5924#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5923#L10-2 assume !!(main_~i~0 < 100); 5921#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5920#L10-2 assume !!(main_~i~0 < 100); 5919#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5918#L10-2 assume !!(main_~i~0 < 100); 5910#L10 [2019-12-07 12:21:32,505 INFO L796 eck$LassoCheckResult]: Loop: 5910#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 5911#L10-2 assume !!(main_~i~0 < 100); 5919#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 5918#L10-2 assume !!(main_~i~0 < 100); 5910#L10 [2019-12-07 12:21:32,505 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:32,505 INFO L82 PathProgramCache]: Analyzing trace with hash 162706099, now seen corresponding path program 29 times [2019-12-07 12:21:32,505 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:32,505 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [508028836] [2019-12-07 12:21:32,505 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:32,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:32,512 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:32,513 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:32,513 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:32,513 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 27 times [2019-12-07 12:21:32,514 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:32,514 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1180227259] [2019-12-07 12:21:32,514 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:32,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:32,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:32,516 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:32,516 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:32,516 INFO L82 PathProgramCache]: Analyzing trace with hash -1226106389, now seen corresponding path program 29 times [2019-12-07 12:21:32,516 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:32,516 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1662635915] [2019-12-07 12:21:32,516 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:32,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:32,822 INFO L134 CoverageAnalysis]: Checked inductivity of 961 backedges. 90 proven. 870 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:32,822 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1662635915] [2019-12-07 12:21:32,822 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1462829163] [2019-12-07 12:21:32,822 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 51 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:32,852 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 32 check-sat command(s) [2019-12-07 12:21:32,852 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:32,853 INFO L264 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 31 conjunts are in the unsatisfiable core [2019-12-07 12:21:32,854 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:32,861 INFO L134 CoverageAnalysis]: Checked inductivity of 961 backedges. 90 proven. 870 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:32,862 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:32,862 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31] total 31 [2019-12-07 12:21:32,862 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1541711306] [2019-12-07 12:21:32,878 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:32,878 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2019-12-07 12:21:32,878 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=496, Invalid=496, Unknown=0, NotChecked=0, Total=992 [2019-12-07 12:21:32,878 INFO L87 Difference]: Start difference. First operand 63 states and 65 transitions. cyclomatic complexity: 3 Second operand 32 states. [2019-12-07 12:21:32,934 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:32,934 INFO L93 Difference]: Finished difference Result 67 states and 69 transitions. [2019-12-07 12:21:32,935 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2019-12-07 12:21:32,935 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 67 states and 69 transitions. [2019-12-07 12:21:32,935 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:32,935 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 67 states to 66 states and 68 transitions. [2019-12-07 12:21:32,936 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:32,936 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:32,936 INFO L73 IsDeterministic]: Start isDeterministic. Operand 66 states and 68 transitions. [2019-12-07 12:21:32,936 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:32,936 INFO L688 BuchiCegarLoop]: Abstraction has 66 states and 68 transitions. [2019-12-07 12:21:32,936 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states and 68 transitions. [2019-12-07 12:21:32,936 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 65. [2019-12-07 12:21:32,936 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65 states. [2019-12-07 12:21:32,937 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 67 transitions. [2019-12-07 12:21:32,937 INFO L711 BuchiCegarLoop]: Abstraction has 65 states and 67 transitions. [2019-12-07 12:21:32,937 INFO L591 BuchiCegarLoop]: Abstraction has 65 states and 67 transitions. [2019-12-07 12:21:32,937 INFO L424 BuchiCegarLoop]: ======== Iteration 32============ [2019-12-07 12:21:32,937 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 65 states and 67 transitions. [2019-12-07 12:21:32,937 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:32,937 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:32,937 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:32,938 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [31, 30, 1] [2019-12-07 12:21:32,938 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:32,938 INFO L794 eck$LassoCheckResult]: Stem: 6270#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 6271#L10-2 assume !!(main_~i~0 < 100); 6272#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6273#L10-2 assume !!(main_~i~0 < 100); 6268#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6269#L10-2 assume !!(main_~i~0 < 100); 6330#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6329#L10-2 assume !!(main_~i~0 < 100); 6328#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6327#L10-2 assume !!(main_~i~0 < 100); 6326#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6325#L10-2 assume !!(main_~i~0 < 100); 6324#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6323#L10-2 assume !!(main_~i~0 < 100); 6322#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6321#L10-2 assume !!(main_~i~0 < 100); 6320#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6319#L10-2 assume !!(main_~i~0 < 100); 6318#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6317#L10-2 assume !!(main_~i~0 < 100); 6316#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6315#L10-2 assume !!(main_~i~0 < 100); 6314#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6313#L10-2 assume !!(main_~i~0 < 100); 6312#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6311#L10-2 assume !!(main_~i~0 < 100); 6310#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6309#L10-2 assume !!(main_~i~0 < 100); 6308#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6307#L10-2 assume !!(main_~i~0 < 100); 6306#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6305#L10-2 assume !!(main_~i~0 < 100); 6304#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6303#L10-2 assume !!(main_~i~0 < 100); 6302#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6301#L10-2 assume !!(main_~i~0 < 100); 6300#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6299#L10-2 assume !!(main_~i~0 < 100); 6298#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6297#L10-2 assume !!(main_~i~0 < 100); 6296#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6295#L10-2 assume !!(main_~i~0 < 100); 6294#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6293#L10-2 assume !!(main_~i~0 < 100); 6292#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6291#L10-2 assume !!(main_~i~0 < 100); 6290#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6289#L10-2 assume !!(main_~i~0 < 100); 6288#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6287#L10-2 assume !!(main_~i~0 < 100); 6286#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6285#L10-2 assume !!(main_~i~0 < 100); 6284#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6283#L10-2 assume !!(main_~i~0 < 100); 6282#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6281#L10-2 assume !!(main_~i~0 < 100); 6280#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6279#L10-2 assume !!(main_~i~0 < 100); 6277#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6276#L10-2 assume !!(main_~i~0 < 100); 6275#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6274#L10-2 assume !!(main_~i~0 < 100); 6266#L10 [2019-12-07 12:21:32,938 INFO L796 eck$LassoCheckResult]: Loop: 6266#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 6267#L10-2 assume !!(main_~i~0 < 100); 6275#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6274#L10-2 assume !!(main_~i~0 < 100); 6266#L10 [2019-12-07 12:21:32,938 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:32,938 INFO L82 PathProgramCache]: Analyzing trace with hash 1741738896, now seen corresponding path program 30 times [2019-12-07 12:21:32,938 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:32,938 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [604911063] [2019-12-07 12:21:32,939 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:32,945 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:32,950 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:32,951 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:32,951 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:32,952 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 28 times [2019-12-07 12:21:32,952 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:32,952 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1516296631] [2019-12-07 12:21:32,952 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:32,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:32,953 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:32,954 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:32,954 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:32,954 INFO L82 PathProgramCache]: Analyzing trace with hash -1524399032, now seen corresponding path program 30 times [2019-12-07 12:21:32,954 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:32,954 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2108704224] [2019-12-07 12:21:32,955 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:32,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:33,261 INFO L134 CoverageAnalysis]: Checked inductivity of 1024 backedges. 93 proven. 930 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:33,261 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2108704224] [2019-12-07 12:21:33,261 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1003820938] [2019-12-07 12:21:33,261 INFO L92 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:33,294 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 33 check-sat command(s) [2019-12-07 12:21:33,294 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:33,294 INFO L264 TraceCheckSpWp]: Trace formula consists of 133 conjuncts, 32 conjunts are in the unsatisfiable core [2019-12-07 12:21:33,295 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:33,303 INFO L134 CoverageAnalysis]: Checked inductivity of 1024 backedges. 93 proven. 930 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:33,303 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:33,304 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32] total 32 [2019-12-07 12:21:33,304 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1681733534] [2019-12-07 12:21:33,318 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:33,318 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2019-12-07 12:21:33,319 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=528, Invalid=528, Unknown=0, NotChecked=0, Total=1056 [2019-12-07 12:21:33,319 INFO L87 Difference]: Start difference. First operand 65 states and 67 transitions. cyclomatic complexity: 3 Second operand 33 states. [2019-12-07 12:21:33,374 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:33,374 INFO L93 Difference]: Finished difference Result 69 states and 71 transitions. [2019-12-07 12:21:33,374 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-12-07 12:21:33,375 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 69 states and 71 transitions. [2019-12-07 12:21:33,375 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:33,375 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 69 states to 68 states and 70 transitions. [2019-12-07 12:21:33,375 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:33,375 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:33,376 INFO L73 IsDeterministic]: Start isDeterministic. Operand 68 states and 70 transitions. [2019-12-07 12:21:33,376 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:33,376 INFO L688 BuchiCegarLoop]: Abstraction has 68 states and 70 transitions. [2019-12-07 12:21:33,376 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68 states and 70 transitions. [2019-12-07 12:21:33,376 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68 to 67. [2019-12-07 12:21:33,377 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 67 states. [2019-12-07 12:21:33,377 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 69 transitions. [2019-12-07 12:21:33,377 INFO L711 BuchiCegarLoop]: Abstraction has 67 states and 69 transitions. [2019-12-07 12:21:33,377 INFO L591 BuchiCegarLoop]: Abstraction has 67 states and 69 transitions. [2019-12-07 12:21:33,377 INFO L424 BuchiCegarLoop]: ======== Iteration 33============ [2019-12-07 12:21:33,377 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 67 states and 69 transitions. [2019-12-07 12:21:33,377 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:33,378 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:33,378 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:33,378 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [32, 31, 1] [2019-12-07 12:21:33,378 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:33,378 INFO L794 eck$LassoCheckResult]: Stem: 6637#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 6638#L10-2 assume !!(main_~i~0 < 100); 6639#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6640#L10-2 assume !!(main_~i~0 < 100); 6635#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6636#L10-2 assume !!(main_~i~0 < 100); 6699#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6698#L10-2 assume !!(main_~i~0 < 100); 6697#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6696#L10-2 assume !!(main_~i~0 < 100); 6695#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6694#L10-2 assume !!(main_~i~0 < 100); 6693#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6692#L10-2 assume !!(main_~i~0 < 100); 6691#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6690#L10-2 assume !!(main_~i~0 < 100); 6689#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6688#L10-2 assume !!(main_~i~0 < 100); 6687#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6686#L10-2 assume !!(main_~i~0 < 100); 6685#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6684#L10-2 assume !!(main_~i~0 < 100); 6683#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6682#L10-2 assume !!(main_~i~0 < 100); 6681#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6680#L10-2 assume !!(main_~i~0 < 100); 6679#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6678#L10-2 assume !!(main_~i~0 < 100); 6677#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6676#L10-2 assume !!(main_~i~0 < 100); 6675#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6674#L10-2 assume !!(main_~i~0 < 100); 6673#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6672#L10-2 assume !!(main_~i~0 < 100); 6671#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6670#L10-2 assume !!(main_~i~0 < 100); 6669#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6668#L10-2 assume !!(main_~i~0 < 100); 6667#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6666#L10-2 assume !!(main_~i~0 < 100); 6665#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6664#L10-2 assume !!(main_~i~0 < 100); 6663#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6662#L10-2 assume !!(main_~i~0 < 100); 6661#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6660#L10-2 assume !!(main_~i~0 < 100); 6659#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6658#L10-2 assume !!(main_~i~0 < 100); 6657#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6656#L10-2 assume !!(main_~i~0 < 100); 6655#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6654#L10-2 assume !!(main_~i~0 < 100); 6653#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6652#L10-2 assume !!(main_~i~0 < 100); 6651#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6650#L10-2 assume !!(main_~i~0 < 100); 6649#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6648#L10-2 assume !!(main_~i~0 < 100); 6647#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6646#L10-2 assume !!(main_~i~0 < 100); 6644#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6643#L10-2 assume !!(main_~i~0 < 100); 6642#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6641#L10-2 assume !!(main_~i~0 < 100); 6633#L10 [2019-12-07 12:21:33,378 INFO L796 eck$LassoCheckResult]: Loop: 6633#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 6634#L10-2 assume !!(main_~i~0 < 100); 6642#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 6641#L10-2 assume !!(main_~i~0 < 100); 6633#L10 [2019-12-07 12:21:33,378 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:33,378 INFO L82 PathProgramCache]: Analyzing trace with hash -1226165971, now seen corresponding path program 31 times [2019-12-07 12:21:33,378 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:33,378 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [476980586] [2019-12-07 12:21:33,379 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:33,382 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:33,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:33,389 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:33,389 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:33,389 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 29 times [2019-12-07 12:21:33,389 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:33,390 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [767131127] [2019-12-07 12:21:33,390 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:33,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:33,391 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:33,392 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:33,392 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:33,392 INFO L82 PathProgramCache]: Analyzing trace with hash -420820123, now seen corresponding path program 31 times [2019-12-07 12:21:33,392 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:33,392 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1476409879] [2019-12-07 12:21:33,392 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:33,399 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:33,747 INFO L134 CoverageAnalysis]: Checked inductivity of 1089 backedges. 96 proven. 992 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:33,747 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1476409879] [2019-12-07 12:21:33,747 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1842197443] [2019-12-07 12:21:33,747 INFO L92 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 53 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:33,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:33,769 INFO L264 TraceCheckSpWp]: Trace formula consists of 137 conjuncts, 33 conjunts are in the unsatisfiable core [2019-12-07 12:21:33,770 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:33,778 INFO L134 CoverageAnalysis]: Checked inductivity of 1089 backedges. 96 proven. 992 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:33,778 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:33,778 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33] total 33 [2019-12-07 12:21:33,778 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [266189760] [2019-12-07 12:21:33,793 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:33,793 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2019-12-07 12:21:33,793 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=561, Invalid=561, Unknown=0, NotChecked=0, Total=1122 [2019-12-07 12:21:33,793 INFO L87 Difference]: Start difference. First operand 67 states and 69 transitions. cyclomatic complexity: 3 Second operand 34 states. [2019-12-07 12:21:33,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:33,844 INFO L93 Difference]: Finished difference Result 71 states and 73 transitions. [2019-12-07 12:21:33,844 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2019-12-07 12:21:33,844 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 71 states and 73 transitions. [2019-12-07 12:21:33,845 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:33,845 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 71 states to 70 states and 72 transitions. [2019-12-07 12:21:33,845 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:33,845 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:33,845 INFO L73 IsDeterministic]: Start isDeterministic. Operand 70 states and 72 transitions. [2019-12-07 12:21:33,845 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:33,845 INFO L688 BuchiCegarLoop]: Abstraction has 70 states and 72 transitions. [2019-12-07 12:21:33,845 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 70 states and 72 transitions. [2019-12-07 12:21:33,846 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 70 to 69. [2019-12-07 12:21:33,846 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69 states. [2019-12-07 12:21:33,846 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 71 transitions. [2019-12-07 12:21:33,846 INFO L711 BuchiCegarLoop]: Abstraction has 69 states and 71 transitions. [2019-12-07 12:21:33,846 INFO L591 BuchiCegarLoop]: Abstraction has 69 states and 71 transitions. [2019-12-07 12:21:33,846 INFO L424 BuchiCegarLoop]: ======== Iteration 34============ [2019-12-07 12:21:33,847 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 69 states and 71 transitions. [2019-12-07 12:21:33,847 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:33,847 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:33,847 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:33,847 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [33, 32, 1] [2019-12-07 12:21:33,847 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:33,847 INFO L794 eck$LassoCheckResult]: Stem: 7015#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 7016#L10-2 assume !!(main_~i~0 < 100); 7017#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7018#L10-2 assume !!(main_~i~0 < 100); 7013#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7014#L10-2 assume !!(main_~i~0 < 100); 7079#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7078#L10-2 assume !!(main_~i~0 < 100); 7077#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7076#L10-2 assume !!(main_~i~0 < 100); 7075#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7074#L10-2 assume !!(main_~i~0 < 100); 7073#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7072#L10-2 assume !!(main_~i~0 < 100); 7071#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7070#L10-2 assume !!(main_~i~0 < 100); 7069#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7068#L10-2 assume !!(main_~i~0 < 100); 7067#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7066#L10-2 assume !!(main_~i~0 < 100); 7065#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7064#L10-2 assume !!(main_~i~0 < 100); 7063#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7062#L10-2 assume !!(main_~i~0 < 100); 7061#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7060#L10-2 assume !!(main_~i~0 < 100); 7059#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7058#L10-2 assume !!(main_~i~0 < 100); 7057#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7056#L10-2 assume !!(main_~i~0 < 100); 7055#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7054#L10-2 assume !!(main_~i~0 < 100); 7053#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7052#L10-2 assume !!(main_~i~0 < 100); 7051#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7050#L10-2 assume !!(main_~i~0 < 100); 7049#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7048#L10-2 assume !!(main_~i~0 < 100); 7047#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7046#L10-2 assume !!(main_~i~0 < 100); 7045#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7044#L10-2 assume !!(main_~i~0 < 100); 7043#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7042#L10-2 assume !!(main_~i~0 < 100); 7041#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7040#L10-2 assume !!(main_~i~0 < 100); 7039#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7038#L10-2 assume !!(main_~i~0 < 100); 7037#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7036#L10-2 assume !!(main_~i~0 < 100); 7035#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7034#L10-2 assume !!(main_~i~0 < 100); 7033#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7032#L10-2 assume !!(main_~i~0 < 100); 7031#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7030#L10-2 assume !!(main_~i~0 < 100); 7029#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7028#L10-2 assume !!(main_~i~0 < 100); 7027#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7026#L10-2 assume !!(main_~i~0 < 100); 7025#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7024#L10-2 assume !!(main_~i~0 < 100); 7022#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7021#L10-2 assume !!(main_~i~0 < 100); 7020#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7019#L10-2 assume !!(main_~i~0 < 100); 7011#L10 [2019-12-07 12:21:33,847 INFO L796 eck$LassoCheckResult]: Loop: 7011#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 7012#L10-2 assume !!(main_~i~0 < 100); 7020#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7019#L10-2 assume !!(main_~i~0 < 100); 7011#L10 [2019-12-07 12:21:33,848 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:33,848 INFO L82 PathProgramCache]: Analyzing trace with hash -1524458614, now seen corresponding path program 32 times [2019-12-07 12:21:33,848 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:33,848 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1067854250] [2019-12-07 12:21:33,848 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:33,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:33,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:33,856 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:33,856 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:33,856 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 30 times [2019-12-07 12:21:33,856 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:33,856 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1777500596] [2019-12-07 12:21:33,856 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:33,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:33,857 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:33,857 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:33,857 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:33,858 INFO L82 PathProgramCache]: Analyzing trace with hash -738410686, now seen corresponding path program 32 times [2019-12-07 12:21:33,858 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:33,858 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1928351984] [2019-12-07 12:21:33,858 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:33,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:34,190 INFO L134 CoverageAnalysis]: Checked inductivity of 1156 backedges. 99 proven. 1056 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:34,190 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1928351984] [2019-12-07 12:21:34,190 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1622433878] [2019-12-07 12:21:34,190 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:34,212 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2019-12-07 12:21:34,212 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:34,213 INFO L264 TraceCheckSpWp]: Trace formula consists of 141 conjuncts, 34 conjunts are in the unsatisfiable core [2019-12-07 12:21:34,214 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:34,222 INFO L134 CoverageAnalysis]: Checked inductivity of 1156 backedges. 99 proven. 1056 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:34,222 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:34,222 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34] total 34 [2019-12-07 12:21:34,222 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1932760575] [2019-12-07 12:21:34,236 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:34,236 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2019-12-07 12:21:34,237 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=595, Invalid=595, Unknown=0, NotChecked=0, Total=1190 [2019-12-07 12:21:34,237 INFO L87 Difference]: Start difference. First operand 69 states and 71 transitions. cyclomatic complexity: 3 Second operand 35 states. [2019-12-07 12:21:34,291 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:34,291 INFO L93 Difference]: Finished difference Result 73 states and 75 transitions. [2019-12-07 12:21:34,292 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2019-12-07 12:21:34,292 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 73 states and 75 transitions. [2019-12-07 12:21:34,292 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:34,292 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 73 states to 72 states and 74 transitions. [2019-12-07 12:21:34,293 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:34,293 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:34,293 INFO L73 IsDeterministic]: Start isDeterministic. Operand 72 states and 74 transitions. [2019-12-07 12:21:34,293 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:34,293 INFO L688 BuchiCegarLoop]: Abstraction has 72 states and 74 transitions. [2019-12-07 12:21:34,293 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72 states and 74 transitions. [2019-12-07 12:21:34,293 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72 to 71. [2019-12-07 12:21:34,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 71 states. [2019-12-07 12:21:34,294 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 73 transitions. [2019-12-07 12:21:34,294 INFO L711 BuchiCegarLoop]: Abstraction has 71 states and 73 transitions. [2019-12-07 12:21:34,294 INFO L591 BuchiCegarLoop]: Abstraction has 71 states and 73 transitions. [2019-12-07 12:21:34,294 INFO L424 BuchiCegarLoop]: ======== Iteration 35============ [2019-12-07 12:21:34,294 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 71 states and 73 transitions. [2019-12-07 12:21:34,294 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:34,294 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:34,294 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:34,295 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [34, 33, 1] [2019-12-07 12:21:34,295 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:34,295 INFO L794 eck$LassoCheckResult]: Stem: 7404#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 7405#L10-2 assume !!(main_~i~0 < 100); 7406#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7407#L10-2 assume !!(main_~i~0 < 100); 7402#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7403#L10-2 assume !!(main_~i~0 < 100); 7470#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7469#L10-2 assume !!(main_~i~0 < 100); 7468#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7467#L10-2 assume !!(main_~i~0 < 100); 7466#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7465#L10-2 assume !!(main_~i~0 < 100); 7464#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7463#L10-2 assume !!(main_~i~0 < 100); 7462#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7461#L10-2 assume !!(main_~i~0 < 100); 7460#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7459#L10-2 assume !!(main_~i~0 < 100); 7458#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7457#L10-2 assume !!(main_~i~0 < 100); 7456#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7455#L10-2 assume !!(main_~i~0 < 100); 7454#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7453#L10-2 assume !!(main_~i~0 < 100); 7452#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7451#L10-2 assume !!(main_~i~0 < 100); 7450#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7449#L10-2 assume !!(main_~i~0 < 100); 7448#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7447#L10-2 assume !!(main_~i~0 < 100); 7446#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7445#L10-2 assume !!(main_~i~0 < 100); 7444#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7443#L10-2 assume !!(main_~i~0 < 100); 7442#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7441#L10-2 assume !!(main_~i~0 < 100); 7440#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7439#L10-2 assume !!(main_~i~0 < 100); 7438#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7437#L10-2 assume !!(main_~i~0 < 100); 7436#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7435#L10-2 assume !!(main_~i~0 < 100); 7434#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7433#L10-2 assume !!(main_~i~0 < 100); 7432#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7431#L10-2 assume !!(main_~i~0 < 100); 7430#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7429#L10-2 assume !!(main_~i~0 < 100); 7428#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7427#L10-2 assume !!(main_~i~0 < 100); 7426#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7425#L10-2 assume !!(main_~i~0 < 100); 7424#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7423#L10-2 assume !!(main_~i~0 < 100); 7422#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7421#L10-2 assume !!(main_~i~0 < 100); 7420#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7419#L10-2 assume !!(main_~i~0 < 100); 7418#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7417#L10-2 assume !!(main_~i~0 < 100); 7416#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7415#L10-2 assume !!(main_~i~0 < 100); 7414#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7413#L10-2 assume !!(main_~i~0 < 100); 7411#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7410#L10-2 assume !!(main_~i~0 < 100); 7409#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7408#L10-2 assume !!(main_~i~0 < 100); 7400#L10 [2019-12-07 12:21:34,295 INFO L796 eck$LassoCheckResult]: Loop: 7400#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 7401#L10-2 assume !!(main_~i~0 < 100); 7409#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7408#L10-2 assume !!(main_~i~0 < 100); 7400#L10 [2019-12-07 12:21:34,295 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:34,295 INFO L82 PathProgramCache]: Analyzing trace with hash -420879705, now seen corresponding path program 33 times [2019-12-07 12:21:34,295 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:34,295 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1379825675] [2019-12-07 12:21:34,295 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:34,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:34,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:34,303 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:34,303 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:34,303 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 31 times [2019-12-07 12:21:34,303 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:34,303 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [418101248] [2019-12-07 12:21:34,303 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:34,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:34,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:34,304 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:34,305 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:34,305 INFO L82 PathProgramCache]: Analyzing trace with hash -1000263713, now seen corresponding path program 33 times [2019-12-07 12:21:34,305 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:34,305 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1461068329] [2019-12-07 12:21:34,305 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:34,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:34,653 INFO L134 CoverageAnalysis]: Checked inductivity of 1225 backedges. 102 proven. 1122 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:34,653 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1461068329] [2019-12-07 12:21:34,654 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1154599701] [2019-12-07 12:21:34,654 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 55 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:34,685 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 36 check-sat command(s) [2019-12-07 12:21:34,685 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:34,686 INFO L264 TraceCheckSpWp]: Trace formula consists of 145 conjuncts, 35 conjunts are in the unsatisfiable core [2019-12-07 12:21:34,687 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:34,696 INFO L134 CoverageAnalysis]: Checked inductivity of 1225 backedges. 102 proven. 1122 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:34,696 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:34,696 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35] total 35 [2019-12-07 12:21:34,696 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [101367131] [2019-12-07 12:21:34,710 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:34,710 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2019-12-07 12:21:34,711 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=630, Invalid=630, Unknown=0, NotChecked=0, Total=1260 [2019-12-07 12:21:34,711 INFO L87 Difference]: Start difference. First operand 71 states and 73 transitions. cyclomatic complexity: 3 Second operand 36 states. [2019-12-07 12:21:34,763 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:34,763 INFO L93 Difference]: Finished difference Result 75 states and 77 transitions. [2019-12-07 12:21:34,764 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2019-12-07 12:21:34,764 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 75 states and 77 transitions. [2019-12-07 12:21:34,764 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:34,765 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 75 states to 74 states and 76 transitions. [2019-12-07 12:21:34,765 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:34,765 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:34,765 INFO L73 IsDeterministic]: Start isDeterministic. Operand 74 states and 76 transitions. [2019-12-07 12:21:34,765 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:34,765 INFO L688 BuchiCegarLoop]: Abstraction has 74 states and 76 transitions. [2019-12-07 12:21:34,765 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 74 states and 76 transitions. [2019-12-07 12:21:34,766 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 74 to 73. [2019-12-07 12:21:34,766 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 73 states. [2019-12-07 12:21:34,766 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 75 transitions. [2019-12-07 12:21:34,766 INFO L711 BuchiCegarLoop]: Abstraction has 73 states and 75 transitions. [2019-12-07 12:21:34,766 INFO L591 BuchiCegarLoop]: Abstraction has 73 states and 75 transitions. [2019-12-07 12:21:34,766 INFO L424 BuchiCegarLoop]: ======== Iteration 36============ [2019-12-07 12:21:34,766 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 73 states and 75 transitions. [2019-12-07 12:21:34,766 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:34,766 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:34,766 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:34,767 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [35, 34, 1] [2019-12-07 12:21:34,767 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:34,767 INFO L794 eck$LassoCheckResult]: Stem: 7804#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 7805#L10-2 assume !!(main_~i~0 < 100); 7806#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7807#L10-2 assume !!(main_~i~0 < 100); 7802#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7803#L10-2 assume !!(main_~i~0 < 100); 7872#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7871#L10-2 assume !!(main_~i~0 < 100); 7870#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7869#L10-2 assume !!(main_~i~0 < 100); 7868#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7867#L10-2 assume !!(main_~i~0 < 100); 7866#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7865#L10-2 assume !!(main_~i~0 < 100); 7864#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7863#L10-2 assume !!(main_~i~0 < 100); 7862#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7861#L10-2 assume !!(main_~i~0 < 100); 7860#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7859#L10-2 assume !!(main_~i~0 < 100); 7858#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7857#L10-2 assume !!(main_~i~0 < 100); 7856#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7855#L10-2 assume !!(main_~i~0 < 100); 7854#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7853#L10-2 assume !!(main_~i~0 < 100); 7852#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7851#L10-2 assume !!(main_~i~0 < 100); 7850#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7849#L10-2 assume !!(main_~i~0 < 100); 7848#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7847#L10-2 assume !!(main_~i~0 < 100); 7846#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7845#L10-2 assume !!(main_~i~0 < 100); 7844#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7843#L10-2 assume !!(main_~i~0 < 100); 7842#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7841#L10-2 assume !!(main_~i~0 < 100); 7840#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7839#L10-2 assume !!(main_~i~0 < 100); 7838#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7837#L10-2 assume !!(main_~i~0 < 100); 7836#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7835#L10-2 assume !!(main_~i~0 < 100); 7834#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7833#L10-2 assume !!(main_~i~0 < 100); 7832#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7831#L10-2 assume !!(main_~i~0 < 100); 7830#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7829#L10-2 assume !!(main_~i~0 < 100); 7828#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7827#L10-2 assume !!(main_~i~0 < 100); 7826#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7825#L10-2 assume !!(main_~i~0 < 100); 7824#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7823#L10-2 assume !!(main_~i~0 < 100); 7822#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7821#L10-2 assume !!(main_~i~0 < 100); 7820#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7819#L10-2 assume !!(main_~i~0 < 100); 7818#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7817#L10-2 assume !!(main_~i~0 < 100); 7816#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7815#L10-2 assume !!(main_~i~0 < 100); 7814#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7813#L10-2 assume !!(main_~i~0 < 100); 7811#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7810#L10-2 assume !!(main_~i~0 < 100); 7809#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7808#L10-2 assume !!(main_~i~0 < 100); 7800#L10 [2019-12-07 12:21:34,767 INFO L796 eck$LassoCheckResult]: Loop: 7800#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 7801#L10-2 assume !!(main_~i~0 < 100); 7809#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 7808#L10-2 assume !!(main_~i~0 < 100); 7800#L10 [2019-12-07 12:21:34,767 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:34,767 INFO L82 PathProgramCache]: Analyzing trace with hash -738470268, now seen corresponding path program 34 times [2019-12-07 12:21:34,767 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:34,767 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1517065608] [2019-12-07 12:21:34,767 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:34,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:34,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:34,775 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:34,775 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:34,775 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 32 times [2019-12-07 12:21:34,775 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:34,775 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1560137527] [2019-12-07 12:21:34,775 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:34,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:34,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:34,777 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:34,777 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:34,777 INFO L82 PathProgramCache]: Analyzing trace with hash 762047804, now seen corresponding path program 34 times [2019-12-07 12:21:34,777 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:34,777 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [595066832] [2019-12-07 12:21:34,777 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:34,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:35,157 INFO L134 CoverageAnalysis]: Checked inductivity of 1296 backedges. 105 proven. 1190 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:35,158 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [595066832] [2019-12-07 12:21:35,158 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2055701293] [2019-12-07 12:21:35,158 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:35,180 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-12-07 12:21:35,181 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:35,181 INFO L264 TraceCheckSpWp]: Trace formula consists of 149 conjuncts, 36 conjunts are in the unsatisfiable core [2019-12-07 12:21:35,182 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:35,191 INFO L134 CoverageAnalysis]: Checked inductivity of 1296 backedges. 105 proven. 1190 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:35,191 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:35,192 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36] total 36 [2019-12-07 12:21:35,192 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1309992663] [2019-12-07 12:21:35,208 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:35,208 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2019-12-07 12:21:35,209 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=666, Invalid=666, Unknown=0, NotChecked=0, Total=1332 [2019-12-07 12:21:35,209 INFO L87 Difference]: Start difference. First operand 73 states and 75 transitions. cyclomatic complexity: 3 Second operand 37 states. [2019-12-07 12:21:35,270 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:35,270 INFO L93 Difference]: Finished difference Result 77 states and 79 transitions. [2019-12-07 12:21:35,270 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2019-12-07 12:21:35,270 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 77 states and 79 transitions. [2019-12-07 12:21:35,270 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:35,271 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 77 states to 76 states and 78 transitions. [2019-12-07 12:21:35,271 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:35,271 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:35,271 INFO L73 IsDeterministic]: Start isDeterministic. Operand 76 states and 78 transitions. [2019-12-07 12:21:35,271 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:35,271 INFO L688 BuchiCegarLoop]: Abstraction has 76 states and 78 transitions. [2019-12-07 12:21:35,271 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states and 78 transitions. [2019-12-07 12:21:35,272 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 75. [2019-12-07 12:21:35,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 75 states. [2019-12-07 12:21:35,272 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 75 states to 75 states and 77 transitions. [2019-12-07 12:21:35,272 INFO L711 BuchiCegarLoop]: Abstraction has 75 states and 77 transitions. [2019-12-07 12:21:35,272 INFO L591 BuchiCegarLoop]: Abstraction has 75 states and 77 transitions. [2019-12-07 12:21:35,272 INFO L424 BuchiCegarLoop]: ======== Iteration 37============ [2019-12-07 12:21:35,272 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 75 states and 77 transitions. [2019-12-07 12:21:35,273 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:35,273 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:35,273 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:35,273 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [36, 35, 1] [2019-12-07 12:21:35,273 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:35,273 INFO L794 eck$LassoCheckResult]: Stem: 8215#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 8216#L10-2 assume !!(main_~i~0 < 100); 8217#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8218#L10-2 assume !!(main_~i~0 < 100); 8213#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8214#L10-2 assume !!(main_~i~0 < 100); 8285#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8284#L10-2 assume !!(main_~i~0 < 100); 8283#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8282#L10-2 assume !!(main_~i~0 < 100); 8281#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8280#L10-2 assume !!(main_~i~0 < 100); 8279#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8278#L10-2 assume !!(main_~i~0 < 100); 8277#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8276#L10-2 assume !!(main_~i~0 < 100); 8275#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8274#L10-2 assume !!(main_~i~0 < 100); 8273#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8272#L10-2 assume !!(main_~i~0 < 100); 8271#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8270#L10-2 assume !!(main_~i~0 < 100); 8269#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8268#L10-2 assume !!(main_~i~0 < 100); 8267#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8266#L10-2 assume !!(main_~i~0 < 100); 8265#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8264#L10-2 assume !!(main_~i~0 < 100); 8263#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8262#L10-2 assume !!(main_~i~0 < 100); 8261#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8260#L10-2 assume !!(main_~i~0 < 100); 8259#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8258#L10-2 assume !!(main_~i~0 < 100); 8257#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8256#L10-2 assume !!(main_~i~0 < 100); 8255#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8254#L10-2 assume !!(main_~i~0 < 100); 8253#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8252#L10-2 assume !!(main_~i~0 < 100); 8251#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8250#L10-2 assume !!(main_~i~0 < 100); 8249#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8248#L10-2 assume !!(main_~i~0 < 100); 8247#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8246#L10-2 assume !!(main_~i~0 < 100); 8245#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8244#L10-2 assume !!(main_~i~0 < 100); 8243#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8242#L10-2 assume !!(main_~i~0 < 100); 8241#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8240#L10-2 assume !!(main_~i~0 < 100); 8239#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8238#L10-2 assume !!(main_~i~0 < 100); 8237#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8236#L10-2 assume !!(main_~i~0 < 100); 8235#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8234#L10-2 assume !!(main_~i~0 < 100); 8233#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8232#L10-2 assume !!(main_~i~0 < 100); 8231#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8230#L10-2 assume !!(main_~i~0 < 100); 8229#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8228#L10-2 assume !!(main_~i~0 < 100); 8227#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8226#L10-2 assume !!(main_~i~0 < 100); 8225#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8224#L10-2 assume !!(main_~i~0 < 100); 8222#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8221#L10-2 assume !!(main_~i~0 < 100); 8220#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8219#L10-2 assume !!(main_~i~0 < 100); 8211#L10 [2019-12-07 12:21:35,273 INFO L796 eck$LassoCheckResult]: Loop: 8211#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 8212#L10-2 assume !!(main_~i~0 < 100); 8220#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8219#L10-2 assume !!(main_~i~0 < 100); 8211#L10 [2019-12-07 12:21:35,274 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:35,274 INFO L82 PathProgramCache]: Analyzing trace with hash -1000323295, now seen corresponding path program 35 times [2019-12-07 12:21:35,274 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:35,274 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1936939826] [2019-12-07 12:21:35,274 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:35,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:35,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:35,282 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:35,282 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:35,282 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 33 times [2019-12-07 12:21:35,282 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:35,282 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [405855944] [2019-12-07 12:21:35,282 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:35,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:35,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:35,284 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:35,284 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:35,284 INFO L82 PathProgramCache]: Analyzing trace with hash 2126301017, now seen corresponding path program 35 times [2019-12-07 12:21:35,284 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:35,284 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1981316566] [2019-12-07 12:21:35,284 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:35,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:35,692 INFO L134 CoverageAnalysis]: Checked inductivity of 1369 backedges. 108 proven. 1260 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:35,692 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1981316566] [2019-12-07 12:21:35,693 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1007939400] [2019-12-07 12:21:35,693 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 57 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:35,729 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 38 check-sat command(s) [2019-12-07 12:21:35,729 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:35,730 INFO L264 TraceCheckSpWp]: Trace formula consists of 153 conjuncts, 37 conjunts are in the unsatisfiable core [2019-12-07 12:21:35,731 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:35,741 INFO L134 CoverageAnalysis]: Checked inductivity of 1369 backedges. 108 proven. 1260 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:35,741 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:35,741 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37] total 37 [2019-12-07 12:21:35,741 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1052552072] [2019-12-07 12:21:35,758 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:35,758 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2019-12-07 12:21:35,758 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=703, Invalid=703, Unknown=0, NotChecked=0, Total=1406 [2019-12-07 12:21:35,758 INFO L87 Difference]: Start difference. First operand 75 states and 77 transitions. cyclomatic complexity: 3 Second operand 38 states. [2019-12-07 12:21:35,818 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:35,818 INFO L93 Difference]: Finished difference Result 79 states and 81 transitions. [2019-12-07 12:21:35,818 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2019-12-07 12:21:35,819 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 79 states and 81 transitions. [2019-12-07 12:21:35,819 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:35,820 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 79 states to 78 states and 80 transitions. [2019-12-07 12:21:35,820 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:35,820 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:35,820 INFO L73 IsDeterministic]: Start isDeterministic. Operand 78 states and 80 transitions. [2019-12-07 12:21:35,820 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:35,820 INFO L688 BuchiCegarLoop]: Abstraction has 78 states and 80 transitions. [2019-12-07 12:21:35,820 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78 states and 80 transitions. [2019-12-07 12:21:35,821 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78 to 77. [2019-12-07 12:21:35,821 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77 states. [2019-12-07 12:21:35,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 79 transitions. [2019-12-07 12:21:35,821 INFO L711 BuchiCegarLoop]: Abstraction has 77 states and 79 transitions. [2019-12-07 12:21:35,821 INFO L591 BuchiCegarLoop]: Abstraction has 77 states and 79 transitions. [2019-12-07 12:21:35,821 INFO L424 BuchiCegarLoop]: ======== Iteration 38============ [2019-12-07 12:21:35,822 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 77 states and 79 transitions. [2019-12-07 12:21:35,822 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:35,822 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:35,822 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:35,823 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [37, 36, 1] [2019-12-07 12:21:35,823 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:35,823 INFO L794 eck$LassoCheckResult]: Stem: 8637#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 8638#L10-2 assume !!(main_~i~0 < 100); 8639#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8640#L10-2 assume !!(main_~i~0 < 100); 8635#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8636#L10-2 assume !!(main_~i~0 < 100); 8709#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8708#L10-2 assume !!(main_~i~0 < 100); 8707#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8706#L10-2 assume !!(main_~i~0 < 100); 8705#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8704#L10-2 assume !!(main_~i~0 < 100); 8703#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8702#L10-2 assume !!(main_~i~0 < 100); 8701#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8700#L10-2 assume !!(main_~i~0 < 100); 8699#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8698#L10-2 assume !!(main_~i~0 < 100); 8697#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8696#L10-2 assume !!(main_~i~0 < 100); 8695#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8694#L10-2 assume !!(main_~i~0 < 100); 8693#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8692#L10-2 assume !!(main_~i~0 < 100); 8691#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8690#L10-2 assume !!(main_~i~0 < 100); 8689#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8688#L10-2 assume !!(main_~i~0 < 100); 8687#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8686#L10-2 assume !!(main_~i~0 < 100); 8685#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8684#L10-2 assume !!(main_~i~0 < 100); 8683#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8682#L10-2 assume !!(main_~i~0 < 100); 8681#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8680#L10-2 assume !!(main_~i~0 < 100); 8679#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8678#L10-2 assume !!(main_~i~0 < 100); 8677#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8676#L10-2 assume !!(main_~i~0 < 100); 8675#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8674#L10-2 assume !!(main_~i~0 < 100); 8673#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8672#L10-2 assume !!(main_~i~0 < 100); 8671#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8670#L10-2 assume !!(main_~i~0 < 100); 8669#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8668#L10-2 assume !!(main_~i~0 < 100); 8667#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8666#L10-2 assume !!(main_~i~0 < 100); 8665#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8664#L10-2 assume !!(main_~i~0 < 100); 8663#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8662#L10-2 assume !!(main_~i~0 < 100); 8661#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8660#L10-2 assume !!(main_~i~0 < 100); 8659#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8658#L10-2 assume !!(main_~i~0 < 100); 8657#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8656#L10-2 assume !!(main_~i~0 < 100); 8655#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8654#L10-2 assume !!(main_~i~0 < 100); 8653#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8652#L10-2 assume !!(main_~i~0 < 100); 8651#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8650#L10-2 assume !!(main_~i~0 < 100); 8649#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8648#L10-2 assume !!(main_~i~0 < 100); 8647#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8646#L10-2 assume !!(main_~i~0 < 100); 8644#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8643#L10-2 assume !!(main_~i~0 < 100); 8642#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8641#L10-2 assume !!(main_~i~0 < 100); 8633#L10 [2019-12-07 12:21:35,823 INFO L796 eck$LassoCheckResult]: Loop: 8633#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 8634#L10-2 assume !!(main_~i~0 < 100); 8642#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 8641#L10-2 assume !!(main_~i~0 < 100); 8633#L10 [2019-12-07 12:21:35,823 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:35,823 INFO L82 PathProgramCache]: Analyzing trace with hash 761988222, now seen corresponding path program 36 times [2019-12-07 12:21:35,823 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:35,823 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1082011131] [2019-12-07 12:21:35,823 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:35,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:35,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:35,831 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:35,831 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:35,832 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 34 times [2019-12-07 12:21:35,832 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:35,832 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [68225735] [2019-12-07 12:21:35,832 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:35,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:35,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:35,833 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:35,833 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:35,833 INFO L82 PathProgramCache]: Analyzing trace with hash -1086353866, now seen corresponding path program 36 times [2019-12-07 12:21:35,833 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:35,833 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1866379349] [2019-12-07 12:21:35,834 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:35,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:36,265 INFO L134 CoverageAnalysis]: Checked inductivity of 1444 backedges. 111 proven. 1332 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:36,265 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1866379349] [2019-12-07 12:21:36,265 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1282494388] [2019-12-07 12:21:36,265 INFO L92 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:36,302 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 39 check-sat command(s) [2019-12-07 12:21:36,302 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:36,303 INFO L264 TraceCheckSpWp]: Trace formula consists of 157 conjuncts, 38 conjunts are in the unsatisfiable core [2019-12-07 12:21:36,304 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:36,313 INFO L134 CoverageAnalysis]: Checked inductivity of 1444 backedges. 111 proven. 1332 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:36,313 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:36,314 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38] total 38 [2019-12-07 12:21:36,314 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [214382119] [2019-12-07 12:21:36,329 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:36,329 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2019-12-07 12:21:36,330 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=741, Invalid=741, Unknown=0, NotChecked=0, Total=1482 [2019-12-07 12:21:36,330 INFO L87 Difference]: Start difference. First operand 77 states and 79 transitions. cyclomatic complexity: 3 Second operand 39 states. [2019-12-07 12:21:36,394 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:36,394 INFO L93 Difference]: Finished difference Result 81 states and 83 transitions. [2019-12-07 12:21:36,395 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2019-12-07 12:21:36,395 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 81 states and 83 transitions. [2019-12-07 12:21:36,395 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:36,396 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 81 states to 80 states and 82 transitions. [2019-12-07 12:21:36,396 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:36,396 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:36,396 INFO L73 IsDeterministic]: Start isDeterministic. Operand 80 states and 82 transitions. [2019-12-07 12:21:36,396 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:36,396 INFO L688 BuchiCegarLoop]: Abstraction has 80 states and 82 transitions. [2019-12-07 12:21:36,396 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states and 82 transitions. [2019-12-07 12:21:36,397 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 79. [2019-12-07 12:21:36,397 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79 states. [2019-12-07 12:21:36,397 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 81 transitions. [2019-12-07 12:21:36,397 INFO L711 BuchiCegarLoop]: Abstraction has 79 states and 81 transitions. [2019-12-07 12:21:36,397 INFO L591 BuchiCegarLoop]: Abstraction has 79 states and 81 transitions. [2019-12-07 12:21:36,397 INFO L424 BuchiCegarLoop]: ======== Iteration 39============ [2019-12-07 12:21:36,397 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 79 states and 81 transitions. [2019-12-07 12:21:36,398 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:36,398 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:36,398 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:36,398 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [38, 37, 1] [2019-12-07 12:21:36,398 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:36,398 INFO L794 eck$LassoCheckResult]: Stem: 9070#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 9071#L10-2 assume !!(main_~i~0 < 100); 9072#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9073#L10-2 assume !!(main_~i~0 < 100); 9068#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9069#L10-2 assume !!(main_~i~0 < 100); 9144#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9143#L10-2 assume !!(main_~i~0 < 100); 9142#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9141#L10-2 assume !!(main_~i~0 < 100); 9140#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9139#L10-2 assume !!(main_~i~0 < 100); 9138#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9137#L10-2 assume !!(main_~i~0 < 100); 9136#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9135#L10-2 assume !!(main_~i~0 < 100); 9134#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9133#L10-2 assume !!(main_~i~0 < 100); 9132#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9131#L10-2 assume !!(main_~i~0 < 100); 9130#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9129#L10-2 assume !!(main_~i~0 < 100); 9128#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9127#L10-2 assume !!(main_~i~0 < 100); 9126#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9125#L10-2 assume !!(main_~i~0 < 100); 9124#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9123#L10-2 assume !!(main_~i~0 < 100); 9122#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9121#L10-2 assume !!(main_~i~0 < 100); 9120#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9119#L10-2 assume !!(main_~i~0 < 100); 9118#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9117#L10-2 assume !!(main_~i~0 < 100); 9116#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9115#L10-2 assume !!(main_~i~0 < 100); 9114#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9113#L10-2 assume !!(main_~i~0 < 100); 9112#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9111#L10-2 assume !!(main_~i~0 < 100); 9110#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9109#L10-2 assume !!(main_~i~0 < 100); 9108#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9107#L10-2 assume !!(main_~i~0 < 100); 9106#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9105#L10-2 assume !!(main_~i~0 < 100); 9104#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9103#L10-2 assume !!(main_~i~0 < 100); 9102#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9101#L10-2 assume !!(main_~i~0 < 100); 9100#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9099#L10-2 assume !!(main_~i~0 < 100); 9098#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9097#L10-2 assume !!(main_~i~0 < 100); 9096#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9095#L10-2 assume !!(main_~i~0 < 100); 9094#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9093#L10-2 assume !!(main_~i~0 < 100); 9092#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9091#L10-2 assume !!(main_~i~0 < 100); 9090#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9089#L10-2 assume !!(main_~i~0 < 100); 9088#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9087#L10-2 assume !!(main_~i~0 < 100); 9086#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9085#L10-2 assume !!(main_~i~0 < 100); 9084#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9083#L10-2 assume !!(main_~i~0 < 100); 9082#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9081#L10-2 assume !!(main_~i~0 < 100); 9080#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9079#L10-2 assume !!(main_~i~0 < 100); 9077#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9076#L10-2 assume !!(main_~i~0 < 100); 9075#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9074#L10-2 assume !!(main_~i~0 < 100); 9066#L10 [2019-12-07 12:21:36,398 INFO L796 eck$LassoCheckResult]: Loop: 9066#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 9067#L10-2 assume !!(main_~i~0 < 100); 9075#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9074#L10-2 assume !!(main_~i~0 < 100); 9066#L10 [2019-12-07 12:21:36,399 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:36,399 INFO L82 PathProgramCache]: Analyzing trace with hash 2126241435, now seen corresponding path program 37 times [2019-12-07 12:21:36,399 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:36,399 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1289993193] [2019-12-07 12:21:36,399 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:36,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:36,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:36,407 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:36,407 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:36,407 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 35 times [2019-12-07 12:21:36,407 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:36,407 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1307543845] [2019-12-07 12:21:36,407 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:36,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:36,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:36,409 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:36,409 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:36,409 INFO L82 PathProgramCache]: Analyzing trace with hash -366210605, now seen corresponding path program 37 times [2019-12-07 12:21:36,409 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:36,409 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1723489131] [2019-12-07 12:21:36,409 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:36,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:36,847 INFO L134 CoverageAnalysis]: Checked inductivity of 1521 backedges. 114 proven. 1406 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:36,848 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1723489131] [2019-12-07 12:21:36,848 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1909115154] [2019-12-07 12:21:36,848 INFO L92 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 59 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:36,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:36,871 INFO L264 TraceCheckSpWp]: Trace formula consists of 161 conjuncts, 39 conjunts are in the unsatisfiable core [2019-12-07 12:21:36,872 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:36,887 INFO L134 CoverageAnalysis]: Checked inductivity of 1521 backedges. 114 proven. 1406 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:36,887 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:36,887 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39] total 39 [2019-12-07 12:21:36,887 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1712567722] [2019-12-07 12:21:36,905 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:36,906 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2019-12-07 12:21:36,906 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=780, Invalid=780, Unknown=0, NotChecked=0, Total=1560 [2019-12-07 12:21:36,906 INFO L87 Difference]: Start difference. First operand 79 states and 81 transitions. cyclomatic complexity: 3 Second operand 40 states. [2019-12-07 12:21:36,972 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:36,973 INFO L93 Difference]: Finished difference Result 83 states and 85 transitions. [2019-12-07 12:21:36,973 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2019-12-07 12:21:36,973 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 83 states and 85 transitions. [2019-12-07 12:21:36,973 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:36,974 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 83 states to 82 states and 84 transitions. [2019-12-07 12:21:36,974 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:36,974 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:36,974 INFO L73 IsDeterministic]: Start isDeterministic. Operand 82 states and 84 transitions. [2019-12-07 12:21:36,974 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:36,974 INFO L688 BuchiCegarLoop]: Abstraction has 82 states and 84 transitions. [2019-12-07 12:21:36,974 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states and 84 transitions. [2019-12-07 12:21:36,975 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 81. [2019-12-07 12:21:36,975 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 81 states. [2019-12-07 12:21:36,975 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81 states to 81 states and 83 transitions. [2019-12-07 12:21:36,975 INFO L711 BuchiCegarLoop]: Abstraction has 81 states and 83 transitions. [2019-12-07 12:21:36,975 INFO L591 BuchiCegarLoop]: Abstraction has 81 states and 83 transitions. [2019-12-07 12:21:36,975 INFO L424 BuchiCegarLoop]: ======== Iteration 40============ [2019-12-07 12:21:36,975 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 81 states and 83 transitions. [2019-12-07 12:21:36,976 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:36,976 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:36,976 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:36,976 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [39, 38, 1] [2019-12-07 12:21:36,976 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:36,976 INFO L794 eck$LassoCheckResult]: Stem: 9514#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 9515#L10-2 assume !!(main_~i~0 < 100); 9516#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9517#L10-2 assume !!(main_~i~0 < 100); 9512#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9513#L10-2 assume !!(main_~i~0 < 100); 9590#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9589#L10-2 assume !!(main_~i~0 < 100); 9588#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9587#L10-2 assume !!(main_~i~0 < 100); 9586#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9585#L10-2 assume !!(main_~i~0 < 100); 9584#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9583#L10-2 assume !!(main_~i~0 < 100); 9582#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9581#L10-2 assume !!(main_~i~0 < 100); 9580#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9579#L10-2 assume !!(main_~i~0 < 100); 9578#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9577#L10-2 assume !!(main_~i~0 < 100); 9576#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9575#L10-2 assume !!(main_~i~0 < 100); 9574#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9573#L10-2 assume !!(main_~i~0 < 100); 9572#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9571#L10-2 assume !!(main_~i~0 < 100); 9570#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9569#L10-2 assume !!(main_~i~0 < 100); 9568#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9567#L10-2 assume !!(main_~i~0 < 100); 9566#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9565#L10-2 assume !!(main_~i~0 < 100); 9564#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9563#L10-2 assume !!(main_~i~0 < 100); 9562#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9561#L10-2 assume !!(main_~i~0 < 100); 9560#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9559#L10-2 assume !!(main_~i~0 < 100); 9558#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9557#L10-2 assume !!(main_~i~0 < 100); 9556#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9555#L10-2 assume !!(main_~i~0 < 100); 9554#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9553#L10-2 assume !!(main_~i~0 < 100); 9552#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9551#L10-2 assume !!(main_~i~0 < 100); 9550#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9549#L10-2 assume !!(main_~i~0 < 100); 9548#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9547#L10-2 assume !!(main_~i~0 < 100); 9546#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9545#L10-2 assume !!(main_~i~0 < 100); 9544#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9543#L10-2 assume !!(main_~i~0 < 100); 9542#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9541#L10-2 assume !!(main_~i~0 < 100); 9540#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9539#L10-2 assume !!(main_~i~0 < 100); 9538#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9537#L10-2 assume !!(main_~i~0 < 100); 9536#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9535#L10-2 assume !!(main_~i~0 < 100); 9534#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9533#L10-2 assume !!(main_~i~0 < 100); 9532#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9531#L10-2 assume !!(main_~i~0 < 100); 9530#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9529#L10-2 assume !!(main_~i~0 < 100); 9528#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9527#L10-2 assume !!(main_~i~0 < 100); 9526#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9525#L10-2 assume !!(main_~i~0 < 100); 9524#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9523#L10-2 assume !!(main_~i~0 < 100); 9521#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9520#L10-2 assume !!(main_~i~0 < 100); 9519#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9518#L10-2 assume !!(main_~i~0 < 100); 9510#L10 [2019-12-07 12:21:36,976 INFO L796 eck$LassoCheckResult]: Loop: 9510#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 9511#L10-2 assume !!(main_~i~0 < 100); 9519#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9518#L10-2 assume !!(main_~i~0 < 100); 9510#L10 [2019-12-07 12:21:36,977 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:36,977 INFO L82 PathProgramCache]: Analyzing trace with hash -1086413448, now seen corresponding path program 38 times [2019-12-07 12:21:36,977 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:36,977 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1117804724] [2019-12-07 12:21:36,977 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:36,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:36,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:36,985 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:36,985 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:36,985 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 36 times [2019-12-07 12:21:36,985 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:36,985 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1558374335] [2019-12-07 12:21:36,985 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:36,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:36,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:36,987 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:36,987 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:36,987 INFO L82 PathProgramCache]: Analyzing trace with hash 201728560, now seen corresponding path program 38 times [2019-12-07 12:21:36,987 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:36,987 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1706153808] [2019-12-07 12:21:36,987 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:36,991 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:37,436 INFO L134 CoverageAnalysis]: Checked inductivity of 1600 backedges. 117 proven. 1482 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:37,436 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1706153808] [2019-12-07 12:21:37,436 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [958351153] [2019-12-07 12:21:37,436 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:37,462 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2019-12-07 12:21:37,462 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:37,463 INFO L264 TraceCheckSpWp]: Trace formula consists of 165 conjuncts, 40 conjunts are in the unsatisfiable core [2019-12-07 12:21:37,464 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:37,479 INFO L134 CoverageAnalysis]: Checked inductivity of 1600 backedges. 117 proven. 1482 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:37,479 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:37,479 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40] total 40 [2019-12-07 12:21:37,479 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1400378267] [2019-12-07 12:21:37,494 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:37,494 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2019-12-07 12:21:37,494 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=820, Invalid=820, Unknown=0, NotChecked=0, Total=1640 [2019-12-07 12:21:37,494 INFO L87 Difference]: Start difference. First operand 81 states and 83 transitions. cyclomatic complexity: 3 Second operand 41 states. [2019-12-07 12:21:37,561 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:37,561 INFO L93 Difference]: Finished difference Result 85 states and 87 transitions. [2019-12-07 12:21:37,561 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2019-12-07 12:21:37,561 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 85 states and 87 transitions. [2019-12-07 12:21:37,561 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:37,562 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 85 states to 84 states and 86 transitions. [2019-12-07 12:21:37,562 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:37,562 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:37,562 INFO L73 IsDeterministic]: Start isDeterministic. Operand 84 states and 86 transitions. [2019-12-07 12:21:37,562 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:37,563 INFO L688 BuchiCegarLoop]: Abstraction has 84 states and 86 transitions. [2019-12-07 12:21:37,563 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states and 86 transitions. [2019-12-07 12:21:37,564 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 83. [2019-12-07 12:21:37,564 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 83 states. [2019-12-07 12:21:37,564 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 85 transitions. [2019-12-07 12:21:37,564 INFO L711 BuchiCegarLoop]: Abstraction has 83 states and 85 transitions. [2019-12-07 12:21:37,564 INFO L591 BuchiCegarLoop]: Abstraction has 83 states and 85 transitions. [2019-12-07 12:21:37,564 INFO L424 BuchiCegarLoop]: ======== Iteration 41============ [2019-12-07 12:21:37,565 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 83 states and 85 transitions. [2019-12-07 12:21:37,565 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:37,565 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:37,565 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:37,566 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [40, 39, 1] [2019-12-07 12:21:37,566 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:37,566 INFO L794 eck$LassoCheckResult]: Stem: 9969#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 9970#L10-2 assume !!(main_~i~0 < 100); 9971#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9972#L10-2 assume !!(main_~i~0 < 100); 9967#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9968#L10-2 assume !!(main_~i~0 < 100); 10047#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10046#L10-2 assume !!(main_~i~0 < 100); 10045#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10044#L10-2 assume !!(main_~i~0 < 100); 10043#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10042#L10-2 assume !!(main_~i~0 < 100); 10041#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10040#L10-2 assume !!(main_~i~0 < 100); 10039#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10038#L10-2 assume !!(main_~i~0 < 100); 10037#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10036#L10-2 assume !!(main_~i~0 < 100); 10035#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10034#L10-2 assume !!(main_~i~0 < 100); 10033#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10032#L10-2 assume !!(main_~i~0 < 100); 10031#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10030#L10-2 assume !!(main_~i~0 < 100); 10029#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10028#L10-2 assume !!(main_~i~0 < 100); 10027#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10026#L10-2 assume !!(main_~i~0 < 100); 10025#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10024#L10-2 assume !!(main_~i~0 < 100); 10023#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10022#L10-2 assume !!(main_~i~0 < 100); 10021#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10020#L10-2 assume !!(main_~i~0 < 100); 10019#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10018#L10-2 assume !!(main_~i~0 < 100); 10017#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10016#L10-2 assume !!(main_~i~0 < 100); 10015#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10014#L10-2 assume !!(main_~i~0 < 100); 10013#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10012#L10-2 assume !!(main_~i~0 < 100); 10011#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10010#L10-2 assume !!(main_~i~0 < 100); 10009#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10008#L10-2 assume !!(main_~i~0 < 100); 10007#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10006#L10-2 assume !!(main_~i~0 < 100); 10005#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10004#L10-2 assume !!(main_~i~0 < 100); 10003#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10002#L10-2 assume !!(main_~i~0 < 100); 10001#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10000#L10-2 assume !!(main_~i~0 < 100); 9999#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9998#L10-2 assume !!(main_~i~0 < 100); 9997#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9996#L10-2 assume !!(main_~i~0 < 100); 9995#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9994#L10-2 assume !!(main_~i~0 < 100); 9993#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9992#L10-2 assume !!(main_~i~0 < 100); 9991#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9990#L10-2 assume !!(main_~i~0 < 100); 9989#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9988#L10-2 assume !!(main_~i~0 < 100); 9987#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9986#L10-2 assume !!(main_~i~0 < 100); 9985#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9984#L10-2 assume !!(main_~i~0 < 100); 9983#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9982#L10-2 assume !!(main_~i~0 < 100); 9981#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9980#L10-2 assume !!(main_~i~0 < 100); 9979#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9978#L10-2 assume !!(main_~i~0 < 100); 9976#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9975#L10-2 assume !!(main_~i~0 < 100); 9974#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9973#L10-2 assume !!(main_~i~0 < 100); 9965#L10 [2019-12-07 12:21:37,566 INFO L796 eck$LassoCheckResult]: Loop: 9965#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 9966#L10-2 assume !!(main_~i~0 < 100); 9974#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 9973#L10-2 assume !!(main_~i~0 < 100); 9965#L10 [2019-12-07 12:21:37,566 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:37,566 INFO L82 PathProgramCache]: Analyzing trace with hash -366270187, now seen corresponding path program 39 times [2019-12-07 12:21:37,566 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:37,566 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1465867492] [2019-12-07 12:21:37,567 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:37,572 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:37,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:37,577 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:37,577 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:37,577 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 37 times [2019-12-07 12:21:37,577 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:37,577 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [772569176] [2019-12-07 12:21:37,577 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:37,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:37,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:37,579 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:37,579 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:37,579 INFO L82 PathProgramCache]: Analyzing trace with hash 530419533, now seen corresponding path program 39 times [2019-12-07 12:21:37,579 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:37,579 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [37903166] [2019-12-07 12:21:37,579 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:37,584 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:38,066 INFO L134 CoverageAnalysis]: Checked inductivity of 1681 backedges. 120 proven. 1560 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:38,067 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [37903166] [2019-12-07 12:21:38,067 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1850342451] [2019-12-07 12:21:38,067 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 61 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:38,130 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 42 check-sat command(s) [2019-12-07 12:21:38,131 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:38,131 INFO L264 TraceCheckSpWp]: Trace formula consists of 169 conjuncts, 41 conjunts are in the unsatisfiable core [2019-12-07 12:21:38,132 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:38,143 INFO L134 CoverageAnalysis]: Checked inductivity of 1681 backedges. 120 proven. 1560 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:38,143 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:38,143 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 41] total 41 [2019-12-07 12:21:38,143 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1555931981] [2019-12-07 12:21:38,157 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:38,157 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2019-12-07 12:21:38,158 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=861, Invalid=861, Unknown=0, NotChecked=0, Total=1722 [2019-12-07 12:21:38,158 INFO L87 Difference]: Start difference. First operand 83 states and 85 transitions. cyclomatic complexity: 3 Second operand 42 states. [2019-12-07 12:21:38,227 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:38,227 INFO L93 Difference]: Finished difference Result 87 states and 89 transitions. [2019-12-07 12:21:38,227 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2019-12-07 12:21:38,227 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 87 states and 89 transitions. [2019-12-07 12:21:38,228 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:38,228 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 87 states to 86 states and 88 transitions. [2019-12-07 12:21:38,228 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:38,228 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:38,228 INFO L73 IsDeterministic]: Start isDeterministic. Operand 86 states and 88 transitions. [2019-12-07 12:21:38,228 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:38,228 INFO L688 BuchiCegarLoop]: Abstraction has 86 states and 88 transitions. [2019-12-07 12:21:38,228 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states and 88 transitions. [2019-12-07 12:21:38,229 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 85. [2019-12-07 12:21:38,229 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85 states. [2019-12-07 12:21:38,229 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 87 transitions. [2019-12-07 12:21:38,229 INFO L711 BuchiCegarLoop]: Abstraction has 85 states and 87 transitions. [2019-12-07 12:21:38,229 INFO L591 BuchiCegarLoop]: Abstraction has 85 states and 87 transitions. [2019-12-07 12:21:38,229 INFO L424 BuchiCegarLoop]: ======== Iteration 42============ [2019-12-07 12:21:38,229 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 85 states and 87 transitions. [2019-12-07 12:21:38,230 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:38,230 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:38,230 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:38,230 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [41, 40, 1] [2019-12-07 12:21:38,230 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:38,230 INFO L794 eck$LassoCheckResult]: Stem: 10435#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 10436#L10-2 assume !!(main_~i~0 < 100); 10437#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10438#L10-2 assume !!(main_~i~0 < 100); 10433#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10434#L10-2 assume !!(main_~i~0 < 100); 10515#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10514#L10-2 assume !!(main_~i~0 < 100); 10513#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10512#L10-2 assume !!(main_~i~0 < 100); 10511#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10510#L10-2 assume !!(main_~i~0 < 100); 10509#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10508#L10-2 assume !!(main_~i~0 < 100); 10507#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10506#L10-2 assume !!(main_~i~0 < 100); 10505#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10504#L10-2 assume !!(main_~i~0 < 100); 10503#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10502#L10-2 assume !!(main_~i~0 < 100); 10501#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10500#L10-2 assume !!(main_~i~0 < 100); 10499#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10498#L10-2 assume !!(main_~i~0 < 100); 10497#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10496#L10-2 assume !!(main_~i~0 < 100); 10495#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10494#L10-2 assume !!(main_~i~0 < 100); 10493#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10492#L10-2 assume !!(main_~i~0 < 100); 10491#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10490#L10-2 assume !!(main_~i~0 < 100); 10489#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10488#L10-2 assume !!(main_~i~0 < 100); 10487#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10486#L10-2 assume !!(main_~i~0 < 100); 10485#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10484#L10-2 assume !!(main_~i~0 < 100); 10483#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10482#L10-2 assume !!(main_~i~0 < 100); 10481#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10480#L10-2 assume !!(main_~i~0 < 100); 10479#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10478#L10-2 assume !!(main_~i~0 < 100); 10477#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10476#L10-2 assume !!(main_~i~0 < 100); 10475#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10474#L10-2 assume !!(main_~i~0 < 100); 10473#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10472#L10-2 assume !!(main_~i~0 < 100); 10471#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10470#L10-2 assume !!(main_~i~0 < 100); 10469#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10468#L10-2 assume !!(main_~i~0 < 100); 10467#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10466#L10-2 assume !!(main_~i~0 < 100); 10465#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10464#L10-2 assume !!(main_~i~0 < 100); 10463#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10462#L10-2 assume !!(main_~i~0 < 100); 10461#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10460#L10-2 assume !!(main_~i~0 < 100); 10459#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10458#L10-2 assume !!(main_~i~0 < 100); 10457#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10456#L10-2 assume !!(main_~i~0 < 100); 10455#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10454#L10-2 assume !!(main_~i~0 < 100); 10453#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10452#L10-2 assume !!(main_~i~0 < 100); 10451#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10450#L10-2 assume !!(main_~i~0 < 100); 10449#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10448#L10-2 assume !!(main_~i~0 < 100); 10447#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10446#L10-2 assume !!(main_~i~0 < 100); 10445#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10444#L10-2 assume !!(main_~i~0 < 100); 10442#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10441#L10-2 assume !!(main_~i~0 < 100); 10440#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10439#L10-2 assume !!(main_~i~0 < 100); 10431#L10 [2019-12-07 12:21:38,230 INFO L796 eck$LassoCheckResult]: Loop: 10431#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 10432#L10-2 assume !!(main_~i~0 < 100); 10440#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10439#L10-2 assume !!(main_~i~0 < 100); 10431#L10 [2019-12-07 12:21:38,231 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:38,231 INFO L82 PathProgramCache]: Analyzing trace with hash 201668978, now seen corresponding path program 40 times [2019-12-07 12:21:38,231 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:38,231 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1706730546] [2019-12-07 12:21:38,231 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:38,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:38,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:38,239 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:38,239 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:38,239 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 38 times [2019-12-07 12:21:38,239 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:38,239 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1225681259] [2019-12-07 12:21:38,239 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:38,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:38,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:38,241 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:38,241 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:38,241 INFO L82 PathProgramCache]: Analyzing trace with hash -1425135318, now seen corresponding path program 40 times [2019-12-07 12:21:38,241 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:38,241 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1198295357] [2019-12-07 12:21:38,241 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:38,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:38,728 INFO L134 CoverageAnalysis]: Checked inductivity of 1764 backedges. 123 proven. 1640 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:38,728 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1198295357] [2019-12-07 12:21:38,728 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [705163639] [2019-12-07 12:21:38,728 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:38,751 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-12-07 12:21:38,751 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:38,752 INFO L264 TraceCheckSpWp]: Trace formula consists of 173 conjuncts, 42 conjunts are in the unsatisfiable core [2019-12-07 12:21:38,753 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:38,764 INFO L134 CoverageAnalysis]: Checked inductivity of 1764 backedges. 123 proven. 1640 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:38,764 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:38,764 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 42] total 42 [2019-12-07 12:21:38,764 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1641698629] [2019-12-07 12:21:38,785 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:38,785 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2019-12-07 12:21:38,786 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=903, Invalid=903, Unknown=0, NotChecked=0, Total=1806 [2019-12-07 12:21:38,786 INFO L87 Difference]: Start difference. First operand 85 states and 87 transitions. cyclomatic complexity: 3 Second operand 43 states. [2019-12-07 12:21:38,851 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:38,852 INFO L93 Difference]: Finished difference Result 89 states and 91 transitions. [2019-12-07 12:21:38,852 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2019-12-07 12:21:38,852 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 89 states and 91 transitions. [2019-12-07 12:21:38,852 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:38,853 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 89 states to 88 states and 90 transitions. [2019-12-07 12:21:38,853 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:38,853 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:38,853 INFO L73 IsDeterministic]: Start isDeterministic. Operand 88 states and 90 transitions. [2019-12-07 12:21:38,853 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:38,853 INFO L688 BuchiCegarLoop]: Abstraction has 88 states and 90 transitions. [2019-12-07 12:21:38,853 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states and 90 transitions. [2019-12-07 12:21:38,854 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 87. [2019-12-07 12:21:38,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87 states. [2019-12-07 12:21:38,854 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 89 transitions. [2019-12-07 12:21:38,854 INFO L711 BuchiCegarLoop]: Abstraction has 87 states and 89 transitions. [2019-12-07 12:21:38,854 INFO L591 BuchiCegarLoop]: Abstraction has 87 states and 89 transitions. [2019-12-07 12:21:38,854 INFO L424 BuchiCegarLoop]: ======== Iteration 43============ [2019-12-07 12:21:38,854 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 87 states and 89 transitions. [2019-12-07 12:21:38,855 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:38,855 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:38,855 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:38,855 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [42, 41, 1] [2019-12-07 12:21:38,855 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:38,855 INFO L794 eck$LassoCheckResult]: Stem: 10912#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 10913#L10-2 assume !!(main_~i~0 < 100); 10914#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10915#L10-2 assume !!(main_~i~0 < 100); 10910#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10911#L10-2 assume !!(main_~i~0 < 100); 10994#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10993#L10-2 assume !!(main_~i~0 < 100); 10992#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10991#L10-2 assume !!(main_~i~0 < 100); 10990#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10989#L10-2 assume !!(main_~i~0 < 100); 10988#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10987#L10-2 assume !!(main_~i~0 < 100); 10986#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10985#L10-2 assume !!(main_~i~0 < 100); 10984#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10983#L10-2 assume !!(main_~i~0 < 100); 10982#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10981#L10-2 assume !!(main_~i~0 < 100); 10980#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10979#L10-2 assume !!(main_~i~0 < 100); 10978#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10977#L10-2 assume !!(main_~i~0 < 100); 10976#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10975#L10-2 assume !!(main_~i~0 < 100); 10974#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10973#L10-2 assume !!(main_~i~0 < 100); 10972#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10971#L10-2 assume !!(main_~i~0 < 100); 10970#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10969#L10-2 assume !!(main_~i~0 < 100); 10968#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10967#L10-2 assume !!(main_~i~0 < 100); 10966#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10965#L10-2 assume !!(main_~i~0 < 100); 10964#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10963#L10-2 assume !!(main_~i~0 < 100); 10962#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10961#L10-2 assume !!(main_~i~0 < 100); 10960#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10959#L10-2 assume !!(main_~i~0 < 100); 10958#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10957#L10-2 assume !!(main_~i~0 < 100); 10956#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10955#L10-2 assume !!(main_~i~0 < 100); 10954#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10953#L10-2 assume !!(main_~i~0 < 100); 10952#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10951#L10-2 assume !!(main_~i~0 < 100); 10950#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10949#L10-2 assume !!(main_~i~0 < 100); 10948#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10947#L10-2 assume !!(main_~i~0 < 100); 10946#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10945#L10-2 assume !!(main_~i~0 < 100); 10944#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10943#L10-2 assume !!(main_~i~0 < 100); 10942#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10941#L10-2 assume !!(main_~i~0 < 100); 10940#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10939#L10-2 assume !!(main_~i~0 < 100); 10938#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10937#L10-2 assume !!(main_~i~0 < 100); 10936#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10935#L10-2 assume !!(main_~i~0 < 100); 10934#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10933#L10-2 assume !!(main_~i~0 < 100); 10932#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10931#L10-2 assume !!(main_~i~0 < 100); 10930#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10929#L10-2 assume !!(main_~i~0 < 100); 10928#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10927#L10-2 assume !!(main_~i~0 < 100); 10926#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10925#L10-2 assume !!(main_~i~0 < 100); 10924#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10923#L10-2 assume !!(main_~i~0 < 100); 10922#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10921#L10-2 assume !!(main_~i~0 < 100); 10919#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10918#L10-2 assume !!(main_~i~0 < 100); 10917#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10916#L10-2 assume !!(main_~i~0 < 100); 10908#L10 [2019-12-07 12:21:38,856 INFO L796 eck$LassoCheckResult]: Loop: 10908#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 10909#L10-2 assume !!(main_~i~0 < 100); 10917#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 10916#L10-2 assume !!(main_~i~0 < 100); 10908#L10 [2019-12-07 12:21:38,856 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:38,856 INFO L82 PathProgramCache]: Analyzing trace with hash 530359951, now seen corresponding path program 41 times [2019-12-07 12:21:38,856 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:38,856 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1070543719] [2019-12-07 12:21:38,856 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:38,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:38,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:38,864 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:38,864 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:38,864 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 39 times [2019-12-07 12:21:38,864 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:38,864 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1198574510] [2019-12-07 12:21:38,864 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:38,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:38,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:38,866 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:38,866 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:38,866 INFO L82 PathProgramCache]: Analyzing trace with hash 482328519, now seen corresponding path program 41 times [2019-12-07 12:21:38,866 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:38,866 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2066677176] [2019-12-07 12:21:38,866 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:38,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:39,452 INFO L134 CoverageAnalysis]: Checked inductivity of 1849 backedges. 126 proven. 1722 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:39,453 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2066677176] [2019-12-07 12:21:39,453 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [788109586] [2019-12-07 12:21:39,453 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 63 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:39,492 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 44 check-sat command(s) [2019-12-07 12:21:39,492 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:39,493 INFO L264 TraceCheckSpWp]: Trace formula consists of 177 conjuncts, 43 conjunts are in the unsatisfiable core [2019-12-07 12:21:39,493 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:39,504 INFO L134 CoverageAnalysis]: Checked inductivity of 1849 backedges. 126 proven. 1722 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:39,505 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:39,505 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [43, 43] total 43 [2019-12-07 12:21:39,505 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [710157391] [2019-12-07 12:21:39,519 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:39,519 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2019-12-07 12:21:39,519 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=946, Invalid=946, Unknown=0, NotChecked=0, Total=1892 [2019-12-07 12:21:39,519 INFO L87 Difference]: Start difference. First operand 87 states and 89 transitions. cyclomatic complexity: 3 Second operand 44 states. [2019-12-07 12:21:39,590 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:39,590 INFO L93 Difference]: Finished difference Result 91 states and 93 transitions. [2019-12-07 12:21:39,591 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2019-12-07 12:21:39,591 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 91 states and 93 transitions. [2019-12-07 12:21:39,591 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:39,592 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 91 states to 90 states and 92 transitions. [2019-12-07 12:21:39,592 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:39,592 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:39,592 INFO L73 IsDeterministic]: Start isDeterministic. Operand 90 states and 92 transitions. [2019-12-07 12:21:39,592 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:39,592 INFO L688 BuchiCegarLoop]: Abstraction has 90 states and 92 transitions. [2019-12-07 12:21:39,592 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states and 92 transitions. [2019-12-07 12:21:39,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 89. [2019-12-07 12:21:39,593 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2019-12-07 12:21:39,593 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 91 transitions. [2019-12-07 12:21:39,593 INFO L711 BuchiCegarLoop]: Abstraction has 89 states and 91 transitions. [2019-12-07 12:21:39,593 INFO L591 BuchiCegarLoop]: Abstraction has 89 states and 91 transitions. [2019-12-07 12:21:39,593 INFO L424 BuchiCegarLoop]: ======== Iteration 44============ [2019-12-07 12:21:39,593 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 89 states and 91 transitions. [2019-12-07 12:21:39,593 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:39,593 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:39,593 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:39,594 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [43, 42, 1] [2019-12-07 12:21:39,594 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:39,594 INFO L794 eck$LassoCheckResult]: Stem: 11400#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 11401#L10-2 assume !!(main_~i~0 < 100); 11402#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11403#L10-2 assume !!(main_~i~0 < 100); 11398#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11399#L10-2 assume !!(main_~i~0 < 100); 11484#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11483#L10-2 assume !!(main_~i~0 < 100); 11482#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11481#L10-2 assume !!(main_~i~0 < 100); 11480#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11479#L10-2 assume !!(main_~i~0 < 100); 11478#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11477#L10-2 assume !!(main_~i~0 < 100); 11476#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11475#L10-2 assume !!(main_~i~0 < 100); 11474#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11473#L10-2 assume !!(main_~i~0 < 100); 11472#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11471#L10-2 assume !!(main_~i~0 < 100); 11470#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11469#L10-2 assume !!(main_~i~0 < 100); 11468#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11467#L10-2 assume !!(main_~i~0 < 100); 11466#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11465#L10-2 assume !!(main_~i~0 < 100); 11464#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11463#L10-2 assume !!(main_~i~0 < 100); 11462#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11461#L10-2 assume !!(main_~i~0 < 100); 11460#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11459#L10-2 assume !!(main_~i~0 < 100); 11458#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11457#L10-2 assume !!(main_~i~0 < 100); 11456#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11455#L10-2 assume !!(main_~i~0 < 100); 11454#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11453#L10-2 assume !!(main_~i~0 < 100); 11452#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11451#L10-2 assume !!(main_~i~0 < 100); 11450#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11449#L10-2 assume !!(main_~i~0 < 100); 11448#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11447#L10-2 assume !!(main_~i~0 < 100); 11446#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11445#L10-2 assume !!(main_~i~0 < 100); 11444#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11443#L10-2 assume !!(main_~i~0 < 100); 11442#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11441#L10-2 assume !!(main_~i~0 < 100); 11440#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11439#L10-2 assume !!(main_~i~0 < 100); 11438#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11437#L10-2 assume !!(main_~i~0 < 100); 11436#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11435#L10-2 assume !!(main_~i~0 < 100); 11434#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11433#L10-2 assume !!(main_~i~0 < 100); 11432#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11431#L10-2 assume !!(main_~i~0 < 100); 11430#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11429#L10-2 assume !!(main_~i~0 < 100); 11428#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11427#L10-2 assume !!(main_~i~0 < 100); 11426#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11425#L10-2 assume !!(main_~i~0 < 100); 11424#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11423#L10-2 assume !!(main_~i~0 < 100); 11422#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11421#L10-2 assume !!(main_~i~0 < 100); 11420#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11419#L10-2 assume !!(main_~i~0 < 100); 11418#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11417#L10-2 assume !!(main_~i~0 < 100); 11416#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11415#L10-2 assume !!(main_~i~0 < 100); 11414#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11413#L10-2 assume !!(main_~i~0 < 100); 11412#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11411#L10-2 assume !!(main_~i~0 < 100); 11410#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11409#L10-2 assume !!(main_~i~0 < 100); 11407#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11406#L10-2 assume !!(main_~i~0 < 100); 11405#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11404#L10-2 assume !!(main_~i~0 < 100); 11396#L10 [2019-12-07 12:21:39,594 INFO L796 eck$LassoCheckResult]: Loop: 11396#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 11397#L10-2 assume !!(main_~i~0 < 100); 11405#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11404#L10-2 assume !!(main_~i~0 < 100); 11396#L10 [2019-12-07 12:21:39,594 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:39,594 INFO L82 PathProgramCache]: Analyzing trace with hash -1425194900, now seen corresponding path program 42 times [2019-12-07 12:21:39,594 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:39,595 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1612913593] [2019-12-07 12:21:39,595 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:39,599 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:39,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:39,603 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:39,604 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:39,604 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 40 times [2019-12-07 12:21:39,604 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:39,604 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1241252765] [2019-12-07 12:21:39,604 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:39,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:39,605 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:39,605 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:39,605 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:39,605 INFO L82 PathProgramCache]: Analyzing trace with hash -395959516, now seen corresponding path program 42 times [2019-12-07 12:21:39,605 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:39,606 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1462138724] [2019-12-07 12:21:39,606 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:39,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:40,141 INFO L134 CoverageAnalysis]: Checked inductivity of 1936 backedges. 129 proven. 1806 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:40,142 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1462138724] [2019-12-07 12:21:40,142 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [741326442] [2019-12-07 12:21:40,142 INFO L92 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:40,181 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 45 check-sat command(s) [2019-12-07 12:21:40,181 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:40,182 INFO L264 TraceCheckSpWp]: Trace formula consists of 181 conjuncts, 44 conjunts are in the unsatisfiable core [2019-12-07 12:21:40,183 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:40,198 INFO L134 CoverageAnalysis]: Checked inductivity of 1936 backedges. 129 proven. 1806 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:40,198 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:40,199 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [44, 44] total 44 [2019-12-07 12:21:40,199 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1156729011] [2019-12-07 12:21:40,216 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:40,217 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2019-12-07 12:21:40,217 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=990, Invalid=990, Unknown=0, NotChecked=0, Total=1980 [2019-12-07 12:21:40,217 INFO L87 Difference]: Start difference. First operand 89 states and 91 transitions. cyclomatic complexity: 3 Second operand 45 states. [2019-12-07 12:21:40,286 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:40,286 INFO L93 Difference]: Finished difference Result 93 states and 95 transitions. [2019-12-07 12:21:40,286 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2019-12-07 12:21:40,287 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 93 states and 95 transitions. [2019-12-07 12:21:40,287 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:40,287 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 93 states to 92 states and 94 transitions. [2019-12-07 12:21:40,287 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:40,287 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:40,288 INFO L73 IsDeterministic]: Start isDeterministic. Operand 92 states and 94 transitions. [2019-12-07 12:21:40,288 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:40,288 INFO L688 BuchiCegarLoop]: Abstraction has 92 states and 94 transitions. [2019-12-07 12:21:40,288 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states and 94 transitions. [2019-12-07 12:21:40,289 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 91. [2019-12-07 12:21:40,289 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 91 states. [2019-12-07 12:21:40,289 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 93 transitions. [2019-12-07 12:21:40,289 INFO L711 BuchiCegarLoop]: Abstraction has 91 states and 93 transitions. [2019-12-07 12:21:40,289 INFO L591 BuchiCegarLoop]: Abstraction has 91 states and 93 transitions. [2019-12-07 12:21:40,289 INFO L424 BuchiCegarLoop]: ======== Iteration 45============ [2019-12-07 12:21:40,289 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 91 states and 93 transitions. [2019-12-07 12:21:40,289 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:40,289 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:40,289 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:40,290 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [44, 43, 1] [2019-12-07 12:21:40,290 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:40,290 INFO L794 eck$LassoCheckResult]: Stem: 11899#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 11900#L10-2 assume !!(main_~i~0 < 100); 11901#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11902#L10-2 assume !!(main_~i~0 < 100); 11897#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11898#L10-2 assume !!(main_~i~0 < 100); 11985#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11984#L10-2 assume !!(main_~i~0 < 100); 11983#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11982#L10-2 assume !!(main_~i~0 < 100); 11981#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11980#L10-2 assume !!(main_~i~0 < 100); 11979#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11978#L10-2 assume !!(main_~i~0 < 100); 11977#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11976#L10-2 assume !!(main_~i~0 < 100); 11975#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11974#L10-2 assume !!(main_~i~0 < 100); 11973#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11972#L10-2 assume !!(main_~i~0 < 100); 11971#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11970#L10-2 assume !!(main_~i~0 < 100); 11969#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11968#L10-2 assume !!(main_~i~0 < 100); 11967#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11966#L10-2 assume !!(main_~i~0 < 100); 11965#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11964#L10-2 assume !!(main_~i~0 < 100); 11963#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11962#L10-2 assume !!(main_~i~0 < 100); 11961#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11960#L10-2 assume !!(main_~i~0 < 100); 11959#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11958#L10-2 assume !!(main_~i~0 < 100); 11957#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11956#L10-2 assume !!(main_~i~0 < 100); 11955#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11954#L10-2 assume !!(main_~i~0 < 100); 11953#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11952#L10-2 assume !!(main_~i~0 < 100); 11951#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11950#L10-2 assume !!(main_~i~0 < 100); 11949#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11948#L10-2 assume !!(main_~i~0 < 100); 11947#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11946#L10-2 assume !!(main_~i~0 < 100); 11945#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11944#L10-2 assume !!(main_~i~0 < 100); 11943#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11942#L10-2 assume !!(main_~i~0 < 100); 11941#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11940#L10-2 assume !!(main_~i~0 < 100); 11939#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11938#L10-2 assume !!(main_~i~0 < 100); 11937#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11936#L10-2 assume !!(main_~i~0 < 100); 11935#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11934#L10-2 assume !!(main_~i~0 < 100); 11933#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11932#L10-2 assume !!(main_~i~0 < 100); 11931#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11930#L10-2 assume !!(main_~i~0 < 100); 11929#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11928#L10-2 assume !!(main_~i~0 < 100); 11927#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11926#L10-2 assume !!(main_~i~0 < 100); 11925#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11924#L10-2 assume !!(main_~i~0 < 100); 11923#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11922#L10-2 assume !!(main_~i~0 < 100); 11921#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11920#L10-2 assume !!(main_~i~0 < 100); 11919#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11918#L10-2 assume !!(main_~i~0 < 100); 11917#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11916#L10-2 assume !!(main_~i~0 < 100); 11915#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11914#L10-2 assume !!(main_~i~0 < 100); 11913#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11912#L10-2 assume !!(main_~i~0 < 100); 11911#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11910#L10-2 assume !!(main_~i~0 < 100); 11909#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11908#L10-2 assume !!(main_~i~0 < 100); 11906#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11905#L10-2 assume !!(main_~i~0 < 100); 11904#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11903#L10-2 assume !!(main_~i~0 < 100); 11895#L10 [2019-12-07 12:21:40,290 INFO L796 eck$LassoCheckResult]: Loop: 11895#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 11896#L10-2 assume !!(main_~i~0 < 100); 11904#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 11903#L10-2 assume !!(main_~i~0 < 100); 11895#L10 [2019-12-07 12:21:40,290 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:40,290 INFO L82 PathProgramCache]: Analyzing trace with hash 482268937, now seen corresponding path program 43 times [2019-12-07 12:21:40,290 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:40,290 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2028605860] [2019-12-07 12:21:40,290 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:40,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:40,297 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:40,299 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:40,299 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:40,299 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 41 times [2019-12-07 12:21:40,299 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:40,299 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1664648467] [2019-12-07 12:21:40,299 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:40,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:40,300 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:40,300 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:40,301 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:40,301 INFO L82 PathProgramCache]: Analyzing trace with hash 1677796161, now seen corresponding path program 43 times [2019-12-07 12:21:40,301 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:40,301 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [828591651] [2019-12-07 12:21:40,301 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:40,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:40,876 INFO L134 CoverageAnalysis]: Checked inductivity of 2025 backedges. 132 proven. 1892 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:40,876 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [828591651] [2019-12-07 12:21:40,876 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2013490963] [2019-12-07 12:21:40,876 INFO L92 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 65 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:40,900 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:40,901 INFO L264 TraceCheckSpWp]: Trace formula consists of 185 conjuncts, 45 conjunts are in the unsatisfiable core [2019-12-07 12:21:40,902 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:40,912 INFO L134 CoverageAnalysis]: Checked inductivity of 2025 backedges. 132 proven. 1892 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:40,913 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:40,913 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [45, 45] total 45 [2019-12-07 12:21:40,913 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2087947421] [2019-12-07 12:21:40,927 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:40,928 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2019-12-07 12:21:40,928 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1035, Invalid=1035, Unknown=0, NotChecked=0, Total=2070 [2019-12-07 12:21:40,928 INFO L87 Difference]: Start difference. First operand 91 states and 93 transitions. cyclomatic complexity: 3 Second operand 46 states. [2019-12-07 12:21:40,990 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:40,990 INFO L93 Difference]: Finished difference Result 95 states and 97 transitions. [2019-12-07 12:21:40,990 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2019-12-07 12:21:40,990 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 95 states and 97 transitions. [2019-12-07 12:21:40,991 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:40,991 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 95 states to 94 states and 96 transitions. [2019-12-07 12:21:40,991 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:40,991 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:40,991 INFO L73 IsDeterministic]: Start isDeterministic. Operand 94 states and 96 transitions. [2019-12-07 12:21:40,992 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:40,992 INFO L688 BuchiCegarLoop]: Abstraction has 94 states and 96 transitions. [2019-12-07 12:21:40,992 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states and 96 transitions. [2019-12-07 12:21:40,992 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 93. [2019-12-07 12:21:40,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 93 states. [2019-12-07 12:21:40,993 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 95 transitions. [2019-12-07 12:21:40,993 INFO L711 BuchiCegarLoop]: Abstraction has 93 states and 95 transitions. [2019-12-07 12:21:40,993 INFO L591 BuchiCegarLoop]: Abstraction has 93 states and 95 transitions. [2019-12-07 12:21:40,993 INFO L424 BuchiCegarLoop]: ======== Iteration 46============ [2019-12-07 12:21:40,993 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 93 states and 95 transitions. [2019-12-07 12:21:40,993 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:40,993 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:40,993 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:40,994 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [45, 44, 1] [2019-12-07 12:21:40,994 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:40,994 INFO L794 eck$LassoCheckResult]: Stem: 12409#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 12410#L10-2 assume !!(main_~i~0 < 100); 12411#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12412#L10-2 assume !!(main_~i~0 < 100); 12407#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12408#L10-2 assume !!(main_~i~0 < 100); 12497#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12496#L10-2 assume !!(main_~i~0 < 100); 12495#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12494#L10-2 assume !!(main_~i~0 < 100); 12493#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12492#L10-2 assume !!(main_~i~0 < 100); 12491#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12490#L10-2 assume !!(main_~i~0 < 100); 12489#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12488#L10-2 assume !!(main_~i~0 < 100); 12487#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12486#L10-2 assume !!(main_~i~0 < 100); 12485#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12484#L10-2 assume !!(main_~i~0 < 100); 12483#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12482#L10-2 assume !!(main_~i~0 < 100); 12481#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12480#L10-2 assume !!(main_~i~0 < 100); 12479#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12478#L10-2 assume !!(main_~i~0 < 100); 12477#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12476#L10-2 assume !!(main_~i~0 < 100); 12475#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12474#L10-2 assume !!(main_~i~0 < 100); 12473#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12472#L10-2 assume !!(main_~i~0 < 100); 12471#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12470#L10-2 assume !!(main_~i~0 < 100); 12469#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12468#L10-2 assume !!(main_~i~0 < 100); 12467#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12466#L10-2 assume !!(main_~i~0 < 100); 12465#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12464#L10-2 assume !!(main_~i~0 < 100); 12463#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12462#L10-2 assume !!(main_~i~0 < 100); 12461#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12460#L10-2 assume !!(main_~i~0 < 100); 12459#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12458#L10-2 assume !!(main_~i~0 < 100); 12457#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12456#L10-2 assume !!(main_~i~0 < 100); 12455#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12454#L10-2 assume !!(main_~i~0 < 100); 12453#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12452#L10-2 assume !!(main_~i~0 < 100); 12451#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12450#L10-2 assume !!(main_~i~0 < 100); 12449#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12448#L10-2 assume !!(main_~i~0 < 100); 12447#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12446#L10-2 assume !!(main_~i~0 < 100); 12445#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12444#L10-2 assume !!(main_~i~0 < 100); 12443#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12442#L10-2 assume !!(main_~i~0 < 100); 12441#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12440#L10-2 assume !!(main_~i~0 < 100); 12439#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12438#L10-2 assume !!(main_~i~0 < 100); 12437#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12436#L10-2 assume !!(main_~i~0 < 100); 12435#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12434#L10-2 assume !!(main_~i~0 < 100); 12433#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12432#L10-2 assume !!(main_~i~0 < 100); 12431#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12430#L10-2 assume !!(main_~i~0 < 100); 12429#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12428#L10-2 assume !!(main_~i~0 < 100); 12427#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12426#L10-2 assume !!(main_~i~0 < 100); 12425#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12424#L10-2 assume !!(main_~i~0 < 100); 12423#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12422#L10-2 assume !!(main_~i~0 < 100); 12421#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12420#L10-2 assume !!(main_~i~0 < 100); 12419#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12418#L10-2 assume !!(main_~i~0 < 100); 12416#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12415#L10-2 assume !!(main_~i~0 < 100); 12414#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12413#L10-2 assume !!(main_~i~0 < 100); 12405#L10 [2019-12-07 12:21:40,994 INFO L796 eck$LassoCheckResult]: Loop: 12405#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 12406#L10-2 assume !!(main_~i~0 < 100); 12414#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12413#L10-2 assume !!(main_~i~0 < 100); 12405#L10 [2019-12-07 12:21:40,994 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:40,994 INFO L82 PathProgramCache]: Analyzing trace with hash -396019098, now seen corresponding path program 44 times [2019-12-07 12:21:40,994 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:40,994 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [299006552] [2019-12-07 12:21:40,994 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:40,998 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:41,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:41,003 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:41,003 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:41,003 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 42 times [2019-12-07 12:21:41,003 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:41,003 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1682323637] [2019-12-07 12:21:41,003 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:41,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:41,004 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:41,004 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:41,004 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:41,004 INFO L82 PathProgramCache]: Analyzing trace with hash 1692176414, now seen corresponding path program 44 times [2019-12-07 12:21:41,004 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:41,004 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1283084876] [2019-12-07 12:21:41,004 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:41,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:41,581 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 135 proven. 1980 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:41,581 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1283084876] [2019-12-07 12:21:41,581 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [700869342] [2019-12-07 12:21:41,581 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:41,607 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2019-12-07 12:21:41,607 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:41,608 INFO L264 TraceCheckSpWp]: Trace formula consists of 189 conjuncts, 46 conjunts are in the unsatisfiable core [2019-12-07 12:21:41,609 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:41,620 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 135 proven. 1980 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:41,621 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:41,621 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [46, 46] total 46 [2019-12-07 12:21:41,621 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2029918725] [2019-12-07 12:21:41,642 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:41,642 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2019-12-07 12:21:41,643 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1081, Invalid=1081, Unknown=0, NotChecked=0, Total=2162 [2019-12-07 12:21:41,643 INFO L87 Difference]: Start difference. First operand 93 states and 95 transitions. cyclomatic complexity: 3 Second operand 47 states. [2019-12-07 12:21:41,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:41,715 INFO L93 Difference]: Finished difference Result 97 states and 99 transitions. [2019-12-07 12:21:41,715 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2019-12-07 12:21:41,715 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 97 states and 99 transitions. [2019-12-07 12:21:41,716 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:41,717 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 97 states to 96 states and 98 transitions. [2019-12-07 12:21:41,717 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:41,717 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:41,717 INFO L73 IsDeterministic]: Start isDeterministic. Operand 96 states and 98 transitions. [2019-12-07 12:21:41,717 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:41,717 INFO L688 BuchiCegarLoop]: Abstraction has 96 states and 98 transitions. [2019-12-07 12:21:41,717 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states and 98 transitions. [2019-12-07 12:21:41,718 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 95. [2019-12-07 12:21:41,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 95 states. [2019-12-07 12:21:41,719 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 97 transitions. [2019-12-07 12:21:41,719 INFO L711 BuchiCegarLoop]: Abstraction has 95 states and 97 transitions. [2019-12-07 12:21:41,719 INFO L591 BuchiCegarLoop]: Abstraction has 95 states and 97 transitions. [2019-12-07 12:21:41,719 INFO L424 BuchiCegarLoop]: ======== Iteration 47============ [2019-12-07 12:21:41,719 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 95 states and 97 transitions. [2019-12-07 12:21:41,720 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:41,720 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:41,720 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:41,720 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [46, 45, 1] [2019-12-07 12:21:41,721 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:41,721 INFO L794 eck$LassoCheckResult]: Stem: 12930#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 12931#L10-2 assume !!(main_~i~0 < 100); 12932#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12933#L10-2 assume !!(main_~i~0 < 100); 12928#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12929#L10-2 assume !!(main_~i~0 < 100); 13020#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13019#L10-2 assume !!(main_~i~0 < 100); 13018#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13017#L10-2 assume !!(main_~i~0 < 100); 13016#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13015#L10-2 assume !!(main_~i~0 < 100); 13014#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13013#L10-2 assume !!(main_~i~0 < 100); 13012#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13011#L10-2 assume !!(main_~i~0 < 100); 13010#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13009#L10-2 assume !!(main_~i~0 < 100); 13008#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13007#L10-2 assume !!(main_~i~0 < 100); 13006#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13005#L10-2 assume !!(main_~i~0 < 100); 13004#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13003#L10-2 assume !!(main_~i~0 < 100); 13002#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13001#L10-2 assume !!(main_~i~0 < 100); 13000#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12999#L10-2 assume !!(main_~i~0 < 100); 12998#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12997#L10-2 assume !!(main_~i~0 < 100); 12996#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12995#L10-2 assume !!(main_~i~0 < 100); 12994#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12993#L10-2 assume !!(main_~i~0 < 100); 12992#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12991#L10-2 assume !!(main_~i~0 < 100); 12990#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12989#L10-2 assume !!(main_~i~0 < 100); 12988#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12987#L10-2 assume !!(main_~i~0 < 100); 12986#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12985#L10-2 assume !!(main_~i~0 < 100); 12984#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12983#L10-2 assume !!(main_~i~0 < 100); 12982#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12981#L10-2 assume !!(main_~i~0 < 100); 12980#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12979#L10-2 assume !!(main_~i~0 < 100); 12978#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12977#L10-2 assume !!(main_~i~0 < 100); 12976#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12975#L10-2 assume !!(main_~i~0 < 100); 12974#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12973#L10-2 assume !!(main_~i~0 < 100); 12972#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12971#L10-2 assume !!(main_~i~0 < 100); 12970#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12969#L10-2 assume !!(main_~i~0 < 100); 12968#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12967#L10-2 assume !!(main_~i~0 < 100); 12966#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12965#L10-2 assume !!(main_~i~0 < 100); 12964#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12963#L10-2 assume !!(main_~i~0 < 100); 12962#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12961#L10-2 assume !!(main_~i~0 < 100); 12960#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12959#L10-2 assume !!(main_~i~0 < 100); 12958#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12957#L10-2 assume !!(main_~i~0 < 100); 12956#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12955#L10-2 assume !!(main_~i~0 < 100); 12954#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12953#L10-2 assume !!(main_~i~0 < 100); 12952#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12951#L10-2 assume !!(main_~i~0 < 100); 12950#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12949#L10-2 assume !!(main_~i~0 < 100); 12948#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12947#L10-2 assume !!(main_~i~0 < 100); 12946#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12945#L10-2 assume !!(main_~i~0 < 100); 12944#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12943#L10-2 assume !!(main_~i~0 < 100); 12942#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12941#L10-2 assume !!(main_~i~0 < 100); 12940#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12939#L10-2 assume !!(main_~i~0 < 100); 12937#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12936#L10-2 assume !!(main_~i~0 < 100); 12935#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12934#L10-2 assume !!(main_~i~0 < 100); 12926#L10 [2019-12-07 12:21:41,721 INFO L796 eck$LassoCheckResult]: Loop: 12926#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 12927#L10-2 assume !!(main_~i~0 < 100); 12935#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 12934#L10-2 assume !!(main_~i~0 < 100); 12926#L10 [2019-12-07 12:21:41,721 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:41,721 INFO L82 PathProgramCache]: Analyzing trace with hash 1677736579, now seen corresponding path program 45 times [2019-12-07 12:21:41,721 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:41,721 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1650759993] [2019-12-07 12:21:41,721 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:41,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:41,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:41,735 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:41,735 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:41,736 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 43 times [2019-12-07 12:21:41,736 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:41,736 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [472859639] [2019-12-07 12:21:41,736 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:41,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:41,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:41,738 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:41,738 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:41,738 INFO L82 PathProgramCache]: Analyzing trace with hash -1668269637, now seen corresponding path program 45 times [2019-12-07 12:21:41,738 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:41,738 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [276372709] [2019-12-07 12:21:41,738 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:41,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:42,379 INFO L134 CoverageAnalysis]: Checked inductivity of 2209 backedges. 138 proven. 2070 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:42,379 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [276372709] [2019-12-07 12:21:42,379 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [460468469] [2019-12-07 12:21:42,379 INFO L92 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 67 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:42,420 INFO L249 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued 48 check-sat command(s) [2019-12-07 12:21:42,420 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:42,421 INFO L264 TraceCheckSpWp]: Trace formula consists of 193 conjuncts, 47 conjunts are in the unsatisfiable core [2019-12-07 12:21:42,422 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:42,433 INFO L134 CoverageAnalysis]: Checked inductivity of 2209 backedges. 138 proven. 2070 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:42,433 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:42,434 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [47, 47] total 47 [2019-12-07 12:21:42,434 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1227528206] [2019-12-07 12:21:42,449 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:42,449 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2019-12-07 12:21:42,450 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1128, Invalid=1128, Unknown=0, NotChecked=0, Total=2256 [2019-12-07 12:21:42,450 INFO L87 Difference]: Start difference. First operand 95 states and 97 transitions. cyclomatic complexity: 3 Second operand 48 states. [2019-12-07 12:21:42,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:42,517 INFO L93 Difference]: Finished difference Result 99 states and 101 transitions. [2019-12-07 12:21:42,517 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2019-12-07 12:21:42,517 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 99 states and 101 transitions. [2019-12-07 12:21:42,518 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:42,518 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 99 states to 98 states and 100 transitions. [2019-12-07 12:21:42,518 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:42,518 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:42,518 INFO L73 IsDeterministic]: Start isDeterministic. Operand 98 states and 100 transitions. [2019-12-07 12:21:42,518 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:42,519 INFO L688 BuchiCegarLoop]: Abstraction has 98 states and 100 transitions. [2019-12-07 12:21:42,519 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states and 100 transitions. [2019-12-07 12:21:42,519 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 97. [2019-12-07 12:21:42,519 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2019-12-07 12:21:42,520 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 99 transitions. [2019-12-07 12:21:42,520 INFO L711 BuchiCegarLoop]: Abstraction has 97 states and 99 transitions. [2019-12-07 12:21:42,520 INFO L591 BuchiCegarLoop]: Abstraction has 97 states and 99 transitions. [2019-12-07 12:21:42,520 INFO L424 BuchiCegarLoop]: ======== Iteration 48============ [2019-12-07 12:21:42,520 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 97 states and 99 transitions. [2019-12-07 12:21:42,520 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:42,520 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:42,520 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:42,521 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [47, 46, 1] [2019-12-07 12:21:42,521 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:42,521 INFO L794 eck$LassoCheckResult]: Stem: 13462#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 13463#L10-2 assume !!(main_~i~0 < 100); 13464#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13465#L10-2 assume !!(main_~i~0 < 100); 13460#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13461#L10-2 assume !!(main_~i~0 < 100); 13554#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13553#L10-2 assume !!(main_~i~0 < 100); 13552#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13551#L10-2 assume !!(main_~i~0 < 100); 13550#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13549#L10-2 assume !!(main_~i~0 < 100); 13548#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13547#L10-2 assume !!(main_~i~0 < 100); 13546#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13545#L10-2 assume !!(main_~i~0 < 100); 13544#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13543#L10-2 assume !!(main_~i~0 < 100); 13542#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13541#L10-2 assume !!(main_~i~0 < 100); 13540#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13539#L10-2 assume !!(main_~i~0 < 100); 13538#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13537#L10-2 assume !!(main_~i~0 < 100); 13536#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13535#L10-2 assume !!(main_~i~0 < 100); 13534#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13533#L10-2 assume !!(main_~i~0 < 100); 13532#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13531#L10-2 assume !!(main_~i~0 < 100); 13530#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13529#L10-2 assume !!(main_~i~0 < 100); 13528#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13527#L10-2 assume !!(main_~i~0 < 100); 13526#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13525#L10-2 assume !!(main_~i~0 < 100); 13524#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13523#L10-2 assume !!(main_~i~0 < 100); 13522#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13521#L10-2 assume !!(main_~i~0 < 100); 13520#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13519#L10-2 assume !!(main_~i~0 < 100); 13518#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13517#L10-2 assume !!(main_~i~0 < 100); 13516#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13515#L10-2 assume !!(main_~i~0 < 100); 13514#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13513#L10-2 assume !!(main_~i~0 < 100); 13512#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13511#L10-2 assume !!(main_~i~0 < 100); 13510#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13509#L10-2 assume !!(main_~i~0 < 100); 13508#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13507#L10-2 assume !!(main_~i~0 < 100); 13506#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13505#L10-2 assume !!(main_~i~0 < 100); 13504#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13503#L10-2 assume !!(main_~i~0 < 100); 13502#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13501#L10-2 assume !!(main_~i~0 < 100); 13500#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13499#L10-2 assume !!(main_~i~0 < 100); 13498#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13497#L10-2 assume !!(main_~i~0 < 100); 13496#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13495#L10-2 assume !!(main_~i~0 < 100); 13494#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13493#L10-2 assume !!(main_~i~0 < 100); 13492#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13491#L10-2 assume !!(main_~i~0 < 100); 13490#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13489#L10-2 assume !!(main_~i~0 < 100); 13488#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13487#L10-2 assume !!(main_~i~0 < 100); 13486#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13485#L10-2 assume !!(main_~i~0 < 100); 13484#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13483#L10-2 assume !!(main_~i~0 < 100); 13482#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13481#L10-2 assume !!(main_~i~0 < 100); 13480#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13479#L10-2 assume !!(main_~i~0 < 100); 13478#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13477#L10-2 assume !!(main_~i~0 < 100); 13476#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13475#L10-2 assume !!(main_~i~0 < 100); 13474#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13473#L10-2 assume !!(main_~i~0 < 100); 13472#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13471#L10-2 assume !!(main_~i~0 < 100); 13469#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13468#L10-2 assume !!(main_~i~0 < 100); 13467#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13466#L10-2 assume !!(main_~i~0 < 100); 13458#L10 [2019-12-07 12:21:42,521 INFO L796 eck$LassoCheckResult]: Loop: 13458#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 13459#L10-2 assume !!(main_~i~0 < 100); 13467#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 13466#L10-2 assume !!(main_~i~0 < 100); 13458#L10 [2019-12-07 12:21:42,521 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:42,521 INFO L82 PathProgramCache]: Analyzing trace with hash 1692116832, now seen corresponding path program 46 times [2019-12-07 12:21:42,521 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:42,521 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1079798073] [2019-12-07 12:21:42,521 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:42,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:42,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:42,530 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:42,530 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:42,530 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 44 times [2019-12-07 12:21:42,530 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:42,530 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [497416924] [2019-12-07 12:21:42,530 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:42,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:42,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:42,532 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:42,532 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:42,532 INFO L82 PathProgramCache]: Analyzing trace with hash -1241518056, now seen corresponding path program 46 times [2019-12-07 12:21:42,532 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:42,532 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [108049049] [2019-12-07 12:21:42,532 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:42,536 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:43,181 INFO L134 CoverageAnalysis]: Checked inductivity of 2304 backedges. 141 proven. 2162 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:43,181 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [108049049] [2019-12-07 12:21:43,181 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1831642253] [2019-12-07 12:21:43,181 INFO L92 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:43,207 INFO L249 tOrderPrioritization]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 0 check-sat command(s) [2019-12-07 12:21:43,208 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:43,209 INFO L264 TraceCheckSpWp]: Trace formula consists of 197 conjuncts, 48 conjunts are in the unsatisfiable core [2019-12-07 12:21:43,210 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:43,222 INFO L134 CoverageAnalysis]: Checked inductivity of 2304 backedges. 141 proven. 2162 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:43,222 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:43,222 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 48] total 48 [2019-12-07 12:21:43,222 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [875779508] [2019-12-07 12:21:43,236 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:43,237 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2019-12-07 12:21:43,237 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2019-12-07 12:21:43,237 INFO L87 Difference]: Start difference. First operand 97 states and 99 transitions. cyclomatic complexity: 3 Second operand 49 states. [2019-12-07 12:21:43,317 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:43,317 INFO L93 Difference]: Finished difference Result 101 states and 103 transitions. [2019-12-07 12:21:43,318 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2019-12-07 12:21:43,318 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 101 states and 103 transitions. [2019-12-07 12:21:43,318 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:43,318 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 101 states to 100 states and 102 transitions. [2019-12-07 12:21:43,319 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:43,319 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:43,319 INFO L73 IsDeterministic]: Start isDeterministic. Operand 100 states and 102 transitions. [2019-12-07 12:21:43,319 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:43,319 INFO L688 BuchiCegarLoop]: Abstraction has 100 states and 102 transitions. [2019-12-07 12:21:43,319 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 100 states and 102 transitions. [2019-12-07 12:21:43,320 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 100 to 99. [2019-12-07 12:21:43,320 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 99 states. [2019-12-07 12:21:43,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 101 transitions. [2019-12-07 12:21:43,320 INFO L711 BuchiCegarLoop]: Abstraction has 99 states and 101 transitions. [2019-12-07 12:21:43,320 INFO L591 BuchiCegarLoop]: Abstraction has 99 states and 101 transitions. [2019-12-07 12:21:43,320 INFO L424 BuchiCegarLoop]: ======== Iteration 49============ [2019-12-07 12:21:43,320 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 99 states and 101 transitions. [2019-12-07 12:21:43,320 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:43,320 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:43,320 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:43,321 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [48, 47, 1] [2019-12-07 12:21:43,321 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:43,321 INFO L794 eck$LassoCheckResult]: Stem: 14005#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 14006#L10-2 assume !!(main_~i~0 < 100); 14007#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14008#L10-2 assume !!(main_~i~0 < 100); 14003#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14004#L10-2 assume !!(main_~i~0 < 100); 14099#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14098#L10-2 assume !!(main_~i~0 < 100); 14097#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14096#L10-2 assume !!(main_~i~0 < 100); 14095#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14094#L10-2 assume !!(main_~i~0 < 100); 14093#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14092#L10-2 assume !!(main_~i~0 < 100); 14091#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14090#L10-2 assume !!(main_~i~0 < 100); 14089#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14088#L10-2 assume !!(main_~i~0 < 100); 14087#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14086#L10-2 assume !!(main_~i~0 < 100); 14085#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14084#L10-2 assume !!(main_~i~0 < 100); 14083#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14082#L10-2 assume !!(main_~i~0 < 100); 14081#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14080#L10-2 assume !!(main_~i~0 < 100); 14079#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14078#L10-2 assume !!(main_~i~0 < 100); 14077#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14076#L10-2 assume !!(main_~i~0 < 100); 14075#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14074#L10-2 assume !!(main_~i~0 < 100); 14073#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14072#L10-2 assume !!(main_~i~0 < 100); 14071#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14070#L10-2 assume !!(main_~i~0 < 100); 14069#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14068#L10-2 assume !!(main_~i~0 < 100); 14067#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14066#L10-2 assume !!(main_~i~0 < 100); 14065#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14064#L10-2 assume !!(main_~i~0 < 100); 14063#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14062#L10-2 assume !!(main_~i~0 < 100); 14061#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14060#L10-2 assume !!(main_~i~0 < 100); 14059#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14058#L10-2 assume !!(main_~i~0 < 100); 14057#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14056#L10-2 assume !!(main_~i~0 < 100); 14055#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14054#L10-2 assume !!(main_~i~0 < 100); 14053#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14052#L10-2 assume !!(main_~i~0 < 100); 14051#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14050#L10-2 assume !!(main_~i~0 < 100); 14049#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14048#L10-2 assume !!(main_~i~0 < 100); 14047#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14046#L10-2 assume !!(main_~i~0 < 100); 14045#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14044#L10-2 assume !!(main_~i~0 < 100); 14043#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14042#L10-2 assume !!(main_~i~0 < 100); 14041#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14040#L10-2 assume !!(main_~i~0 < 100); 14039#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14038#L10-2 assume !!(main_~i~0 < 100); 14037#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14036#L10-2 assume !!(main_~i~0 < 100); 14035#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14034#L10-2 assume !!(main_~i~0 < 100); 14033#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14032#L10-2 assume !!(main_~i~0 < 100); 14031#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14030#L10-2 assume !!(main_~i~0 < 100); 14029#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14028#L10-2 assume !!(main_~i~0 < 100); 14027#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14026#L10-2 assume !!(main_~i~0 < 100); 14025#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14024#L10-2 assume !!(main_~i~0 < 100); 14023#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14022#L10-2 assume !!(main_~i~0 < 100); 14021#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14020#L10-2 assume !!(main_~i~0 < 100); 14019#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14018#L10-2 assume !!(main_~i~0 < 100); 14017#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14016#L10-2 assume !!(main_~i~0 < 100); 14015#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14014#L10-2 assume !!(main_~i~0 < 100); 14012#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14011#L10-2 assume !!(main_~i~0 < 100); 14010#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14009#L10-2 assume !!(main_~i~0 < 100); 14001#L10 [2019-12-07 12:21:43,321 INFO L796 eck$LassoCheckResult]: Loop: 14001#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 14002#L10-2 assume !!(main_~i~0 < 100); 14010#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14009#L10-2 assume !!(main_~i~0 < 100); 14001#L10 [2019-12-07 12:21:43,321 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:43,321 INFO L82 PathProgramCache]: Analyzing trace with hash -1668329219, now seen corresponding path program 47 times [2019-12-07 12:21:43,321 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:43,321 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2125222116] [2019-12-07 12:21:43,321 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:43,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:43,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:43,330 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:43,331 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:43,331 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 45 times [2019-12-07 12:21:43,331 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:43,331 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2099470526] [2019-12-07 12:21:43,331 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:43,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:43,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:43,332 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:43,332 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:43,332 INFO L82 PathProgramCache]: Analyzing trace with hash 844858165, now seen corresponding path program 47 times [2019-12-07 12:21:43,332 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:43,332 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2117919394] [2019-12-07 12:21:43,332 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:43,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:44,068 INFO L134 CoverageAnalysis]: Checked inductivity of 2401 backedges. 144 proven. 2256 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:44,069 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2117919394] [2019-12-07 12:21:44,069 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [488591513] [2019-12-07 12:21:44,069 INFO L92 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 69 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:44,111 INFO L249 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued 50 check-sat command(s) [2019-12-07 12:21:44,111 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:44,112 INFO L264 TraceCheckSpWp]: Trace formula consists of 201 conjuncts, 49 conjunts are in the unsatisfiable core [2019-12-07 12:21:44,113 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:44,125 INFO L134 CoverageAnalysis]: Checked inductivity of 2401 backedges. 144 proven. 2256 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:44,125 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:44,125 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49] total 49 [2019-12-07 12:21:44,125 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [893340527] [2019-12-07 12:21:44,140 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:44,140 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2019-12-07 12:21:44,141 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1225, Invalid=1225, Unknown=0, NotChecked=0, Total=2450 [2019-12-07 12:21:44,141 INFO L87 Difference]: Start difference. First operand 99 states and 101 transitions. cyclomatic complexity: 3 Second operand 50 states. [2019-12-07 12:21:44,209 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:44,209 INFO L93 Difference]: Finished difference Result 103 states and 105 transitions. [2019-12-07 12:21:44,209 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2019-12-07 12:21:44,209 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 103 states and 105 transitions. [2019-12-07 12:21:44,210 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:44,210 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 103 states to 102 states and 104 transitions. [2019-12-07 12:21:44,210 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:44,210 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:44,211 INFO L73 IsDeterministic]: Start isDeterministic. Operand 102 states and 104 transitions. [2019-12-07 12:21:44,211 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:44,211 INFO L688 BuchiCegarLoop]: Abstraction has 102 states and 104 transitions. [2019-12-07 12:21:44,211 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states and 104 transitions. [2019-12-07 12:21:44,212 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 101. [2019-12-07 12:21:44,212 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2019-12-07 12:21:44,212 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 103 transitions. [2019-12-07 12:21:44,212 INFO L711 BuchiCegarLoop]: Abstraction has 101 states and 103 transitions. [2019-12-07 12:21:44,212 INFO L591 BuchiCegarLoop]: Abstraction has 101 states and 103 transitions. [2019-12-07 12:21:44,212 INFO L424 BuchiCegarLoop]: ======== Iteration 50============ [2019-12-07 12:21:44,212 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 101 states and 103 transitions. [2019-12-07 12:21:44,212 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:44,212 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:44,212 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:44,213 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [49, 48, 1] [2019-12-07 12:21:44,213 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:44,213 INFO L794 eck$LassoCheckResult]: Stem: 14559#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 14560#L10-2 assume !!(main_~i~0 < 100); 14561#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14562#L10-2 assume !!(main_~i~0 < 100); 14557#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14558#L10-2 assume !!(main_~i~0 < 100); 14655#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14654#L10-2 assume !!(main_~i~0 < 100); 14653#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14652#L10-2 assume !!(main_~i~0 < 100); 14651#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14650#L10-2 assume !!(main_~i~0 < 100); 14649#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14648#L10-2 assume !!(main_~i~0 < 100); 14647#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14646#L10-2 assume !!(main_~i~0 < 100); 14645#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14644#L10-2 assume !!(main_~i~0 < 100); 14643#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14642#L10-2 assume !!(main_~i~0 < 100); 14641#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14640#L10-2 assume !!(main_~i~0 < 100); 14639#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14638#L10-2 assume !!(main_~i~0 < 100); 14637#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14636#L10-2 assume !!(main_~i~0 < 100); 14635#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14634#L10-2 assume !!(main_~i~0 < 100); 14633#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14632#L10-2 assume !!(main_~i~0 < 100); 14631#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14630#L10-2 assume !!(main_~i~0 < 100); 14629#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14628#L10-2 assume !!(main_~i~0 < 100); 14627#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14626#L10-2 assume !!(main_~i~0 < 100); 14625#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14624#L10-2 assume !!(main_~i~0 < 100); 14623#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14622#L10-2 assume !!(main_~i~0 < 100); 14621#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14620#L10-2 assume !!(main_~i~0 < 100); 14619#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14618#L10-2 assume !!(main_~i~0 < 100); 14617#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14616#L10-2 assume !!(main_~i~0 < 100); 14615#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14614#L10-2 assume !!(main_~i~0 < 100); 14613#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14612#L10-2 assume !!(main_~i~0 < 100); 14611#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14610#L10-2 assume !!(main_~i~0 < 100); 14609#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14608#L10-2 assume !!(main_~i~0 < 100); 14607#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14606#L10-2 assume !!(main_~i~0 < 100); 14605#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14604#L10-2 assume !!(main_~i~0 < 100); 14603#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14602#L10-2 assume !!(main_~i~0 < 100); 14601#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14600#L10-2 assume !!(main_~i~0 < 100); 14599#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14598#L10-2 assume !!(main_~i~0 < 100); 14597#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14596#L10-2 assume !!(main_~i~0 < 100); 14595#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14594#L10-2 assume !!(main_~i~0 < 100); 14593#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14592#L10-2 assume !!(main_~i~0 < 100); 14591#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14590#L10-2 assume !!(main_~i~0 < 100); 14589#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14588#L10-2 assume !!(main_~i~0 < 100); 14587#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14586#L10-2 assume !!(main_~i~0 < 100); 14585#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14584#L10-2 assume !!(main_~i~0 < 100); 14583#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14582#L10-2 assume !!(main_~i~0 < 100); 14581#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14580#L10-2 assume !!(main_~i~0 < 100); 14579#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14578#L10-2 assume !!(main_~i~0 < 100); 14577#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14576#L10-2 assume !!(main_~i~0 < 100); 14575#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14574#L10-2 assume !!(main_~i~0 < 100); 14573#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14572#L10-2 assume !!(main_~i~0 < 100); 14571#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14570#L10-2 assume !!(main_~i~0 < 100); 14569#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14568#L10-2 assume !!(main_~i~0 < 100); 14566#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14565#L10-2 assume !!(main_~i~0 < 100); 14564#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14563#L10-2 assume !!(main_~i~0 < 100); 14555#L10 [2019-12-07 12:21:44,213 INFO L796 eck$LassoCheckResult]: Loop: 14555#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 14556#L10-2 assume !!(main_~i~0 < 100); 14564#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 14563#L10-2 assume !!(main_~i~0 < 100); 14555#L10 [2019-12-07 12:21:44,213 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:44,213 INFO L82 PathProgramCache]: Analyzing trace with hash -1241577638, now seen corresponding path program 48 times [2019-12-07 12:21:44,214 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:44,214 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1133100339] [2019-12-07 12:21:44,214 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:44,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:44,222 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:44,223 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:44,223 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:44,223 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 46 times [2019-12-07 12:21:44,223 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:44,223 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1800748525] [2019-12-07 12:21:44,223 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:44,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:44,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:44,225 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:44,225 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:44,225 INFO L82 PathProgramCache]: Analyzing trace with hash 102679314, now seen corresponding path program 48 times [2019-12-07 12:21:44,225 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:44,225 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [568296735] [2019-12-07 12:21:44,225 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:44,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:44,907 INFO L134 CoverageAnalysis]: Checked inductivity of 2500 backedges. 147 proven. 2352 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:44,907 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [568296735] [2019-12-07 12:21:44,907 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2034526668] [2019-12-07 12:21:44,907 INFO L92 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:44,952 INFO L249 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued 51 check-sat command(s) [2019-12-07 12:21:44,952 INFO L250 tOrderPrioritization]: Conjunction of SSA is unsat [2019-12-07 12:21:44,953 INFO L264 TraceCheckSpWp]: Trace formula consists of 205 conjuncts, 50 conjunts are in the unsatisfiable core [2019-12-07 12:21:44,954 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:44,967 INFO L134 CoverageAnalysis]: Checked inductivity of 2500 backedges. 147 proven. 2352 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:44,967 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:44,967 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [50, 50] total 50 [2019-12-07 12:21:44,967 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1479095431] [2019-12-07 12:21:44,983 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:44,983 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 51 interpolants. [2019-12-07 12:21:44,984 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1275, Invalid=1275, Unknown=0, NotChecked=0, Total=2550 [2019-12-07 12:21:44,984 INFO L87 Difference]: Start difference. First operand 101 states and 103 transitions. cyclomatic complexity: 3 Second operand 51 states. [2019-12-07 12:21:45,072 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:45,073 INFO L93 Difference]: Finished difference Result 105 states and 107 transitions. [2019-12-07 12:21:45,073 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2019-12-07 12:21:45,073 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 105 states and 107 transitions. [2019-12-07 12:21:45,073 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:45,074 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 105 states to 104 states and 106 transitions. [2019-12-07 12:21:45,074 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:45,074 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:45,074 INFO L73 IsDeterministic]: Start isDeterministic. Operand 104 states and 106 transitions. [2019-12-07 12:21:45,075 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:45,075 INFO L688 BuchiCegarLoop]: Abstraction has 104 states and 106 transitions. [2019-12-07 12:21:45,075 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104 states and 106 transitions. [2019-12-07 12:21:45,076 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104 to 103. [2019-12-07 12:21:45,076 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2019-12-07 12:21:45,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 105 transitions. [2019-12-07 12:21:45,077 INFO L711 BuchiCegarLoop]: Abstraction has 103 states and 105 transitions. [2019-12-07 12:21:45,077 INFO L591 BuchiCegarLoop]: Abstraction has 103 states and 105 transitions. [2019-12-07 12:21:45,077 INFO L424 BuchiCegarLoop]: ======== Iteration 51============ [2019-12-07 12:21:45,077 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 103 states and 105 transitions. [2019-12-07 12:21:45,077 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:45,077 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:45,078 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:45,078 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [50, 49, 1] [2019-12-07 12:21:45,078 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:45,079 INFO L794 eck$LassoCheckResult]: Stem: 15124#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 15125#L10-2 assume !!(main_~i~0 < 100); 15126#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15127#L10-2 assume !!(main_~i~0 < 100); 15122#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15123#L10-2 assume !!(main_~i~0 < 100); 15222#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15221#L10-2 assume !!(main_~i~0 < 100); 15220#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15219#L10-2 assume !!(main_~i~0 < 100); 15218#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15217#L10-2 assume !!(main_~i~0 < 100); 15216#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15215#L10-2 assume !!(main_~i~0 < 100); 15214#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15213#L10-2 assume !!(main_~i~0 < 100); 15212#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15211#L10-2 assume !!(main_~i~0 < 100); 15210#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15209#L10-2 assume !!(main_~i~0 < 100); 15208#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15207#L10-2 assume !!(main_~i~0 < 100); 15206#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15205#L10-2 assume !!(main_~i~0 < 100); 15204#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15203#L10-2 assume !!(main_~i~0 < 100); 15202#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15201#L10-2 assume !!(main_~i~0 < 100); 15200#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15199#L10-2 assume !!(main_~i~0 < 100); 15198#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15197#L10-2 assume !!(main_~i~0 < 100); 15196#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15195#L10-2 assume !!(main_~i~0 < 100); 15194#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15193#L10-2 assume !!(main_~i~0 < 100); 15192#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15191#L10-2 assume !!(main_~i~0 < 100); 15190#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15189#L10-2 assume !!(main_~i~0 < 100); 15188#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15187#L10-2 assume !!(main_~i~0 < 100); 15186#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15185#L10-2 assume !!(main_~i~0 < 100); 15184#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15183#L10-2 assume !!(main_~i~0 < 100); 15182#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15181#L10-2 assume !!(main_~i~0 < 100); 15180#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15179#L10-2 assume !!(main_~i~0 < 100); 15178#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15177#L10-2 assume !!(main_~i~0 < 100); 15176#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15175#L10-2 assume !!(main_~i~0 < 100); 15174#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15173#L10-2 assume !!(main_~i~0 < 100); 15172#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15171#L10-2 assume !!(main_~i~0 < 100); 15170#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15169#L10-2 assume !!(main_~i~0 < 100); 15168#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15167#L10-2 assume !!(main_~i~0 < 100); 15166#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15165#L10-2 assume !!(main_~i~0 < 100); 15164#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15163#L10-2 assume !!(main_~i~0 < 100); 15162#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15161#L10-2 assume !!(main_~i~0 < 100); 15160#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15159#L10-2 assume !!(main_~i~0 < 100); 15158#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15157#L10-2 assume !!(main_~i~0 < 100); 15156#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15155#L10-2 assume !!(main_~i~0 < 100); 15154#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15153#L10-2 assume !!(main_~i~0 < 100); 15152#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15151#L10-2 assume !!(main_~i~0 < 100); 15150#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15149#L10-2 assume !!(main_~i~0 < 100); 15148#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15147#L10-2 assume !!(main_~i~0 < 100); 15146#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15145#L10-2 assume !!(main_~i~0 < 100); 15144#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15143#L10-2 assume !!(main_~i~0 < 100); 15142#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15141#L10-2 assume !!(main_~i~0 < 100); 15140#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15139#L10-2 assume !!(main_~i~0 < 100); 15138#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15137#L10-2 assume !!(main_~i~0 < 100); 15136#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15135#L10-2 assume !!(main_~i~0 < 100); 15134#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15133#L10-2 assume !!(main_~i~0 < 100); 15131#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15130#L10-2 assume !!(main_~i~0 < 100); 15129#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15128#L10-2 assume !!(main_~i~0 < 100); 15120#L10 [2019-12-07 12:21:45,079 INFO L796 eck$LassoCheckResult]: Loop: 15120#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 15121#L10-2 assume !!(main_~i~0 < 100); 15129#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15128#L10-2 assume !!(main_~i~0 < 100); 15120#L10 [2019-12-07 12:21:45,079 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:45,079 INFO L82 PathProgramCache]: Analyzing trace with hash 844798583, now seen corresponding path program 49 times [2019-12-07 12:21:45,079 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:45,079 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [593891060] [2019-12-07 12:21:45,080 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:45,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:45,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:45,094 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:45,094 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:45,094 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 47 times [2019-12-07 12:21:45,094 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:45,095 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [120046574] [2019-12-07 12:21:45,095 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:45,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:45,096 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:45,097 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:45,097 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:45,097 INFO L82 PathProgramCache]: Analyzing trace with hash -166625361, now seen corresponding path program 49 times [2019-12-07 12:21:45,097 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:45,097 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1153969804] [2019-12-07 12:21:45,097 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:45,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:45,837 INFO L134 CoverageAnalysis]: Checked inductivity of 2601 backedges. 150 proven. 2450 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:45,837 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1153969804] [2019-12-07 12:21:45,837 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1567101099] [2019-12-07 12:21:45,837 INFO L92 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/z3 Starting monitored process 71 with z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with z3 -smt2 -in SMTLIB2_COMPLIANT=true [2019-12-07 12:21:45,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 12:21:45,865 INFO L264 TraceCheckSpWp]: Trace formula consists of 209 conjuncts, 51 conjunts are in the unsatisfiable core [2019-12-07 12:21:45,865 INFO L287 TraceCheckSpWp]: Computing forward predicates... [2019-12-07 12:21:45,880 INFO L134 CoverageAnalysis]: Checked inductivity of 2601 backedges. 150 proven. 2450 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2019-12-07 12:21:45,880 INFO L220 FreeRefinementEngine]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2019-12-07 12:21:45,880 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [51, 51] total 51 [2019-12-07 12:21:45,880 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1274493018] [2019-12-07 12:21:45,899 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2019-12-07 12:21:45,899 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2019-12-07 12:21:45,900 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2019-12-07 12:21:45,900 INFO L87 Difference]: Start difference. First operand 103 states and 105 transitions. cyclomatic complexity: 3 Second operand 52 states. [2019-12-07 12:21:46,010 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 12:21:46,011 INFO L93 Difference]: Finished difference Result 107 states and 109 transitions. [2019-12-07 12:21:46,011 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2019-12-07 12:21:46,011 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 107 states and 109 transitions. [2019-12-07 12:21:46,012 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:46,013 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 107 states to 106 states and 108 transitions. [2019-12-07 12:21:46,013 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3 [2019-12-07 12:21:46,013 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3 [2019-12-07 12:21:46,013 INFO L73 IsDeterministic]: Start isDeterministic. Operand 106 states and 108 transitions. [2019-12-07 12:21:46,013 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2019-12-07 12:21:46,013 INFO L688 BuchiCegarLoop]: Abstraction has 106 states and 108 transitions. [2019-12-07 12:21:46,013 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states and 108 transitions. [2019-12-07 12:21:46,014 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 105. [2019-12-07 12:21:46,014 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105 states. [2019-12-07 12:21:46,015 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 107 transitions. [2019-12-07 12:21:46,015 INFO L711 BuchiCegarLoop]: Abstraction has 105 states and 107 transitions. [2019-12-07 12:21:46,015 INFO L591 BuchiCegarLoop]: Abstraction has 105 states and 107 transitions. [2019-12-07 12:21:46,015 INFO L424 BuchiCegarLoop]: ======== Iteration 52============ [2019-12-07 12:21:46,015 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 105 states and 107 transitions. [2019-12-07 12:21:46,015 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 5 [2019-12-07 12:21:46,015 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2019-12-07 12:21:46,016 INFO L119 BuchiIsEmpty]: Starting construction of run [2019-12-07 12:21:46,016 INFO L849 BuchiCegarLoop]: Counterexample stem histogram [51, 50, 1] [2019-12-07 12:21:46,016 INFO L850 BuchiCegarLoop]: Counterexample loop histogram [2, 1, 1] [2019-12-07 12:21:46,016 INFO L794 eck$LassoCheckResult]: Stem: 15700#ULTIMATE.startENTRY havoc main_#res;havoc main_~i~0;havoc main_~i~0;main_~i~0 := 0; 15701#L10-2 assume !!(main_~i~0 < 100); 15702#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15703#L10-2 assume !!(main_~i~0 < 100); 15698#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15699#L10-2 assume !!(main_~i~0 < 100); 15800#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15799#L10-2 assume !!(main_~i~0 < 100); 15798#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15797#L10-2 assume !!(main_~i~0 < 100); 15796#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15795#L10-2 assume !!(main_~i~0 < 100); 15794#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15793#L10-2 assume !!(main_~i~0 < 100); 15792#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15791#L10-2 assume !!(main_~i~0 < 100); 15790#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15789#L10-2 assume !!(main_~i~0 < 100); 15788#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15787#L10-2 assume !!(main_~i~0 < 100); 15786#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15785#L10-2 assume !!(main_~i~0 < 100); 15784#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15783#L10-2 assume !!(main_~i~0 < 100); 15782#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15781#L10-2 assume !!(main_~i~0 < 100); 15780#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15779#L10-2 assume !!(main_~i~0 < 100); 15778#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15777#L10-2 assume !!(main_~i~0 < 100); 15776#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15775#L10-2 assume !!(main_~i~0 < 100); 15774#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15773#L10-2 assume !!(main_~i~0 < 100); 15772#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15771#L10-2 assume !!(main_~i~0 < 100); 15770#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15769#L10-2 assume !!(main_~i~0 < 100); 15768#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15767#L10-2 assume !!(main_~i~0 < 100); 15766#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15765#L10-2 assume !!(main_~i~0 < 100); 15764#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15763#L10-2 assume !!(main_~i~0 < 100); 15762#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15761#L10-2 assume !!(main_~i~0 < 100); 15760#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15759#L10-2 assume !!(main_~i~0 < 100); 15758#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15757#L10-2 assume !!(main_~i~0 < 100); 15756#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15755#L10-2 assume !!(main_~i~0 < 100); 15754#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15753#L10-2 assume !!(main_~i~0 < 100); 15752#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15751#L10-2 assume !!(main_~i~0 < 100); 15750#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15749#L10-2 assume !!(main_~i~0 < 100); 15748#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15747#L10-2 assume !!(main_~i~0 < 100); 15746#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15745#L10-2 assume !!(main_~i~0 < 100); 15744#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15743#L10-2 assume !!(main_~i~0 < 100); 15742#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15741#L10-2 assume !!(main_~i~0 < 100); 15740#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15739#L10-2 assume !!(main_~i~0 < 100); 15738#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15737#L10-2 assume !!(main_~i~0 < 100); 15736#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15735#L10-2 assume !!(main_~i~0 < 100); 15734#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15733#L10-2 assume !!(main_~i~0 < 100); 15732#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15731#L10-2 assume !!(main_~i~0 < 100); 15730#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15729#L10-2 assume !!(main_~i~0 < 100); 15728#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15727#L10-2 assume !!(main_~i~0 < 100); 15726#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15725#L10-2 assume !!(main_~i~0 < 100); 15724#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15723#L10-2 assume !!(main_~i~0 < 100); 15722#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15721#L10-2 assume !!(main_~i~0 < 100); 15720#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15719#L10-2 assume !!(main_~i~0 < 100); 15718#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15717#L10-2 assume !!(main_~i~0 < 100); 15716#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15715#L10-2 assume !!(main_~i~0 < 100); 15714#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15713#L10-2 assume !!(main_~i~0 < 100); 15712#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15711#L10-2 assume !!(main_~i~0 < 100); 15710#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15709#L10-2 assume !!(main_~i~0 < 100); 15707#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15706#L10-2 assume !!(main_~i~0 < 100); 15705#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15704#L10-2 assume !!(main_~i~0 < 100); 15696#L10 [2019-12-07 12:21:46,017 INFO L796 eck$LassoCheckResult]: Loop: 15696#L10 assume !(main_~i~0 < 50);main_~i~0 := main_~i~0 - 1; 15697#L10-2 assume !!(main_~i~0 < 100); 15705#L10 assume main_~i~0 < 50;main_~i~0 := 1 + main_~i~0; 15704#L10-2 assume !!(main_~i~0 < 100); 15696#L10 [2019-12-07 12:21:46,017 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:46,017 INFO L82 PathProgramCache]: Analyzing trace with hash 102619732, now seen corresponding path program 50 times [2019-12-07 12:21:46,017 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:46,017 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [589881655] [2019-12-07 12:21:46,017 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:46,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:46,031 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:46,032 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:46,032 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:46,032 INFO L82 PathProgramCache]: Analyzing trace with hash 1380409, now seen corresponding path program 48 times [2019-12-07 12:21:46,033 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:46,033 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1034186174] [2019-12-07 12:21:46,033 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:46,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:46,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:46,034 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:46,034 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 12:21:46,034 INFO L82 PathProgramCache]: Analyzing trace with hash -1270380276, now seen corresponding path program 50 times [2019-12-07 12:21:46,034 INFO L163 FreeRefinementEngine]: Executing refinement strategy CAMEL [2019-12-07 12:21:46,034 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1555747985] [2019-12-07 12:21:46,034 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 12:21:46,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:46,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 12:21:46,045 INFO L174 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2019-12-07 12:21:46,774 WARN L192 SmtUtils]: Spent 702.00 ms on a formula simplification. DAG size of input: 258 DAG size of output: 155 [2019-12-07 12:21:46,801 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 07.12 12:21:46 BoogieIcfgContainer [2019-12-07 12:21:46,801 INFO L132 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2019-12-07 12:21:46,801 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 12:21:46,801 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 12:21:46,801 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 12:21:46,802 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 12:21:25" (3/4) ... [2019-12-07 12:21:46,804 INFO L134 WitnessPrinter]: Generating witness for non-termination counterexample [2019-12-07 12:21:46,845 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_93057f8f-3aa8-4e73-ac94-a4da69463498/bin/uautomizer/witness.graphml [2019-12-07 12:21:46,845 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 12:21:46,846 INFO L168 Benchmark]: Toolchain (without parser) took 21661.47 ms. Allocated memory was 1.0 GB in the beginning and 1.5 GB in the end (delta: 435.2 MB). Free memory was 943.5 MB in the beginning and 904.5 MB in the end (delta: 39.0 MB). Peak memory consumption was 474.1 MB. Max. memory is 11.5 GB. [2019-12-07 12:21:46,846 INFO L168 Benchmark]: CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 12:21:46,846 INFO L168 Benchmark]: CACSL2BoogieTranslator took 167.26 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 95.4 MB). Free memory was 943.5 MB in the beginning and 1.1 GB in the end (delta: -149.3 MB). Peak memory consumption was 23.3 MB. Max. memory is 11.5 GB. [2019-12-07 12:21:46,846 INFO L168 Benchmark]: Boogie Procedure Inliner took 21.11 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 12:21:46,847 INFO L168 Benchmark]: Boogie Preprocessor took 11.77 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 12:21:46,847 INFO L168 Benchmark]: RCFGBuilder took 125.35 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 14.9 MB). Peak memory consumption was 14.9 MB. Max. memory is 11.5 GB. [2019-12-07 12:21:46,847 INFO L168 Benchmark]: BuchiAutomizer took 21288.97 ms. Allocated memory was 1.1 GB in the beginning and 1.5 GB in the end (delta: 339.7 MB). Free memory was 1.1 GB in the beginning and 921.1 MB in the end (delta: 156.9 MB). Peak memory consumption was 496.7 MB. Max. memory is 11.5 GB. [2019-12-07 12:21:46,848 INFO L168 Benchmark]: Witness Printer took 43.69 ms. Allocated memory is still 1.5 GB. Free memory was 921.1 MB in the beginning and 904.5 MB in the end (delta: 16.5 MB). Peak memory consumption was 16.5 MB. Max. memory is 11.5 GB. [2019-12-07 12:21:46,849 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13 ms. Allocated memory is still 1.0 GB. Free memory is still 958.6 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 167.26 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 95.4 MB). Free memory was 943.5 MB in the beginning and 1.1 GB in the end (delta: -149.3 MB). Peak memory consumption was 23.3 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 21.11 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Boogie Preprocessor took 11.77 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 125.35 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 14.9 MB). Peak memory consumption was 14.9 MB. Max. memory is 11.5 GB. * BuchiAutomizer took 21288.97 ms. Allocated memory was 1.1 GB in the beginning and 1.5 GB in the end (delta: 339.7 MB). Free memory was 1.1 GB in the beginning and 921.1 MB in the end (delta: 156.9 MB). Peak memory consumption was 496.7 MB. Max. memory is 11.5 GB. * Witness Printer took 43.69 ms. Allocated memory is still 1.5 GB. Free memory was 921.1 MB in the beginning and 904.5 MB in the end (delta: 16.5 MB). Peak memory consumption was 16.5 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 54 terminating modules (50 trivial, 2 deterministic, 2 nondeterministic) and one nonterminating remainder module.One deterministic module has affine ranking function -2 * i + 99 and consists of 4 locations. One deterministic module has affine ranking function -2 * i + 99 and consists of 3 locations. One nondeterministic module has affine ranking function -2 * i + 99 and consists of 3 locations. One nondeterministic module has affine ranking function i and consists of 3 locations. 50 modules have a trivial ranking function, the largest among these consists of 52 locations. The remainder module has 105 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 21.2s and 52 iterations. TraceHistogramMax:51. Analysis of lassos took 18.3s. Construction of modules took 1.6s. Büchi inclusion checks took 0.8s. Highest rank in rank-based complementation 3. Minimization of det autom 0. Minimization of nondet autom 54. Automata minimization 0.0s AutomataMinimizationTime, 54 MinimizatonAttempts, 58 StatesRemovedByMinimization, 52 NontrivialMinimizations. Non-live state removal took 0.0s Buchi closure took 0.0s. Biggest automaton had 105 states and ocurred in iteration 51. Nontrivial modules had stage [2, 0, 2, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 128 SDtfs, 29 SDslu, 3 SDs, 0 SdLazy, 3542 SolverSat, 84 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.6s Time LassoAnalysisResults: nont1 unkn0 SFLI0 SFLT1 conc47 concLT1 SILN0 SILU0 SILI0 SILT2 lasso0 LassoPreprocessingBenchmarks: Lassos: inital11 mio100 ax211 hnf99 lsp47 ukn100 mio100 lsp100 div100 bol100 ite100 ukn100 eq156 hnf93 smp100 dnf100 smp100 tf112 neg100 sie111 LassoTerminationAnalysisBenchmarks: ConstraintsSatisfiability: unsat Degree: 0 Time: 13ms VariablesStem: 1 VariablesLoop: 0 DisjunctsStem: 1 DisjunctsLoop: 1 SupportingInvariants: 2 MotzkinApplications: 6 LassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 4 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 4 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - FixpointNonTerminationResult [Line: 10]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite execution State at position 0 is {} State at position 1 is {\result=0, i=50} - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 10]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L6] int i; [L7] i = 0 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 Loop: [L10] COND FALSE !(i < 50) [L11] i = i-1 [L9] COND TRUE i < 100 [L10] COND TRUE i < 50 [L10] i = i+1 [L9] COND TRUE i < 100 End of lasso representation. RESULT: Ultimate proved your program to be incorrect! Received shutdown request...