./Ultimate.py --spec ../../sv-benchmarks/c/properties/no-overflow.prp --file ../../sv-benchmarks/c/bitvector/soft_float_4-2a.c.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for overflows Using default analysis Version 6b5699aa Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_ed311eb3-d774-402f-883d-a7dd1f488d92/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_ed311eb3-d774-402f-883d-a7dd1f488d92/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_ed311eb3-d774-402f-883d-a7dd1f488d92/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_ed311eb3-d774-402f-883d-a7dd1f488d92/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/bitvector/soft_float_4-2a.c.cil.c -s /tmp/vcloud-vcloud-master/worker/run_dir_ed311eb3-d774-402f-883d-a7dd1f488d92/bin/utaipan/config/svcomp-Overflow-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_ed311eb3-d774-402f-883d-a7dd1f488d92/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! overflow) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 94419cb5ed7b14b2ed497048686126b88cc40ca2 ............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Using bit-precise analysis No suitable file found in config dir /tmp/vcloud-vcloud-master/worker/run_dir_ed311eb3-d774-402f-883d-a7dd1f488d92/bin/utaipan/config using search string *Overflow*32bit*_Bitvector*.epf No suitable settings file found using Overflow*32bit*_Bitvector ERROR: UNSUPPORTED PROPERTY Writing output log to file Ultimate.log Result: UNKNOWN: Overapproximated counterexample --- Real Ultimate output --- This is Ultimate 0.1.24-6b5699a [2019-11-26 02:34:43,323 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-11-26 02:34:43,324 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-11-26 02:34:43,338 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-11-26 02:34:43,339 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-11-26 02:34:43,340 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-11-26 02:34:43,342 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-11-26 02:34:43,350 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-11-26 02:34:43,354 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-11-26 02:34:43,356 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-11-26 02:34:43,357 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-11-26 02:34:43,357 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-11-26 02:34:43,358 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-11-26 02:34:43,358 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-11-26 02:34:43,359 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-11-26 02:34:43,360 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-11-26 02:34:43,361 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-11-26 02:34:43,361 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-11-26 02:34:43,363 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-11-26 02:34:43,364 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-11-26 02:34:43,366 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-11-26 02:34:43,372 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-11-26 02:34:43,374 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-11-26 02:34:43,375 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-11-26 02:34:43,378 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-11-26 02:34:43,378 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-11-26 02:34:43,379 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-11-26 02:34:43,380 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-11-26 02:34:43,380 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-11-26 02:34:43,381 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-11-26 02:34:43,381 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-11-26 02:34:43,382 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-11-26 02:34:43,383 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-11-26 02:34:43,383 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-11-26 02:34:43,384 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-11-26 02:34:43,384 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-11-26 02:34:43,385 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-11-26 02:34:43,385 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-11-26 02:34:43,385 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-11-26 02:34:43,386 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-11-26 02:34:43,387 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-11-26 02:34:43,387 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_ed311eb3-d774-402f-883d-a7dd1f488d92/bin/utaipan/config/svcomp-Overflow-32bit-Taipan_Default.epf [2019-11-26 02:34:43,400 INFO L113 SettingsManager]: Loading preferences was successful [2019-11-26 02:34:43,400 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-11-26 02:34:43,401 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-11-26 02:34:43,401 INFO L138 SettingsManager]: * User list type=DISABLED [2019-11-26 02:34:43,401 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-11-26 02:34:43,401 INFO L138 SettingsManager]: * Explicit value domain=true [2019-11-26 02:34:43,401 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-11-26 02:34:43,402 INFO L138 SettingsManager]: * Octagon Domain=false [2019-11-26 02:34:43,402 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-11-26 02:34:43,402 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-11-26 02:34:43,402 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-11-26 02:34:43,403 INFO L138 SettingsManager]: * Interval Domain=false [2019-11-26 02:34:43,403 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-11-26 02:34:43,403 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-11-26 02:34:43,403 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-11-26 02:34:43,404 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-11-26 02:34:43,404 INFO L138 SettingsManager]: * sizeof long=4 [2019-11-26 02:34:43,404 INFO L138 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2019-11-26 02:34:43,404 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-11-26 02:34:43,405 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-11-26 02:34:43,405 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-11-26 02:34:43,405 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-11-26 02:34:43,405 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-11-26 02:34:43,406 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-11-26 02:34:43,406 INFO L138 SettingsManager]: * Check absence of signed integer overflows=true [2019-11-26 02:34:43,406 INFO L138 SettingsManager]: * sizeof long double=12 [2019-11-26 02:34:43,406 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-11-26 02:34:43,407 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-11-26 02:34:43,407 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-11-26 02:34:43,407 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-11-26 02:34:43,407 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-11-26 02:34:43,407 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-26 02:34:43,408 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-11-26 02:34:43,408 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-11-26 02:34:43,408 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-11-26 02:34:43,408 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-11-26 02:34:43,409 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-11-26 02:34:43,409 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-11-26 02:34:43,409 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-11-26 02:34:43,409 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_ed311eb3-d774-402f-883d-a7dd1f488d92/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! overflow) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 94419cb5ed7b14b2ed497048686126b88cc40ca2 [2019-11-26 02:34:43,539 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-11-26 02:34:43,549 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-11-26 02:34:43,551 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-11-26 02:34:43,553 INFO L271 PluginConnector]: Initializing CDTParser... [2019-11-26 02:34:43,553 INFO L275 PluginConnector]: CDTParser initialized [2019-11-26 02:34:43,553 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_ed311eb3-d774-402f-883d-a7dd1f488d92/bin/utaipan/../../sv-benchmarks/c/bitvector/soft_float_4-2a.c.cil.c [2019-11-26 02:34:43,607 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_ed311eb3-d774-402f-883d-a7dd1f488d92/bin/utaipan/data/061fd851b/aeb1cdbdfcc5440d853430cd04513afb/FLAG8829283ac [2019-11-26 02:34:44,013 INFO L306 CDTParser]: Found 1 translation units. [2019-11-26 02:34:44,015 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_ed311eb3-d774-402f-883d-a7dd1f488d92/sv-benchmarks/c/bitvector/soft_float_4-2a.c.cil.c [2019-11-26 02:34:44,023 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_ed311eb3-d774-402f-883d-a7dd1f488d92/bin/utaipan/data/061fd851b/aeb1cdbdfcc5440d853430cd04513afb/FLAG8829283ac [2019-11-26 02:34:44,408 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_ed311eb3-d774-402f-883d-a7dd1f488d92/bin/utaipan/data/061fd851b/aeb1cdbdfcc5440d853430cd04513afb [2019-11-26 02:34:44,411 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-11-26 02:34:44,411 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-11-26 02:34:44,412 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-11-26 02:34:44,412 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-11-26 02:34:44,415 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-11-26 02:34:44,416 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 02:34:44" (1/1) ... [2019-11-26 02:34:44,418 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6eb84ea3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 02:34:44, skipping insertion in model container [2019-11-26 02:34:44,419 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 26.11 02:34:44" (1/1) ... [2019-11-26 02:34:44,424 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-11-26 02:34:44,449 INFO L179 MainTranslator]: Built tables and reachable declarations [2019-11-26 02:34:44,701 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-26 02:34:44,704 INFO L201 MainTranslator]: Completed pre-run [2019-11-26 02:34:44,754 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-11-26 02:34:44,765 INFO L205 MainTranslator]: Completed translation [2019-11-26 02:34:44,765 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 02:34:44 WrapperNode [2019-11-26 02:34:44,765 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-11-26 02:34:44,766 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-11-26 02:34:44,766 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-11-26 02:34:44,766 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-11-26 02:34:44,773 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 02:34:44" (1/1) ... [2019-11-26 02:34:44,781 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 02:34:44" (1/1) ... [2019-11-26 02:34:44,824 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-11-26 02:34:44,825 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-11-26 02:34:44,825 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-11-26 02:34:44,825 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-11-26 02:34:44,835 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 02:34:44" (1/1) ... [2019-11-26 02:34:44,835 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 02:34:44" (1/1) ... [2019-11-26 02:34:44,843 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 02:34:44" (1/1) ... [2019-11-26 02:34:44,844 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 02:34:44" (1/1) ... [2019-11-26 02:34:44,857 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 02:34:44" (1/1) ... [2019-11-26 02:34:44,867 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 02:34:44" (1/1) ... [2019-11-26 02:34:44,872 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 02:34:44" (1/1) ... [2019-11-26 02:34:44,875 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-11-26 02:34:44,876 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-11-26 02:34:44,876 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-11-26 02:34:44,876 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-11-26 02:34:44,877 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 02:34:44" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_ed311eb3-d774-402f-883d-a7dd1f488d92/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-11-26 02:34:44,931 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-11-26 02:34:44,931 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-11-26 02:34:45,659 INFO L279 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-11-26 02:34:45,659 INFO L284 CfgBuilder]: Removed 30 assume(true) statements. [2019-11-26 02:34:45,660 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 02:34:45 BoogieIcfgContainer [2019-11-26 02:34:45,660 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-11-26 02:34:45,661 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-11-26 02:34:45,661 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-11-26 02:34:45,663 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-11-26 02:34:45,664 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 26.11 02:34:44" (1/3) ... [2019-11-26 02:34:45,664 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3bb5b190 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 26.11 02:34:45, skipping insertion in model container [2019-11-26 02:34:45,665 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 26.11 02:34:44" (2/3) ... [2019-11-26 02:34:45,665 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3bb5b190 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 26.11 02:34:45, skipping insertion in model container [2019-11-26 02:34:45,665 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 02:34:45" (3/3) ... [2019-11-26 02:34:45,666 INFO L109 eAbstractionObserver]: Analyzing ICFG soft_float_4-2a.c.cil.c [2019-11-26 02:34:45,675 INFO L153 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-11-26 02:34:45,680 INFO L165 ceAbstractionStarter]: Appying trace abstraction to program that has 38 error locations. [2019-11-26 02:34:45,686 INFO L249 AbstractCegarLoop]: Starting to check reachability of 38 error locations. [2019-11-26 02:34:45,705 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-11-26 02:34:45,705 INFO L374 AbstractCegarLoop]: Hoare is true [2019-11-26 02:34:45,706 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-11-26 02:34:45,706 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-11-26 02:34:45,706 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-11-26 02:34:45,706 INFO L378 AbstractCegarLoop]: Difference is false [2019-11-26 02:34:45,706 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-11-26 02:34:45,706 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-11-26 02:34:45,724 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states. [2019-11-26 02:34:45,729 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 7 [2019-11-26 02:34:45,729 INFO L402 BasicCegarLoop]: Found error trace [2019-11-26 02:34:45,730 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1] [2019-11-26 02:34:45,731 INFO L410 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr32ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr34ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr30ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr36ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr33ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr31ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr28ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr29ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr35ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr37ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-11-26 02:34:45,735 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-26 02:34:45,736 INFO L82 PathProgramCache]: Analyzing trace with hash 923251214, now seen corresponding path program 1 times [2019-11-26 02:34:45,744 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-11-26 02:34:45,744 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [718439043] [2019-11-26 02:34:45,745 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-26 02:34:45,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-26 02:34:45,836 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-26 02:34:45,837 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [718439043] [2019-11-26 02:34:45,837 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-26 02:34:45,837 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-26 02:34:45,839 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [622708579] [2019-11-26 02:34:45,843 INFO L442 AbstractCegarLoop]: Interpolant automaton has 2 states [2019-11-26 02:34:45,843 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-11-26 02:34:45,855 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2019-11-26 02:34:45,855 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2019-11-26 02:34:45,857 INFO L87 Difference]: Start difference. First operand 120 states. Second operand 2 states. [2019-11-26 02:34:45,884 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-26 02:34:45,884 INFO L93 Difference]: Finished difference Result 219 states and 277 transitions. [2019-11-26 02:34:45,884 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2019-11-26 02:34:45,885 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 6 [2019-11-26 02:34:45,886 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-26 02:34:45,896 INFO L225 Difference]: With dead ends: 219 [2019-11-26 02:34:45,896 INFO L226 Difference]: Without dead ends: 114 [2019-11-26 02:34:45,899 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2019-11-26 02:34:45,914 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2019-11-26 02:34:45,932 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 114. [2019-11-26 02:34:45,933 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2019-11-26 02:34:45,935 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 136 transitions. [2019-11-26 02:34:45,936 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 136 transitions. Word has length 6 [2019-11-26 02:34:45,936 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-26 02:34:45,937 INFO L462 AbstractCegarLoop]: Abstraction has 114 states and 136 transitions. [2019-11-26 02:34:45,937 INFO L463 AbstractCegarLoop]: Interpolant automaton has 2 states. [2019-11-26 02:34:45,937 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 136 transitions. [2019-11-26 02:34:45,937 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 7 [2019-11-26 02:34:45,937 INFO L402 BasicCegarLoop]: Found error trace [2019-11-26 02:34:45,937 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1] [2019-11-26 02:34:45,938 INFO L410 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr32ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr34ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr30ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr36ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr33ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr31ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr28ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr29ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr35ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr37ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-11-26 02:34:45,938 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-26 02:34:45,938 INFO L82 PathProgramCache]: Analyzing trace with hash 921960144, now seen corresponding path program 1 times [2019-11-26 02:34:45,939 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-11-26 02:34:45,939 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1931687444] [2019-11-26 02:34:45,939 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-26 02:34:45,948 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-26 02:34:45,992 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-26 02:34:45,993 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1931687444] [2019-11-26 02:34:45,993 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-26 02:34:45,993 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-26 02:34:45,993 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2976761] [2019-11-26 02:34:45,995 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-26 02:34:45,995 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-11-26 02:34:45,995 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-26 02:34:45,995 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-26 02:34:45,996 INFO L87 Difference]: Start difference. First operand 114 states and 136 transitions. Second operand 4 states. [2019-11-26 02:34:46,085 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-26 02:34:46,085 INFO L93 Difference]: Finished difference Result 255 states and 297 transitions. [2019-11-26 02:34:46,085 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-26 02:34:46,086 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 6 [2019-11-26 02:34:46,086 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-26 02:34:46,087 INFO L225 Difference]: With dead ends: 255 [2019-11-26 02:34:46,088 INFO L226 Difference]: Without dead ends: 143 [2019-11-26 02:34:46,089 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-26 02:34:46,094 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2019-11-26 02:34:46,102 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 94. [2019-11-26 02:34:46,103 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 94 states. [2019-11-26 02:34:46,104 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 110 transitions. [2019-11-26 02:34:46,104 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 110 transitions. Word has length 6 [2019-11-26 02:34:46,104 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-26 02:34:46,104 INFO L462 AbstractCegarLoop]: Abstraction has 94 states and 110 transitions. [2019-11-26 02:34:46,104 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-26 02:34:46,104 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 110 transitions. [2019-11-26 02:34:46,105 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2019-11-26 02:34:46,105 INFO L402 BasicCegarLoop]: Found error trace [2019-11-26 02:34:46,105 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2019-11-26 02:34:46,106 INFO L410 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr32ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr34ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr30ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr36ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr33ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr31ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr28ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr29ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr35ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr37ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-11-26 02:34:46,106 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-26 02:34:46,106 INFO L82 PathProgramCache]: Analyzing trace with hash -2108179699, now seen corresponding path program 1 times [2019-11-26 02:34:46,106 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-11-26 02:34:46,106 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1828157405] [2019-11-26 02:34:46,107 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-26 02:34:46,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-26 02:34:46,153 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-26 02:34:46,153 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1828157405] [2019-11-26 02:34:46,153 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-26 02:34:46,153 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-26 02:34:46,154 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1188115825] [2019-11-26 02:34:46,154 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-26 02:34:46,154 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-11-26 02:34:46,154 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-26 02:34:46,155 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-26 02:34:46,155 INFO L87 Difference]: Start difference. First operand 94 states and 110 transitions. Second operand 4 states. [2019-11-26 02:34:46,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-26 02:34:46,245 INFO L93 Difference]: Finished difference Result 150 states and 173 transitions. [2019-11-26 02:34:46,250 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-26 02:34:46,250 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 8 [2019-11-26 02:34:46,250 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-26 02:34:46,252 INFO L225 Difference]: With dead ends: 150 [2019-11-26 02:34:46,252 INFO L226 Difference]: Without dead ends: 146 [2019-11-26 02:34:46,252 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-26 02:34:46,253 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2019-11-26 02:34:46,262 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 95. [2019-11-26 02:34:46,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 95 states. [2019-11-26 02:34:46,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 112 transitions. [2019-11-26 02:34:46,263 INFO L78 Accepts]: Start accepts. Automaton has 95 states and 112 transitions. Word has length 8 [2019-11-26 02:34:46,263 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-26 02:34:46,263 INFO L462 AbstractCegarLoop]: Abstraction has 95 states and 112 transitions. [2019-11-26 02:34:46,264 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-26 02:34:46,264 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 112 transitions. [2019-11-26 02:34:46,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 10 [2019-11-26 02:34:46,264 INFO L402 BasicCegarLoop]: Found error trace [2019-11-26 02:34:46,265 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-26 02:34:46,265 INFO L410 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr32ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr34ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr30ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr36ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr33ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr31ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr28ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr29ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr35ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr37ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-11-26 02:34:46,265 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-26 02:34:46,266 INFO L82 PathProgramCache]: Analyzing trace with hash -929061096, now seen corresponding path program 1 times [2019-11-26 02:34:46,266 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-11-26 02:34:46,266 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1546057079] [2019-11-26 02:34:46,266 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-26 02:34:46,277 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-26 02:34:46,290 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-26 02:34:46,291 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1546057079] [2019-11-26 02:34:46,291 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-26 02:34:46,291 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-26 02:34:46,291 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2146112275] [2019-11-26 02:34:46,291 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-11-26 02:34:46,292 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-11-26 02:34:46,292 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-11-26 02:34:46,292 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-26 02:34:46,292 INFO L87 Difference]: Start difference. First operand 95 states and 112 transitions. Second operand 3 states. [2019-11-26 02:34:46,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-26 02:34:46,370 INFO L93 Difference]: Finished difference Result 144 states and 165 transitions. [2019-11-26 02:34:46,372 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-11-26 02:34:46,372 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 9 [2019-11-26 02:34:46,373 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-26 02:34:46,374 INFO L225 Difference]: With dead ends: 144 [2019-11-26 02:34:46,374 INFO L226 Difference]: Without dead ends: 142 [2019-11-26 02:34:46,374 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-11-26 02:34:46,375 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2019-11-26 02:34:46,386 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 93. [2019-11-26 02:34:46,391 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 93 states. [2019-11-26 02:34:46,392 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 110 transitions. [2019-11-26 02:34:46,393 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 110 transitions. Word has length 9 [2019-11-26 02:34:46,393 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-26 02:34:46,393 INFO L462 AbstractCegarLoop]: Abstraction has 93 states and 110 transitions. [2019-11-26 02:34:46,393 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-11-26 02:34:46,393 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 110 transitions. [2019-11-26 02:34:46,394 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2019-11-26 02:34:46,394 INFO L402 BasicCegarLoop]: Found error trace [2019-11-26 02:34:46,395 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-26 02:34:46,396 INFO L410 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr32ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr34ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr30ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr36ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr33ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr31ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr28ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr29ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr35ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr37ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-11-26 02:34:46,396 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-26 02:34:46,396 INFO L82 PathProgramCache]: Analyzing trace with hash -2143574469, now seen corresponding path program 1 times [2019-11-26 02:34:46,396 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-11-26 02:34:46,397 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1588175707] [2019-11-26 02:34:46,397 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-26 02:34:46,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-26 02:34:46,468 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-26 02:34:46,468 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1588175707] [2019-11-26 02:34:46,468 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-26 02:34:46,468 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-26 02:34:46,468 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [58623879] [2019-11-26 02:34:46,469 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-26 02:34:46,469 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-11-26 02:34:46,469 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-26 02:34:46,469 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-26 02:34:46,469 INFO L87 Difference]: Start difference. First operand 93 states and 110 transitions. Second operand 4 states. [2019-11-26 02:34:46,532 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-26 02:34:46,532 INFO L93 Difference]: Finished difference Result 148 states and 170 transitions. [2019-11-26 02:34:46,532 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-26 02:34:46,532 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 10 [2019-11-26 02:34:46,533 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-26 02:34:46,534 INFO L225 Difference]: With dead ends: 148 [2019-11-26 02:34:46,536 INFO L226 Difference]: Without dead ends: 146 [2019-11-26 02:34:46,536 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-26 02:34:46,537 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2019-11-26 02:34:46,544 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 95. [2019-11-26 02:34:46,544 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 95 states. [2019-11-26 02:34:46,545 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 112 transitions. [2019-11-26 02:34:46,545 INFO L78 Accepts]: Start accepts. Automaton has 95 states and 112 transitions. Word has length 10 [2019-11-26 02:34:46,546 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-26 02:34:46,546 INFO L462 AbstractCegarLoop]: Abstraction has 95 states and 112 transitions. [2019-11-26 02:34:46,546 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-26 02:34:46,546 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 112 transitions. [2019-11-26 02:34:46,547 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2019-11-26 02:34:46,547 INFO L402 BasicCegarLoop]: Found error trace [2019-11-26 02:34:46,547 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-26 02:34:46,547 INFO L410 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr32ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr34ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr30ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr36ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr33ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr31ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr28ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr29ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr35ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr37ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-11-26 02:34:46,548 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-26 02:34:46,548 INFO L82 PathProgramCache]: Analyzing trace with hash -45359405, now seen corresponding path program 1 times [2019-11-26 02:34:46,548 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-11-26 02:34:46,548 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1876838832] [2019-11-26 02:34:46,549 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-26 02:34:46,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-26 02:34:46,694 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-26 02:34:46,694 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1876838832] [2019-11-26 02:34:46,694 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-26 02:34:46,694 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-26 02:34:46,695 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1563741105] [2019-11-26 02:34:46,695 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-26 02:34:46,695 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-11-26 02:34:46,695 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-26 02:34:46,695 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-11-26 02:34:46,696 INFO L87 Difference]: Start difference. First operand 95 states and 112 transitions. Second operand 7 states. [2019-11-26 02:34:46,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-26 02:34:46,901 INFO L93 Difference]: Finished difference Result 217 states and 249 transitions. [2019-11-26 02:34:46,902 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-26 02:34:46,902 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 10 [2019-11-26 02:34:46,902 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-26 02:34:46,903 INFO L225 Difference]: With dead ends: 217 [2019-11-26 02:34:46,904 INFO L226 Difference]: Without dead ends: 165 [2019-11-26 02:34:46,904 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=77, Unknown=0, NotChecked=0, Total=110 [2019-11-26 02:34:46,905 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2019-11-26 02:34:46,926 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 129. [2019-11-26 02:34:46,927 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2019-11-26 02:34:46,930 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 162 transitions. [2019-11-26 02:34:46,934 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 162 transitions. Word has length 10 [2019-11-26 02:34:46,934 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-26 02:34:46,935 INFO L462 AbstractCegarLoop]: Abstraction has 129 states and 162 transitions. [2019-11-26 02:34:46,935 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-26 02:34:46,935 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 162 transitions. [2019-11-26 02:34:46,936 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 11 [2019-11-26 02:34:46,937 INFO L402 BasicCegarLoop]: Found error trace [2019-11-26 02:34:46,937 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-26 02:34:46,938 INFO L410 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr32ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr34ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr30ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr36ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr33ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr31ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr28ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr29ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr35ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr37ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-11-26 02:34:46,940 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-26 02:34:46,940 INFO L82 PathProgramCache]: Analyzing trace with hash -51475367, now seen corresponding path program 1 times [2019-11-26 02:34:46,944 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-11-26 02:34:46,944 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1534443976] [2019-11-26 02:34:46,944 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-26 02:34:46,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-26 02:34:46,984 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-26 02:34:46,984 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1534443976] [2019-11-26 02:34:46,984 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-26 02:34:46,985 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-26 02:34:46,985 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1204256918] [2019-11-26 02:34:46,985 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-26 02:34:46,985 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-11-26 02:34:46,986 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-26 02:34:46,986 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-26 02:34:46,986 INFO L87 Difference]: Start difference. First operand 129 states and 162 transitions. Second operand 4 states. [2019-11-26 02:34:47,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-26 02:34:47,065 INFO L93 Difference]: Finished difference Result 207 states and 259 transitions. [2019-11-26 02:34:47,066 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-26 02:34:47,066 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 10 [2019-11-26 02:34:47,066 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-26 02:34:47,068 INFO L225 Difference]: With dead ends: 207 [2019-11-26 02:34:47,068 INFO L226 Difference]: Without dead ends: 205 [2019-11-26 02:34:47,068 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-26 02:34:47,069 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 205 states. [2019-11-26 02:34:47,084 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 205 to 136. [2019-11-26 02:34:47,084 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2019-11-26 02:34:47,086 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 170 transitions. [2019-11-26 02:34:47,086 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 170 transitions. Word has length 10 [2019-11-26 02:34:47,086 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-26 02:34:47,087 INFO L462 AbstractCegarLoop]: Abstraction has 136 states and 170 transitions. [2019-11-26 02:34:47,087 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-26 02:34:47,087 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 170 transitions. [2019-11-26 02:34:47,091 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2019-11-26 02:34:47,091 INFO L402 BasicCegarLoop]: Found error trace [2019-11-26 02:34:47,091 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-26 02:34:47,092 INFO L410 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr32ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr34ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr30ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr36ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr33ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr31ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr28ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr29ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr35ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr37ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-11-26 02:34:47,092 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-26 02:34:47,092 INFO L82 PathProgramCache]: Analyzing trace with hash -1335732703, now seen corresponding path program 1 times [2019-11-26 02:34:47,093 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-11-26 02:34:47,093 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [136171524] [2019-11-26 02:34:47,093 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-26 02:34:47,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-26 02:34:47,153 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-26 02:34:47,153 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [136171524] [2019-11-26 02:34:47,154 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-26 02:34:47,154 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-11-26 02:34:47,154 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1206958876] [2019-11-26 02:34:47,154 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-26 02:34:47,155 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-11-26 02:34:47,155 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-26 02:34:47,155 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-11-26 02:34:47,155 INFO L87 Difference]: Start difference. First operand 136 states and 170 transitions. Second operand 4 states. [2019-11-26 02:34:47,238 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-26 02:34:47,239 INFO L93 Difference]: Finished difference Result 214 states and 262 transitions. [2019-11-26 02:34:47,239 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-26 02:34:47,239 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 12 [2019-11-26 02:34:47,240 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-26 02:34:47,241 INFO L225 Difference]: With dead ends: 214 [2019-11-26 02:34:47,241 INFO L226 Difference]: Without dead ends: 212 [2019-11-26 02:34:47,242 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-11-26 02:34:47,243 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 212 states. [2019-11-26 02:34:47,252 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 212 to 141. [2019-11-26 02:34:47,253 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2019-11-26 02:34:47,254 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 174 transitions. [2019-11-26 02:34:47,254 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 174 transitions. Word has length 12 [2019-11-26 02:34:47,255 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-26 02:34:47,256 INFO L462 AbstractCegarLoop]: Abstraction has 141 states and 174 transitions. [2019-11-26 02:34:47,256 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-26 02:34:47,256 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 174 transitions. [2019-11-26 02:34:47,258 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-11-26 02:34:47,258 INFO L402 BasicCegarLoop]: Found error trace [2019-11-26 02:34:47,258 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-26 02:34:47,259 INFO L410 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr32ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr34ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr30ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr36ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr33ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr31ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr28ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr29ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr35ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr37ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-11-26 02:34:47,259 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-26 02:34:47,259 INFO L82 PathProgramCache]: Analyzing trace with hash -1811434083, now seen corresponding path program 1 times [2019-11-26 02:34:47,259 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-11-26 02:34:47,260 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1977947601] [2019-11-26 02:34:47,260 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-26 02:34:47,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-26 02:34:47,312 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-26 02:34:47,312 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1977947601] [2019-11-26 02:34:47,312 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-26 02:34:47,312 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-26 02:34:47,312 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [939225816] [2019-11-26 02:34:47,313 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-26 02:34:47,313 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-11-26 02:34:47,313 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-26 02:34:47,313 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-26 02:34:47,313 INFO L87 Difference]: Start difference. First operand 141 states and 174 transitions. Second operand 4 states. [2019-11-26 02:34:47,389 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-26 02:34:47,389 INFO L93 Difference]: Finished difference Result 280 states and 339 transitions. [2019-11-26 02:34:47,390 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-26 02:34:47,390 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-11-26 02:34:47,391 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-26 02:34:47,392 INFO L225 Difference]: With dead ends: 280 [2019-11-26 02:34:47,392 INFO L226 Difference]: Without dead ends: 278 [2019-11-26 02:34:47,393 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-26 02:34:47,394 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 278 states. [2019-11-26 02:34:47,403 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 278 to 130. [2019-11-26 02:34:47,403 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130 states. [2019-11-26 02:34:47,404 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 162 transitions. [2019-11-26 02:34:47,404 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 162 transitions. Word has length 13 [2019-11-26 02:34:47,404 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-26 02:34:47,405 INFO L462 AbstractCegarLoop]: Abstraction has 130 states and 162 transitions. [2019-11-26 02:34:47,405 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-26 02:34:47,405 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 162 transitions. [2019-11-26 02:34:47,405 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-11-26 02:34:47,406 INFO L402 BasicCegarLoop]: Found error trace [2019-11-26 02:34:47,406 INFO L410 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-26 02:34:47,406 INFO L410 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr32ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr34ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr30ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr36ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr33ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr31ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr28ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr29ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr35ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr37ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-11-26 02:34:47,407 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-26 02:34:47,407 INFO L82 PathProgramCache]: Analyzing trace with hash -1938533571, now seen corresponding path program 1 times [2019-11-26 02:34:47,407 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-11-26 02:34:47,407 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1089003328] [2019-11-26 02:34:47,408 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-26 02:34:47,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-26 02:34:47,434 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-26 02:34:47,434 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1089003328] [2019-11-26 02:34:47,434 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-26 02:34:47,434 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-11-26 02:34:47,434 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1992260349] [2019-11-26 02:34:47,435 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-11-26 02:34:47,435 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-11-26 02:34:47,435 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-11-26 02:34:47,435 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-26 02:34:47,435 INFO L87 Difference]: Start difference. First operand 130 states and 162 transitions. Second operand 4 states. [2019-11-26 02:34:47,510 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-26 02:34:47,511 INFO L93 Difference]: Finished difference Result 228 states and 275 transitions. [2019-11-26 02:34:47,511 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-26 02:34:47,511 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 14 [2019-11-26 02:34:47,512 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-26 02:34:47,513 INFO L225 Difference]: With dead ends: 228 [2019-11-26 02:34:47,513 INFO L226 Difference]: Without dead ends: 226 [2019-11-26 02:34:47,514 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-11-26 02:34:47,515 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 226 states. [2019-11-26 02:34:47,522 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 226 to 116. [2019-11-26 02:34:47,522 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116 states. [2019-11-26 02:34:47,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 144 transitions. [2019-11-26 02:34:47,523 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 144 transitions. Word has length 14 [2019-11-26 02:34:47,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-26 02:34:47,524 INFO L462 AbstractCegarLoop]: Abstraction has 116 states and 144 transitions. [2019-11-26 02:34:47,524 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-11-26 02:34:47,524 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 144 transitions. [2019-11-26 02:34:47,524 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2019-11-26 02:34:47,524 INFO L402 BasicCegarLoop]: Found error trace [2019-11-26 02:34:47,524 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-26 02:34:47,525 INFO L410 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr32ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr34ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr30ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr36ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr33ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr31ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr28ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr29ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr35ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr37ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-11-26 02:34:47,525 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-26 02:34:47,525 INFO L82 PathProgramCache]: Analyzing trace with hash 560593284, now seen corresponding path program 1 times [2019-11-26 02:34:47,525 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-11-26 02:34:47,526 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [717780331] [2019-11-26 02:34:47,526 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-26 02:34:47,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-26 02:34:47,767 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-26 02:34:47,768 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [717780331] [2019-11-26 02:34:47,768 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-26 02:34:47,768 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-26 02:34:47,768 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [756444906] [2019-11-26 02:34:47,768 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-26 02:34:47,769 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-11-26 02:34:47,769 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-26 02:34:47,769 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-11-26 02:34:47,769 INFO L87 Difference]: Start difference. First operand 116 states and 144 transitions. Second operand 8 states. [2019-11-26 02:34:48,083 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-26 02:34:48,084 INFO L93 Difference]: Finished difference Result 149 states and 169 transitions. [2019-11-26 02:34:48,084 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2019-11-26 02:34:48,084 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 14 [2019-11-26 02:34:48,085 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-26 02:34:48,086 INFO L225 Difference]: With dead ends: 149 [2019-11-26 02:34:48,086 INFO L226 Difference]: Without dead ends: 148 [2019-11-26 02:34:48,086 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=38, Invalid=118, Unknown=0, NotChecked=0, Total=156 [2019-11-26 02:34:48,087 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2019-11-26 02:34:48,095 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 116. [2019-11-26 02:34:48,095 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116 states. [2019-11-26 02:34:48,096 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 143 transitions. [2019-11-26 02:34:48,096 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 143 transitions. Word has length 14 [2019-11-26 02:34:48,096 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-26 02:34:48,097 INFO L462 AbstractCegarLoop]: Abstraction has 116 states and 143 transitions. [2019-11-26 02:34:48,097 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-26 02:34:48,097 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 143 transitions. [2019-11-26 02:34:48,097 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-11-26 02:34:48,098 INFO L402 BasicCegarLoop]: Found error trace [2019-11-26 02:34:48,098 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-26 02:34:48,098 INFO L410 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr32ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr34ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr30ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr36ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr33ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr31ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr28ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr29ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr35ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr37ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-11-26 02:34:48,099 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-26 02:34:48,099 INFO L82 PathProgramCache]: Analyzing trace with hash 573296884, now seen corresponding path program 1 times [2019-11-26 02:34:48,099 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-11-26 02:34:48,099 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1372416970] [2019-11-26 02:34:48,099 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-26 02:34:48,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-26 02:34:48,342 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-26 02:34:48,342 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1372416970] [2019-11-26 02:34:48,342 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-26 02:34:48,342 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-26 02:34:48,342 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [916555274] [2019-11-26 02:34:48,343 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-26 02:34:48,343 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-11-26 02:34:48,343 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-26 02:34:48,343 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-11-26 02:34:48,343 INFO L87 Difference]: Start difference. First operand 116 states and 143 transitions. Second operand 8 states. [2019-11-26 02:34:48,531 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-26 02:34:48,531 INFO L93 Difference]: Finished difference Result 140 states and 167 transitions. [2019-11-26 02:34:48,531 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-26 02:34:48,531 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 16 [2019-11-26 02:34:48,532 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-26 02:34:48,532 INFO L225 Difference]: With dead ends: 140 [2019-11-26 02:34:48,533 INFO L226 Difference]: Without dead ends: 139 [2019-11-26 02:34:48,533 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2019-11-26 02:34:48,533 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2019-11-26 02:34:48,540 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 120. [2019-11-26 02:34:48,541 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120 states. [2019-11-26 02:34:48,541 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 147 transitions. [2019-11-26 02:34:48,542 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 147 transitions. Word has length 16 [2019-11-26 02:34:48,542 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-26 02:34:48,542 INFO L462 AbstractCegarLoop]: Abstraction has 120 states and 147 transitions. [2019-11-26 02:34:48,542 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-26 02:34:48,542 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 147 transitions. [2019-11-26 02:34:48,543 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-11-26 02:34:48,543 INFO L402 BasicCegarLoop]: Found error trace [2019-11-26 02:34:48,543 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-26 02:34:48,543 INFO L410 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr32ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr34ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr30ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr36ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr33ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr31ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr28ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr29ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr35ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr37ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-11-26 02:34:48,544 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-26 02:34:48,544 INFO L82 PathProgramCache]: Analyzing trace with hash 1859242662, now seen corresponding path program 1 times [2019-11-26 02:34:48,544 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-11-26 02:34:48,544 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [569775695] [2019-11-26 02:34:48,544 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-26 02:34:48,560 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-26 02:34:48,768 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-26 02:34:48,768 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [569775695] [2019-11-26 02:34:48,768 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-26 02:34:48,768 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-26 02:34:48,768 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [415004229] [2019-11-26 02:34:48,769 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-11-26 02:34:48,769 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-11-26 02:34:48,769 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-11-26 02:34:48,769 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2019-11-26 02:34:48,769 INFO L87 Difference]: Start difference. First operand 120 states and 147 transitions. Second operand 9 states. [2019-11-26 02:34:48,945 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-26 02:34:48,946 INFO L93 Difference]: Finished difference Result 169 states and 189 transitions. [2019-11-26 02:34:48,946 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-26 02:34:48,946 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 16 [2019-11-26 02:34:48,948 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-26 02:34:48,949 INFO L225 Difference]: With dead ends: 169 [2019-11-26 02:34:48,949 INFO L226 Difference]: Without dead ends: 168 [2019-11-26 02:34:48,952 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=35, Invalid=97, Unknown=0, NotChecked=0, Total=132 [2019-11-26 02:34:48,953 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168 states. [2019-11-26 02:34:48,962 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168 to 126. [2019-11-26 02:34:48,962 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2019-11-26 02:34:48,963 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 153 transitions. [2019-11-26 02:34:48,963 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 153 transitions. Word has length 16 [2019-11-26 02:34:48,964 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-26 02:34:48,964 INFO L462 AbstractCegarLoop]: Abstraction has 126 states and 153 transitions. [2019-11-26 02:34:48,964 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-11-26 02:34:48,964 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 153 transitions. [2019-11-26 02:34:48,964 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2019-11-26 02:34:48,964 INFO L402 BasicCegarLoop]: Found error trace [2019-11-26 02:34:48,964 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-26 02:34:48,965 INFO L410 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr32ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr34ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr30ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr36ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr33ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr31ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr28ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr29ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr35ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr37ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-11-26 02:34:48,965 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-26 02:34:48,965 INFO L82 PathProgramCache]: Analyzing trace with hash 1801953261, now seen corresponding path program 1 times [2019-11-26 02:34:48,965 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-11-26 02:34:48,966 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1725625382] [2019-11-26 02:34:48,966 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-26 02:34:48,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-26 02:34:49,456 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-26 02:34:49,456 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1725625382] [2019-11-26 02:34:49,456 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-26 02:34:49,456 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-11-26 02:34:49,457 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [448528697] [2019-11-26 02:34:49,457 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-11-26 02:34:49,457 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-11-26 02:34:49,457 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-11-26 02:34:49,457 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2019-11-26 02:34:49,458 INFO L87 Difference]: Start difference. First operand 126 states and 153 transitions. Second operand 12 states. [2019-11-26 02:34:52,081 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-26 02:34:52,081 INFO L93 Difference]: Finished difference Result 173 states and 192 transitions. [2019-11-26 02:34:52,082 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-11-26 02:34:52,082 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 17 [2019-11-26 02:34:52,082 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-26 02:34:52,083 INFO L225 Difference]: With dead ends: 173 [2019-11-26 02:34:52,083 INFO L226 Difference]: Without dead ends: 172 [2019-11-26 02:34:52,083 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=80, Invalid=300, Unknown=0, NotChecked=0, Total=380 [2019-11-26 02:34:52,084 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172 states. [2019-11-26 02:34:52,091 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172 to 127. [2019-11-26 02:34:52,091 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127 states. [2019-11-26 02:34:52,092 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 154 transitions. [2019-11-26 02:34:52,092 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 154 transitions. Word has length 17 [2019-11-26 02:34:52,092 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-26 02:34:52,092 INFO L462 AbstractCegarLoop]: Abstraction has 127 states and 154 transitions. [2019-11-26 02:34:52,092 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-11-26 02:34:52,093 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 154 transitions. [2019-11-26 02:34:52,093 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-11-26 02:34:52,093 INFO L402 BasicCegarLoop]: Found error trace [2019-11-26 02:34:52,093 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-26 02:34:52,094 INFO L410 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr32ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr34ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr30ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr36ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr33ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr31ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr28ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr29ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr35ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr37ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-11-26 02:34:52,094 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-26 02:34:52,094 INFO L82 PathProgramCache]: Analyzing trace with hash 1182502646, now seen corresponding path program 1 times [2019-11-26 02:34:52,095 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-11-26 02:34:52,095 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [839464145] [2019-11-26 02:34:52,095 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-26 02:34:52,125 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-26 02:34:52,358 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-26 02:34:52,359 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [839464145] [2019-11-26 02:34:52,359 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-26 02:34:52,359 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-11-26 02:34:52,359 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1869179259] [2019-11-26 02:34:52,359 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-11-26 02:34:52,360 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-11-26 02:34:52,360 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-11-26 02:34:52,360 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2019-11-26 02:34:52,360 INFO L87 Difference]: Start difference. First operand 127 states and 154 transitions. Second operand 10 states. [2019-11-26 02:34:52,656 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-26 02:34:52,657 INFO L93 Difference]: Finished difference Result 321 states and 371 transitions. [2019-11-26 02:34:52,657 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-26 02:34:52,657 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 18 [2019-11-26 02:34:52,657 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-26 02:34:52,659 INFO L225 Difference]: With dead ends: 321 [2019-11-26 02:34:52,659 INFO L226 Difference]: Without dead ends: 319 [2019-11-26 02:34:52,661 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=41, Invalid=115, Unknown=0, NotChecked=0, Total=156 [2019-11-26 02:34:52,662 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 319 states. [2019-11-26 02:34:52,671 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 319 to 154. [2019-11-26 02:34:52,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2019-11-26 02:34:52,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 189 transitions. [2019-11-26 02:34:52,673 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 189 transitions. Word has length 18 [2019-11-26 02:34:52,673 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-26 02:34:52,673 INFO L462 AbstractCegarLoop]: Abstraction has 154 states and 189 transitions. [2019-11-26 02:34:52,673 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-11-26 02:34:52,673 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 189 transitions. [2019-11-26 02:34:52,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-11-26 02:34:52,674 INFO L402 BasicCegarLoop]: Found error trace [2019-11-26 02:34:52,674 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-26 02:34:52,674 INFO L410 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr32ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr34ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr30ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr36ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr33ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr31ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr28ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr29ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr35ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr37ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-11-26 02:34:52,675 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-26 02:34:52,675 INFO L82 PathProgramCache]: Analyzing trace with hash -131832139, now seen corresponding path program 1 times [2019-11-26 02:34:52,675 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-11-26 02:34:52,675 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1606558075] [2019-11-26 02:34:52,675 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-26 02:34:52,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-26 02:34:52,796 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-26 02:34:52,796 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1606558075] [2019-11-26 02:34:52,797 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-26 02:34:52,797 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-26 02:34:52,797 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1118685608] [2019-11-26 02:34:52,797 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-26 02:34:52,797 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-11-26 02:34:52,797 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-26 02:34:52,798 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-26 02:34:52,798 INFO L87 Difference]: Start difference. First operand 154 states and 189 transitions. Second operand 6 states. [2019-11-26 02:34:53,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-26 02:34:53,684 INFO L93 Difference]: Finished difference Result 302 states and 353 transitions. [2019-11-26 02:34:53,684 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-11-26 02:34:53,684 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 18 [2019-11-26 02:34:53,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-26 02:34:53,686 INFO L225 Difference]: With dead ends: 302 [2019-11-26 02:34:53,686 INFO L226 Difference]: Without dead ends: 301 [2019-11-26 02:34:53,687 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-11-26 02:34:53,687 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 301 states. [2019-11-26 02:34:53,697 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 301 to 161. [2019-11-26 02:34:53,697 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2019-11-26 02:34:53,699 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 196 transitions. [2019-11-26 02:34:53,699 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 196 transitions. Word has length 18 [2019-11-26 02:34:53,700 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-26 02:34:53,700 INFO L462 AbstractCegarLoop]: Abstraction has 161 states and 196 transitions. [2019-11-26 02:34:53,700 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-26 02:34:53,701 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 196 transitions. [2019-11-26 02:34:53,701 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-11-26 02:34:53,701 INFO L402 BasicCegarLoop]: Found error trace [2019-11-26 02:34:53,701 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-26 02:34:53,702 INFO L410 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr32ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr34ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr30ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr36ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr33ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr31ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr28ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr29ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr35ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr37ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-11-26 02:34:53,702 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-26 02:34:53,702 INFO L82 PathProgramCache]: Analyzing trace with hash 25976531, now seen corresponding path program 1 times [2019-11-26 02:34:53,702 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-11-26 02:34:53,703 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1232504534] [2019-11-26 02:34:53,703 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-26 02:34:53,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-26 02:34:53,837 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-26 02:34:53,837 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1232504534] [2019-11-26 02:34:53,837 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-26 02:34:53,837 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-11-26 02:34:53,837 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [484659152] [2019-11-26 02:34:53,838 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-26 02:34:53,838 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-11-26 02:34:53,838 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-26 02:34:53,838 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-26 02:34:53,838 INFO L87 Difference]: Start difference. First operand 161 states and 196 transitions. Second operand 7 states. [2019-11-26 02:34:53,989 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-26 02:34:53,990 INFO L93 Difference]: Finished difference Result 201 states and 229 transitions. [2019-11-26 02:34:53,990 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-11-26 02:34:53,990 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 18 [2019-11-26 02:34:53,991 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-26 02:34:53,992 INFO L225 Difference]: With dead ends: 201 [2019-11-26 02:34:53,992 INFO L226 Difference]: Without dead ends: 180 [2019-11-26 02:34:53,992 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2019-11-26 02:34:53,993 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2019-11-26 02:34:54,002 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 154. [2019-11-26 02:34:54,003 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2019-11-26 02:34:54,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 188 transitions. [2019-11-26 02:34:54,004 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 188 transitions. Word has length 18 [2019-11-26 02:34:54,004 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-26 02:34:54,004 INFO L462 AbstractCegarLoop]: Abstraction has 154 states and 188 transitions. [2019-11-26 02:34:54,004 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-26 02:34:54,004 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 188 transitions. [2019-11-26 02:34:54,005 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-11-26 02:34:54,005 INFO L402 BasicCegarLoop]: Found error trace [2019-11-26 02:34:54,005 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-26 02:34:54,006 INFO L410 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr32ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr34ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr30ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr36ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr33ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr31ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr28ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr29ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr35ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr37ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-11-26 02:34:54,006 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-26 02:34:54,006 INFO L82 PathProgramCache]: Analyzing trace with hash 257041776, now seen corresponding path program 1 times [2019-11-26 02:34:54,006 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-11-26 02:34:54,007 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1783239717] [2019-11-26 02:34:54,007 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-26 02:34:54,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-26 02:34:54,233 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-26 02:34:54,233 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1783239717] [2019-11-26 02:34:54,234 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-26 02:34:54,234 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-26 02:34:54,234 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1158840822] [2019-11-26 02:34:54,234 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-26 02:34:54,234 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-11-26 02:34:54,235 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-26 02:34:54,235 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-26 02:34:54,235 INFO L87 Difference]: Start difference. First operand 154 states and 188 transitions. Second operand 7 states. [2019-11-26 02:34:54,480 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-26 02:34:54,481 INFO L93 Difference]: Finished difference Result 181 states and 208 transitions. [2019-11-26 02:34:54,481 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-11-26 02:34:54,481 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 18 [2019-11-26 02:34:54,481 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-26 02:34:54,483 INFO L225 Difference]: With dead ends: 181 [2019-11-26 02:34:54,483 INFO L226 Difference]: Without dead ends: 180 [2019-11-26 02:34:54,483 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=31, Invalid=79, Unknown=0, NotChecked=0, Total=110 [2019-11-26 02:34:54,484 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2019-11-26 02:34:54,510 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 154. [2019-11-26 02:34:54,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 154 states. [2019-11-26 02:34:54,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 154 states to 154 states and 187 transitions. [2019-11-26 02:34:54,511 INFO L78 Accepts]: Start accepts. Automaton has 154 states and 187 transitions. Word has length 18 [2019-11-26 02:34:54,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-26 02:34:54,511 INFO L462 AbstractCegarLoop]: Abstraction has 154 states and 187 transitions. [2019-11-26 02:34:54,512 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-26 02:34:54,512 INFO L276 IsEmpty]: Start isEmpty. Operand 154 states and 187 transitions. [2019-11-26 02:34:54,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-11-26 02:34:54,512 INFO L402 BasicCegarLoop]: Found error trace [2019-11-26 02:34:54,513 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-26 02:34:54,513 INFO L410 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr32ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr34ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr30ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr36ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr33ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr31ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr28ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr29ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr35ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr37ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-11-26 02:34:54,513 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-26 02:34:54,513 INFO L82 PathProgramCache]: Analyzing trace with hash -1997119809, now seen corresponding path program 1 times [2019-11-26 02:34:54,515 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-11-26 02:34:54,515 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [164286939] [2019-11-26 02:34:54,515 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-26 02:34:54,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-26 02:34:54,839 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-26 02:34:54,839 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [164286939] [2019-11-26 02:34:54,839 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-26 02:34:54,839 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-11-26 02:34:54,840 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1815332930] [2019-11-26 02:34:54,840 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-11-26 02:34:54,840 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-11-26 02:34:54,840 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-11-26 02:34:54,840 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-11-26 02:34:54,840 INFO L87 Difference]: Start difference. First operand 154 states and 187 transitions. Second operand 10 states. [2019-11-26 02:34:55,188 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-26 02:34:55,188 INFO L93 Difference]: Finished difference Result 178 states and 210 transitions. [2019-11-26 02:34:55,189 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-11-26 02:34:55,189 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 19 [2019-11-26 02:34:55,189 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-26 02:34:55,190 INFO L225 Difference]: With dead ends: 178 [2019-11-26 02:34:55,190 INFO L226 Difference]: Without dead ends: 175 [2019-11-26 02:34:55,191 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=58, Invalid=152, Unknown=0, NotChecked=0, Total=210 [2019-11-26 02:34:55,191 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 175 states. [2019-11-26 02:34:55,201 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 175 to 164. [2019-11-26 02:34:55,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164 states. [2019-11-26 02:34:55,203 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 164 states and 200 transitions. [2019-11-26 02:34:55,203 INFO L78 Accepts]: Start accepts. Automaton has 164 states and 200 transitions. Word has length 19 [2019-11-26 02:34:55,203 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-26 02:34:55,203 INFO L462 AbstractCegarLoop]: Abstraction has 164 states and 200 transitions. [2019-11-26 02:34:55,204 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-11-26 02:34:55,204 INFO L276 IsEmpty]: Start isEmpty. Operand 164 states and 200 transitions. [2019-11-26 02:34:55,206 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-11-26 02:34:55,206 INFO L402 BasicCegarLoop]: Found error trace [2019-11-26 02:34:55,207 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-26 02:34:55,207 INFO L410 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr32ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr34ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr30ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr36ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr33ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr31ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr28ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr29ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr35ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr37ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-11-26 02:34:55,208 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-26 02:34:55,208 INFO L82 PathProgramCache]: Analyzing trace with hash -621633949, now seen corresponding path program 1 times [2019-11-26 02:34:55,208 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-11-26 02:34:55,208 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [716112575] [2019-11-26 02:34:55,208 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-26 02:34:55,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-26 02:34:55,454 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-26 02:34:55,454 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [716112575] [2019-11-26 02:34:55,455 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-26 02:34:55,455 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-11-26 02:34:55,455 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1365385409] [2019-11-26 02:34:55,455 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-11-26 02:34:55,455 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-11-26 02:34:55,455 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-11-26 02:34:55,456 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-11-26 02:34:55,456 INFO L87 Difference]: Start difference. First operand 164 states and 200 transitions. Second operand 10 states. [2019-11-26 02:34:55,813 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-26 02:34:55,813 INFO L93 Difference]: Finished difference Result 184 states and 210 transitions. [2019-11-26 02:34:55,814 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2019-11-26 02:34:55,814 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 19 [2019-11-26 02:34:55,814 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-26 02:34:55,815 INFO L225 Difference]: With dead ends: 184 [2019-11-26 02:34:55,815 INFO L226 Difference]: Without dead ends: 181 [2019-11-26 02:34:55,816 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=66, Invalid=240, Unknown=0, NotChecked=0, Total=306 [2019-11-26 02:34:55,816 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181 states. [2019-11-26 02:34:55,824 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181 to 166. [2019-11-26 02:34:55,825 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166 states. [2019-11-26 02:34:55,825 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 200 transitions. [2019-11-26 02:34:55,825 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 200 transitions. Word has length 19 [2019-11-26 02:34:55,826 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-26 02:34:55,826 INFO L462 AbstractCegarLoop]: Abstraction has 166 states and 200 transitions. [2019-11-26 02:34:55,826 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-11-26 02:34:55,826 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 200 transitions. [2019-11-26 02:34:55,826 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-11-26 02:34:55,826 INFO L402 BasicCegarLoop]: Found error trace [2019-11-26 02:34:55,827 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-26 02:34:55,827 INFO L410 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr32ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr34ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr30ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr36ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr33ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr31ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr28ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr29ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr35ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr37ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-11-26 02:34:55,827 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-26 02:34:55,828 INFO L82 PathProgramCache]: Analyzing trace with hash 1450247776, now seen corresponding path program 1 times [2019-11-26 02:34:55,828 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-11-26 02:34:55,828 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2118027157] [2019-11-26 02:34:55,828 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-26 02:34:55,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-26 02:34:56,026 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-26 02:34:56,026 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2118027157] [2019-11-26 02:34:56,027 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-26 02:34:56,027 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-26 02:34:56,027 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [44052833] [2019-11-26 02:34:56,027 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-11-26 02:34:56,027 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-11-26 02:34:56,027 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-11-26 02:34:56,028 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-11-26 02:34:56,028 INFO L87 Difference]: Start difference. First operand 166 states and 200 transitions. Second operand 7 states. [2019-11-26 02:34:56,225 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-26 02:34:56,225 INFO L93 Difference]: Finished difference Result 176 states and 207 transitions. [2019-11-26 02:34:56,226 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-26 02:34:56,226 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 20 [2019-11-26 02:34:56,226 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-26 02:34:56,227 INFO L225 Difference]: With dead ends: 176 [2019-11-26 02:34:56,227 INFO L226 Difference]: Without dead ends: 175 [2019-11-26 02:34:56,228 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2019-11-26 02:34:56,228 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 175 states. [2019-11-26 02:34:56,236 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 175 to 158. [2019-11-26 02:34:56,236 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2019-11-26 02:34:56,237 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 191 transitions. [2019-11-26 02:34:56,237 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 191 transitions. Word has length 20 [2019-11-26 02:34:56,238 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-26 02:34:56,238 INFO L462 AbstractCegarLoop]: Abstraction has 158 states and 191 transitions. [2019-11-26 02:34:56,238 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-11-26 02:34:56,239 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 191 transitions. [2019-11-26 02:34:56,239 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-11-26 02:34:56,239 INFO L402 BasicCegarLoop]: Found error trace [2019-11-26 02:34:56,239 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-26 02:34:56,240 INFO L410 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr32ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr34ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr30ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr36ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr33ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr31ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr28ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr29ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr35ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr37ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-11-26 02:34:56,240 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-26 02:34:56,240 INFO L82 PathProgramCache]: Analyzing trace with hash 135912991, now seen corresponding path program 1 times [2019-11-26 02:34:56,240 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-11-26 02:34:56,240 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [74410818] [2019-11-26 02:34:56,241 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-26 02:34:56,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-26 02:34:56,343 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-26 02:34:56,343 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [74410818] [2019-11-26 02:34:56,343 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-26 02:34:56,343 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-11-26 02:34:56,344 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1346434844] [2019-11-26 02:34:56,344 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-11-26 02:34:56,344 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-11-26 02:34:56,344 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-11-26 02:34:56,344 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-11-26 02:34:56,344 INFO L87 Difference]: Start difference. First operand 158 states and 191 transitions. Second operand 5 states. [2019-11-26 02:34:56,517 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-26 02:34:56,517 INFO L93 Difference]: Finished difference Result 206 states and 243 transitions. [2019-11-26 02:34:56,519 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-11-26 02:34:56,519 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 20 [2019-11-26 02:34:56,519 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-26 02:34:56,520 INFO L225 Difference]: With dead ends: 206 [2019-11-26 02:34:56,521 INFO L226 Difference]: Without dead ends: 205 [2019-11-26 02:34:56,521 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2019-11-26 02:34:56,521 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 205 states. [2019-11-26 02:34:56,530 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 205 to 158. [2019-11-26 02:34:56,530 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2019-11-26 02:34:56,531 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 191 transitions. [2019-11-26 02:34:56,531 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 191 transitions. Word has length 20 [2019-11-26 02:34:56,532 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-26 02:34:56,532 INFO L462 AbstractCegarLoop]: Abstraction has 158 states and 191 transitions. [2019-11-26 02:34:56,532 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-11-26 02:34:56,532 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 191 transitions. [2019-11-26 02:34:56,532 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-11-26 02:34:56,532 INFO L402 BasicCegarLoop]: Found error trace [2019-11-26 02:34:56,533 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-26 02:34:56,533 INFO L410 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr32ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr34ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr30ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr36ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr33ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr31ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr28ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr29ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr35ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr37ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-11-26 02:34:56,533 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-26 02:34:56,533 INFO L82 PathProgramCache]: Analyzing trace with hash -1781171576, now seen corresponding path program 1 times [2019-11-26 02:34:56,534 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-11-26 02:34:56,535 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [453259015] [2019-11-26 02:34:56,536 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-26 02:34:56,554 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-26 02:34:56,652 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-26 02:34:56,652 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [453259015] [2019-11-26 02:34:56,652 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-26 02:34:56,652 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-11-26 02:34:56,652 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [789857179] [2019-11-26 02:34:56,653 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-11-26 02:34:56,653 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-11-26 02:34:56,653 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-11-26 02:34:56,653 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-11-26 02:34:56,653 INFO L87 Difference]: Start difference. First operand 158 states and 191 transitions. Second operand 8 states. [2019-11-26 02:34:56,827 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-26 02:34:56,828 INFO L93 Difference]: Finished difference Result 312 states and 355 transitions. [2019-11-26 02:34:56,828 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2019-11-26 02:34:56,828 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 20 [2019-11-26 02:34:56,828 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-26 02:34:56,830 INFO L225 Difference]: With dead ends: 312 [2019-11-26 02:34:56,830 INFO L226 Difference]: Without dead ends: 288 [2019-11-26 02:34:56,830 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2019-11-26 02:34:56,831 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 288 states. [2019-11-26 02:34:56,839 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 288 to 158. [2019-11-26 02:34:56,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2019-11-26 02:34:56,840 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 189 transitions. [2019-11-26 02:34:56,840 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 189 transitions. Word has length 20 [2019-11-26 02:34:56,841 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-26 02:34:56,841 INFO L462 AbstractCegarLoop]: Abstraction has 158 states and 189 transitions. [2019-11-26 02:34:56,841 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-11-26 02:34:56,841 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 189 transitions. [2019-11-26 02:34:56,842 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-11-26 02:34:56,842 INFO L402 BasicCegarLoop]: Found error trace [2019-11-26 02:34:56,842 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-26 02:34:56,843 INFO L410 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr32ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr34ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr30ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr36ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr33ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr31ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr28ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr29ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr35ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr37ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-11-26 02:34:56,843 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-26 02:34:56,843 INFO L82 PathProgramCache]: Analyzing trace with hash -2133073179, now seen corresponding path program 1 times [2019-11-26 02:34:56,843 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-11-26 02:34:56,844 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [921882796] [2019-11-26 02:34:56,844 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-26 02:34:56,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-26 02:34:56,914 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-26 02:34:56,914 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [921882796] [2019-11-26 02:34:56,915 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-26 02:34:56,915 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-11-26 02:34:56,915 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [394014285] [2019-11-26 02:34:56,915 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-26 02:34:56,915 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-11-26 02:34:56,915 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-26 02:34:56,916 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-11-26 02:34:56,916 INFO L87 Difference]: Start difference. First operand 158 states and 189 transitions. Second operand 6 states. [2019-11-26 02:34:57,060 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-26 02:34:57,060 INFO L93 Difference]: Finished difference Result 312 states and 353 transitions. [2019-11-26 02:34:57,060 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-11-26 02:34:57,060 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 20 [2019-11-26 02:34:57,061 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-26 02:34:57,062 INFO L225 Difference]: With dead ends: 312 [2019-11-26 02:34:57,062 INFO L226 Difference]: Without dead ends: 288 [2019-11-26 02:34:57,064 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2019-11-26 02:34:57,065 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 288 states. [2019-11-26 02:34:57,074 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 288 to 158. [2019-11-26 02:34:57,074 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2019-11-26 02:34:57,075 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 188 transitions. [2019-11-26 02:34:57,075 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 188 transitions. Word has length 20 [2019-11-26 02:34:57,075 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-26 02:34:57,075 INFO L462 AbstractCegarLoop]: Abstraction has 158 states and 188 transitions. [2019-11-26 02:34:57,076 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-26 02:34:57,076 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 188 transitions. [2019-11-26 02:34:57,076 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-11-26 02:34:57,076 INFO L402 BasicCegarLoop]: Found error trace [2019-11-26 02:34:57,076 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-26 02:34:57,077 INFO L410 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr32ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr34ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr30ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr36ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr33ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr31ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr28ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr29ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr35ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr37ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-11-26 02:34:57,077 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-26 02:34:57,077 INFO L82 PathProgramCache]: Analyzing trace with hash -2090782947, now seen corresponding path program 1 times [2019-11-26 02:34:57,077 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-11-26 02:34:57,078 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1830219914] [2019-11-26 02:34:57,078 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-26 02:34:57,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-26 02:34:57,351 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-26 02:34:57,351 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1830219914] [2019-11-26 02:34:57,351 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-26 02:34:57,352 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-11-26 02:34:57,352 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1261060843] [2019-11-26 02:34:57,352 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-11-26 02:34:57,352 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-11-26 02:34:57,352 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-11-26 02:34:57,352 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2019-11-26 02:34:57,353 INFO L87 Difference]: Start difference. First operand 158 states and 188 transitions. Second operand 11 states. [2019-11-26 02:34:57,952 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-26 02:34:57,952 INFO L93 Difference]: Finished difference Result 170 states and 196 transitions. [2019-11-26 02:34:57,953 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-11-26 02:34:57,953 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 20 [2019-11-26 02:34:57,953 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-26 02:34:57,954 INFO L225 Difference]: With dead ends: 170 [2019-11-26 02:34:57,954 INFO L226 Difference]: Without dead ends: 163 [2019-11-26 02:34:57,955 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 49 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=90, Invalid=330, Unknown=0, NotChecked=0, Total=420 [2019-11-26 02:34:57,955 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2019-11-26 02:34:57,966 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 153. [2019-11-26 02:34:57,967 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 153 states. [2019-11-26 02:34:57,967 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153 states to 153 states and 178 transitions. [2019-11-26 02:34:57,968 INFO L78 Accepts]: Start accepts. Automaton has 153 states and 178 transitions. Word has length 20 [2019-11-26 02:34:57,968 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-26 02:34:57,968 INFO L462 AbstractCegarLoop]: Abstraction has 153 states and 178 transitions. [2019-11-26 02:34:57,968 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-11-26 02:34:57,968 INFO L276 IsEmpty]: Start isEmpty. Operand 153 states and 178 transitions. [2019-11-26 02:34:57,969 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2019-11-26 02:34:57,969 INFO L402 BasicCegarLoop]: Found error trace [2019-11-26 02:34:57,969 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-26 02:34:57,970 INFO L410 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr32ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr34ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr30ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr36ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr33ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr31ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr28ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr29ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr35ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr37ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-11-26 02:34:57,970 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-26 02:34:57,970 INFO L82 PathProgramCache]: Analyzing trace with hash -1810867940, now seen corresponding path program 1 times [2019-11-26 02:34:57,971 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-11-26 02:34:57,971 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1648462461] [2019-11-26 02:34:57,971 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-26 02:34:57,989 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-26 02:34:58,236 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-26 02:34:58,237 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1648462461] [2019-11-26 02:34:58,237 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-26 02:34:58,237 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-11-26 02:34:58,237 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [134363601] [2019-11-26 02:34:58,237 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-11-26 02:34:58,237 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-11-26 02:34:58,238 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-11-26 02:34:58,238 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2019-11-26 02:34:58,238 INFO L87 Difference]: Start difference. First operand 153 states and 178 transitions. Second operand 10 states. [2019-11-26 02:34:59,298 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-26 02:34:59,299 INFO L93 Difference]: Finished difference Result 321 states and 352 transitions. [2019-11-26 02:34:59,299 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-11-26 02:34:59,299 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 21 [2019-11-26 02:34:59,299 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-26 02:34:59,300 INFO L225 Difference]: With dead ends: 321 [2019-11-26 02:34:59,300 INFO L226 Difference]: Without dead ends: 318 [2019-11-26 02:34:59,301 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 128 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=163, Invalid=487, Unknown=0, NotChecked=0, Total=650 [2019-11-26 02:34:59,301 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 318 states. [2019-11-26 02:34:59,311 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 318 to 161. [2019-11-26 02:34:59,312 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2019-11-26 02:34:59,312 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 189 transitions. [2019-11-26 02:34:59,312 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 189 transitions. Word has length 21 [2019-11-26 02:34:59,312 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-26 02:34:59,312 INFO L462 AbstractCegarLoop]: Abstraction has 161 states and 189 transitions. [2019-11-26 02:34:59,313 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-11-26 02:34:59,313 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 189 transitions. [2019-11-26 02:34:59,313 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-11-26 02:34:59,313 INFO L402 BasicCegarLoop]: Found error trace [2019-11-26 02:34:59,313 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-26 02:34:59,314 INFO L410 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr32ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr34ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr30ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr36ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr33ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr31ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr28ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr29ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr35ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr37ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-11-26 02:34:59,314 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-26 02:34:59,314 INFO L82 PathProgramCache]: Analyzing trace with hash 1766926287, now seen corresponding path program 1 times [2019-11-26 02:34:59,315 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-11-26 02:34:59,315 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [827755030] [2019-11-26 02:34:59,315 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-26 02:34:59,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-11-26 02:34:59,394 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-11-26 02:34:59,395 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [827755030] [2019-11-26 02:34:59,395 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-11-26 02:34:59,395 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-11-26 02:34:59,395 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2010112930] [2019-11-26 02:34:59,395 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-11-26 02:34:59,395 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-11-26 02:34:59,396 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-11-26 02:34:59,396 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-11-26 02:34:59,396 INFO L87 Difference]: Start difference. First operand 161 states and 189 transitions. Second operand 6 states. [2019-11-26 02:34:59,501 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-11-26 02:34:59,501 INFO L93 Difference]: Finished difference Result 206 states and 238 transitions. [2019-11-26 02:34:59,502 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-11-26 02:34:59,502 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2019-11-26 02:34:59,502 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-11-26 02:34:59,504 INFO L225 Difference]: With dead ends: 206 [2019-11-26 02:34:59,504 INFO L226 Difference]: Without dead ends: 205 [2019-11-26 02:34:59,504 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2019-11-26 02:34:59,505 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 205 states. [2019-11-26 02:34:59,516 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 205 to 181. [2019-11-26 02:34:59,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 181 states. [2019-11-26 02:34:59,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181 states to 181 states and 219 transitions. [2019-11-26 02:34:59,517 INFO L78 Accepts]: Start accepts. Automaton has 181 states and 219 transitions. Word has length 22 [2019-11-26 02:34:59,517 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-11-26 02:34:59,518 INFO L462 AbstractCegarLoop]: Abstraction has 181 states and 219 transitions. [2019-11-26 02:34:59,518 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-11-26 02:34:59,518 INFO L276 IsEmpty]: Start isEmpty. Operand 181 states and 219 transitions. [2019-11-26 02:34:59,518 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-11-26 02:34:59,518 INFO L402 BasicCegarLoop]: Found error trace [2019-11-26 02:34:59,519 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-11-26 02:34:59,519 INFO L410 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr18ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr25ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr11ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr32ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr34ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr4ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr27ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr30ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr9ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr21ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr36ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr6ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr13ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr15ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr23ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr2ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr17ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr0ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr19ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr3ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr26ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr33ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr24ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr5ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr12ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr31ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr28ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr8ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr10ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr7ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr29ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr22ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr35ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr14ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr16ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr20ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr1ASSERT_VIOLATIONINTEGER_OVERFLOW, ULTIMATE.startErr37ASSERT_VIOLATIONINTEGER_OVERFLOW]=== [2019-11-26 02:34:59,519 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-11-26 02:34:59,519 INFO L82 PathProgramCache]: Analyzing trace with hash 1763374209, now seen corresponding path program 1 times [2019-11-26 02:34:59,519 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-11-26 02:34:59,520 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [552902463] [2019-11-26 02:34:59,520 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-11-26 02:34:59,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-26 02:34:59,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-11-26 02:34:59,558 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-11-26 02:34:59,558 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-11-26 02:34:59,599 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 26.11 02:34:59 BoogieIcfgContainer [2019-11-26 02:34:59,599 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-11-26 02:34:59,600 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-11-26 02:34:59,600 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-11-26 02:34:59,600 INFO L275 PluginConnector]: Witness Printer initialized [2019-11-26 02:34:59,601 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 26.11 02:34:45" (3/4) ... [2019-11-26 02:34:59,604 INFO L140 WitnessPrinter]: No result that supports witness generation found [2019-11-26 02:34:59,604 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-11-26 02:34:59,605 INFO L168 Benchmark]: Toolchain (without parser) took 15193.57 ms. Allocated memory was 1.0 GB in the beginning and 1.3 GB in the end (delta: 283.1 MB). Free memory was 944.7 MB in the beginning and 1.1 GB in the end (delta: -125.8 MB). Peak memory consumption was 157.3 MB. Max. memory is 11.5 GB. [2019-11-26 02:34:59,608 INFO L168 Benchmark]: CDTParser took 0.25 ms. Allocated memory is still 1.0 GB. Free memory is still 962.2 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-26 02:34:59,609 INFO L168 Benchmark]: CACSL2BoogieTranslator took 353.22 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 107.5 MB). Free memory was 944.7 MB in the beginning and 1.1 GB in the end (delta: -151.8 MB). Peak memory consumption was 23.1 MB. Max. memory is 11.5 GB. [2019-11-26 02:34:59,609 INFO L168 Benchmark]: Boogie Procedure Inliner took 59.14 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 7.0 MB). Peak memory consumption was 7.0 MB. Max. memory is 11.5 GB. [2019-11-26 02:34:59,610 INFO L168 Benchmark]: Boogie Preprocessor took 50.37 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-26 02:34:59,610 INFO L168 Benchmark]: RCFGBuilder took 784.50 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 57.1 MB). Peak memory consumption was 57.1 MB. Max. memory is 11.5 GB. [2019-11-26 02:34:59,610 INFO L168 Benchmark]: TraceAbstraction took 13938.59 ms. Allocated memory was 1.1 GB in the beginning and 1.3 GB in the end (delta: 175.6 MB). Free memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: -38.1 MB). Peak memory consumption was 137.5 MB. Max. memory is 11.5 GB. [2019-11-26 02:34:59,611 INFO L168 Benchmark]: Witness Printer took 4.02 ms. Allocated memory is still 1.3 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-11-26 02:34:59,613 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.25 ms. Allocated memory is still 1.0 GB. Free memory is still 962.2 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 353.22 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 107.5 MB). Free memory was 944.7 MB in the beginning and 1.1 GB in the end (delta: -151.8 MB). Peak memory consumption was 23.1 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 59.14 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 7.0 MB). Peak memory consumption was 7.0 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 50.37 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 784.50 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 57.1 MB). Peak memory consumption was 57.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 13938.59 ms. Allocated memory was 1.1 GB in the beginning and 1.3 GB in the end (delta: 175.6 MB). Free memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: -38.1 MB). Peak memory consumption was 137.5 MB. Max. memory is 11.5 GB. * Witness Printer took 4.02 ms. Allocated memory is still 1.3 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 103]: Unable to prove that integer overflow can never occur Unable to prove that integer overflow can never occur Reason: overapproximation of bitwiseOr at line 101, overapproximation of bitwiseAnd at line 102. Possible FailurePath: [L217] unsigned int a ; [L218] unsigned int ma = __VERIFIER_nondet_uint(); [L219] signed char ea = __VERIFIER_nondet_char(); [L220] unsigned int b ; [L221] unsigned int mb = __VERIFIER_nondet_uint(); [L222] signed char eb = __VERIFIER_nondet_char(); [L223] unsigned int r_add1 ; [L224] unsigned int r_add2 ; [L225] unsigned int zero ; [L226] int tmp ; [L227] int tmp___0 ; [L228] int __retres14 ; [L16] unsigned int res ; [L17] unsigned int __retres4 ; [L20] COND TRUE ! m [L21] __retres4 = 0U [L71] return (__retres4); [L232] zero = base2flt(0, 0) [L16] unsigned int res ; [L17] unsigned int __retres4 ; [L20] COND FALSE !(! m) [L26] COND FALSE !(m < 1U << 24U) [L48] COND TRUE 1 [L50] COND FALSE !(m >= 1U << 25U) [L67] m = m & ~ (1U << 24U) [L68] EXPR e + 128 [L68] res = m | ((unsigned int )(e + 128) << 24U) [L69] __retres4 = res [L71] return (__retres4); [L233] a = base2flt(ma, ea) [L16] unsigned int res ; [L17] unsigned int __retres4 ; [L20] COND FALSE !(! m) [L26] COND FALSE !(m < 1U << 24U) [L48] COND TRUE 1 [L50] COND TRUE m >= 1U << 25U [L55] COND TRUE e >= 127 [L56] __retres4 = 4294967295U [L71] return (__retres4); [L234] b = base2flt(mb, eb) [L75] unsigned int res ; [L76] unsigned int ma ; [L77] unsigned int mb ; [L78] unsigned int delta ; [L79] int ea ; [L80] int eb ; [L81] unsigned int tmp ; [L82] unsigned int __retres10 ; [L85] COND TRUE a < b [L86] tmp = a [L87] a = b [L88] b = tmp [L92] COND FALSE !(! b) [L99] ma = a & ((1U << 24U) - 1U) [L100] EXPR (int )(a >> 24U) - 128 [L100] ea = (int )(a >> 24U) - 128 [L101] ma = ma | (1U << 24U) [L102] mb = b & ((1U << 24U) - 1U) [L103] (int )(b >> 24U) - 128 - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 120 locations, 38 error locations. Result: UNSAFE, OverallTime: 13.8s, OverallIterations: 28, TraceHistogramMax: 2, AutomataDifference: 9.0s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 3196 SDtfs, 4090 SDslu, 9150 SDs, 0 SdLazy, 2889 SolverSat, 303 SolverUnsat, 1 SolverUnknown, 0 SolverNotchecked, 6.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 245 GetRequests, 27 SyntacticMatches, 4 SemanticMatches, 214 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 326 ImplicationChecksByTransitivity, 4.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=181occurred in iteration=27, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.3s AutomataMinimizationTime, 27 MinimizatonAttempts, 1670 StatesRemovedByMinimization, 26 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 3.6s InterpolantComputationTime, 436 NumberOfCodeBlocks, 436 NumberOfCodeBlocksAsserted, 28 NumberOfCheckSat, 387 ConstructedInterpolants, 0 QuantifiedInterpolants, 40370 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 27 InterpolantComputations, 27 PerfectInterpolantSequences, 2/2 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Received shutdown request...