./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix003_power.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_1c83afb5-1802-494f-b286-26cb7debcf5c/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_1c83afb5-1802-494f-b286-26cb7debcf5c/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_1c83afb5-1802-494f-b286-26cb7debcf5c/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_1c83afb5-1802-494f-b286-26cb7debcf5c/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix003_power.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_1c83afb5-1802-494f-b286-26cb7debcf5c/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_1c83afb5-1802-494f-b286-26cb7debcf5c/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 9e1cdb3f919a24d539ca06bd7ad88d50ca947cda ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 11:00:43,651 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 11:00:43,652 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 11:00:43,659 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 11:00:43,659 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 11:00:43,660 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 11:00:43,661 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 11:00:43,662 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 11:00:43,664 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 11:00:43,664 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 11:00:43,665 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 11:00:43,666 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 11:00:43,666 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 11:00:43,667 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 11:00:43,667 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 11:00:43,668 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 11:00:43,669 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 11:00:43,669 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 11:00:43,671 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 11:00:43,672 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 11:00:43,673 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 11:00:43,674 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 11:00:43,675 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 11:00:43,675 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 11:00:43,677 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 11:00:43,677 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 11:00:43,677 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 11:00:43,678 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 11:00:43,678 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 11:00:43,679 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 11:00:43,679 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 11:00:43,679 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 11:00:43,680 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 11:00:43,680 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 11:00:43,681 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 11:00:43,681 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 11:00:43,681 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 11:00:43,681 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 11:00:43,681 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 11:00:43,682 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 11:00:43,682 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 11:00:43,683 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_1c83afb5-1802-494f-b286-26cb7debcf5c/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 11:00:43,693 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 11:00:43,693 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 11:00:43,694 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 11:00:43,694 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 11:00:43,694 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 11:00:43,694 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 11:00:43,694 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 11:00:43,695 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 11:00:43,695 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 11:00:43,695 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 11:00:43,695 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 11:00:43,695 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 11:00:43,695 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 11:00:43,695 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 11:00:43,696 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 11:00:43,696 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 11:00:43,696 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 11:00:43,696 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 11:00:43,696 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 11:00:43,697 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 11:00:43,697 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 11:00:43,697 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 11:00:43,697 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 11:00:43,697 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 11:00:43,697 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 11:00:43,697 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 11:00:43,698 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 11:00:43,698 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 11:00:43,698 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 11:00:43,698 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 11:00:43,698 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 11:00:43,698 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 11:00:43,698 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 11:00:43,698 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 11:00:43,699 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 11:00:43,699 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 11:00:43,699 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 11:00:43,699 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 11:00:43,699 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 11:00:43,699 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 11:00:43,699 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_1c83afb5-1802-494f-b286-26cb7debcf5c/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 9e1cdb3f919a24d539ca06bd7ad88d50ca947cda [2019-12-07 11:00:43,797 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 11:00:43,807 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 11:00:43,809 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 11:00:43,810 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 11:00:43,810 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 11:00:43,811 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_1c83afb5-1802-494f-b286-26cb7debcf5c/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/mix003_power.oepc.i [2019-12-07 11:00:43,851 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_1c83afb5-1802-494f-b286-26cb7debcf5c/bin/utaipan/data/b059493d7/d27e23d6abcd4fba8dbeceecc47a74c8/FLAGed5eeb42d [2019-12-07 11:00:44,301 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 11:00:44,301 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_1c83afb5-1802-494f-b286-26cb7debcf5c/sv-benchmarks/c/pthread-wmm/mix003_power.oepc.i [2019-12-07 11:00:44,311 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_1c83afb5-1802-494f-b286-26cb7debcf5c/bin/utaipan/data/b059493d7/d27e23d6abcd4fba8dbeceecc47a74c8/FLAGed5eeb42d [2019-12-07 11:00:44,321 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_1c83afb5-1802-494f-b286-26cb7debcf5c/bin/utaipan/data/b059493d7/d27e23d6abcd4fba8dbeceecc47a74c8 [2019-12-07 11:00:44,322 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 11:00:44,323 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 11:00:44,324 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 11:00:44,324 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 11:00:44,327 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 11:00:44,327 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 11:00:44" (1/1) ... [2019-12-07 11:00:44,329 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@1c8002ab and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:00:44, skipping insertion in model container [2019-12-07 11:00:44,329 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 11:00:44" (1/1) ... [2019-12-07 11:00:44,334 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 11:00:44,363 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 11:00:44,608 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 11:00:44,616 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 11:00:44,660 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 11:00:44,705 INFO L208 MainTranslator]: Completed translation [2019-12-07 11:00:44,705 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:00:44 WrapperNode [2019-12-07 11:00:44,705 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 11:00:44,706 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 11:00:44,706 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 11:00:44,706 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 11:00:44,712 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:00:44" (1/1) ... [2019-12-07 11:00:44,725 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:00:44" (1/1) ... [2019-12-07 11:00:44,744 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 11:00:44,744 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 11:00:44,744 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 11:00:44,744 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 11:00:44,750 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:00:44" (1/1) ... [2019-12-07 11:00:44,751 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:00:44" (1/1) ... [2019-12-07 11:00:44,754 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:00:44" (1/1) ... [2019-12-07 11:00:44,754 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:00:44" (1/1) ... [2019-12-07 11:00:44,761 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:00:44" (1/1) ... [2019-12-07 11:00:44,764 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:00:44" (1/1) ... [2019-12-07 11:00:44,766 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:00:44" (1/1) ... [2019-12-07 11:00:44,769 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 11:00:44,770 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 11:00:44,770 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 11:00:44,770 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 11:00:44,770 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:00:44" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_1c83afb5-1802-494f-b286-26cb7debcf5c/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 11:00:44,810 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 11:00:44,810 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 11:00:44,811 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 11:00:44,811 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 11:00:44,811 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 11:00:44,811 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 11:00:44,811 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 11:00:44,811 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 11:00:44,811 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 11:00:44,811 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 11:00:44,811 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 11:00:44,811 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 11:00:44,811 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 11:00:44,812 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 11:00:45,180 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 11:00:45,181 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 11:00:45,181 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:00:45 BoogieIcfgContainer [2019-12-07 11:00:45,182 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 11:00:45,182 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 11:00:45,182 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 11:00:45,184 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 11:00:45,184 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 11:00:44" (1/3) ... [2019-12-07 11:00:45,185 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3f332e9c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 11:00:45, skipping insertion in model container [2019-12-07 11:00:45,185 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 11:00:44" (2/3) ... [2019-12-07 11:00:45,185 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3f332e9c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 11:00:45, skipping insertion in model container [2019-12-07 11:00:45,185 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:00:45" (3/3) ... [2019-12-07 11:00:45,186 INFO L109 eAbstractionObserver]: Analyzing ICFG mix003_power.oepc.i [2019-12-07 11:00:45,193 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 11:00:45,193 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 11:00:45,198 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 11:00:45,198 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 11:00:45,223 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,223 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,223 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,223 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,224 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,224 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,224 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,224 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,224 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,224 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,225 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,225 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,225 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,225 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,225 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,225 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,225 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,225 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,226 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,226 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,226 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,226 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,226 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,226 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,226 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,226 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,227 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,227 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,227 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,227 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,227 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,227 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,227 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,227 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,228 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,228 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,228 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,228 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,228 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,228 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,228 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,229 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,229 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,229 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,229 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,229 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,229 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,229 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,229 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,229 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,230 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,230 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,230 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,230 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,230 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,230 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,230 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,230 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,230 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,231 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,231 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,231 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,231 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,231 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,232 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,232 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,232 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,232 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,232 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,232 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,232 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,232 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,232 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,233 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,233 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,233 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,233 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,233 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,233 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,233 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,233 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,233 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,234 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,234 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,234 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,234 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,234 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,234 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,234 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,234 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,234 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,235 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,235 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,235 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,235 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,235 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,235 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,235 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,235 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,235 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,236 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,236 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,236 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,236 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,236 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,236 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,236 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,236 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,236 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,236 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,237 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,237 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,237 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,237 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,237 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,237 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,237 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,237 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,237 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,237 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,238 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,238 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,238 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,238 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,238 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,238 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,238 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,238 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,238 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,238 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,239 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,239 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,239 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,239 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,239 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,239 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,239 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,239 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,239 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,240 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,240 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,240 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,240 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,240 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,240 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,240 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,240 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,240 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,240 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,241 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,241 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,241 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,241 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,241 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,241 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,241 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,241 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,241 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,241 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,242 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,242 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,242 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,242 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,242 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,242 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,242 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,242 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,242 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,242 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,243 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,243 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,243 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,243 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,243 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,243 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,243 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,243 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,243 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,244 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,244 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,244 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,244 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 11:00:45,256 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 11:00:45,269 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 11:00:45,269 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 11:00:45,269 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 11:00:45,269 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 11:00:45,269 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 11:00:45,269 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 11:00:45,269 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 11:00:45,269 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 11:00:45,280 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 178 places, 215 transitions [2019-12-07 11:00:45,281 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 215 transitions [2019-12-07 11:00:45,336 INFO L134 PetriNetUnfolder]: 47/212 cut-off events. [2019-12-07 11:00:45,336 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 11:00:45,346 INFO L76 FinitePrefix]: Finished finitePrefix Result has 222 conditions, 212 events. 47/212 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/172 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 11:00:45,361 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 215 transitions [2019-12-07 11:00:45,395 INFO L134 PetriNetUnfolder]: 47/212 cut-off events. [2019-12-07 11:00:45,395 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 11:00:45,400 INFO L76 FinitePrefix]: Finished finitePrefix Result has 222 conditions, 212 events. 47/212 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/172 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 11:00:45,415 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 11:00:45,416 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 11:00:48,297 WARN L192 SmtUtils]: Spent 196.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 93 [2019-12-07 11:00:48,615 INFO L206 etLargeBlockEncoding]: Checked pairs total: 132619 [2019-12-07 11:00:48,615 INFO L214 etLargeBlockEncoding]: Total number of compositions: 123 [2019-12-07 11:00:48,618 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 95 places, 107 transitions [2019-12-07 11:01:05,693 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 120347 states. [2019-12-07 11:01:05,695 INFO L276 IsEmpty]: Start isEmpty. Operand 120347 states. [2019-12-07 11:01:05,698 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 11:01:05,698 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:01:05,699 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 11:01:05,699 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:01:05,703 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:01:05,703 INFO L82 PathProgramCache]: Analyzing trace with hash 919842, now seen corresponding path program 1 times [2019-12-07 11:01:05,709 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:01:05,709 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1719242623] [2019-12-07 11:01:05,709 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:01:05,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:01:05,845 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:01:05,845 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1719242623] [2019-12-07 11:01:05,846 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:01:05,846 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 11:01:05,847 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [200563454] [2019-12-07 11:01:05,850 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:01:05,850 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:01:05,859 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:01:05,859 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:01:05,860 INFO L87 Difference]: Start difference. First operand 120347 states. Second operand 3 states. [2019-12-07 11:01:06,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:01:06,758 INFO L93 Difference]: Finished difference Result 119613 states and 515253 transitions. [2019-12-07 11:01:06,759 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:01:06,760 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 11:01:06,760 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:01:07,280 INFO L225 Difference]: With dead ends: 119613 [2019-12-07 11:01:07,280 INFO L226 Difference]: Without dead ends: 105755 [2019-12-07 11:01:07,281 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:01:11,540 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105755 states. [2019-12-07 11:01:14,298 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105755 to 105755. [2019-12-07 11:01:14,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105755 states. [2019-12-07 11:01:14,630 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105755 states to 105755 states and 454361 transitions. [2019-12-07 11:01:14,631 INFO L78 Accepts]: Start accepts. Automaton has 105755 states and 454361 transitions. Word has length 3 [2019-12-07 11:01:14,631 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:01:14,631 INFO L462 AbstractCegarLoop]: Abstraction has 105755 states and 454361 transitions. [2019-12-07 11:01:14,631 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:01:14,631 INFO L276 IsEmpty]: Start isEmpty. Operand 105755 states and 454361 transitions. [2019-12-07 11:01:14,634 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 11:01:14,635 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:01:14,635 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:01:14,635 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:01:14,635 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:01:14,635 INFO L82 PathProgramCache]: Analyzing trace with hash 474732739, now seen corresponding path program 1 times [2019-12-07 11:01:14,635 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:01:14,636 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1241526100] [2019-12-07 11:01:14,636 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:01:14,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:01:14,699 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:01:14,699 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1241526100] [2019-12-07 11:01:14,700 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:01:14,700 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:01:14,700 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [795640538] [2019-12-07 11:01:14,701 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:01:14,701 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:01:14,701 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:01:14,701 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:01:14,701 INFO L87 Difference]: Start difference. First operand 105755 states and 454361 transitions. Second operand 4 states. [2019-12-07 11:01:15,868 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:01:15,868 INFO L93 Difference]: Finished difference Result 168845 states and 694815 transitions. [2019-12-07 11:01:15,869 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:01:15,869 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 11:01:15,869 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:01:16,293 INFO L225 Difference]: With dead ends: 168845 [2019-12-07 11:01:16,294 INFO L226 Difference]: Without dead ends: 168747 [2019-12-07 11:01:16,294 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:01:21,519 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168747 states. [2019-12-07 11:01:25,358 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168747 to 153153. [2019-12-07 11:01:25,358 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 153153 states. [2019-12-07 11:01:25,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153153 states to 153153 states and 639357 transitions. [2019-12-07 11:01:25,821 INFO L78 Accepts]: Start accepts. Automaton has 153153 states and 639357 transitions. Word has length 11 [2019-12-07 11:01:25,821 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:01:25,821 INFO L462 AbstractCegarLoop]: Abstraction has 153153 states and 639357 transitions. [2019-12-07 11:01:25,821 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:01:25,822 INFO L276 IsEmpty]: Start isEmpty. Operand 153153 states and 639357 transitions. [2019-12-07 11:01:25,825 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 11:01:25,825 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:01:25,825 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:01:25,825 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:01:25,825 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:01:25,825 INFO L82 PathProgramCache]: Analyzing trace with hash -512415605, now seen corresponding path program 1 times [2019-12-07 11:01:25,826 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:01:25,826 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1637922211] [2019-12-07 11:01:25,826 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:01:25,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:01:25,873 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:01:25,873 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1637922211] [2019-12-07 11:01:25,873 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:01:25,873 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:01:25,873 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [486295455] [2019-12-07 11:01:25,874 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:01:25,874 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:01:25,874 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:01:25,874 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:01:25,874 INFO L87 Difference]: Start difference. First operand 153153 states and 639357 transitions. Second operand 4 states. [2019-12-07 11:01:27,330 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:01:27,330 INFO L93 Difference]: Finished difference Result 220024 states and 896381 transitions. [2019-12-07 11:01:27,331 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:01:27,331 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 11:01:27,331 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:01:27,920 INFO L225 Difference]: With dead ends: 220024 [2019-12-07 11:01:27,920 INFO L226 Difference]: Without dead ends: 219912 [2019-12-07 11:01:27,920 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:01:33,983 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219912 states. [2019-12-07 11:01:38,598 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219912 to 183120. [2019-12-07 11:01:38,598 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183120 states. [2019-12-07 11:01:39,179 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183120 states to 183120 states and 760223 transitions. [2019-12-07 11:01:39,179 INFO L78 Accepts]: Start accepts. Automaton has 183120 states and 760223 transitions. Word has length 13 [2019-12-07 11:01:39,180 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:01:39,180 INFO L462 AbstractCegarLoop]: Abstraction has 183120 states and 760223 transitions. [2019-12-07 11:01:39,180 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:01:39,180 INFO L276 IsEmpty]: Start isEmpty. Operand 183120 states and 760223 transitions. [2019-12-07 11:01:39,186 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 11:01:39,187 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:01:39,187 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:01:39,187 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:01:39,187 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:01:39,187 INFO L82 PathProgramCache]: Analyzing trace with hash -1719969010, now seen corresponding path program 1 times [2019-12-07 11:01:39,187 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:01:39,187 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [534419846] [2019-12-07 11:01:39,187 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:01:39,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:01:39,228 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:01:39,229 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [534419846] [2019-12-07 11:01:39,229 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:01:39,229 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:01:39,229 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [228556447] [2019-12-07 11:01:39,229 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:01:39,229 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:01:39,230 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:01:39,230 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:01:39,230 INFO L87 Difference]: Start difference. First operand 183120 states and 760223 transitions. Second operand 4 states. [2019-12-07 11:01:40,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:01:40,425 INFO L93 Difference]: Finished difference Result 225249 states and 927434 transitions. [2019-12-07 11:01:40,425 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:01:40,425 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 11:01:40,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:01:41,502 INFO L225 Difference]: With dead ends: 225249 [2019-12-07 11:01:41,502 INFO L226 Difference]: Without dead ends: 225249 [2019-12-07 11:01:41,503 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:01:47,435 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 225249 states. [2019-12-07 11:01:50,357 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 225249 to 195075. [2019-12-07 11:01:50,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 195075 states. [2019-12-07 11:01:51,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195075 states to 195075 states and 809283 transitions. [2019-12-07 11:01:51,328 INFO L78 Accepts]: Start accepts. Automaton has 195075 states and 809283 transitions. Word has length 16 [2019-12-07 11:01:51,329 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:01:51,329 INFO L462 AbstractCegarLoop]: Abstraction has 195075 states and 809283 transitions. [2019-12-07 11:01:51,329 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:01:51,329 INFO L276 IsEmpty]: Start isEmpty. Operand 195075 states and 809283 transitions. [2019-12-07 11:01:51,334 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 11:01:51,335 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:01:51,335 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:01:51,335 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:01:51,335 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:01:51,335 INFO L82 PathProgramCache]: Analyzing trace with hash -1720071868, now seen corresponding path program 1 times [2019-12-07 11:01:51,335 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:01:51,335 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [985945403] [2019-12-07 11:01:51,335 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:01:51,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:01:51,366 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:01:51,366 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [985945403] [2019-12-07 11:01:51,367 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:01:51,367 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:01:51,367 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [368884860] [2019-12-07 11:01:51,367 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:01:51,367 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:01:51,367 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:01:51,367 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:01:51,368 INFO L87 Difference]: Start difference. First operand 195075 states and 809283 transitions. Second operand 3 states. [2019-12-07 11:01:52,588 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:01:52,588 INFO L93 Difference]: Finished difference Result 282572 states and 1168256 transitions. [2019-12-07 11:01:52,588 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:01:52,588 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2019-12-07 11:01:52,589 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:01:53,340 INFO L225 Difference]: With dead ends: 282572 [2019-12-07 11:01:53,340 INFO L226 Difference]: Without dead ends: 282572 [2019-12-07 11:01:53,340 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:02:02,451 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 282572 states. [2019-12-07 11:02:05,783 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 282572 to 224589. [2019-12-07 11:02:05,783 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 224589 states. [2019-12-07 11:02:06,491 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 224589 states to 224589 states and 936012 transitions. [2019-12-07 11:02:06,491 INFO L78 Accepts]: Start accepts. Automaton has 224589 states and 936012 transitions. Word has length 16 [2019-12-07 11:02:06,491 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:02:06,491 INFO L462 AbstractCegarLoop]: Abstraction has 224589 states and 936012 transitions. [2019-12-07 11:02:06,491 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:02:06,491 INFO L276 IsEmpty]: Start isEmpty. Operand 224589 states and 936012 transitions. [2019-12-07 11:02:06,497 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 11:02:06,497 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:02:06,497 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:02:06,497 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:02:06,497 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:02:06,497 INFO L82 PathProgramCache]: Analyzing trace with hash 759335912, now seen corresponding path program 1 times [2019-12-07 11:02:06,497 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:02:06,498 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [472209770] [2019-12-07 11:02:06,498 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:02:06,506 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:02:06,527 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:02:06,528 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [472209770] [2019-12-07 11:02:06,528 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:02:06,528 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:02:06,528 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [710712156] [2019-12-07 11:02:06,528 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:02:06,528 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:02:06,528 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:02:06,529 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:02:06,529 INFO L87 Difference]: Start difference. First operand 224589 states and 936012 transitions. Second operand 4 states. [2019-12-07 11:02:08,193 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:02:08,194 INFO L93 Difference]: Finished difference Result 265350 states and 1097413 transitions. [2019-12-07 11:02:08,194 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:02:08,194 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 11:02:08,194 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:02:08,893 INFO L225 Difference]: With dead ends: 265350 [2019-12-07 11:02:08,893 INFO L226 Difference]: Without dead ends: 265350 [2019-12-07 11:02:08,894 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:02:15,871 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 265350 states. [2019-12-07 11:02:18,988 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 265350 to 227267. [2019-12-07 11:02:18,988 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 227267 states. [2019-12-07 11:02:20,018 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 227267 states to 227267 states and 947978 transitions. [2019-12-07 11:02:20,018 INFO L78 Accepts]: Start accepts. Automaton has 227267 states and 947978 transitions. Word has length 16 [2019-12-07 11:02:20,018 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:02:20,018 INFO L462 AbstractCegarLoop]: Abstraction has 227267 states and 947978 transitions. [2019-12-07 11:02:20,018 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:02:20,018 INFO L276 IsEmpty]: Start isEmpty. Operand 227267 states and 947978 transitions. [2019-12-07 11:02:20,028 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 11:02:20,028 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:02:20,028 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:02:20,028 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:02:20,028 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:02:20,029 INFO L82 PathProgramCache]: Analyzing trace with hash 980787520, now seen corresponding path program 1 times [2019-12-07 11:02:20,029 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:02:20,029 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [850235993] [2019-12-07 11:02:20,029 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:02:20,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:02:20,093 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:02:20,094 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [850235993] [2019-12-07 11:02:20,094 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:02:20,094 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 11:02:20,094 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1382174946] [2019-12-07 11:02:20,095 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:02:20,095 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:02:20,095 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:02:20,095 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:02:20,095 INFO L87 Difference]: Start difference. First operand 227267 states and 947978 transitions. Second operand 3 states. [2019-12-07 11:02:21,140 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:02:21,140 INFO L93 Difference]: Finished difference Result 230656 states and 958288 transitions. [2019-12-07 11:02:21,140 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:02:21,140 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 11:02:21,141 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:02:24,807 INFO L225 Difference]: With dead ends: 230656 [2019-12-07 11:02:24,807 INFO L226 Difference]: Without dead ends: 230656 [2019-12-07 11:02:24,807 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:02:30,603 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 230656 states. [2019-12-07 11:02:33,521 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 230656 to 227264. [2019-12-07 11:02:33,521 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 227264 states. [2019-12-07 11:02:34,514 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 227264 states to 227264 states and 947966 transitions. [2019-12-07 11:02:34,514 INFO L78 Accepts]: Start accepts. Automaton has 227264 states and 947966 transitions. Word has length 18 [2019-12-07 11:02:34,514 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:02:34,514 INFO L462 AbstractCegarLoop]: Abstraction has 227264 states and 947966 transitions. [2019-12-07 11:02:34,514 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:02:34,514 INFO L276 IsEmpty]: Start isEmpty. Operand 227264 states and 947966 transitions. [2019-12-07 11:02:34,527 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 11:02:34,527 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:02:34,527 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:02:34,527 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:02:34,527 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:02:34,527 INFO L82 PathProgramCache]: Analyzing trace with hash 699473802, now seen corresponding path program 1 times [2019-12-07 11:02:34,528 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:02:34,528 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1658105251] [2019-12-07 11:02:34,528 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:02:34,541 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:02:34,583 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:02:34,583 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1658105251] [2019-12-07 11:02:34,583 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:02:34,583 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:02:34,583 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [38834437] [2019-12-07 11:02:34,583 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:02:34,584 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:02:34,584 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:02:34,584 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:02:34,584 INFO L87 Difference]: Start difference. First operand 227264 states and 947966 transitions. Second operand 4 states. [2019-12-07 11:02:35,638 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:02:35,638 INFO L93 Difference]: Finished difference Result 230229 states and 956657 transitions. [2019-12-07 11:02:35,639 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 11:02:35,639 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 19 [2019-12-07 11:02:35,639 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:02:36,764 INFO L225 Difference]: With dead ends: 230229 [2019-12-07 11:02:36,764 INFO L226 Difference]: Without dead ends: 230229 [2019-12-07 11:02:36,765 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:02:42,810 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 230229 states. [2019-12-07 11:02:45,737 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 230229 to 226875. [2019-12-07 11:02:45,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 226875 states. [2019-12-07 11:02:46,710 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 226875 states to 226875 states and 946440 transitions. [2019-12-07 11:02:46,710 INFO L78 Accepts]: Start accepts. Automaton has 226875 states and 946440 transitions. Word has length 19 [2019-12-07 11:02:46,710 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:02:46,710 INFO L462 AbstractCegarLoop]: Abstraction has 226875 states and 946440 transitions. [2019-12-07 11:02:46,710 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:02:46,710 INFO L276 IsEmpty]: Start isEmpty. Operand 226875 states and 946440 transitions. [2019-12-07 11:02:46,723 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 11:02:46,723 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:02:46,723 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:02:46,723 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:02:46,723 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:02:46,724 INFO L82 PathProgramCache]: Analyzing trace with hash 72566767, now seen corresponding path program 1 times [2019-12-07 11:02:46,724 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:02:46,724 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [225930025] [2019-12-07 11:02:46,724 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:02:46,734 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:02:46,756 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:02:46,756 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [225930025] [2019-12-07 11:02:46,756 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:02:46,756 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:02:46,757 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [293192420] [2019-12-07 11:02:46,757 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:02:46,757 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:02:46,757 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:02:46,757 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:02:46,758 INFO L87 Difference]: Start difference. First operand 226875 states and 946440 transitions. Second operand 3 states. [2019-12-07 11:02:47,785 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:02:47,785 INFO L93 Difference]: Finished difference Result 226875 states and 937018 transitions. [2019-12-07 11:02:47,786 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:02:47,786 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 11:02:47,786 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:02:51,223 INFO L225 Difference]: With dead ends: 226875 [2019-12-07 11:02:51,224 INFO L226 Difference]: Without dead ends: 226875 [2019-12-07 11:02:51,224 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:02:56,893 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 226875 states. [2019-12-07 11:02:59,796 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 226875 to 223441. [2019-12-07 11:02:59,796 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 223441 states. [2019-12-07 11:03:00,776 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 223441 states to 223441 states and 924276 transitions. [2019-12-07 11:03:00,777 INFO L78 Accepts]: Start accepts. Automaton has 223441 states and 924276 transitions. Word has length 19 [2019-12-07 11:03:00,777 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:03:00,777 INFO L462 AbstractCegarLoop]: Abstraction has 223441 states and 924276 transitions. [2019-12-07 11:03:00,777 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:03:00,777 INFO L276 IsEmpty]: Start isEmpty. Operand 223441 states and 924276 transitions. [2019-12-07 11:03:00,789 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 11:03:00,789 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:03:00,789 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:03:00,789 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:03:00,789 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:03:00,789 INFO L82 PathProgramCache]: Analyzing trace with hash 793088017, now seen corresponding path program 1 times [2019-12-07 11:03:00,790 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:03:00,790 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [42097589] [2019-12-07 11:03:00,790 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:03:00,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:03:00,826 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:03:00,826 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [42097589] [2019-12-07 11:03:00,826 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:03:00,827 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:03:00,827 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1497052920] [2019-12-07 11:03:00,827 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:03:00,827 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:03:00,827 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:03:00,827 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:03:00,827 INFO L87 Difference]: Start difference. First operand 223441 states and 924276 transitions. Second operand 5 states. [2019-12-07 11:03:03,192 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:03:03,192 INFO L93 Difference]: Finished difference Result 326541 states and 1318597 transitions. [2019-12-07 11:03:03,193 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 11:03:03,193 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 11:03:03,193 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:03:03,996 INFO L225 Difference]: With dead ends: 326541 [2019-12-07 11:03:03,996 INFO L226 Difference]: Without dead ends: 326359 [2019-12-07 11:03:03,997 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:03:11,352 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 326359 states. [2019-12-07 11:03:15,137 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 326359 to 238430. [2019-12-07 11:03:15,137 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 238430 states. [2019-12-07 11:03:16,222 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 238430 states to 238430 states and 983122 transitions. [2019-12-07 11:03:16,222 INFO L78 Accepts]: Start accepts. Automaton has 238430 states and 983122 transitions. Word has length 19 [2019-12-07 11:03:16,222 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:03:16,223 INFO L462 AbstractCegarLoop]: Abstraction has 238430 states and 983122 transitions. [2019-12-07 11:03:16,223 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:03:16,223 INFO L276 IsEmpty]: Start isEmpty. Operand 238430 states and 983122 transitions. [2019-12-07 11:03:16,236 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 11:03:16,236 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:03:16,236 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:03:16,236 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:03:16,236 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:03:16,236 INFO L82 PathProgramCache]: Analyzing trace with hash -1014655917, now seen corresponding path program 1 times [2019-12-07 11:03:16,236 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:03:16,236 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [762338656] [2019-12-07 11:03:16,236 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:03:16,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:03:16,259 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:03:16,259 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [762338656] [2019-12-07 11:03:16,259 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:03:16,260 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 11:03:16,260 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1440687599] [2019-12-07 11:03:16,260 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:03:16,260 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:03:16,260 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:03:16,260 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:03:16,261 INFO L87 Difference]: Start difference. First operand 238430 states and 983122 transitions. Second operand 3 states. [2019-12-07 11:03:17,311 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:03:17,311 INFO L93 Difference]: Finished difference Result 236869 states and 976584 transitions. [2019-12-07 11:03:17,312 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:03:17,312 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 11:03:17,312 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:03:17,969 INFO L225 Difference]: With dead ends: 236869 [2019-12-07 11:03:17,969 INFO L226 Difference]: Without dead ends: 236869 [2019-12-07 11:03:17,969 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:03:26,593 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 236869 states. [2019-12-07 11:03:29,535 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 236869 to 236869. [2019-12-07 11:03:29,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 236869 states. [2019-12-07 11:03:30,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 236869 states to 236869 states and 976584 transitions. [2019-12-07 11:03:30,575 INFO L78 Accepts]: Start accepts. Automaton has 236869 states and 976584 transitions. Word has length 19 [2019-12-07 11:03:30,575 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:03:30,575 INFO L462 AbstractCegarLoop]: Abstraction has 236869 states and 976584 transitions. [2019-12-07 11:03:30,575 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:03:30,576 INFO L276 IsEmpty]: Start isEmpty. Operand 236869 states and 976584 transitions. [2019-12-07 11:03:30,594 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2019-12-07 11:03:30,594 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:03:30,594 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:03:30,594 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:03:30,594 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:03:30,594 INFO L82 PathProgramCache]: Analyzing trace with hash -1109806255, now seen corresponding path program 1 times [2019-12-07 11:03:30,594 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:03:30,594 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1956380650] [2019-12-07 11:03:30,594 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:03:30,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:03:30,622 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:03:30,623 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1956380650] [2019-12-07 11:03:30,623 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:03:30,623 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:03:30,623 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1111980328] [2019-12-07 11:03:30,623 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:03:30,623 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:03:30,624 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:03:30,624 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:03:30,624 INFO L87 Difference]: Start difference. First operand 236869 states and 976584 transitions. Second operand 3 states. [2019-12-07 11:03:30,768 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:03:30,768 INFO L93 Difference]: Finished difference Result 47306 states and 153879 transitions. [2019-12-07 11:03:30,768 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:03:30,768 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 20 [2019-12-07 11:03:30,769 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:03:30,839 INFO L225 Difference]: With dead ends: 47306 [2019-12-07 11:03:30,839 INFO L226 Difference]: Without dead ends: 47306 [2019-12-07 11:03:30,839 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:03:31,075 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47306 states. [2019-12-07 11:03:31,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47306 to 47306. [2019-12-07 11:03:31,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47306 states. [2019-12-07 11:03:31,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47306 states to 47306 states and 153879 transitions. [2019-12-07 11:03:31,642 INFO L78 Accepts]: Start accepts. Automaton has 47306 states and 153879 transitions. Word has length 20 [2019-12-07 11:03:31,642 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:03:31,642 INFO L462 AbstractCegarLoop]: Abstraction has 47306 states and 153879 transitions. [2019-12-07 11:03:31,642 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:03:31,642 INFO L276 IsEmpty]: Start isEmpty. Operand 47306 states and 153879 transitions. [2019-12-07 11:03:31,648 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 11:03:31,648 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:03:31,648 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:03:31,648 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:03:31,648 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:03:31,648 INFO L82 PathProgramCache]: Analyzing trace with hash -390431288, now seen corresponding path program 1 times [2019-12-07 11:03:31,648 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:03:31,648 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [242661023] [2019-12-07 11:03:31,648 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:03:31,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:03:31,685 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:03:31,685 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [242661023] [2019-12-07 11:03:31,685 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:03:31,685 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:03:31,686 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1864972715] [2019-12-07 11:03:31,686 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:03:31,686 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:03:31,686 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:03:31,686 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:03:31,686 INFO L87 Difference]: Start difference. First operand 47306 states and 153879 transitions. Second operand 5 states. [2019-12-07 11:03:32,108 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:03:32,108 INFO L93 Difference]: Finished difference Result 63732 states and 202340 transitions. [2019-12-07 11:03:32,108 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 11:03:32,108 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 11:03:32,109 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:03:32,196 INFO L225 Difference]: With dead ends: 63732 [2019-12-07 11:03:32,196 INFO L226 Difference]: Without dead ends: 63718 [2019-12-07 11:03:32,196 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:03:32,477 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63718 states. [2019-12-07 11:03:33,381 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63718 to 50153. [2019-12-07 11:03:33,381 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50153 states. [2019-12-07 11:03:33,480 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50153 states to 50153 states and 162547 transitions. [2019-12-07 11:03:33,480 INFO L78 Accepts]: Start accepts. Automaton has 50153 states and 162547 transitions. Word has length 22 [2019-12-07 11:03:33,480 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:03:33,480 INFO L462 AbstractCegarLoop]: Abstraction has 50153 states and 162547 transitions. [2019-12-07 11:03:33,480 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:03:33,480 INFO L276 IsEmpty]: Start isEmpty. Operand 50153 states and 162547 transitions. [2019-12-07 11:03:33,487 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 11:03:33,487 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:03:33,487 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:03:33,487 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:03:33,487 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:03:33,487 INFO L82 PathProgramCache]: Analyzing trace with hash 2088873634, now seen corresponding path program 1 times [2019-12-07 11:03:33,488 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:03:33,488 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1677324119] [2019-12-07 11:03:33,488 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:03:33,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:03:33,538 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:03:33,539 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1677324119] [2019-12-07 11:03:33,539 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:03:33,539 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:03:33,539 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1979760182] [2019-12-07 11:03:33,539 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:03:33,539 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:03:33,539 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:03:33,539 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:03:33,539 INFO L87 Difference]: Start difference. First operand 50153 states and 162547 transitions. Second operand 5 states. [2019-12-07 11:03:33,971 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:03:33,971 INFO L93 Difference]: Finished difference Result 65772 states and 209381 transitions. [2019-12-07 11:03:33,972 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 11:03:33,972 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 11:03:33,972 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:03:34,070 INFO L225 Difference]: With dead ends: 65772 [2019-12-07 11:03:34,070 INFO L226 Difference]: Without dead ends: 65758 [2019-12-07 11:03:34,070 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 11:03:34,354 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65758 states. [2019-12-07 11:03:34,912 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65758 to 48781. [2019-12-07 11:03:34,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48781 states. [2019-12-07 11:03:35,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48781 states to 48781 states and 158351 transitions. [2019-12-07 11:03:35,000 INFO L78 Accepts]: Start accepts. Automaton has 48781 states and 158351 transitions. Word has length 22 [2019-12-07 11:03:35,000 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:03:35,000 INFO L462 AbstractCegarLoop]: Abstraction has 48781 states and 158351 transitions. [2019-12-07 11:03:35,000 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:03:35,000 INFO L276 IsEmpty]: Start isEmpty. Operand 48781 states and 158351 transitions. [2019-12-07 11:03:35,012 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 11:03:35,012 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:03:35,012 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:03:35,013 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:03:35,013 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:03:35,013 INFO L82 PathProgramCache]: Analyzing trace with hash 967503752, now seen corresponding path program 1 times [2019-12-07 11:03:35,013 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:03:35,013 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1915718452] [2019-12-07 11:03:35,013 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:03:35,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:03:35,033 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:03:35,033 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1915718452] [2019-12-07 11:03:35,033 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:03:35,033 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:03:35,033 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [934813485] [2019-12-07 11:03:35,034 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:03:35,034 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:03:35,034 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:03:35,034 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:03:35,034 INFO L87 Difference]: Start difference. First operand 48781 states and 158351 transitions. Second operand 3 states. [2019-12-07 11:03:35,360 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:03:35,360 INFO L93 Difference]: Finished difference Result 62590 states and 194296 transitions. [2019-12-07 11:03:35,360 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:03:35,361 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 11:03:35,361 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:03:35,436 INFO L225 Difference]: With dead ends: 62590 [2019-12-07 11:03:35,436 INFO L226 Difference]: Without dead ends: 62590 [2019-12-07 11:03:35,436 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:03:35,704 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62590 states. [2019-12-07 11:03:36,205 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62590 to 48305. [2019-12-07 11:03:36,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48305 states. [2019-12-07 11:03:36,286 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48305 states to 48305 states and 149984 transitions. [2019-12-07 11:03:36,286 INFO L78 Accepts]: Start accepts. Automaton has 48305 states and 149984 transitions. Word has length 27 [2019-12-07 11:03:36,286 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:03:36,286 INFO L462 AbstractCegarLoop]: Abstraction has 48305 states and 149984 transitions. [2019-12-07 11:03:36,286 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:03:36,286 INFO L276 IsEmpty]: Start isEmpty. Operand 48305 states and 149984 transitions. [2019-12-07 11:03:36,295 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 11:03:36,295 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:03:36,295 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:03:36,295 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:03:36,296 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:03:36,296 INFO L82 PathProgramCache]: Analyzing trace with hash 196927527, now seen corresponding path program 1 times [2019-12-07 11:03:36,296 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:03:36,296 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [227358159] [2019-12-07 11:03:36,296 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:03:36,303 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:03:36,332 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:03:36,332 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [227358159] [2019-12-07 11:03:36,332 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:03:36,332 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:03:36,332 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1668006704] [2019-12-07 11:03:36,332 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:03:36,333 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:03:36,333 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:03:36,333 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:03:36,333 INFO L87 Difference]: Start difference. First operand 48305 states and 149984 transitions. Second operand 5 states. [2019-12-07 11:03:36,648 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:03:36,648 INFO L93 Difference]: Finished difference Result 59318 states and 182383 transitions. [2019-12-07 11:03:36,649 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 11:03:36,649 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 27 [2019-12-07 11:03:36,649 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:03:36,731 INFO L225 Difference]: With dead ends: 59318 [2019-12-07 11:03:36,731 INFO L226 Difference]: Without dead ends: 59276 [2019-12-07 11:03:36,732 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:03:37,002 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59276 states. [2019-12-07 11:03:37,545 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59276 to 50441. [2019-12-07 11:03:37,545 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50441 states. [2019-12-07 11:03:37,639 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50441 states to 50441 states and 156499 transitions. [2019-12-07 11:03:37,639 INFO L78 Accepts]: Start accepts. Automaton has 50441 states and 156499 transitions. Word has length 27 [2019-12-07 11:03:37,639 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:03:37,639 INFO L462 AbstractCegarLoop]: Abstraction has 50441 states and 156499 transitions. [2019-12-07 11:03:37,639 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:03:37,639 INFO L276 IsEmpty]: Start isEmpty. Operand 50441 states and 156499 transitions. [2019-12-07 11:03:37,751 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 11:03:37,751 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:03:37,751 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:03:37,751 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:03:37,751 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:03:37,751 INFO L82 PathProgramCache]: Analyzing trace with hash -1188103809, now seen corresponding path program 1 times [2019-12-07 11:03:37,751 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:03:37,751 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1276047884] [2019-12-07 11:03:37,751 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:03:37,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:03:37,788 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:03:37,788 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1276047884] [2019-12-07 11:03:37,788 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:03:37,788 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:03:37,788 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [97713726] [2019-12-07 11:03:37,789 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:03:37,789 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:03:37,789 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:03:37,789 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:03:37,789 INFO L87 Difference]: Start difference. First operand 50441 states and 156499 transitions. Second operand 5 states. [2019-12-07 11:03:38,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:03:38,121 INFO L93 Difference]: Finished difference Result 61171 states and 187912 transitions. [2019-12-07 11:03:38,121 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 11:03:38,122 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 11:03:38,122 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:03:38,207 INFO L225 Difference]: With dead ends: 61171 [2019-12-07 11:03:38,207 INFO L226 Difference]: Without dead ends: 61127 [2019-12-07 11:03:38,207 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 11:03:38,478 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61127 states. [2019-12-07 11:03:39,033 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61127 to 50255. [2019-12-07 11:03:39,033 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50255 states. [2019-12-07 11:03:39,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50255 states to 50255 states and 155837 transitions. [2019-12-07 11:03:39,127 INFO L78 Accepts]: Start accepts. Automaton has 50255 states and 155837 transitions. Word has length 28 [2019-12-07 11:03:39,127 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:03:39,127 INFO L462 AbstractCegarLoop]: Abstraction has 50255 states and 155837 transitions. [2019-12-07 11:03:39,127 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:03:39,127 INFO L276 IsEmpty]: Start isEmpty. Operand 50255 states and 155837 transitions. [2019-12-07 11:03:39,143 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 11:03:39,144 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:03:39,144 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:03:39,144 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:03:39,144 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:03:39,144 INFO L82 PathProgramCache]: Analyzing trace with hash 623425171, now seen corresponding path program 1 times [2019-12-07 11:03:39,144 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:03:39,144 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1656839298] [2019-12-07 11:03:39,144 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:03:39,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:03:39,174 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:03:39,174 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1656839298] [2019-12-07 11:03:39,174 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:03:39,174 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:03:39,175 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1794975640] [2019-12-07 11:03:39,175 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:03:39,175 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:03:39,175 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:03:39,175 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:03:39,175 INFO L87 Difference]: Start difference. First operand 50255 states and 155837 transitions. Second operand 4 states. [2019-12-07 11:03:39,232 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:03:39,232 INFO L93 Difference]: Finished difference Result 19537 states and 57983 transitions. [2019-12-07 11:03:39,233 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 11:03:39,233 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 31 [2019-12-07 11:03:39,233 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:03:39,253 INFO L225 Difference]: With dead ends: 19537 [2019-12-07 11:03:39,253 INFO L226 Difference]: Without dead ends: 19537 [2019-12-07 11:03:39,254 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:03:39,336 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19537 states. [2019-12-07 11:03:39,492 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19537 to 18347. [2019-12-07 11:03:39,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18347 states. [2019-12-07 11:03:39,520 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18347 states to 18347 states and 54527 transitions. [2019-12-07 11:03:39,521 INFO L78 Accepts]: Start accepts. Automaton has 18347 states and 54527 transitions. Word has length 31 [2019-12-07 11:03:39,521 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:03:39,521 INFO L462 AbstractCegarLoop]: Abstraction has 18347 states and 54527 transitions. [2019-12-07 11:03:39,521 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:03:39,521 INFO L276 IsEmpty]: Start isEmpty. Operand 18347 states and 54527 transitions. [2019-12-07 11:03:39,534 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 11:03:39,534 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:03:39,534 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:03:39,534 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:03:39,534 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:03:39,534 INFO L82 PathProgramCache]: Analyzing trace with hash 1042720045, now seen corresponding path program 1 times [2019-12-07 11:03:39,534 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:03:39,534 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1713707924] [2019-12-07 11:03:39,535 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:03:39,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:03:39,584 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:03:39,584 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1713707924] [2019-12-07 11:03:39,584 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:03:39,584 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:03:39,584 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1854289380] [2019-12-07 11:03:39,584 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:03:39,584 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:03:39,584 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:03:39,585 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:03:39,585 INFO L87 Difference]: Start difference. First operand 18347 states and 54527 transitions. Second operand 6 states. [2019-12-07 11:03:39,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:03:39,998 INFO L93 Difference]: Finished difference Result 23133 states and 67936 transitions. [2019-12-07 11:03:39,998 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 11:03:39,998 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 33 [2019-12-07 11:03:39,998 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:03:40,021 INFO L225 Difference]: With dead ends: 23133 [2019-12-07 11:03:40,021 INFO L226 Difference]: Without dead ends: 23133 [2019-12-07 11:03:40,021 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 11:03:40,112 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23133 states. [2019-12-07 11:03:40,288 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23133 to 18515. [2019-12-07 11:03:40,288 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18515 states. [2019-12-07 11:03:40,366 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18515 states to 18515 states and 55057 transitions. [2019-12-07 11:03:40,366 INFO L78 Accepts]: Start accepts. Automaton has 18515 states and 55057 transitions. Word has length 33 [2019-12-07 11:03:40,366 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:03:40,367 INFO L462 AbstractCegarLoop]: Abstraction has 18515 states and 55057 transitions. [2019-12-07 11:03:40,367 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:03:40,367 INFO L276 IsEmpty]: Start isEmpty. Operand 18515 states and 55057 transitions. [2019-12-07 11:03:40,377 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 11:03:40,377 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:03:40,377 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:03:40,378 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:03:40,378 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:03:40,378 INFO L82 PathProgramCache]: Analyzing trace with hash -738339527, now seen corresponding path program 1 times [2019-12-07 11:03:40,378 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:03:40,378 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2003375601] [2019-12-07 11:03:40,378 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:03:40,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:03:40,414 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:03:40,414 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2003375601] [2019-12-07 11:03:40,414 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:03:40,414 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:03:40,414 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1293693697] [2019-12-07 11:03:40,415 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 11:03:40,415 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:03:40,415 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 11:03:40,415 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 11:03:40,415 INFO L87 Difference]: Start difference. First operand 18515 states and 55057 transitions. Second operand 6 states. [2019-12-07 11:03:40,788 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:03:40,788 INFO L93 Difference]: Finished difference Result 22604 states and 66411 transitions. [2019-12-07 11:03:40,788 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 11:03:40,788 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2019-12-07 11:03:40,789 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:03:40,810 INFO L225 Difference]: With dead ends: 22604 [2019-12-07 11:03:40,811 INFO L226 Difference]: Without dead ends: 22604 [2019-12-07 11:03:40,811 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 11:03:40,899 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22604 states. [2019-12-07 11:03:41,068 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22604 to 17798. [2019-12-07 11:03:41,068 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17798 states. [2019-12-07 11:03:41,095 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17798 states to 17798 states and 52944 transitions. [2019-12-07 11:03:41,095 INFO L78 Accepts]: Start accepts. Automaton has 17798 states and 52944 transitions. Word has length 34 [2019-12-07 11:03:41,096 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:03:41,096 INFO L462 AbstractCegarLoop]: Abstraction has 17798 states and 52944 transitions. [2019-12-07 11:03:41,096 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 11:03:41,096 INFO L276 IsEmpty]: Start isEmpty. Operand 17798 states and 52944 transitions. [2019-12-07 11:03:41,109 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 11:03:41,109 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:03:41,109 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:03:41,110 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:03:41,110 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:03:41,110 INFO L82 PathProgramCache]: Analyzing trace with hash -935567252, now seen corresponding path program 1 times [2019-12-07 11:03:41,110 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:03:41,110 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1621249667] [2019-12-07 11:03:41,110 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:03:41,121 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:03:41,146 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:03:41,146 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1621249667] [2019-12-07 11:03:41,146 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:03:41,146 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:03:41,146 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1762404048] [2019-12-07 11:03:41,147 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:03:41,147 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:03:41,147 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:03:41,147 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:03:41,147 INFO L87 Difference]: Start difference. First operand 17798 states and 52944 transitions. Second operand 3 states. [2019-12-07 11:03:41,193 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:03:41,193 INFO L93 Difference]: Finished difference Result 17798 states and 52256 transitions. [2019-12-07 11:03:41,194 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:03:41,194 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2019-12-07 11:03:41,194 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:03:41,211 INFO L225 Difference]: With dead ends: 17798 [2019-12-07 11:03:41,211 INFO L226 Difference]: Without dead ends: 17798 [2019-12-07 11:03:41,211 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:03:41,288 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17798 states. [2019-12-07 11:03:41,435 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17798 to 17524. [2019-12-07 11:03:41,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17524 states. [2019-12-07 11:03:41,463 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17524 states to 17524 states and 51488 transitions. [2019-12-07 11:03:41,463 INFO L78 Accepts]: Start accepts. Automaton has 17524 states and 51488 transitions. Word has length 41 [2019-12-07 11:03:41,464 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:03:41,464 INFO L462 AbstractCegarLoop]: Abstraction has 17524 states and 51488 transitions. [2019-12-07 11:03:41,464 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:03:41,464 INFO L276 IsEmpty]: Start isEmpty. Operand 17524 states and 51488 transitions. [2019-12-07 11:03:41,478 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 11:03:41,478 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:03:41,478 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:03:41,478 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:03:41,478 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:03:41,478 INFO L82 PathProgramCache]: Analyzing trace with hash 936590377, now seen corresponding path program 1 times [2019-12-07 11:03:41,478 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:03:41,478 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1721691331] [2019-12-07 11:03:41,479 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:03:41,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:03:41,513 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:03:41,514 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1721691331] [2019-12-07 11:03:41,514 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:03:41,514 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 11:03:41,514 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [16673552] [2019-12-07 11:03:41,514 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 11:03:41,514 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:03:41,514 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 11:03:41,514 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:03:41,514 INFO L87 Difference]: Start difference. First operand 17524 states and 51488 transitions. Second operand 5 states. [2019-12-07 11:03:41,560 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:03:41,560 INFO L93 Difference]: Finished difference Result 16109 states and 48466 transitions. [2019-12-07 11:03:41,560 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 11:03:41,560 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-12-07 11:03:41,560 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:03:41,576 INFO L225 Difference]: With dead ends: 16109 [2019-12-07 11:03:41,577 INFO L226 Difference]: Without dead ends: 16109 [2019-12-07 11:03:41,577 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:03:41,651 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16109 states. [2019-12-07 11:03:41,777 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16109 to 14604. [2019-12-07 11:03:41,777 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14604 states. [2019-12-07 11:03:41,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14604 states to 14604 states and 44151 transitions. [2019-12-07 11:03:41,799 INFO L78 Accepts]: Start accepts. Automaton has 14604 states and 44151 transitions. Word has length 42 [2019-12-07 11:03:41,800 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:03:41,800 INFO L462 AbstractCegarLoop]: Abstraction has 14604 states and 44151 transitions. [2019-12-07 11:03:41,800 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 11:03:41,800 INFO L276 IsEmpty]: Start isEmpty. Operand 14604 states and 44151 transitions. [2019-12-07 11:03:41,811 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 11:03:41,812 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:03:41,812 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:03:41,812 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:03:41,812 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:03:41,812 INFO L82 PathProgramCache]: Analyzing trace with hash 1653836464, now seen corresponding path program 1 times [2019-12-07 11:03:41,812 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:03:41,812 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [527468234] [2019-12-07 11:03:41,812 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:03:41,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:03:41,857 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:03:41,857 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [527468234] [2019-12-07 11:03:41,857 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:03:41,857 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 11:03:41,857 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1053477499] [2019-12-07 11:03:41,858 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 11:03:41,858 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:03:41,858 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 11:03:41,858 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:03:41,858 INFO L87 Difference]: Start difference. First operand 14604 states and 44151 transitions. Second operand 3 states. [2019-12-07 11:03:41,926 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:03:41,926 INFO L93 Difference]: Finished difference Result 17473 states and 52902 transitions. [2019-12-07 11:03:41,927 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 11:03:41,927 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 11:03:41,927 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:03:41,944 INFO L225 Difference]: With dead ends: 17473 [2019-12-07 11:03:41,945 INFO L226 Difference]: Without dead ends: 17473 [2019-12-07 11:03:41,945 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 11:03:42,021 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17473 states. [2019-12-07 11:03:42,148 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17473 to 13664. [2019-12-07 11:03:42,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 13664 states. [2019-12-07 11:03:42,167 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13664 states to 13664 states and 41709 transitions. [2019-12-07 11:03:42,167 INFO L78 Accepts]: Start accepts. Automaton has 13664 states and 41709 transitions. Word has length 66 [2019-12-07 11:03:42,168 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:03:42,168 INFO L462 AbstractCegarLoop]: Abstraction has 13664 states and 41709 transitions. [2019-12-07 11:03:42,168 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 11:03:42,168 INFO L276 IsEmpty]: Start isEmpty. Operand 13664 states and 41709 transitions. [2019-12-07 11:03:42,180 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 11:03:42,180 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:03:42,180 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:03:42,180 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:03:42,180 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:03:42,180 INFO L82 PathProgramCache]: Analyzing trace with hash 731097294, now seen corresponding path program 1 times [2019-12-07 11:03:42,180 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:03:42,180 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [392922639] [2019-12-07 11:03:42,181 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:03:42,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:03:42,222 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:03:42,222 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [392922639] [2019-12-07 11:03:42,222 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:03:42,222 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 11:03:42,222 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1248215200] [2019-12-07 11:03:42,222 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 11:03:42,222 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:03:42,223 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 11:03:42,223 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 11:03:42,223 INFO L87 Difference]: Start difference. First operand 13664 states and 41709 transitions. Second operand 4 states. [2019-12-07 11:03:42,306 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:03:42,306 INFO L93 Difference]: Finished difference Result 13479 states and 40986 transitions. [2019-12-07 11:03:42,306 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 11:03:42,307 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 11:03:42,307 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:03:42,321 INFO L225 Difference]: With dead ends: 13479 [2019-12-07 11:03:42,321 INFO L226 Difference]: Without dead ends: 13479 [2019-12-07 11:03:42,322 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 11:03:42,389 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13479 states. [2019-12-07 11:03:42,498 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13479 to 12329. [2019-12-07 11:03:42,498 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 12329 states. [2019-12-07 11:03:42,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12329 states to 12329 states and 37348 transitions. [2019-12-07 11:03:42,517 INFO L78 Accepts]: Start accepts. Automaton has 12329 states and 37348 transitions. Word has length 67 [2019-12-07 11:03:42,518 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:03:42,518 INFO L462 AbstractCegarLoop]: Abstraction has 12329 states and 37348 transitions. [2019-12-07 11:03:42,518 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 11:03:42,518 INFO L276 IsEmpty]: Start isEmpty. Operand 12329 states and 37348 transitions. [2019-12-07 11:03:42,528 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 11:03:42,528 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:03:42,529 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:03:42,529 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:03:42,529 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:03:42,529 INFO L82 PathProgramCache]: Analyzing trace with hash -543525966, now seen corresponding path program 1 times [2019-12-07 11:03:42,529 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:03:42,529 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1487184158] [2019-12-07 11:03:42,529 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:03:42,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:03:42,669 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:03:42,669 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1487184158] [2019-12-07 11:03:42,669 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:03:42,669 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 11:03:42,669 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1640530633] [2019-12-07 11:03:42,669 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 11:03:42,669 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:03:42,670 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 11:03:42,670 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 11:03:42,670 INFO L87 Difference]: Start difference. First operand 12329 states and 37348 transitions. Second operand 10 states. [2019-12-07 11:03:43,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:03:43,385 INFO L93 Difference]: Finished difference Result 21838 states and 66070 transitions. [2019-12-07 11:03:43,385 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2019-12-07 11:03:43,386 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 11:03:43,386 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:03:43,402 INFO L225 Difference]: With dead ends: 21838 [2019-12-07 11:03:43,402 INFO L226 Difference]: Without dead ends: 16695 [2019-12-07 11:03:43,402 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=74, Invalid=268, Unknown=0, NotChecked=0, Total=342 [2019-12-07 11:03:43,477 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16695 states. [2019-12-07 11:03:43,608 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16695 to 14354. [2019-12-07 11:03:43,608 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14354 states. [2019-12-07 11:03:43,630 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14354 states to 14354 states and 43432 transitions. [2019-12-07 11:03:43,630 INFO L78 Accepts]: Start accepts. Automaton has 14354 states and 43432 transitions. Word has length 67 [2019-12-07 11:03:43,630 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:03:43,630 INFO L462 AbstractCegarLoop]: Abstraction has 14354 states and 43432 transitions. [2019-12-07 11:03:43,630 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 11:03:43,630 INFO L276 IsEmpty]: Start isEmpty. Operand 14354 states and 43432 transitions. [2019-12-07 11:03:43,642 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 11:03:43,642 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:03:43,643 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:03:43,643 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:03:43,643 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:03:43,643 INFO L82 PathProgramCache]: Analyzing trace with hash -1737332378, now seen corresponding path program 2 times [2019-12-07 11:03:43,643 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:03:43,643 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1272327315] [2019-12-07 11:03:43,643 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:03:43,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:03:43,990 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:03:43,990 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1272327315] [2019-12-07 11:03:43,990 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:03:43,990 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 11:03:43,990 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1212672142] [2019-12-07 11:03:43,990 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 11:03:43,990 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:03:43,991 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 11:03:43,991 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=205, Unknown=0, NotChecked=0, Total=240 [2019-12-07 11:03:43,991 INFO L87 Difference]: Start difference. First operand 14354 states and 43432 transitions. Second operand 16 states. [2019-12-07 11:03:47,673 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:03:47,673 INFO L93 Difference]: Finished difference Result 20769 states and 61690 transitions. [2019-12-07 11:03:47,675 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2019-12-07 11:03:47,675 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 11:03:47,675 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:03:47,715 INFO L225 Difference]: With dead ends: 20769 [2019-12-07 11:03:47,715 INFO L226 Difference]: Without dead ends: 17832 [2019-12-07 11:03:47,716 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 44 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 384 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=286, Invalid=1606, Unknown=0, NotChecked=0, Total=1892 [2019-12-07 11:03:47,793 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17832 states. [2019-12-07 11:03:47,934 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17832 to 14740. [2019-12-07 11:03:47,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14740 states. [2019-12-07 11:03:47,958 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14740 states to 14740 states and 44545 transitions. [2019-12-07 11:03:47,958 INFO L78 Accepts]: Start accepts. Automaton has 14740 states and 44545 transitions. Word has length 67 [2019-12-07 11:03:47,958 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:03:47,958 INFO L462 AbstractCegarLoop]: Abstraction has 14740 states and 44545 transitions. [2019-12-07 11:03:47,958 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 11:03:47,958 INFO L276 IsEmpty]: Start isEmpty. Operand 14740 states and 44545 transitions. [2019-12-07 11:03:47,971 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 11:03:47,972 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:03:47,972 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:03:47,972 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:03:47,972 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:03:47,972 INFO L82 PathProgramCache]: Analyzing trace with hash 1424347706, now seen corresponding path program 3 times [2019-12-07 11:03:47,972 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:03:47,972 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [54975116] [2019-12-07 11:03:47,972 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:03:47,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:03:48,288 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:03:48,288 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [54975116] [2019-12-07 11:03:48,288 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:03:48,288 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 11:03:48,288 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [655168344] [2019-12-07 11:03:48,289 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 11:03:48,289 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:03:48,289 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 11:03:48,289 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=207, Unknown=0, NotChecked=0, Total=240 [2019-12-07 11:03:48,289 INFO L87 Difference]: Start difference. First operand 14740 states and 44545 transitions. Second operand 16 states. [2019-12-07 11:03:50,612 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:03:50,613 INFO L93 Difference]: Finished difference Result 19133 states and 56680 transitions. [2019-12-07 11:03:50,613 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-12-07 11:03:50,613 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 11:03:50,613 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:03:50,633 INFO L225 Difference]: With dead ends: 19133 [2019-12-07 11:03:50,633 INFO L226 Difference]: Without dead ends: 17334 [2019-12-07 11:03:50,634 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 1 SyntacticMatches, 3 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 226 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=201, Invalid=1131, Unknown=0, NotChecked=0, Total=1332 [2019-12-07 11:03:50,707 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17334 states. [2019-12-07 11:03:50,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17334 to 15048. [2019-12-07 11:03:50,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15048 states. [2019-12-07 11:03:50,898 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15048 states to 15048 states and 45273 transitions. [2019-12-07 11:03:50,898 INFO L78 Accepts]: Start accepts. Automaton has 15048 states and 45273 transitions. Word has length 67 [2019-12-07 11:03:50,898 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:03:50,898 INFO L462 AbstractCegarLoop]: Abstraction has 15048 states and 45273 transitions. [2019-12-07 11:03:50,898 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 11:03:50,898 INFO L276 IsEmpty]: Start isEmpty. Operand 15048 states and 45273 transitions. [2019-12-07 11:03:50,911 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 11:03:50,911 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:03:50,912 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:03:50,912 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:03:50,912 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:03:50,912 INFO L82 PathProgramCache]: Analyzing trace with hash 2012679880, now seen corresponding path program 4 times [2019-12-07 11:03:50,912 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:03:50,912 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1904198678] [2019-12-07 11:03:50,912 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:03:50,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:03:51,217 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:03:51,217 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1904198678] [2019-12-07 11:03:51,218 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:03:51,218 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 11:03:51,218 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [355550266] [2019-12-07 11:03:51,218 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 11:03:51,218 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:03:51,218 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 11:03:51,218 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=175, Unknown=0, NotChecked=0, Total=210 [2019-12-07 11:03:51,218 INFO L87 Difference]: Start difference. First operand 15048 states and 45273 transitions. Second operand 15 states. [2019-12-07 11:03:55,389 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:03:55,389 INFO L93 Difference]: Finished difference Result 23736 states and 69645 transitions. [2019-12-07 11:03:55,389 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2019-12-07 11:03:55,389 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 11:03:55,390 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:03:55,410 INFO L225 Difference]: With dead ends: 23736 [2019-12-07 11:03:55,410 INFO L226 Difference]: Without dead ends: 20483 [2019-12-07 11:03:55,411 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 279 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=226, Invalid=1256, Unknown=0, NotChecked=0, Total=1482 [2019-12-07 11:03:55,490 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20483 states. [2019-12-07 11:03:55,651 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20483 to 16239. [2019-12-07 11:03:55,651 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16239 states. [2019-12-07 11:03:55,677 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16239 states to 16239 states and 48601 transitions. [2019-12-07 11:03:55,677 INFO L78 Accepts]: Start accepts. Automaton has 16239 states and 48601 transitions. Word has length 67 [2019-12-07 11:03:55,678 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:03:55,678 INFO L462 AbstractCegarLoop]: Abstraction has 16239 states and 48601 transitions. [2019-12-07 11:03:55,678 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 11:03:55,678 INFO L276 IsEmpty]: Start isEmpty. Operand 16239 states and 48601 transitions. [2019-12-07 11:03:55,692 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 11:03:55,692 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:03:55,692 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:03:55,692 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:03:55,692 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:03:55,692 INFO L82 PathProgramCache]: Analyzing trace with hash 1814728988, now seen corresponding path program 5 times [2019-12-07 11:03:55,692 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:03:55,693 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [618347393] [2019-12-07 11:03:55,693 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:03:55,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:03:56,000 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:03:56,000 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [618347393] [2019-12-07 11:03:56,000 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:03:56,000 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 11:03:56,000 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1121160788] [2019-12-07 11:03:56,001 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 11:03:56,001 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:03:56,001 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 11:03:56,001 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=200, Unknown=0, NotChecked=0, Total=240 [2019-12-07 11:03:56,001 INFO L87 Difference]: Start difference. First operand 16239 states and 48601 transitions. Second operand 16 states. [2019-12-07 11:03:59,422 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:03:59,422 INFO L93 Difference]: Finished difference Result 21971 states and 64476 transitions. [2019-12-07 11:03:59,423 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2019-12-07 11:03:59,423 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 11:03:59,423 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:03:59,443 INFO L225 Difference]: With dead ends: 21971 [2019-12-07 11:03:59,443 INFO L226 Difference]: Without dead ends: 20550 [2019-12-07 11:03:59,443 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 238 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=222, Invalid=1184, Unknown=0, NotChecked=0, Total=1406 [2019-12-07 11:03:59,522 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20550 states. [2019-12-07 11:03:59,681 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20550 to 16424. [2019-12-07 11:03:59,681 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 16424 states. [2019-12-07 11:03:59,706 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16424 states to 16424 states and 49076 transitions. [2019-12-07 11:03:59,707 INFO L78 Accepts]: Start accepts. Automaton has 16424 states and 49076 transitions. Word has length 67 [2019-12-07 11:03:59,707 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:03:59,707 INFO L462 AbstractCegarLoop]: Abstraction has 16424 states and 49076 transitions. [2019-12-07 11:03:59,707 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 11:03:59,707 INFO L276 IsEmpty]: Start isEmpty. Operand 16424 states and 49076 transitions. [2019-12-07 11:03:59,720 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 11:03:59,720 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:03:59,721 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:03:59,721 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:03:59,721 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:03:59,721 INFO L82 PathProgramCache]: Analyzing trace with hash 1028710172, now seen corresponding path program 6 times [2019-12-07 11:03:59,721 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:03:59,721 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [997201576] [2019-12-07 11:03:59,721 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:03:59,731 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:03:59,863 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:03:59,863 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [997201576] [2019-12-07 11:03:59,863 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:03:59,863 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 11:03:59,863 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [610812576] [2019-12-07 11:03:59,863 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 11:03:59,863 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:03:59,863 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 11:03:59,864 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 11:03:59,864 INFO L87 Difference]: Start difference. First operand 16424 states and 49076 transitions. Second operand 10 states. [2019-12-07 11:04:00,539 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:04:00,539 INFO L93 Difference]: Finished difference Result 22859 states and 67565 transitions. [2019-12-07 11:04:00,540 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2019-12-07 11:04:00,540 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 11:04:00,540 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:04:00,558 INFO L225 Difference]: With dead ends: 22859 [2019-12-07 11:04:00,558 INFO L226 Difference]: Without dead ends: 18214 [2019-12-07 11:04:00,558 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 46 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=80, Invalid=300, Unknown=0, NotChecked=0, Total=380 [2019-12-07 11:04:00,633 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18214 states. [2019-12-07 11:04:00,779 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18214 to 15692. [2019-12-07 11:04:00,779 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15692 states. [2019-12-07 11:04:00,803 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15692 states to 15692 states and 46985 transitions. [2019-12-07 11:04:00,803 INFO L78 Accepts]: Start accepts. Automaton has 15692 states and 46985 transitions. Word has length 67 [2019-12-07 11:04:00,804 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:04:00,804 INFO L462 AbstractCegarLoop]: Abstraction has 15692 states and 46985 transitions. [2019-12-07 11:04:00,804 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 11:04:00,804 INFO L276 IsEmpty]: Start isEmpty. Operand 15692 states and 46985 transitions. [2019-12-07 11:04:00,817 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 11:04:00,817 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:04:00,817 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:04:00,817 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:04:00,817 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:04:00,817 INFO L82 PathProgramCache]: Analyzing trace with hash 202288426, now seen corresponding path program 7 times [2019-12-07 11:04:00,817 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:04:00,818 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1933162243] [2019-12-07 11:04:00,818 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:04:00,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:04:00,909 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:04:00,909 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1933162243] [2019-12-07 11:04:00,909 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:04:00,909 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 11:04:00,909 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1765404290] [2019-12-07 11:04:00,909 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 11:04:00,910 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:04:00,910 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 11:04:00,910 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 11:04:00,910 INFO L87 Difference]: Start difference. First operand 15692 states and 46985 transitions. Second operand 10 states. [2019-12-07 11:04:01,579 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:04:01,579 INFO L93 Difference]: Finished difference Result 22997 states and 67947 transitions. [2019-12-07 11:04:01,580 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2019-12-07 11:04:01,580 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 11:04:01,580 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:04:01,598 INFO L225 Difference]: With dead ends: 22997 [2019-12-07 11:04:01,598 INFO L226 Difference]: Without dead ends: 19491 [2019-12-07 11:04:01,599 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=59, Invalid=213, Unknown=0, NotChecked=0, Total=272 [2019-12-07 11:04:01,676 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19491 states. [2019-12-07 11:04:01,827 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19491 to 15997. [2019-12-07 11:04:01,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15997 states. [2019-12-07 11:04:01,851 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15997 states to 15997 states and 47681 transitions. [2019-12-07 11:04:01,851 INFO L78 Accepts]: Start accepts. Automaton has 15997 states and 47681 transitions. Word has length 67 [2019-12-07 11:04:01,852 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:04:01,852 INFO L462 AbstractCegarLoop]: Abstraction has 15997 states and 47681 transitions. [2019-12-07 11:04:01,852 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 11:04:01,852 INFO L276 IsEmpty]: Start isEmpty. Operand 15997 states and 47681 transitions. [2019-12-07 11:04:01,865 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 11:04:01,865 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:04:01,865 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:04:01,865 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:04:01,865 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:04:01,865 INFO L82 PathProgramCache]: Analyzing trace with hash -917850962, now seen corresponding path program 8 times [2019-12-07 11:04:01,866 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:04:01,866 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1250239671] [2019-12-07 11:04:01,866 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:04:01,878 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:04:01,983 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:04:01,984 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1250239671] [2019-12-07 11:04:01,984 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:04:01,984 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 11:04:01,984 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [485051159] [2019-12-07 11:04:01,984 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 11:04:01,984 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:04:01,984 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 11:04:01,984 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 11:04:01,984 INFO L87 Difference]: Start difference. First operand 15997 states and 47681 transitions. Second operand 11 states. [2019-12-07 11:04:02,753 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:04:02,753 INFO L93 Difference]: Finished difference Result 21472 states and 63475 transitions. [2019-12-07 11:04:02,753 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 11:04:02,753 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 11:04:02,754 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:04:02,771 INFO L225 Difference]: With dead ends: 21472 [2019-12-07 11:04:02,771 INFO L226 Difference]: Without dead ends: 18795 [2019-12-07 11:04:02,772 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=81, Invalid=381, Unknown=0, NotChecked=0, Total=462 [2019-12-07 11:04:02,847 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18795 states. [2019-12-07 11:04:02,995 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18795 to 15753. [2019-12-07 11:04:02,995 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15753 states. [2019-12-07 11:04:03,019 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15753 states to 15753 states and 46967 transitions. [2019-12-07 11:04:03,019 INFO L78 Accepts]: Start accepts. Automaton has 15753 states and 46967 transitions. Word has length 67 [2019-12-07 11:04:03,020 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:04:03,020 INFO L462 AbstractCegarLoop]: Abstraction has 15753 states and 46967 transitions. [2019-12-07 11:04:03,020 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 11:04:03,020 INFO L276 IsEmpty]: Start isEmpty. Operand 15753 states and 46967 transitions. [2019-12-07 11:04:03,033 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 11:04:03,033 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:04:03,033 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:04:03,033 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:04:03,033 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:04:03,033 INFO L82 PathProgramCache]: Analyzing trace with hash 668274002, now seen corresponding path program 9 times [2019-12-07 11:04:03,034 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:04:03,034 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [36039138] [2019-12-07 11:04:03,034 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:04:03,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:04:03,143 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:04:03,143 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [36039138] [2019-12-07 11:04:03,143 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:04:03,143 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 11:04:03,144 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [987709563] [2019-12-07 11:04:03,144 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 11:04:03,144 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:04:03,144 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 11:04:03,144 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 11:04:03,144 INFO L87 Difference]: Start difference. First operand 15753 states and 46967 transitions. Second operand 11 states. [2019-12-07 11:04:04,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:04:04,065 INFO L93 Difference]: Finished difference Result 39637 states and 117612 transitions. [2019-12-07 11:04:04,065 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2019-12-07 11:04:04,065 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 11:04:04,065 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:04:04,094 INFO L225 Difference]: With dead ends: 39637 [2019-12-07 11:04:04,094 INFO L226 Difference]: Without dead ends: 27521 [2019-12-07 11:04:04,095 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 336 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=277, Invalid=1129, Unknown=0, NotChecked=0, Total=1406 [2019-12-07 11:04:04,228 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27521 states. [2019-12-07 11:04:04,391 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27521 to 15650. [2019-12-07 11:04:04,391 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15650 states. [2019-12-07 11:04:04,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15650 states to 15650 states and 46599 transitions. [2019-12-07 11:04:04,415 INFO L78 Accepts]: Start accepts. Automaton has 15650 states and 46599 transitions. Word has length 67 [2019-12-07 11:04:04,415 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:04:04,415 INFO L462 AbstractCegarLoop]: Abstraction has 15650 states and 46599 transitions. [2019-12-07 11:04:04,415 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 11:04:04,416 INFO L276 IsEmpty]: Start isEmpty. Operand 15650 states and 46599 transitions. [2019-12-07 11:04:04,429 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 11:04:04,429 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:04:04,429 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:04:04,429 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:04:04,429 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:04:04,429 INFO L82 PathProgramCache]: Analyzing trace with hash -222673432, now seen corresponding path program 10 times [2019-12-07 11:04:04,429 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:04:04,429 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [135824800] [2019-12-07 11:04:04,430 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:04:04,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 11:04:04,581 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 11:04:04,581 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [135824800] [2019-12-07 11:04:04,581 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 11:04:04,581 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 11:04:04,582 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [981735486] [2019-12-07 11:04:04,582 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 11:04:04,582 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 11:04:04,582 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 11:04:04,582 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 11:04:04,582 INFO L87 Difference]: Start difference. First operand 15650 states and 46599 transitions. Second operand 12 states. [2019-12-07 11:04:05,273 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 11:04:05,273 INFO L93 Difference]: Finished difference Result 27406 states and 80751 transitions. [2019-12-07 11:04:05,273 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2019-12-07 11:04:05,273 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 11:04:05,273 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 11:04:05,302 INFO L225 Difference]: With dead ends: 27406 [2019-12-07 11:04:05,302 INFO L226 Difference]: Without dead ends: 26927 [2019-12-07 11:04:05,303 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 31 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 191 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=178, Invalid=814, Unknown=0, NotChecked=0, Total=992 [2019-12-07 11:04:05,401 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26927 states. [2019-12-07 11:04:05,579 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26927 to 15346. [2019-12-07 11:04:05,580 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 15346 states. [2019-12-07 11:04:05,603 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15346 states to 15346 states and 45751 transitions. [2019-12-07 11:04:05,604 INFO L78 Accepts]: Start accepts. Automaton has 15346 states and 45751 transitions. Word has length 67 [2019-12-07 11:04:05,604 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 11:04:05,604 INFO L462 AbstractCegarLoop]: Abstraction has 15346 states and 45751 transitions. [2019-12-07 11:04:05,604 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 11:04:05,604 INFO L276 IsEmpty]: Start isEmpty. Operand 15346 states and 45751 transitions. [2019-12-07 11:04:05,617 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 11:04:05,617 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 11:04:05,617 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 11:04:05,617 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 11:04:05,617 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 11:04:05,617 INFO L82 PathProgramCache]: Analyzing trace with hash -1210625396, now seen corresponding path program 11 times [2019-12-07 11:04:05,617 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 11:04:05,617 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1914424397] [2019-12-07 11:04:05,617 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 11:04:05,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 11:04:05,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 11:04:05,690 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 11:04:05,691 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 11:04:05,693 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [901] [901] ULTIMATE.startENTRY-->L832: Formula: (let ((.cse0 (store |v_#valid_72| 0 0))) (and (= v_~z$r_buff0_thd2~0_185 0) (= 0 v_~x~0_134) (= v_~z$w_buff0_used~0_784 0) (= v_~__unbuffered_p1_EBX~0_36 0) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t62~0.base_32|) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t62~0.base_32| 4) |v_#length_23|) (= v_~z$read_delayed_var~0.offset_6 0) (= v_~z$w_buff1_used~0_442 0) (= |v_#NULL.offset_7| 0) (= v_~z~0_178 0) (= v_~z$r_buff1_thd0~0_195 0) (= 0 v_~__unbuffered_p1_EAX~0_37) (= 0 |v_ULTIMATE.start_main_~#t62~0.offset_23|) (= v_~z$read_delayed~0_6 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t62~0.base_32|) 0) (= v_~y~0_24 0) (= v_~z$read_delayed_var~0.base_6 0) (< 0 |v_#StackHeapBarrier_18|) (= v_~__unbuffered_p2_EBX~0_41 0) (= 0 v_~__unbuffered_p2_EAX~0_33) (= 0 v_~__unbuffered_cnt~0_87) (= v_~weak$$choice2~0_133 0) (= v_~z$r_buff0_thd1~0_306 0) (= 0 v_~z$flush_delayed~0_26) (= 0 |v_#NULL.base_7|) (= 0 v_~z$r_buff0_thd3~0_400) (= v_~z$w_buff1~0_222 0) (= 0 v_~__unbuffered_p0_EAX~0_142) (= v_~main$tmp_guard0~0_26 0) (= 0 v_~z$r_buff1_thd3~0_306) (= v_~z$mem_tmp~0_15 0) (= 0 v_~weak$$choice0~0_13) (= v_~z$r_buff1_thd1~0_175 0) (= v_~z$r_buff1_thd2~0_185 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t62~0.base_32| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t62~0.base_32|) |v_ULTIMATE.start_main_~#t62~0.offset_23| 0)) |v_#memory_int_21|) (= v_~z$w_buff0~0_312 0) (= v_~z$r_buff0_thd0~0_204 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t62~0.base_32| 1) |v_#valid_70|) (= v_~main$tmp_guard1~0_37 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t62~0.offset=|v_ULTIMATE.start_main_~#t62~0.offset_23|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_185, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_42|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_54|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_34|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_68|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_204, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_142, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_37, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_33, ~z$mem_tmp~0=v_~z$mem_tmp~0_15, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_41, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ULTIMATE.start_main_~#t64~0.base=|v_ULTIMATE.start_main_~#t64~0.base_16|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_442, ~z$flush_delayed~0=v_~z$flush_delayed~0_26, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_175, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_400, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_87, ~x~0=v_~x~0_134, ULTIMATE.start_main_~#t63~0.base=|v_ULTIMATE.start_main_~#t63~0.base_29|, ~z$read_delayed~0=v_~z$read_delayed~0_6, ~z$w_buff1~0=v_~z$w_buff1~0_222, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_37, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_62|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_48|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_195, ~y~0=v_~y~0_24, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_185, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_36, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_24|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_784, ~z$w_buff0~0=v_~z$w_buff0~0_312, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_306, ULTIMATE.start_main_~#t64~0.offset=|v_ULTIMATE.start_main_~#t64~0.offset_14|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_26, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_~#t63~0.offset=|v_ULTIMATE.start_main_~#t63~0.offset_22|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_23|, #valid=|v_#valid_70|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_178, ULTIMATE.start_main_~#t62~0.base=|v_ULTIMATE.start_main_~#t62~0.base_32|, ~weak$$choice2~0=v_~weak$$choice2~0_133, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_306} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t62~0.offset, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ULTIMATE.start_main_~#t64~0.base, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t63~0.base, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ~y~0, ~z$r_buff0_thd2~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ULTIMATE.start_main_~#t64~0.offset, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_~#t63~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ULTIMATE.start_main_~#t62~0.base, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 11:04:05,694 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L4-->L750: Formula: (and (= ~z$r_buff1_thd0~0_Out-682432478 ~z$r_buff0_thd0~0_In-682432478) (= ~z$r_buff0_thd1~0_In-682432478 ~z$r_buff1_thd1~0_Out-682432478) (not (= 0 P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-682432478)) (= ~z$r_buff1_thd3~0_Out-682432478 ~z$r_buff0_thd3~0_In-682432478) (= ~z$r_buff0_thd1~0_Out-682432478 1) (= ~z$r_buff0_thd2~0_In-682432478 ~z$r_buff1_thd2~0_Out-682432478) (= ~__unbuffered_p0_EAX~0_Out-682432478 ~x~0_In-682432478)) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-682432478, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-682432478, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-682432478, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-682432478, ~x~0=~x~0_In-682432478, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-682432478} OutVars{~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out-682432478, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-682432478, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_Out-682432478, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_Out-682432478, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_Out-682432478, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_Out-682432478, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-682432478, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-682432478, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-682432478, ~x~0=~x~0_In-682432478, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-682432478} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 11:04:05,694 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L832-1-->L834: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t63~0.offset_10|) (= (select |v_#valid_40| |v_ULTIMATE.start_main_~#t63~0.base_11|) 0) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t63~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t63~0.base_11|) |v_ULTIMATE.start_main_~#t63~0.offset_10| 1)) |v_#memory_int_15|) (= (store |v_#valid_40| |v_ULTIMATE.start_main_~#t63~0.base_11| 1) |v_#valid_39|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t63~0.base_11|) (not (= 0 |v_ULTIMATE.start_main_~#t63~0.base_11|)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t63~0.base_11| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t63~0.base=|v_ULTIMATE.start_main_~#t63~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t63~0.offset=|v_ULTIMATE.start_main_~#t63~0.offset_10|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_15|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t63~0.base, ULTIMATE.start_main_~#t63~0.offset, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 11:04:05,696 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L773-2-->L773-5: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In1366680916 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd2~0_In1366680916 256))) (.cse1 (= |P1Thread1of1ForFork2_#t~ite9_Out1366680916| |P1Thread1of1ForFork2_#t~ite10_Out1366680916|))) (or (and (not .cse0) .cse1 (= |P1Thread1of1ForFork2_#t~ite9_Out1366680916| ~z$w_buff1~0_In1366680916) (not .cse2)) (and (or .cse0 .cse2) .cse1 (= |P1Thread1of1ForFork2_#t~ite9_Out1366680916| ~z~0_In1366680916)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1366680916, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1366680916, ~z$w_buff1~0=~z$w_buff1~0_In1366680916, ~z~0=~z~0_In1366680916} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out1366680916|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1366680916, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out1366680916|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1366680916, ~z$w_buff1~0=~z$w_buff1~0_In1366680916, ~z~0=~z~0_In1366680916} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 11:04:05,697 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L774-->L774-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd2~0_In1636729312 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In1636729312 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out1636729312|)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out1636729312| ~z$w_buff0_used~0_In1636729312)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1636729312, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1636729312} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1636729312, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out1636729312|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1636729312} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 11:04:05,697 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [861] [861] L834-1-->L836: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t64~0.offset_10|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t64~0.base_11| 4)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t64~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t64~0.base_11|) |v_ULTIMATE.start_main_~#t64~0.offset_10| 2)) |v_#memory_int_13|) (not (= |v_ULTIMATE.start_main_~#t64~0.base_11| 0)) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t64~0.base_11|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t64~0.base_11|) (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t64~0.base_11| 1) |v_#valid_31|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_31|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t64~0.base=|v_ULTIMATE.start_main_~#t64~0.base_11|, ULTIMATE.start_main_~#t64~0.offset=|v_ULTIMATE.start_main_~#t64~0.offset_10|, #length=|v_#length_15|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t64~0.base, ULTIMATE.start_main_~#t64~0.offset, #length] because there is no mapped edge [2019-12-07 11:04:05,698 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L751-->L751-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In-632316499 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-632316499 256)))) (or (and (= |P0Thread1of1ForFork1_#t~ite5_Out-632316499| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-632316499 |P0Thread1of1ForFork1_#t~ite5_Out-632316499|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-632316499, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-632316499} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-632316499|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-632316499, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-632316499} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 11:04:05,699 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L752-->L752-2: Formula: (let ((.cse3 (= (mod ~z$w_buff0_used~0_In1300153140 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd1~0_In1300153140 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In1300153140 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd1~0_In1300153140 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In1300153140 |P0Thread1of1ForFork1_#t~ite6_Out1300153140|)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= 0 |P0Thread1of1ForFork1_#t~ite6_Out1300153140|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1300153140, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1300153140, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1300153140, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1300153140} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1300153140, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out1300153140|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1300153140, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1300153140, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1300153140} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 11:04:05,699 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L753-->L754: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd1~0_In1269803582 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In1269803582 256) 0)) (.cse2 (= ~z$r_buff0_thd1~0_Out1269803582 ~z$r_buff0_thd1~0_In1269803582))) (or (and (= ~z$r_buff0_thd1~0_Out1269803582 0) (not .cse0) (not .cse1)) (and .cse0 .cse2) (and .cse1 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1269803582, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1269803582} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1269803582, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out1269803582|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out1269803582} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 11:04:05,699 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L754-->L754-2: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In1861823798 256) 0)) (.cse0 (= (mod ~z$r_buff1_thd1~0_In1861823798 256) 0)) (.cse2 (= (mod ~z$w_buff0_used~0_In1861823798 256) 0)) (.cse3 (= (mod ~z$r_buff0_thd1~0_In1861823798 256) 0))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite8_Out1861823798| ~z$r_buff1_thd1~0_In1861823798) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite8_Out1861823798| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1861823798, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1861823798, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1861823798, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1861823798} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1861823798|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1861823798, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1861823798, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1861823798, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1861823798} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 11:04:05,699 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [865] [865] L754-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~z$r_buff1_thd1~0_78 |v_P0Thread1of1ForFork1_#t~ite8_34|) (= (+ v_~__unbuffered_cnt~0_54 1) v_~__unbuffered_cnt~0_53) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_33|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_78, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_53} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 11:04:05,699 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L775-->L775-2: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In-1284349834 256) 0)) (.cse0 (= (mod ~z$r_buff1_thd2~0_In-1284349834 256) 0)) (.cse2 (= (mod ~z$w_buff0_used~0_In-1284349834 256) 0)) (.cse3 (= 0 (mod ~z$r_buff0_thd2~0_In-1284349834 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite12_Out-1284349834| ~z$w_buff1_used~0_In-1284349834) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite12_Out-1284349834|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1284349834, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1284349834, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1284349834, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1284349834} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1284349834, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1284349834, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1284349834, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-1284349834|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1284349834} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 11:04:05,700 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L776-->L776-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-446528338 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd2~0_In-446528338 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd2~0_In-446528338 |P1Thread1of1ForFork2_#t~ite13_Out-446528338|)) (and (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite13_Out-446528338|) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-446528338, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-446528338} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-446528338, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-446528338|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-446528338} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 11:04:05,700 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [852] [852] L777-->L777-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In-905626093 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-905626093 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In-905626093 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd2~0_In-905626093 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite14_Out-905626093| 0)) (and (or .cse0 .cse1) (or .cse3 .cse2) (= |P1Thread1of1ForFork2_#t~ite14_Out-905626093| ~z$r_buff1_thd2~0_In-905626093)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-905626093, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-905626093, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-905626093, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-905626093} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-905626093, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-905626093, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-905626093, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-905626093|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-905626093} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 11:04:05,700 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L777-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_71 1) v_~__unbuffered_cnt~0_70) (= v_~z$r_buff1_thd2~0_132 |v_P1Thread1of1ForFork2_#t~ite14_34|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_34|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_132, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_33|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 11:04:05,702 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L801-->L801-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-599707392 256)))) (or (and (not .cse0) (= ~z$w_buff1_used~0_In-599707392 |P2Thread1of1ForFork0_#t~ite30_Out-599707392|) (= |P2Thread1of1ForFork0_#t~ite29_In-599707392| |P2Thread1of1ForFork0_#t~ite29_Out-599707392|)) (and (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-599707392 256)))) (or (and (= (mod ~z$r_buff1_thd3~0_In-599707392 256) 0) .cse1) (and (= 0 (mod ~z$w_buff1_used~0_In-599707392 256)) .cse1) (= (mod ~z$w_buff0_used~0_In-599707392 256) 0))) .cse0 (= ~z$w_buff1_used~0_In-599707392 |P2Thread1of1ForFork0_#t~ite29_Out-599707392|) (= |P2Thread1of1ForFork0_#t~ite30_Out-599707392| |P2Thread1of1ForFork0_#t~ite29_Out-599707392|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-599707392, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-599707392, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-599707392, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-599707392, ~weak$$choice2~0=~weak$$choice2~0_In-599707392, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In-599707392|} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-599707392, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-599707392, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-599707392, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-599707392, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out-599707392|, ~weak$$choice2~0=~weak$$choice2~0_In-599707392, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out-599707392|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 11:04:05,703 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L802-->L803: Formula: (and (not (= (mod v_~weak$$choice2~0_19 256) 0)) (= v_~z$r_buff0_thd3~0_58 v_~z$r_buff0_thd3~0_59)) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_59, ~weak$$choice2~0=v_~weak$$choice2~0_19} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_7|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_58, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_19} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 11:04:05,703 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L805-->L809: Formula: (and (= v_~z~0_56 v_~z$mem_tmp~0_5) (= 0 v_~z$flush_delayed~0_11) (not (= 0 (mod v_~z$flush_delayed~0_12 256)))) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_12} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_11|, ~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_11, ~z~0=v_~z~0_56} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 11:04:05,704 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L809-2-->L809-4: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd3~0_In-581484641 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-581484641 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out-581484641| ~z$w_buff1~0_In-581484641)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite38_Out-581484641| ~z~0_In-581484641)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-581484641, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-581484641, ~z$w_buff1~0=~z$w_buff1~0_In-581484641, ~z~0=~z~0_In-581484641} OutVars{P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-581484641|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-581484641, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-581484641, ~z$w_buff1~0=~z$w_buff1~0_In-581484641, ~z~0=~z~0_In-581484641} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 11:04:05,704 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L809-4-->L810: Formula: (= v_~z~0_38 |v_P2Thread1of1ForFork0_#t~ite38_12|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_12|} OutVars{P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_11|, ~z~0=v_~z~0_38} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38, ~z~0] because there is no mapped edge [2019-12-07 11:04:05,704 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L810-->L810-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In1162385405 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In1162385405 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In1162385405 |P2Thread1of1ForFork0_#t~ite40_Out1162385405|)) (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out1162385405| 0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1162385405, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1162385405} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1162385405, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1162385405|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1162385405} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 11:04:05,704 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L811-->L811-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In-1292827970 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1292827970 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-1292827970 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd3~0_In-1292827970 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork0_#t~ite41_Out-1292827970| ~z$w_buff1_used~0_In-1292827970)) (and (= |P2Thread1of1ForFork0_#t~ite41_Out-1292827970| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1292827970, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1292827970, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1292827970, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1292827970} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1292827970, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1292827970, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1292827970, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1292827970, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1292827970|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 11:04:05,705 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L812-->L812-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1496978720 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-1496978720 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite42_Out-1496978720| 0) (not .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out-1496978720| ~z$r_buff0_thd3~0_In-1496978720) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1496978720, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1496978720} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1496978720, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1496978720, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-1496978720|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 11:04:05,705 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L813-->L813-2: Formula: (let ((.cse2 (= (mod ~z$r_buff0_thd3~0_In1092616056 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In1092616056 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In1092616056 256) 0)) (.cse0 (= (mod ~z$r_buff1_thd3~0_In1092616056 256) 0))) (or (and (= ~z$r_buff1_thd3~0_In1092616056 |P2Thread1of1ForFork0_#t~ite43_Out1092616056|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= |P2Thread1of1ForFork0_#t~ite43_Out1092616056| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1092616056, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1092616056, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1092616056, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1092616056} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out1092616056|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1092616056, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1092616056, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1092616056, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1092616056} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 11:04:05,705 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L813-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_61 1) v_~__unbuffered_cnt~0_60) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~z$r_buff1_thd3~0_188 |v_P2Thread1of1ForFork0_#t~ite43_32|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_31|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_188, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 11:04:05,705 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L836-1-->L842: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 11:04:05,706 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L842-2-->L842-5: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In-915402851 256) 0)) (.cse0 (= (mod ~z$r_buff1_thd0~0_In-915402851 256) 0)) (.cse2 (= |ULTIMATE.start_main_#t~ite47_Out-915402851| |ULTIMATE.start_main_#t~ite48_Out-915402851|))) (or (and (or .cse0 .cse1) .cse2 (= ~z~0_In-915402851 |ULTIMATE.start_main_#t~ite47_Out-915402851|)) (and (not .cse1) (not .cse0) .cse2 (= ~z$w_buff1~0_In-915402851 |ULTIMATE.start_main_#t~ite47_Out-915402851|)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-915402851, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-915402851, ~z$w_buff1~0=~z$w_buff1~0_In-915402851, ~z~0=~z~0_In-915402851} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-915402851, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-915402851|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-915402851, ~z$w_buff1~0=~z$w_buff1~0_In-915402851, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-915402851|, ~z~0=~z~0_In-915402851} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 11:04:05,706 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L843-->L843-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-1045531296 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1045531296 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-1045531296 |ULTIMATE.start_main_#t~ite49_Out-1045531296|)) (and (not .cse1) (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite49_Out-1045531296|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1045531296, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1045531296} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1045531296, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1045531296, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1045531296|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 11:04:05,707 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L844-->L844-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-985975750 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-985975750 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-985975750 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In-985975750 256)))) (or (and (= ~z$w_buff1_used~0_In-985975750 |ULTIMATE.start_main_#t~ite50_Out-985975750|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite50_Out-985975750|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-985975750, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-985975750, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-985975750, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-985975750} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-985975750|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-985975750, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-985975750, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-985975750, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-985975750} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 11:04:05,707 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L845-->L845-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In2124745083 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In2124745083 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite51_Out2124745083|) (not .cse1)) (and (= ~z$r_buff0_thd0~0_In2124745083 |ULTIMATE.start_main_#t~ite51_Out2124745083|) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2124745083, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2124745083} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2124745083, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out2124745083|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2124745083} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 11:04:05,707 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L846-->L846-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff1_used~0_In-525390935 256))) (.cse3 (= (mod ~z$r_buff1_thd0~0_In-525390935 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd0~0_In-525390935 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-525390935 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite52_Out-525390935|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$r_buff1_thd0~0_In-525390935 |ULTIMATE.start_main_#t~ite52_Out-525390935|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-525390935, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-525390935, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-525390935, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-525390935} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-525390935|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-525390935, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-525390935, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-525390935, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-525390935} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 11:04:05,708 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [889] [889] L846-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14| (mod v_~main$tmp_guard1~0_20 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_20 0) (= v_~z$r_buff1_thd0~0_155 |v_ULTIMATE.start_main_#t~ite52_46|) (= v_~main$tmp_guard1~0_20 (ite (= (ite (not (and (= v_~__unbuffered_p2_EBX~0_33 0) (= 0 v_~__unbuffered_p0_EAX~0_114) (= 1 v_~__unbuffered_p1_EAX~0_23) (= v_~__unbuffered_p1_EBX~0_22 0) (= 1 v_~__unbuffered_p2_EAX~0_23))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_20 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_114, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_46|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_22, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_33, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_114, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_45|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_20, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_22, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_33, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_155, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 11:04:05,774 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 11:04:05 BasicIcfg [2019-12-07 11:04:05,774 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 11:04:05,775 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 11:04:05,775 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 11:04:05,775 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 11:04:05,775 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 11:00:45" (3/4) ... [2019-12-07 11:04:05,777 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 11:04:05,777 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [901] [901] ULTIMATE.startENTRY-->L832: Formula: (let ((.cse0 (store |v_#valid_72| 0 0))) (and (= v_~z$r_buff0_thd2~0_185 0) (= 0 v_~x~0_134) (= v_~z$w_buff0_used~0_784 0) (= v_~__unbuffered_p1_EBX~0_36 0) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t62~0.base_32|) (= (store |v_#length_24| |v_ULTIMATE.start_main_~#t62~0.base_32| 4) |v_#length_23|) (= v_~z$read_delayed_var~0.offset_6 0) (= v_~z$w_buff1_used~0_442 0) (= |v_#NULL.offset_7| 0) (= v_~z~0_178 0) (= v_~z$r_buff1_thd0~0_195 0) (= 0 v_~__unbuffered_p1_EAX~0_37) (= 0 |v_ULTIMATE.start_main_~#t62~0.offset_23|) (= v_~z$read_delayed~0_6 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t62~0.base_32|) 0) (= v_~y~0_24 0) (= v_~z$read_delayed_var~0.base_6 0) (< 0 |v_#StackHeapBarrier_18|) (= v_~__unbuffered_p2_EBX~0_41 0) (= 0 v_~__unbuffered_p2_EAX~0_33) (= 0 v_~__unbuffered_cnt~0_87) (= v_~weak$$choice2~0_133 0) (= v_~z$r_buff0_thd1~0_306 0) (= 0 v_~z$flush_delayed~0_26) (= 0 |v_#NULL.base_7|) (= 0 v_~z$r_buff0_thd3~0_400) (= v_~z$w_buff1~0_222 0) (= 0 v_~__unbuffered_p0_EAX~0_142) (= v_~main$tmp_guard0~0_26 0) (= 0 v_~z$r_buff1_thd3~0_306) (= v_~z$mem_tmp~0_15 0) (= 0 v_~weak$$choice0~0_13) (= v_~z$r_buff1_thd1~0_175 0) (= v_~z$r_buff1_thd2~0_185 0) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t62~0.base_32| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t62~0.base_32|) |v_ULTIMATE.start_main_~#t62~0.offset_23| 0)) |v_#memory_int_21|) (= v_~z$w_buff0~0_312 0) (= v_~z$r_buff0_thd0~0_204 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t62~0.base_32| 1) |v_#valid_70|) (= v_~main$tmp_guard1~0_37 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{ULTIMATE.start_main_~#t62~0.offset=|v_ULTIMATE.start_main_~#t62~0.offset_23|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_185, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_42|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_54|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_34|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_68|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_204, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_142, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_37, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_33, ~z$mem_tmp~0=v_~z$mem_tmp~0_15, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_41, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ULTIMATE.start_main_~#t64~0.base=|v_ULTIMATE.start_main_~#t64~0.base_16|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_442, ~z$flush_delayed~0=v_~z$flush_delayed~0_26, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_175, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_400, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_87, ~x~0=v_~x~0_134, ULTIMATE.start_main_~#t63~0.base=|v_ULTIMATE.start_main_~#t63~0.base_29|, ~z$read_delayed~0=v_~z$read_delayed~0_6, ~z$w_buff1~0=v_~z$w_buff1~0_222, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_37, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_62|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_48|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_195, ~y~0=v_~y~0_24, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_185, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_36, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_24|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_784, ~z$w_buff0~0=v_~z$w_buff0~0_312, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_306, ULTIMATE.start_main_~#t64~0.offset=|v_ULTIMATE.start_main_~#t64~0.offset_14|, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_26, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_~#t63~0.offset=|v_ULTIMATE.start_main_~#t63~0.offset_22|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_23|, #valid=|v_#valid_70|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_178, ULTIMATE.start_main_~#t62~0.base=|v_ULTIMATE.start_main_~#t62~0.base_32|, ~weak$$choice2~0=v_~weak$$choice2~0_133, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_306} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t62~0.offset, ~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ULTIMATE.start_main_~#t64~0.base, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t63~0.base, ~z$read_delayed~0, ~z$w_buff1~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ~y~0, ~z$r_buff0_thd2~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ULTIMATE.start_main_~#t64~0.offset, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_~#t63~0.offset, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ULTIMATE.start_main_~#t62~0.base, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 11:04:05,778 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L4-->L750: Formula: (and (= ~z$r_buff1_thd0~0_Out-682432478 ~z$r_buff0_thd0~0_In-682432478) (= ~z$r_buff0_thd1~0_In-682432478 ~z$r_buff1_thd1~0_Out-682432478) (not (= 0 P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-682432478)) (= ~z$r_buff1_thd3~0_Out-682432478 ~z$r_buff0_thd3~0_In-682432478) (= ~z$r_buff0_thd1~0_Out-682432478 1) (= ~z$r_buff0_thd2~0_In-682432478 ~z$r_buff1_thd2~0_Out-682432478) (= ~__unbuffered_p0_EAX~0_Out-682432478 ~x~0_In-682432478)) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-682432478, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-682432478, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-682432478, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-682432478, ~x~0=~x~0_In-682432478, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-682432478} OutVars{~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out-682432478, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-682432478, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_Out-682432478, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_Out-682432478, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_Out-682432478, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_Out-682432478, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-682432478, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-682432478, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-682432478, ~x~0=~x~0_In-682432478, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-682432478} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 11:04:05,778 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L832-1-->L834: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t63~0.offset_10|) (= (select |v_#valid_40| |v_ULTIMATE.start_main_~#t63~0.base_11|) 0) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t63~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t63~0.base_11|) |v_ULTIMATE.start_main_~#t63~0.offset_10| 1)) |v_#memory_int_15|) (= (store |v_#valid_40| |v_ULTIMATE.start_main_~#t63~0.base_11| 1) |v_#valid_39|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t63~0.base_11|) (not (= 0 |v_ULTIMATE.start_main_~#t63~0.base_11|)) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t63~0.base_11| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{ULTIMATE.start_main_~#t63~0.base=|v_ULTIMATE.start_main_~#t63~0.base_11|, #StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_~#t63~0.offset=|v_ULTIMATE.start_main_~#t63~0.offset_10|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_15|, #length=|v_#length_17|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t63~0.base, ULTIMATE.start_main_~#t63~0.offset, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, #length] because there is no mapped edge [2019-12-07 11:04:05,779 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L773-2-->L773-5: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In1366680916 256))) (.cse2 (= 0 (mod ~z$r_buff1_thd2~0_In1366680916 256))) (.cse1 (= |P1Thread1of1ForFork2_#t~ite9_Out1366680916| |P1Thread1of1ForFork2_#t~ite10_Out1366680916|))) (or (and (not .cse0) .cse1 (= |P1Thread1of1ForFork2_#t~ite9_Out1366680916| ~z$w_buff1~0_In1366680916) (not .cse2)) (and (or .cse0 .cse2) .cse1 (= |P1Thread1of1ForFork2_#t~ite9_Out1366680916| ~z~0_In1366680916)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1366680916, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1366680916, ~z$w_buff1~0=~z$w_buff1~0_In1366680916, ~z~0=~z~0_In1366680916} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out1366680916|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In1366680916, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out1366680916|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1366680916, ~z$w_buff1~0=~z$w_buff1~0_In1366680916, ~z~0=~z~0_In1366680916} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 11:04:05,780 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L774-->L774-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd2~0_In1636729312 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In1636729312 256)))) (or (and (not .cse0) (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite11_Out1636729312|)) (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite11_Out1636729312| ~z$w_buff0_used~0_In1636729312)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1636729312, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1636729312} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1636729312, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out1636729312|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1636729312} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 11:04:05,780 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [861] [861] L834-1-->L836: Formula: (and (= 0 |v_ULTIMATE.start_main_~#t64~0.offset_10|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t64~0.base_11| 4)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t64~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t64~0.base_11|) |v_ULTIMATE.start_main_~#t64~0.offset_10| 2)) |v_#memory_int_13|) (not (= |v_ULTIMATE.start_main_~#t64~0.base_11| 0)) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t64~0.base_11|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t64~0.base_11|) (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t64~0.base_11| 1) |v_#valid_31|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_31|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t64~0.base=|v_ULTIMATE.start_main_~#t64~0.base_11|, ULTIMATE.start_main_~#t64~0.offset=|v_ULTIMATE.start_main_~#t64~0.offset_10|, #length=|v_#length_15|} AuxVars[] AssignedVars[#valid, ULTIMATE.start_main_#t~nondet45, #memory_int, ULTIMATE.start_main_~#t64~0.base, ULTIMATE.start_main_~#t64~0.offset, #length] because there is no mapped edge [2019-12-07 11:04:05,782 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L751-->L751-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd1~0_In-632316499 256))) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-632316499 256)))) (or (and (= |P0Thread1of1ForFork1_#t~ite5_Out-632316499| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-632316499 |P0Thread1of1ForFork1_#t~ite5_Out-632316499|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-632316499, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-632316499} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-632316499|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-632316499, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-632316499} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 11:04:05,782 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L752-->L752-2: Formula: (let ((.cse3 (= (mod ~z$w_buff0_used~0_In1300153140 256) 0)) (.cse2 (= (mod ~z$r_buff0_thd1~0_In1300153140 256) 0)) (.cse1 (= 0 (mod ~z$w_buff1_used~0_In1300153140 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd1~0_In1300153140 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= ~z$w_buff1_used~0_In1300153140 |P0Thread1of1ForFork1_#t~ite6_Out1300153140|)) (and (or (and (not .cse3) (not .cse2)) (and (not .cse1) (not .cse0))) (= 0 |P0Thread1of1ForFork1_#t~ite6_Out1300153140|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1300153140, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1300153140, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1300153140, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1300153140} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1300153140, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out1300153140|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1300153140, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1300153140, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1300153140} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 11:04:05,783 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L753-->L754: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd1~0_In1269803582 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In1269803582 256) 0)) (.cse2 (= ~z$r_buff0_thd1~0_Out1269803582 ~z$r_buff0_thd1~0_In1269803582))) (or (and (= ~z$r_buff0_thd1~0_Out1269803582 0) (not .cse0) (not .cse1)) (and .cse0 .cse2) (and .cse1 .cse2))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1269803582, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1269803582} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1269803582, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out1269803582|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out1269803582} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 11:04:05,783 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L754-->L754-2: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In1861823798 256) 0)) (.cse0 (= (mod ~z$r_buff1_thd1~0_In1861823798 256) 0)) (.cse2 (= (mod ~z$w_buff0_used~0_In1861823798 256) 0)) (.cse3 (= (mod ~z$r_buff0_thd1~0_In1861823798 256) 0))) (or (and (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite8_Out1861823798| ~z$r_buff1_thd1~0_In1861823798) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite8_Out1861823798| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1861823798, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1861823798, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1861823798, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1861823798} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out1861823798|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1861823798, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1861823798, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1861823798, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1861823798} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 11:04:05,783 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [865] [865] L754-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~z$r_buff1_thd1~0_78 |v_P0Thread1of1ForFork1_#t~ite8_34|) (= (+ v_~__unbuffered_cnt~0_54 1) v_~__unbuffered_cnt~0_53) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_33|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_78, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_53} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 11:04:05,783 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L775-->L775-2: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In-1284349834 256) 0)) (.cse0 (= (mod ~z$r_buff1_thd2~0_In-1284349834 256) 0)) (.cse2 (= (mod ~z$w_buff0_used~0_In-1284349834 256) 0)) (.cse3 (= 0 (mod ~z$r_buff0_thd2~0_In-1284349834 256)))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite12_Out-1284349834| ~z$w_buff1_used~0_In-1284349834) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite12_Out-1284349834|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1284349834, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1284349834, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1284349834, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1284349834} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1284349834, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-1284349834, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1284349834, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-1284349834|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-1284349834} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 11:04:05,783 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L776-->L776-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In-446528338 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd2~0_In-446528338 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff0_thd2~0_In-446528338 |P1Thread1of1ForFork2_#t~ite13_Out-446528338|)) (and (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite13_Out-446528338|) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-446528338, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-446528338} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-446528338, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-446528338|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-446528338} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 11:04:05,784 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [852] [852] L777-->L777-2: Formula: (let ((.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In-905626093 256))) (.cse1 (= (mod ~z$w_buff0_used~0_In-905626093 256) 0)) (.cse3 (= (mod ~z$w_buff1_used~0_In-905626093 256) 0)) (.cse2 (= 0 (mod ~z$r_buff1_thd2~0_In-905626093 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite14_Out-905626093| 0)) (and (or .cse0 .cse1) (or .cse3 .cse2) (= |P1Thread1of1ForFork2_#t~ite14_Out-905626093| ~z$r_buff1_thd2~0_In-905626093)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-905626093, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-905626093, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-905626093, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-905626093} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-905626093, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-905626093, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-905626093, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out-905626093|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-905626093} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 11:04:05,784 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L777-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_71 1) v_~__unbuffered_cnt~0_70) (= v_~z$r_buff1_thd2~0_132 |v_P1Thread1of1ForFork2_#t~ite14_34|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_34|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_132, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_33|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 11:04:05,786 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L801-->L801-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-599707392 256)))) (or (and (not .cse0) (= ~z$w_buff1_used~0_In-599707392 |P2Thread1of1ForFork0_#t~ite30_Out-599707392|) (= |P2Thread1of1ForFork0_#t~ite29_In-599707392| |P2Thread1of1ForFork0_#t~ite29_Out-599707392|)) (and (let ((.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In-599707392 256)))) (or (and (= (mod ~z$r_buff1_thd3~0_In-599707392 256) 0) .cse1) (and (= 0 (mod ~z$w_buff1_used~0_In-599707392 256)) .cse1) (= (mod ~z$w_buff0_used~0_In-599707392 256) 0))) .cse0 (= ~z$w_buff1_used~0_In-599707392 |P2Thread1of1ForFork0_#t~ite29_Out-599707392|) (= |P2Thread1of1ForFork0_#t~ite30_Out-599707392| |P2Thread1of1ForFork0_#t~ite29_Out-599707392|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-599707392, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-599707392, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-599707392, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-599707392, ~weak$$choice2~0=~weak$$choice2~0_In-599707392, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In-599707392|} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-599707392, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-599707392, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-599707392, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-599707392, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out-599707392|, ~weak$$choice2~0=~weak$$choice2~0_In-599707392, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out-599707392|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 11:04:05,786 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L802-->L803: Formula: (and (not (= (mod v_~weak$$choice2~0_19 256) 0)) (= v_~z$r_buff0_thd3~0_58 v_~z$r_buff0_thd3~0_59)) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_59, ~weak$$choice2~0=v_~weak$$choice2~0_19} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_7|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_58, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_19} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 11:04:05,787 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L805-->L809: Formula: (and (= v_~z~0_56 v_~z$mem_tmp~0_5) (= 0 v_~z$flush_delayed~0_11) (not (= 0 (mod v_~z$flush_delayed~0_12 256)))) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_12} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_11|, ~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_11, ~z~0=v_~z~0_56} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 11:04:05,787 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L809-2-->L809-4: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd3~0_In-581484641 256) 0)) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-581484641 256)))) (or (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite38_Out-581484641| ~z$w_buff1~0_In-581484641)) (and (or .cse1 .cse0) (= |P2Thread1of1ForFork0_#t~ite38_Out-581484641| ~z~0_In-581484641)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-581484641, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-581484641, ~z$w_buff1~0=~z$w_buff1~0_In-581484641, ~z~0=~z~0_In-581484641} OutVars{P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-581484641|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-581484641, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-581484641, ~z$w_buff1~0=~z$w_buff1~0_In-581484641, ~z~0=~z~0_In-581484641} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 11:04:05,787 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L809-4-->L810: Formula: (= v_~z~0_38 |v_P2Thread1of1ForFork0_#t~ite38_12|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_12|} OutVars{P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_11|, ~z~0=v_~z~0_38} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38, ~z~0] because there is no mapped edge [2019-12-07 11:04:05,788 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L810-->L810-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In1162385405 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In1162385405 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In1162385405 |P2Thread1of1ForFork0_#t~ite40_Out1162385405|)) (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite40_Out1162385405| 0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1162385405, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1162385405} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1162385405, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out1162385405|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1162385405} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 11:04:05,788 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L811-->L811-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd3~0_In-1292827970 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1292827970 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-1292827970 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd3~0_In-1292827970 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P2Thread1of1ForFork0_#t~ite41_Out-1292827970| ~z$w_buff1_used~0_In-1292827970)) (and (= |P2Thread1of1ForFork0_#t~ite41_Out-1292827970| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1292827970, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1292827970, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1292827970, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1292827970} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1292827970, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1292827970, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1292827970, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1292827970, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out-1292827970|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 11:04:05,788 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L812-->L812-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-1496978720 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-1496978720 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite42_Out-1496978720| 0) (not .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite42_Out-1496978720| ~z$r_buff0_thd3~0_In-1496978720) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1496978720, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1496978720} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1496978720, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1496978720, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out-1496978720|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 11:04:05,789 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L813-->L813-2: Formula: (let ((.cse2 (= (mod ~z$r_buff0_thd3~0_In1092616056 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In1092616056 256) 0)) (.cse1 (= (mod ~z$w_buff1_used~0_In1092616056 256) 0)) (.cse0 (= (mod ~z$r_buff1_thd3~0_In1092616056 256) 0))) (or (and (= ~z$r_buff1_thd3~0_In1092616056 |P2Thread1of1ForFork0_#t~ite43_Out1092616056|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0))) (= |P2Thread1of1ForFork0_#t~ite43_Out1092616056| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1092616056, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1092616056, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1092616056, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1092616056} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out1092616056|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1092616056, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1092616056, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1092616056, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1092616056} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 11:04:05,789 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L813-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_61 1) v_~__unbuffered_cnt~0_60) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~z$r_buff1_thd3~0_188 |v_P2Thread1of1ForFork0_#t~ite43_32|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_31|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_188, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 11:04:05,789 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L836-1-->L842: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 11:04:05,789 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L842-2-->L842-5: Formula: (let ((.cse1 (= (mod ~z$w_buff1_used~0_In-915402851 256) 0)) (.cse0 (= (mod ~z$r_buff1_thd0~0_In-915402851 256) 0)) (.cse2 (= |ULTIMATE.start_main_#t~ite47_Out-915402851| |ULTIMATE.start_main_#t~ite48_Out-915402851|))) (or (and (or .cse0 .cse1) .cse2 (= ~z~0_In-915402851 |ULTIMATE.start_main_#t~ite47_Out-915402851|)) (and (not .cse1) (not .cse0) .cse2 (= ~z$w_buff1~0_In-915402851 |ULTIMATE.start_main_#t~ite47_Out-915402851|)))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-915402851, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-915402851, ~z$w_buff1~0=~z$w_buff1~0_In-915402851, ~z~0=~z~0_In-915402851} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-915402851, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out-915402851|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-915402851, ~z$w_buff1~0=~z$w_buff1~0_In-915402851, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out-915402851|, ~z~0=~z~0_In-915402851} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 11:04:05,790 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L843-->L843-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-1045531296 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-1045531296 256)))) (or (and (or .cse0 .cse1) (= ~z$w_buff0_used~0_In-1045531296 |ULTIMATE.start_main_#t~ite49_Out-1045531296|)) (and (not .cse1) (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite49_Out-1045531296|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1045531296, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1045531296} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-1045531296, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-1045531296, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1045531296|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 11:04:05,790 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L844-->L844-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In-985975750 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In-985975750 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-985975750 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd0~0_In-985975750 256)))) (or (and (= ~z$w_buff1_used~0_In-985975750 |ULTIMATE.start_main_#t~ite50_Out-985975750|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= 0 |ULTIMATE.start_main_#t~ite50_Out-985975750|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-985975750, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-985975750, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-985975750, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-985975750} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-985975750|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-985975750, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-985975750, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-985975750, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-985975750} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 11:04:05,790 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L845-->L845-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In2124745083 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd0~0_In2124745083 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite51_Out2124745083|) (not .cse1)) (and (= ~z$r_buff0_thd0~0_In2124745083 |ULTIMATE.start_main_#t~ite51_Out2124745083|) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2124745083, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2124745083} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In2124745083, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out2124745083|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In2124745083} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 11:04:05,791 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L846-->L846-2: Formula: (let ((.cse2 (= 0 (mod ~z$w_buff1_used~0_In-525390935 256))) (.cse3 (= (mod ~z$r_buff1_thd0~0_In-525390935 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd0~0_In-525390935 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In-525390935 256)))) (or (and (= 0 |ULTIMATE.start_main_#t~ite52_Out-525390935|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= ~z$r_buff1_thd0~0_In-525390935 |ULTIMATE.start_main_#t~ite52_Out-525390935|) (or .cse2 .cse3) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-525390935, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-525390935, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-525390935, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-525390935} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out-525390935|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-525390935, ~z$w_buff0_used~0=~z$w_buff0_used~0_In-525390935, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In-525390935, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-525390935} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 11:04:05,791 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [889] [889] L846-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14| (mod v_~main$tmp_guard1~0_20 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_20 0) (= v_~z$r_buff1_thd0~0_155 |v_ULTIMATE.start_main_#t~ite52_46|) (= v_~main$tmp_guard1~0_20 (ite (= (ite (not (and (= v_~__unbuffered_p2_EBX~0_33 0) (= 0 v_~__unbuffered_p0_EAX~0_114) (= 1 v_~__unbuffered_p1_EAX~0_23) (= v_~__unbuffered_p1_EBX~0_22 0) (= 1 v_~__unbuffered_p2_EAX~0_23))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_20 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_114, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_46|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_22, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_33, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_114, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_45|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_20, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_22, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_33, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_155, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 11:04:05,860 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_1c83afb5-1802-494f-b286-26cb7debcf5c/bin/utaipan/witness.graphml [2019-12-07 11:04:05,860 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 11:04:05,861 INFO L168 Benchmark]: Toolchain (without parser) took 201537.63 ms. Allocated memory was 1.0 GB in the beginning and 8.8 GB in the end (delta: 7.8 GB). Free memory was 935.5 MB in the beginning and 5.0 GB in the end (delta: -4.0 GB). Peak memory consumption was 3.7 GB. Max. memory is 11.5 GB. [2019-12-07 11:04:05,861 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 955.9 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 11:04:05,862 INFO L168 Benchmark]: CACSL2BoogieTranslator took 381.58 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 99.6 MB). Free memory was 935.5 MB in the beginning and 1.1 GB in the end (delta: -134.5 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. [2019-12-07 11:04:05,862 INFO L168 Benchmark]: Boogie Procedure Inliner took 37.79 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 11:04:05,862 INFO L168 Benchmark]: Boogie Preprocessor took 25.66 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 11:04:05,862 INFO L168 Benchmark]: RCFGBuilder took 411.88 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.2 MB). Peak memory consumption was 56.2 MB. Max. memory is 11.5 GB. [2019-12-07 11:04:05,862 INFO L168 Benchmark]: TraceAbstraction took 200592.46 ms. Allocated memory was 1.1 GB in the beginning and 8.8 GB in the end (delta: 7.7 GB). Free memory was 1.0 GB in the beginning and 5.0 GB in the end (delta: -4.0 GB). Peak memory consumption was 3.7 GB. Max. memory is 11.5 GB. [2019-12-07 11:04:05,863 INFO L168 Benchmark]: Witness Printer took 85.00 ms. Allocated memory is still 8.8 GB. Free memory was 5.0 GB in the beginning and 5.0 GB in the end (delta: 11.2 MB). Peak memory consumption was 11.2 MB. Max. memory is 11.5 GB. [2019-12-07 11:04:05,864 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 1.0 GB. Free memory is still 955.9 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 381.58 ms. Allocated memory was 1.0 GB in the beginning and 1.1 GB in the end (delta: 99.6 MB). Free memory was 935.5 MB in the beginning and 1.1 GB in the end (delta: -134.5 MB). Peak memory consumption was 18.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 37.79 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.66 ms. Allocated memory is still 1.1 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 411.88 ms. Allocated memory is still 1.1 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 56.2 MB). Peak memory consumption was 56.2 MB. Max. memory is 11.5 GB. * TraceAbstraction took 200592.46 ms. Allocated memory was 1.1 GB in the beginning and 8.8 GB in the end (delta: 7.7 GB). Free memory was 1.0 GB in the beginning and 5.0 GB in the end (delta: -4.0 GB). Peak memory consumption was 3.7 GB. Max. memory is 11.5 GB. * Witness Printer took 85.00 ms. Allocated memory is still 8.8 GB. Free memory was 5.0 GB in the beginning and 5.0 GB in the end (delta: 11.2 MB). Peak memory consumption was 11.2 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 178 ProgramPointsBefore, 95 ProgramPointsAfterwards, 215 TransitionsBefore, 107 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 12 FixpointIterations, 35 TrivialSequentialCompositions, 53 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 35 ConcurrentYvCompositions, 29 ChoiceCompositions, 7593 VarBasedMoverChecksPositive, 373 VarBasedMoverChecksNegative, 200 SemBasedMoverChecksPositive, 268 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.0s, 0 MoverChecksTotal, 132619 CheckedPairsTotal, 123 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L832] FCALL, FORK 0 pthread_create(&t62, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L735] 1 z$w_buff1 = z$w_buff0 [L736] 1 z$w_buff0 = 1 [L737] 1 z$w_buff1_used = z$w_buff0_used [L738] 1 z$w_buff0_used = (_Bool)1 [L750] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L834] FCALL, FORK 0 pthread_create(&t63, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L764] 2 x = 1 [L767] 2 __unbuffered_p1_EAX = x [L770] 2 __unbuffered_p1_EBX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L773] EXPR 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L750] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L773] 2 z = z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) [L774] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L836] FCALL, FORK 0 pthread_create(&t64, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L787] 3 y = 1 [L790] 3 __unbuffered_p2_EAX = y [L793] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L794] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L795] 3 z$flush_delayed = weak$$choice2 [L796] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L797] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L797] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L751] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L752] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L775] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L776] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L798] EXPR 3 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0))=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L798] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L799] EXPR 3 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L799] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L800] EXPR 3 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L800] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L801] 3 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L803] EXPR 3 weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L803] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L804] 3 __unbuffered_p2_EBX = z VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L809] 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L810] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L811] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L812] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L842] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L842] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L843] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L844] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L845] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 169 locations, 2 error locations. Result: UNSAFE, OverallTime: 200.4s, OverallIterations: 35, TraceHistogramMax: 1, AutomataDifference: 49.9s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 7564 SDtfs, 8315 SDslu, 27242 SDs, 0 SdLazy, 21803 SolverSat, 355 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 14.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 431 GetRequests, 34 SyntacticMatches, 27 SemanticMatches, 370 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1862 ImplicationChecksByTransitivity, 4.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=238430occurred in iteration=10, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 126.3s AutomataMinimizationTime, 34 MinimizatonAttempts, 407220 StatesRemovedByMinimization, 31 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 2.4s InterpolantComputationTime, 1366 NumberOfCodeBlocks, 1366 NumberOfCodeBlocksAsserted, 35 NumberOfCheckSat, 1265 ConstructedInterpolants, 0 QuantifiedInterpolants, 526437 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 34 InterpolantComputations, 34 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...