./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix003_pso.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_d640facb-7b44-470f-ab0e-f43ce57c2aa6/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_d640facb-7b44-470f-ab0e-f43ce57c2aa6/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_d640facb-7b44-470f-ab0e-f43ce57c2aa6/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_d640facb-7b44-470f-ab0e-f43ce57c2aa6/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix003_pso.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_d640facb-7b44-470f-ab0e-f43ce57c2aa6/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_d640facb-7b44-470f-ab0e-f43ce57c2aa6/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 33b3727f04ced6d73a817a5b8ed8b4184bb59de6 .............................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................. Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 10:14:15,718 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 10:14:15,719 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 10:14:15,727 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 10:14:15,728 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 10:14:15,728 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 10:14:15,729 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 10:14:15,731 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 10:14:15,733 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 10:14:15,733 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 10:14:15,734 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 10:14:15,735 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 10:14:15,735 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 10:14:15,736 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 10:14:15,737 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 10:14:15,738 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 10:14:15,739 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 10:14:15,740 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 10:14:15,741 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 10:14:15,743 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 10:14:15,745 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 10:14:15,745 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 10:14:15,746 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 10:14:15,747 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 10:14:15,749 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 10:14:15,749 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 10:14:15,749 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 10:14:15,750 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 10:14:15,750 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 10:14:15,751 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 10:14:15,751 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 10:14:15,752 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 10:14:15,752 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 10:14:15,753 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 10:14:15,753 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 10:14:15,754 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 10:14:15,754 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 10:14:15,754 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 10:14:15,754 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 10:14:15,755 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 10:14:15,756 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 10:14:15,756 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_d640facb-7b44-470f-ab0e-f43ce57c2aa6/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 10:14:15,769 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 10:14:15,769 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 10:14:15,769 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 10:14:15,770 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 10:14:15,770 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 10:14:15,770 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 10:14:15,770 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 10:14:15,770 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 10:14:15,770 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 10:14:15,770 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 10:14:15,770 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 10:14:15,771 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 10:14:15,771 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 10:14:15,771 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 10:14:15,771 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 10:14:15,772 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 10:14:15,772 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 10:14:15,772 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 10:14:15,772 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 10:14:15,772 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 10:14:15,772 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 10:14:15,772 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 10:14:15,773 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 10:14:15,773 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 10:14:15,773 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 10:14:15,773 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 10:14:15,773 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 10:14:15,773 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 10:14:15,773 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 10:14:15,773 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 10:14:15,773 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 10:14:15,773 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 10:14:15,774 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 10:14:15,774 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 10:14:15,774 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 10:14:15,774 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 10:14:15,774 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 10:14:15,774 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 10:14:15,774 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 10:14:15,774 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 10:14:15,774 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_d640facb-7b44-470f-ab0e-f43ce57c2aa6/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 33b3727f04ced6d73a817a5b8ed8b4184bb59de6 [2019-12-07 10:14:15,878 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 10:14:15,889 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 10:14:15,892 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 10:14:15,893 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 10:14:15,893 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 10:14:15,894 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_d640facb-7b44-470f-ab0e-f43ce57c2aa6/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/mix003_pso.oepc.i [2019-12-07 10:14:15,942 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_d640facb-7b44-470f-ab0e-f43ce57c2aa6/bin/utaipan/data/ae8997ac9/cc76ef32e07042a4a8785c0a73c46468/FLAGe43ec01d9 [2019-12-07 10:14:16,342 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 10:14:16,342 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_d640facb-7b44-470f-ab0e-f43ce57c2aa6/sv-benchmarks/c/pthread-wmm/mix003_pso.oepc.i [2019-12-07 10:14:16,355 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_d640facb-7b44-470f-ab0e-f43ce57c2aa6/bin/utaipan/data/ae8997ac9/cc76ef32e07042a4a8785c0a73c46468/FLAGe43ec01d9 [2019-12-07 10:14:16,718 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_d640facb-7b44-470f-ab0e-f43ce57c2aa6/bin/utaipan/data/ae8997ac9/cc76ef32e07042a4a8785c0a73c46468 [2019-12-07 10:14:16,721 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 10:14:16,723 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 10:14:16,724 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 10:14:16,725 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 10:14:16,729 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 10:14:16,730 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 10:14:16" (1/1) ... [2019-12-07 10:14:16,733 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@46581b5e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:14:16, skipping insertion in model container [2019-12-07 10:14:16,733 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 10:14:16" (1/1) ... [2019-12-07 10:14:16,742 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 10:14:16,780 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 10:14:17,048 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 10:14:17,057 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 10:14:17,103 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 10:14:17,150 INFO L208 MainTranslator]: Completed translation [2019-12-07 10:14:17,151 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:14:17 WrapperNode [2019-12-07 10:14:17,151 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 10:14:17,151 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 10:14:17,151 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 10:14:17,151 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 10:14:17,157 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:14:17" (1/1) ... [2019-12-07 10:14:17,170 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:14:17" (1/1) ... [2019-12-07 10:14:17,187 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 10:14:17,188 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 10:14:17,188 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 10:14:17,188 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 10:14:17,194 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:14:17" (1/1) ... [2019-12-07 10:14:17,194 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:14:17" (1/1) ... [2019-12-07 10:14:17,197 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:14:17" (1/1) ... [2019-12-07 10:14:17,198 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:14:17" (1/1) ... [2019-12-07 10:14:17,205 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:14:17" (1/1) ... [2019-12-07 10:14:17,207 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:14:17" (1/1) ... [2019-12-07 10:14:17,210 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:14:17" (1/1) ... [2019-12-07 10:14:17,213 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 10:14:17,213 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 10:14:17,213 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 10:14:17,213 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 10:14:17,214 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:14:17" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_d640facb-7b44-470f-ab0e-f43ce57c2aa6/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 10:14:17,253 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 10:14:17,254 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 10:14:17,254 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 10:14:17,254 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 10:14:17,254 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 10:14:17,254 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 10:14:17,254 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 10:14:17,254 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 10:14:17,254 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 10:14:17,254 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 10:14:17,254 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 10:14:17,255 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 10:14:17,255 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 10:14:17,256 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 10:14:17,638 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 10:14:17,638 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 10:14:17,639 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:14:17 BoogieIcfgContainer [2019-12-07 10:14:17,639 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 10:14:17,640 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 10:14:17,640 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 10:14:17,642 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 10:14:17,642 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 10:14:16" (1/3) ... [2019-12-07 10:14:17,643 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3f67f0c5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 10:14:17, skipping insertion in model container [2019-12-07 10:14:17,643 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 10:14:17" (2/3) ... [2019-12-07 10:14:17,643 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@3f67f0c5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 10:14:17, skipping insertion in model container [2019-12-07 10:14:17,643 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:14:17" (3/3) ... [2019-12-07 10:14:17,644 INFO L109 eAbstractionObserver]: Analyzing ICFG mix003_pso.oepc.i [2019-12-07 10:14:17,651 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 10:14:17,651 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 10:14:17,656 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 10:14:17,657 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 10:14:17,686 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,687 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,687 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,687 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,687 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,687 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,687 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,688 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,688 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,688 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,688 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,688 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,688 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,689 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,689 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,689 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,689 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,689 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,689 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,689 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,690 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,690 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,690 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,690 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,690 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,690 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,691 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,691 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,691 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,691 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,691 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,692 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,692 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,692 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,692 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,692 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,693 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,693 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,693 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,693 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,693 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,694 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,694 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,694 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,694 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,694 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,694 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,694 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,695 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,695 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,695 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,695 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,695 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,695 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,695 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,695 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,696 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,696 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,696 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,696 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,696 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,696 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,696 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,697 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,697 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,698 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,698 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,698 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,698 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,698 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,698 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,698 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,699 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,699 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,699 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,699 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,699 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,699 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,699 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,699 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,699 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,700 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,700 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,700 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,700 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,700 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,700 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,701 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,701 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,701 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,701 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,701 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,701 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,701 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,702 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,702 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,702 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,702 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,702 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,702 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,703 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,703 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,703 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,703 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,703 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,703 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,703 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,703 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,703 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,704 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,704 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,704 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,704 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,704 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,704 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,704 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,704 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,705 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,705 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,705 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,705 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,705 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,705 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,705 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,705 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,705 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,705 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,706 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,706 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,706 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,706 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,706 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,706 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,706 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,706 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,706 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,706 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,707 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,707 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,707 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,707 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,707 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,707 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,707 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,707 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,707 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,707 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,707 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,708 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,708 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,708 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,708 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,708 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,708 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,708 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,708 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,708 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,709 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,709 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,709 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,709 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,709 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,709 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,709 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,709 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,710 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,710 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,710 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,710 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,710 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,710 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,710 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,710 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,711 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,711 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,711 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,711 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,711 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,711 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,711 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,712 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,712 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 10:14:17,725 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 10:14:17,737 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 10:14:17,737 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 10:14:17,737 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 10:14:17,738 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 10:14:17,738 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 10:14:17,738 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 10:14:17,738 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 10:14:17,738 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 10:14:17,750 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 178 places, 215 transitions [2019-12-07 10:14:17,752 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 215 transitions [2019-12-07 10:14:17,816 INFO L134 PetriNetUnfolder]: 47/212 cut-off events. [2019-12-07 10:14:17,816 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 10:14:17,826 INFO L76 FinitePrefix]: Finished finitePrefix Result has 222 conditions, 212 events. 47/212 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/172 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 10:14:17,842 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 178 places, 215 transitions [2019-12-07 10:14:17,875 INFO L134 PetriNetUnfolder]: 47/212 cut-off events. [2019-12-07 10:14:17,875 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 10:14:17,880 INFO L76 FinitePrefix]: Finished finitePrefix Result has 222 conditions, 212 events. 47/212 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 11. Compared 701 event pairs. 9/172 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 10:14:17,896 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 10:14:17,897 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 10:14:20,806 WARN L192 SmtUtils]: Spent 170.00 ms on a formula simplification. DAG size of input: 95 DAG size of output: 93 [2019-12-07 10:14:21,125 INFO L206 etLargeBlockEncoding]: Checked pairs total: 132619 [2019-12-07 10:14:21,126 INFO L214 etLargeBlockEncoding]: Total number of compositions: 123 [2019-12-07 10:14:21,128 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 95 places, 107 transitions [2019-12-07 10:14:37,530 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 120347 states. [2019-12-07 10:14:37,532 INFO L276 IsEmpty]: Start isEmpty. Operand 120347 states. [2019-12-07 10:14:37,535 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 10:14:37,535 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:14:37,536 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 10:14:37,536 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:14:37,540 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:14:37,540 INFO L82 PathProgramCache]: Analyzing trace with hash 919842, now seen corresponding path program 1 times [2019-12-07 10:14:37,545 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:14:37,546 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [291595086] [2019-12-07 10:14:37,546 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:14:37,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:14:37,679 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:14:37,679 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [291595086] [2019-12-07 10:14:37,680 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:14:37,680 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 10:14:37,681 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [175013787] [2019-12-07 10:14:37,683 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:14:37,684 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:14:37,693 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:14:37,693 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:14:37,694 INFO L87 Difference]: Start difference. First operand 120347 states. Second operand 3 states. [2019-12-07 10:14:38,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:14:38,446 INFO L93 Difference]: Finished difference Result 119613 states and 515253 transitions. [2019-12-07 10:14:38,446 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:14:38,447 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 10:14:38,448 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:14:39,156 INFO L225 Difference]: With dead ends: 119613 [2019-12-07 10:14:39,156 INFO L226 Difference]: Without dead ends: 105755 [2019-12-07 10:14:39,157 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:14:42,990 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105755 states. [2019-12-07 10:14:45,619 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105755 to 105755. [2019-12-07 10:14:45,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105755 states. [2019-12-07 10:14:45,976 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105755 states to 105755 states and 454361 transitions. [2019-12-07 10:14:45,977 INFO L78 Accepts]: Start accepts. Automaton has 105755 states and 454361 transitions. Word has length 3 [2019-12-07 10:14:45,977 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:14:45,977 INFO L462 AbstractCegarLoop]: Abstraction has 105755 states and 454361 transitions. [2019-12-07 10:14:45,977 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:14:45,977 INFO L276 IsEmpty]: Start isEmpty. Operand 105755 states and 454361 transitions. [2019-12-07 10:14:45,980 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 10:14:45,981 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:14:45,981 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:14:45,981 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:14:45,981 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:14:45,981 INFO L82 PathProgramCache]: Analyzing trace with hash 474732739, now seen corresponding path program 1 times [2019-12-07 10:14:45,981 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:14:45,981 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [133051892] [2019-12-07 10:14:45,982 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:14:46,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:14:46,043 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:14:46,043 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [133051892] [2019-12-07 10:14:46,043 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:14:46,044 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:14:46,044 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [19438258] [2019-12-07 10:14:46,045 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:14:46,045 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:14:46,045 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:14:46,045 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:14:46,045 INFO L87 Difference]: Start difference. First operand 105755 states and 454361 transitions. Second operand 4 states. [2019-12-07 10:14:47,295 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:14:47,295 INFO L93 Difference]: Finished difference Result 168845 states and 694815 transitions. [2019-12-07 10:14:47,296 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:14:47,296 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 10:14:47,296 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:14:47,723 INFO L225 Difference]: With dead ends: 168845 [2019-12-07 10:14:47,723 INFO L226 Difference]: Without dead ends: 168747 [2019-12-07 10:14:47,724 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:14:52,923 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168747 states. [2019-12-07 10:14:56,737 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168747 to 153153. [2019-12-07 10:14:56,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 153153 states. [2019-12-07 10:14:57,190 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153153 states to 153153 states and 639357 transitions. [2019-12-07 10:14:57,191 INFO L78 Accepts]: Start accepts. Automaton has 153153 states and 639357 transitions. Word has length 11 [2019-12-07 10:14:57,191 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:14:57,191 INFO L462 AbstractCegarLoop]: Abstraction has 153153 states and 639357 transitions. [2019-12-07 10:14:57,191 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:14:57,191 INFO L276 IsEmpty]: Start isEmpty. Operand 153153 states and 639357 transitions. [2019-12-07 10:14:57,195 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 10:14:57,196 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:14:57,196 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:14:57,196 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:14:57,196 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:14:57,196 INFO L82 PathProgramCache]: Analyzing trace with hash -512415605, now seen corresponding path program 1 times [2019-12-07 10:14:57,196 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:14:57,196 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1887823698] [2019-12-07 10:14:57,196 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:14:57,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:14:57,254 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:14:57,254 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1887823698] [2019-12-07 10:14:57,254 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:14:57,254 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:14:57,254 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [510215907] [2019-12-07 10:14:57,254 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:14:57,255 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:14:57,255 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:14:57,255 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:14:57,255 INFO L87 Difference]: Start difference. First operand 153153 states and 639357 transitions. Second operand 4 states. [2019-12-07 10:14:58,389 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:14:58,389 INFO L93 Difference]: Finished difference Result 220024 states and 896381 transitions. [2019-12-07 10:14:58,390 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:14:58,390 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 10:14:58,390 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:14:59,372 INFO L225 Difference]: With dead ends: 220024 [2019-12-07 10:14:59,372 INFO L226 Difference]: Without dead ends: 219912 [2019-12-07 10:14:59,372 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:15:05,462 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 219912 states. [2019-12-07 10:15:07,841 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 219912 to 183120. [2019-12-07 10:15:07,841 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183120 states. [2019-12-07 10:15:08,610 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183120 states to 183120 states and 760223 transitions. [2019-12-07 10:15:08,610 INFO L78 Accepts]: Start accepts. Automaton has 183120 states and 760223 transitions. Word has length 13 [2019-12-07 10:15:08,611 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:15:08,611 INFO L462 AbstractCegarLoop]: Abstraction has 183120 states and 760223 transitions. [2019-12-07 10:15:08,611 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:15:08,611 INFO L276 IsEmpty]: Start isEmpty. Operand 183120 states and 760223 transitions. [2019-12-07 10:15:08,618 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 10:15:08,618 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:15:08,618 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:15:08,618 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:15:08,618 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:15:08,618 INFO L82 PathProgramCache]: Analyzing trace with hash -1719969010, now seen corresponding path program 1 times [2019-12-07 10:15:08,618 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:15:08,618 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [100511406] [2019-12-07 10:15:08,618 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:15:08,631 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:15:08,659 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:15:08,660 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [100511406] [2019-12-07 10:15:08,660 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:15:08,660 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:15:08,660 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1511518866] [2019-12-07 10:15:08,660 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:15:08,660 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:15:08,660 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:15:08,661 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:15:08,661 INFO L87 Difference]: Start difference. First operand 183120 states and 760223 transitions. Second operand 4 states. [2019-12-07 10:15:09,802 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:15:09,803 INFO L93 Difference]: Finished difference Result 225249 states and 927434 transitions. [2019-12-07 10:15:09,803 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:15:09,803 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 10:15:09,803 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:15:10,386 INFO L225 Difference]: With dead ends: 225249 [2019-12-07 10:15:10,386 INFO L226 Difference]: Without dead ends: 225249 [2019-12-07 10:15:10,387 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:15:18,811 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 225249 states. [2019-12-07 10:15:21,305 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 225249 to 195075. [2019-12-07 10:15:21,305 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 195075 states. [2019-12-07 10:15:21,921 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195075 states to 195075 states and 809283 transitions. [2019-12-07 10:15:21,922 INFO L78 Accepts]: Start accepts. Automaton has 195075 states and 809283 transitions. Word has length 16 [2019-12-07 10:15:21,922 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:15:21,922 INFO L462 AbstractCegarLoop]: Abstraction has 195075 states and 809283 transitions. [2019-12-07 10:15:21,922 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:15:21,922 INFO L276 IsEmpty]: Start isEmpty. Operand 195075 states and 809283 transitions. [2019-12-07 10:15:21,928 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 10:15:21,928 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:15:21,928 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:15:21,928 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:15:21,928 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:15:21,928 INFO L82 PathProgramCache]: Analyzing trace with hash -1720071868, now seen corresponding path program 1 times [2019-12-07 10:15:21,928 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:15:21,928 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1671731195] [2019-12-07 10:15:21,928 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:15:21,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:15:21,952 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:15:21,952 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1671731195] [2019-12-07 10:15:21,952 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:15:21,952 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:15:21,953 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [439583883] [2019-12-07 10:15:21,953 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:15:21,953 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:15:21,953 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:15:21,953 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:15:21,953 INFO L87 Difference]: Start difference. First operand 195075 states and 809283 transitions. Second operand 3 states. [2019-12-07 10:15:23,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:15:23,605 INFO L93 Difference]: Finished difference Result 282572 states and 1168256 transitions. [2019-12-07 10:15:23,606 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:15:23,606 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 16 [2019-12-07 10:15:23,606 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:15:24,328 INFO L225 Difference]: With dead ends: 282572 [2019-12-07 10:15:24,328 INFO L226 Difference]: Without dead ends: 282572 [2019-12-07 10:15:24,329 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:15:30,977 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 282572 states. [2019-12-07 10:15:36,789 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 282572 to 224589. [2019-12-07 10:15:36,790 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 224589 states. [2019-12-07 10:15:37,743 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 224589 states to 224589 states and 936012 transitions. [2019-12-07 10:15:37,743 INFO L78 Accepts]: Start accepts. Automaton has 224589 states and 936012 transitions. Word has length 16 [2019-12-07 10:15:37,743 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:15:37,743 INFO L462 AbstractCegarLoop]: Abstraction has 224589 states and 936012 transitions. [2019-12-07 10:15:37,743 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:15:37,743 INFO L276 IsEmpty]: Start isEmpty. Operand 224589 states and 936012 transitions. [2019-12-07 10:15:37,750 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 10:15:37,750 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:15:37,750 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:15:37,750 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:15:37,750 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:15:37,750 INFO L82 PathProgramCache]: Analyzing trace with hash 759335912, now seen corresponding path program 1 times [2019-12-07 10:15:37,751 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:15:37,751 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1650172916] [2019-12-07 10:15:37,751 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:15:37,763 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:15:37,790 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:15:37,790 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1650172916] [2019-12-07 10:15:37,790 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:15:37,791 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:15:37,791 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1169655336] [2019-12-07 10:15:37,791 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:15:37,791 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:15:37,791 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:15:37,791 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:15:37,791 INFO L87 Difference]: Start difference. First operand 224589 states and 936012 transitions. Second operand 4 states. [2019-12-07 10:15:39,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:15:39,115 INFO L93 Difference]: Finished difference Result 265350 states and 1097413 transitions. [2019-12-07 10:15:39,116 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:15:39,116 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 16 [2019-12-07 10:15:39,116 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:15:39,807 INFO L225 Difference]: With dead ends: 265350 [2019-12-07 10:15:39,807 INFO L226 Difference]: Without dead ends: 265350 [2019-12-07 10:15:39,808 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:15:47,092 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 265350 states. [2019-12-07 10:15:50,159 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 265350 to 227267. [2019-12-07 10:15:50,159 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 227267 states. [2019-12-07 10:15:51,153 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 227267 states to 227267 states and 947978 transitions. [2019-12-07 10:15:51,153 INFO L78 Accepts]: Start accepts. Automaton has 227267 states and 947978 transitions. Word has length 16 [2019-12-07 10:15:51,154 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:15:51,154 INFO L462 AbstractCegarLoop]: Abstraction has 227267 states and 947978 transitions. [2019-12-07 10:15:51,154 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:15:51,154 INFO L276 IsEmpty]: Start isEmpty. Operand 227267 states and 947978 transitions. [2019-12-07 10:15:51,163 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 10:15:51,163 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:15:51,163 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:15:51,164 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:15:51,164 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:15:51,164 INFO L82 PathProgramCache]: Analyzing trace with hash 980787520, now seen corresponding path program 1 times [2019-12-07 10:15:51,164 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:15:51,164 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1114696607] [2019-12-07 10:15:51,164 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:15:51,176 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:15:51,219 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:15:51,220 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1114696607] [2019-12-07 10:15:51,220 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:15:51,220 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:15:51,220 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [722719054] [2019-12-07 10:15:51,221 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:15:51,221 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:15:51,221 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:15:51,221 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:15:51,221 INFO L87 Difference]: Start difference. First operand 227267 states and 947978 transitions. Second operand 3 states. [2019-12-07 10:15:52,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:15:52,243 INFO L93 Difference]: Finished difference Result 227267 states and 938556 transitions. [2019-12-07 10:15:52,244 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:15:52,244 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 10:15:52,244 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:15:55,741 INFO L225 Difference]: With dead ends: 227267 [2019-12-07 10:15:55,741 INFO L226 Difference]: Without dead ends: 227267 [2019-12-07 10:15:55,742 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:16:01,395 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 227267 states. [2019-12-07 10:16:04,204 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 227267 to 223833. [2019-12-07 10:16:04,204 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 223833 states. [2019-12-07 10:16:05,161 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 223833 states to 223833 states and 925814 transitions. [2019-12-07 10:16:05,161 INFO L78 Accepts]: Start accepts. Automaton has 223833 states and 925814 transitions. Word has length 18 [2019-12-07 10:16:05,162 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:16:05,162 INFO L462 AbstractCegarLoop]: Abstraction has 223833 states and 925814 transitions. [2019-12-07 10:16:05,162 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:16:05,162 INFO L276 IsEmpty]: Start isEmpty. Operand 223833 states and 925814 transitions. [2019-12-07 10:16:05,171 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 10:16:05,171 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:16:05,171 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:16:05,171 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:16:05,171 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:16:05,171 INFO L82 PathProgramCache]: Analyzing trace with hash -907604290, now seen corresponding path program 1 times [2019-12-07 10:16:05,172 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:16:05,172 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [939764058] [2019-12-07 10:16:05,172 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:16:05,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:16:05,230 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:16:05,230 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [939764058] [2019-12-07 10:16:05,231 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:16:05,231 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 10:16:05,231 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [905515583] [2019-12-07 10:16:05,231 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:16:05,231 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:16:05,232 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:16:05,232 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:16:05,232 INFO L87 Difference]: Start difference. First operand 223833 states and 925814 transitions. Second operand 3 states. [2019-12-07 10:16:06,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:16:06,220 INFO L93 Difference]: Finished difference Result 227222 states and 936124 transitions. [2019-12-07 10:16:06,221 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:16:06,221 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 10:16:06,221 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:16:06,800 INFO L225 Difference]: With dead ends: 227222 [2019-12-07 10:16:06,800 INFO L226 Difference]: Without dead ends: 227222 [2019-12-07 10:16:06,800 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:16:13,148 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 227222 states. [2019-12-07 10:16:15,927 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 227222 to 223830. [2019-12-07 10:16:15,927 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 223830 states. [2019-12-07 10:16:16,913 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 223830 states to 223830 states and 925802 transitions. [2019-12-07 10:16:16,914 INFO L78 Accepts]: Start accepts. Automaton has 223830 states and 925802 transitions. Word has length 18 [2019-12-07 10:16:16,914 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:16:16,914 INFO L462 AbstractCegarLoop]: Abstraction has 223830 states and 925802 transitions. [2019-12-07 10:16:16,914 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:16:16,914 INFO L276 IsEmpty]: Start isEmpty. Operand 223830 states and 925802 transitions. [2019-12-07 10:16:16,926 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 10:16:16,926 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:16:16,926 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:16:16,926 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:16:16,926 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:16:16,926 INFO L82 PathProgramCache]: Analyzing trace with hash 793088017, now seen corresponding path program 1 times [2019-12-07 10:16:16,926 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:16:16,927 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [510647841] [2019-12-07 10:16:16,927 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:16:16,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:16:16,976 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:16:16,977 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [510647841] [2019-12-07 10:16:16,977 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:16:16,977 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:16:16,977 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [283620510] [2019-12-07 10:16:16,977 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:16:16,977 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:16:16,978 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:16:16,978 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:16:16,978 INFO L87 Difference]: Start difference. First operand 223830 states and 925802 transitions. Second operand 5 states. [2019-12-07 10:16:21,529 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:16:21,529 INFO L93 Difference]: Finished difference Result 327040 states and 1320543 transitions. [2019-12-07 10:16:21,530 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 10:16:21,530 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 19 [2019-12-07 10:16:21,530 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:16:22,327 INFO L225 Difference]: With dead ends: 327040 [2019-12-07 10:16:22,328 INFO L226 Difference]: Without dead ends: 326858 [2019-12-07 10:16:22,328 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 10:16:29,152 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 326858 states. [2019-12-07 10:16:32,819 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 326858 to 238804. [2019-12-07 10:16:32,819 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 238804 states. [2019-12-07 10:16:33,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 238804 states to 238804 states and 984590 transitions. [2019-12-07 10:16:33,901 INFO L78 Accepts]: Start accepts. Automaton has 238804 states and 984590 transitions. Word has length 19 [2019-12-07 10:16:33,901 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:16:33,901 INFO L462 AbstractCegarLoop]: Abstraction has 238804 states and 984590 transitions. [2019-12-07 10:16:33,901 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:16:33,901 INFO L276 IsEmpty]: Start isEmpty. Operand 238804 states and 984590 transitions. [2019-12-07 10:16:33,914 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2019-12-07 10:16:33,914 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:16:33,914 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:16:33,914 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:16:33,914 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:16:33,914 INFO L82 PathProgramCache]: Analyzing trace with hash -1187768320, now seen corresponding path program 1 times [2019-12-07 10:16:33,915 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:16:33,915 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2064512888] [2019-12-07 10:16:33,915 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:16:33,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:16:33,936 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:16:33,937 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2064512888] [2019-12-07 10:16:33,937 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:16:33,937 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:16:33,937 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1211758566] [2019-12-07 10:16:33,937 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:16:33,937 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:16:33,938 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:16:33,938 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:16:33,938 INFO L87 Difference]: Start difference. First operand 238804 states and 984590 transitions. Second operand 3 states. [2019-12-07 10:16:34,080 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:16:34,080 INFO L93 Difference]: Finished difference Result 47432 states and 154279 transitions. [2019-12-07 10:16:34,081 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:16:34,081 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2019-12-07 10:16:34,081 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:16:34,148 INFO L225 Difference]: With dead ends: 47432 [2019-12-07 10:16:34,148 INFO L226 Difference]: Without dead ends: 47432 [2019-12-07 10:16:34,148 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:16:34,381 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47432 states. [2019-12-07 10:16:34,826 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47432 to 47432. [2019-12-07 10:16:34,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47432 states. [2019-12-07 10:16:34,909 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47432 states to 47432 states and 154279 transitions. [2019-12-07 10:16:34,909 INFO L78 Accepts]: Start accepts. Automaton has 47432 states and 154279 transitions. Word has length 19 [2019-12-07 10:16:34,909 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:16:34,909 INFO L462 AbstractCegarLoop]: Abstraction has 47432 states and 154279 transitions. [2019-12-07 10:16:34,909 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:16:34,909 INFO L276 IsEmpty]: Start isEmpty. Operand 47432 states and 154279 transitions. [2019-12-07 10:16:34,917 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 10:16:34,917 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:16:34,917 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:16:34,917 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:16:34,918 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:16:34,918 INFO L82 PathProgramCache]: Analyzing trace with hash -390431288, now seen corresponding path program 1 times [2019-12-07 10:16:34,918 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:16:34,918 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2097887876] [2019-12-07 10:16:34,918 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:16:34,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:16:34,962 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:16:34,962 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2097887876] [2019-12-07 10:16:34,962 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:16:34,963 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:16:34,963 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [629049154] [2019-12-07 10:16:34,963 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:16:34,963 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:16:34,963 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:16:34,963 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:16:34,963 INFO L87 Difference]: Start difference. First operand 47432 states and 154279 transitions. Second operand 5 states. [2019-12-07 10:16:35,426 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:16:35,426 INFO L93 Difference]: Finished difference Result 63875 states and 202791 transitions. [2019-12-07 10:16:35,427 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 10:16:35,427 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 10:16:35,427 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:16:35,521 INFO L225 Difference]: With dead ends: 63875 [2019-12-07 10:16:35,522 INFO L226 Difference]: Without dead ends: 63861 [2019-12-07 10:16:35,522 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 10:16:35,800 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63861 states. [2019-12-07 10:16:36,778 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63861 to 50292. [2019-12-07 10:16:36,779 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50292 states. [2019-12-07 10:16:36,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50292 states to 50292 states and 162986 transitions. [2019-12-07 10:16:36,871 INFO L78 Accepts]: Start accepts. Automaton has 50292 states and 162986 transitions. Word has length 22 [2019-12-07 10:16:36,871 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:16:36,871 INFO L462 AbstractCegarLoop]: Abstraction has 50292 states and 162986 transitions. [2019-12-07 10:16:36,871 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:16:36,871 INFO L276 IsEmpty]: Start isEmpty. Operand 50292 states and 162986 transitions. [2019-12-07 10:16:36,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 10:16:36,877 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:16:36,878 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:16:36,878 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:16:36,878 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:16:36,878 INFO L82 PathProgramCache]: Analyzing trace with hash 2088873634, now seen corresponding path program 1 times [2019-12-07 10:16:36,878 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:16:36,878 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [491234600] [2019-12-07 10:16:36,878 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:16:36,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:16:36,914 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:16:36,915 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [491234600] [2019-12-07 10:16:36,915 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:16:36,915 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:16:36,915 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2032023270] [2019-12-07 10:16:36,915 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:16:36,915 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:16:36,915 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:16:36,915 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:16:36,915 INFO L87 Difference]: Start difference. First operand 50292 states and 162986 transitions. Second operand 5 states. [2019-12-07 10:16:37,357 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:16:37,357 INFO L93 Difference]: Finished difference Result 65915 states and 209832 transitions. [2019-12-07 10:16:37,357 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 10:16:37,357 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2019-12-07 10:16:37,358 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:16:37,456 INFO L225 Difference]: With dead ends: 65915 [2019-12-07 10:16:37,456 INFO L226 Difference]: Without dead ends: 65901 [2019-12-07 10:16:37,457 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2019-12-07 10:16:37,738 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65901 states. [2019-12-07 10:16:38,278 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65901 to 48914. [2019-12-07 10:16:38,278 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48914 states. [2019-12-07 10:16:38,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48914 states to 48914 states and 158771 transitions. [2019-12-07 10:16:38,364 INFO L78 Accepts]: Start accepts. Automaton has 48914 states and 158771 transitions. Word has length 22 [2019-12-07 10:16:38,364 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:16:38,364 INFO L462 AbstractCegarLoop]: Abstraction has 48914 states and 158771 transitions. [2019-12-07 10:16:38,364 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:16:38,364 INFO L276 IsEmpty]: Start isEmpty. Operand 48914 states and 158771 transitions. [2019-12-07 10:16:38,377 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 10:16:38,377 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:16:38,378 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:16:38,378 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:16:38,378 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:16:38,378 INFO L82 PathProgramCache]: Analyzing trace with hash 967503752, now seen corresponding path program 1 times [2019-12-07 10:16:38,378 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:16:38,378 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1946531429] [2019-12-07 10:16:38,378 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:16:38,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:16:38,399 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:16:38,399 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1946531429] [2019-12-07 10:16:38,399 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:16:38,399 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:16:38,400 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1313280847] [2019-12-07 10:16:38,400 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:16:38,400 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:16:38,400 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:16:38,400 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:16:38,400 INFO L87 Difference]: Start difference. First operand 48914 states and 158771 transitions. Second operand 3 states. [2019-12-07 10:16:38,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:16:38,584 INFO L93 Difference]: Finished difference Result 62759 states and 194816 transitions. [2019-12-07 10:16:38,585 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:16:38,585 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2019-12-07 10:16:38,585 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:16:38,677 INFO L225 Difference]: With dead ends: 62759 [2019-12-07 10:16:38,677 INFO L226 Difference]: Without dead ends: 62759 [2019-12-07 10:16:38,678 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:16:38,950 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62759 states. [2019-12-07 10:16:39,795 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62759 to 48438. [2019-12-07 10:16:39,795 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48438 states. [2019-12-07 10:16:39,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48438 states to 48438 states and 150393 transitions. [2019-12-07 10:16:39,872 INFO L78 Accepts]: Start accepts. Automaton has 48438 states and 150393 transitions. Word has length 27 [2019-12-07 10:16:39,872 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:16:39,872 INFO L462 AbstractCegarLoop]: Abstraction has 48438 states and 150393 transitions. [2019-12-07 10:16:39,872 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:16:39,872 INFO L276 IsEmpty]: Start isEmpty. Operand 48438 states and 150393 transitions. [2019-12-07 10:16:39,885 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 10:16:39,885 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:16:39,885 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:16:39,885 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:16:39,885 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:16:39,885 INFO L82 PathProgramCache]: Analyzing trace with hash 196927527, now seen corresponding path program 1 times [2019-12-07 10:16:39,885 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:16:39,886 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1466274958] [2019-12-07 10:16:39,886 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:16:39,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:16:39,920 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:16:39,920 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1466274958] [2019-12-07 10:16:39,920 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:16:39,920 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:16:39,920 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [600272629] [2019-12-07 10:16:39,921 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:16:39,921 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:16:39,921 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:16:39,921 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:16:39,921 INFO L87 Difference]: Start difference. First operand 48438 states and 150393 transitions. Second operand 5 states. [2019-12-07 10:16:40,232 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:16:40,232 INFO L93 Difference]: Finished difference Result 59466 states and 182837 transitions. [2019-12-07 10:16:40,232 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 10:16:40,232 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 27 [2019-12-07 10:16:40,233 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:16:40,307 INFO L225 Difference]: With dead ends: 59466 [2019-12-07 10:16:40,308 INFO L226 Difference]: Without dead ends: 59424 [2019-12-07 10:16:40,308 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:16:40,570 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59424 states. [2019-12-07 10:16:41,100 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59424 to 50589. [2019-12-07 10:16:41,100 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50589 states. [2019-12-07 10:16:41,192 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50589 states to 50589 states and 156953 transitions. [2019-12-07 10:16:41,192 INFO L78 Accepts]: Start accepts. Automaton has 50589 states and 156953 transitions. Word has length 27 [2019-12-07 10:16:41,192 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:16:41,193 INFO L462 AbstractCegarLoop]: Abstraction has 50589 states and 156953 transitions. [2019-12-07 10:16:41,193 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:16:41,193 INFO L276 IsEmpty]: Start isEmpty. Operand 50589 states and 156953 transitions. [2019-12-07 10:16:41,207 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 10:16:41,207 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:16:41,207 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:16:41,207 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:16:41,207 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:16:41,207 INFO L82 PathProgramCache]: Analyzing trace with hash -1188103809, now seen corresponding path program 1 times [2019-12-07 10:16:41,208 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:16:41,208 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1183494643] [2019-12-07 10:16:41,208 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:16:41,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:16:41,239 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:16:41,239 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1183494643] [2019-12-07 10:16:41,239 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:16:41,239 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:16:41,240 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [302594320] [2019-12-07 10:16:41,240 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:16:41,240 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:16:41,240 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:16:41,240 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:16:41,240 INFO L87 Difference]: Start difference. First operand 50589 states and 156953 transitions. Second operand 5 states. [2019-12-07 10:16:41,663 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:16:41,663 INFO L93 Difference]: Finished difference Result 61327 states and 188389 transitions. [2019-12-07 10:16:41,663 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 10:16:41,663 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 10:16:41,664 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:16:41,742 INFO L225 Difference]: With dead ends: 61327 [2019-12-07 10:16:41,742 INFO L226 Difference]: Without dead ends: 61283 [2019-12-07 10:16:41,742 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:16:42,008 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61283 states. [2019-12-07 10:16:42,514 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61283 to 50396. [2019-12-07 10:16:42,515 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50396 states. [2019-12-07 10:16:42,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50396 states to 50396 states and 156269 transitions. [2019-12-07 10:16:42,606 INFO L78 Accepts]: Start accepts. Automaton has 50396 states and 156269 transitions. Word has length 28 [2019-12-07 10:16:42,606 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:16:42,606 INFO L462 AbstractCegarLoop]: Abstraction has 50396 states and 156269 transitions. [2019-12-07 10:16:42,606 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:16:42,606 INFO L276 IsEmpty]: Start isEmpty. Operand 50396 states and 156269 transitions. [2019-12-07 10:16:42,618 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 10:16:42,619 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:16:42,619 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:16:42,619 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:16:42,619 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:16:42,619 INFO L82 PathProgramCache]: Analyzing trace with hash -175678458, now seen corresponding path program 1 times [2019-12-07 10:16:42,619 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:16:42,619 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1187453734] [2019-12-07 10:16:42,619 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:16:42,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:16:42,667 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:16:42,667 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1187453734] [2019-12-07 10:16:42,667 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:16:42,667 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:16:42,667 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [125112003] [2019-12-07 10:16:42,667 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:16:42,667 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:16:42,668 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:16:42,668 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:16:42,668 INFO L87 Difference]: Start difference. First operand 50396 states and 156269 transitions. Second operand 4 states. [2019-12-07 10:16:42,824 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:16:42,824 INFO L93 Difference]: Finished difference Result 50543 states and 156515 transitions. [2019-12-07 10:16:42,824 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 10:16:42,825 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 10:16:42,825 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:16:42,896 INFO L225 Difference]: With dead ends: 50543 [2019-12-07 10:16:42,897 INFO L226 Difference]: Without dead ends: 50543 [2019-12-07 10:16:42,897 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:16:43,136 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50543 states. [2019-12-07 10:16:43,620 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50543 to 50343. [2019-12-07 10:16:43,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50343 states. [2019-12-07 10:16:43,713 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50343 states to 50343 states and 156111 transitions. [2019-12-07 10:16:43,713 INFO L78 Accepts]: Start accepts. Automaton has 50343 states and 156111 transitions. Word has length 29 [2019-12-07 10:16:43,713 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:16:43,713 INFO L462 AbstractCegarLoop]: Abstraction has 50343 states and 156111 transitions. [2019-12-07 10:16:43,713 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:16:43,713 INFO L276 IsEmpty]: Start isEmpty. Operand 50343 states and 156111 transitions. [2019-12-07 10:16:43,728 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2019-12-07 10:16:43,728 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:16:43,728 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:16:43,729 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:16:43,729 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:16:43,729 INFO L82 PathProgramCache]: Analyzing trace with hash -502361435, now seen corresponding path program 1 times [2019-12-07 10:16:43,729 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:16:43,729 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1565686352] [2019-12-07 10:16:43,729 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:16:43,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:16:43,793 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:16:43,793 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1565686352] [2019-12-07 10:16:43,793 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:16:43,794 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:16:43,794 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1833486019] [2019-12-07 10:16:43,794 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:16:43,794 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:16:43,794 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:16:43,794 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:16:43,794 INFO L87 Difference]: Start difference. First operand 50343 states and 156111 transitions. Second operand 4 states. [2019-12-07 10:16:43,985 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:16:43,985 INFO L93 Difference]: Finished difference Result 50455 states and 156241 transitions. [2019-12-07 10:16:43,986 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 10:16:43,986 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2019-12-07 10:16:43,986 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:16:44,059 INFO L225 Difference]: With dead ends: 50455 [2019-12-07 10:16:44,059 INFO L226 Difference]: Without dead ends: 50455 [2019-12-07 10:16:44,059 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:16:44,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50455 states. [2019-12-07 10:16:44,780 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50455 to 50255. [2019-12-07 10:16:44,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50255 states. [2019-12-07 10:16:44,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50255 states to 50255 states and 155837 transitions. [2019-12-07 10:16:44,871 INFO L78 Accepts]: Start accepts. Automaton has 50255 states and 155837 transitions. Word has length 30 [2019-12-07 10:16:44,872 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:16:44,872 INFO L462 AbstractCegarLoop]: Abstraction has 50255 states and 155837 transitions. [2019-12-07 10:16:44,872 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:16:44,872 INFO L276 IsEmpty]: Start isEmpty. Operand 50255 states and 155837 transitions. [2019-12-07 10:16:44,888 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2019-12-07 10:16:44,889 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:16:44,889 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:16:44,889 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:16:44,889 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:16:44,889 INFO L82 PathProgramCache]: Analyzing trace with hash 623425171, now seen corresponding path program 1 times [2019-12-07 10:16:44,889 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:16:44,889 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [515849170] [2019-12-07 10:16:44,889 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:16:44,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:16:44,924 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:16:44,924 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [515849170] [2019-12-07 10:16:44,924 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:16:44,924 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:16:44,924 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1859761833] [2019-12-07 10:16:44,925 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:16:44,925 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:16:44,925 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:16:44,925 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:16:44,925 INFO L87 Difference]: Start difference. First operand 50255 states and 155837 transitions. Second operand 4 states. [2019-12-07 10:16:44,988 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:16:44,988 INFO L93 Difference]: Finished difference Result 19537 states and 57983 transitions. [2019-12-07 10:16:44,989 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 10:16:44,989 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 31 [2019-12-07 10:16:44,989 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:16:45,010 INFO L225 Difference]: With dead ends: 19537 [2019-12-07 10:16:45,010 INFO L226 Difference]: Without dead ends: 19537 [2019-12-07 10:16:45,010 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:16:45,090 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19537 states. [2019-12-07 10:16:45,244 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19537 to 18347. [2019-12-07 10:16:45,244 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18347 states. [2019-12-07 10:16:45,271 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18347 states to 18347 states and 54527 transitions. [2019-12-07 10:16:45,271 INFO L78 Accepts]: Start accepts. Automaton has 18347 states and 54527 transitions. Word has length 31 [2019-12-07 10:16:45,271 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:16:45,271 INFO L462 AbstractCegarLoop]: Abstraction has 18347 states and 54527 transitions. [2019-12-07 10:16:45,272 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:16:45,272 INFO L276 IsEmpty]: Start isEmpty. Operand 18347 states and 54527 transitions. [2019-12-07 10:16:45,284 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 10:16:45,284 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:16:45,284 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:16:45,285 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:16:45,285 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:16:45,285 INFO L82 PathProgramCache]: Analyzing trace with hash 1042720045, now seen corresponding path program 1 times [2019-12-07 10:16:45,285 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:16:45,285 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1046782902] [2019-12-07 10:16:45,285 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:16:45,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:16:45,318 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:16:45,318 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1046782902] [2019-12-07 10:16:45,318 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:16:45,318 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 10:16:45,318 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1469194232] [2019-12-07 10:16:45,318 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 10:16:45,318 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:16:45,318 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 10:16:45,319 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 10:16:45,319 INFO L87 Difference]: Start difference. First operand 18347 states and 54527 transitions. Second operand 6 states. [2019-12-07 10:16:45,703 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:16:45,703 INFO L93 Difference]: Finished difference Result 23133 states and 67936 transitions. [2019-12-07 10:16:45,703 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 10:16:45,703 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 33 [2019-12-07 10:16:45,703 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:16:45,726 INFO L225 Difference]: With dead ends: 23133 [2019-12-07 10:16:45,726 INFO L226 Difference]: Without dead ends: 23133 [2019-12-07 10:16:45,726 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 10:16:45,814 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23133 states. [2019-12-07 10:16:45,983 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23133 to 18515. [2019-12-07 10:16:45,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18515 states. [2019-12-07 10:16:46,010 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18515 states to 18515 states and 55057 transitions. [2019-12-07 10:16:46,010 INFO L78 Accepts]: Start accepts. Automaton has 18515 states and 55057 transitions. Word has length 33 [2019-12-07 10:16:46,010 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:16:46,010 INFO L462 AbstractCegarLoop]: Abstraction has 18515 states and 55057 transitions. [2019-12-07 10:16:46,011 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 10:16:46,011 INFO L276 IsEmpty]: Start isEmpty. Operand 18515 states and 55057 transitions. [2019-12-07 10:16:46,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2019-12-07 10:16:46,023 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:16:46,023 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:16:46,023 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:16:46,023 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:16:46,023 INFO L82 PathProgramCache]: Analyzing trace with hash -738339527, now seen corresponding path program 1 times [2019-12-07 10:16:46,023 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:16:46,023 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [956445578] [2019-12-07 10:16:46,023 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:16:46,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:16:46,062 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:16:46,063 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [956445578] [2019-12-07 10:16:46,063 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:16:46,063 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 10:16:46,063 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1005828159] [2019-12-07 10:16:46,063 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 10:16:46,063 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:16:46,064 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 10:16:46,064 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 10:16:46,064 INFO L87 Difference]: Start difference. First operand 18515 states and 55057 transitions. Second operand 6 states. [2019-12-07 10:16:46,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:16:46,486 INFO L93 Difference]: Finished difference Result 22604 states and 66411 transitions. [2019-12-07 10:16:46,487 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2019-12-07 10:16:46,487 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2019-12-07 10:16:46,487 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:16:46,512 INFO L225 Difference]: With dead ends: 22604 [2019-12-07 10:16:46,512 INFO L226 Difference]: Without dead ends: 22604 [2019-12-07 10:16:46,512 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=111, Unknown=0, NotChecked=0, Total=156 [2019-12-07 10:16:46,601 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22604 states. [2019-12-07 10:16:46,764 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22604 to 17798. [2019-12-07 10:16:46,764 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17798 states. [2019-12-07 10:16:46,792 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17798 states to 17798 states and 52944 transitions. [2019-12-07 10:16:46,792 INFO L78 Accepts]: Start accepts. Automaton has 17798 states and 52944 transitions. Word has length 34 [2019-12-07 10:16:46,792 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:16:46,792 INFO L462 AbstractCegarLoop]: Abstraction has 17798 states and 52944 transitions. [2019-12-07 10:16:46,792 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 10:16:46,793 INFO L276 IsEmpty]: Start isEmpty. Operand 17798 states and 52944 transitions. [2019-12-07 10:16:46,808 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 10:16:46,808 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:16:46,808 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:16:46,808 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:16:46,808 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:16:46,809 INFO L82 PathProgramCache]: Analyzing trace with hash -935567252, now seen corresponding path program 1 times [2019-12-07 10:16:46,809 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:16:46,809 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1480917813] [2019-12-07 10:16:46,809 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:16:46,818 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:16:46,838 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:16:46,838 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1480917813] [2019-12-07 10:16:46,838 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:16:46,838 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 10:16:46,839 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [213267872] [2019-12-07 10:16:46,839 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 10:16:46,839 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:16:46,839 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 10:16:46,839 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:16:46,839 INFO L87 Difference]: Start difference. First operand 17798 states and 52944 transitions. Second operand 3 states. [2019-12-07 10:16:46,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:16:46,902 INFO L93 Difference]: Finished difference Result 17798 states and 52256 transitions. [2019-12-07 10:16:46,902 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:16:46,902 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 41 [2019-12-07 10:16:46,902 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:16:46,921 INFO L225 Difference]: With dead ends: 17798 [2019-12-07 10:16:46,921 INFO L226 Difference]: Without dead ends: 17798 [2019-12-07 10:16:46,922 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 10:16:47,002 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17798 states. [2019-12-07 10:16:47,144 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17798 to 17524. [2019-12-07 10:16:47,145 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 17524 states. [2019-12-07 10:16:47,170 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17524 states to 17524 states and 51488 transitions. [2019-12-07 10:16:47,170 INFO L78 Accepts]: Start accepts. Automaton has 17524 states and 51488 transitions. Word has length 41 [2019-12-07 10:16:47,170 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:16:47,170 INFO L462 AbstractCegarLoop]: Abstraction has 17524 states and 51488 transitions. [2019-12-07 10:16:47,170 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 10:16:47,170 INFO L276 IsEmpty]: Start isEmpty. Operand 17524 states and 51488 transitions. [2019-12-07 10:16:47,183 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2019-12-07 10:16:47,183 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:16:47,184 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:16:47,184 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:16:47,184 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:16:47,184 INFO L82 PathProgramCache]: Analyzing trace with hash 936590377, now seen corresponding path program 1 times [2019-12-07 10:16:47,184 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:16:47,184 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1491778105] [2019-12-07 10:16:47,184 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:16:47,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:16:47,221 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:16:47,222 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1491778105] [2019-12-07 10:16:47,222 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:16:47,222 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 10:16:47,222 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1304212119] [2019-12-07 10:16:47,222 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 10:16:47,223 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:16:47,223 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 10:16:47,223 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:16:47,223 INFO L87 Difference]: Start difference. First operand 17524 states and 51488 transitions. Second operand 5 states. [2019-12-07 10:16:47,283 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:16:47,283 INFO L93 Difference]: Finished difference Result 16109 states and 48466 transitions. [2019-12-07 10:16:47,283 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 10:16:47,283 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2019-12-07 10:16:47,284 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:16:47,302 INFO L225 Difference]: With dead ends: 16109 [2019-12-07 10:16:47,303 INFO L226 Difference]: Without dead ends: 16109 [2019-12-07 10:16:47,303 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:16:47,377 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16109 states. [2019-12-07 10:16:47,504 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16109 to 14604. [2019-12-07 10:16:47,505 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 14604 states. [2019-12-07 10:16:47,527 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14604 states to 14604 states and 44151 transitions. [2019-12-07 10:16:47,527 INFO L78 Accepts]: Start accepts. Automaton has 14604 states and 44151 transitions. Word has length 42 [2019-12-07 10:16:47,527 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:16:47,527 INFO L462 AbstractCegarLoop]: Abstraction has 14604 states and 44151 transitions. [2019-12-07 10:16:47,527 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 10:16:47,527 INFO L276 IsEmpty]: Start isEmpty. Operand 14604 states and 44151 transitions. [2019-12-07 10:16:47,539 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 10:16:47,539 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:16:47,539 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:16:47,539 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:16:47,540 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:16:47,540 INFO L82 PathProgramCache]: Analyzing trace with hash 1653836464, now seen corresponding path program 1 times [2019-12-07 10:16:47,540 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:16:47,540 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1847606841] [2019-12-07 10:16:47,540 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:16:47,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:16:47,675 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:16:47,675 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1847606841] [2019-12-07 10:16:47,675 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:16:47,675 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2019-12-07 10:16:47,675 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [13977918] [2019-12-07 10:16:47,675 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 10:16:47,676 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:16:47,676 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 10:16:47,676 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2019-12-07 10:16:47,676 INFO L87 Difference]: Start difference. First operand 14604 states and 44151 transitions. Second operand 11 states. [2019-12-07 10:16:49,460 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:16:49,460 INFO L93 Difference]: Finished difference Result 29672 states and 87910 transitions. [2019-12-07 10:16:49,460 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-12-07 10:16:49,460 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2019-12-07 10:16:49,460 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:16:49,492 INFO L225 Difference]: With dead ends: 29672 [2019-12-07 10:16:49,492 INFO L226 Difference]: Without dead ends: 29672 [2019-12-07 10:16:49,492 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 170 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=179, Invalid=691, Unknown=0, NotChecked=0, Total=870 [2019-12-07 10:16:49,594 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29672 states. [2019-12-07 10:16:49,855 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29672 to 19520. [2019-12-07 10:16:49,855 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19520 states. [2019-12-07 10:16:49,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19520 states to 19520 states and 58800 transitions. [2019-12-07 10:16:49,880 INFO L78 Accepts]: Start accepts. Automaton has 19520 states and 58800 transitions. Word has length 66 [2019-12-07 10:16:49,880 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:16:49,881 INFO L462 AbstractCegarLoop]: Abstraction has 19520 states and 58800 transitions. [2019-12-07 10:16:49,881 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 10:16:49,881 INFO L276 IsEmpty]: Start isEmpty. Operand 19520 states and 58800 transitions. [2019-12-07 10:16:49,895 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 10:16:49,895 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:16:49,895 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:16:49,895 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:16:49,896 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:16:49,896 INFO L82 PathProgramCache]: Analyzing trace with hash 1461344798, now seen corresponding path program 2 times [2019-12-07 10:16:49,896 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:16:49,896 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [195724627] [2019-12-07 10:16:49,896 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:16:49,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:16:50,072 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:16:50,072 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [195724627] [2019-12-07 10:16:50,073 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:16:50,073 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 10:16:50,073 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [419445058] [2019-12-07 10:16:50,073 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 10:16:50,073 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:16:50,073 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 10:16:50,074 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2019-12-07 10:16:50,074 INFO L87 Difference]: Start difference. First operand 19520 states and 58800 transitions. Second operand 11 states. [2019-12-07 10:16:51,840 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:16:51,840 INFO L93 Difference]: Finished difference Result 34988 states and 105502 transitions. [2019-12-07 10:16:51,841 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 10:16:51,841 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2019-12-07 10:16:51,841 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:16:51,872 INFO L225 Difference]: With dead ends: 34988 [2019-12-07 10:16:51,872 INFO L226 Difference]: Without dead ends: 25424 [2019-12-07 10:16:51,872 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 25 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 107 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=129, Invalid=521, Unknown=0, NotChecked=0, Total=650 [2019-12-07 10:16:51,965 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25424 states. [2019-12-07 10:16:52,173 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25424 to 21992. [2019-12-07 10:16:52,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21992 states. [2019-12-07 10:16:52,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21992 states to 21992 states and 65779 transitions. [2019-12-07 10:16:52,208 INFO L78 Accepts]: Start accepts. Automaton has 21992 states and 65779 transitions. Word has length 66 [2019-12-07 10:16:52,209 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:16:52,209 INFO L462 AbstractCegarLoop]: Abstraction has 21992 states and 65779 transitions. [2019-12-07 10:16:52,209 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 10:16:52,209 INFO L276 IsEmpty]: Start isEmpty. Operand 21992 states and 65779 transitions. [2019-12-07 10:16:52,229 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 10:16:52,229 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:16:52,229 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:16:52,229 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:16:52,229 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:16:52,229 INFO L82 PathProgramCache]: Analyzing trace with hash 1862643750, now seen corresponding path program 3 times [2019-12-07 10:16:52,229 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:16:52,230 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1765263411] [2019-12-07 10:16:52,230 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:16:52,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:16:52,393 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:16:52,393 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1765263411] [2019-12-07 10:16:52,394 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:16:52,394 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 10:16:52,394 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [497349331] [2019-12-07 10:16:52,394 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 10:16:52,394 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:16:52,394 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 10:16:52,394 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2019-12-07 10:16:52,394 INFO L87 Difference]: Start difference. First operand 21992 states and 65779 transitions. Second operand 12 states. [2019-12-07 10:16:54,255 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:16:54,255 INFO L93 Difference]: Finished difference Result 30772 states and 91126 transitions. [2019-12-07 10:16:54,256 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2019-12-07 10:16:54,256 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 66 [2019-12-07 10:16:54,257 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:16:54,294 INFO L225 Difference]: With dead ends: 30772 [2019-12-07 10:16:54,294 INFO L226 Difference]: Without dead ends: 25250 [2019-12-07 10:16:54,295 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 126 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=143, Invalid=613, Unknown=0, NotChecked=0, Total=756 [2019-12-07 10:16:54,387 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25250 states. [2019-12-07 10:16:54,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25250 to 22034. [2019-12-07 10:16:54,593 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22034 states. [2019-12-07 10:16:54,628 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22034 states to 22034 states and 65822 transitions. [2019-12-07 10:16:54,628 INFO L78 Accepts]: Start accepts. Automaton has 22034 states and 65822 transitions. Word has length 66 [2019-12-07 10:16:54,628 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:16:54,628 INFO L462 AbstractCegarLoop]: Abstraction has 22034 states and 65822 transitions. [2019-12-07 10:16:54,628 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 10:16:54,628 INFO L276 IsEmpty]: Start isEmpty. Operand 22034 states and 65822 transitions. [2019-12-07 10:16:54,647 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 10:16:54,647 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:16:54,647 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:16:54,647 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:16:54,647 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:16:54,648 INFO L82 PathProgramCache]: Analyzing trace with hash 846611000, now seen corresponding path program 4 times [2019-12-07 10:16:54,648 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:16:54,648 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1383561193] [2019-12-07 10:16:54,648 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:16:54,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:16:54,741 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:16:54,741 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1383561193] [2019-12-07 10:16:54,741 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:16:54,741 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 10:16:54,741 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1910966411] [2019-12-07 10:16:54,742 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 10:16:54,742 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:16:54,742 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 10:16:54,742 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-07 10:16:54,742 INFO L87 Difference]: Start difference. First operand 22034 states and 65822 transitions. Second operand 9 states. [2019-12-07 10:16:55,957 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:16:55,957 INFO L93 Difference]: Finished difference Result 38447 states and 113269 transitions. [2019-12-07 10:16:55,957 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 10:16:55,957 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 66 [2019-12-07 10:16:55,958 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:16:56,000 INFO L225 Difference]: With dead ends: 38447 [2019-12-07 10:16:56,000 INFO L226 Difference]: Without dead ends: 38231 [2019-12-07 10:16:56,001 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 128 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=112, Invalid=488, Unknown=0, NotChecked=0, Total=600 [2019-12-07 10:16:56,122 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38231 states. [2019-12-07 10:16:56,399 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38231 to 24252. [2019-12-07 10:16:56,399 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24252 states. [2019-12-07 10:16:56,435 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24252 states to 24252 states and 72407 transitions. [2019-12-07 10:16:56,435 INFO L78 Accepts]: Start accepts. Automaton has 24252 states and 72407 transitions. Word has length 66 [2019-12-07 10:16:56,436 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:16:56,436 INFO L462 AbstractCegarLoop]: Abstraction has 24252 states and 72407 transitions. [2019-12-07 10:16:56,436 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 10:16:56,436 INFO L276 IsEmpty]: Start isEmpty. Operand 24252 states and 72407 transitions. [2019-12-07 10:16:56,455 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 10:16:56,455 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:16:56,455 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:16:56,455 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:16:56,455 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:16:56,455 INFO L82 PathProgramCache]: Analyzing trace with hash 1362505834, now seen corresponding path program 5 times [2019-12-07 10:16:56,456 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:16:56,456 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [286063552] [2019-12-07 10:16:56,456 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:16:56,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:16:56,610 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:16:56,610 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [286063552] [2019-12-07 10:16:56,610 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:16:56,610 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 10:16:56,610 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1385687678] [2019-12-07 10:16:56,610 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 10:16:56,610 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:16:56,611 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 10:16:56,611 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 10:16:56,611 INFO L87 Difference]: Start difference. First operand 24252 states and 72407 transitions. Second operand 10 states. [2019-12-07 10:16:57,415 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:16:57,415 INFO L93 Difference]: Finished difference Result 34959 states and 102792 transitions. [2019-12-07 10:16:57,416 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 10:16:57,416 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 66 [2019-12-07 10:16:57,416 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:16:57,447 INFO L225 Difference]: With dead ends: 34959 [2019-12-07 10:16:57,447 INFO L226 Difference]: Without dead ends: 28934 [2019-12-07 10:16:57,447 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 37 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=73, Invalid=269, Unknown=0, NotChecked=0, Total=342 [2019-12-07 10:16:57,544 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28934 states. [2019-12-07 10:16:57,792 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28934 to 25077. [2019-12-07 10:16:57,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25077 states. [2019-12-07 10:16:57,834 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25077 states to 25077 states and 74408 transitions. [2019-12-07 10:16:57,834 INFO L78 Accepts]: Start accepts. Automaton has 25077 states and 74408 transitions. Word has length 66 [2019-12-07 10:16:57,834 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:16:57,834 INFO L462 AbstractCegarLoop]: Abstraction has 25077 states and 74408 transitions. [2019-12-07 10:16:57,834 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 10:16:57,834 INFO L276 IsEmpty]: Start isEmpty. Operand 25077 states and 74408 transitions. [2019-12-07 10:16:57,858 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 10:16:57,858 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:16:57,858 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:16:57,858 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:16:57,859 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:16:57,859 INFO L82 PathProgramCache]: Analyzing trace with hash 40066062, now seen corresponding path program 6 times [2019-12-07 10:16:57,859 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:16:57,859 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [195087554] [2019-12-07 10:16:57,859 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:16:57,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:16:58,000 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:16:58,000 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [195087554] [2019-12-07 10:16:58,000 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:16:58,000 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 10:16:58,000 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [643342494] [2019-12-07 10:16:58,000 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 10:16:58,000 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:16:58,000 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 10:16:58,001 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 10:16:58,001 INFO L87 Difference]: Start difference. First operand 25077 states and 74408 transitions. Second operand 11 states. [2019-12-07 10:16:58,822 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:16:58,822 INFO L93 Difference]: Finished difference Result 35830 states and 105629 transitions. [2019-12-07 10:16:58,823 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2019-12-07 10:16:58,823 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 66 [2019-12-07 10:16:58,823 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:16:58,864 INFO L225 Difference]: With dead ends: 35830 [2019-12-07 10:16:58,864 INFO L226 Difference]: Without dead ends: 29383 [2019-12-07 10:16:58,865 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 37 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=75, Invalid=305, Unknown=0, NotChecked=0, Total=380 [2019-12-07 10:16:58,968 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29383 states. [2019-12-07 10:16:59,237 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29383 to 24474. [2019-12-07 10:16:59,237 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24474 states. [2019-12-07 10:16:59,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24474 states to 24474 states and 72581 transitions. [2019-12-07 10:16:59,275 INFO L78 Accepts]: Start accepts. Automaton has 24474 states and 72581 transitions. Word has length 66 [2019-12-07 10:16:59,275 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:16:59,275 INFO L462 AbstractCegarLoop]: Abstraction has 24474 states and 72581 transitions. [2019-12-07 10:16:59,275 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 10:16:59,275 INFO L276 IsEmpty]: Start isEmpty. Operand 24474 states and 72581 transitions. [2019-12-07 10:16:59,296 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 10:16:59,296 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:16:59,296 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:16:59,296 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:16:59,297 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:16:59,297 INFO L82 PathProgramCache]: Analyzing trace with hash 132262848, now seen corresponding path program 7 times [2019-12-07 10:16:59,297 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:16:59,297 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2011431854] [2019-12-07 10:16:59,297 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:16:59,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:16:59,462 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:16:59,463 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2011431854] [2019-12-07 10:16:59,463 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:16:59,463 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 10:16:59,463 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [975861444] [2019-12-07 10:16:59,463 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 10:16:59,463 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:16:59,463 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 10:16:59,463 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=108, Unknown=0, NotChecked=0, Total=132 [2019-12-07 10:16:59,463 INFO L87 Difference]: Start difference. First operand 24474 states and 72581 transitions. Second operand 12 states. [2019-12-07 10:17:01,536 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:17:01,536 INFO L93 Difference]: Finished difference Result 67730 states and 202887 transitions. [2019-12-07 10:17:01,536 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2019-12-07 10:17:01,536 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 66 [2019-12-07 10:17:01,536 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:17:01,613 INFO L225 Difference]: With dead ends: 67730 [2019-12-07 10:17:01,613 INFO L226 Difference]: Without dead ends: 60764 [2019-12-07 10:17:01,614 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 490 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=369, Invalid=1523, Unknown=0, NotChecked=0, Total=1892 [2019-12-07 10:17:01,793 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60764 states. [2019-12-07 10:17:02,256 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60764 to 30839. [2019-12-07 10:17:02,256 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30839 states. [2019-12-07 10:17:02,307 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30839 states to 30839 states and 91604 transitions. [2019-12-07 10:17:02,307 INFO L78 Accepts]: Start accepts. Automaton has 30839 states and 91604 transitions. Word has length 66 [2019-12-07 10:17:02,307 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:17:02,308 INFO L462 AbstractCegarLoop]: Abstraction has 30839 states and 91604 transitions. [2019-12-07 10:17:02,308 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 10:17:02,308 INFO L276 IsEmpty]: Start isEmpty. Operand 30839 states and 91604 transitions. [2019-12-07 10:17:02,336 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 10:17:02,336 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:17:02,337 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:17:02,337 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:17:02,337 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:17:02,337 INFO L82 PathProgramCache]: Analyzing trace with hash 277656128, now seen corresponding path program 8 times [2019-12-07 10:17:02,337 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:17:02,337 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [388206263] [2019-12-07 10:17:02,337 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:17:02,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:17:02,465 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:17:02,466 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [388206263] [2019-12-07 10:17:02,466 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:17:02,466 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 10:17:02,466 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2057009565] [2019-12-07 10:17:02,466 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 10:17:02,466 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:17:02,466 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 10:17:02,467 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2019-12-07 10:17:02,467 INFO L87 Difference]: Start difference. First operand 30839 states and 91604 transitions. Second operand 12 states. [2019-12-07 10:17:03,313 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:17:03,313 INFO L93 Difference]: Finished difference Result 59606 states and 175786 transitions. [2019-12-07 10:17:03,313 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-12-07 10:17:03,313 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 66 [2019-12-07 10:17:03,313 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:17:03,363 INFO L225 Difference]: With dead ends: 59606 [2019-12-07 10:17:03,363 INFO L226 Difference]: Without dead ends: 44187 [2019-12-07 10:17:03,363 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 254 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=240, Invalid=950, Unknown=0, NotChecked=0, Total=1190 [2019-12-07 10:17:03,555 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44187 states. [2019-12-07 10:17:03,832 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44187 to 24428. [2019-12-07 10:17:03,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24428 states. [2019-12-07 10:17:03,869 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24428 states to 24428 states and 72035 transitions. [2019-12-07 10:17:03,869 INFO L78 Accepts]: Start accepts. Automaton has 24428 states and 72035 transitions. Word has length 66 [2019-12-07 10:17:03,869 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:17:03,869 INFO L462 AbstractCegarLoop]: Abstraction has 24428 states and 72035 transitions. [2019-12-07 10:17:03,869 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 10:17:03,869 INFO L276 IsEmpty]: Start isEmpty. Operand 24428 states and 72035 transitions. [2019-12-07 10:17:03,889 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 10:17:03,889 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:17:03,889 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:17:03,889 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:17:03,890 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:17:03,890 INFO L82 PathProgramCache]: Analyzing trace with hash -1994986876, now seen corresponding path program 9 times [2019-12-07 10:17:03,890 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:17:03,890 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1925554991] [2019-12-07 10:17:03,890 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:17:03,898 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:17:03,981 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:17:03,981 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1925554991] [2019-12-07 10:17:03,981 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:17:03,981 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 10:17:03,981 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [474065425] [2019-12-07 10:17:03,981 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 10:17:03,981 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:17:03,981 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 10:17:03,981 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=56, Unknown=0, NotChecked=0, Total=72 [2019-12-07 10:17:03,982 INFO L87 Difference]: Start difference. First operand 24428 states and 72035 transitions. Second operand 9 states. [2019-12-07 10:17:05,767 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:17:05,767 INFO L93 Difference]: Finished difference Result 42066 states and 122046 transitions. [2019-12-07 10:17:05,768 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2019-12-07 10:17:05,768 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 66 [2019-12-07 10:17:05,768 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:17:05,813 INFO L225 Difference]: With dead ends: 42066 [2019-12-07 10:17:05,813 INFO L226 Difference]: Without dead ends: 41706 [2019-12-07 10:17:05,814 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 94 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=105, Invalid=447, Unknown=0, NotChecked=0, Total=552 [2019-12-07 10:17:05,945 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41706 states. [2019-12-07 10:17:06,258 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41706 to 24937. [2019-12-07 10:17:06,258 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24937 states. [2019-12-07 10:17:06,300 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24937 states to 24937 states and 73668 transitions. [2019-12-07 10:17:06,300 INFO L78 Accepts]: Start accepts. Automaton has 24937 states and 73668 transitions. Word has length 66 [2019-12-07 10:17:06,300 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:17:06,300 INFO L462 AbstractCegarLoop]: Abstraction has 24937 states and 73668 transitions. [2019-12-07 10:17:06,300 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 10:17:06,300 INFO L276 IsEmpty]: Start isEmpty. Operand 24937 states and 73668 transitions. [2019-12-07 10:17:06,324 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 10:17:06,324 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:17:06,324 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:17:06,325 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:17:06,325 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:17:06,325 INFO L82 PathProgramCache]: Analyzing trace with hash -222742524, now seen corresponding path program 10 times [2019-12-07 10:17:06,325 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:17:06,325 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [50313222] [2019-12-07 10:17:06,325 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:17:06,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:17:06,378 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:17:06,378 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [50313222] [2019-12-07 10:17:06,378 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:17:06,378 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:17:06,378 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2073252974] [2019-12-07 10:17:06,378 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:17:06,378 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:17:06,378 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:17:06,378 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:17:06,379 INFO L87 Difference]: Start difference. First operand 24937 states and 73668 transitions. Second operand 4 states. [2019-12-07 10:17:06,480 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:17:06,480 INFO L93 Difference]: Finished difference Result 28513 states and 84626 transitions. [2019-12-07 10:17:06,480 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 10:17:06,480 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 66 [2019-12-07 10:17:06,481 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:17:06,519 INFO L225 Difference]: With dead ends: 28513 [2019-12-07 10:17:06,519 INFO L226 Difference]: Without dead ends: 28513 [2019-12-07 10:17:06,519 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:17:06,617 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28513 states. [2019-12-07 10:17:06,831 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28513 to 21792. [2019-12-07 10:17:06,831 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21792 states. [2019-12-07 10:17:06,864 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21792 states to 21792 states and 65253 transitions. [2019-12-07 10:17:06,865 INFO L78 Accepts]: Start accepts. Automaton has 21792 states and 65253 transitions. Word has length 66 [2019-12-07 10:17:06,865 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:17:06,865 INFO L462 AbstractCegarLoop]: Abstraction has 21792 states and 65253 transitions. [2019-12-07 10:17:06,865 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:17:06,865 INFO L276 IsEmpty]: Start isEmpty. Operand 21792 states and 65253 transitions. [2019-12-07 10:17:06,883 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:17:06,883 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:17:06,883 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:17:06,883 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:17:06,884 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:17:06,884 INFO L82 PathProgramCache]: Analyzing trace with hash 1758425944, now seen corresponding path program 1 times [2019-12-07 10:17:06,884 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:17:06,884 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1108241210] [2019-12-07 10:17:06,884 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:17:06,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:17:06,962 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:17:06,962 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1108241210] [2019-12-07 10:17:06,963 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:17:06,963 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 10:17:06,963 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [564500420] [2019-12-07 10:17:06,963 INFO L442 AbstractCegarLoop]: Interpolant automaton has 9 states [2019-12-07 10:17:06,963 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:17:06,963 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2019-12-07 10:17:06,963 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2019-12-07 10:17:06,963 INFO L87 Difference]: Start difference. First operand 21792 states and 65253 transitions. Second operand 9 states. [2019-12-07 10:17:08,624 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:17:08,624 INFO L93 Difference]: Finished difference Result 34008 states and 99950 transitions. [2019-12-07 10:17:08,625 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 10:17:08,625 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 67 [2019-12-07 10:17:08,625 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:17:08,671 INFO L225 Difference]: With dead ends: 34008 [2019-12-07 10:17:08,672 INFO L226 Difference]: Without dead ends: 34008 [2019-12-07 10:17:08,672 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 5 SyntacticMatches, 2 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 128 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=112, Invalid=488, Unknown=0, NotChecked=0, Total=600 [2019-12-07 10:17:08,784 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34008 states. [2019-12-07 10:17:09,038 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34008 to 22939. [2019-12-07 10:17:09,038 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22939 states. [2019-12-07 10:17:09,073 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22939 states to 22939 states and 68504 transitions. [2019-12-07 10:17:09,074 INFO L78 Accepts]: Start accepts. Automaton has 22939 states and 68504 transitions. Word has length 67 [2019-12-07 10:17:09,074 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:17:09,074 INFO L462 AbstractCegarLoop]: Abstraction has 22939 states and 68504 transitions. [2019-12-07 10:17:09,074 INFO L463 AbstractCegarLoop]: Interpolant automaton has 9 states. [2019-12-07 10:17:09,074 INFO L276 IsEmpty]: Start isEmpty. Operand 22939 states and 68504 transitions. [2019-12-07 10:17:09,092 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:17:09,092 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:17:09,093 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:17:09,093 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:17:09,093 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:17:09,093 INFO L82 PathProgramCache]: Analyzing trace with hash -917850962, now seen corresponding path program 1 times [2019-12-07 10:17:09,093 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:17:09,093 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [847895511] [2019-12-07 10:17:09,093 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:17:09,105 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:17:09,215 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:17:09,216 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [847895511] [2019-12-07 10:17:09,216 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:17:09,216 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 10:17:09,216 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [353346411] [2019-12-07 10:17:09,216 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 10:17:09,216 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:17:09,216 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 10:17:09,216 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 10:17:09,216 INFO L87 Difference]: Start difference. First operand 22939 states and 68504 transitions. Second operand 11 states. [2019-12-07 10:17:10,393 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:17:10,394 INFO L93 Difference]: Finished difference Result 29659 states and 87511 transitions. [2019-12-07 10:17:10,394 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 10:17:10,395 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 10:17:10,395 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:17:10,436 INFO L225 Difference]: With dead ends: 29659 [2019-12-07 10:17:10,436 INFO L226 Difference]: Without dead ends: 27128 [2019-12-07 10:17:10,437 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=80, Invalid=382, Unknown=0, NotChecked=0, Total=462 [2019-12-07 10:17:10,534 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27128 states. [2019-12-07 10:17:10,757 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27128 to 22923. [2019-12-07 10:17:10,757 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22923 states. [2019-12-07 10:17:10,793 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22923 states to 22923 states and 68448 transitions. [2019-12-07 10:17:10,793 INFO L78 Accepts]: Start accepts. Automaton has 22923 states and 68448 transitions. Word has length 67 [2019-12-07 10:17:10,793 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:17:10,793 INFO L462 AbstractCegarLoop]: Abstraction has 22923 states and 68448 transitions. [2019-12-07 10:17:10,793 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 10:17:10,793 INFO L276 IsEmpty]: Start isEmpty. Operand 22923 states and 68448 transitions. [2019-12-07 10:17:10,811 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:17:10,812 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:17:10,812 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:17:10,812 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:17:10,812 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:17:10,812 INFO L82 PathProgramCache]: Analyzing trace with hash 226014226, now seen corresponding path program 2 times [2019-12-07 10:17:10,812 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:17:10,812 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1768446379] [2019-12-07 10:17:10,812 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:17:10,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:17:10,946 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:17:10,946 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1768446379] [2019-12-07 10:17:10,946 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:17:10,946 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2019-12-07 10:17:10,946 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [542899209] [2019-12-07 10:17:10,946 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 10:17:10,946 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:17:10,946 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 10:17:10,947 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2019-12-07 10:17:10,947 INFO L87 Difference]: Start difference. First operand 22923 states and 68448 transitions. Second operand 12 states. [2019-12-07 10:17:12,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:17:12,230 INFO L93 Difference]: Finished difference Result 44603 states and 133030 transitions. [2019-12-07 10:17:12,231 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2019-12-07 10:17:12,231 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 10:17:12,231 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:17:12,289 INFO L225 Difference]: With dead ends: 44603 [2019-12-07 10:17:12,289 INFO L226 Difference]: Without dead ends: 42480 [2019-12-07 10:17:12,290 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 347 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=270, Invalid=1212, Unknown=0, NotChecked=0, Total=1482 [2019-12-07 10:17:12,421 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42480 states. [2019-12-07 10:17:12,736 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42480 to 23123. [2019-12-07 10:17:12,736 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23123 states. [2019-12-07 10:17:12,772 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23123 states to 23123 states and 68958 transitions. [2019-12-07 10:17:12,772 INFO L78 Accepts]: Start accepts. Automaton has 23123 states and 68958 transitions. Word has length 67 [2019-12-07 10:17:12,772 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:17:12,773 INFO L462 AbstractCegarLoop]: Abstraction has 23123 states and 68958 transitions. [2019-12-07 10:17:12,773 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 10:17:12,773 INFO L276 IsEmpty]: Start isEmpty. Operand 23123 states and 68958 transitions. [2019-12-07 10:17:12,793 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:17:12,793 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:17:12,793 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:17:12,793 INFO L410 AbstractCegarLoop]: === Iteration 36 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:17:12,793 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:17:12,793 INFO L82 PathProgramCache]: Analyzing trace with hash -222673432, now seen corresponding path program 3 times [2019-12-07 10:17:12,793 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:17:12,794 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1817113647] [2019-12-07 10:17:12,794 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:17:12,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:17:13,055 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:17:13,055 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1817113647] [2019-12-07 10:17:13,056 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:17:13,056 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 10:17:13,056 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1895166753] [2019-12-07 10:17:13,056 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 10:17:13,056 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:17:13,056 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 10:17:13,056 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2019-12-07 10:17:13,056 INFO L87 Difference]: Start difference. First operand 23123 states and 68958 transitions. Second operand 15 states. [2019-12-07 10:17:16,632 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:17:16,632 INFO L93 Difference]: Finished difference Result 30519 states and 89600 transitions. [2019-12-07 10:17:16,632 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2019-12-07 10:17:16,632 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 10:17:16,632 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:17:16,665 INFO L225 Difference]: With dead ends: 30519 [2019-12-07 10:17:16,666 INFO L226 Difference]: Without dead ends: 29824 [2019-12-07 10:17:16,666 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 374 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=267, Invalid=1293, Unknown=0, NotChecked=0, Total=1560 [2019-12-07 10:17:16,767 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29824 states. [2019-12-07 10:17:16,998 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29824 to 22819. [2019-12-07 10:17:16,998 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22819 states. [2019-12-07 10:17:17,035 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22819 states to 22819 states and 68158 transitions. [2019-12-07 10:17:17,036 INFO L78 Accepts]: Start accepts. Automaton has 22819 states and 68158 transitions. Word has length 67 [2019-12-07 10:17:17,036 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:17:17,036 INFO L462 AbstractCegarLoop]: Abstraction has 22819 states and 68158 transitions. [2019-12-07 10:17:17,036 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 10:17:17,036 INFO L276 IsEmpty]: Start isEmpty. Operand 22819 states and 68158 transitions. [2019-12-07 10:17:17,056 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:17:17,056 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:17:17,056 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:17:17,056 INFO L410 AbstractCegarLoop]: === Iteration 37 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:17:17,057 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:17:17,057 INFO L82 PathProgramCache]: Analyzing trace with hash 1678845864, now seen corresponding path program 2 times [2019-12-07 10:17:17,057 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:17:17,057 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2014609152] [2019-12-07 10:17:17,057 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:17:17,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:17:17,103 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:17:17,103 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2014609152] [2019-12-07 10:17:17,103 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:17:17,103 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 10:17:17,103 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1928403339] [2019-12-07 10:17:17,104 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 10:17:17,104 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:17:17,104 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 10:17:17,104 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2019-12-07 10:17:17,104 INFO L87 Difference]: Start difference. First operand 22819 states and 68158 transitions. Second operand 6 states. [2019-12-07 10:17:17,625 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:17:17,625 INFO L93 Difference]: Finished difference Result 31494 states and 92612 transitions. [2019-12-07 10:17:17,625 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 10:17:17,625 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 67 [2019-12-07 10:17:17,625 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:17:17,660 INFO L225 Difference]: With dead ends: 31494 [2019-12-07 10:17:17,660 INFO L226 Difference]: Without dead ends: 31494 [2019-12-07 10:17:17,660 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-07 10:17:17,764 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31494 states. [2019-12-07 10:17:18,000 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31494 to 22539. [2019-12-07 10:17:18,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22539 states. [2019-12-07 10:17:18,034 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22539 states to 22539 states and 67002 transitions. [2019-12-07 10:17:18,034 INFO L78 Accepts]: Start accepts. Automaton has 22539 states and 67002 transitions. Word has length 67 [2019-12-07 10:17:18,035 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:17:18,035 INFO L462 AbstractCegarLoop]: Abstraction has 22539 states and 67002 transitions. [2019-12-07 10:17:18,035 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 10:17:18,035 INFO L276 IsEmpty]: Start isEmpty. Operand 22539 states and 67002 transitions. [2019-12-07 10:17:18,052 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:17:18,052 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:17:18,053 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:17:18,053 INFO L410 AbstractCegarLoop]: === Iteration 38 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:17:18,053 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:17:18,053 INFO L82 PathProgramCache]: Analyzing trace with hash -1854775872, now seen corresponding path program 1 times [2019-12-07 10:17:18,053 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:17:18,053 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [974581451] [2019-12-07 10:17:18,053 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:17:18,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:17:18,115 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:17:18,115 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [974581451] [2019-12-07 10:17:18,115 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:17:18,115 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 10:17:18,115 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [707910683] [2019-12-07 10:17:18,115 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 10:17:18,115 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:17:18,116 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 10:17:18,116 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2019-12-07 10:17:18,116 INFO L87 Difference]: Start difference. First operand 22539 states and 67002 transitions. Second operand 8 states. [2019-12-07 10:17:19,461 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:17:19,461 INFO L93 Difference]: Finished difference Result 45926 states and 134137 transitions. [2019-12-07 10:17:19,461 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2019-12-07 10:17:19,461 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 67 [2019-12-07 10:17:19,461 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:17:19,509 INFO L225 Difference]: With dead ends: 45926 [2019-12-07 10:17:19,510 INFO L226 Difference]: Without dead ends: 45926 [2019-12-07 10:17:19,510 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 7 SyntacticMatches, 1 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 196 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=159, Invalid=653, Unknown=0, NotChecked=0, Total=812 [2019-12-07 10:17:19,646 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45926 states. [2019-12-07 10:17:19,950 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45926 to 22458. [2019-12-07 10:17:19,950 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22458 states. [2019-12-07 10:17:19,984 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22458 states to 22458 states and 66992 transitions. [2019-12-07 10:17:19,984 INFO L78 Accepts]: Start accepts. Automaton has 22458 states and 66992 transitions. Word has length 67 [2019-12-07 10:17:19,985 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:17:19,985 INFO L462 AbstractCegarLoop]: Abstraction has 22458 states and 66992 transitions. [2019-12-07 10:17:19,985 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 10:17:19,985 INFO L276 IsEmpty]: Start isEmpty. Operand 22458 states and 66992 transitions. [2019-12-07 10:17:20,002 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:17:20,003 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:17:20,003 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:17:20,003 INFO L410 AbstractCegarLoop]: === Iteration 39 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:17:20,003 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:17:20,003 INFO L82 PathProgramCache]: Analyzing trace with hash 754014176, now seen corresponding path program 4 times [2019-12-07 10:17:20,003 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:17:20,003 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1731260057] [2019-12-07 10:17:20,003 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:17:20,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:17:20,038 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:17:20,038 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1731260057] [2019-12-07 10:17:20,038 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:17:20,038 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 10:17:20,038 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2079339609] [2019-12-07 10:17:20,039 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 10:17:20,039 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:17:20,039 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 10:17:20,039 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 10:17:20,039 INFO L87 Difference]: Start difference. First operand 22458 states and 66992 transitions. Second operand 4 states. [2019-12-07 10:17:20,131 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:17:20,131 INFO L93 Difference]: Finished difference Result 41675 states and 124809 transitions. [2019-12-07 10:17:20,132 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 10:17:20,132 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 10:17:20,132 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:17:20,154 INFO L225 Difference]: With dead ends: 41675 [2019-12-07 10:17:20,154 INFO L226 Difference]: Without dead ends: 21143 [2019-12-07 10:17:20,154 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 10:17:20,236 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21143 states. [2019-12-07 10:17:20,415 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21143 to 21143. [2019-12-07 10:17:20,415 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21143 states. [2019-12-07 10:17:20,448 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21143 states to 21143 states and 63200 transitions. [2019-12-07 10:17:20,449 INFO L78 Accepts]: Start accepts. Automaton has 21143 states and 63200 transitions. Word has length 67 [2019-12-07 10:17:20,449 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:17:20,449 INFO L462 AbstractCegarLoop]: Abstraction has 21143 states and 63200 transitions. [2019-12-07 10:17:20,449 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 10:17:20,449 INFO L276 IsEmpty]: Start isEmpty. Operand 21143 states and 63200 transitions. [2019-12-07 10:17:20,467 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:17:20,467 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:17:20,467 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:17:20,468 INFO L410 AbstractCegarLoop]: === Iteration 40 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:17:20,468 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:17:20,468 INFO L82 PathProgramCache]: Analyzing trace with hash 63997864, now seen corresponding path program 3 times [2019-12-07 10:17:20,468 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:17:20,468 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1703285343] [2019-12-07 10:17:20,468 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:17:20,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:17:20,602 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:17:20,602 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1703285343] [2019-12-07 10:17:20,602 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:17:20,602 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2019-12-07 10:17:20,602 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1655470711] [2019-12-07 10:17:20,602 INFO L442 AbstractCegarLoop]: Interpolant automaton has 12 states [2019-12-07 10:17:20,603 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:17:20,603 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2019-12-07 10:17:20,603 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=102, Unknown=0, NotChecked=0, Total=132 [2019-12-07 10:17:20,603 INFO L87 Difference]: Start difference. First operand 21143 states and 63200 transitions. Second operand 12 states. [2019-12-07 10:17:24,449 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:17:24,450 INFO L93 Difference]: Finished difference Result 36382 states and 106657 transitions. [2019-12-07 10:17:24,450 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2019-12-07 10:17:24,450 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 67 [2019-12-07 10:17:24,451 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:17:24,493 INFO L225 Difference]: With dead ends: 36382 [2019-12-07 10:17:24,494 INFO L226 Difference]: Without dead ends: 36382 [2019-12-07 10:17:24,494 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 192 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=197, Invalid=795, Unknown=0, NotChecked=0, Total=992 [2019-12-07 10:17:24,611 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36382 states. [2019-12-07 10:17:24,899 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36382 to 20619. [2019-12-07 10:17:24,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20619 states. [2019-12-07 10:17:24,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20619 states to 20619 states and 61685 transitions. [2019-12-07 10:17:24,929 INFO L78 Accepts]: Start accepts. Automaton has 20619 states and 61685 transitions. Word has length 67 [2019-12-07 10:17:24,929 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:17:24,929 INFO L462 AbstractCegarLoop]: Abstraction has 20619 states and 61685 transitions. [2019-12-07 10:17:24,929 INFO L463 AbstractCegarLoop]: Interpolant automaton has 12 states. [2019-12-07 10:17:24,929 INFO L276 IsEmpty]: Start isEmpty. Operand 20619 states and 61685 transitions. [2019-12-07 10:17:24,945 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:17:24,946 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:17:24,946 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:17:24,946 INFO L410 AbstractCegarLoop]: === Iteration 41 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:17:24,946 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:17:24,946 INFO L82 PathProgramCache]: Analyzing trace with hash 1827328022, now seen corresponding path program 4 times [2019-12-07 10:17:24,946 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:17:24,946 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [237888434] [2019-12-07 10:17:24,946 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:17:24,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 10:17:25,009 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 10:17:25,009 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [237888434] [2019-12-07 10:17:25,009 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 10:17:25,009 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 10:17:25,009 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1703047399] [2019-12-07 10:17:25,010 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 10:17:25,010 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 10:17:25,010 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 10:17:25,010 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2019-12-07 10:17:25,010 INFO L87 Difference]: Start difference. First operand 20619 states and 61685 transitions. Second operand 6 states. [2019-12-07 10:17:25,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 10:17:25,111 INFO L93 Difference]: Finished difference Result 20416 states and 60826 transitions. [2019-12-07 10:17:25,112 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 10:17:25,112 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 67 [2019-12-07 10:17:25,112 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 10:17:25,133 INFO L225 Difference]: With dead ends: 20416 [2019-12-07 10:17:25,133 INFO L226 Difference]: Without dead ends: 20416 [2019-12-07 10:17:25,133 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 10:17:25,212 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20416 states. [2019-12-07 10:17:25,380 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20416 to 18299. [2019-12-07 10:17:25,380 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18299 states. [2019-12-07 10:17:25,408 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18299 states to 18299 states and 54321 transitions. [2019-12-07 10:17:25,408 INFO L78 Accepts]: Start accepts. Automaton has 18299 states and 54321 transitions. Word has length 67 [2019-12-07 10:17:25,409 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 10:17:25,409 INFO L462 AbstractCegarLoop]: Abstraction has 18299 states and 54321 transitions. [2019-12-07 10:17:25,409 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 10:17:25,409 INFO L276 IsEmpty]: Start isEmpty. Operand 18299 states and 54321 transitions. [2019-12-07 10:17:25,424 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 10:17:25,424 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 10:17:25,424 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 10:17:25,424 INFO L410 AbstractCegarLoop]: === Iteration 42 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 10:17:25,424 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 10:17:25,424 INFO L82 PathProgramCache]: Analyzing trace with hash -1210625396, now seen corresponding path program 5 times [2019-12-07 10:17:25,424 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 10:17:25,425 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1698221905] [2019-12-07 10:17:25,425 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 10:17:25,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 10:17:25,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 10:17:25,507 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 10:17:25,507 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 10:17:25,509 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [901] [901] ULTIMATE.startENTRY-->L832: Formula: (let ((.cse0 (store |v_#valid_72| 0 0))) (and (= v_~z$r_buff0_thd2~0_185 0) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t68~0.base_32|) (= 0 v_~x~0_134) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t68~0.base_32| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t68~0.base_32|) |v_ULTIMATE.start_main_~#t68~0.offset_23| 0)) |v_#memory_int_21|) (= v_~z$w_buff0_used~0_784 0) (= v_~__unbuffered_p1_EBX~0_36 0) (= v_~z$read_delayed_var~0.offset_6 0) (= v_~z$w_buff1_used~0_442 0) (= |v_#NULL.offset_7| 0) (= v_~z~0_178 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t68~0.base_32|)) (= v_~z$r_buff1_thd0~0_195 0) (= 0 v_~__unbuffered_p1_EAX~0_37) (= v_~z$read_delayed~0_6 0) (= v_~y~0_24 0) (= v_~z$read_delayed_var~0.base_6 0) (< 0 |v_#StackHeapBarrier_18|) (= |v_#valid_70| (store .cse0 |v_ULTIMATE.start_main_~#t68~0.base_32| 1)) (= v_~__unbuffered_p2_EBX~0_41 0) (= 0 v_~__unbuffered_p2_EAX~0_33) (= 0 v_~__unbuffered_cnt~0_87) (= v_~weak$$choice2~0_133 0) (= v_~z$r_buff0_thd1~0_306 0) (= 0 v_~z$flush_delayed~0_26) (= 0 |v_#NULL.base_7|) (= 0 v_~z$r_buff0_thd3~0_400) (= v_~z$w_buff1~0_222 0) (= 0 v_~__unbuffered_p0_EAX~0_142) (= |v_ULTIMATE.start_main_~#t68~0.offset_23| 0) (= v_~main$tmp_guard0~0_26 0) (= 0 v_~z$r_buff1_thd3~0_306) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t68~0.base_32| 4)) (= v_~z$mem_tmp~0_15 0) (= 0 v_~weak$$choice0~0_13) (= v_~z$r_buff1_thd1~0_175 0) (= v_~z$r_buff1_thd2~0_185 0) (= v_~z$w_buff0~0_312 0) (= v_~z$r_buff0_thd0~0_204 0) (= v_~main$tmp_guard1~0_37 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_185, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_42|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_54|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_34|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_68|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_204, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_142, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_37, ULTIMATE.start_main_~#t68~0.offset=|v_ULTIMATE.start_main_~#t68~0.offset_23|, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_33, ULTIMATE.start_main_~#t70~0.offset=|v_ULTIMATE.start_main_~#t70~0.offset_14|, ~z$mem_tmp~0=v_~z$mem_tmp~0_15, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_41, ULTIMATE.start_main_~#t70~0.base=|v_ULTIMATE.start_main_~#t70~0.base_16|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_442, ~z$flush_delayed~0=v_~z$flush_delayed~0_26, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_175, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_400, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_87, ~x~0=v_~x~0_134, ~z$read_delayed~0=v_~z$read_delayed~0_6, ~z$w_buff1~0=v_~z$w_buff1~0_222, ULTIMATE.start_main_~#t69~0.offset=|v_ULTIMATE.start_main_~#t69~0.offset_22|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_37, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_62|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_48|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_195, ~y~0=v_~y~0_24, ULTIMATE.start_main_~#t69~0.base=|v_ULTIMATE.start_main_~#t69~0.base_29|, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_185, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_36, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_24|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_784, ~z$w_buff0~0=v_~z$w_buff0~0_312, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_306, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_26, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_~#t68~0.base=|v_ULTIMATE.start_main_~#t68~0.base_32|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_23|, #valid=|v_#valid_70|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_178, ~weak$$choice2~0=v_~weak$$choice2~0_133, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_306} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t68~0.offset, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t70~0.offset, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_~#t70~0.base, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ~z$read_delayed~0, ~z$w_buff1~0, ULTIMATE.start_main_~#t69~0.offset, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ~y~0, ULTIMATE.start_main_~#t69~0.base, ~z$r_buff0_thd2~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_~#t68~0.base, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 10:17:25,510 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L4-->L750: Formula: (and (= ~__unbuffered_p0_EAX~0_Out-124802245 ~x~0_In-124802245) (= ~z$r_buff0_thd1~0_In-124802245 ~z$r_buff1_thd1~0_Out-124802245) (= ~z$r_buff1_thd3~0_Out-124802245 ~z$r_buff0_thd3~0_In-124802245) (= ~z$r_buff0_thd1~0_Out-124802245 1) (= ~z$r_buff1_thd2~0_Out-124802245 ~z$r_buff0_thd2~0_In-124802245) (= ~z$r_buff1_thd0~0_Out-124802245 ~z$r_buff0_thd0~0_In-124802245) (not (= 0 P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-124802245))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-124802245, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-124802245, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-124802245, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-124802245, ~x~0=~x~0_In-124802245, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-124802245} OutVars{~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out-124802245, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-124802245, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_Out-124802245, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_Out-124802245, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_Out-124802245, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_Out-124802245, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-124802245, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-124802245, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-124802245, ~x~0=~x~0_In-124802245, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-124802245} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 10:17:25,510 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L832-1-->L834: Formula: (and (= |v_ULTIMATE.start_main_~#t69~0.offset_10| 0) (= (select |v_#valid_40| |v_ULTIMATE.start_main_~#t69~0.base_11|) 0) (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t69~0.base_11| 1)) (not (= |v_ULTIMATE.start_main_~#t69~0.base_11| 0)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t69~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t69~0.base_11|) |v_ULTIMATE.start_main_~#t69~0.offset_10| 1)) |v_#memory_int_15|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t69~0.base_11|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t69~0.base_11| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t69~0.offset=|v_ULTIMATE.start_main_~#t69~0.offset_10|, #length=|v_#length_17|, ULTIMATE.start_main_~#t69~0.base=|v_ULTIMATE.start_main_~#t69~0.base_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t69~0.offset, #length, ULTIMATE.start_main_~#t69~0.base] because there is no mapped edge [2019-12-07 10:17:25,512 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L773-2-->L773-5: Formula: (let ((.cse2 (= (mod ~z$w_buff1_used~0_In-648599100 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In-648599100 256))) (.cse1 (= |P1Thread1of1ForFork2_#t~ite10_Out-648599100| |P1Thread1of1ForFork2_#t~ite9_Out-648599100|))) (or (and (not .cse0) .cse1 (= ~z$w_buff1~0_In-648599100 |P1Thread1of1ForFork2_#t~ite9_Out-648599100|) (not .cse2)) (and (or .cse2 .cse0) .cse1 (= ~z~0_In-648599100 |P1Thread1of1ForFork2_#t~ite9_Out-648599100|)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-648599100, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-648599100, ~z$w_buff1~0=~z$w_buff1~0_In-648599100, ~z~0=~z~0_In-648599100} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-648599100|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-648599100, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out-648599100|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-648599100, ~z$w_buff1~0=~z$w_buff1~0_In-648599100, ~z~0=~z~0_In-648599100} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 10:17:25,513 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L774-->L774-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In1951686915 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In1951686915 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out1951686915| 0) (not .cse0) (not .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite11_Out1951686915| ~z$w_buff0_used~0_In1951686915) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1951686915, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1951686915} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1951686915, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out1951686915|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1951686915} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 10:17:25,513 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [861] [861] L834-1-->L836: Formula: (and (not (= |v_ULTIMATE.start_main_~#t70~0.base_11| 0)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t70~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t70~0.base_11|) |v_ULTIMATE.start_main_~#t70~0.offset_10| 2)) |v_#memory_int_13|) (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t70~0.base_11| 1) |v_#valid_31|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t70~0.base_11| 4)) (= 0 |v_ULTIMATE.start_main_~#t70~0.offset_10|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t70~0.base_11|) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t70~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t70~0.offset=|v_ULTIMATE.start_main_~#t70~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t70~0.base=|v_ULTIMATE.start_main_~#t70~0.base_11|, #valid=|v_#valid_31|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t70~0.offset, ULTIMATE.start_main_~#t70~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length] because there is no mapped edge [2019-12-07 10:17:25,514 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L751-->L751-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd1~0_In484879535 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In484879535 256)))) (or (and (= ~z$w_buff0_used~0_In484879535 |P0Thread1of1ForFork1_#t~ite5_Out484879535|) (or .cse0 .cse1)) (and (= 0 |P0Thread1of1ForFork1_#t~ite5_Out484879535|) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In484879535, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In484879535} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out484879535|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In484879535, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In484879535} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 10:17:25,515 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L752-->L752-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd1~0_In1301909724 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In1301909724 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In1301909724 256))) (.cse3 (= (mod ~z$r_buff1_thd1~0_In1301909724 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite6_Out1301909724| 0)) (and (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite6_Out1301909724| ~z$w_buff1_used~0_In1301909724) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1301909724, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1301909724, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1301909724, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1301909724} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1301909724, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out1301909724|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1301909724, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1301909724, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1301909724} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 10:17:25,515 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L753-->L754: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In385782779 256))) (.cse2 (= (mod ~z$r_buff0_thd1~0_In385782779 256) 0)) (.cse1 (= ~z$r_buff0_thd1~0_In385782779 ~z$r_buff0_thd1~0_Out385782779))) (or (and .cse0 .cse1) (and (not .cse0) (not .cse2) (= ~z$r_buff0_thd1~0_Out385782779 0)) (and .cse2 .cse1))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In385782779, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In385782779} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In385782779, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out385782779|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out385782779} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 10:17:25,515 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L754-->L754-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In162130150 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd1~0_In162130150 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd1~0_In162130150 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In162130150 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite8_Out162130150| 0)) (and (or .cse1 .cse0) (or .cse3 .cse2) (= |P0Thread1of1ForFork1_#t~ite8_Out162130150| ~z$r_buff1_thd1~0_In162130150)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In162130150, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In162130150, ~z$w_buff1_used~0=~z$w_buff1_used~0_In162130150, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In162130150} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out162130150|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In162130150, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In162130150, ~z$w_buff1_used~0=~z$w_buff1_used~0_In162130150, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In162130150} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 10:17:25,515 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [865] [865] L754-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~z$r_buff1_thd1~0_78 |v_P0Thread1of1ForFork1_#t~ite8_34|) (= (+ v_~__unbuffered_cnt~0_54 1) v_~__unbuffered_cnt~0_53) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_33|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_78, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_53} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 10:17:25,515 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L775-->L775-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd2~0_In-616689446 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-616689446 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd2~0_In-616689446 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-616689446 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite12_Out-616689446| 0)) (and (or .cse1 .cse0) (or .cse3 .cse2) (= ~z$w_buff1_used~0_In-616689446 |P1Thread1of1ForFork2_#t~ite12_Out-616689446|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-616689446, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-616689446, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-616689446, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-616689446} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-616689446, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-616689446, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-616689446, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-616689446|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-616689446} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 10:17:25,516 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L776-->L776-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In-361323778 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-361323778 256)))) (or (and (= ~z$r_buff0_thd2~0_In-361323778 |P1Thread1of1ForFork2_#t~ite13_Out-361323778|) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite13_Out-361323778|) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-361323778, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-361323778} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-361323778, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-361323778|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-361323778} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 10:17:25,516 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [852] [852] L777-->L777-2: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd2~0_In2089498578 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In2089498578 256) 0)) (.cse3 (= (mod ~z$r_buff0_thd2~0_In2089498578 256) 0)) (.cse2 (= (mod ~z$w_buff0_used~0_In2089498578 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff1_thd2~0_In2089498578 |P1Thread1of1ForFork2_#t~ite14_Out2089498578|) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= 0 |P1Thread1of1ForFork2_#t~ite14_Out2089498578|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2089498578, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In2089498578, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2089498578, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2089498578} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2089498578, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In2089498578, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2089498578, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out2089498578|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2089498578} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 10:17:25,516 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L777-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_71 1) v_~__unbuffered_cnt~0_70) (= v_~z$r_buff1_thd2~0_132 |v_P1Thread1of1ForFork2_#t~ite14_34|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_34|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_132, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_33|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 10:17:25,518 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L801-->L801-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-1762713235 256) 0))) (or (and .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In-1762713235 256) 0))) (or (= 0 (mod ~z$w_buff0_used~0_In-1762713235 256)) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In-1762713235 256))) (and (= 0 (mod ~z$r_buff1_thd3~0_In-1762713235 256)) .cse1))) (= |P2Thread1of1ForFork0_#t~ite29_Out-1762713235| |P2Thread1of1ForFork0_#t~ite30_Out-1762713235|) (= ~z$w_buff1_used~0_In-1762713235 |P2Thread1of1ForFork0_#t~ite29_Out-1762713235|)) (and (not .cse0) (= ~z$w_buff1_used~0_In-1762713235 |P2Thread1of1ForFork0_#t~ite30_Out-1762713235|) (= |P2Thread1of1ForFork0_#t~ite29_In-1762713235| |P2Thread1of1ForFork0_#t~ite29_Out-1762713235|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1762713235, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1762713235, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1762713235, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1762713235, ~weak$$choice2~0=~weak$$choice2~0_In-1762713235, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In-1762713235|} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1762713235, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1762713235, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1762713235, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1762713235, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out-1762713235|, ~weak$$choice2~0=~weak$$choice2~0_In-1762713235, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out-1762713235|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 10:17:25,519 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L802-->L803: Formula: (and (not (= (mod v_~weak$$choice2~0_19 256) 0)) (= v_~z$r_buff0_thd3~0_58 v_~z$r_buff0_thd3~0_59)) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_59, ~weak$$choice2~0=v_~weak$$choice2~0_19} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_7|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_58, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_19} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 10:17:25,519 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L805-->L809: Formula: (and (= v_~z~0_56 v_~z$mem_tmp~0_5) (= 0 v_~z$flush_delayed~0_11) (not (= 0 (mod v_~z$flush_delayed~0_12 256)))) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_12} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_11|, ~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_11, ~z~0=v_~z~0_56} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 10:17:25,520 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L809-2-->L809-4: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In-1188291186 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1188291186 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite38_Out-1188291186| ~z$w_buff1~0_In-1188291186) (not .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite38_Out-1188291186| ~z~0_In-1188291186) (or .cse1 .cse0)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1188291186, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1188291186, ~z$w_buff1~0=~z$w_buff1~0_In-1188291186, ~z~0=~z~0_In-1188291186} OutVars{P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-1188291186|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1188291186, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1188291186, ~z$w_buff1~0=~z$w_buff1~0_In-1188291186, ~z~0=~z~0_In-1188291186} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 10:17:25,520 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L809-4-->L810: Formula: (= v_~z~0_38 |v_P2Thread1of1ForFork0_#t~ite38_12|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_12|} OutVars{P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_11|, ~z~0=v_~z~0_38} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38, ~z~0] because there is no mapped edge [2019-12-07 10:17:25,520 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L810-->L810-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-802465787 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-802465787 256)))) (or (and (= ~z$w_buff0_used~0_In-802465787 |P2Thread1of1ForFork0_#t~ite40_Out-802465787|) (or .cse0 .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite40_Out-802465787| 0) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-802465787, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-802465787} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-802465787, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-802465787|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-802465787} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 10:17:25,520 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L811-->L811-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In693072507 256))) (.cse0 (= (mod ~z$r_buff0_thd3~0_In693072507 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In693072507 256))) (.cse2 (= (mod ~z$r_buff1_thd3~0_In693072507 256) 0))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite41_Out693072507|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P2Thread1of1ForFork0_#t~ite41_Out693072507| ~z$w_buff1_used~0_In693072507) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In693072507, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In693072507, ~z$w_buff1_used~0=~z$w_buff1_used~0_In693072507, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In693072507} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In693072507, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In693072507, ~z$w_buff1_used~0=~z$w_buff1_used~0_In693072507, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In693072507, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out693072507|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 10:17:25,521 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L812-->L812-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In2029572246 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In2029572246 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out2029572246| ~z$r_buff0_thd3~0_In2029572246)) (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out2029572246| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2029572246, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2029572246} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2029572246, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2029572246, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out2029572246|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 10:17:25,521 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L813-->L813-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In1368216591 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In1368216591 256))) (.cse3 (= (mod ~z$r_buff0_thd3~0_In1368216591 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In1368216591 256)))) (or (and (= ~z$r_buff1_thd3~0_In1368216591 |P2Thread1of1ForFork0_#t~ite43_Out1368216591|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P2Thread1of1ForFork0_#t~ite43_Out1368216591|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1368216591, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1368216591, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1368216591, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1368216591} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out1368216591|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1368216591, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1368216591, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1368216591, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1368216591} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 10:17:25,521 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L813-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_61 1) v_~__unbuffered_cnt~0_60) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~z$r_buff1_thd3~0_188 |v_P2Thread1of1ForFork0_#t~ite43_32|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_31|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_188, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 10:17:25,521 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L836-1-->L842: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 10:17:25,522 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L842-2-->L842-5: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In1824142468 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In1824142468 256))) (.cse2 (= |ULTIMATE.start_main_#t~ite48_Out1824142468| |ULTIMATE.start_main_#t~ite47_Out1824142468|))) (or (and (= ~z~0_In1824142468 |ULTIMATE.start_main_#t~ite47_Out1824142468|) (or .cse0 .cse1) .cse2) (and (= ~z$w_buff1~0_In1824142468 |ULTIMATE.start_main_#t~ite47_Out1824142468|) (not .cse1) (not .cse0) .cse2))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1824142468, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1824142468, ~z$w_buff1~0=~z$w_buff1~0_In1824142468, ~z~0=~z~0_In1824142468} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1824142468, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1824142468|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1824142468, ~z$w_buff1~0=~z$w_buff1~0_In1824142468, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out1824142468|, ~z~0=~z~0_In1824142468} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 10:17:25,522 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L843-->L843-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In194091227 256))) (.cse1 (= (mod ~z$r_buff0_thd0~0_In194091227 256) 0))) (or (and (= ~z$w_buff0_used~0_In194091227 |ULTIMATE.start_main_#t~ite49_Out194091227|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite49_Out194091227|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In194091227, ~z$w_buff0_used~0=~z$w_buff0_used~0_In194091227} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In194091227, ~z$w_buff0_used~0=~z$w_buff0_used~0_In194091227, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out194091227|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 10:17:25,523 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L844-->L844-2: Formula: (let ((.cse2 (= (mod ~z$r_buff0_thd0~0_In1901817699 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In1901817699 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In1901817699 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd0~0_In1901817699 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite50_Out1901817699| 0)) (and (or .cse2 .cse3) (= ~z$w_buff1_used~0_In1901817699 |ULTIMATE.start_main_#t~ite50_Out1901817699|) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1901817699, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1901817699, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1901817699, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1901817699} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1901817699|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1901817699, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1901817699, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1901817699, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1901817699} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 10:17:25,523 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L845-->L845-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In1858230330 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1858230330 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite51_Out1858230330|) (not .cse1)) (and (= ~z$r_buff0_thd0~0_In1858230330 |ULTIMATE.start_main_#t~ite51_Out1858230330|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1858230330, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1858230330} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1858230330, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out1858230330|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1858230330} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 10:17:25,523 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L846-->L846-2: Formula: (let ((.cse3 (= (mod ~z$r_buff0_thd0~0_In1121540538 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In1121540538 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In1121540538 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd0~0_In1121540538 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite52_Out1121540538| 0)) (and (or .cse3 .cse2) (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite52_Out1121540538| ~z$r_buff1_thd0~0_In1121540538)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1121540538, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1121540538, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1121540538, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1121540538} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1121540538|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1121540538, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1121540538, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1121540538, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1121540538} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 10:17:25,523 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [889] [889] L846-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14| (mod v_~main$tmp_guard1~0_20 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_20 0) (= v_~z$r_buff1_thd0~0_155 |v_ULTIMATE.start_main_#t~ite52_46|) (= v_~main$tmp_guard1~0_20 (ite (= (ite (not (and (= v_~__unbuffered_p2_EBX~0_33 0) (= 0 v_~__unbuffered_p0_EAX~0_114) (= 1 v_~__unbuffered_p1_EAX~0_23) (= v_~__unbuffered_p1_EBX~0_22 0) (= 1 v_~__unbuffered_p2_EAX~0_23))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_20 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_114, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_46|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_22, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_33, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_114, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_45|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_20, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_22, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_33, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_155, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 10:17:25,590 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 10:17:25 BasicIcfg [2019-12-07 10:17:25,591 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 10:17:25,591 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 10:17:25,591 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 10:17:25,591 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 10:17:25,592 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 10:14:17" (3/4) ... [2019-12-07 10:17:25,593 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 10:17:25,594 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [901] [901] ULTIMATE.startENTRY-->L832: Formula: (let ((.cse0 (store |v_#valid_72| 0 0))) (and (= v_~z$r_buff0_thd2~0_185 0) (< |v_#StackHeapBarrier_18| |v_ULTIMATE.start_main_~#t68~0.base_32|) (= 0 v_~x~0_134) (= (store |v_#memory_int_22| |v_ULTIMATE.start_main_~#t68~0.base_32| (store (select |v_#memory_int_22| |v_ULTIMATE.start_main_~#t68~0.base_32|) |v_ULTIMATE.start_main_~#t68~0.offset_23| 0)) |v_#memory_int_21|) (= v_~z$w_buff0_used~0_784 0) (= v_~__unbuffered_p1_EBX~0_36 0) (= v_~z$read_delayed_var~0.offset_6 0) (= v_~z$w_buff1_used~0_442 0) (= |v_#NULL.offset_7| 0) (= v_~z~0_178 0) (= 0 (select .cse0 |v_ULTIMATE.start_main_~#t68~0.base_32|)) (= v_~z$r_buff1_thd0~0_195 0) (= 0 v_~__unbuffered_p1_EAX~0_37) (= v_~z$read_delayed~0_6 0) (= v_~y~0_24 0) (= v_~z$read_delayed_var~0.base_6 0) (< 0 |v_#StackHeapBarrier_18|) (= |v_#valid_70| (store .cse0 |v_ULTIMATE.start_main_~#t68~0.base_32| 1)) (= v_~__unbuffered_p2_EBX~0_41 0) (= 0 v_~__unbuffered_p2_EAX~0_33) (= 0 v_~__unbuffered_cnt~0_87) (= v_~weak$$choice2~0_133 0) (= v_~z$r_buff0_thd1~0_306 0) (= 0 v_~z$flush_delayed~0_26) (= 0 |v_#NULL.base_7|) (= 0 v_~z$r_buff0_thd3~0_400) (= v_~z$w_buff1~0_222 0) (= 0 v_~__unbuffered_p0_EAX~0_142) (= |v_ULTIMATE.start_main_~#t68~0.offset_23| 0) (= v_~main$tmp_guard0~0_26 0) (= 0 v_~z$r_buff1_thd3~0_306) (= |v_#length_23| (store |v_#length_24| |v_ULTIMATE.start_main_~#t68~0.base_32| 4)) (= v_~z$mem_tmp~0_15 0) (= 0 v_~weak$$choice0~0_13) (= v_~z$r_buff1_thd1~0_175 0) (= v_~z$r_buff1_thd2~0_185 0) (= v_~z$w_buff0~0_312 0) (= v_~z$r_buff0_thd0~0_204 0) (= v_~main$tmp_guard1~0_37 0))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_18|, #valid=|v_#valid_72|, #memory_int=|v_#memory_int_22|, #length=|v_#length_24|} OutVars{~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_185, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_42|, #NULL.offset=|v_#NULL.offset_7|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_54|, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_34|, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_68|, ~z$r_buff0_thd0~0=v_~z$r_buff0_thd0~0_204, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_142, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_37, ULTIMATE.start_main_~#t68~0.offset=|v_ULTIMATE.start_main_~#t68~0.offset_23|, #length=|v_#length_23|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_33, ULTIMATE.start_main_~#t70~0.offset=|v_ULTIMATE.start_main_~#t70~0.offset_14|, ~z$mem_tmp~0=v_~z$mem_tmp~0_15, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_41, ULTIMATE.start_main_~#t70~0.base=|v_ULTIMATE.start_main_~#t70~0.base_16|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_8|, ~z$w_buff1_used~0=v_~z$w_buff1_used~0_442, ~z$flush_delayed~0=v_~z$flush_delayed~0_26, ~weak$$choice0~0=v_~weak$$choice0~0_13, #StackHeapBarrier=|v_#StackHeapBarrier_18|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_175, ~z$read_delayed_var~0.base=v_~z$read_delayed_var~0.base_6, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_400, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_87, ~x~0=v_~x~0_134, ~z$read_delayed~0=v_~z$read_delayed~0_6, ~z$w_buff1~0=v_~z$w_buff1~0_222, ULTIMATE.start_main_~#t69~0.offset=|v_ULTIMATE.start_main_~#t69~0.offset_22|, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_37, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_62|, ~z$read_delayed_var~0.offset=v_~z$read_delayed_var~0.offset_6, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_48|, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_195, ~y~0=v_~y~0_24, ULTIMATE.start_main_~#t69~0.base=|v_ULTIMATE.start_main_~#t69~0.base_29|, ~z$r_buff0_thd2~0=v_~z$r_buff0_thd2~0_185, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_36, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_24|, ~z$w_buff0_used~0=v_~z$w_buff0_used~0_784, ~z$w_buff0~0=v_~z$w_buff0~0_312, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_8|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_306, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_26, #NULL.base=|v_#NULL.base_7|, ULTIMATE.start_main_~#t68~0.base=|v_ULTIMATE.start_main_~#t68~0.base_32|, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_23|, #valid=|v_#valid_70|, #memory_int=|v_#memory_int_21|, ~z~0=v_~z~0_178, ~weak$$choice2~0=v_~weak$$choice2~0_133, ~z$r_buff0_thd1~0=v_~z$r_buff0_thd1~0_306} AuxVars[] AssignedVars[~z$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ULTIMATE.start_main_#t~ite50, ULTIMATE.start_main_#t~ite52, ~z$r_buff0_thd0~0, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, ULTIMATE.start_main_~#t68~0.offset, #length, ~__unbuffered_p2_EAX~0, ULTIMATE.start_main_~#t70~0.offset, ~z$mem_tmp~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_~#t70~0.base, ULTIMATE.start_main_#t~nondet45, ~z$w_buff1_used~0, ~z$flush_delayed~0, ~weak$$choice0~0, ~z$r_buff1_thd1~0, ~z$read_delayed_var~0.base, ~z$r_buff0_thd3~0, ~__unbuffered_cnt~0, ~x~0, ~z$read_delayed~0, ~z$w_buff1~0, ULTIMATE.start_main_~#t69~0.offset, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ~z$read_delayed_var~0.offset, ULTIMATE.start_main_#t~ite51, ~z$r_buff1_thd0~0, ~y~0, ULTIMATE.start_main_~#t69~0.base, ~z$r_buff0_thd2~0, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ~z$w_buff0_used~0, ~z$w_buff0~0, ULTIMATE.start_main_#t~nondet44, ~z$r_buff1_thd3~0, ~main$tmp_guard0~0, #NULL.base, ULTIMATE.start_main_~#t68~0.base, ULTIMATE.start_main_#res, #valid, #memory_int, ~z~0, ~weak$$choice2~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 10:17:25,595 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [882] [882] L4-->L750: Formula: (and (= ~__unbuffered_p0_EAX~0_Out-124802245 ~x~0_In-124802245) (= ~z$r_buff0_thd1~0_In-124802245 ~z$r_buff1_thd1~0_Out-124802245) (= ~z$r_buff1_thd3~0_Out-124802245 ~z$r_buff0_thd3~0_In-124802245) (= ~z$r_buff0_thd1~0_Out-124802245 1) (= ~z$r_buff1_thd2~0_Out-124802245 ~z$r_buff0_thd2~0_In-124802245) (= ~z$r_buff1_thd0~0_Out-124802245 ~z$r_buff0_thd0~0_In-124802245) (not (= 0 P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-124802245))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-124802245, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-124802245, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-124802245, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In-124802245, ~x~0=~x~0_In-124802245, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-124802245} OutVars{~__unbuffered_p0_EAX~0=~__unbuffered_p0_EAX~0_Out-124802245, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In-124802245, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_Out-124802245, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_Out-124802245, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_Out-124802245, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_Out-124802245, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-124802245, P0Thread1of1ForFork1___VERIFIER_assert_~expression=P0Thread1of1ForFork1___VERIFIER_assert_~expression_In-124802245, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out-124802245, ~x~0=~x~0_In-124802245, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-124802245} AuxVars[] AssignedVars[~__unbuffered_p0_EAX~0, ~z$r_buff1_thd3~0, ~z$r_buff1_thd0~0, ~z$r_buff1_thd2~0, ~z$r_buff1_thd1~0, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 10:17:25,595 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [877] [877] L832-1-->L834: Formula: (and (= |v_ULTIMATE.start_main_~#t69~0.offset_10| 0) (= (select |v_#valid_40| |v_ULTIMATE.start_main_~#t69~0.base_11|) 0) (= |v_#valid_39| (store |v_#valid_40| |v_ULTIMATE.start_main_~#t69~0.base_11| 1)) (not (= |v_ULTIMATE.start_main_~#t69~0.base_11| 0)) (= (store |v_#memory_int_16| |v_ULTIMATE.start_main_~#t69~0.base_11| (store (select |v_#memory_int_16| |v_ULTIMATE.start_main_~#t69~0.base_11|) |v_ULTIMATE.start_main_~#t69~0.offset_10| 1)) |v_#memory_int_15|) (< |v_#StackHeapBarrier_12| |v_ULTIMATE.start_main_~#t69~0.base_11|) (= |v_#length_17| (store |v_#length_18| |v_ULTIMATE.start_main_~#t69~0.base_11| 4))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_12|, #valid=|v_#valid_40|, #memory_int=|v_#memory_int_16|, #length=|v_#length_18|} OutVars{#StackHeapBarrier=|v_#StackHeapBarrier_12|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_5|, #valid=|v_#valid_39|, #memory_int=|v_#memory_int_15|, ULTIMATE.start_main_~#t69~0.offset=|v_ULTIMATE.start_main_~#t69~0.offset_10|, #length=|v_#length_17|, ULTIMATE.start_main_~#t69~0.base=|v_ULTIMATE.start_main_~#t69~0.base_11|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t69~0.offset, #length, ULTIMATE.start_main_~#t69~0.base] because there is no mapped edge [2019-12-07 10:17:25,597 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L773-2-->L773-5: Formula: (let ((.cse2 (= (mod ~z$w_buff1_used~0_In-648599100 256) 0)) (.cse0 (= 0 (mod ~z$r_buff1_thd2~0_In-648599100 256))) (.cse1 (= |P1Thread1of1ForFork2_#t~ite10_Out-648599100| |P1Thread1of1ForFork2_#t~ite9_Out-648599100|))) (or (and (not .cse0) .cse1 (= ~z$w_buff1~0_In-648599100 |P1Thread1of1ForFork2_#t~ite9_Out-648599100|) (not .cse2)) (and (or .cse2 .cse0) .cse1 (= ~z~0_In-648599100 |P1Thread1of1ForFork2_#t~ite9_Out-648599100|)))) InVars {~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-648599100, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-648599100, ~z$w_buff1~0=~z$w_buff1~0_In-648599100, ~z~0=~z~0_In-648599100} OutVars{P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out-648599100|, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-648599100, P1Thread1of1ForFork2_#t~ite10=|P1Thread1of1ForFork2_#t~ite10_Out-648599100|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-648599100, ~z$w_buff1~0=~z$w_buff1~0_In-648599100, ~z~0=~z~0_In-648599100} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 10:17:25,597 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L774-->L774-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In1951686915 256) 0)) (.cse0 (= 0 (mod ~z$r_buff0_thd2~0_In1951686915 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite11_Out1951686915| 0) (not .cse0) (not .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite11_Out1951686915| ~z$w_buff0_used~0_In1951686915) (or .cse1 .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1951686915, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1951686915} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1951686915, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out1951686915|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In1951686915} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 10:17:25,597 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [861] [861] L834-1-->L836: Formula: (and (not (= |v_ULTIMATE.start_main_~#t70~0.base_11| 0)) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t70~0.base_11| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t70~0.base_11|) |v_ULTIMATE.start_main_~#t70~0.offset_10| 2)) |v_#memory_int_13|) (= (store |v_#valid_32| |v_ULTIMATE.start_main_~#t70~0.base_11| 1) |v_#valid_31|) (= |v_#length_15| (store |v_#length_16| |v_ULTIMATE.start_main_~#t70~0.base_11| 4)) (= 0 |v_ULTIMATE.start_main_~#t70~0.offset_10|) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t70~0.base_11|) (= 0 (select |v_#valid_32| |v_ULTIMATE.start_main_~#t70~0.base_11|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_32|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t70~0.offset=|v_ULTIMATE.start_main_~#t70~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t70~0.base=|v_ULTIMATE.start_main_~#t70~0.base_11|, #valid=|v_#valid_31|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_13|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t70~0.offset, ULTIMATE.start_main_~#t70~0.base, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length] because there is no mapped edge [2019-12-07 10:17:25,599 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L751-->L751-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd1~0_In484879535 256) 0)) (.cse1 (= 0 (mod ~z$w_buff0_used~0_In484879535 256)))) (or (and (= ~z$w_buff0_used~0_In484879535 |P0Thread1of1ForFork1_#t~ite5_Out484879535|) (or .cse0 .cse1)) (and (= 0 |P0Thread1of1ForFork1_#t~ite5_Out484879535|) (not .cse0) (not .cse1)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In484879535, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In484879535} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out484879535|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In484879535, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In484879535} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 10:17:25,600 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L752-->L752-2: Formula: (let ((.cse0 (= (mod ~z$r_buff0_thd1~0_In1301909724 256) 0)) (.cse1 (= (mod ~z$w_buff0_used~0_In1301909724 256) 0)) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In1301909724 256))) (.cse3 (= (mod ~z$r_buff1_thd1~0_In1301909724 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite6_Out1301909724| 0)) (and (or .cse0 .cse1) (= |P0Thread1of1ForFork1_#t~ite6_Out1301909724| ~z$w_buff1_used~0_In1301909724) (or .cse2 .cse3)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1301909724, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1301909724, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1301909724, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1301909724} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In1301909724, P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out1301909724|, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In1301909724, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1301909724, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In1301909724} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 10:17:25,600 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L753-->L754: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In385782779 256))) (.cse2 (= (mod ~z$r_buff0_thd1~0_In385782779 256) 0)) (.cse1 (= ~z$r_buff0_thd1~0_In385782779 ~z$r_buff0_thd1~0_Out385782779))) (or (and .cse0 .cse1) (and (not .cse0) (not .cse2) (= ~z$r_buff0_thd1~0_Out385782779 0)) (and .cse2 .cse1))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In385782779, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In385782779} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In385782779, P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out385782779|, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_Out385782779} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~z$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 10:17:25,600 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L754-->L754-2: Formula: (let ((.cse1 (= (mod ~z$w_buff0_used~0_In162130150 256) 0)) (.cse0 (= (mod ~z$r_buff0_thd1~0_In162130150 256) 0)) (.cse3 (= 0 (mod ~z$r_buff1_thd1~0_In162130150 256))) (.cse2 (= (mod ~z$w_buff1_used~0_In162130150 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P0Thread1of1ForFork1_#t~ite8_Out162130150| 0)) (and (or .cse1 .cse0) (or .cse3 .cse2) (= |P0Thread1of1ForFork1_#t~ite8_Out162130150| ~z$r_buff1_thd1~0_In162130150)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In162130150, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In162130150, ~z$w_buff1_used~0=~z$w_buff1_used~0_In162130150, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In162130150} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out162130150|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In162130150, ~z$r_buff1_thd1~0=~z$r_buff1_thd1~0_In162130150, ~z$w_buff1_used~0=~z$w_buff1_used~0_In162130150, ~z$r_buff0_thd1~0=~z$r_buff0_thd1~0_In162130150} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 10:17:25,600 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [865] [865] L754-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= v_~z$r_buff1_thd1~0_78 |v_P0Thread1of1ForFork1_#t~ite8_34|) (= (+ v_~__unbuffered_cnt~0_54 1) v_~__unbuffered_cnt~0_53) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_34|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_54} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_33|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~z$r_buff1_thd1~0=v_~z$r_buff1_thd1~0_78, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_53} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~z$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 10:17:25,600 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [847] [847] L775-->L775-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd2~0_In-616689446 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-616689446 256))) (.cse3 (= 0 (mod ~z$r_buff1_thd2~0_In-616689446 256))) (.cse2 (= 0 (mod ~z$w_buff1_used~0_In-616689446 256)))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P1Thread1of1ForFork2_#t~ite12_Out-616689446| 0)) (and (or .cse1 .cse0) (or .cse3 .cse2) (= ~z$w_buff1_used~0_In-616689446 |P1Thread1of1ForFork2_#t~ite12_Out-616689446|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-616689446, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-616689446, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-616689446, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-616689446} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-616689446, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In-616689446, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-616689446, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-616689446|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-616689446} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 10:17:25,601 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L776-->L776-2: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff0_thd2~0_In-361323778 256))) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In-361323778 256)))) (or (and (= ~z$r_buff0_thd2~0_In-361323778 |P1Thread1of1ForFork2_#t~ite13_Out-361323778|) (or .cse0 .cse1)) (and (not .cse1) (= 0 |P1Thread1of1ForFork2_#t~ite13_Out-361323778|) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-361323778, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-361323778} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-361323778, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out-361323778|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In-361323778} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 10:17:25,601 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [852] [852] L777-->L777-2: Formula: (let ((.cse1 (= (mod ~z$r_buff1_thd2~0_In2089498578 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In2089498578 256) 0)) (.cse3 (= (mod ~z$r_buff0_thd2~0_In2089498578 256) 0)) (.cse2 (= (mod ~z$w_buff0_used~0_In2089498578 256) 0))) (or (and (or .cse0 .cse1) (= ~z$r_buff1_thd2~0_In2089498578 |P1Thread1of1ForFork2_#t~ite14_Out2089498578|) (or .cse2 .cse3)) (and (or (and (not .cse1) (not .cse0)) (and (not .cse3) (not .cse2))) (= 0 |P1Thread1of1ForFork2_#t~ite14_Out2089498578|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2089498578, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In2089498578, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2089498578, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2089498578} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2089498578, ~z$r_buff1_thd2~0=~z$r_buff1_thd2~0_In2089498578, ~z$w_buff1_used~0=~z$w_buff1_used~0_In2089498578, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out2089498578|, ~z$r_buff0_thd2~0=~z$r_buff0_thd2~0_In2089498578} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 10:17:25,601 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L777-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= (+ v_~__unbuffered_cnt~0_71 1) v_~__unbuffered_cnt~0_70) (= v_~z$r_buff1_thd2~0_132 |v_P1Thread1of1ForFork2_#t~ite14_34|)) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_71, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_34|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~z$r_buff1_thd2~0=v_~z$r_buff1_thd2~0_132, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_70, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_33|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~z$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 10:17:25,603 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L801-->L801-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-1762713235 256) 0))) (or (and .cse0 (let ((.cse1 (= (mod ~z$r_buff0_thd3~0_In-1762713235 256) 0))) (or (= 0 (mod ~z$w_buff0_used~0_In-1762713235 256)) (and .cse1 (= 0 (mod ~z$w_buff1_used~0_In-1762713235 256))) (and (= 0 (mod ~z$r_buff1_thd3~0_In-1762713235 256)) .cse1))) (= |P2Thread1of1ForFork0_#t~ite29_Out-1762713235| |P2Thread1of1ForFork0_#t~ite30_Out-1762713235|) (= ~z$w_buff1_used~0_In-1762713235 |P2Thread1of1ForFork0_#t~ite29_Out-1762713235|)) (and (not .cse0) (= ~z$w_buff1_used~0_In-1762713235 |P2Thread1of1ForFork0_#t~ite30_Out-1762713235|) (= |P2Thread1of1ForFork0_#t~ite29_In-1762713235| |P2Thread1of1ForFork0_#t~ite29_Out-1762713235|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-1762713235, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1762713235, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1762713235, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1762713235, ~weak$$choice2~0=~weak$$choice2~0_In-1762713235, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_In-1762713235|} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-1762713235, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1762713235, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1762713235, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-1762713235, P2Thread1of1ForFork0_#t~ite30=|P2Thread1of1ForFork0_#t~ite30_Out-1762713235|, ~weak$$choice2~0=~weak$$choice2~0_In-1762713235, P2Thread1of1ForFork0_#t~ite29=|P2Thread1of1ForFork0_#t~ite29_Out-1762713235|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite30, P2Thread1of1ForFork0_#t~ite29] because there is no mapped edge [2019-12-07 10:17:25,604 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [778] [778] L802-->L803: Formula: (and (not (= (mod v_~weak$$choice2~0_19 256) 0)) (= v_~z$r_buff0_thd3~0_58 v_~z$r_buff0_thd3~0_59)) InVars {~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_59, ~weak$$choice2~0=v_~weak$$choice2~0_19} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_7|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_7|, ~z$r_buff0_thd3~0=v_~z$r_buff0_thd3~0_58, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_6|, ~weak$$choice2~0=v_~weak$$choice2~0_19} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~z$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 10:17:25,604 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [800] [800] L805-->L809: Formula: (and (= v_~z~0_56 v_~z$mem_tmp~0_5) (= 0 v_~z$flush_delayed~0_11) (not (= 0 (mod v_~z$flush_delayed~0_12 256)))) InVars {~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_12} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_11|, ~z$mem_tmp~0=v_~z$mem_tmp~0_5, ~z$flush_delayed~0=v_~z$flush_delayed~0_11, ~z~0=v_~z~0_56} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~z$flush_delayed~0, ~z~0] because there is no mapped edge [2019-12-07 10:17:25,605 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [837] [837] L809-2-->L809-4: Formula: (let ((.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In-1188291186 256))) (.cse0 (= 0 (mod ~z$w_buff1_used~0_In-1188291186 256)))) (or (and (not .cse0) (= |P2Thread1of1ForFork0_#t~ite38_Out-1188291186| ~z$w_buff1~0_In-1188291186) (not .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite38_Out-1188291186| ~z~0_In-1188291186) (or .cse1 .cse0)))) InVars {~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1188291186, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1188291186, ~z$w_buff1~0=~z$w_buff1~0_In-1188291186, ~z~0=~z~0_In-1188291186} OutVars{P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-1188291186|, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In-1188291186, ~z$w_buff1_used~0=~z$w_buff1_used~0_In-1188291186, ~z$w_buff1~0=~z$w_buff1~0_In-1188291186, ~z~0=~z~0_In-1188291186} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 10:17:25,605 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [791] [791] L809-4-->L810: Formula: (= v_~z~0_38 |v_P2Thread1of1ForFork0_#t~ite38_12|) InVars {P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_12|} OutVars{P2Thread1of1ForFork0_#t~ite39=|v_P2Thread1of1ForFork0_#t~ite39_11|, P2Thread1of1ForFork0_#t~ite38=|v_P2Thread1of1ForFork0_#t~ite38_11|, ~z~0=v_~z~0_38} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38, ~z~0] because there is no mapped edge [2019-12-07 10:17:25,605 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L810-->L810-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In-802465787 256))) (.cse0 (= 0 (mod ~z$r_buff0_thd3~0_In-802465787 256)))) (or (and (= ~z$w_buff0_used~0_In-802465787 |P2Thread1of1ForFork0_#t~ite40_Out-802465787|) (or .cse0 .cse1)) (and (= |P2Thread1of1ForFork0_#t~ite40_Out-802465787| 0) (not .cse1) (not .cse0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In-802465787, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-802465787} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In-802465787, P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out-802465787|, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In-802465787} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 10:17:25,605 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L811-->L811-2: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff0_used~0_In693072507 256))) (.cse0 (= (mod ~z$r_buff0_thd3~0_In693072507 256) 0)) (.cse3 (= 0 (mod ~z$w_buff1_used~0_In693072507 256))) (.cse2 (= (mod ~z$r_buff1_thd3~0_In693072507 256) 0))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite41_Out693072507|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (= |P2Thread1of1ForFork0_#t~ite41_Out693072507| ~z$w_buff1_used~0_In693072507) (or .cse1 .cse0) (or .cse3 .cse2)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In693072507, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In693072507, ~z$w_buff1_used~0=~z$w_buff1_used~0_In693072507, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In693072507} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In693072507, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In693072507, ~z$w_buff1_used~0=~z$w_buff1_used~0_In693072507, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In693072507, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out693072507|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 10:17:25,606 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [844] [844] L812-->L812-2: Formula: (let ((.cse0 (= (mod ~z$w_buff0_used~0_In2029572246 256) 0)) (.cse1 (= 0 (mod ~z$r_buff0_thd3~0_In2029572246 256)))) (or (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out2029572246| ~z$r_buff0_thd3~0_In2029572246)) (and (not .cse0) (not .cse1) (= |P2Thread1of1ForFork0_#t~ite42_Out2029572246| 0)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In2029572246, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2029572246} OutVars{~z$w_buff0_used~0=~z$w_buff0_used~0_In2029572246, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In2029572246, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out2029572246|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 10:17:25,606 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [833] [833] L813-->L813-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff1_used~0_In1368216591 256))) (.cse1 (= 0 (mod ~z$r_buff1_thd3~0_In1368216591 256))) (.cse3 (= (mod ~z$r_buff0_thd3~0_In1368216591 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In1368216591 256)))) (or (and (= ~z$r_buff1_thd3~0_In1368216591 |P2Thread1of1ForFork0_#t~ite43_Out1368216591|) (or .cse0 .cse1) (or .cse2 .cse3)) (and (or (and (not .cse0) (not .cse1)) (and (not .cse3) (not .cse2))) (= 0 |P2Thread1of1ForFork0_#t~ite43_Out1368216591|)))) InVars {~z$w_buff0_used~0=~z$w_buff0_used~0_In1368216591, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1368216591, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1368216591, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1368216591} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out1368216591|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1368216591, ~z$r_buff1_thd3~0=~z$r_buff1_thd3~0_In1368216591, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1368216591, ~z$r_buff0_thd3~0=~z$r_buff0_thd3~0_In1368216591} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 10:17:25,606 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L813-2-->P2EXIT: Formula: (and (= (+ v_~__unbuffered_cnt~0_61 1) v_~__unbuffered_cnt~0_60) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~z$r_buff1_thd3~0_188 |v_P2Thread1of1ForFork0_#t~ite43_32|) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_32|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_61} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_31|, ~z$r_buff1_thd3~0=v_~z$r_buff1_thd3~0_188, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_60, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~z$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 10:17:25,606 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [795] [795] L836-1-->L842: Formula: (and (= v_~main$tmp_guard0~0_7 (ite (= (ite (= 3 v_~__unbuffered_cnt~0_14) 1 0) 0) 0 1)) (not (= (mod v_~main$tmp_guard0~0_7 256) 0))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_6|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_14, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_7} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 10:17:25,607 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [853] [853] L842-2-->L842-5: Formula: (let ((.cse1 (= 0 (mod ~z$w_buff1_used~0_In1824142468 256))) (.cse0 (= 0 (mod ~z$r_buff1_thd0~0_In1824142468 256))) (.cse2 (= |ULTIMATE.start_main_#t~ite48_Out1824142468| |ULTIMATE.start_main_#t~ite47_Out1824142468|))) (or (and (= ~z~0_In1824142468 |ULTIMATE.start_main_#t~ite47_Out1824142468|) (or .cse0 .cse1) .cse2) (and (= ~z$w_buff1~0_In1824142468 |ULTIMATE.start_main_#t~ite47_Out1824142468|) (not .cse1) (not .cse0) .cse2))) InVars {~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1824142468, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1824142468, ~z$w_buff1~0=~z$w_buff1~0_In1824142468, ~z~0=~z~0_In1824142468} OutVars{~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1824142468, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out1824142468|, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1824142468, ~z$w_buff1~0=~z$w_buff1~0_In1824142468, ULTIMATE.start_main_#t~ite48=|ULTIMATE.start_main_#t~ite48_Out1824142468|, ~z~0=~z~0_In1824142468} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 10:17:25,607 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L843-->L843-2: Formula: (let ((.cse0 (= 0 (mod ~z$w_buff0_used~0_In194091227 256))) (.cse1 (= (mod ~z$r_buff0_thd0~0_In194091227 256) 0))) (or (and (= ~z$w_buff0_used~0_In194091227 |ULTIMATE.start_main_#t~ite49_Out194091227|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite49_Out194091227|)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In194091227, ~z$w_buff0_used~0=~z$w_buff0_used~0_In194091227} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In194091227, ~z$w_buff0_used~0=~z$w_buff0_used~0_In194091227, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out194091227|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 10:17:25,608 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L844-->L844-2: Formula: (let ((.cse2 (= (mod ~z$r_buff0_thd0~0_In1901817699 256) 0)) (.cse3 (= (mod ~z$w_buff0_used~0_In1901817699 256) 0)) (.cse0 (= (mod ~z$w_buff1_used~0_In1901817699 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd0~0_In1901817699 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite50_Out1901817699| 0)) (and (or .cse2 .cse3) (= ~z$w_buff1_used~0_In1901817699 |ULTIMATE.start_main_#t~ite50_Out1901817699|) (or .cse0 .cse1)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1901817699, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1901817699, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1901817699, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1901817699} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out1901817699|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1901817699, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1901817699, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1901817699, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1901817699} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 10:17:25,608 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [829] [829] L845-->L845-2: Formula: (let ((.cse1 (= (mod ~z$r_buff0_thd0~0_In1858230330 256) 0)) (.cse0 (= 0 (mod ~z$w_buff0_used~0_In1858230330 256)))) (or (and (not .cse0) (= 0 |ULTIMATE.start_main_#t~ite51_Out1858230330|) (not .cse1)) (and (= ~z$r_buff0_thd0~0_In1858230330 |ULTIMATE.start_main_#t~ite51_Out1858230330|) (or .cse1 .cse0)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1858230330, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1858230330} OutVars{~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1858230330, ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out1858230330|, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1858230330} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 10:17:25,608 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L846-->L846-2: Formula: (let ((.cse3 (= (mod ~z$r_buff0_thd0~0_In1121540538 256) 0)) (.cse2 (= 0 (mod ~z$w_buff0_used~0_In1121540538 256))) (.cse0 (= (mod ~z$w_buff1_used~0_In1121540538 256) 0)) (.cse1 (= (mod ~z$r_buff1_thd0~0_In1121540538 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite52_Out1121540538| 0)) (and (or .cse3 .cse2) (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite52_Out1121540538| ~z$r_buff1_thd0~0_In1121540538)))) InVars {~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1121540538, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1121540538, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1121540538, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1121540538} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out1121540538|, ~z$r_buff0_thd0~0=~z$r_buff0_thd0~0_In1121540538, ~z$w_buff0_used~0=~z$w_buff0_used~0_In1121540538, ~z$r_buff1_thd0~0=~z$r_buff1_thd0~0_In1121540538, ~z$w_buff1_used~0=~z$w_buff1_used~0_In1121540538} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 10:17:25,608 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [889] [889] L846-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14| (mod v_~main$tmp_guard1~0_20 256)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_20 0) (= v_~z$r_buff1_thd0~0_155 |v_ULTIMATE.start_main_#t~ite52_46|) (= v_~main$tmp_guard1~0_20 (ite (= (ite (not (and (= v_~__unbuffered_p2_EBX~0_33 0) (= 0 v_~__unbuffered_p0_EAX~0_114) (= 1 v_~__unbuffered_p1_EAX~0_23) (= v_~__unbuffered_p1_EBX~0_22 0) (= 1 v_~__unbuffered_p2_EAX~0_23))) 1 0) 0) 0 1)) (= v_ULTIMATE.start___VERIFIER_assert_~expression_20 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|)) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_114, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_46|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_22, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_33, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_114, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_45|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_20, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_22, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_33, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_23, ~z$r_buff1_thd0~0=v_~z$r_buff1_thd0~0_155, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_20, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_23, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_14|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~z$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 10:17:25,670 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_d640facb-7b44-470f-ab0e-f43ce57c2aa6/bin/utaipan/witness.graphml [2019-12-07 10:17:25,670 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 10:17:25,672 INFO L168 Benchmark]: Toolchain (without parser) took 188949.44 ms. Allocated memory was 1.0 GB in the beginning and 8.2 GB in the end (delta: 7.1 GB). Free memory was 940.8 MB in the beginning and 4.5 GB in the end (delta: -3.6 GB). Peak memory consumption was 3.6 GB. Max. memory is 11.5 GB. [2019-12-07 10:17:25,672 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 10:17:25,673 INFO L168 Benchmark]: CACSL2BoogieTranslator took 426.78 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 126.4 MB). Free memory was 940.8 MB in the beginning and 1.1 GB in the end (delta: -152.2 MB). Peak memory consumption was 23.7 MB. Max. memory is 11.5 GB. [2019-12-07 10:17:25,673 INFO L168 Benchmark]: Boogie Procedure Inliner took 36.16 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. [2019-12-07 10:17:25,673 INFO L168 Benchmark]: Boogie Preprocessor took 25.17 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 10:17:25,673 INFO L168 Benchmark]: RCFGBuilder took 426.22 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. [2019-12-07 10:17:25,674 INFO L168 Benchmark]: TraceAbstraction took 187950.73 ms. Allocated memory was 1.2 GB in the beginning and 8.2 GB in the end (delta: 7.0 GB). Free memory was 1.0 GB in the beginning and 4.6 GB in the end (delta: -3.5 GB). Peak memory consumption was 3.5 GB. Max. memory is 11.5 GB. [2019-12-07 10:17:25,674 INFO L168 Benchmark]: Witness Printer took 79.61 ms. Allocated memory is still 8.2 GB. Free memory was 4.6 GB in the beginning and 4.5 GB in the end (delta: 43.7 MB). Peak memory consumption was 43.7 MB. Max. memory is 11.5 GB. [2019-12-07 10:17:25,676 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 961.3 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 426.78 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 126.4 MB). Free memory was 940.8 MB in the beginning and 1.1 GB in the end (delta: -152.2 MB). Peak memory consumption was 23.7 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 36.16 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 5.4 MB). Peak memory consumption was 5.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.17 ms. Allocated memory is still 1.2 GB. Free memory is still 1.1 GB. There was no memory consumed. Max. memory is 11.5 GB. * RCFGBuilder took 426.22 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 54.1 MB). Peak memory consumption was 54.1 MB. Max. memory is 11.5 GB. * TraceAbstraction took 187950.73 ms. Allocated memory was 1.2 GB in the beginning and 8.2 GB in the end (delta: 7.0 GB). Free memory was 1.0 GB in the beginning and 4.6 GB in the end (delta: -3.5 GB). Peak memory consumption was 3.5 GB. Max. memory is 11.5 GB. * Witness Printer took 79.61 ms. Allocated memory is still 8.2 GB. Free memory was 4.6 GB in the beginning and 4.5 GB in the end (delta: 43.7 MB). Peak memory consumption was 43.7 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 178 ProgramPointsBefore, 95 ProgramPointsAfterwards, 215 TransitionsBefore, 107 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 12 FixpointIterations, 35 TrivialSequentialCompositions, 53 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 35 ConcurrentYvCompositions, 29 ChoiceCompositions, 7593 VarBasedMoverChecksPositive, 373 VarBasedMoverChecksNegative, 200 SemBasedMoverChecksPositive, 268 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 1.1s, 0 MoverChecksTotal, 132619 CheckedPairsTotal, 123 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L832] FCALL, FORK 0 pthread_create(&t68, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=0, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=0, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L735] 1 z$w_buff1 = z$w_buff0 [L736] 1 z$w_buff0 = 1 [L737] 1 z$w_buff1_used = z$w_buff0_used [L738] 1 z$w_buff0_used = (_Bool)1 [L750] EXPR 1 z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L834] FCALL, FORK 0 pthread_create(&t69, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L764] 2 x = 1 [L767] 2 __unbuffered_p1_EAX = x [L770] 2 __unbuffered_p1_EBX = y VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L773] EXPR 2 z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L750] 1 z = z$w_buff0_used && z$r_buff0_thd1 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd1 ? z$w_buff1 : z) [L773] 2 z = z$w_buff0_used && z$r_buff0_thd2 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd2 ? z$w_buff1 : z) [L774] 2 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$w_buff0_used [L836] FCALL, FORK 0 pthread_create(&t70, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=0, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L787] 3 y = 1 [L790] 3 __unbuffered_p2_EAX = y [L793] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L794] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L795] 3 z$flush_delayed = weak$$choice2 [L796] 3 z$mem_tmp = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L797] EXPR 3 !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) VAL [!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=1, z$w_buff1=0, z$w_buff1_used=0] [L797] 3 z = !z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff1) [L751] 1 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd1 ? (_Bool)0 : z$w_buff0_used [L752] 1 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd1 || z$w_buff1_used && z$r_buff1_thd1 ? (_Bool)0 : z$w_buff1_used [L775] 2 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd2 || z$w_buff1_used && z$r_buff1_thd2 ? (_Bool)0 : z$w_buff1_used [L776] 2 z$r_buff0_thd2 = z$w_buff0_used && z$r_buff0_thd2 ? (_Bool)0 : z$r_buff0_thd2 [L798] EXPR 3 weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0))=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L798] 3 z$w_buff0 = weak$$choice2 ? z$w_buff0 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : z$w_buff0)) [L799] EXPR 3 weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L799] 3 z$w_buff1 = weak$$choice2 ? z$w_buff1 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1 : (z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff1 : z$w_buff1)) [L800] EXPR 3 weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L800] 3 z$w_buff0_used = weak$$choice2 ? z$w_buff0_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff0_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used)) [L801] 3 z$w_buff1_used = weak$$choice2 ? z$w_buff1_used : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$w_buff1_used : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L803] EXPR 3 weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L803] 3 z$r_buff1_thd3 = weak$$choice2 ? z$r_buff1_thd3 : (!z$w_buff0_used || !z$r_buff0_thd3 && !z$w_buff1_used || !z$r_buff0_thd3 && !z$r_buff1_thd3 ? z$r_buff1_thd3 : (z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L804] 3 __unbuffered_p2_EBX = z VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=1, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L809] 3 z$w_buff0_used && z$r_buff0_thd3 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd3 ? z$w_buff1 : z) VAL [\result={0:0}, __unbuffered_cnt=2, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L810] 3 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$w_buff0_used [L811] 3 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd3 || z$w_buff1_used && z$r_buff1_thd3 ? (_Bool)0 : z$w_buff1_used [L812] 3 z$r_buff0_thd3 = z$w_buff0_used && z$r_buff0_thd3 ? (_Bool)0 : z$r_buff0_thd3 [L842] EXPR 0 z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=8, weak$$choice2=1, x=1, y=1, z=0, z$flush_delayed=0, z$mem_tmp=0, z$r_buff0_thd0=0, z$r_buff0_thd1=1, z$r_buff0_thd2=0, z$r_buff0_thd3=0, z$r_buff1_thd0=0, z$r_buff1_thd1=0, z$r_buff1_thd2=0, z$r_buff1_thd3=0, z$read_delayed=0, z$read_delayed_var={0:0}, z$w_buff0=1, z$w_buff0_used=0, z$w_buff1=0, z$w_buff1_used=0] [L842] 0 z = z$w_buff0_used && z$r_buff0_thd0 ? z$w_buff0 : (z$w_buff1_used && z$r_buff1_thd0 ? z$w_buff1 : z) [L843] 0 z$w_buff0_used = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$w_buff0_used [L844] 0 z$w_buff1_used = z$w_buff0_used && z$r_buff0_thd0 || z$w_buff1_used && z$r_buff1_thd0 ? (_Bool)0 : z$w_buff1_used [L845] 0 z$r_buff0_thd0 = z$w_buff0_used && z$r_buff0_thd0 ? (_Bool)0 : z$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 169 locations, 2 error locations. Result: UNSAFE, OverallTime: 187.7s, OverallIterations: 42, TraceHistogramMax: 1, AutomataDifference: 54.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 10959 SDtfs, 13684 SDslu, 39910 SDs, 0 SdLazy, 28568 SolverSat, 562 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 19.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 599 GetRequests, 65 SyntacticMatches, 25 SemanticMatches, 509 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2800 ImplicationChecksByTransitivity, 5.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=238804occurred in iteration=9, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 109.5s AutomataMinimizationTime, 41 MinimizatonAttempts, 555556 StatesRemovedByMinimization, 38 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 2.5s InterpolantComputationTime, 1845 NumberOfCodeBlocks, 1845 NumberOfCodeBlocksAsserted, 42 NumberOfCheckSat, 1737 ConstructedInterpolants, 0 QuantifiedInterpolants, 670799 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 41 InterpolantComputations, 41 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...