./Ultimate.py --spec ../../sv-benchmarks/c/properties/unreach-call.prp --file ../../sv-benchmarks/c/pthread-wmm/mix010_rmo.oepc.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version f470102c Calling Ultimate with: /usr/lib/jvm/java-8-openjdk-amd64/bin/java -Dosgi.configuration.area=/tmp/vcloud-vcloud-master/worker/run_dir_5ff86975-fc51-48ff-b4f2-c1c4ef468c06/bin/utaipan/data/config -Xmx12G -Xms1G -jar /tmp/vcloud-vcloud-master/worker/run_dir_5ff86975-fc51-48ff-b4f2-c1c4ef468c06/bin/utaipan/plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data @noDefault -ultimatedata /tmp/vcloud-vcloud-master/worker/run_dir_5ff86975-fc51-48ff-b4f2-c1c4ef468c06/bin/utaipan/data -tc /tmp/vcloud-vcloud-master/worker/run_dir_5ff86975-fc51-48ff-b4f2-c1c4ef468c06/bin/utaipan/config/TaipanReach.xml -i ../../sv-benchmarks/c/pthread-wmm/mix010_rmo.oepc.i -s /tmp/vcloud-vcloud-master/worker/run_dir_5ff86975-fc51-48ff-b4f2-c1c4ef468c06/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /tmp/vcloud-vcloud-master/worker/run_dir_5ff86975-fc51-48ff-b4f2-c1c4ef468c06/bin/utaipan --witnessprinter.witness.filename witness.graphml --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) --witnessprinter.graph.data.producer Taipan --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 6e6d8338bf7c6b9b83cab1edf5d9f1a2216e4be7 ........................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................................... Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE --- Real Ultimate output --- This is Ultimate 0.1.25-f470102 [2019-12-07 14:01:14,246 INFO L177 SettingsManager]: Resetting all preferences to default values... [2019-12-07 14:01:14,248 INFO L181 SettingsManager]: Resetting UltimateCore preferences to default values [2019-12-07 14:01:14,255 INFO L184 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2019-12-07 14:01:14,256 INFO L181 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2019-12-07 14:01:14,256 INFO L181 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2019-12-07 14:01:14,257 INFO L181 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2019-12-07 14:01:14,259 INFO L181 SettingsManager]: Resetting LassoRanker preferences to default values [2019-12-07 14:01:14,260 INFO L181 SettingsManager]: Resetting Reaching Definitions preferences to default values [2019-12-07 14:01:14,261 INFO L181 SettingsManager]: Resetting SyntaxChecker preferences to default values [2019-12-07 14:01:14,261 INFO L181 SettingsManager]: Resetting Sifa preferences to default values [2019-12-07 14:01:14,262 INFO L184 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2019-12-07 14:01:14,262 INFO L181 SettingsManager]: Resetting LTL2Aut preferences to default values [2019-12-07 14:01:14,263 INFO L181 SettingsManager]: Resetting PEA to Boogie preferences to default values [2019-12-07 14:01:14,264 INFO L181 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2019-12-07 14:01:14,265 INFO L181 SettingsManager]: Resetting ChcToBoogie preferences to default values [2019-12-07 14:01:14,265 INFO L181 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2019-12-07 14:01:14,266 INFO L181 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2019-12-07 14:01:14,267 INFO L181 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2019-12-07 14:01:14,269 INFO L181 SettingsManager]: Resetting CodeCheck preferences to default values [2019-12-07 14:01:14,270 INFO L181 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2019-12-07 14:01:14,271 INFO L181 SettingsManager]: Resetting RCFGBuilder preferences to default values [2019-12-07 14:01:14,271 INFO L181 SettingsManager]: Resetting Referee preferences to default values [2019-12-07 14:01:14,272 INFO L181 SettingsManager]: Resetting TraceAbstraction preferences to default values [2019-12-07 14:01:14,273 INFO L184 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2019-12-07 14:01:14,274 INFO L184 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2019-12-07 14:01:14,274 INFO L181 SettingsManager]: Resetting TreeAutomizer preferences to default values [2019-12-07 14:01:14,274 INFO L181 SettingsManager]: Resetting IcfgToChc preferences to default values [2019-12-07 14:01:14,274 INFO L181 SettingsManager]: Resetting IcfgTransformer preferences to default values [2019-12-07 14:01:14,275 INFO L184 SettingsManager]: ReqToTest provides no preferences, ignoring... [2019-12-07 14:01:14,275 INFO L181 SettingsManager]: Resetting Boogie Printer preferences to default values [2019-12-07 14:01:14,276 INFO L181 SettingsManager]: Resetting ChcSmtPrinter preferences to default values [2019-12-07 14:01:14,276 INFO L181 SettingsManager]: Resetting ReqPrinter preferences to default values [2019-12-07 14:01:14,276 INFO L181 SettingsManager]: Resetting Witness Printer preferences to default values [2019-12-07 14:01:14,277 INFO L184 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2019-12-07 14:01:14,277 INFO L181 SettingsManager]: Resetting CDTParser preferences to default values [2019-12-07 14:01:14,278 INFO L184 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2019-12-07 14:01:14,278 INFO L184 SettingsManager]: ReqParser provides no preferences, ignoring... [2019-12-07 14:01:14,278 INFO L181 SettingsManager]: Resetting SmtParser preferences to default values [2019-12-07 14:01:14,278 INFO L181 SettingsManager]: Resetting Witness Parser preferences to default values [2019-12-07 14:01:14,279 INFO L188 SettingsManager]: Finished resetting all preferences to default values... [2019-12-07 14:01:14,279 INFO L101 SettingsManager]: Beginning loading settings from /tmp/vcloud-vcloud-master/worker/run_dir_5ff86975-fc51-48ff-b4f2-c1c4ef468c06/bin/utaipan/config/svcomp-Reach-32bit-Taipan_Default.epf [2019-12-07 14:01:14,289 INFO L113 SettingsManager]: Loading preferences was successful [2019-12-07 14:01:14,290 INFO L115 SettingsManager]: Preferences different from defaults after loading the file: [2019-12-07 14:01:14,290 INFO L136 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2019-12-07 14:01:14,290 INFO L138 SettingsManager]: * User list type=DISABLED [2019-12-07 14:01:14,290 INFO L136 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2019-12-07 14:01:14,290 INFO L138 SettingsManager]: * Explicit value domain=true [2019-12-07 14:01:14,291 INFO L138 SettingsManager]: * Abstract domain for RCFG-of-the-future=PoormanAbstractDomain [2019-12-07 14:01:14,291 INFO L138 SettingsManager]: * Octagon Domain=false [2019-12-07 14:01:14,291 INFO L138 SettingsManager]: * Abstract domain=CompoundDomain [2019-12-07 14:01:14,291 INFO L138 SettingsManager]: * Check feasibility of abstract posts with an SMT solver=true [2019-12-07 14:01:14,291 INFO L138 SettingsManager]: * Use the RCFG-of-the-future interface=true [2019-12-07 14:01:14,291 INFO L138 SettingsManager]: * Interval Domain=false [2019-12-07 14:01:14,291 INFO L136 SettingsManager]: Preferences of Sifa differ from their defaults: [2019-12-07 14:01:14,292 INFO L138 SettingsManager]: * Call Summarizer=TopInputCallSummarizer [2019-12-07 14:01:14,292 INFO L138 SettingsManager]: * Simplification Technique=SIMPLIFY_QUICK [2019-12-07 14:01:14,292 INFO L136 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2019-12-07 14:01:14,292 INFO L138 SettingsManager]: * sizeof long=4 [2019-12-07 14:01:14,292 INFO L138 SettingsManager]: * Overapproximate operations on floating types=true [2019-12-07 14:01:14,292 INFO L138 SettingsManager]: * sizeof POINTER=4 [2019-12-07 14:01:14,293 INFO L138 SettingsManager]: * Check division by zero=IGNORE [2019-12-07 14:01:14,293 INFO L138 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2019-12-07 14:01:14,293 INFO L138 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2019-12-07 14:01:14,293 INFO L138 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2019-12-07 14:01:14,293 INFO L138 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2019-12-07 14:01:14,293 INFO L138 SettingsManager]: * sizeof long double=12 [2019-12-07 14:01:14,293 INFO L138 SettingsManager]: * Check if freed pointer was valid=false [2019-12-07 14:01:14,293 INFO L138 SettingsManager]: * Use constant arrays=true [2019-12-07 14:01:14,293 INFO L138 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2019-12-07 14:01:14,294 INFO L136 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2019-12-07 14:01:14,294 INFO L138 SettingsManager]: * To the following directory=./dump/ [2019-12-07 14:01:14,294 INFO L138 SettingsManager]: * SMT solver=External_DefaultMode [2019-12-07 14:01:14,294 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 14:01:14,294 INFO L136 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2019-12-07 14:01:14,294 INFO L138 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2019-12-07 14:01:14,294 INFO L138 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2019-12-07 14:01:14,294 INFO L138 SettingsManager]: * Trace refinement strategy=SIFA_TAIPAN [2019-12-07 14:01:14,294 INFO L138 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2019-12-07 14:01:14,294 INFO L138 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2019-12-07 14:01:14,295 INFO L138 SettingsManager]: * Trace refinement exception blacklist=NONE [2019-12-07 14:01:14,295 INFO L138 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2019-12-07 14:01:14,295 INFO L138 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /tmp/vcloud-vcloud-master/worker/run_dir_5ff86975-fc51-48ff-b4f2-c1c4ef468c06/bin/utaipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness.graphml Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(__VERIFIER_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Taipan Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 6e6d8338bf7c6b9b83cab1edf5d9f1a2216e4be7 [2019-12-07 14:01:14,395 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2019-12-07 14:01:14,405 INFO L258 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2019-12-07 14:01:14,408 INFO L214 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2019-12-07 14:01:14,409 INFO L271 PluginConnector]: Initializing CDTParser... [2019-12-07 14:01:14,409 INFO L275 PluginConnector]: CDTParser initialized [2019-12-07 14:01:14,410 INFO L428 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /tmp/vcloud-vcloud-master/worker/run_dir_5ff86975-fc51-48ff-b4f2-c1c4ef468c06/bin/utaipan/../../sv-benchmarks/c/pthread-wmm/mix010_rmo.oepc.i [2019-12-07 14:01:14,453 INFO L220 CDTParser]: Created temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_5ff86975-fc51-48ff-b4f2-c1c4ef468c06/bin/utaipan/data/7fcc996bc/c5aa1d0eca2a469d82fec72d7f07f7a0/FLAG4f6bc4636 [2019-12-07 14:01:14,952 INFO L306 CDTParser]: Found 1 translation units. [2019-12-07 14:01:14,952 INFO L160 CDTParser]: Scanning /tmp/vcloud-vcloud-master/worker/run_dir_5ff86975-fc51-48ff-b4f2-c1c4ef468c06/sv-benchmarks/c/pthread-wmm/mix010_rmo.oepc.i [2019-12-07 14:01:14,963 INFO L349 CDTParser]: About to delete temporary CDT project at /tmp/vcloud-vcloud-master/worker/run_dir_5ff86975-fc51-48ff-b4f2-c1c4ef468c06/bin/utaipan/data/7fcc996bc/c5aa1d0eca2a469d82fec72d7f07f7a0/FLAG4f6bc4636 [2019-12-07 14:01:14,974 INFO L357 CDTParser]: Successfully deleted /tmp/vcloud-vcloud-master/worker/run_dir_5ff86975-fc51-48ff-b4f2-c1c4ef468c06/bin/utaipan/data/7fcc996bc/c5aa1d0eca2a469d82fec72d7f07f7a0 [2019-12-07 14:01:14,977 INFO L296 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2019-12-07 14:01:14,978 INFO L131 ToolchainWalker]: Walking toolchain with 6 elements. [2019-12-07 14:01:14,979 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2019-12-07 14:01:14,979 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2019-12-07 14:01:14,981 INFO L275 PluginConnector]: CACSL2BoogieTranslator initialized [2019-12-07 14:01:14,982 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 02:01:14" (1/1) ... [2019-12-07 14:01:14,984 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@fb68fac and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:01:14, skipping insertion in model container [2019-12-07 14:01:14,984 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 07.12 02:01:14" (1/1) ... [2019-12-07 14:01:14,989 INFO L145 MainTranslator]: Starting translation in SV-COMP mode [2019-12-07 14:01:15,027 INFO L178 MainTranslator]: Built tables and reachable declarations [2019-12-07 14:01:15,294 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 14:01:15,303 INFO L203 MainTranslator]: Completed pre-run [2019-12-07 14:01:15,350 INFO L206 PostProcessor]: Analyzing one entry point: main [2019-12-07 14:01:15,399 INFO L208 MainTranslator]: Completed translation [2019-12-07 14:01:15,400 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:01:15 WrapperNode [2019-12-07 14:01:15,400 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2019-12-07 14:01:15,400 INFO L113 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2019-12-07 14:01:15,400 INFO L271 PluginConnector]: Initializing Boogie Procedure Inliner... [2019-12-07 14:01:15,400 INFO L275 PluginConnector]: Boogie Procedure Inliner initialized [2019-12-07 14:01:15,407 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:01:15" (1/1) ... [2019-12-07 14:01:15,420 INFO L185 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:01:15" (1/1) ... [2019-12-07 14:01:15,438 INFO L132 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2019-12-07 14:01:15,438 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2019-12-07 14:01:15,438 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2019-12-07 14:01:15,438 INFO L275 PluginConnector]: Boogie Preprocessor initialized [2019-12-07 14:01:15,445 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:01:15" (1/1) ... [2019-12-07 14:01:15,445 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:01:15" (1/1) ... [2019-12-07 14:01:15,448 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:01:15" (1/1) ... [2019-12-07 14:01:15,448 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:01:15" (1/1) ... [2019-12-07 14:01:15,455 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:01:15" (1/1) ... [2019-12-07 14:01:15,458 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:01:15" (1/1) ... [2019-12-07 14:01:15,460 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:01:15" (1/1) ... [2019-12-07 14:01:15,463 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2019-12-07 14:01:15,464 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2019-12-07 14:01:15,464 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2019-12-07 14:01:15,464 INFO L275 PluginConnector]: RCFGBuilder initialized [2019-12-07 14:01:15,464 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:01:15" (1/1) ... No working directory specified, using /tmp/vcloud-vcloud-master/worker/run_dir_5ff86975-fc51-48ff-b4f2-c1c4ef468c06/bin/utaipan/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2019-12-07 14:01:15,505 INFO L130 BoogieDeclarations]: Found specification of procedure write~int [2019-12-07 14:01:15,505 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_begin [2019-12-07 14:01:15,505 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2019-12-07 14:01:15,505 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2019-12-07 14:01:15,505 INFO L130 BoogieDeclarations]: Found specification of procedure P0 [2019-12-07 14:01:15,505 INFO L138 BoogieDeclarations]: Found implementation of procedure P0 [2019-12-07 14:01:15,505 INFO L130 BoogieDeclarations]: Found specification of procedure P1 [2019-12-07 14:01:15,506 INFO L138 BoogieDeclarations]: Found implementation of procedure P1 [2019-12-07 14:01:15,506 INFO L130 BoogieDeclarations]: Found specification of procedure P2 [2019-12-07 14:01:15,506 INFO L138 BoogieDeclarations]: Found implementation of procedure P2 [2019-12-07 14:01:15,506 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_atomic_end [2019-12-07 14:01:15,506 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2019-12-07 14:01:15,506 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2019-12-07 14:01:15,507 WARN L205 CfgBuilder]: User set CodeBlockSize to LoopFreeBlock but program contains fork statements. Overwriting the user preferences and setting CodeBlockSize to SingleStatement [2019-12-07 14:01:15,885 INFO L282 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2019-12-07 14:01:15,886 INFO L287 CfgBuilder]: Removed 8 assume(true) statements. [2019-12-07 14:01:15,886 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:01:15 BoogieIcfgContainer [2019-12-07 14:01:15,887 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2019-12-07 14:01:15,887 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2019-12-07 14:01:15,887 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2019-12-07 14:01:15,889 INFO L275 PluginConnector]: TraceAbstraction initialized [2019-12-07 14:01:15,889 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 07.12 02:01:14" (1/3) ... [2019-12-07 14:01:15,890 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@18b53435 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 02:01:15, skipping insertion in model container [2019-12-07 14:01:15,890 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 07.12 02:01:15" (2/3) ... [2019-12-07 14:01:15,890 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@18b53435 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 07.12 02:01:15, skipping insertion in model container [2019-12-07 14:01:15,890 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:01:15" (3/3) ... [2019-12-07 14:01:15,891 INFO L109 eAbstractionObserver]: Analyzing ICFG mix010_rmo.oepc.i [2019-12-07 14:01:15,897 WARN L145 ceAbstractionStarter]: Switching off computation of Hoare annotation because input is a concurrent program [2019-12-07 14:01:15,898 INFO L156 ceAbstractionStarter]: Automizer settings: Hoare:false NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2019-12-07 14:01:15,902 INFO L168 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2019-12-07 14:01:15,903 INFO L339 ceAbstractionStarter]: Constructing petrified ICFG for 1 thread instances. [2019-12-07 14:01:15,928 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,928 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,928 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,928 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,928 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,928 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1___VERIFIER_assert_#in~expression| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,929 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,929 WARN L315 ript$VariableManager]: TermVariabe P0Thread1of1ForFork1___VERIFIER_assert_~expression not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,929 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,929 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,929 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,929 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,930 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,930 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,930 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,930 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,930 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite3| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,930 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite4| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,930 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,930 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite5| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,930 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,931 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,931 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,931 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite6| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,931 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,931 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,931 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,931 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite7| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,931 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,932 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,932 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,932 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#t~ite8| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,932 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,932 WARN L315 ript$VariableManager]: TermVariabe |P0Thread1of1ForFork1_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,932 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,932 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,932 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,933 WARN L315 ript$VariableManager]: TermVariabe P1Thread1of1ForFork2_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,933 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,933 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,933 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,933 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,933 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,933 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,933 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,934 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,934 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite9| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,934 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite10| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,934 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,934 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite11| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,934 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,934 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,934 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,934 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite12| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,935 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,935 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,935 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,935 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite13| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,935 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,935 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,935 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,935 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#t~ite14| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,935 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,936 WARN L315 ript$VariableManager]: TermVariabe |P1Thread1of1ForFork2_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,936 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,936 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,936 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,936 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#in~arg.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,937 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.base not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,937 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet15| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,937 WARN L315 ript$VariableManager]: TermVariabe P2Thread1of1ForFork0_~arg.offset not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,937 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~nondet16| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,937 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,937 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,937 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,937 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,937 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,938 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,938 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,938 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite17| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,938 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite18| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,938 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,938 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,938 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,938 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,938 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,938 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,939 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,939 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite21| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,939 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,939 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,939 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,939 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,939 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,939 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,939 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,940 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite19| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,940 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite20| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,940 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,940 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,940 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite24| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,940 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,940 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,940 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,940 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,940 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,941 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,941 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,941 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite22| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,941 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite23| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,941 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,941 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,941 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite27| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,941 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,941 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,941 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,942 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,942 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,942 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,942 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,942 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite25| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,942 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite26| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,942 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,942 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,942 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite30| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,942 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,943 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,943 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,943 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,943 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,943 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,943 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,943 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite28| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,943 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite29| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,943 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,943 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,943 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite33| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,944 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,944 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,944 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,944 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,944 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,944 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,944 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,944 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite31| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,944 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite32| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,944 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,945 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,945 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,945 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite36| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,945 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,945 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,945 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,945 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite37| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,945 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite34| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,945 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite35| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,945 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,946 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,946 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,946 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,946 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,946 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,946 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,946 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,946 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite38| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,946 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite39| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,946 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,946 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite40| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,947 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,947 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,947 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,947 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite41| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,947 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,947 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,947 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,947 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite42| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,947 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,948 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,948 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,948 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#t~ite43| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,948 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.base| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,948 WARN L315 ript$VariableManager]: TermVariabe |P2Thread1of1ForFork0_#res.offset| not constructed by VariableManager. Cannot ensure absence of name clashes. [2019-12-07 14:01:15,961 INFO L249 AbstractCegarLoop]: Starting to check reachability of 6 error locations. [2019-12-07 14:01:15,973 INFO L373 AbstractCegarLoop]: Interprodecural is true [2019-12-07 14:01:15,973 INFO L374 AbstractCegarLoop]: Hoare is true [2019-12-07 14:01:15,974 INFO L375 AbstractCegarLoop]: Compute interpolants for FPandBP [2019-12-07 14:01:15,974 INFO L376 AbstractCegarLoop]: Backedges is STRAIGHT_LINE [2019-12-07 14:01:15,974 INFO L377 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2019-12-07 14:01:15,974 INFO L378 AbstractCegarLoop]: Difference is false [2019-12-07 14:01:15,974 INFO L379 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2019-12-07 14:01:15,974 INFO L383 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2019-12-07 14:01:15,986 INFO L152 etLargeBlockEncoding]: Starting large block encoding on Petri net that has 179 places, 216 transitions [2019-12-07 14:01:15,987 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 179 places, 216 transitions [2019-12-07 14:01:16,052 INFO L134 PetriNetUnfolder]: 47/213 cut-off events. [2019-12-07 14:01:16,052 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 14:01:16,061 INFO L76 FinitePrefix]: Finished finitePrefix Result has 223 conditions, 213 events. 47/213 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 690 event pairs. 9/173 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 14:01:16,076 INFO L68 FinitePrefix]: Start finitePrefix. Operand has 179 places, 216 transitions [2019-12-07 14:01:16,106 INFO L134 PetriNetUnfolder]: 47/213 cut-off events. [2019-12-07 14:01:16,106 INFO L135 PetriNetUnfolder]: For 0/0 co-relation queries the response was YES. [2019-12-07 14:01:16,113 INFO L76 FinitePrefix]: Finished finitePrefix Result has 223 conditions, 213 events. 47/213 cut-off events. For 0/0 co-relation queries the response was YES. Maximal size of possible extension queue 10. Compared 690 event pairs. 9/173 useless extension candidates. Maximal degree in co-relation 179. Up to 2 conditions per place. [2019-12-07 14:01:16,131 INFO L158 etLargeBlockEncoding]: Number of co-enabled transitions 19004 [2019-12-07 14:01:16,132 INFO L170 etLargeBlockEncoding]: Semantic Check. [2019-12-07 14:01:18,938 WARN L192 SmtUtils]: Spent 189.00 ms on a formula simplification. DAG size of input: 51 DAG size of output: 47 [2019-12-07 14:01:19,243 WARN L192 SmtUtils]: Spent 160.00 ms on a formula simplification. DAG size of input: 97 DAG size of output: 95 [2019-12-07 14:01:19,338 INFO L206 etLargeBlockEncoding]: Checked pairs total: 91218 [2019-12-07 14:01:19,338 INFO L214 etLargeBlockEncoding]: Total number of compositions: 116 [2019-12-07 14:01:19,340 INFO L100 iNet2FiniteAutomaton]: Start petriNet2FiniteAutomaton. Operand has 95 places, 105 transitions [2019-12-07 14:01:36,185 INFO L122 iNet2FiniteAutomaton]: Finished petriNet2FiniteAutomaton. Result 126452 states. [2019-12-07 14:01:36,186 INFO L276 IsEmpty]: Start isEmpty. Operand 126452 states. [2019-12-07 14:01:36,190 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2019-12-07 14:01:36,190 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:01:36,190 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1] [2019-12-07 14:01:36,191 INFO L410 AbstractCegarLoop]: === Iteration 1 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:01:36,194 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:01:36,195 INFO L82 PathProgramCache]: Analyzing trace with hash 921826, now seen corresponding path program 1 times [2019-12-07 14:01:36,200 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:01:36,200 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [821862392] [2019-12-07 14:01:36,201 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:01:36,279 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:01:36,328 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:01:36,329 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [821862392] [2019-12-07 14:01:36,329 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:01:36,330 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [1] imperfect sequences [] total 1 [2019-12-07 14:01:36,330 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1978131979] [2019-12-07 14:01:36,333 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:01:36,333 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:01:36,342 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:01:36,343 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:01:36,344 INFO L87 Difference]: Start difference. First operand 126452 states. Second operand 3 states. [2019-12-07 14:01:37,113 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:01:37,114 INFO L93 Difference]: Finished difference Result 125226 states and 534182 transitions. [2019-12-07 14:01:37,114 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:01:37,115 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 3 [2019-12-07 14:01:37,116 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:01:37,555 INFO L225 Difference]: With dead ends: 125226 [2019-12-07 14:01:37,555 INFO L226 Difference]: Without dead ends: 117946 [2019-12-07 14:01:37,556 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 1 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:01:42,647 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117946 states. [2019-12-07 14:01:45,447 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117946 to 117946. [2019-12-07 14:01:45,448 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117946 states. [2019-12-07 14:01:45,858 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117946 states to 117946 states and 502500 transitions. [2019-12-07 14:01:45,859 INFO L78 Accepts]: Start accepts. Automaton has 117946 states and 502500 transitions. Word has length 3 [2019-12-07 14:01:45,859 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:01:45,859 INFO L462 AbstractCegarLoop]: Abstraction has 117946 states and 502500 transitions. [2019-12-07 14:01:45,859 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:01:45,860 INFO L276 IsEmpty]: Start isEmpty. Operand 117946 states and 502500 transitions. [2019-12-07 14:01:45,863 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2019-12-07 14:01:45,863 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:01:45,863 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:01:45,863 INFO L410 AbstractCegarLoop]: === Iteration 2 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:01:45,863 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:01:45,863 INFO L82 PathProgramCache]: Analyzing trace with hash -2034548154, now seen corresponding path program 1 times [2019-12-07 14:01:45,863 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:01:45,863 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [591615204] [2019-12-07 14:01:45,864 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:01:45,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:01:45,923 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:01:45,924 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [591615204] [2019-12-07 14:01:45,924 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:01:45,924 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:01:45,924 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [805010142] [2019-12-07 14:01:45,925 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:01:45,925 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:01:45,925 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:01:45,925 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:01:45,925 INFO L87 Difference]: Start difference. First operand 117946 states and 502500 transitions. Second operand 4 states. [2019-12-07 14:01:47,254 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:01:47,254 INFO L93 Difference]: Finished difference Result 183040 states and 750092 transitions. [2019-12-07 14:01:47,255 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:01:47,255 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2019-12-07 14:01:47,256 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:01:47,788 INFO L225 Difference]: With dead ends: 183040 [2019-12-07 14:01:47,788 INFO L226 Difference]: Without dead ends: 182991 [2019-12-07 14:01:47,789 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:01:56,095 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182991 states. [2019-12-07 14:01:58,393 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182991 to 168271. [2019-12-07 14:01:58,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 168271 states. [2019-12-07 14:01:58,878 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 168271 states to 168271 states and 697811 transitions. [2019-12-07 14:01:58,878 INFO L78 Accepts]: Start accepts. Automaton has 168271 states and 697811 transitions. Word has length 11 [2019-12-07 14:01:58,878 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:01:58,879 INFO L462 AbstractCegarLoop]: Abstraction has 168271 states and 697811 transitions. [2019-12-07 14:01:58,879 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:01:58,879 INFO L276 IsEmpty]: Start isEmpty. Operand 168271 states and 697811 transitions. [2019-12-07 14:01:58,884 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2019-12-07 14:01:58,884 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:01:58,885 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:01:58,885 INFO L410 AbstractCegarLoop]: === Iteration 3 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:01:58,885 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:01:58,885 INFO L82 PathProgramCache]: Analyzing trace with hash -579003435, now seen corresponding path program 1 times [2019-12-07 14:01:58,885 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:01:58,886 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [904104267] [2019-12-07 14:01:58,886 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:01:58,909 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:01:58,942 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:01:58,942 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [904104267] [2019-12-07 14:01:58,942 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:01:58,942 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:01:58,943 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [358727918] [2019-12-07 14:01:58,943 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:01:58,943 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:01:58,943 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:01:58,943 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:01:58,943 INFO L87 Difference]: Start difference. First operand 168271 states and 697811 transitions. Second operand 4 states. [2019-12-07 14:02:00,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:02:00,173 INFO L93 Difference]: Finished difference Result 237004 states and 961776 transitions. [2019-12-07 14:02:00,174 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:02:00,174 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2019-12-07 14:02:00,174 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:02:01,346 INFO L225 Difference]: With dead ends: 237004 [2019-12-07 14:02:01,346 INFO L226 Difference]: Without dead ends: 236948 [2019-12-07 14:02:01,347 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:02:11,156 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 236948 states. [2019-12-07 14:02:14,002 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 236948 to 201086. [2019-12-07 14:02:14,002 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 201086 states. [2019-12-07 14:02:14,606 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 201086 states to 201086 states and 829537 transitions. [2019-12-07 14:02:14,607 INFO L78 Accepts]: Start accepts. Automaton has 201086 states and 829537 transitions. Word has length 13 [2019-12-07 14:02:14,607 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:02:14,607 INFO L462 AbstractCegarLoop]: Abstraction has 201086 states and 829537 transitions. [2019-12-07 14:02:14,608 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:02:14,608 INFO L276 IsEmpty]: Start isEmpty. Operand 201086 states and 829537 transitions. [2019-12-07 14:02:14,617 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2019-12-07 14:02:14,617 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:02:14,617 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:02:14,617 INFO L410 AbstractCegarLoop]: === Iteration 4 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:02:14,617 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:02:14,617 INFO L82 PathProgramCache]: Analyzing trace with hash -1458626840, now seen corresponding path program 1 times [2019-12-07 14:02:14,618 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:02:14,618 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2050238009] [2019-12-07 14:02:14,618 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:02:14,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:02:14,683 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:02:14,684 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2050238009] [2019-12-07 14:02:14,684 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:02:14,684 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:02:14,684 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1002973420] [2019-12-07 14:02:14,684 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:02:14,685 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:02:14,685 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:02:14,685 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:02:14,685 INFO L87 Difference]: Start difference. First operand 201086 states and 829537 transitions. Second operand 5 states. [2019-12-07 14:02:16,087 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:02:16,087 INFO L93 Difference]: Finished difference Result 275142 states and 1124357 transitions. [2019-12-07 14:02:16,087 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 14:02:16,088 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 16 [2019-12-07 14:02:16,088 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:02:16,788 INFO L225 Difference]: With dead ends: 275142 [2019-12-07 14:02:16,788 INFO L226 Difference]: Without dead ends: 275142 [2019-12-07 14:02:16,788 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=24, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:02:25,080 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 275142 states. [2019-12-07 14:02:31,284 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 275142 to 230321. [2019-12-07 14:02:31,284 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 230321 states. [2019-12-07 14:02:31,970 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 230321 states to 230321 states and 948783 transitions. [2019-12-07 14:02:31,970 INFO L78 Accepts]: Start accepts. Automaton has 230321 states and 948783 transitions. Word has length 16 [2019-12-07 14:02:31,970 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:02:31,970 INFO L462 AbstractCegarLoop]: Abstraction has 230321 states and 948783 transitions. [2019-12-07 14:02:31,970 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:02:31,970 INFO L276 IsEmpty]: Start isEmpty. Operand 230321 states and 948783 transitions. [2019-12-07 14:02:31,985 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2019-12-07 14:02:31,985 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:02:31,985 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:02:31,985 INFO L410 AbstractCegarLoop]: === Iteration 5 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:02:31,986 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:02:31,986 INFO L82 PathProgramCache]: Analyzing trace with hash -1933654436, now seen corresponding path program 1 times [2019-12-07 14:02:31,986 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:02:31,986 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [134601008] [2019-12-07 14:02:31,986 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:02:32,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:02:32,022 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:02:32,022 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [134601008] [2019-12-07 14:02:32,022 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:02:32,022 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:02:32,023 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1780608936] [2019-12-07 14:02:32,023 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:02:32,023 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:02:32,023 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:02:32,023 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:02:32,023 INFO L87 Difference]: Start difference. First operand 230321 states and 948783 transitions. Second operand 3 states. [2019-12-07 14:02:32,149 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:02:32,149 INFO L93 Difference]: Finished difference Result 42455 states and 137548 transitions. [2019-12-07 14:02:32,149 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:02:32,149 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 18 [2019-12-07 14:02:32,149 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:02:32,209 INFO L225 Difference]: With dead ends: 42455 [2019-12-07 14:02:32,209 INFO L226 Difference]: Without dead ends: 42455 [2019-12-07 14:02:32,210 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:02:32,454 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42455 states. [2019-12-07 14:02:32,850 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42455 to 42335. [2019-12-07 14:02:32,850 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42335 states. [2019-12-07 14:02:32,924 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42335 states to 42335 states and 137188 transitions. [2019-12-07 14:02:32,924 INFO L78 Accepts]: Start accepts. Automaton has 42335 states and 137188 transitions. Word has length 18 [2019-12-07 14:02:32,924 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:02:32,924 INFO L462 AbstractCegarLoop]: Abstraction has 42335 states and 137188 transitions. [2019-12-07 14:02:32,924 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:02:32,924 INFO L276 IsEmpty]: Start isEmpty. Operand 42335 states and 137188 transitions. [2019-12-07 14:02:32,930 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2019-12-07 14:02:32,930 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:02:32,930 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:02:32,930 INFO L410 AbstractCegarLoop]: === Iteration 6 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:02:32,930 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:02:32,930 INFO L82 PathProgramCache]: Analyzing trace with hash -311730194, now seen corresponding path program 1 times [2019-12-07 14:02:32,930 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:02:32,931 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1218277905] [2019-12-07 14:02:32,931 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:02:32,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:02:32,988 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:02:32,988 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1218277905] [2019-12-07 14:02:32,988 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:02:32,989 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 14:02:32,989 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [140063799] [2019-12-07 14:02:32,989 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 14:02:32,989 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:02:32,989 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 14:02:32,989 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:02:32,990 INFO L87 Difference]: Start difference. First operand 42335 states and 137188 transitions. Second operand 7 states. [2019-12-07 14:02:34,045 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:02:34,045 INFO L93 Difference]: Finished difference Result 68217 states and 214442 transitions. [2019-12-07 14:02:34,045 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 14:02:34,046 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 22 [2019-12-07 14:02:34,046 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:02:34,141 INFO L225 Difference]: With dead ends: 68217 [2019-12-07 14:02:34,141 INFO L226 Difference]: Without dead ends: 68203 [2019-12-07 14:02:34,141 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=66, Invalid=144, Unknown=0, NotChecked=0, Total=210 [2019-12-07 14:02:34,449 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68203 states. [2019-12-07 14:02:34,951 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68203 to 42009. [2019-12-07 14:02:34,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42009 states. [2019-12-07 14:02:35,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42009 states to 42009 states and 135594 transitions. [2019-12-07 14:02:35,024 INFO L78 Accepts]: Start accepts. Automaton has 42009 states and 135594 transitions. Word has length 22 [2019-12-07 14:02:35,025 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:02:35,025 INFO L462 AbstractCegarLoop]: Abstraction has 42009 states and 135594 transitions. [2019-12-07 14:02:35,025 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 14:02:35,025 INFO L276 IsEmpty]: Start isEmpty. Operand 42009 states and 135594 transitions. [2019-12-07 14:02:35,034 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2019-12-07 14:02:35,034 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:02:35,034 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:02:35,034 INFO L410 AbstractCegarLoop]: === Iteration 7 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:02:35,034 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:02:35,034 INFO L82 PathProgramCache]: Analyzing trace with hash 573582081, now seen corresponding path program 1 times [2019-12-07 14:02:35,034 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:02:35,035 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2076601890] [2019-12-07 14:02:35,035 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:02:35,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:02:35,082 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:02:35,083 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2076601890] [2019-12-07 14:02:35,083 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:02:35,083 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:02:35,083 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1659796116] [2019-12-07 14:02:35,083 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:02:35,083 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:02:35,084 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:02:35,084 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:02:35,084 INFO L87 Difference]: Start difference. First operand 42009 states and 135594 transitions. Second operand 5 states. [2019-12-07 14:02:35,494 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:02:35,494 INFO L93 Difference]: Finished difference Result 57974 states and 183613 transitions. [2019-12-07 14:02:35,494 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2019-12-07 14:02:35,494 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2019-12-07 14:02:35,494 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:02:35,583 INFO L225 Difference]: With dead ends: 57974 [2019-12-07 14:02:35,583 INFO L226 Difference]: Without dead ends: 57961 [2019-12-07 14:02:35,584 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:02:35,874 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57961 states. [2019-12-07 14:02:36,413 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57961 to 49840. [2019-12-07 14:02:36,413 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49840 states. [2019-12-07 14:02:36,915 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49840 states to 49840 states and 160152 transitions. [2019-12-07 14:02:36,916 INFO L78 Accepts]: Start accepts. Automaton has 49840 states and 160152 transitions. Word has length 25 [2019-12-07 14:02:36,916 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:02:36,916 INFO L462 AbstractCegarLoop]: Abstraction has 49840 states and 160152 transitions. [2019-12-07 14:02:36,916 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:02:36,916 INFO L276 IsEmpty]: Start isEmpty. Operand 49840 states and 160152 transitions. [2019-12-07 14:02:36,929 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2019-12-07 14:02:36,929 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:02:36,930 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:02:36,930 INFO L410 AbstractCegarLoop]: === Iteration 8 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:02:36,930 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:02:36,930 INFO L82 PathProgramCache]: Analyzing trace with hash 574668024, now seen corresponding path program 1 times [2019-12-07 14:02:36,930 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:02:36,930 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [387831169] [2019-12-07 14:02:36,930 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:02:36,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:02:36,973 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:02:36,973 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [387831169] [2019-12-07 14:02:36,973 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:02:36,973 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:02:36,973 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [819427686] [2019-12-07 14:02:36,974 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:02:36,974 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:02:36,974 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:02:36,974 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:02:36,974 INFO L87 Difference]: Start difference. First operand 49840 states and 160152 transitions. Second operand 6 states. [2019-12-07 14:02:37,438 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:02:37,439 INFO L93 Difference]: Finished difference Result 71876 states and 224793 transitions. [2019-12-07 14:02:37,439 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2019-12-07 14:02:37,439 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 27 [2019-12-07 14:02:37,439 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:02:37,541 INFO L225 Difference]: With dead ends: 71876 [2019-12-07 14:02:37,542 INFO L226 Difference]: Without dead ends: 71836 [2019-12-07 14:02:37,542 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2019-12-07 14:02:37,877 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71836 states. [2019-12-07 14:02:38,523 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71836 to 55662. [2019-12-07 14:02:38,523 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55662 states. [2019-12-07 14:02:38,627 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55662 states to 55662 states and 177494 transitions. [2019-12-07 14:02:38,627 INFO L78 Accepts]: Start accepts. Automaton has 55662 states and 177494 transitions. Word has length 27 [2019-12-07 14:02:38,628 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:02:38,628 INFO L462 AbstractCegarLoop]: Abstraction has 55662 states and 177494 transitions. [2019-12-07 14:02:38,628 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:02:38,628 INFO L276 IsEmpty]: Start isEmpty. Operand 55662 states and 177494 transitions. [2019-12-07 14:02:38,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2019-12-07 14:02:38,643 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:02:38,643 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:02:38,643 INFO L410 AbstractCegarLoop]: === Iteration 9 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:02:38,643 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:02:38,643 INFO L82 PathProgramCache]: Analyzing trace with hash -834373480, now seen corresponding path program 1 times [2019-12-07 14:02:38,644 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:02:38,644 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [828698510] [2019-12-07 14:02:38,644 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:02:38,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:02:38,699 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:02:38,699 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [828698510] [2019-12-07 14:02:38,700 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:02:38,700 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2019-12-07 14:02:38,700 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1990188484] [2019-12-07 14:02:38,700 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:02:38,700 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:02:38,701 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:02:38,701 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:02:38,701 INFO L87 Difference]: Start difference. First operand 55662 states and 177494 transitions. Second operand 5 states. [2019-12-07 14:02:39,242 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:02:39,242 INFO L93 Difference]: Finished difference Result 73977 states and 234048 transitions. [2019-12-07 14:02:39,243 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2019-12-07 14:02:39,243 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2019-12-07 14:02:39,243 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:02:39,351 INFO L225 Difference]: With dead ends: 73977 [2019-12-07 14:02:39,351 INFO L226 Difference]: Without dead ends: 73977 [2019-12-07 14:02:39,351 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:02:39,679 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73977 states. [2019-12-07 14:02:40,703 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73977 to 66292. [2019-12-07 14:02:40,703 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66292 states. [2019-12-07 14:02:40,826 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66292 states to 66292 states and 211352 transitions. [2019-12-07 14:02:40,826 INFO L78 Accepts]: Start accepts. Automaton has 66292 states and 211352 transitions. Word has length 28 [2019-12-07 14:02:40,826 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:02:40,826 INFO L462 AbstractCegarLoop]: Abstraction has 66292 states and 211352 transitions. [2019-12-07 14:02:40,827 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:02:40,827 INFO L276 IsEmpty]: Start isEmpty. Operand 66292 states and 211352 transitions. [2019-12-07 14:02:40,850 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2019-12-07 14:02:40,850 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:02:40,850 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:02:40,850 INFO L410 AbstractCegarLoop]: === Iteration 10 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:02:40,850 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:02:40,850 INFO L82 PathProgramCache]: Analyzing trace with hash -1649688558, now seen corresponding path program 1 times [2019-12-07 14:02:40,851 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:02:40,851 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1393396061] [2019-12-07 14:02:40,851 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:02:40,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:02:40,888 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:02:40,888 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1393396061] [2019-12-07 14:02:40,888 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:02:40,888 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:02:40,889 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1278773650] [2019-12-07 14:02:40,889 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:02:40,889 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:02:40,889 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:02:40,889 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:02:40,889 INFO L87 Difference]: Start difference. First operand 66292 states and 211352 transitions. Second operand 4 states. [2019-12-07 14:02:40,973 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:02:40,973 INFO L93 Difference]: Finished difference Result 28026 states and 84332 transitions. [2019-12-07 14:02:40,974 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 14:02:40,974 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 29 [2019-12-07 14:02:40,974 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:02:41,006 INFO L225 Difference]: With dead ends: 28026 [2019-12-07 14:02:41,007 INFO L226 Difference]: Without dead ends: 28026 [2019-12-07 14:02:41,007 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:02:41,115 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28026 states. [2019-12-07 14:02:41,353 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28026 to 26046. [2019-12-07 14:02:41,353 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26046 states. [2019-12-07 14:02:41,398 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26046 states to 26046 states and 78430 transitions. [2019-12-07 14:02:41,398 INFO L78 Accepts]: Start accepts. Automaton has 26046 states and 78430 transitions. Word has length 29 [2019-12-07 14:02:41,398 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:02:41,399 INFO L462 AbstractCegarLoop]: Abstraction has 26046 states and 78430 transitions. [2019-12-07 14:02:41,399 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:02:41,399 INFO L276 IsEmpty]: Start isEmpty. Operand 26046 states and 78430 transitions. [2019-12-07 14:02:41,421 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 14:02:41,421 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:02:41,421 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:02:41,421 INFO L410 AbstractCegarLoop]: === Iteration 11 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:02:41,421 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:02:41,421 INFO L82 PathProgramCache]: Analyzing trace with hash -1393723506, now seen corresponding path program 1 times [2019-12-07 14:02:41,421 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:02:41,422 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [341469281] [2019-12-07 14:02:41,422 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:02:41,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:02:41,476 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:02:41,477 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [341469281] [2019-12-07 14:02:41,477 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:02:41,477 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:02:41,477 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2118757224] [2019-12-07 14:02:41,477 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:02:41,477 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:02:41,477 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:02:41,477 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:02:41,478 INFO L87 Difference]: Start difference. First operand 26046 states and 78430 transitions. Second operand 6 states. [2019-12-07 14:02:41,835 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:02:41,835 INFO L93 Difference]: Finished difference Result 31590 states and 94030 transitions. [2019-12-07 14:02:41,835 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 14:02:41,836 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 33 [2019-12-07 14:02:41,836 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:02:41,871 INFO L225 Difference]: With dead ends: 31590 [2019-12-07 14:02:41,871 INFO L226 Difference]: Without dead ends: 31590 [2019-12-07 14:02:41,872 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=47, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:02:41,988 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31590 states. [2019-12-07 14:02:42,243 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31590 to 26815. [2019-12-07 14:02:42,244 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26815 states. [2019-12-07 14:02:42,564 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26815 states to 26815 states and 80873 transitions. [2019-12-07 14:02:42,564 INFO L78 Accepts]: Start accepts. Automaton has 26815 states and 80873 transitions. Word has length 33 [2019-12-07 14:02:42,564 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:02:42,564 INFO L462 AbstractCegarLoop]: Abstraction has 26815 states and 80873 transitions. [2019-12-07 14:02:42,564 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:02:42,564 INFO L276 IsEmpty]: Start isEmpty. Operand 26815 states and 80873 transitions. [2019-12-07 14:02:42,579 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2019-12-07 14:02:42,579 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:02:42,579 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:02:42,580 INFO L410 AbstractCegarLoop]: === Iteration 12 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:02:42,580 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:02:42,580 INFO L82 PathProgramCache]: Analyzing trace with hash 305072172, now seen corresponding path program 2 times [2019-12-07 14:02:42,580 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:02:42,580 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1900874290] [2019-12-07 14:02:42,580 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:02:42,589 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:02:42,641 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:02:42,642 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1900874290] [2019-12-07 14:02:42,642 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:02:42,642 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 14:02:42,642 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2114796596] [2019-12-07 14:02:42,642 INFO L442 AbstractCegarLoop]: Interpolant automaton has 8 states [2019-12-07 14:02:42,642 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:02:42,642 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2019-12-07 14:02:42,643 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2019-12-07 14:02:42,643 INFO L87 Difference]: Start difference. First operand 26815 states and 80873 transitions. Second operand 8 states. [2019-12-07 14:02:43,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:02:43,496 INFO L93 Difference]: Finished difference Result 36396 states and 106445 transitions. [2019-12-07 14:02:43,497 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2019-12-07 14:02:43,497 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 33 [2019-12-07 14:02:43,497 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:02:43,536 INFO L225 Difference]: With dead ends: 36396 [2019-12-07 14:02:43,536 INFO L226 Difference]: Without dead ends: 36396 [2019-12-07 14:02:43,536 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 93 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=110, Invalid=352, Unknown=0, NotChecked=0, Total=462 [2019-12-07 14:02:43,664 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36396 states. [2019-12-07 14:02:43,931 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36396 to 24841. [2019-12-07 14:02:43,931 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24841 states. [2019-12-07 14:02:43,973 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24841 states to 24841 states and 74402 transitions. [2019-12-07 14:02:43,973 INFO L78 Accepts]: Start accepts. Automaton has 24841 states and 74402 transitions. Word has length 33 [2019-12-07 14:02:43,973 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:02:43,973 INFO L462 AbstractCegarLoop]: Abstraction has 24841 states and 74402 transitions. [2019-12-07 14:02:43,973 INFO L463 AbstractCegarLoop]: Interpolant automaton has 8 states. [2019-12-07 14:02:43,973 INFO L276 IsEmpty]: Start isEmpty. Operand 24841 states and 74402 transitions. [2019-12-07 14:02:43,993 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 14:02:43,994 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:02:43,994 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:02:43,994 INFO L410 AbstractCegarLoop]: === Iteration 13 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:02:43,994 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:02:43,994 INFO L82 PathProgramCache]: Analyzing trace with hash -1779229683, now seen corresponding path program 1 times [2019-12-07 14:02:43,994 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:02:43,994 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1855821011] [2019-12-07 14:02:43,994 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:02:44,008 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:02:44,059 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:02:44,059 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1855821011] [2019-12-07 14:02:44,059 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:02:44,059 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2019-12-07 14:02:44,059 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2090797743] [2019-12-07 14:02:44,060 INFO L442 AbstractCegarLoop]: Interpolant automaton has 6 states [2019-12-07 14:02:44,060 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:02:44,060 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2019-12-07 14:02:44,060 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2019-12-07 14:02:44,060 INFO L87 Difference]: Start difference. First operand 24841 states and 74402 transitions. Second operand 6 states. [2019-12-07 14:02:44,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:02:44,654 INFO L93 Difference]: Finished difference Result 41721 states and 125684 transitions. [2019-12-07 14:02:44,654 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2019-12-07 14:02:44,654 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 39 [2019-12-07 14:02:44,654 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:02:44,703 INFO L225 Difference]: With dead ends: 41721 [2019-12-07 14:02:44,703 INFO L226 Difference]: Without dead ends: 41721 [2019-12-07 14:02:44,703 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2019-12-07 14:02:44,846 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41721 states. [2019-12-07 14:02:45,170 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41721 to 28558. [2019-12-07 14:02:45,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28558 states. [2019-12-07 14:02:45,218 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28558 states to 28558 states and 86084 transitions. [2019-12-07 14:02:45,218 INFO L78 Accepts]: Start accepts. Automaton has 28558 states and 86084 transitions. Word has length 39 [2019-12-07 14:02:45,218 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:02:45,218 INFO L462 AbstractCegarLoop]: Abstraction has 28558 states and 86084 transitions. [2019-12-07 14:02:45,218 INFO L463 AbstractCegarLoop]: Interpolant automaton has 6 states. [2019-12-07 14:02:45,218 INFO L276 IsEmpty]: Start isEmpty. Operand 28558 states and 86084 transitions. [2019-12-07 14:02:45,245 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 14:02:45,246 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:02:45,246 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:02:45,246 INFO L410 AbstractCegarLoop]: === Iteration 14 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:02:45,246 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:02:45,246 INFO L82 PathProgramCache]: Analyzing trace with hash 681610815, now seen corresponding path program 2 times [2019-12-07 14:02:45,246 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:02:45,246 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1377174240] [2019-12-07 14:02:45,246 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:02:45,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:02:45,322 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:02:45,323 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1377174240] [2019-12-07 14:02:45,323 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:02:45,323 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 14:02:45,323 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [241982265] [2019-12-07 14:02:45,323 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 14:02:45,323 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:02:45,324 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 14:02:45,324 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:02:45,324 INFO L87 Difference]: Start difference. First operand 28558 states and 86084 transitions. Second operand 7 states. [2019-12-07 14:02:46,389 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:02:46,389 INFO L93 Difference]: Finished difference Result 37324 states and 110701 transitions. [2019-12-07 14:02:46,389 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2019-12-07 14:02:46,389 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 39 [2019-12-07 14:02:46,389 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:02:46,427 INFO L225 Difference]: With dead ends: 37324 [2019-12-07 14:02:46,428 INFO L226 Difference]: Without dead ends: 37324 [2019-12-07 14:02:46,428 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 3 SyntacticMatches, 3 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2019-12-07 14:02:46,575 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37324 states. [2019-12-07 14:02:46,866 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37324 to 29535. [2019-12-07 14:02:46,866 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29535 states. [2019-12-07 14:02:46,910 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29535 states to 29535 states and 88935 transitions. [2019-12-07 14:02:46,910 INFO L78 Accepts]: Start accepts. Automaton has 29535 states and 88935 transitions. Word has length 39 [2019-12-07 14:02:46,910 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:02:46,910 INFO L462 AbstractCegarLoop]: Abstraction has 29535 states and 88935 transitions. [2019-12-07 14:02:46,910 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 14:02:46,910 INFO L276 IsEmpty]: Start isEmpty. Operand 29535 states and 88935 transitions. [2019-12-07 14:02:46,937 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2019-12-07 14:02:46,937 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:02:46,937 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:02:46,937 INFO L410 AbstractCegarLoop]: === Iteration 15 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:02:46,937 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:02:46,938 INFO L82 PathProgramCache]: Analyzing trace with hash 1623043003, now seen corresponding path program 3 times [2019-12-07 14:02:46,938 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:02:46,938 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1705482443] [2019-12-07 14:02:46,938 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:02:46,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:02:46,973 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:02:46,973 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1705482443] [2019-12-07 14:02:46,973 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:02:46,973 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:02:46,973 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2062728053] [2019-12-07 14:02:46,973 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:02:46,973 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:02:46,974 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:02:46,974 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:02:46,974 INFO L87 Difference]: Start difference. First operand 29535 states and 88935 transitions. Second operand 3 states. [2019-12-07 14:02:47,056 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:02:47,056 INFO L93 Difference]: Finished difference Result 29456 states and 88689 transitions. [2019-12-07 14:02:47,056 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:02:47,056 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 39 [2019-12-07 14:02:47,056 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:02:47,104 INFO L225 Difference]: With dead ends: 29456 [2019-12-07 14:02:47,104 INFO L226 Difference]: Without dead ends: 29456 [2019-12-07 14:02:47,104 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:02:47,224 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29456 states. [2019-12-07 14:02:47,469 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29456 to 25070. [2019-12-07 14:02:47,469 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25070 states. [2019-12-07 14:02:47,509 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25070 states to 25070 states and 76274 transitions. [2019-12-07 14:02:47,509 INFO L78 Accepts]: Start accepts. Automaton has 25070 states and 76274 transitions. Word has length 39 [2019-12-07 14:02:47,509 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:02:47,510 INFO L462 AbstractCegarLoop]: Abstraction has 25070 states and 76274 transitions. [2019-12-07 14:02:47,510 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:02:47,510 INFO L276 IsEmpty]: Start isEmpty. Operand 25070 states and 76274 transitions. [2019-12-07 14:02:47,530 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2019-12-07 14:02:47,530 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:02:47,531 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:02:47,531 INFO L410 AbstractCegarLoop]: === Iteration 16 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:02:47,531 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:02:47,531 INFO L82 PathProgramCache]: Analyzing trace with hash -875459779, now seen corresponding path program 1 times [2019-12-07 14:02:47,531 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:02:47,531 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [804483330] [2019-12-07 14:02:47,531 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:02:47,544 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:02:47,569 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:02:47,569 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [804483330] [2019-12-07 14:02:47,570 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:02:47,570 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:02:47,571 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1674770887] [2019-12-07 14:02:47,571 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:02:47,571 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:02:47,571 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:02:47,571 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:02:47,572 INFO L87 Difference]: Start difference. First operand 25070 states and 76274 transitions. Second operand 3 states. [2019-12-07 14:02:47,632 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:02:47,632 INFO L93 Difference]: Finished difference Result 21283 states and 63525 transitions. [2019-12-07 14:02:47,632 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:02:47,632 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 40 [2019-12-07 14:02:47,632 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:02:47,656 INFO L225 Difference]: With dead ends: 21283 [2019-12-07 14:02:47,656 INFO L226 Difference]: Without dead ends: 21283 [2019-12-07 14:02:47,656 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:02:47,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21283 states. [2019-12-07 14:02:47,913 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21283 to 20809. [2019-12-07 14:02:47,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20809 states. [2019-12-07 14:02:47,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20809 states to 20809 states and 62171 transitions. [2019-12-07 14:02:47,945 INFO L78 Accepts]: Start accepts. Automaton has 20809 states and 62171 transitions. Word has length 40 [2019-12-07 14:02:47,945 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:02:47,945 INFO L462 AbstractCegarLoop]: Abstraction has 20809 states and 62171 transitions. [2019-12-07 14:02:47,945 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:02:47,945 INFO L276 IsEmpty]: Start isEmpty. Operand 20809 states and 62171 transitions. [2019-12-07 14:02:47,962 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2019-12-07 14:02:47,962 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:02:47,962 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:02:47,962 INFO L410 AbstractCegarLoop]: === Iteration 17 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:02:47,963 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:02:47,963 INFO L82 PathProgramCache]: Analyzing trace with hash -2067606308, now seen corresponding path program 1 times [2019-12-07 14:02:47,963 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:02:47,963 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1580924025] [2019-12-07 14:02:47,963 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:02:47,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:02:47,996 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:02:47,996 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1580924025] [2019-12-07 14:02:47,996 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:02:47,996 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2019-12-07 14:02:47,997 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1224990070] [2019-12-07 14:02:47,997 INFO L442 AbstractCegarLoop]: Interpolant automaton has 5 states [2019-12-07 14:02:47,997 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:02:47,997 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2019-12-07 14:02:47,997 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:02:47,997 INFO L87 Difference]: Start difference. First operand 20809 states and 62171 transitions. Second operand 5 states. [2019-12-07 14:02:48,058 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:02:48,058 INFO L93 Difference]: Finished difference Result 19339 states and 58945 transitions. [2019-12-07 14:02:48,058 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2019-12-07 14:02:48,058 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 41 [2019-12-07 14:02:48,058 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:02:48,078 INFO L225 Difference]: With dead ends: 19339 [2019-12-07 14:02:48,078 INFO L226 Difference]: Without dead ends: 19339 [2019-12-07 14:02:48,078 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:02:48,160 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19339 states. [2019-12-07 14:02:48,315 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19339 to 18217. [2019-12-07 14:02:48,316 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18217 states. [2019-12-07 14:02:48,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18217 states to 18217 states and 55780 transitions. [2019-12-07 14:02:48,344 INFO L78 Accepts]: Start accepts. Automaton has 18217 states and 55780 transitions. Word has length 41 [2019-12-07 14:02:48,344 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:02:48,344 INFO L462 AbstractCegarLoop]: Abstraction has 18217 states and 55780 transitions. [2019-12-07 14:02:48,344 INFO L463 AbstractCegarLoop]: Interpolant automaton has 5 states. [2019-12-07 14:02:48,344 INFO L276 IsEmpty]: Start isEmpty. Operand 18217 states and 55780 transitions. [2019-12-07 14:02:48,360 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 14:02:48,360 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:02:48,360 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:02:48,360 INFO L410 AbstractCegarLoop]: === Iteration 18 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:02:48,360 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:02:48,360 INFO L82 PathProgramCache]: Analyzing trace with hash 338241501, now seen corresponding path program 1 times [2019-12-07 14:02:48,360 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:02:48,360 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2066250435] [2019-12-07 14:02:48,360 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:02:48,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:02:48,388 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:02:48,388 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2066250435] [2019-12-07 14:02:48,388 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:02:48,388 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:02:48,388 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1313538147] [2019-12-07 14:02:48,389 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:02:48,389 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:02:48,389 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:02:48,389 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:02:48,389 INFO L87 Difference]: Start difference. First operand 18217 states and 55780 transitions. Second operand 3 states. [2019-12-07 14:02:48,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:02:48,493 INFO L93 Difference]: Finished difference Result 24203 states and 74468 transitions. [2019-12-07 14:02:48,493 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:02:48,493 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 14:02:48,493 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:02:48,519 INFO L225 Difference]: With dead ends: 24203 [2019-12-07 14:02:48,519 INFO L226 Difference]: Without dead ends: 24203 [2019-12-07 14:02:48,519 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:02:48,611 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24203 states. [2019-12-07 14:02:48,792 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24203 to 19613. [2019-12-07 14:02:48,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19613 states. [2019-12-07 14:02:48,822 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19613 states to 19613 states and 60709 transitions. [2019-12-07 14:02:48,822 INFO L78 Accepts]: Start accepts. Automaton has 19613 states and 60709 transitions. Word has length 66 [2019-12-07 14:02:48,823 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:02:48,823 INFO L462 AbstractCegarLoop]: Abstraction has 19613 states and 60709 transitions. [2019-12-07 14:02:48,823 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:02:48,823 INFO L276 IsEmpty]: Start isEmpty. Operand 19613 states and 60709 transitions. [2019-12-07 14:02:48,840 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2019-12-07 14:02:48,840 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:02:48,840 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:02:48,840 INFO L410 AbstractCegarLoop]: === Iteration 19 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:02:48,840 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:02:48,840 INFO L82 PathProgramCache]: Analyzing trace with hash 1326528610, now seen corresponding path program 1 times [2019-12-07 14:02:48,840 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:02:48,840 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [89661799] [2019-12-07 14:02:48,841 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:02:48,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:02:48,887 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:02:48,887 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [89661799] [2019-12-07 14:02:48,887 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:02:48,887 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2019-12-07 14:02:48,887 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1982953580] [2019-12-07 14:02:48,888 INFO L442 AbstractCegarLoop]: Interpolant automaton has 3 states [2019-12-07 14:02:48,888 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:02:48,888 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2019-12-07 14:02:48,888 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:02:48,888 INFO L87 Difference]: Start difference. First operand 19613 states and 60709 transitions. Second operand 3 states. [2019-12-07 14:02:48,975 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:02:48,975 INFO L93 Difference]: Finished difference Result 23071 states and 71257 transitions. [2019-12-07 14:02:48,975 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2019-12-07 14:02:48,975 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 66 [2019-12-07 14:02:48,975 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:02:48,999 INFO L225 Difference]: With dead ends: 23071 [2019-12-07 14:02:48,999 INFO L226 Difference]: Without dead ends: 23071 [2019-12-07 14:02:48,999 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2019-12-07 14:02:49,090 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23071 states. [2019-12-07 14:02:49,275 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23071 to 19342. [2019-12-07 14:02:49,275 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19342 states. [2019-12-07 14:02:49,306 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19342 states to 19342 states and 59945 transitions. [2019-12-07 14:02:49,306 INFO L78 Accepts]: Start accepts. Automaton has 19342 states and 59945 transitions. Word has length 66 [2019-12-07 14:02:49,306 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:02:49,306 INFO L462 AbstractCegarLoop]: Abstraction has 19342 states and 59945 transitions. [2019-12-07 14:02:49,306 INFO L463 AbstractCegarLoop]: Interpolant automaton has 3 states. [2019-12-07 14:02:49,306 INFO L276 IsEmpty]: Start isEmpty. Operand 19342 states and 59945 transitions. [2019-12-07 14:02:49,323 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:02:49,324 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:02:49,324 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:02:49,324 INFO L410 AbstractCegarLoop]: === Iteration 20 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:02:49,324 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:02:49,324 INFO L82 PathProgramCache]: Analyzing trace with hash 323085019, now seen corresponding path program 1 times [2019-12-07 14:02:49,324 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:02:49,324 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [323001778] [2019-12-07 14:02:49,324 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:02:49,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:02:49,390 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:02:49,390 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [323001778] [2019-12-07 14:02:49,391 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:02:49,391 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2019-12-07 14:02:49,391 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [380714089] [2019-12-07 14:02:49,391 INFO L442 AbstractCegarLoop]: Interpolant automaton has 7 states [2019-12-07 14:02:49,391 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:02:49,391 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2019-12-07 14:02:49,391 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2019-12-07 14:02:49,391 INFO L87 Difference]: Start difference. First operand 19342 states and 59945 transitions. Second operand 7 states. [2019-12-07 14:02:49,987 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:02:49,987 INFO L93 Difference]: Finished difference Result 30133 states and 91419 transitions. [2019-12-07 14:02:49,988 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2019-12-07 14:02:49,988 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 67 [2019-12-07 14:02:49,988 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:02:50,021 INFO L225 Difference]: With dead ends: 30133 [2019-12-07 14:02:50,021 INFO L226 Difference]: Without dead ends: 30133 [2019-12-07 14:02:50,021 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 31 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=52, Invalid=158, Unknown=0, NotChecked=0, Total=210 [2019-12-07 14:02:50,129 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30133 states. [2019-12-07 14:02:50,356 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30133 to 20753. [2019-12-07 14:02:50,356 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20753 states. [2019-12-07 14:02:50,389 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20753 states to 20753 states and 64080 transitions. [2019-12-07 14:02:50,390 INFO L78 Accepts]: Start accepts. Automaton has 20753 states and 64080 transitions. Word has length 67 [2019-12-07 14:02:50,390 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:02:50,390 INFO L462 AbstractCegarLoop]: Abstraction has 20753 states and 64080 transitions. [2019-12-07 14:02:50,390 INFO L463 AbstractCegarLoop]: Interpolant automaton has 7 states. [2019-12-07 14:02:50,390 INFO L276 IsEmpty]: Start isEmpty. Operand 20753 states and 64080 transitions. [2019-12-07 14:02:50,408 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:02:50,408 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:02:50,408 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:02:50,408 INFO L410 AbstractCegarLoop]: === Iteration 21 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:02:50,409 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:02:50,409 INFO L82 PathProgramCache]: Analyzing trace with hash -1912825147, now seen corresponding path program 2 times [2019-12-07 14:02:50,409 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:02:50,409 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [811014330] [2019-12-07 14:02:50,409 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:02:50,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:02:50,455 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:02:50,455 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [811014330] [2019-12-07 14:02:50,455 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:02:50,455 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2019-12-07 14:02:50,455 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1870509270] [2019-12-07 14:02:50,456 INFO L442 AbstractCegarLoop]: Interpolant automaton has 4 states [2019-12-07 14:02:50,456 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:02:50,456 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2019-12-07 14:02:50,456 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2019-12-07 14:02:50,456 INFO L87 Difference]: Start difference. First operand 20753 states and 64080 transitions. Second operand 4 states. [2019-12-07 14:02:50,548 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:02:50,548 INFO L93 Difference]: Finished difference Result 20753 states and 63849 transitions. [2019-12-07 14:02:50,548 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2019-12-07 14:02:50,548 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 67 [2019-12-07 14:02:50,549 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:02:50,572 INFO L225 Difference]: With dead ends: 20753 [2019-12-07 14:02:50,572 INFO L226 Difference]: Without dead ends: 20753 [2019-12-07 14:02:50,573 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 2 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2019-12-07 14:02:50,663 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20753 states. [2019-12-07 14:02:50,835 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20753 to 18388. [2019-12-07 14:02:50,835 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 18388 states. [2019-12-07 14:02:50,864 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18388 states to 18388 states and 56600 transitions. [2019-12-07 14:02:50,864 INFO L78 Accepts]: Start accepts. Automaton has 18388 states and 56600 transitions. Word has length 67 [2019-12-07 14:02:50,864 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:02:50,864 INFO L462 AbstractCegarLoop]: Abstraction has 18388 states and 56600 transitions. [2019-12-07 14:02:50,864 INFO L463 AbstractCegarLoop]: Interpolant automaton has 4 states. [2019-12-07 14:02:50,864 INFO L276 IsEmpty]: Start isEmpty. Operand 18388 states and 56600 transitions. [2019-12-07 14:02:50,880 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:02:50,880 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:02:50,880 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:02:50,880 INFO L410 AbstractCegarLoop]: === Iteration 22 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:02:50,880 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:02:50,880 INFO L82 PathProgramCache]: Analyzing trace with hash 2062742571, now seen corresponding path program 1 times [2019-12-07 14:02:50,880 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:02:50,881 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2113900162] [2019-12-07 14:02:50,881 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:02:50,904 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:02:51,264 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:02:51,264 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2113900162] [2019-12-07 14:02:51,264 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:02:51,264 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 14:02:51,264 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [67085311] [2019-12-07 14:02:51,264 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 14:02:51,265 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:02:51,265 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 14:02:51,265 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2019-12-07 14:02:51,265 INFO L87 Difference]: Start difference. First operand 18388 states and 56600 transitions. Second operand 15 states. [2019-12-07 14:02:54,979 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:02:54,980 INFO L93 Difference]: Finished difference Result 43134 states and 130986 transitions. [2019-12-07 14:02:54,981 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2019-12-07 14:02:54,981 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 14:02:54,981 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:02:55,028 INFO L225 Difference]: With dead ends: 43134 [2019-12-07 14:02:55,028 INFO L226 Difference]: Without dead ends: 30888 [2019-12-07 14:02:55,029 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 673 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=375, Invalid=2075, Unknown=0, NotChecked=0, Total=2450 [2019-12-07 14:02:55,141 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30888 states. [2019-12-07 14:02:55,370 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30888 to 20663. [2019-12-07 14:02:55,371 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20663 states. [2019-12-07 14:02:55,405 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20663 states to 20663 states and 63881 transitions. [2019-12-07 14:02:55,406 INFO L78 Accepts]: Start accepts. Automaton has 20663 states and 63881 transitions. Word has length 67 [2019-12-07 14:02:55,406 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:02:55,406 INFO L462 AbstractCegarLoop]: Abstraction has 20663 states and 63881 transitions. [2019-12-07 14:02:55,406 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 14:02:55,406 INFO L276 IsEmpty]: Start isEmpty. Operand 20663 states and 63881 transitions. [2019-12-07 14:02:55,425 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:02:55,425 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:02:55,425 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:02:55,425 INFO L410 AbstractCegarLoop]: === Iteration 23 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:02:55,425 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:02:55,425 INFO L82 PathProgramCache]: Analyzing trace with hash -432761565, now seen corresponding path program 2 times [2019-12-07 14:02:55,425 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:02:55,425 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [98621201] [2019-12-07 14:02:55,426 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:02:55,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:02:55,586 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:02:55,586 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [98621201] [2019-12-07 14:02:55,586 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:02:55,586 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 14:02:55,587 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [786725855] [2019-12-07 14:02:55,587 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 14:02:55,587 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:02:55,587 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 14:02:55,587 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2019-12-07 14:02:55,587 INFO L87 Difference]: Start difference. First operand 20663 states and 63881 transitions. Second operand 10 states. [2019-12-07 14:02:58,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:02:58,125 INFO L93 Difference]: Finished difference Result 40602 states and 124295 transitions. [2019-12-07 14:02:58,125 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2019-12-07 14:02:58,126 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 14:02:58,126 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:02:58,159 INFO L225 Difference]: With dead ends: 40602 [2019-12-07 14:02:58,159 INFO L226 Difference]: Without dead ends: 29767 [2019-12-07 14:02:58,159 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 136 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=144, Invalid=612, Unknown=0, NotChecked=0, Total=756 [2019-12-07 14:02:58,266 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29767 states. [2019-12-07 14:02:58,483 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29767 to 21243. [2019-12-07 14:02:58,483 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21243 states. [2019-12-07 14:02:58,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21243 states to 21243 states and 65248 transitions. [2019-12-07 14:02:58,518 INFO L78 Accepts]: Start accepts. Automaton has 21243 states and 65248 transitions. Word has length 67 [2019-12-07 14:02:58,518 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:02:58,518 INFO L462 AbstractCegarLoop]: Abstraction has 21243 states and 65248 transitions. [2019-12-07 14:02:58,518 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 14:02:58,518 INFO L276 IsEmpty]: Start isEmpty. Operand 21243 states and 65248 transitions. [2019-12-07 14:02:58,536 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:02:58,536 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:02:58,537 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:02:58,537 INFO L410 AbstractCegarLoop]: === Iteration 24 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:02:58,537 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:02:58,537 INFO L82 PathProgramCache]: Analyzing trace with hash -492001749, now seen corresponding path program 3 times [2019-12-07 14:02:58,537 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:02:58,537 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [882410638] [2019-12-07 14:02:58,537 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:02:58,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:02:58,679 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:02:58,679 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [882410638] [2019-12-07 14:02:58,679 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:02:58,679 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2019-12-07 14:02:58,679 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [575970124] [2019-12-07 14:02:58,679 INFO L442 AbstractCegarLoop]: Interpolant automaton has 10 states [2019-12-07 14:02:58,680 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:02:58,680 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2019-12-07 14:02:58,680 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2019-12-07 14:02:58,680 INFO L87 Difference]: Start difference. First operand 21243 states and 65248 transitions. Second operand 10 states. [2019-12-07 14:03:00,545 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:03:00,545 INFO L93 Difference]: Finished difference Result 33876 states and 103103 transitions. [2019-12-07 14:03:00,546 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2019-12-07 14:03:00,546 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 67 [2019-12-07 14:03:00,547 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:03:00,595 INFO L225 Difference]: With dead ends: 33876 [2019-12-07 14:03:00,595 INFO L226 Difference]: Without dead ends: 29631 [2019-12-07 14:03:00,596 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 0 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=83, Invalid=337, Unknown=0, NotChecked=0, Total=420 [2019-12-07 14:03:00,705 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29631 states. [2019-12-07 14:03:00,933 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29631 to 21766. [2019-12-07 14:03:00,933 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21766 states. [2019-12-07 14:03:00,968 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21766 states to 21766 states and 66640 transitions. [2019-12-07 14:03:00,969 INFO L78 Accepts]: Start accepts. Automaton has 21766 states and 66640 transitions. Word has length 67 [2019-12-07 14:03:00,969 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:03:00,969 INFO L462 AbstractCegarLoop]: Abstraction has 21766 states and 66640 transitions. [2019-12-07 14:03:00,969 INFO L463 AbstractCegarLoop]: Interpolant automaton has 10 states. [2019-12-07 14:03:00,969 INFO L276 IsEmpty]: Start isEmpty. Operand 21766 states and 66640 transitions. [2019-12-07 14:03:00,987 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:03:00,988 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:03:00,988 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:03:00,988 INFO L410 AbstractCegarLoop]: === Iteration 25 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:03:00,988 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:03:00,988 INFO L82 PathProgramCache]: Analyzing trace with hash 693103783, now seen corresponding path program 4 times [2019-12-07 14:03:00,988 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:03:00,988 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [631295894] [2019-12-07 14:03:00,988 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:03:01,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:03:01,132 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:03:01,132 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [631295894] [2019-12-07 14:03:01,132 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:03:01,132 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 14:03:01,132 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1254393358] [2019-12-07 14:03:01,133 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 14:03:01,133 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:03:01,133 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 14:03:01,133 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 14:03:01,133 INFO L87 Difference]: Start difference. First operand 21766 states and 66640 transitions. Second operand 11 states. [2019-12-07 14:03:03,795 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:03:03,795 INFO L93 Difference]: Finished difference Result 31931 states and 97036 transitions. [2019-12-07 14:03:03,796 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2019-12-07 14:03:03,797 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 14:03:03,797 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:03:03,847 INFO L225 Difference]: With dead ends: 31931 [2019-12-07 14:03:03,847 INFO L226 Difference]: Without dead ends: 28334 [2019-12-07 14:03:03,848 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=97, Invalid=455, Unknown=0, NotChecked=0, Total=552 [2019-12-07 14:03:03,990 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28334 states. [2019-12-07 14:03:04,192 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28334 to 21238. [2019-12-07 14:03:04,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21238 states. [2019-12-07 14:03:04,225 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21238 states to 21238 states and 65048 transitions. [2019-12-07 14:03:04,225 INFO L78 Accepts]: Start accepts. Automaton has 21238 states and 65048 transitions. Word has length 67 [2019-12-07 14:03:04,225 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:03:04,225 INFO L462 AbstractCegarLoop]: Abstraction has 21238 states and 65048 transitions. [2019-12-07 14:03:04,225 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 14:03:04,225 INFO L276 IsEmpty]: Start isEmpty. Operand 21238 states and 65048 transitions. [2019-12-07 14:03:04,243 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:03:04,243 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:03:04,243 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:03:04,243 INFO L410 AbstractCegarLoop]: === Iteration 26 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:03:04,244 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:03:04,244 INFO L82 PathProgramCache]: Analyzing trace with hash 1535531457, now seen corresponding path program 5 times [2019-12-07 14:03:04,244 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:03:04,244 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [286786435] [2019-12-07 14:03:04,244 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:03:04,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:03:04,549 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:03:04,549 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [286786435] [2019-12-07 14:03:04,549 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:03:04,549 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 14:03:04,549 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1148378529] [2019-12-07 14:03:04,549 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 14:03:04,550 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:03:04,550 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 14:03:04,550 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=175, Unknown=0, NotChecked=0, Total=210 [2019-12-07 14:03:04,550 INFO L87 Difference]: Start difference. First operand 21238 states and 65048 transitions. Second operand 15 states. [2019-12-07 14:03:09,966 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:03:09,966 INFO L93 Difference]: Finished difference Result 54483 states and 165700 transitions. [2019-12-07 14:03:09,967 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2019-12-07 14:03:09,967 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 14:03:09,967 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:03:10,033 INFO L225 Difference]: With dead ends: 54483 [2019-12-07 14:03:10,033 INFO L226 Difference]: Without dead ends: 50640 [2019-12-07 14:03:10,034 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 63 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1194 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=653, Invalid=3507, Unknown=0, NotChecked=0, Total=4160 [2019-12-07 14:03:10,193 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50640 states. [2019-12-07 14:03:10,613 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50640 to 26000. [2019-12-07 14:03:10,614 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26000 states. [2019-12-07 14:03:10,658 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26000 states to 26000 states and 80074 transitions. [2019-12-07 14:03:10,658 INFO L78 Accepts]: Start accepts. Automaton has 26000 states and 80074 transitions. Word has length 67 [2019-12-07 14:03:10,658 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:03:10,658 INFO L462 AbstractCegarLoop]: Abstraction has 26000 states and 80074 transitions. [2019-12-07 14:03:10,658 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 14:03:10,658 INFO L276 IsEmpty]: Start isEmpty. Operand 26000 states and 80074 transitions. [2019-12-07 14:03:10,684 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:03:10,684 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:03:10,684 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:03:10,684 INFO L410 AbstractCegarLoop]: === Iteration 27 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:03:10,685 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:03:10,685 INFO L82 PathProgramCache]: Analyzing trace with hash 1442171729, now seen corresponding path program 6 times [2019-12-07 14:03:10,685 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:03:10,685 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1105257613] [2019-12-07 14:03:10,685 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:03:10,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:03:10,989 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:03:10,989 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1105257613] [2019-12-07 14:03:10,989 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:03:10,989 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 14:03:10,989 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [158539456] [2019-12-07 14:03:10,989 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 14:03:10,989 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:03:10,990 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 14:03:10,990 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=171, Unknown=0, NotChecked=0, Total=210 [2019-12-07 14:03:10,990 INFO L87 Difference]: Start difference. First operand 26000 states and 80074 transitions. Second operand 15 states. [2019-12-07 14:03:14,495 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:03:14,495 INFO L93 Difference]: Finished difference Result 51048 states and 154650 transitions. [2019-12-07 14:03:14,496 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2019-12-07 14:03:14,496 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 14:03:14,496 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:03:14,553 INFO L225 Difference]: With dead ends: 51048 [2019-12-07 14:03:14,553 INFO L226 Difference]: Without dead ends: 42634 [2019-12-07 14:03:14,555 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 722 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=495, Invalid=2367, Unknown=0, NotChecked=0, Total=2862 [2019-12-07 14:03:14,692 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42634 states. [2019-12-07 14:03:14,988 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42634 to 22561. [2019-12-07 14:03:14,988 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22561 states. [2019-12-07 14:03:15,026 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22561 states to 22561 states and 69033 transitions. [2019-12-07 14:03:15,026 INFO L78 Accepts]: Start accepts. Automaton has 22561 states and 69033 transitions. Word has length 67 [2019-12-07 14:03:15,026 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:03:15,026 INFO L462 AbstractCegarLoop]: Abstraction has 22561 states and 69033 transitions. [2019-12-07 14:03:15,026 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 14:03:15,026 INFO L276 IsEmpty]: Start isEmpty. Operand 22561 states and 69033 transitions. [2019-12-07 14:03:15,047 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:03:15,047 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:03:15,047 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:03:15,047 INFO L410 AbstractCegarLoop]: === Iteration 28 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:03:15,048 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:03:15,048 INFO L82 PathProgramCache]: Analyzing trace with hash -683872029, now seen corresponding path program 7 times [2019-12-07 14:03:15,048 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:03:15,048 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2042554221] [2019-12-07 14:03:15,048 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:03:15,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:03:15,350 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:03:15,350 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2042554221] [2019-12-07 14:03:15,350 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:03:15,350 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 14:03:15,351 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [573837117] [2019-12-07 14:03:15,351 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 14:03:15,351 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:03:15,351 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 14:03:15,351 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=175, Unknown=0, NotChecked=0, Total=210 [2019-12-07 14:03:15,351 INFO L87 Difference]: Start difference. First operand 22561 states and 69033 transitions. Second operand 15 states. [2019-12-07 14:03:20,907 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:03:20,908 INFO L93 Difference]: Finished difference Result 49061 states and 148713 transitions. [2019-12-07 14:03:20,908 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 64 states. [2019-12-07 14:03:20,908 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 14:03:20,908 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:03:20,961 INFO L225 Difference]: With dead ends: 49061 [2019-12-07 14:03:20,961 INFO L226 Difference]: Without dead ends: 46894 [2019-12-07 14:03:20,963 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1457 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=721, Invalid=4109, Unknown=0, NotChecked=0, Total=4830 [2019-12-07 14:03:21,111 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46894 states. [2019-12-07 14:03:21,470 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46894 to 24867. [2019-12-07 14:03:21,470 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24867 states. [2019-12-07 14:03:21,514 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24867 states to 24867 states and 76337 transitions. [2019-12-07 14:03:21,514 INFO L78 Accepts]: Start accepts. Automaton has 24867 states and 76337 transitions. Word has length 67 [2019-12-07 14:03:21,514 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:03:21,514 INFO L462 AbstractCegarLoop]: Abstraction has 24867 states and 76337 transitions. [2019-12-07 14:03:21,514 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 14:03:21,514 INFO L276 IsEmpty]: Start isEmpty. Operand 24867 states and 76337 transitions. [2019-12-07 14:03:21,541 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:03:21,541 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:03:21,541 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:03:21,541 INFO L410 AbstractCegarLoop]: === Iteration 29 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:03:21,541 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:03:21,541 INFO L82 PathProgramCache]: Analyzing trace with hash -777231757, now seen corresponding path program 8 times [2019-12-07 14:03:21,541 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:03:21,542 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1165927471] [2019-12-07 14:03:21,542 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:03:21,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:03:21,813 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:03:21,813 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1165927471] [2019-12-07 14:03:21,813 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:03:21,813 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 14:03:21,813 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [273307285] [2019-12-07 14:03:21,813 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 14:03:21,814 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:03:21,814 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 14:03:21,814 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=172, Unknown=0, NotChecked=0, Total=210 [2019-12-07 14:03:21,814 INFO L87 Difference]: Start difference. First operand 24867 states and 76337 transitions. Second operand 15 states. [2019-12-07 14:03:26,971 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:03:26,971 INFO L93 Difference]: Finished difference Result 47483 states and 143545 transitions. [2019-12-07 14:03:26,972 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2019-12-07 14:03:26,972 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 14:03:26,973 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:03:27,033 INFO L225 Difference]: With dead ends: 47483 [2019-12-07 14:03:27,033 INFO L226 Difference]: Without dead ends: 42122 [2019-12-07 14:03:27,035 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 0 SyntacticMatches, 2 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1342 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=723, Invalid=3833, Unknown=0, NotChecked=0, Total=4556 [2019-12-07 14:03:27,172 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42122 states. [2019-12-07 14:03:27,450 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42122 to 22060. [2019-12-07 14:03:27,450 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22060 states. [2019-12-07 14:03:27,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22060 states to 22060 states and 67487 transitions. [2019-12-07 14:03:27,486 INFO L78 Accepts]: Start accepts. Automaton has 22060 states and 67487 transitions. Word has length 67 [2019-12-07 14:03:27,486 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:03:27,486 INFO L462 AbstractCegarLoop]: Abstraction has 22060 states and 67487 transitions. [2019-12-07 14:03:27,486 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 14:03:27,486 INFO L276 IsEmpty]: Start isEmpty. Operand 22060 states and 67487 transitions. [2019-12-07 14:03:27,505 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:03:27,505 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:03:27,506 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:03:27,506 INFO L410 AbstractCegarLoop]: === Iteration 30 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:03:27,506 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:03:27,506 INFO L82 PathProgramCache]: Analyzing trace with hash -2065446981, now seen corresponding path program 9 times [2019-12-07 14:03:27,506 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:03:27,506 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2108845248] [2019-12-07 14:03:27,506 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:03:27,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:03:27,814 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:03:27,814 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2108845248] [2019-12-07 14:03:27,814 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:03:27,814 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 14:03:27,814 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [7079553] [2019-12-07 14:03:27,815 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 14:03:27,815 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:03:27,815 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 14:03:27,815 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=203, Unknown=0, NotChecked=0, Total=240 [2019-12-07 14:03:27,815 INFO L87 Difference]: Start difference. First operand 22060 states and 67487 transitions. Second operand 16 states. [2019-12-07 14:03:34,204 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:03:34,205 INFO L93 Difference]: Finished difference Result 43148 states and 130277 transitions. [2019-12-07 14:03:34,205 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2019-12-07 14:03:34,205 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 14:03:34,205 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:03:34,245 INFO L225 Difference]: With dead ends: 43148 [2019-12-07 14:03:34,246 INFO L226 Difference]: Without dead ends: 42437 [2019-12-07 14:03:34,247 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 893 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=539, Invalid=2883, Unknown=0, NotChecked=0, Total=3422 [2019-12-07 14:03:34,380 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42437 states. [2019-12-07 14:03:34,675 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42437 to 23840. [2019-12-07 14:03:34,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23840 states. [2019-12-07 14:03:34,715 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23840 states to 23840 states and 72750 transitions. [2019-12-07 14:03:34,715 INFO L78 Accepts]: Start accepts. Automaton has 23840 states and 72750 transitions. Word has length 67 [2019-12-07 14:03:34,715 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:03:34,715 INFO L462 AbstractCegarLoop]: Abstraction has 23840 states and 72750 transitions. [2019-12-07 14:03:34,715 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 14:03:34,715 INFO L276 IsEmpty]: Start isEmpty. Operand 23840 states and 72750 transitions. [2019-12-07 14:03:34,737 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:03:34,738 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:03:34,738 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:03:34,738 INFO L410 AbstractCegarLoop]: === Iteration 31 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:03:34,738 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:03:34,738 INFO L82 PathProgramCache]: Analyzing trace with hash 2136160587, now seen corresponding path program 10 times [2019-12-07 14:03:34,738 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:03:34,738 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [430199615] [2019-12-07 14:03:34,738 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:03:34,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:03:35,024 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:03:35,025 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [430199615] [2019-12-07 14:03:35,025 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:03:35,025 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 14:03:35,025 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [296639570] [2019-12-07 14:03:35,025 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 14:03:35,025 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:03:35,025 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 14:03:35,025 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=199, Unknown=0, NotChecked=0, Total=240 [2019-12-07 14:03:35,025 INFO L87 Difference]: Start difference. First operand 23840 states and 72750 transitions. Second operand 16 states. [2019-12-07 14:03:40,098 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:03:40,098 INFO L93 Difference]: Finished difference Result 43009 states and 129380 transitions. [2019-12-07 14:03:40,098 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2019-12-07 14:03:40,098 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 14:03:40,098 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:03:40,144 INFO L225 Difference]: With dead ends: 43009 [2019-12-07 14:03:40,144 INFO L226 Difference]: Without dead ends: 41330 [2019-12-07 14:03:40,145 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 892 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=562, Invalid=2860, Unknown=0, NotChecked=0, Total=3422 [2019-12-07 14:03:40,280 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41330 states. [2019-12-07 14:03:40,557 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41330 to 22528. [2019-12-07 14:03:40,557 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22528 states. [2019-12-07 14:03:40,592 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22528 states to 22528 states and 68738 transitions. [2019-12-07 14:03:40,592 INFO L78 Accepts]: Start accepts. Automaton has 22528 states and 68738 transitions. Word has length 67 [2019-12-07 14:03:40,593 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:03:40,593 INFO L462 AbstractCegarLoop]: Abstraction has 22528 states and 68738 transitions. [2019-12-07 14:03:40,593 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 14:03:40,593 INFO L276 IsEmpty]: Start isEmpty. Operand 22528 states and 68738 transitions. [2019-12-07 14:03:40,611 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:03:40,612 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:03:40,612 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:03:40,612 INFO L410 AbstractCegarLoop]: === Iteration 32 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:03:40,612 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:03:40,612 INFO L82 PathProgramCache]: Analyzing trace with hash 10116829, now seen corresponding path program 11 times [2019-12-07 14:03:40,612 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:03:40,612 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [990605818] [2019-12-07 14:03:40,612 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:03:40,678 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:03:41,079 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:03:41,079 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [990605818] [2019-12-07 14:03:41,079 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:03:41,079 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2019-12-07 14:03:41,079 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1251338522] [2019-12-07 14:03:41,080 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-12-07 14:03:41,080 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:03:41,080 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-07 14:03:41,080 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=283, Unknown=0, NotChecked=0, Total=342 [2019-12-07 14:03:41,080 INFO L87 Difference]: Start difference. First operand 22528 states and 68738 transitions. Second operand 19 states. [2019-12-07 14:03:44,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:03:44,849 INFO L93 Difference]: Finished difference Result 38418 states and 114737 transitions. [2019-12-07 14:03:44,850 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2019-12-07 14:03:44,850 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 67 [2019-12-07 14:03:44,850 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:03:44,891 INFO L225 Difference]: With dead ends: 38418 [2019-12-07 14:03:44,891 INFO L226 Difference]: Without dead ends: 37255 [2019-12-07 14:03:44,893 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1200 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=608, Invalid=3424, Unknown=0, NotChecked=0, Total=4032 [2019-12-07 14:03:45,017 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37255 states. [2019-12-07 14:03:45,284 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37255 to 22592. [2019-12-07 14:03:45,284 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22592 states. [2019-12-07 14:03:45,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22592 states to 22592 states and 68914 transitions. [2019-12-07 14:03:45,320 INFO L78 Accepts]: Start accepts. Automaton has 22592 states and 68914 transitions. Word has length 67 [2019-12-07 14:03:45,320 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:03:45,320 INFO L462 AbstractCegarLoop]: Abstraction has 22592 states and 68914 transitions. [2019-12-07 14:03:45,320 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-12-07 14:03:45,320 INFO L276 IsEmpty]: Start isEmpty. Operand 22592 states and 68914 transitions. [2019-12-07 14:03:45,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:03:45,339 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:03:45,339 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:03:45,339 INFO L410 AbstractCegarLoop]: === Iteration 33 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:03:45,339 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:03:45,340 INFO L82 PathProgramCache]: Analyzing trace with hash 77270493, now seen corresponding path program 12 times [2019-12-07 14:03:45,340 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:03:45,340 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [523876239] [2019-12-07 14:03:45,340 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:03:45,354 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:03:45,735 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:03:45,735 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [523876239] [2019-12-07 14:03:45,735 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:03:45,735 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2019-12-07 14:03:45,735 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [247820902] [2019-12-07 14:03:45,736 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-12-07 14:03:45,736 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:03:45,736 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-07 14:03:45,736 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=287, Unknown=0, NotChecked=0, Total=342 [2019-12-07 14:03:45,736 INFO L87 Difference]: Start difference. First operand 22592 states and 68914 transitions. Second operand 19 states. [2019-12-07 14:03:50,690 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:03:50,690 INFO L93 Difference]: Finished difference Result 37984 states and 113381 transitions. [2019-12-07 14:03:50,690 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 63 states. [2019-12-07 14:03:50,690 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 67 [2019-12-07 14:03:50,691 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:03:50,731 INFO L225 Difference]: With dead ends: 37984 [2019-12-07 14:03:50,731 INFO L226 Difference]: Without dead ends: 37109 [2019-12-07 14:03:50,732 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 65 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1307 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=608, Invalid=3682, Unknown=0, NotChecked=0, Total=4290 [2019-12-07 14:03:50,855 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37109 states. [2019-12-07 14:03:51,123 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37109 to 22556. [2019-12-07 14:03:51,123 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22556 states. [2019-12-07 14:03:51,161 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22556 states to 22556 states and 68811 transitions. [2019-12-07 14:03:51,162 INFO L78 Accepts]: Start accepts. Automaton has 22556 states and 68811 transitions. Word has length 67 [2019-12-07 14:03:51,162 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:03:51,162 INFO L462 AbstractCegarLoop]: Abstraction has 22556 states and 68811 transitions. [2019-12-07 14:03:51,162 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-12-07 14:03:51,162 INFO L276 IsEmpty]: Start isEmpty. Operand 22556 states and 68811 transitions. [2019-12-07 14:03:51,183 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:03:51,183 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:03:51,183 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:03:51,183 INFO L410 AbstractCegarLoop]: === Iteration 34 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:03:51,183 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:03:51,183 INFO L82 PathProgramCache]: Analyzing trace with hash 1913889315, now seen corresponding path program 13 times [2019-12-07 14:03:51,183 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:03:51,184 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1766120377] [2019-12-07 14:03:51,184 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:03:51,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:03:51,565 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:03:51,565 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1766120377] [2019-12-07 14:03:51,565 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:03:51,565 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2019-12-07 14:03:51,565 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2111637915] [2019-12-07 14:03:51,565 INFO L442 AbstractCegarLoop]: Interpolant automaton has 19 states [2019-12-07 14:03:51,565 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:03:51,565 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2019-12-07 14:03:51,566 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=284, Unknown=0, NotChecked=0, Total=342 [2019-12-07 14:03:51,566 INFO L87 Difference]: Start difference. First operand 22556 states and 68811 transitions. Second operand 19 states. [2019-12-07 14:04:03,732 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:04:03,733 INFO L93 Difference]: Finished difference Result 38436 states and 114714 transitions. [2019-12-07 14:04:03,734 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 65 states. [2019-12-07 14:04:03,734 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 67 [2019-12-07 14:04:03,734 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:04:03,778 INFO L225 Difference]: With dead ends: 38436 [2019-12-07 14:04:03,779 INFO L226 Difference]: Without dead ends: 37597 [2019-12-07 14:04:03,780 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 67 GetRequests, 0 SyntacticMatches, 1 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1372 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=663, Invalid=3893, Unknown=0, NotChecked=0, Total=4556 [2019-12-07 14:04:03,905 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37597 states. [2019-12-07 14:04:04,171 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37597 to 22540. [2019-12-07 14:04:04,172 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22540 states. [2019-12-07 14:04:04,209 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22540 states to 22540 states and 68763 transitions. [2019-12-07 14:04:04,210 INFO L78 Accepts]: Start accepts. Automaton has 22540 states and 68763 transitions. Word has length 67 [2019-12-07 14:04:04,210 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:04:04,210 INFO L462 AbstractCegarLoop]: Abstraction has 22540 states and 68763 transitions. [2019-12-07 14:04:04,210 INFO L463 AbstractCegarLoop]: Interpolant automaton has 19 states. [2019-12-07 14:04:04,210 INFO L276 IsEmpty]: Start isEmpty. Operand 22540 states and 68763 transitions. [2019-12-07 14:04:04,230 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:04:04,231 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:04:04,231 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:04:04,231 INFO L410 AbstractCegarLoop]: === Iteration 35 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:04:04,231 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:04:04,231 INFO L82 PathProgramCache]: Analyzing trace with hash 1416082809, now seen corresponding path program 14 times [2019-12-07 14:04:04,231 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:04:04,231 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [351078359] [2019-12-07 14:04:04,231 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:04:04,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:04:04,528 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:04:04,528 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [351078359] [2019-12-07 14:04:04,528 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:04:04,528 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 14:04:04,528 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1453804344] [2019-12-07 14:04:04,528 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 14:04:04,528 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:04:04,528 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 14:04:04,529 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=203, Unknown=0, NotChecked=0, Total=240 [2019-12-07 14:04:04,529 INFO L87 Difference]: Start difference. First operand 22540 states and 68763 transitions. Second operand 16 states. [2019-12-07 14:04:09,476 WARN L192 SmtUtils]: Spent 145.00 ms on a formula simplification. DAG size of input: 31 DAG size of output: 30 [2019-12-07 14:04:11,730 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:04:11,731 INFO L93 Difference]: Finished difference Result 43208 states and 130413 transitions. [2019-12-07 14:04:11,732 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2019-12-07 14:04:11,732 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 14:04:11,733 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:04:11,792 INFO L225 Difference]: With dead ends: 43208 [2019-12-07 14:04:11,792 INFO L226 Difference]: Without dead ends: 42441 [2019-12-07 14:04:11,794 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1308 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=688, Invalid=3868, Unknown=0, NotChecked=0, Total=4556 [2019-12-07 14:04:11,930 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42441 states. [2019-12-07 14:04:12,211 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42441 to 23320. [2019-12-07 14:04:12,211 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23320 states. [2019-12-07 14:04:12,248 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23320 states to 23320 states and 71137 transitions. [2019-12-07 14:04:12,248 INFO L78 Accepts]: Start accepts. Automaton has 23320 states and 71137 transitions. Word has length 67 [2019-12-07 14:04:12,248 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:04:12,249 INFO L462 AbstractCegarLoop]: Abstraction has 23320 states and 71137 transitions. [2019-12-07 14:04:12,249 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 14:04:12,249 INFO L276 IsEmpty]: Start isEmpty. Operand 23320 states and 71137 transitions. [2019-12-07 14:04:12,268 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:04:12,268 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:04:12,268 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:04:12,269 INFO L410 AbstractCegarLoop]: === Iteration 36 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:04:12,269 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:04:12,269 INFO L82 PathProgramCache]: Analyzing trace with hash 1322723081, now seen corresponding path program 15 times [2019-12-07 14:04:12,269 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:04:12,269 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [453717108] [2019-12-07 14:04:12,269 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:04:12,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:04:12,538 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:04:12,538 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [453717108] [2019-12-07 14:04:12,538 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:04:12,538 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2019-12-07 14:04:12,538 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [708370077] [2019-12-07 14:04:12,539 INFO L442 AbstractCegarLoop]: Interpolant automaton has 16 states [2019-12-07 14:04:12,539 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:04:12,539 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2019-12-07 14:04:12,539 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=199, Unknown=0, NotChecked=0, Total=240 [2019-12-07 14:04:12,539 INFO L87 Difference]: Start difference. First operand 23320 states and 71137 transitions. Second operand 16 states. [2019-12-07 14:04:15,449 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:04:15,449 INFO L93 Difference]: Finished difference Result 42889 states and 129104 transitions. [2019-12-07 14:04:15,449 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2019-12-07 14:04:15,450 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 67 [2019-12-07 14:04:15,450 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:04:15,495 INFO L225 Difference]: With dead ends: 42889 [2019-12-07 14:04:15,495 INFO L226 Difference]: Without dead ends: 41860 [2019-12-07 14:04:15,497 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1307 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=719, Invalid=3837, Unknown=0, NotChecked=0, Total=4556 [2019-12-07 14:04:15,632 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41860 states. [2019-12-07 14:04:15,912 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41860 to 22318. [2019-12-07 14:04:15,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22318 states. [2019-12-07 14:04:15,949 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22318 states to 22318 states and 68166 transitions. [2019-12-07 14:04:15,950 INFO L78 Accepts]: Start accepts. Automaton has 22318 states and 68166 transitions. Word has length 67 [2019-12-07 14:04:15,950 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:04:15,950 INFO L462 AbstractCegarLoop]: Abstraction has 22318 states and 68166 transitions. [2019-12-07 14:04:15,950 INFO L463 AbstractCegarLoop]: Interpolant automaton has 16 states. [2019-12-07 14:04:15,950 INFO L276 IsEmpty]: Start isEmpty. Operand 22318 states and 68166 transitions. [2019-12-07 14:04:15,971 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:04:15,971 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:04:15,971 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:04:15,971 INFO L410 AbstractCegarLoop]: === Iteration 37 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:04:15,971 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:04:15,972 INFO L82 PathProgramCache]: Analyzing trace with hash -1853423759, now seen corresponding path program 16 times [2019-12-07 14:04:15,972 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:04:15,972 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [967543428] [2019-12-07 14:04:15,972 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:04:15,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:04:16,287 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:04:16,287 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [967543428] [2019-12-07 14:04:16,287 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:04:16,287 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2019-12-07 14:04:16,287 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [775152092] [2019-12-07 14:04:16,288 INFO L442 AbstractCegarLoop]: Interpolant automaton has 15 states [2019-12-07 14:04:16,288 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:04:16,288 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2019-12-07 14:04:16,288 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=176, Unknown=0, NotChecked=0, Total=210 [2019-12-07 14:04:16,288 INFO L87 Difference]: Start difference. First operand 22318 states and 68166 transitions. Second operand 15 states. [2019-12-07 14:04:19,801 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:04:19,801 INFO L93 Difference]: Finished difference Result 44700 states and 134543 transitions. [2019-12-07 14:04:19,802 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 62 states. [2019-12-07 14:04:19,803 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2019-12-07 14:04:19,803 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:04:19,858 INFO L225 Difference]: With dead ends: 44700 [2019-12-07 14:04:19,859 INFO L226 Difference]: Without dead ends: 40798 [2019-12-07 14:04:19,860 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 69 GetRequests, 0 SyntacticMatches, 3 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1362 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=671, Invalid=3885, Unknown=0, NotChecked=0, Total=4556 [2019-12-07 14:04:19,994 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40798 states. [2019-12-07 14:04:20,272 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40798 to 21986. [2019-12-07 14:04:20,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21986 states. [2019-12-07 14:04:20,308 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21986 states to 21986 states and 67246 transitions. [2019-12-07 14:04:20,308 INFO L78 Accepts]: Start accepts. Automaton has 21986 states and 67246 transitions. Word has length 67 [2019-12-07 14:04:20,308 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:04:20,308 INFO L462 AbstractCegarLoop]: Abstraction has 21986 states and 67246 transitions. [2019-12-07 14:04:20,308 INFO L463 AbstractCegarLoop]: Interpolant automaton has 15 states. [2019-12-07 14:04:20,308 INFO L276 IsEmpty]: Start isEmpty. Operand 21986 states and 67246 transitions. [2019-12-07 14:04:20,327 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:04:20,327 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:04:20,328 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:04:20,328 INFO L410 AbstractCegarLoop]: === Iteration 38 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:04:20,328 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:04:20,328 INFO L82 PathProgramCache]: Analyzing trace with hash -530596549, now seen corresponding path program 17 times [2019-12-07 14:04:20,328 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:04:20,328 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1703189208] [2019-12-07 14:04:20,328 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:04:20,342 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:04:20,434 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:04:20,434 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1703189208] [2019-12-07 14:04:20,434 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:04:20,435 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 14:04:20,435 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [809493384] [2019-12-07 14:04:20,435 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 14:04:20,435 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:04:20,435 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 14:04:20,435 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 14:04:20,435 INFO L87 Difference]: Start difference. First operand 21986 states and 67246 transitions. Second operand 11 states. [2019-12-07 14:04:22,727 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:04:22,727 INFO L93 Difference]: Finished difference Result 47327 states and 144636 transitions. [2019-12-07 14:04:22,727 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2019-12-07 14:04:22,727 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 14:04:22,727 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:04:22,775 INFO L225 Difference]: With dead ends: 47327 [2019-12-07 14:04:22,775 INFO L226 Difference]: Without dead ends: 41889 [2019-12-07 14:04:22,776 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 267 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=236, Invalid=954, Unknown=0, NotChecked=0, Total=1190 [2019-12-07 14:04:22,917 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41889 states. [2019-12-07 14:04:23,281 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41889 to 25230. [2019-12-07 14:04:23,281 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25230 states. [2019-12-07 14:04:23,325 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25230 states to 25230 states and 77704 transitions. [2019-12-07 14:04:23,326 INFO L78 Accepts]: Start accepts. Automaton has 25230 states and 77704 transitions. Word has length 67 [2019-12-07 14:04:23,326 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:04:23,326 INFO L462 AbstractCegarLoop]: Abstraction has 25230 states and 77704 transitions. [2019-12-07 14:04:23,326 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 14:04:23,326 INFO L276 IsEmpty]: Start isEmpty. Operand 25230 states and 77704 transitions. [2019-12-07 14:04:23,352 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:04:23,353 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:04:23,353 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:04:23,353 INFO L410 AbstractCegarLoop]: === Iteration 39 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:04:23,353 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:04:23,353 INFO L82 PathProgramCache]: Analyzing trace with hash -623956277, now seen corresponding path program 18 times [2019-12-07 14:04:23,353 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:04:23,353 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [544238643] [2019-12-07 14:04:23,354 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:04:23,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2019-12-07 14:04:23,471 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2019-12-07 14:04:23,471 INFO L348 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [544238643] [2019-12-07 14:04:23,472 INFO L220 FreeRefinementEngine]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2019-12-07 14:04:23,472 INFO L233 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2019-12-07 14:04:23,472 INFO L156 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [102126999] [2019-12-07 14:04:23,472 INFO L442 AbstractCegarLoop]: Interpolant automaton has 11 states [2019-12-07 14:04:23,472 INFO L143 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy SIFA_TAIPAN [2019-12-07 14:04:23,472 INFO L142 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2019-12-07 14:04:23,472 INFO L144 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2019-12-07 14:04:23,472 INFO L87 Difference]: Start difference. First operand 25230 states and 77704 transitions. Second operand 11 states. [2019-12-07 14:04:24,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2019-12-07 14:04:24,147 INFO L93 Difference]: Finished difference Result 41994 states and 128447 transitions. [2019-12-07 14:04:24,147 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2019-12-07 14:04:24,148 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2019-12-07 14:04:24,148 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2019-12-07 14:04:24,187 INFO L225 Difference]: With dead ends: 41994 [2019-12-07 14:04:24,188 INFO L226 Difference]: Without dead ends: 34810 [2019-12-07 14:04:24,188 INFO L630 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 126 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=132, Invalid=570, Unknown=0, NotChecked=0, Total=702 [2019-12-07 14:04:24,312 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34810 states. [2019-12-07 14:04:24,553 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34810 to 20646. [2019-12-07 14:04:24,553 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20646 states. [2019-12-07 14:04:24,587 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20646 states to 20646 states and 63077 transitions. [2019-12-07 14:04:24,588 INFO L78 Accepts]: Start accepts. Automaton has 20646 states and 63077 transitions. Word has length 67 [2019-12-07 14:04:24,588 INFO L84 Accepts]: Finished accepts. word is rejected. [2019-12-07 14:04:24,588 INFO L462 AbstractCegarLoop]: Abstraction has 20646 states and 63077 transitions. [2019-12-07 14:04:24,588 INFO L463 AbstractCegarLoop]: Interpolant automaton has 11 states. [2019-12-07 14:04:24,588 INFO L276 IsEmpty]: Start isEmpty. Operand 20646 states and 63077 transitions. [2019-12-07 14:04:24,606 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2019-12-07 14:04:24,607 INFO L402 BasicCegarLoop]: Found error trace [2019-12-07 14:04:24,607 INFO L410 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2019-12-07 14:04:24,607 INFO L410 AbstractCegarLoop]: === Iteration 40 === [P0Err0ASSERT_VIOLATIONERROR_FUNCTION, ULTIMATE.startErr2INUSE_VIOLATION, ULTIMATE.startErr1INUSE_VIOLATION, ULTIMATE.startErr0INUSE_VIOLATION, ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION, P0Err0ASSERT_VIOLATIONERROR_FUNCTION]=== [2019-12-07 14:04:24,607 INFO L144 PredicateUnifier]: Initialized classic predicate unifier [2019-12-07 14:04:24,607 INFO L82 PathProgramCache]: Analyzing trace with hash 594227727, now seen corresponding path program 19 times [2019-12-07 14:04:24,607 INFO L163 FreeRefinementEngine]: Executing refinement strategy SIFA_TAIPAN [2019-12-07 14:04:24,607 INFO L348 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [971870887] [2019-12-07 14:04:24,607 INFO L94 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2019-12-07 14:04:24,620 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 14:04:24,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2019-12-07 14:04:24,673 INFO L174 FreeRefinementEngine]: Strategy SIFA_TAIPAN found a feasible trace [2019-12-07 14:04:24,673 INFO L475 BasicCegarLoop]: Counterexample might be feasible [2019-12-07 14:04:24,676 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [903] [903] ULTIMATE.startENTRY-->L837: Formula: (let ((.cse0 (store |v_#valid_65| 0 0))) (and (= v_~x~0_45 0) (= 0 v_~a$w_buff0_used~0_768) (< |v_#StackHeapBarrier_16| |v_ULTIMATE.start_main_~#t269~0.base_33|) (= v_~y~0_18 0) (= |v_ULTIMATE.start_main_~#t269~0.offset_23| 0) (= 0 v_~a$r_buff1_thd1~0_150) (= 0 v_~__unbuffered_p2_EAX~0_31) (= 0 v_~a$read_delayed_var~0.base_7) (= 0 v_~a$w_buff1_used~0_426) (= v_~main$tmp_guard0~0_29 0) (= v_~a$read_delayed_var~0.offset_7 0) (= 0 v_~a$w_buff1~0_200) (= v_~a$r_buff1_thd3~0_269 0) (< 0 |v_#StackHeapBarrier_16|) (= 0 v_~__unbuffered_p0_EAX~0_111) (= v_~a$r_buff0_thd3~0_320 0) (= v_~a~0_184 0) (= 0 v_~__unbuffered_p1_EAX~0_34) (= v_~__unbuffered_cnt~0_102 0) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t269~0.base_33| 4) |v_#length_21|) (= 0 |v_#NULL.base_4|) (= v_~a$flush_delayed~0_25 0) (= v_~__unbuffered_p1_EBX~0_34 0) (= v_~a$r_buff0_thd0~0_107 0) (= v_~main$tmp_guard1~0_32 0) (= v_~a$r_buff1_thd0~0_160 0) (= v_~a$w_buff0~0_274 0) (= v_~z~0_21 0) (= |v_#NULL.offset_4| 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t269~0.base_33|) 0) (= v_~a$mem_tmp~0_14 0) (= 0 v_~a$r_buff0_thd1~0_184) (= 0 v_~a$r_buff1_thd2~0_145) (= v_~a$r_buff0_thd2~0_95 0) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t269~0.base_33| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t269~0.base_33|) |v_ULTIMATE.start_main_~#t269~0.offset_23| 0)) |v_#memory_int_19|) (= v_~weak$$choice2~0_110 0) (= v_~__unbuffered_p2_EBX~0_40 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t269~0.base_33| 1) |v_#valid_63|) (= 0 v_~a$read_delayed~0_8) (= 0 v_~weak$$choice0~0_12))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_16|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_145, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_67|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_471|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_107, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_41|, ~a~0=v_~a~0_184, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_64|, ULTIMATE.start_main_~#t270~0.offset=|v_ULTIMATE.start_main_~#t270~0.offset_19|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_111, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_34, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_31, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_40, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_269, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_768, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_184, ~weak$$choice0~0=v_~weak$$choice0~0_12, #StackHeapBarrier=|v_#StackHeapBarrier_16|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_7, ~a$w_buff0~0=v_~a$w_buff0~0_274, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_160, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_102, ~x~0=v_~x~0_45, ULTIMATE.start_main_~#t271~0.offset=|v_ULTIMATE.start_main_~#t271~0.offset_19|, ~a$read_delayed~0=v_~a$read_delayed~0_8, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_95, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_32, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_69|, ULTIMATE.start_main_~#t271~0.base=|v_ULTIMATE.start_main_~#t271~0.base_25|, ~a$mem_tmp~0=v_~a$mem_tmp~0_14, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_29|, ~a$w_buff1~0=v_~a$w_buff1~0_200, ~y~0=v_~y~0_18, ULTIMATE.start_main_~#t269~0.base=|v_ULTIMATE.start_main_~#t269~0.base_33|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_34, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_27|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_150, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_320, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_29, #NULL.base=|v_#NULL.base_4|, ~a$flush_delayed~0=v_~a$flush_delayed~0_25, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_21|, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_19|, ULTIMATE.start_main_~#t269~0.offset=|v_ULTIMATE.start_main_~#t269~0.offset_23|, ULTIMATE.start_main_~#t270~0.base=|v_ULTIMATE.start_main_~#t270~0.base_25|, ~z~0=v_~z~0_21, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_426, ~weak$$choice2~0=v_~weak$$choice2~0_110, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_7} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ULTIMATE.start_main_~#t270~0.offset, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t271~0.offset, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_~#t271~0.base, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_~#t269~0.base, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_~#t269~0.offset, ULTIMATE.start_main_~#t270~0.base, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 14:04:24,676 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [802] [802] P0ENTRY-->L4-3: Formula: (and (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_22 0)) (= v_P0Thread1of1ForFork1_~arg.offset_18 |v_P0Thread1of1ForFork1_#in~arg.offset_20|) (= 1 v_~a$w_buff0_used~0_240) (= (ite (not (and (not (= (mod v_~a$w_buff0_used~0_240 256) 0)) (not (= (mod v_~a$w_buff1_used~0_130 256) 0)))) 1 0) |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_18|) (= v_~a$w_buff0_used~0_241 v_~a$w_buff1_used~0_130) (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_22 |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_18|) (= |v_P0Thread1of1ForFork1_#in~arg.base_20| v_P0Thread1of1ForFork1_~arg.base_18) (= 1 v_~a$w_buff0~0_55) (= v_~a$w_buff0~0_56 v_~a$w_buff1~0_50)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_20|, ~a$w_buff0~0=v_~a$w_buff0~0_56, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_241, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_20|} OutVars{~a$w_buff1~0=v_~a$w_buff1~0_50, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_20|, ~a$w_buff0~0=v_~a$w_buff0~0_55, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_22, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_240, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_18, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_130, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_20|, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_18|, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_18} AuxVars[] AssignedVars[~a$w_buff1~0, ~a$w_buff0~0, P0Thread1of1ForFork1___VERIFIER_assert_~expression, ~a$w_buff0_used~0, P0Thread1of1ForFork1_~arg.offset, ~a$w_buff1_used~0, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 14:04:24,677 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L837-1-->L839: Formula: (and (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t270~0.base_12| 4) |v_#length_15|) (not (= |v_ULTIMATE.start_main_~#t270~0.base_12| 0)) (= (select |v_#valid_35| |v_ULTIMATE.start_main_~#t270~0.base_12|) 0) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t270~0.base_12|) (= 0 |v_ULTIMATE.start_main_~#t270~0.offset_10|) (= (store |v_#valid_35| |v_ULTIMATE.start_main_~#t270~0.base_12| 1) |v_#valid_34|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t270~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t270~0.base_12|) |v_ULTIMATE.start_main_~#t270~0.offset_10| 1)) |v_#memory_int_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t270~0.offset=|v_ULTIMATE.start_main_~#t270~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t270~0.base=|v_ULTIMATE.start_main_~#t270~0.base_12|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t270~0.offset, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t270~0.base, #length] because there is no mapped edge [2019-12-07 14:04:24,678 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L839-1-->L841: Formula: (and (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t271~0.base_12| 4)) (= |v_#valid_32| (store |v_#valid_33| |v_ULTIMATE.start_main_~#t271~0.base_12| 1)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t271~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t271~0.base_12|) |v_ULTIMATE.start_main_~#t271~0.offset_10| 2)) |v_#memory_int_11|) (= 0 |v_ULTIMATE.start_main_~#t271~0.offset_10|) (= 0 (select |v_#valid_33| |v_ULTIMATE.start_main_~#t271~0.base_12|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t271~0.base_12|) (not (= 0 |v_ULTIMATE.start_main_~#t271~0.base_12|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t271~0.base=|v_ULTIMATE.start_main_~#t271~0.base_12|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t271~0.offset=|v_ULTIMATE.start_main_~#t271~0.offset_10|, #valid=|v_#valid_32|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t271~0.base, ULTIMATE.start_main_~#t271~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length] because there is no mapped edge [2019-12-07 14:04:24,679 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L778-2-->L778-4: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In455050796 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In455050796 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite9_Out455050796| ~a$w_buff1~0_In455050796) (not .cse0) (not .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite9_Out455050796| ~a~0_In455050796) (or .cse1 .cse0)))) InVars {~a~0=~a~0_In455050796, ~a$w_buff1~0=~a$w_buff1~0_In455050796, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In455050796, ~a$w_buff1_used~0=~a$w_buff1_used~0_In455050796} OutVars{~a~0=~a~0_In455050796, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out455050796|, ~a$w_buff1~0=~a$w_buff1~0_In455050796, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In455050796, ~a$w_buff1_used~0=~a$w_buff1_used~0_In455050796} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 14:04:24,679 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L778-4-->L779: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_14| v_~a~0_33) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_14|} OutVars{~a~0=v_~a~0_33, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_13|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_21|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 14:04:24,679 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L779-->L779-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-1077768849 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd2~0_In-1077768849 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite11_Out-1077768849|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In-1077768849 |P1Thread1of1ForFork2_#t~ite11_Out-1077768849|)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1077768849, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1077768849} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1077768849, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1077768849, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-1077768849|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 14:04:24,680 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L753-->L753-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In-162874299 256))) (.cse1 (= (mod ~a$w_buff0_used~0_In-162874299 256) 0))) (or (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork1_#t~ite5_Out-162874299| 0)) (and (= ~a$w_buff0_used~0_In-162874299 |P0Thread1of1ForFork1_#t~ite5_Out-162874299|) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-162874299, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-162874299} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-162874299|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-162874299, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-162874299} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 14:04:24,680 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L754-->L754-2: Formula: (let ((.cse3 (= (mod ~a$r_buff1_thd1~0_In-2136584885 256) 0)) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In-2136584885 256))) (.cse0 (= (mod ~a$r_buff0_thd1~0_In-2136584885 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-2136584885 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork1_#t~ite6_Out-2136584885| ~a$w_buff1_used~0_In-2136584885)) (and (= |P0Thread1of1ForFork1_#t~ite6_Out-2136584885| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-2136584885, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2136584885, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-2136584885, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2136584885} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-2136584885|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-2136584885, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2136584885, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-2136584885, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2136584885} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 14:04:24,681 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L755-->L756: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-414805101 256))) (.cse1 (= (mod ~a$r_buff0_thd1~0_In-414805101 256) 0)) (.cse2 (= ~a$r_buff0_thd1~0_Out-414805101 ~a$r_buff0_thd1~0_In-414805101))) (or (and (not .cse0) (= ~a$r_buff0_thd1~0_Out-414805101 0) (not .cse1)) (and .cse0 .cse2) (and .cse1 .cse2))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-414805101, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-414805101} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-414805101|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-414805101, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-414805101} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 14:04:24,681 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L756-->L756-2: Formula: (let ((.cse2 (= (mod ~a$w_buff1_used~0_In-1641133201 256) 0)) (.cse3 (= 0 (mod ~a$r_buff1_thd1~0_In-1641133201 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1641133201 256))) (.cse0 (= (mod ~a$r_buff0_thd1~0_In-1641133201 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite8_Out-1641133201| ~a$r_buff1_thd1~0_In-1641133201) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P0Thread1of1ForFork1_#t~ite8_Out-1641133201| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1641133201, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1641133201, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1641133201, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1641133201} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-1641133201|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1641133201, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1641133201, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1641133201, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1641133201} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 14:04:24,681 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [867] [867] L756-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~a$r_buff1_thd1~0_72 |v_P0Thread1of1ForFork1_#t~ite8_48|) (= (+ v_~__unbuffered_cnt~0_63 1) v_~__unbuffered_cnt~0_62)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_48|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_47|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_72, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 14:04:24,681 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L803-->L803-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1742425264 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite20_In-1742425264| |P2Thread1of1ForFork0_#t~ite20_Out-1742425264|) (not .cse0) (= ~a$w_buff0~0_In-1742425264 |P2Thread1of1ForFork0_#t~ite21_Out-1742425264|)) (and (= |P2Thread1of1ForFork0_#t~ite21_Out-1742425264| |P2Thread1of1ForFork0_#t~ite20_Out-1742425264|) .cse0 (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-1742425264 256)))) (or (= (mod ~a$w_buff0_used~0_In-1742425264 256) 0) (and .cse1 (= 0 (mod ~a$w_buff1_used~0_In-1742425264 256))) (and .cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-1742425264 256))))) (= ~a$w_buff0~0_In-1742425264 |P2Thread1of1ForFork0_#t~ite20_Out-1742425264|)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In-1742425264, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1742425264, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1742425264, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1742425264, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1742425264, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-1742425264|, ~weak$$choice2~0=~weak$$choice2~0_In-1742425264} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-1742425264|, ~a$w_buff0~0=~a$w_buff0~0_In-1742425264, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1742425264, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1742425264, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1742425264, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-1742425264|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1742425264, ~weak$$choice2~0=~weak$$choice2~0_In-1742425264} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 14:04:24,683 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L805-->L805-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-2137038849 256) 0))) (or (and (not .cse0) (= ~a$w_buff0_used~0_In-2137038849 |P2Thread1of1ForFork0_#t~ite27_Out-2137038849|) (= |P2Thread1of1ForFork0_#t~ite26_In-2137038849| |P2Thread1of1ForFork0_#t~ite26_Out-2137038849|)) (and (= ~a$w_buff0_used~0_In-2137038849 |P2Thread1of1ForFork0_#t~ite26_Out-2137038849|) .cse0 (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-2137038849 256) 0))) (or (and .cse1 (= (mod ~a$w_buff1_used~0_In-2137038849 256) 0)) (= (mod ~a$w_buff0_used~0_In-2137038849 256) 0) (and (= (mod ~a$r_buff1_thd3~0_In-2137038849 256) 0) .cse1))) (= |P2Thread1of1ForFork0_#t~ite27_Out-2137038849| |P2Thread1of1ForFork0_#t~ite26_Out-2137038849|)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-2137038849|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2137038849, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2137038849, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2137038849, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2137038849, ~weak$$choice2~0=~weak$$choice2~0_In-2137038849} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-2137038849|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-2137038849|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2137038849, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2137038849, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2137038849, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2137038849, ~weak$$choice2~0=~weak$$choice2~0_In-2137038849} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 14:04:24,684 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L807-->L808: Formula: (and (= v_~a$r_buff0_thd3~0_61 v_~a$r_buff0_thd3~0_60) (not (= 0 (mod v_~weak$$choice2~0_15 256)))) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_61, ~weak$$choice2~0=v_~weak$$choice2~0_15} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_5|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_5|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_60, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_5|, ~weak$$choice2~0=v_~weak$$choice2~0_15} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 14:04:24,684 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L810-->L814: Formula: (and (not (= (mod v_~a$flush_delayed~0_7 256) 0)) (= v_~a~0_20 v_~a$mem_tmp~0_4) (= v_~a$flush_delayed~0_6 0)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_4, ~a$flush_delayed~0=v_~a$flush_delayed~0_7} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_20, ~a$mem_tmp~0=v_~a$mem_tmp~0_4, ~a$flush_delayed~0=v_~a$flush_delayed~0_6} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 14:04:24,685 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L814-2-->L814-5: Formula: (let ((.cse0 (= |P2Thread1of1ForFork0_#t~ite39_Out-383813196| |P2Thread1of1ForFork0_#t~ite38_Out-383813196|)) (.cse2 (= (mod ~a$r_buff1_thd3~0_In-383813196 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In-383813196 256) 0))) (or (and .cse0 (= ~a~0_In-383813196 |P2Thread1of1ForFork0_#t~ite38_Out-383813196|) (or .cse1 .cse2)) (and .cse0 (not .cse2) (= ~a$w_buff1~0_In-383813196 |P2Thread1of1ForFork0_#t~ite38_Out-383813196|) (not .cse1)))) InVars {~a~0=~a~0_In-383813196, ~a$w_buff1~0=~a$w_buff1~0_In-383813196, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-383813196, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-383813196} OutVars{~a~0=~a~0_In-383813196, P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out-383813196|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-383813196|, ~a$w_buff1~0=~a$w_buff1~0_In-383813196, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-383813196, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-383813196} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 14:04:24,685 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L815-->L815-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd3~0_In86724157 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In86724157 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite40_Out86724157| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out86724157| ~a$w_buff0_used~0_In86724157)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In86724157, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In86724157} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out86724157|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In86724157, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In86724157} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 14:04:24,686 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L816-->L816-2: Formula: (let ((.cse3 (= (mod ~a$w_buff0_used~0_In1487983133 256) 0)) (.cse2 (= 0 (mod ~a$r_buff0_thd3~0_In1487983133 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In1487983133 256) 0)) (.cse0 (= (mod ~a$r_buff1_thd3~0_In1487983133 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork0_#t~ite41_Out1487983133| 0)) (and (or .cse3 .cse2) (= |P2Thread1of1ForFork0_#t~ite41_Out1487983133| ~a$w_buff1_used~0_In1487983133) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1487983133, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1487983133, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1487983133, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1487983133} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1487983133, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1487983133, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1487983133, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1487983133, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out1487983133|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 14:04:24,686 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L780-->L780-2: Formula: (let ((.cse1 (= (mod ~a$r_buff1_thd2~0_In-336220754 256) 0)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-336220754 256))) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In-336220754 256))) (.cse2 (= (mod ~a$r_buff0_thd2~0_In-336220754 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite12_Out-336220754| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse3 .cse2) (= ~a$w_buff1_used~0_In-336220754 |P1Thread1of1ForFork2_#t~ite12_Out-336220754|)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-336220754, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-336220754, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-336220754, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-336220754} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-336220754, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-336220754, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-336220754, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-336220754|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-336220754} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 14:04:24,687 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L781-->L781-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd2~0_In862272103 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In862272103 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out862272103| ~a$r_buff0_thd2~0_In862272103)) (and (not .cse1) (not .cse0) (= |P1Thread1of1ForFork2_#t~ite13_Out862272103| 0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In862272103, ~a$w_buff0_used~0=~a$w_buff0_used~0_In862272103} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In862272103, ~a$w_buff0_used~0=~a$w_buff0_used~0_In862272103, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out862272103|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 14:04:24,687 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [852] [852] L782-->L782-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff1_used~0_In256478450 256))) (.cse0 (= (mod ~a$r_buff1_thd2~0_In256478450 256) 0)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In256478450 256))) (.cse3 (= (mod ~a$r_buff0_thd2~0_In256478450 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite14_Out256478450|)) (and (or .cse1 .cse0) (or .cse2 .cse3) (= ~a$r_buff1_thd2~0_In256478450 |P1Thread1of1ForFork2_#t~ite14_Out256478450|)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In256478450, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In256478450, ~a$w_buff0_used~0=~a$w_buff0_used~0_In256478450, ~a$w_buff1_used~0=~a$w_buff1_used~0_In256478450} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In256478450, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In256478450, ~a$w_buff0_used~0=~a$w_buff0_used~0_In256478450, ~a$w_buff1_used~0=~a$w_buff1_used~0_In256478450, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out256478450|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 14:04:24,687 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L782-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_34| v_~a$r_buff1_thd2~0_63) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~__unbuffered_cnt~0_68 (+ v_~__unbuffered_cnt~0_69 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_34|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_63, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_68, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_33|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 14:04:24,687 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L817-->L817-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd3~0_In398703002 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In398703002 256)))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite42_Out398703002|) (not .cse0) (not .cse1)) (and (= ~a$r_buff0_thd3~0_In398703002 |P2Thread1of1ForFork0_#t~ite42_Out398703002|) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In398703002, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In398703002} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In398703002, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In398703002, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out398703002|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 14:04:24,688 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L818-->L818-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff1_thd3~0_In1376534172 256))) (.cse2 (= (mod ~a$w_buff1_used~0_In1376534172 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In1376534172 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd3~0_In1376534172 256) 0))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite43_Out1376534172|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~a$r_buff1_thd3~0_In1376534172 |P2Thread1of1ForFork0_#t~ite43_Out1376534172|)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1376534172, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1376534172, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1376534172, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1376534172} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out1376534172|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1376534172, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1376534172, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1376534172, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1376534172} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 14:04:24,688 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L818-2-->P2EXIT: Formula: (and (= v_~a$r_buff1_thd3~0_149 |v_P2Thread1of1ForFork0_#t~ite43_36|) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_78 (+ v_~__unbuffered_cnt~0_79 1)) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_35|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_149, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 14:04:24,688 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L841-1-->L847: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_9 256))) (= v_~main$tmp_guard0~0_9 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_40) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 14:04:24,689 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L847-2-->L847-4: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In752139667 256) 0)) (.cse1 (= (mod ~a$r_buff1_thd0~0_In752139667 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite47_Out752139667| ~a~0_In752139667)) (and (= |ULTIMATE.start_main_#t~ite47_Out752139667| ~a$w_buff1~0_In752139667) (not .cse0) (not .cse1)))) InVars {~a~0=~a~0_In752139667, ~a$w_buff1~0=~a$w_buff1~0_In752139667, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In752139667, ~a$w_buff1_used~0=~a$w_buff1_used~0_In752139667} OutVars{~a~0=~a~0_In752139667, ~a$w_buff1~0=~a$w_buff1~0_In752139667, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out752139667|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In752139667, ~a$w_buff1_used~0=~a$w_buff1_used~0_In752139667} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 14:04:24,689 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L847-4-->L848: Formula: (= v_~a~0_39 |v_ULTIMATE.start_main_#t~ite47_15|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_15|} OutVars{~a~0=v_~a~0_39, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_14|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 14:04:24,689 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L848-->L848-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-1910056930 256))) (.cse1 (= (mod ~a$r_buff0_thd0~0_In-1910056930 256) 0))) (or (and (= ~a$w_buff0_used~0_In-1910056930 |ULTIMATE.start_main_#t~ite49_Out-1910056930|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite49_Out-1910056930|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1910056930, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1910056930} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1910056930, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1910056930|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1910056930} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 14:04:24,689 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L849-->L849-2: Formula: (let ((.cse1 (= (mod ~a$w_buff1_used~0_In-1964641033 256) 0)) (.cse0 (= (mod ~a$r_buff1_thd0~0_In-1964641033 256) 0)) (.cse2 (= 0 (mod ~a$r_buff0_thd0~0_In-1964641033 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In-1964641033 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite50_Out-1964641033| 0)) (and (or .cse1 .cse0) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite50_Out-1964641033| ~a$w_buff1_used~0_In-1964641033)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1964641033, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1964641033, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1964641033, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1964641033} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1964641033|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1964641033, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1964641033, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1964641033, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1964641033} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 14:04:24,690 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L850-->L850-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In1585491296 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In1585491296 256)))) (or (and (or .cse0 .cse1) (= ~a$r_buff0_thd0~0_In1585491296 |ULTIMATE.start_main_#t~ite51_Out1585491296|)) (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite51_Out1585491296|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1585491296, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1585491296} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out1585491296|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1585491296, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1585491296} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 14:04:24,690 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L851-->L851-2: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff0_thd0~0_In370565615 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In370565615 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In370565615 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In370565615 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out370565615| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite52_Out370565615| ~a$r_buff1_thd0~0_In370565615)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In370565615, ~a$w_buff0_used~0=~a$w_buff0_used~0_In370565615, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In370565615, ~a$w_buff1_used~0=~a$w_buff1_used~0_In370565615} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out370565615|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In370565615, ~a$w_buff0_used~0=~a$w_buff0_used~0_In370565615, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In370565615, ~a$w_buff1_used~0=~a$w_buff1_used~0_In370565615} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 14:04:24,690 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [887] [887] L851-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|) (= |v_ULTIMATE.start_main_#t~ite52_30| v_~a$r_buff1_thd0~0_75) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12| (mod v_~main$tmp_guard1~0_12 256)) (= v_~main$tmp_guard1~0_12 (ite (= (ite (not (and (= 1 v_~__unbuffered_p2_EAX~0_17) (= v_~__unbuffered_p1_EBX~0_17 0) (= 0 v_~__unbuffered_p0_EAX~0_39) (= 1 v_~__unbuffered_p1_EAX~0_17) (= v_~__unbuffered_p2_EBX~0_22 0))) 1 0) 0) 0 1))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_39, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_30|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_17, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_17} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_39, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_29|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_16, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_17, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_17, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_75, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_17, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 14:04:24,741 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 07.12 02:04:24 BasicIcfg [2019-12-07 14:04:24,741 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2019-12-07 14:04:24,742 INFO L113 PluginConnector]: ------------------------Witness Printer---------------------------- [2019-12-07 14:04:24,742 INFO L271 PluginConnector]: Initializing Witness Printer... [2019-12-07 14:04:24,742 INFO L275 PluginConnector]: Witness Printer initialized [2019-12-07 14:04:24,742 INFO L185 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 07.12 02:01:15" (3/4) ... [2019-12-07 14:04:24,743 INFO L131 WitnessPrinter]: Generating witness for reachability counterexample [2019-12-07 14:04:24,744 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [903] [903] ULTIMATE.startENTRY-->L837: Formula: (let ((.cse0 (store |v_#valid_65| 0 0))) (and (= v_~x~0_45 0) (= 0 v_~a$w_buff0_used~0_768) (< |v_#StackHeapBarrier_16| |v_ULTIMATE.start_main_~#t269~0.base_33|) (= v_~y~0_18 0) (= |v_ULTIMATE.start_main_~#t269~0.offset_23| 0) (= 0 v_~a$r_buff1_thd1~0_150) (= 0 v_~__unbuffered_p2_EAX~0_31) (= 0 v_~a$read_delayed_var~0.base_7) (= 0 v_~a$w_buff1_used~0_426) (= v_~main$tmp_guard0~0_29 0) (= v_~a$read_delayed_var~0.offset_7 0) (= 0 v_~a$w_buff1~0_200) (= v_~a$r_buff1_thd3~0_269 0) (< 0 |v_#StackHeapBarrier_16|) (= 0 v_~__unbuffered_p0_EAX~0_111) (= v_~a$r_buff0_thd3~0_320 0) (= v_~a~0_184 0) (= 0 v_~__unbuffered_p1_EAX~0_34) (= v_~__unbuffered_cnt~0_102 0) (= (store |v_#length_22| |v_ULTIMATE.start_main_~#t269~0.base_33| 4) |v_#length_21|) (= 0 |v_#NULL.base_4|) (= v_~a$flush_delayed~0_25 0) (= v_~__unbuffered_p1_EBX~0_34 0) (= v_~a$r_buff0_thd0~0_107 0) (= v_~main$tmp_guard1~0_32 0) (= v_~a$r_buff1_thd0~0_160 0) (= v_~a$w_buff0~0_274 0) (= v_~z~0_21 0) (= |v_#NULL.offset_4| 0) (= (select .cse0 |v_ULTIMATE.start_main_~#t269~0.base_33|) 0) (= v_~a$mem_tmp~0_14 0) (= 0 v_~a$r_buff0_thd1~0_184) (= 0 v_~a$r_buff1_thd2~0_145) (= v_~a$r_buff0_thd2~0_95 0) (= (store |v_#memory_int_20| |v_ULTIMATE.start_main_~#t269~0.base_33| (store (select |v_#memory_int_20| |v_ULTIMATE.start_main_~#t269~0.base_33|) |v_ULTIMATE.start_main_~#t269~0.offset_23| 0)) |v_#memory_int_19|) (= v_~weak$$choice2~0_110 0) (= v_~__unbuffered_p2_EBX~0_40 0) (= (store .cse0 |v_ULTIMATE.start_main_~#t269~0.base_33| 1) |v_#valid_63|) (= 0 v_~a$read_delayed~0_8) (= 0 v_~weak$$choice0~0_12))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_16|, #valid=|v_#valid_65|, #memory_int=|v_#memory_int_20|, #length=|v_#length_22|} OutVars{~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_145, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_67|, #NULL.offset=|v_#NULL.offset_4|, ULTIMATE.start_main_#t~ite49=|v_ULTIMATE.start_main_#t~ite49_471|, ~a$r_buff0_thd0~0=v_~a$r_buff0_thd0~0_107, ULTIMATE.start_main_#t~ite50=|v_ULTIMATE.start_main_#t~ite50_41|, ~a~0=v_~a~0_184, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_64|, ULTIMATE.start_main_~#t270~0.offset=|v_ULTIMATE.start_main_~#t270~0.offset_19|, ~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_111, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_34, #length=|v_#length_21|, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_31, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_40, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_10|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_269, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_768, ~a$r_buff0_thd1~0=v_~a$r_buff0_thd1~0_184, ~weak$$choice0~0=v_~weak$$choice0~0_12, #StackHeapBarrier=|v_#StackHeapBarrier_16|, ~a$read_delayed_var~0.offset=v_~a$read_delayed_var~0.offset_7, ~a$w_buff0~0=v_~a$w_buff0~0_274, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_160, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_102, ~x~0=v_~x~0_45, ULTIMATE.start_main_~#t271~0.offset=|v_ULTIMATE.start_main_~#t271~0.offset_19|, ~a$read_delayed~0=v_~a$read_delayed~0_8, ~a$r_buff0_thd2~0=v_~a$r_buff0_thd2~0_95, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_32, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_69|, ULTIMATE.start_main_~#t271~0.base=|v_ULTIMATE.start_main_~#t271~0.base_25|, ~a$mem_tmp~0=v_~a$mem_tmp~0_14, ULTIMATE.start_main_#t~ite51=|v_ULTIMATE.start_main_#t~ite51_29|, ~a$w_buff1~0=v_~a$w_buff1~0_200, ~y~0=v_~y~0_18, ULTIMATE.start_main_~#t269~0.base=|v_ULTIMATE.start_main_~#t269~0.base_33|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_34, ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_27|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_9|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_150, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_320, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_29, #NULL.base=|v_#NULL.base_4|, ~a$flush_delayed~0=v_~a$flush_delayed~0_25, ULTIMATE.start_main_#res=|v_ULTIMATE.start_main_#res_21|, #valid=|v_#valid_63|, #memory_int=|v_#memory_int_19|, ULTIMATE.start_main_~#t269~0.offset=|v_ULTIMATE.start_main_~#t269~0.offset_23|, ULTIMATE.start_main_~#t270~0.base=|v_ULTIMATE.start_main_~#t270~0.base_25|, ~z~0=v_~z~0_21, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_426, ~weak$$choice2~0=v_~weak$$choice2~0_110, ~a$read_delayed_var~0.base=v_~a$read_delayed_var~0.base_7} AuxVars[] AssignedVars[~a$r_buff1_thd2~0, ULTIMATE.start_main_#t~ite47, #NULL.offset, ULTIMATE.start_main_#t~ite49, ~a$r_buff0_thd0~0, ULTIMATE.start_main_#t~ite50, ~a~0, ULTIMATE.start_main_#t~ite52, ULTIMATE.start_main_~#t270~0.offset, ~__unbuffered_p0_EAX~0, ~__unbuffered_p1_EAX~0, #length, ~__unbuffered_p2_EAX~0, ~__unbuffered_p2_EBX~0, ULTIMATE.start_main_#t~nondet45, ~a$r_buff1_thd3~0, ~a$w_buff0_used~0, ~a$r_buff0_thd1~0, ~weak$$choice0~0, ~a$read_delayed_var~0.offset, ~a$w_buff0~0, ~a$r_buff1_thd0~0, ~__unbuffered_cnt~0, ~x~0, ULTIMATE.start_main_~#t271~0.offset, ~a$read_delayed~0, ~a$r_buff0_thd2~0, ~main$tmp_guard1~0, ULTIMATE.start_main_#t~ite48, ULTIMATE.start_main_~#t271~0.base, ~a$mem_tmp~0, ULTIMATE.start_main_#t~ite51, ~a$w_buff1~0, ~y~0, ULTIMATE.start_main_~#t269~0.base, ~__unbuffered_p1_EBX~0, ULTIMATE.start_main_#t~nondet46, ULTIMATE.start_main_#t~nondet44, ~a$r_buff1_thd1~0, ~a$r_buff0_thd3~0, ~main$tmp_guard0~0, #NULL.base, ~a$flush_delayed~0, ULTIMATE.start_main_#res, #valid, #memory_int, ULTIMATE.start_main_~#t269~0.offset, ULTIMATE.start_main_~#t270~0.base, ~z~0, ~a$w_buff1_used~0, ~weak$$choice2~0, ~a$read_delayed_var~0.base] because there is no mapped edge [2019-12-07 14:04:24,744 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [802] [802] P0ENTRY-->L4-3: Formula: (and (not (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_22 0)) (= v_P0Thread1of1ForFork1_~arg.offset_18 |v_P0Thread1of1ForFork1_#in~arg.offset_20|) (= 1 v_~a$w_buff0_used~0_240) (= (ite (not (and (not (= (mod v_~a$w_buff0_used~0_240 256) 0)) (not (= (mod v_~a$w_buff1_used~0_130 256) 0)))) 1 0) |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_18|) (= v_~a$w_buff0_used~0_241 v_~a$w_buff1_used~0_130) (= v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_22 |v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_18|) (= |v_P0Thread1of1ForFork1_#in~arg.base_20| v_P0Thread1of1ForFork1_~arg.base_18) (= 1 v_~a$w_buff0~0_55) (= v_~a$w_buff0~0_56 v_~a$w_buff1~0_50)) InVars {P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_20|, ~a$w_buff0~0=v_~a$w_buff0~0_56, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_241, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_20|} OutVars{~a$w_buff1~0=v_~a$w_buff1~0_50, P0Thread1of1ForFork1_#in~arg.offset=|v_P0Thread1of1ForFork1_#in~arg.offset_20|, ~a$w_buff0~0=v_~a$w_buff0~0_55, P0Thread1of1ForFork1___VERIFIER_assert_~expression=v_P0Thread1of1ForFork1___VERIFIER_assert_~expression_22, ~a$w_buff0_used~0=v_~a$w_buff0_used~0_240, P0Thread1of1ForFork1_~arg.offset=v_P0Thread1of1ForFork1_~arg.offset_18, ~a$w_buff1_used~0=v_~a$w_buff1_used~0_130, P0Thread1of1ForFork1_#in~arg.base=|v_P0Thread1of1ForFork1_#in~arg.base_20|, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression=|v_P0Thread1of1ForFork1___VERIFIER_assert_#in~expression_18|, P0Thread1of1ForFork1_~arg.base=v_P0Thread1of1ForFork1_~arg.base_18} AuxVars[] AssignedVars[~a$w_buff1~0, ~a$w_buff0~0, P0Thread1of1ForFork1___VERIFIER_assert_~expression, ~a$w_buff0_used~0, P0Thread1of1ForFork1_~arg.offset, ~a$w_buff1_used~0, P0Thread1of1ForFork1___VERIFIER_assert_#in~expression, P0Thread1of1ForFork1_~arg.base] because there is no mapped edge [2019-12-07 14:04:24,745 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [872] [872] L837-1-->L839: Formula: (and (= (store |v_#length_16| |v_ULTIMATE.start_main_~#t270~0.base_12| 4) |v_#length_15|) (not (= |v_ULTIMATE.start_main_~#t270~0.base_12| 0)) (= (select |v_#valid_35| |v_ULTIMATE.start_main_~#t270~0.base_12|) 0) (< |v_#StackHeapBarrier_11| |v_ULTIMATE.start_main_~#t270~0.base_12|) (= 0 |v_ULTIMATE.start_main_~#t270~0.offset_10|) (= (store |v_#valid_35| |v_ULTIMATE.start_main_~#t270~0.base_12| 1) |v_#valid_34|) (= (store |v_#memory_int_14| |v_ULTIMATE.start_main_~#t270~0.base_12| (store (select |v_#memory_int_14| |v_ULTIMATE.start_main_~#t270~0.base_12|) |v_ULTIMATE.start_main_~#t270~0.offset_10| 1)) |v_#memory_int_13|)) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_11|, #valid=|v_#valid_35|, #memory_int=|v_#memory_int_14|, #length=|v_#length_16|} OutVars{ULTIMATE.start_main_~#t270~0.offset=|v_ULTIMATE.start_main_~#t270~0.offset_10|, #StackHeapBarrier=|v_#StackHeapBarrier_11|, ULTIMATE.start_main_#t~nondet44=|v_ULTIMATE.start_main_#t~nondet44_4|, #valid=|v_#valid_34|, #memory_int=|v_#memory_int_13|, ULTIMATE.start_main_~#t270~0.base=|v_ULTIMATE.start_main_~#t270~0.base_12|, #length=|v_#length_15|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t270~0.offset, ULTIMATE.start_main_#t~nondet44, #valid, #memory_int, ULTIMATE.start_main_~#t270~0.base, #length] because there is no mapped edge [2019-12-07 14:04:24,745 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [871] [871] L839-1-->L841: Formula: (and (= |v_#length_13| (store |v_#length_14| |v_ULTIMATE.start_main_~#t271~0.base_12| 4)) (= |v_#valid_32| (store |v_#valid_33| |v_ULTIMATE.start_main_~#t271~0.base_12| 1)) (= (store |v_#memory_int_12| |v_ULTIMATE.start_main_~#t271~0.base_12| (store (select |v_#memory_int_12| |v_ULTIMATE.start_main_~#t271~0.base_12|) |v_ULTIMATE.start_main_~#t271~0.offset_10| 2)) |v_#memory_int_11|) (= 0 |v_ULTIMATE.start_main_~#t271~0.offset_10|) (= 0 (select |v_#valid_33| |v_ULTIMATE.start_main_~#t271~0.base_12|)) (< |v_#StackHeapBarrier_10| |v_ULTIMATE.start_main_~#t271~0.base_12|) (not (= 0 |v_ULTIMATE.start_main_~#t271~0.base_12|))) InVars {#StackHeapBarrier=|v_#StackHeapBarrier_10|, #valid=|v_#valid_33|, #memory_int=|v_#memory_int_12|, #length=|v_#length_14|} OutVars{ULTIMATE.start_main_~#t271~0.base=|v_ULTIMATE.start_main_~#t271~0.base_12|, #StackHeapBarrier=|v_#StackHeapBarrier_10|, ULTIMATE.start_main_~#t271~0.offset=|v_ULTIMATE.start_main_~#t271~0.offset_10|, #valid=|v_#valid_32|, ULTIMATE.start_main_#t~nondet45=|v_ULTIMATE.start_main_#t~nondet45_5|, #memory_int=|v_#memory_int_11|, #length=|v_#length_13|} AuxVars[] AssignedVars[ULTIMATE.start_main_~#t271~0.base, ULTIMATE.start_main_~#t271~0.offset, #valid, ULTIMATE.start_main_#t~nondet45, #memory_int, #length] because there is no mapped edge [2019-12-07 14:04:24,746 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [832] [832] L778-2-->L778-4: Formula: (let ((.cse1 (= 0 (mod ~a$r_buff1_thd2~0_In455050796 256))) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In455050796 256)))) (or (and (= |P1Thread1of1ForFork2_#t~ite9_Out455050796| ~a$w_buff1~0_In455050796) (not .cse0) (not .cse1)) (and (= |P1Thread1of1ForFork2_#t~ite9_Out455050796| ~a~0_In455050796) (or .cse1 .cse0)))) InVars {~a~0=~a~0_In455050796, ~a$w_buff1~0=~a$w_buff1~0_In455050796, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In455050796, ~a$w_buff1_used~0=~a$w_buff1_used~0_In455050796} OutVars{~a~0=~a~0_In455050796, P1Thread1of1ForFork2_#t~ite9=|P1Thread1of1ForFork2_#t~ite9_Out455050796|, ~a$w_buff1~0=~a$w_buff1~0_In455050796, ~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In455050796, ~a$w_buff1_used~0=~a$w_buff1_used~0_In455050796} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite9] because there is no mapped edge [2019-12-07 14:04:24,746 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [771] [771] L778-4-->L779: Formula: (= |v_P1Thread1of1ForFork2_#t~ite9_14| v_~a~0_33) InVars {P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_14|} OutVars{~a~0=v_~a~0_33, P1Thread1of1ForFork2_#t~ite9=|v_P1Thread1of1ForFork2_#t~ite9_13|, P1Thread1of1ForFork2_#t~ite10=|v_P1Thread1of1ForFork2_#t~ite10_21|} AuxVars[] AssignedVars[~a~0, P1Thread1of1ForFork2_#t~ite9, P1Thread1of1ForFork2_#t~ite10] because there is no mapped edge [2019-12-07 14:04:24,746 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [836] [836] L779-->L779-2: Formula: (let ((.cse0 (= (mod ~a$w_buff0_used~0_In-1077768849 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd2~0_In-1077768849 256) 0))) (or (and (= 0 |P1Thread1of1ForFork2_#t~ite11_Out-1077768849|) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= ~a$w_buff0_used~0_In-1077768849 |P1Thread1of1ForFork2_#t~ite11_Out-1077768849|)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1077768849, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1077768849} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-1077768849, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1077768849, P1Thread1of1ForFork2_#t~ite11=|P1Thread1of1ForFork2_#t~ite11_Out-1077768849|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite11] because there is no mapped edge [2019-12-07 14:04:24,747 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [834] [834] L753-->L753-2: Formula: (let ((.cse0 (= 0 (mod ~a$r_buff0_thd1~0_In-162874299 256))) (.cse1 (= (mod ~a$w_buff0_used~0_In-162874299 256) 0))) (or (and (not .cse0) (not .cse1) (= |P0Thread1of1ForFork1_#t~ite5_Out-162874299| 0)) (and (= ~a$w_buff0_used~0_In-162874299 |P0Thread1of1ForFork1_#t~ite5_Out-162874299|) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-162874299, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-162874299} OutVars{P0Thread1of1ForFork1_#t~ite5=|P0Thread1of1ForFork1_#t~ite5_Out-162874299|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-162874299, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-162874299} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite5] because there is no mapped edge [2019-12-07 14:04:24,748 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [849] [849] L754-->L754-2: Formula: (let ((.cse3 (= (mod ~a$r_buff1_thd1~0_In-2136584885 256) 0)) (.cse2 (= 0 (mod ~a$w_buff1_used~0_In-2136584885 256))) (.cse0 (= (mod ~a$r_buff0_thd1~0_In-2136584885 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-2136584885 256)))) (or (and (or .cse0 .cse1) (or .cse2 .cse3) (= |P0Thread1of1ForFork1_#t~ite6_Out-2136584885| ~a$w_buff1_used~0_In-2136584885)) (and (= |P0Thread1of1ForFork1_#t~ite6_Out-2136584885| 0) (or (and (not .cse3) (not .cse2)) (and (not .cse0) (not .cse1)))))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-2136584885, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2136584885, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-2136584885, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2136584885} OutVars{P0Thread1of1ForFork1_#t~ite6=|P0Thread1of1ForFork1_#t~ite6_Out-2136584885|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-2136584885, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2136584885, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-2136584885, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2136584885} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite6] because there is no mapped edge [2019-12-07 14:04:24,748 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [842] [842] L755-->L756: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-414805101 256))) (.cse1 (= (mod ~a$r_buff0_thd1~0_In-414805101 256) 0)) (.cse2 (= ~a$r_buff0_thd1~0_Out-414805101 ~a$r_buff0_thd1~0_In-414805101))) (or (and (not .cse0) (= ~a$r_buff0_thd1~0_Out-414805101 0) (not .cse1)) (and .cse0 .cse2) (and .cse1 .cse2))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-414805101, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-414805101} OutVars{P0Thread1of1ForFork1_#t~ite7=|P0Thread1of1ForFork1_#t~ite7_Out-414805101|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-414805101, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_Out-414805101} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite7, ~a$r_buff0_thd1~0] because there is no mapped edge [2019-12-07 14:04:24,748 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [850] [850] L756-->L756-2: Formula: (let ((.cse2 (= (mod ~a$w_buff1_used~0_In-1641133201 256) 0)) (.cse3 (= 0 (mod ~a$r_buff1_thd1~0_In-1641133201 256))) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In-1641133201 256))) (.cse0 (= (mod ~a$r_buff0_thd1~0_In-1641133201 256) 0))) (or (and (= |P0Thread1of1ForFork1_#t~ite8_Out-1641133201| ~a$r_buff1_thd1~0_In-1641133201) (or .cse0 .cse1) (or .cse2 .cse3)) (and (= |P0Thread1of1ForFork1_#t~ite8_Out-1641133201| 0) (or (and (not .cse2) (not .cse3)) (and (not .cse1) (not .cse0)))))) InVars {~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1641133201, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1641133201, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1641133201, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1641133201} OutVars{P0Thread1of1ForFork1_#t~ite8=|P0Thread1of1ForFork1_#t~ite8_Out-1641133201|, ~a$r_buff1_thd1~0=~a$r_buff1_thd1~0_In-1641133201, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1641133201, ~a$r_buff0_thd1~0=~a$r_buff0_thd1~0_In-1641133201, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1641133201} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8] because there is no mapped edge [2019-12-07 14:04:24,748 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [867] [867] L756-2-->P0EXIT: Formula: (and (= 0 |v_P0Thread1of1ForFork1_#res.base_3|) (= 0 |v_P0Thread1of1ForFork1_#res.offset_3|) (= v_~a$r_buff1_thd1~0_72 |v_P0Thread1of1ForFork1_#t~ite8_48|) (= (+ v_~__unbuffered_cnt~0_63 1) v_~__unbuffered_cnt~0_62)) InVars {P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_48|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_63} OutVars{P0Thread1of1ForFork1_#t~ite8=|v_P0Thread1of1ForFork1_#t~ite8_47|, P0Thread1of1ForFork1_#res.offset=|v_P0Thread1of1ForFork1_#res.offset_3|, ~a$r_buff1_thd1~0=v_~a$r_buff1_thd1~0_72, P0Thread1of1ForFork1_#res.base=|v_P0Thread1of1ForFork1_#res.base_3|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_62} AuxVars[] AssignedVars[P0Thread1of1ForFork1_#t~ite8, P0Thread1of1ForFork1_#res.offset, ~a$r_buff1_thd1~0, P0Thread1of1ForFork1_#res.base, ~__unbuffered_cnt~0] because there is no mapped edge [2019-12-07 14:04:24,749 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [880] [880] L803-->L803-8: Formula: (let ((.cse0 (= 0 (mod ~weak$$choice2~0_In-1742425264 256)))) (or (and (= |P2Thread1of1ForFork0_#t~ite20_In-1742425264| |P2Thread1of1ForFork0_#t~ite20_Out-1742425264|) (not .cse0) (= ~a$w_buff0~0_In-1742425264 |P2Thread1of1ForFork0_#t~ite21_Out-1742425264|)) (and (= |P2Thread1of1ForFork0_#t~ite21_Out-1742425264| |P2Thread1of1ForFork0_#t~ite20_Out-1742425264|) .cse0 (let ((.cse1 (= 0 (mod ~a$r_buff0_thd3~0_In-1742425264 256)))) (or (= (mod ~a$w_buff0_used~0_In-1742425264 256) 0) (and .cse1 (= 0 (mod ~a$w_buff1_used~0_In-1742425264 256))) (and .cse1 (= 0 (mod ~a$r_buff1_thd3~0_In-1742425264 256))))) (= ~a$w_buff0~0_In-1742425264 |P2Thread1of1ForFork0_#t~ite20_Out-1742425264|)))) InVars {~a$w_buff0~0=~a$w_buff0~0_In-1742425264, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1742425264, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1742425264, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1742425264, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1742425264, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_In-1742425264|, ~weak$$choice2~0=~weak$$choice2~0_In-1742425264} OutVars{P2Thread1of1ForFork0_#t~ite21=|P2Thread1of1ForFork0_#t~ite21_Out-1742425264|, ~a$w_buff0~0=~a$w_buff0~0_In-1742425264, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-1742425264, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1742425264, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-1742425264, P2Thread1of1ForFork0_#t~ite20=|P2Thread1of1ForFork0_#t~ite20_Out-1742425264|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1742425264, ~weak$$choice2~0=~weak$$choice2~0_In-1742425264} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite21, P2Thread1of1ForFork0_#t~ite20] because there is no mapped edge [2019-12-07 14:04:24,750 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [881] [881] L805-->L805-8: Formula: (let ((.cse0 (= (mod ~weak$$choice2~0_In-2137038849 256) 0))) (or (and (not .cse0) (= ~a$w_buff0_used~0_In-2137038849 |P2Thread1of1ForFork0_#t~ite27_Out-2137038849|) (= |P2Thread1of1ForFork0_#t~ite26_In-2137038849| |P2Thread1of1ForFork0_#t~ite26_Out-2137038849|)) (and (= ~a$w_buff0_used~0_In-2137038849 |P2Thread1of1ForFork0_#t~ite26_Out-2137038849|) .cse0 (let ((.cse1 (= (mod ~a$r_buff0_thd3~0_In-2137038849 256) 0))) (or (and .cse1 (= (mod ~a$w_buff1_used~0_In-2137038849 256) 0)) (= (mod ~a$w_buff0_used~0_In-2137038849 256) 0) (and (= (mod ~a$r_buff1_thd3~0_In-2137038849 256) 0) .cse1))) (= |P2Thread1of1ForFork0_#t~ite27_Out-2137038849| |P2Thread1of1ForFork0_#t~ite26_Out-2137038849|)))) InVars {P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_In-2137038849|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2137038849, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2137038849, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2137038849, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2137038849, ~weak$$choice2~0=~weak$$choice2~0_In-2137038849} OutVars{P2Thread1of1ForFork0_#t~ite26=|P2Thread1of1ForFork0_#t~ite26_Out-2137038849|, P2Thread1of1ForFork0_#t~ite27=|P2Thread1of1ForFork0_#t~ite27_Out-2137038849|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-2137038849, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-2137038849, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In-2137038849, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-2137038849, ~weak$$choice2~0=~weak$$choice2~0_In-2137038849} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite26, P2Thread1of1ForFork0_#t~ite27] because there is no mapped edge [2019-12-07 14:04:24,751 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [762] [762] L807-->L808: Formula: (and (= v_~a$r_buff0_thd3~0_61 v_~a$r_buff0_thd3~0_60) (not (= 0 (mod v_~weak$$choice2~0_15 256)))) InVars {~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_61, ~weak$$choice2~0=v_~weak$$choice2~0_15} OutVars{P2Thread1of1ForFork0_#t~ite33=|v_P2Thread1of1ForFork0_#t~ite33_5|, P2Thread1of1ForFork0_#t~ite32=|v_P2Thread1of1ForFork0_#t~ite32_5|, ~a$r_buff0_thd3~0=v_~a$r_buff0_thd3~0_60, P2Thread1of1ForFork0_#t~ite31=|v_P2Thread1of1ForFork0_#t~ite31_5|, ~weak$$choice2~0=v_~weak$$choice2~0_15} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite33, P2Thread1of1ForFork0_#t~ite32, ~a$r_buff0_thd3~0, P2Thread1of1ForFork0_#t~ite31] because there is no mapped edge [2019-12-07 14:04:24,752 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [761] [761] L810-->L814: Formula: (and (not (= (mod v_~a$flush_delayed~0_7 256) 0)) (= v_~a~0_20 v_~a$mem_tmp~0_4) (= v_~a$flush_delayed~0_6 0)) InVars {~a$mem_tmp~0=v_~a$mem_tmp~0_4, ~a$flush_delayed~0=v_~a$flush_delayed~0_7} OutVars{P2Thread1of1ForFork0_#t~ite37=|v_P2Thread1of1ForFork0_#t~ite37_5|, ~a~0=v_~a~0_20, ~a$mem_tmp~0=v_~a$mem_tmp~0_4, ~a$flush_delayed~0=v_~a$flush_delayed~0_6} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite37, ~a~0, ~a$flush_delayed~0] because there is no mapped edge [2019-12-07 14:04:24,752 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [838] [838] L814-2-->L814-5: Formula: (let ((.cse0 (= |P2Thread1of1ForFork0_#t~ite39_Out-383813196| |P2Thread1of1ForFork0_#t~ite38_Out-383813196|)) (.cse2 (= (mod ~a$r_buff1_thd3~0_In-383813196 256) 0)) (.cse1 (= (mod ~a$w_buff1_used~0_In-383813196 256) 0))) (or (and .cse0 (= ~a~0_In-383813196 |P2Thread1of1ForFork0_#t~ite38_Out-383813196|) (or .cse1 .cse2)) (and .cse0 (not .cse2) (= ~a$w_buff1~0_In-383813196 |P2Thread1of1ForFork0_#t~ite38_Out-383813196|) (not .cse1)))) InVars {~a~0=~a~0_In-383813196, ~a$w_buff1~0=~a$w_buff1~0_In-383813196, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-383813196, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-383813196} OutVars{~a~0=~a~0_In-383813196, P2Thread1of1ForFork0_#t~ite39=|P2Thread1of1ForFork0_#t~ite39_Out-383813196|, P2Thread1of1ForFork0_#t~ite38=|P2Thread1of1ForFork0_#t~ite38_Out-383813196|, ~a$w_buff1~0=~a$w_buff1~0_In-383813196, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In-383813196, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-383813196} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite39, P2Thread1of1ForFork0_#t~ite38] because there is no mapped edge [2019-12-07 14:04:24,752 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [840] [840] L815-->L815-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd3~0_In86724157 256) 0)) (.cse1 (= (mod ~a$w_buff0_used~0_In86724157 256) 0))) (or (and (= |P2Thread1of1ForFork0_#t~ite40_Out86724157| 0) (not .cse0) (not .cse1)) (and (or .cse0 .cse1) (= |P2Thread1of1ForFork0_#t~ite40_Out86724157| ~a$w_buff0_used~0_In86724157)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In86724157, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In86724157} OutVars{P2Thread1of1ForFork0_#t~ite40=|P2Thread1of1ForFork0_#t~ite40_Out86724157|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In86724157, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In86724157} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite40] because there is no mapped edge [2019-12-07 14:04:24,753 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [830] [830] L816-->L816-2: Formula: (let ((.cse3 (= (mod ~a$w_buff0_used~0_In1487983133 256) 0)) (.cse2 (= 0 (mod ~a$r_buff0_thd3~0_In1487983133 256))) (.cse1 (= (mod ~a$w_buff1_used~0_In1487983133 256) 0)) (.cse0 (= (mod ~a$r_buff1_thd3~0_In1487983133 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |P2Thread1of1ForFork0_#t~ite41_Out1487983133| 0)) (and (or .cse3 .cse2) (= |P2Thread1of1ForFork0_#t~ite41_Out1487983133| ~a$w_buff1_used~0_In1487983133) (or .cse1 .cse0)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1487983133, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1487983133, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1487983133, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1487983133} OutVars{~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1487983133, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1487983133, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1487983133, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1487983133, P2Thread1of1ForFork0_#t~ite41=|P2Thread1of1ForFork0_#t~ite41_Out1487983133|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite41] because there is no mapped edge [2019-12-07 14:04:24,754 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [846] [846] L780-->L780-2: Formula: (let ((.cse1 (= (mod ~a$r_buff1_thd2~0_In-336220754 256) 0)) (.cse0 (= 0 (mod ~a$w_buff1_used~0_In-336220754 256))) (.cse3 (= 0 (mod ~a$w_buff0_used~0_In-336220754 256))) (.cse2 (= (mod ~a$r_buff0_thd2~0_In-336220754 256) 0))) (or (and (= |P1Thread1of1ForFork2_#t~ite12_Out-336220754| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse1 .cse0) (or .cse3 .cse2) (= ~a$w_buff1_used~0_In-336220754 |P1Thread1of1ForFork2_#t~ite12_Out-336220754|)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-336220754, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-336220754, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-336220754, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-336220754} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In-336220754, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In-336220754, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-336220754, P1Thread1of1ForFork2_#t~ite12=|P1Thread1of1ForFork2_#t~ite12_Out-336220754|, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-336220754} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite12] because there is no mapped edge [2019-12-07 14:04:24,754 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [851] [851] L781-->L781-2: Formula: (let ((.cse1 (= (mod ~a$r_buff0_thd2~0_In862272103 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In862272103 256) 0))) (or (and (or .cse0 .cse1) (= |P1Thread1of1ForFork2_#t~ite13_Out862272103| ~a$r_buff0_thd2~0_In862272103)) (and (not .cse1) (not .cse0) (= |P1Thread1of1ForFork2_#t~ite13_Out862272103| 0)))) InVars {~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In862272103, ~a$w_buff0_used~0=~a$w_buff0_used~0_In862272103} OutVars{~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In862272103, ~a$w_buff0_used~0=~a$w_buff0_used~0_In862272103, P1Thread1of1ForFork2_#t~ite13=|P1Thread1of1ForFork2_#t~ite13_Out862272103|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite13] because there is no mapped edge [2019-12-07 14:04:24,754 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [852] [852] L782-->L782-2: Formula: (let ((.cse1 (= 0 (mod ~a$w_buff1_used~0_In256478450 256))) (.cse0 (= (mod ~a$r_buff1_thd2~0_In256478450 256) 0)) (.cse2 (= 0 (mod ~a$w_buff0_used~0_In256478450 256))) (.cse3 (= (mod ~a$r_buff0_thd2~0_In256478450 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= 0 |P1Thread1of1ForFork2_#t~ite14_Out256478450|)) (and (or .cse1 .cse0) (or .cse2 .cse3) (= ~a$r_buff1_thd2~0_In256478450 |P1Thread1of1ForFork2_#t~ite14_Out256478450|)))) InVars {~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In256478450, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In256478450, ~a$w_buff0_used~0=~a$w_buff0_used~0_In256478450, ~a$w_buff1_used~0=~a$w_buff1_used~0_In256478450} OutVars{~a$r_buff1_thd2~0=~a$r_buff1_thd2~0_In256478450, ~a$r_buff0_thd2~0=~a$r_buff0_thd2~0_In256478450, ~a$w_buff0_used~0=~a$w_buff0_used~0_In256478450, ~a$w_buff1_used~0=~a$w_buff1_used~0_In256478450, P1Thread1of1ForFork2_#t~ite14=|P1Thread1of1ForFork2_#t~ite14_Out256478450|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#t~ite14] because there is no mapped edge [2019-12-07 14:04:24,754 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [868] [868] L782-2-->P1EXIT: Formula: (and (= 0 |v_P1Thread1of1ForFork2_#res.offset_3|) (= |v_P1Thread1of1ForFork2_#t~ite14_34| v_~a$r_buff1_thd2~0_63) (= 0 |v_P1Thread1of1ForFork2_#res.base_3|) (= v_~__unbuffered_cnt~0_68 (+ v_~__unbuffered_cnt~0_69 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_69, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_34|} OutVars{P1Thread1of1ForFork2_#res.offset=|v_P1Thread1of1ForFork2_#res.offset_3|, ~a$r_buff1_thd2~0=v_~a$r_buff1_thd2~0_63, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_68, P1Thread1of1ForFork2_#t~ite14=|v_P1Thread1of1ForFork2_#t~ite14_33|, P1Thread1of1ForFork2_#res.base=|v_P1Thread1of1ForFork2_#res.base_3|} AuxVars[] AssignedVars[P1Thread1of1ForFork2_#res.offset, ~a$r_buff1_thd2~0, ~__unbuffered_cnt~0, P1Thread1of1ForFork2_#t~ite14, P1Thread1of1ForFork2_#res.base] because there is no mapped edge [2019-12-07 14:04:24,755 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [831] [831] L817-->L817-2: Formula: (let ((.cse0 (= (mod ~a$r_buff0_thd3~0_In398703002 256) 0)) (.cse1 (= 0 (mod ~a$w_buff0_used~0_In398703002 256)))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite42_Out398703002|) (not .cse0) (not .cse1)) (and (= ~a$r_buff0_thd3~0_In398703002 |P2Thread1of1ForFork0_#t~ite42_Out398703002|) (or .cse0 .cse1)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In398703002, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In398703002} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In398703002, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In398703002, P2Thread1of1ForFork0_#t~ite42=|P2Thread1of1ForFork0_#t~ite42_Out398703002|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite42] because there is no mapped edge [2019-12-07 14:04:24,755 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [841] [841] L818-->L818-2: Formula: (let ((.cse3 (= 0 (mod ~a$r_buff1_thd3~0_In1376534172 256))) (.cse2 (= (mod ~a$w_buff1_used~0_In1376534172 256) 0)) (.cse0 (= (mod ~a$w_buff0_used~0_In1376534172 256) 0)) (.cse1 (= (mod ~a$r_buff0_thd3~0_In1376534172 256) 0))) (or (and (= 0 |P2Thread1of1ForFork0_#t~ite43_Out1376534172|) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse3 .cse2) (or .cse0 .cse1) (= ~a$r_buff1_thd3~0_In1376534172 |P2Thread1of1ForFork0_#t~ite43_Out1376534172|)))) InVars {~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1376534172, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1376534172, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1376534172, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1376534172} OutVars{P2Thread1of1ForFork0_#t~ite43=|P2Thread1of1ForFork0_#t~ite43_Out1376534172|, ~a$r_buff1_thd3~0=~a$r_buff1_thd3~0_In1376534172, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1376534172, ~a$r_buff0_thd3~0=~a$r_buff0_thd3~0_In1376534172, ~a$w_buff1_used~0=~a$w_buff1_used~0_In1376534172} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#t~ite43] because there is no mapped edge [2019-12-07 14:04:24,755 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [875] [875] L818-2-->P2EXIT: Formula: (and (= v_~a$r_buff1_thd3~0_149 |v_P2Thread1of1ForFork0_#t~ite43_36|) (= |v_P2Thread1of1ForFork0_#res.base_3| 0) (= v_~__unbuffered_cnt~0_78 (+ v_~__unbuffered_cnt~0_79 1)) (= |v_P2Thread1of1ForFork0_#res.offset_3| 0)) InVars {P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_36|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_79} OutVars{P2Thread1of1ForFork0_#res.base=|v_P2Thread1of1ForFork0_#res.base_3|, P2Thread1of1ForFork0_#t~ite43=|v_P2Thread1of1ForFork0_#t~ite43_35|, ~a$r_buff1_thd3~0=v_~a$r_buff1_thd3~0_149, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_78, P2Thread1of1ForFork0_#res.offset=|v_P2Thread1of1ForFork0_#res.offset_3|} AuxVars[] AssignedVars[P2Thread1of1ForFork0_#res.base, P2Thread1of1ForFork0_#t~ite43, ~a$r_buff1_thd3~0, ~__unbuffered_cnt~0, P2Thread1of1ForFork0_#res.offset] because there is no mapped edge [2019-12-07 14:04:24,755 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [801] [801] L841-1-->L847: Formula: (and (not (= 0 (mod v_~main$tmp_guard0~0_9 256))) (= v_~main$tmp_guard0~0_9 (ite (= 0 (ite (= 3 v_~__unbuffered_cnt~0_40) 1 0)) 0 1))) InVars {~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40} OutVars{ULTIMATE.start_main_#t~nondet46=|v_ULTIMATE.start_main_#t~nondet46_7|, ~__unbuffered_cnt~0=v_~__unbuffered_cnt~0_40, ~main$tmp_guard0~0=v_~main$tmp_guard0~0_9} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~nondet46, ~main$tmp_guard0~0] because there is no mapped edge [2019-12-07 14:04:24,756 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [835] [835] L847-2-->L847-4: Formula: (let ((.cse0 (= (mod ~a$w_buff1_used~0_In752139667 256) 0)) (.cse1 (= (mod ~a$r_buff1_thd0~0_In752139667 256) 0))) (or (and (or .cse0 .cse1) (= |ULTIMATE.start_main_#t~ite47_Out752139667| ~a~0_In752139667)) (and (= |ULTIMATE.start_main_#t~ite47_Out752139667| ~a$w_buff1~0_In752139667) (not .cse0) (not .cse1)))) InVars {~a~0=~a~0_In752139667, ~a$w_buff1~0=~a$w_buff1~0_In752139667, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In752139667, ~a$w_buff1_used~0=~a$w_buff1_used~0_In752139667} OutVars{~a~0=~a~0_In752139667, ~a$w_buff1~0=~a$w_buff1~0_In752139667, ULTIMATE.start_main_#t~ite47=|ULTIMATE.start_main_#t~ite47_Out752139667|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In752139667, ~a$w_buff1_used~0=~a$w_buff1_used~0_In752139667} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite47] because there is no mapped edge [2019-12-07 14:04:24,756 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [782] [782] L847-4-->L848: Formula: (= v_~a~0_39 |v_ULTIMATE.start_main_#t~ite47_15|) InVars {ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_15|} OutVars{~a~0=v_~a~0_39, ULTIMATE.start_main_#t~ite47=|v_ULTIMATE.start_main_#t~ite47_14|, ULTIMATE.start_main_#t~ite48=|v_ULTIMATE.start_main_#t~ite48_6|} AuxVars[] AssignedVars[~a~0, ULTIMATE.start_main_#t~ite47, ULTIMATE.start_main_#t~ite48] because there is no mapped edge [2019-12-07 14:04:24,756 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [839] [839] L848-->L848-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In-1910056930 256))) (.cse1 (= (mod ~a$r_buff0_thd0~0_In-1910056930 256) 0))) (or (and (= ~a$w_buff0_used~0_In-1910056930 |ULTIMATE.start_main_#t~ite49_Out-1910056930|) (or .cse0 .cse1)) (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite49_Out-1910056930|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In-1910056930, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1910056930} OutVars{~a$w_buff0_used~0=~a$w_buff0_used~0_In-1910056930, ULTIMATE.start_main_#t~ite49=|ULTIMATE.start_main_#t~ite49_Out-1910056930|, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1910056930} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite49] because there is no mapped edge [2019-12-07 14:04:24,756 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [845] [845] L849-->L849-2: Formula: (let ((.cse1 (= (mod ~a$w_buff1_used~0_In-1964641033 256) 0)) (.cse0 (= (mod ~a$r_buff1_thd0~0_In-1964641033 256) 0)) (.cse2 (= 0 (mod ~a$r_buff0_thd0~0_In-1964641033 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In-1964641033 256) 0))) (or (and (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3))) (= |ULTIMATE.start_main_#t~ite50_Out-1964641033| 0)) (and (or .cse1 .cse0) (or .cse2 .cse3) (= |ULTIMATE.start_main_#t~ite50_Out-1964641033| ~a$w_buff1_used~0_In-1964641033)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1964641033, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1964641033, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1964641033, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1964641033} OutVars{ULTIMATE.start_main_#t~ite50=|ULTIMATE.start_main_#t~ite50_Out-1964641033|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In-1964641033, ~a$w_buff0_used~0=~a$w_buff0_used~0_In-1964641033, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In-1964641033, ~a$w_buff1_used~0=~a$w_buff1_used~0_In-1964641033} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite50] because there is no mapped edge [2019-12-07 14:04:24,757 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [828] [828] L850-->L850-2: Formula: (let ((.cse0 (= 0 (mod ~a$w_buff0_used~0_In1585491296 256))) (.cse1 (= 0 (mod ~a$r_buff0_thd0~0_In1585491296 256)))) (or (and (or .cse0 .cse1) (= ~a$r_buff0_thd0~0_In1585491296 |ULTIMATE.start_main_#t~ite51_Out1585491296|)) (and (not .cse0) (not .cse1) (= 0 |ULTIMATE.start_main_#t~ite51_Out1585491296|)))) InVars {~a$w_buff0_used~0=~a$w_buff0_used~0_In1585491296, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1585491296} OutVars{ULTIMATE.start_main_#t~ite51=|ULTIMATE.start_main_#t~ite51_Out1585491296|, ~a$w_buff0_used~0=~a$w_buff0_used~0_In1585491296, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In1585491296} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite51] because there is no mapped edge [2019-12-07 14:04:24,757 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [827] [827] L851-->L851-2: Formula: (let ((.cse2 (= 0 (mod ~a$r_buff0_thd0~0_In370565615 256))) (.cse3 (= (mod ~a$w_buff0_used~0_In370565615 256) 0)) (.cse1 (= 0 (mod ~a$r_buff1_thd0~0_In370565615 256))) (.cse0 (= (mod ~a$w_buff1_used~0_In370565615 256) 0))) (or (and (= |ULTIMATE.start_main_#t~ite52_Out370565615| 0) (or (and (not .cse0) (not .cse1)) (and (not .cse2) (not .cse3)))) (and (or .cse2 .cse3) (or .cse1 .cse0) (= |ULTIMATE.start_main_#t~ite52_Out370565615| ~a$r_buff1_thd0~0_In370565615)))) InVars {~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In370565615, ~a$w_buff0_used~0=~a$w_buff0_used~0_In370565615, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In370565615, ~a$w_buff1_used~0=~a$w_buff1_used~0_In370565615} OutVars{ULTIMATE.start_main_#t~ite52=|ULTIMATE.start_main_#t~ite52_Out370565615|, ~a$r_buff1_thd0~0=~a$r_buff1_thd0~0_In370565615, ~a$w_buff0_used~0=~a$w_buff0_used~0_In370565615, ~a$r_buff0_thd0~0=~a$r_buff0_thd0~0_In370565615, ~a$w_buff1_used~0=~a$w_buff1_used~0_In370565615} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52] because there is no mapped edge [2019-12-07 14:04:24,757 WARN L123 codingBacktranslator]: Skipped backtranslation of ATE [887] [887] L851-2-->ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION: Formula: (and (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 0) (= v_ULTIMATE.start___VERIFIER_assert_~expression_16 |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|) (= |v_ULTIMATE.start_main_#t~ite52_30| v_~a$r_buff1_thd0~0_75) (= |v_ULTIMATE.start___VERIFIER_assert_#in~expression_12| (mod v_~main$tmp_guard1~0_12 256)) (= v_~main$tmp_guard1~0_12 (ite (= (ite (not (and (= 1 v_~__unbuffered_p2_EAX~0_17) (= v_~__unbuffered_p1_EBX~0_17 0) (= 0 v_~__unbuffered_p0_EAX~0_39) (= 1 v_~__unbuffered_p1_EAX~0_17) (= v_~__unbuffered_p2_EBX~0_22 0))) 1 0) 0) 0 1))) InVars {~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_39, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_30|, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_17, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_17, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_17} OutVars{~__unbuffered_p0_EAX~0=v_~__unbuffered_p0_EAX~0_39, ULTIMATE.start_main_#t~ite52=|v_ULTIMATE.start_main_#t~ite52_29|, ULTIMATE.start___VERIFIER_assert_~expression=v_ULTIMATE.start___VERIFIER_assert_~expression_16, ~__unbuffered_p1_EBX~0=v_~__unbuffered_p1_EBX~0_17, ~__unbuffered_p2_EBX~0=v_~__unbuffered_p2_EBX~0_22, ~__unbuffered_p1_EAX~0=v_~__unbuffered_p1_EAX~0_17, ~a$r_buff1_thd0~0=v_~a$r_buff1_thd0~0_75, ~main$tmp_guard1~0=v_~main$tmp_guard1~0_12, ~__unbuffered_p2_EAX~0=v_~__unbuffered_p2_EAX~0_17, ULTIMATE.start___VERIFIER_assert_#in~expression=|v_ULTIMATE.start___VERIFIER_assert_#in~expression_12|} AuxVars[] AssignedVars[ULTIMATE.start_main_#t~ite52, ULTIMATE.start___VERIFIER_assert_~expression, ~a$r_buff1_thd0~0, ~main$tmp_guard1~0, ULTIMATE.start___VERIFIER_assert_#in~expression] because there is no mapped edge [2019-12-07 14:04:24,808 INFO L141 WitnessManager]: Wrote witness to /tmp/vcloud-vcloud-master/worker/run_dir_5ff86975-fc51-48ff-b4f2-c1c4ef468c06/bin/utaipan/witness.graphml [2019-12-07 14:04:24,808 INFO L132 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2019-12-07 14:04:24,809 INFO L168 Benchmark]: Toolchain (without parser) took 189831.51 ms. Allocated memory was 1.0 GB in the beginning and 7.2 GB in the end (delta: 6.2 GB). Free memory was 940.7 MB in the beginning and 3.5 GB in the end (delta: -2.5 GB). Peak memory consumption was 3.7 GB. Max. memory is 11.5 GB. [2019-12-07 14:04:24,809 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 959.5 MB. There was no memory consumed. Max. memory is 11.5 GB. [2019-12-07 14:04:24,809 INFO L168 Benchmark]: CACSL2BoogieTranslator took 421.19 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 144.7 MB). Free memory was 940.7 MB in the beginning and 1.1 GB in the end (delta: -168.2 MB). Peak memory consumption was 22.5 MB. Max. memory is 11.5 GB. [2019-12-07 14:04:24,810 INFO L168 Benchmark]: Boogie Procedure Inliner took 37.85 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.4 MB). Peak memory consumption was 3.4 MB. Max. memory is 11.5 GB. [2019-12-07 14:04:24,810 INFO L168 Benchmark]: Boogie Preprocessor took 25.32 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 1.7 MB). Peak memory consumption was 1.7 MB. Max. memory is 11.5 GB. [2019-12-07 14:04:24,810 INFO L168 Benchmark]: RCFGBuilder took 422.85 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 65.3 MB). Peak memory consumption was 65.3 MB. Max. memory is 11.5 GB. [2019-12-07 14:04:24,811 INFO L168 Benchmark]: TraceAbstraction took 188854.22 ms. Allocated memory was 1.2 GB in the beginning and 7.2 GB in the end (delta: 6.1 GB). Free memory was 1.0 GB in the beginning and 3.5 GB in the end (delta: -2.5 GB). Peak memory consumption was 3.6 GB. Max. memory is 11.5 GB. [2019-12-07 14:04:24,811 INFO L168 Benchmark]: Witness Printer took 66.39 ms. Allocated memory is still 7.2 GB. Free memory was 3.5 GB in the beginning and 3.5 GB in the end (delta: 43.0 MB). Peak memory consumption was 43.0 MB. Max. memory is 11.5 GB. [2019-12-07 14:04:24,812 INFO L335 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 1.0 GB. Free memory is still 959.5 MB. There was no memory consumed. Max. memory is 11.5 GB. * CACSL2BoogieTranslator took 421.19 ms. Allocated memory was 1.0 GB in the beginning and 1.2 GB in the end (delta: 144.7 MB). Free memory was 940.7 MB in the beginning and 1.1 GB in the end (delta: -168.2 MB). Peak memory consumption was 22.5 MB. Max. memory is 11.5 GB. * Boogie Procedure Inliner took 37.85 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 3.4 MB). Peak memory consumption was 3.4 MB. Max. memory is 11.5 GB. * Boogie Preprocessor took 25.32 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.1 GB in the end (delta: 1.7 MB). Peak memory consumption was 1.7 MB. Max. memory is 11.5 GB. * RCFGBuilder took 422.85 ms. Allocated memory is still 1.2 GB. Free memory was 1.1 GB in the beginning and 1.0 GB in the end (delta: 65.3 MB). Peak memory consumption was 65.3 MB. Max. memory is 11.5 GB. * TraceAbstraction took 188854.22 ms. Allocated memory was 1.2 GB in the beginning and 7.2 GB in the end (delta: 6.1 GB). Free memory was 1.0 GB in the beginning and 3.5 GB in the end (delta: -2.5 GB). Peak memory consumption was 3.6 GB. Max. memory is 11.5 GB. * Witness Printer took 66.39 ms. Allocated memory is still 7.2 GB. Free memory was 3.5 GB in the beginning and 3.5 GB in the end (delta: 43.0 MB). Peak memory consumption was 43.0 MB. Max. memory is 11.5 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: PetriNetLargeBlockEncoding benchmarks LbeTime: 3.3s, 179 ProgramPointsBefore, 95 ProgramPointsAfterwards, 216 TransitionsBefore, 105 TransitionsAfterwards, 19004 CoEnabledTransitionPairs, 8 FixpointIterations, 36 TrivialSequentialCompositions, 48 ConcurrentSequentialCompositions, 0 TrivialYvCompositions, 32 ConcurrentYvCompositions, 31 ChoiceCompositions, 6646 VarBasedMoverChecksPositive, 237 VarBasedMoverChecksNegative, 59 SemBasedMoverChecksPositive, 236 SemBasedMoverChecksNegative, 0 SemBasedMoverChecksUnknown, SemBasedMoverCheckTime: 0.8s, 0 MoverChecksTotal, 91218 CheckedPairsTotal, 116 TotalNumberOfCompositions - CounterExampleResult [Line: 4]: a call of __VERIFIER_error() is reachable a call of __VERIFIER_error() is reachable We found a FailurePath: [L837] FCALL, FORK 0 pthread_create(&t269, ((void *)0), P0, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=0, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=0, a$w_buff0_used=0, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L742] 1 a$r_buff1_thd0 = a$r_buff0_thd0 [L743] 1 a$r_buff1_thd1 = a$r_buff0_thd1 [L744] 1 a$r_buff1_thd2 = a$r_buff0_thd2 [L745] 1 a$r_buff1_thd3 = a$r_buff0_thd3 [L746] 1 a$r_buff0_thd1 = (_Bool)1 [L749] 1 __unbuffered_p0_EAX = x VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L752] EXPR 1 a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L839] FCALL, FORK 0 pthread_create(&t270, ((void *)0), P1, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=0, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=0, y=0, z=0] [L766] 2 x = 1 [L769] 2 y = 1 [L772] 2 __unbuffered_p1_EAX = y [L775] 2 __unbuffered_p1_EBX = z VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L841] FCALL, FORK 0 pthread_create(&t271, ((void *)0), P2, ((void *)0)) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L778] 2 a$w_buff0_used && a$r_buff0_thd2 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd2 ? a$w_buff1 : a) VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=0, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=0, weak$$choice2=0, x=1, y=1, z=0] [L792] 3 z = 1 [L795] 3 __unbuffered_p2_EAX = z [L798] 3 weak$$choice0 = __VERIFIER_nondet_bool() [L799] 3 weak$$choice2 = __VERIFIER_nondet_bool() [L800] 3 a$flush_delayed = weak$$choice2 [L801] 3 a$mem_tmp = a VAL [__unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L802] EXPR 3 !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) VAL [!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1)=0, __unbuffered_cnt=0, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L752] 1 a = a$w_buff0_used && a$r_buff0_thd1 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd1 ? a$w_buff1 : a) [L753] 1 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd1 ? (_Bool)0 : a$w_buff0_used [L754] 1 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd1 || a$w_buff1_used && a$r_buff1_thd1 ? (_Bool)0 : a$w_buff1_used [L802] 3 a = !a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff1) [L803] 3 a$w_buff0 = weak$$choice2 ? a$w_buff0 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : a$w_buff0)) [L804] EXPR 3 weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1))=0, x=1, y=1, z=1] [L804] 3 a$w_buff1 = weak$$choice2 ? a$w_buff1 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1 : (a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff1 : a$w_buff1)) [L805] 3 a$w_buff0_used = weak$$choice2 ? a$w_buff0_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff0_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used)) [L806] EXPR 3 weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=1] [L806] 3 a$w_buff1_used = weak$$choice2 ? a$w_buff1_used : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$w_buff1_used : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L808] EXPR 3 weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0))=0, x=1, y=1, z=1] [L808] 3 a$r_buff1_thd3 = weak$$choice2 ? a$r_buff1_thd3 : (!a$w_buff0_used || !a$r_buff0_thd3 && !a$w_buff1_used || !a$r_buff0_thd3 && !a$r_buff1_thd3 ? a$r_buff1_thd3 : (a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : (_Bool)0)) [L809] 3 __unbuffered_p2_EBX = a VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=1, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L814] EXPR 3 a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) VAL [__unbuffered_cnt=1, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=0, a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=0, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L814] 3 a = a$w_buff0_used && a$r_buff0_thd3 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd3 ? a$w_buff1 : a) [L815] 3 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$w_buff0_used [L816] 3 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd3 || a$w_buff1_used && a$r_buff1_thd3 ? (_Bool)0 : a$w_buff1_used [L779] 2 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$w_buff0_used [L780] 2 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd2 || a$w_buff1_used && a$r_buff1_thd2 ? (_Bool)0 : a$w_buff1_used [L781] 2 a$r_buff0_thd2 = a$w_buff0_used && a$r_buff0_thd2 ? (_Bool)0 : a$r_buff0_thd2 [L817] 3 a$r_buff0_thd3 = a$w_buff0_used && a$r_buff0_thd3 ? (_Bool)0 : a$r_buff0_thd3 [L847] 0 a$w_buff0_used && a$r_buff0_thd0 ? a$w_buff0 : (a$w_buff1_used && a$r_buff1_thd0 ? a$w_buff1 : a) VAL [\result={0:0}, \result={0:0}, __unbuffered_cnt=3, __unbuffered_p0_EAX=0, __unbuffered_p1_EAX=1, __unbuffered_p1_EBX=0, __unbuffered_p2_EAX=1, __unbuffered_p2_EBX=0, a=0, a$flush_delayed=0, a$mem_tmp=0, a$r_buff0_thd0=0, a$r_buff0_thd1=1, a$r_buff0_thd2=0, a$r_buff0_thd3=0, a$r_buff1_thd0=0, a$r_buff1_thd1=0, a$r_buff1_thd2=0, a$r_buff1_thd3=0, a$read_delayed=0, a$read_delayed_var={0:0}, a$w_buff0=1, a$w_buff0_used=1, a$w_buff1=0, a$w_buff1_used=0, arg={0:0}, arg={0:0}, arg={0:0}, arg={0:0}, main$tmp_guard0=1, main$tmp_guard1=0, weak$$choice0=7, weak$$choice2=1, x=1, y=1, z=1] [L848] 0 a$w_buff0_used = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$w_buff0_used [L849] 0 a$w_buff1_used = a$w_buff0_used && a$r_buff0_thd0 || a$w_buff1_used && a$r_buff1_thd0 ? (_Bool)0 : a$w_buff1_used [L850] 0 a$r_buff0_thd0 = a$w_buff0_used && a$r_buff0_thd0 ? (_Bool)0 : a$r_buff0_thd0 - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 170 locations, 2 error locations. Result: UNSAFE, OverallTime: 188.7s, OverallIterations: 40, TraceHistogramMax: 1, AutomataDifference: 95.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, HoareTripleCheckerStatistics: 13668 SDtfs, 21950 SDslu, 68157 SDs, 0 SdLazy, 68184 SolverSat, 1185 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 53.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1124 GetRequests, 34 SyntacticMatches, 52 SemanticMatches, 1038 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15873 ImplicationChecksByTransitivity, 19.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=230321occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 66.1s AutomataMinimizationTime, 39 MinimizatonAttempts, 509487 StatesRemovedByMinimization, 38 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.0s SsaConstructionTime, 0.4s SatisfiabilityAnalysisTime, 5.1s InterpolantComputationTime, 1995 NumberOfCodeBlocks, 1995 NumberOfCodeBlocksAsserted, 40 NumberOfCheckSat, 1889 ConstructedInterpolants, 0 QuantifiedInterpolants, 1169225 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 39 InterpolantComputations, 39 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, SIFA: No data available, ReuseStatistics: No data available RESULT: Ultimate proved your program to be incorrect! Received shutdown request...